if_ural.c revision 1.44.14.4
1 /* $NetBSD: if_ural.c,v 1.44.14.4 2015/03/21 11:33:37 skrll Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.44.14.4 2015/03/21 11:33:37 skrll Exp $"); 28 29 #include <sys/param.h> 30 #include <sys/sockio.h> 31 #include <sys/sysctl.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/conf.h> 37 #include <sys/device.h> 38 39 #include <sys/bus.h> 40 #include <machine/endian.h> 41 #include <sys/intr.h> 42 43 #include <net/bpf.h> 44 #include <net/if.h> 45 #include <net/if_arp.h> 46 #include <net/if_dl.h> 47 #include <net/if_ether.h> 48 #include <net/if_media.h> 49 #include <net/if_types.h> 50 51 #include <netinet/in.h> 52 #include <netinet/in_systm.h> 53 #include <netinet/in_var.h> 54 #include <netinet/ip.h> 55 56 #include <net80211/ieee80211_netbsd.h> 57 #include <net80211/ieee80211_var.h> 58 #include <net80211/ieee80211_amrr.h> 59 #include <net80211/ieee80211_radiotap.h> 60 61 #include <dev/usb/usb.h> 62 #include <dev/usb/usbdi.h> 63 #include <dev/usb/usbdi_util.h> 64 #include <dev/usb/usbdevs.h> 65 66 #include <dev/usb/if_uralreg.h> 67 #include <dev/usb/if_uralvar.h> 68 69 #ifdef URAL_DEBUG 70 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 71 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 72 int ural_debug = 0; 73 #else 74 #define DPRINTF(x) 75 #define DPRINTFN(n, x) 76 #endif 77 78 /* various supported device vendors/products */ 79 static const struct usb_devno ural_devs[] = { 80 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 81 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 82 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 83 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 84 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 85 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 86 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 87 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 88 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 89 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 90 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 91 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 92 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 93 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 94 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 95 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 96 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 97 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 98 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 99 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 100 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 101 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 102 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 103 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 104 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 105 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 106 }; 107 108 Static int ural_alloc_tx_list(struct ural_softc *); 109 Static void ural_free_tx_list(struct ural_softc *); 110 Static int ural_alloc_rx_list(struct ural_softc *); 111 Static void ural_free_rx_list(struct ural_softc *); 112 Static int ural_media_change(struct ifnet *); 113 Static void ural_next_scan(void *); 114 Static void ural_task(void *); 115 Static int ural_newstate(struct ieee80211com *, 116 enum ieee80211_state, int); 117 Static int ural_rxrate(struct ural_rx_desc *); 118 Static void ural_txeof(struct usbd_xfer *, void *, 119 usbd_status); 120 Static void ural_rxeof(struct usbd_xfer *, void *, 121 usbd_status); 122 Static int ural_ack_rate(struct ieee80211com *, int); 123 Static uint16_t ural_txtime(int, int, uint32_t); 124 Static uint8_t ural_plcp_signal(int); 125 Static void ural_setup_tx_desc(struct ural_softc *, 126 struct ural_tx_desc *, uint32_t, int, int); 127 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 128 struct ieee80211_node *); 129 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 130 struct ieee80211_node *); 131 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 Static void ural_start(struct ifnet *); 134 Static void ural_watchdog(struct ifnet *); 135 Static int ural_reset(struct ifnet *); 136 Static int ural_ioctl(struct ifnet *, u_long, void *); 137 Static void ural_set_testmode(struct ural_softc *); 138 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 139 int); 140 Static uint16_t ural_read(struct ural_softc *, uint16_t); 141 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 142 int); 143 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 144 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 145 int); 146 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 147 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 148 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 149 Static void ural_set_chan(struct ural_softc *, 150 struct ieee80211_channel *); 151 Static void ural_disable_rf_tune(struct ural_softc *); 152 Static void ural_enable_tsf_sync(struct ural_softc *); 153 Static void ural_update_slot(struct ifnet *); 154 Static void ural_set_txpreamble(struct ural_softc *); 155 Static void ural_set_basicrates(struct ural_softc *); 156 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 157 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 158 Static void ural_update_promisc(struct ural_softc *); 159 Static const char *ural_get_rf(int); 160 Static void ural_read_eeprom(struct ural_softc *); 161 Static int ural_bbp_init(struct ural_softc *); 162 Static void ural_set_txantenna(struct ural_softc *, int); 163 Static void ural_set_rxantenna(struct ural_softc *, int); 164 Static int ural_init(struct ifnet *); 165 Static void ural_stop(struct ifnet *, int); 166 Static void ural_amrr_start(struct ural_softc *, 167 struct ieee80211_node *); 168 Static void ural_amrr_timeout(void *); 169 Static void ural_amrr_update(struct usbd_xfer *, void *, 170 usbd_status status); 171 172 /* 173 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 174 */ 175 static const struct ieee80211_rateset ural_rateset_11a = 176 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 177 178 static const struct ieee80211_rateset ural_rateset_11b = 179 { 4, { 2, 4, 11, 22 } }; 180 181 static const struct ieee80211_rateset ural_rateset_11g = 182 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 183 184 /* 185 * Default values for MAC registers; values taken from the reference driver. 186 */ 187 static const struct { 188 uint16_t reg; 189 uint16_t val; 190 } ural_def_mac[] = { 191 { RAL_TXRX_CSR5, 0x8c8d }, 192 { RAL_TXRX_CSR6, 0x8b8a }, 193 { RAL_TXRX_CSR7, 0x8687 }, 194 { RAL_TXRX_CSR8, 0x0085 }, 195 { RAL_MAC_CSR13, 0x1111 }, 196 { RAL_MAC_CSR14, 0x1e11 }, 197 { RAL_TXRX_CSR21, 0xe78f }, 198 { RAL_MAC_CSR9, 0xff1d }, 199 { RAL_MAC_CSR11, 0x0002 }, 200 { RAL_MAC_CSR22, 0x0053 }, 201 { RAL_MAC_CSR15, 0x0000 }, 202 { RAL_MAC_CSR8, 0x0780 }, 203 { RAL_TXRX_CSR19, 0x0000 }, 204 { RAL_TXRX_CSR18, 0x005a }, 205 { RAL_PHY_CSR2, 0x0000 }, 206 { RAL_TXRX_CSR0, 0x1ec0 }, 207 { RAL_PHY_CSR4, 0x000f } 208 }; 209 210 /* 211 * Default values for BBP registers; values taken from the reference driver. 212 */ 213 static const struct { 214 uint8_t reg; 215 uint8_t val; 216 } ural_def_bbp[] = { 217 { 3, 0x02 }, 218 { 4, 0x19 }, 219 { 14, 0x1c }, 220 { 15, 0x30 }, 221 { 16, 0xac }, 222 { 17, 0x48 }, 223 { 18, 0x18 }, 224 { 19, 0xff }, 225 { 20, 0x1e }, 226 { 21, 0x08 }, 227 { 22, 0x08 }, 228 { 23, 0x08 }, 229 { 24, 0x80 }, 230 { 25, 0x50 }, 231 { 26, 0x08 }, 232 { 27, 0x23 }, 233 { 30, 0x10 }, 234 { 31, 0x2b }, 235 { 32, 0xb9 }, 236 { 34, 0x12 }, 237 { 35, 0x50 }, 238 { 39, 0xc4 }, 239 { 40, 0x02 }, 240 { 41, 0x60 }, 241 { 53, 0x10 }, 242 { 54, 0x18 }, 243 { 56, 0x08 }, 244 { 57, 0x10 }, 245 { 58, 0x08 }, 246 { 61, 0x60 }, 247 { 62, 0x10 }, 248 { 75, 0xff } 249 }; 250 251 /* 252 * Default values for RF register R2 indexed by channel numbers. 253 */ 254 static const uint32_t ural_rf2522_r2[] = { 255 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 256 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 257 }; 258 259 static const uint32_t ural_rf2523_r2[] = { 260 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 261 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 262 }; 263 264 static const uint32_t ural_rf2524_r2[] = { 265 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 266 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 267 }; 268 269 static const uint32_t ural_rf2525_r2[] = { 270 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 271 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 272 }; 273 274 static const uint32_t ural_rf2525_hi_r2[] = { 275 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 276 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 277 }; 278 279 static const uint32_t ural_rf2525e_r2[] = { 280 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 281 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 282 }; 283 284 static const uint32_t ural_rf2526_hi_r2[] = { 285 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 286 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 287 }; 288 289 static const uint32_t ural_rf2526_r2[] = { 290 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 291 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 292 }; 293 294 /* 295 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 296 * values taken from the reference driver. 297 */ 298 static const struct { 299 uint8_t chan; 300 uint32_t r1; 301 uint32_t r2; 302 uint32_t r4; 303 } ural_rf5222[] = { 304 { 1, 0x08808, 0x0044d, 0x00282 }, 305 { 2, 0x08808, 0x0044e, 0x00282 }, 306 { 3, 0x08808, 0x0044f, 0x00282 }, 307 { 4, 0x08808, 0x00460, 0x00282 }, 308 { 5, 0x08808, 0x00461, 0x00282 }, 309 { 6, 0x08808, 0x00462, 0x00282 }, 310 { 7, 0x08808, 0x00463, 0x00282 }, 311 { 8, 0x08808, 0x00464, 0x00282 }, 312 { 9, 0x08808, 0x00465, 0x00282 }, 313 { 10, 0x08808, 0x00466, 0x00282 }, 314 { 11, 0x08808, 0x00467, 0x00282 }, 315 { 12, 0x08808, 0x00468, 0x00282 }, 316 { 13, 0x08808, 0x00469, 0x00282 }, 317 { 14, 0x08808, 0x0046b, 0x00286 }, 318 319 { 36, 0x08804, 0x06225, 0x00287 }, 320 { 40, 0x08804, 0x06226, 0x00287 }, 321 { 44, 0x08804, 0x06227, 0x00287 }, 322 { 48, 0x08804, 0x06228, 0x00287 }, 323 { 52, 0x08804, 0x06229, 0x00287 }, 324 { 56, 0x08804, 0x0622a, 0x00287 }, 325 { 60, 0x08804, 0x0622b, 0x00287 }, 326 { 64, 0x08804, 0x0622c, 0x00287 }, 327 328 { 100, 0x08804, 0x02200, 0x00283 }, 329 { 104, 0x08804, 0x02201, 0x00283 }, 330 { 108, 0x08804, 0x02202, 0x00283 }, 331 { 112, 0x08804, 0x02203, 0x00283 }, 332 { 116, 0x08804, 0x02204, 0x00283 }, 333 { 120, 0x08804, 0x02205, 0x00283 }, 334 { 124, 0x08804, 0x02206, 0x00283 }, 335 { 128, 0x08804, 0x02207, 0x00283 }, 336 { 132, 0x08804, 0x02208, 0x00283 }, 337 { 136, 0x08804, 0x02209, 0x00283 }, 338 { 140, 0x08804, 0x0220a, 0x00283 }, 339 340 { 149, 0x08808, 0x02429, 0x00281 }, 341 { 153, 0x08808, 0x0242b, 0x00281 }, 342 { 157, 0x08808, 0x0242d, 0x00281 }, 343 { 161, 0x08808, 0x0242f, 0x00281 } 344 }; 345 346 int ural_match(device_t, cfdata_t, void *); 347 void ural_attach(device_t, device_t, void *); 348 int ural_detach(device_t, int); 349 int ural_activate(device_t, enum devact); 350 extern struct cfdriver ural_cd; 351 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, ural_detach, ural_activate); 352 353 int 354 ural_match(device_t parent, cfdata_t match, void *aux) 355 { 356 struct usb_attach_arg *uaa = aux; 357 358 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 359 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 360 } 361 362 void 363 ural_attach(device_t parent, device_t self, void *aux) 364 { 365 struct ural_softc *sc = device_private(self); 366 struct usb_attach_arg *uaa = aux; 367 struct ieee80211com *ic = &sc->sc_ic; 368 struct ifnet *ifp = &sc->sc_if; 369 usb_interface_descriptor_t *id; 370 usb_endpoint_descriptor_t *ed; 371 usbd_status error; 372 char *devinfop; 373 int i; 374 375 sc->sc_dev = self; 376 sc->sc_udev = uaa->uaa_device; 377 378 aprint_naive("\n"); 379 aprint_normal("\n"); 380 381 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 382 aprint_normal_dev(self, "%s\n", devinfop); 383 usbd_devinfo_free(devinfop); 384 385 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 386 if (error != 0) { 387 aprint_error_dev(self, "failed to set configuration" 388 ", err=%s\n", usbd_errstr(error)); 389 return; 390 } 391 392 /* get the first interface handle */ 393 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 394 &sc->sc_iface); 395 if (error != 0) { 396 aprint_error_dev(self, "could not get interface handle\n"); 397 return; 398 } 399 400 /* 401 * Find endpoints. 402 */ 403 id = usbd_get_interface_descriptor(sc->sc_iface); 404 405 sc->sc_rx_no = sc->sc_tx_no = -1; 406 for (i = 0; i < id->bNumEndpoints; i++) { 407 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 408 if (ed == NULL) { 409 aprint_error_dev(self, 410 "no endpoint descriptor for %d\n", i); 411 return; 412 } 413 414 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 415 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 416 sc->sc_rx_no = ed->bEndpointAddress; 417 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 418 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 419 sc->sc_tx_no = ed->bEndpointAddress; 420 } 421 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 422 aprint_error_dev(self, "missing endpoint\n"); 423 return; 424 } 425 426 usb_init_task(&sc->sc_task, ural_task, sc, 0); 427 callout_init(&sc->sc_scan_ch, 0); 428 sc->amrr.amrr_min_success_threshold = 1; 429 sc->amrr.amrr_max_success_threshold = 15; 430 callout_init(&sc->sc_amrr_ch, 0); 431 432 /* retrieve RT2570 rev. no */ 433 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 434 435 /* retrieve MAC address and various other things from EEPROM */ 436 ural_read_eeprom(sc); 437 438 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 439 sc->asic_rev, ural_get_rf(sc->rf_rev)); 440 441 ifp->if_softc = sc; 442 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 443 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 444 ifp->if_init = ural_init; 445 ifp->if_ioctl = ural_ioctl; 446 ifp->if_start = ural_start; 447 ifp->if_watchdog = ural_watchdog; 448 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 449 IFQ_SET_READY(&ifp->if_snd); 450 451 ic->ic_ifp = ifp; 452 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 453 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 454 ic->ic_state = IEEE80211_S_INIT; 455 456 /* set device capabilities */ 457 ic->ic_caps = 458 IEEE80211_C_IBSS | /* IBSS mode supported */ 459 IEEE80211_C_MONITOR | /* monitor mode supported */ 460 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 461 IEEE80211_C_TXPMGT | /* tx power management */ 462 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 463 IEEE80211_C_SHSLOT | /* short slot time supported */ 464 IEEE80211_C_WPA; /* 802.11i */ 465 466 if (sc->rf_rev == RAL_RF_5222) { 467 /* set supported .11a rates */ 468 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 469 470 /* set supported .11a channels */ 471 for (i = 36; i <= 64; i += 4) { 472 ic->ic_channels[i].ic_freq = 473 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 474 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 475 } 476 for (i = 100; i <= 140; i += 4) { 477 ic->ic_channels[i].ic_freq = 478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 480 } 481 for (i = 149; i <= 161; i += 4) { 482 ic->ic_channels[i].ic_freq = 483 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 484 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 485 } 486 } 487 488 /* set supported .11b and .11g rates */ 489 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 490 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 491 492 /* set supported .11b and .11g channels (1 through 14) */ 493 for (i = 1; i <= 14; i++) { 494 ic->ic_channels[i].ic_freq = 495 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 496 ic->ic_channels[i].ic_flags = 497 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 498 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 499 } 500 501 if_attach(ifp); 502 ieee80211_ifattach(ic); 503 ic->ic_reset = ural_reset; 504 505 /* override state transition machine */ 506 sc->sc_newstate = ic->ic_newstate; 507 ic->ic_newstate = ural_newstate; 508 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 509 510 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 511 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 512 513 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 514 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 515 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 516 517 sc->sc_txtap_len = sizeof sc->sc_txtapu; 518 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 519 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 520 521 ieee80211_announce(ic); 522 523 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 524 sc->sc_dev); 525 526 return; 527 } 528 529 int 530 ural_detach(device_t self, int flags) 531 { 532 struct ural_softc *sc = device_private(self); 533 struct ieee80211com *ic = &sc->sc_ic; 534 struct ifnet *ifp = &sc->sc_if; 535 int s; 536 537 s = splusb(); 538 539 ural_stop(ifp, 1); 540 usb_rem_task(sc->sc_udev, &sc->sc_task); 541 callout_stop(&sc->sc_scan_ch); 542 callout_stop(&sc->sc_amrr_ch); 543 544 if (sc->amrr_xfer != NULL) { 545 usbd_free_xfer(sc->amrr_xfer); 546 sc->amrr_xfer = NULL; 547 } 548 549 if (sc->sc_rx_pipeh != NULL) { 550 usbd_abort_pipe(sc->sc_rx_pipeh); 551 usbd_close_pipe(sc->sc_rx_pipeh); 552 } 553 554 if (sc->sc_tx_pipeh != NULL) { 555 usbd_abort_pipe(sc->sc_tx_pipeh); 556 usbd_close_pipe(sc->sc_tx_pipeh); 557 } 558 559 bpf_detach(ifp); 560 ieee80211_ifdetach(ic); 561 if_detach(ifp); 562 563 splx(s); 564 565 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 566 sc->sc_dev); 567 568 return 0; 569 } 570 571 Static int 572 ural_alloc_tx_list(struct ural_softc *sc) 573 { 574 struct ural_tx_data *data; 575 int i, error; 576 577 sc->tx_queued = 0; 578 579 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 580 data = &sc->tx_data[i]; 581 582 data->sc = sc; 583 584 data->xfer = usbd_alloc_xfer(sc->sc_udev); 585 if (data->xfer == NULL) { 586 printf("%s: could not allocate tx xfer\n", 587 device_xname(sc->sc_dev)); 588 error = ENOMEM; 589 goto fail; 590 } 591 592 data->buf = usbd_alloc_buffer(data->xfer, 593 RAL_TX_DESC_SIZE + MCLBYTES); 594 if (data->buf == NULL) { 595 printf("%s: could not allocate tx buffer\n", 596 device_xname(sc->sc_dev)); 597 error = ENOMEM; 598 goto fail; 599 } 600 } 601 602 return 0; 603 604 fail: ural_free_tx_list(sc); 605 return error; 606 } 607 608 Static void 609 ural_free_tx_list(struct ural_softc *sc) 610 { 611 struct ural_tx_data *data; 612 int i; 613 614 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 615 data = &sc->tx_data[i]; 616 617 if (data->xfer != NULL) { 618 usbd_free_xfer(data->xfer); 619 data->xfer = NULL; 620 } 621 622 if (data->ni != NULL) { 623 ieee80211_free_node(data->ni); 624 data->ni = NULL; 625 } 626 } 627 } 628 629 Static int 630 ural_alloc_rx_list(struct ural_softc *sc) 631 { 632 struct ural_rx_data *data; 633 int i, error; 634 635 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 636 data = &sc->rx_data[i]; 637 638 data->sc = sc; 639 640 data->xfer = usbd_alloc_xfer(sc->sc_udev); 641 if (data->xfer == NULL) { 642 printf("%s: could not allocate rx xfer\n", 643 device_xname(sc->sc_dev)); 644 error = ENOMEM; 645 goto fail; 646 } 647 648 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 649 printf("%s: could not allocate rx buffer\n", 650 device_xname(sc->sc_dev)); 651 error = ENOMEM; 652 goto fail; 653 } 654 655 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 656 if (data->m == NULL) { 657 printf("%s: could not allocate rx mbuf\n", 658 device_xname(sc->sc_dev)); 659 error = ENOMEM; 660 goto fail; 661 } 662 663 MCLGET(data->m, M_DONTWAIT); 664 if (!(data->m->m_flags & M_EXT)) { 665 printf("%s: could not allocate rx mbuf cluster\n", 666 device_xname(sc->sc_dev)); 667 error = ENOMEM; 668 goto fail; 669 } 670 671 data->buf = mtod(data->m, uint8_t *); 672 } 673 674 return 0; 675 676 fail: ural_free_tx_list(sc); 677 return error; 678 } 679 680 Static void 681 ural_free_rx_list(struct ural_softc *sc) 682 { 683 struct ural_rx_data *data; 684 int i; 685 686 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 687 data = &sc->rx_data[i]; 688 689 if (data->xfer != NULL) { 690 usbd_free_xfer(data->xfer); 691 data->xfer = NULL; 692 } 693 694 if (data->m != NULL) { 695 m_freem(data->m); 696 data->m = NULL; 697 } 698 } 699 } 700 701 Static int 702 ural_media_change(struct ifnet *ifp) 703 { 704 int error; 705 706 error = ieee80211_media_change(ifp); 707 if (error != ENETRESET) 708 return error; 709 710 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 711 ural_init(ifp); 712 713 return 0; 714 } 715 716 /* 717 * This function is called periodically (every 200ms) during scanning to 718 * switch from one channel to another. 719 */ 720 Static void 721 ural_next_scan(void *arg) 722 { 723 struct ural_softc *sc = arg; 724 struct ieee80211com *ic = &sc->sc_ic; 725 726 if (ic->ic_state == IEEE80211_S_SCAN) 727 ieee80211_next_scan(ic); 728 } 729 730 Static void 731 ural_task(void *arg) 732 { 733 struct ural_softc *sc = arg; 734 struct ieee80211com *ic = &sc->sc_ic; 735 enum ieee80211_state ostate; 736 struct ieee80211_node *ni; 737 struct mbuf *m; 738 739 ostate = ic->ic_state; 740 741 switch (sc->sc_state) { 742 case IEEE80211_S_INIT: 743 if (ostate == IEEE80211_S_RUN) { 744 /* abort TSF synchronization */ 745 ural_write(sc, RAL_TXRX_CSR19, 0); 746 747 /* force tx led to stop blinking */ 748 ural_write(sc, RAL_MAC_CSR20, 0); 749 } 750 break; 751 752 case IEEE80211_S_SCAN: 753 ural_set_chan(sc, ic->ic_curchan); 754 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 755 break; 756 757 case IEEE80211_S_AUTH: 758 ural_set_chan(sc, ic->ic_curchan); 759 break; 760 761 case IEEE80211_S_ASSOC: 762 ural_set_chan(sc, ic->ic_curchan); 763 break; 764 765 case IEEE80211_S_RUN: 766 ural_set_chan(sc, ic->ic_curchan); 767 768 ni = ic->ic_bss; 769 770 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 771 ural_update_slot(ic->ic_ifp); 772 ural_set_txpreamble(sc); 773 ural_set_basicrates(sc); 774 ural_set_bssid(sc, ni->ni_bssid); 775 } 776 777 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 778 ic->ic_opmode == IEEE80211_M_IBSS) { 779 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 780 if (m == NULL) { 781 printf("%s: could not allocate beacon\n", 782 device_xname(sc->sc_dev)); 783 return; 784 } 785 786 if (ural_tx_bcn(sc, m, ni) != 0) { 787 m_freem(m); 788 printf("%s: could not send beacon\n", 789 device_xname(sc->sc_dev)); 790 return; 791 } 792 793 /* beacon is no longer needed */ 794 m_freem(m); 795 } 796 797 /* make tx led blink on tx (controlled by ASIC) */ 798 ural_write(sc, RAL_MAC_CSR20, 1); 799 800 if (ic->ic_opmode != IEEE80211_M_MONITOR) 801 ural_enable_tsf_sync(sc); 802 803 /* enable automatic rate adaptation in STA mode */ 804 if (ic->ic_opmode == IEEE80211_M_STA && 805 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 806 ural_amrr_start(sc, ni); 807 808 break; 809 } 810 811 sc->sc_newstate(ic, sc->sc_state, -1); 812 } 813 814 Static int 815 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 816 int arg) 817 { 818 struct ural_softc *sc = ic->ic_ifp->if_softc; 819 820 usb_rem_task(sc->sc_udev, &sc->sc_task); 821 callout_stop(&sc->sc_scan_ch); 822 callout_stop(&sc->sc_amrr_ch); 823 824 /* do it in a process context */ 825 sc->sc_state = nstate; 826 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 827 828 return 0; 829 } 830 831 /* quickly determine if a given rate is CCK or OFDM */ 832 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 833 834 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 835 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 836 837 #define RAL_SIFS 10 /* us */ 838 839 #define RAL_RXTX_TURNAROUND 5 /* us */ 840 841 /* 842 * This function is only used by the Rx radiotap code. 843 */ 844 Static int 845 ural_rxrate(struct ural_rx_desc *desc) 846 { 847 if (le32toh(desc->flags) & RAL_RX_OFDM) { 848 /* reverse function of ural_plcp_signal */ 849 switch (desc->rate) { 850 case 0xb: return 12; 851 case 0xf: return 18; 852 case 0xa: return 24; 853 case 0xe: return 36; 854 case 0x9: return 48; 855 case 0xd: return 72; 856 case 0x8: return 96; 857 case 0xc: return 108; 858 } 859 } else { 860 if (desc->rate == 10) 861 return 2; 862 if (desc->rate == 20) 863 return 4; 864 if (desc->rate == 55) 865 return 11; 866 if (desc->rate == 110) 867 return 22; 868 } 869 return 2; /* should not get there */ 870 } 871 872 Static void 873 ural_txeof(struct usbd_xfer *xfer, void * priv, 874 usbd_status status) 875 { 876 struct ural_tx_data *data = priv; 877 struct ural_softc *sc = data->sc; 878 struct ifnet *ifp = &sc->sc_if; 879 int s; 880 881 if (status != USBD_NORMAL_COMPLETION) { 882 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 883 return; 884 885 printf("%s: could not transmit buffer: %s\n", 886 device_xname(sc->sc_dev), usbd_errstr(status)); 887 888 if (status == USBD_STALLED) 889 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 890 891 ifp->if_oerrors++; 892 return; 893 } 894 895 s = splnet(); 896 897 m_freem(data->m); 898 data->m = NULL; 899 ieee80211_free_node(data->ni); 900 data->ni = NULL; 901 902 sc->tx_queued--; 903 ifp->if_opackets++; 904 905 DPRINTFN(10, ("tx done\n")); 906 907 sc->sc_tx_timer = 0; 908 ifp->if_flags &= ~IFF_OACTIVE; 909 ural_start(ifp); 910 911 splx(s); 912 } 913 914 Static void 915 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 916 { 917 struct ural_rx_data *data = priv; 918 struct ural_softc *sc = data->sc; 919 struct ieee80211com *ic = &sc->sc_ic; 920 struct ifnet *ifp = &sc->sc_if; 921 struct ural_rx_desc *desc; 922 struct ieee80211_frame *wh; 923 struct ieee80211_node *ni; 924 struct mbuf *mnew, *m; 925 int s, len; 926 927 if (status != USBD_NORMAL_COMPLETION) { 928 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 929 return; 930 931 if (status == USBD_STALLED) 932 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 933 goto skip; 934 } 935 936 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 937 938 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 939 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 940 len)); 941 ifp->if_ierrors++; 942 goto skip; 943 } 944 945 /* rx descriptor is located at the end */ 946 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 947 948 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 949 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 950 /* 951 * This should not happen since we did not request to receive 952 * those frames when we filled RAL_TXRX_CSR2. 953 */ 954 DPRINTFN(5, ("PHY or CRC error\n")); 955 ifp->if_ierrors++; 956 goto skip; 957 } 958 959 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 960 if (mnew == NULL) { 961 ifp->if_ierrors++; 962 goto skip; 963 } 964 965 MCLGET(mnew, M_DONTWAIT); 966 if (!(mnew->m_flags & M_EXT)) { 967 ifp->if_ierrors++; 968 m_freem(mnew); 969 goto skip; 970 } 971 972 m = data->m; 973 data->m = mnew; 974 data->buf = mtod(data->m, uint8_t *); 975 976 /* finalize mbuf */ 977 m->m_pkthdr.rcvif = ifp; 978 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 979 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 980 981 s = splnet(); 982 983 if (sc->sc_drvbpf != NULL) { 984 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 985 986 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 987 tap->wr_rate = ural_rxrate(desc); 988 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 989 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 990 tap->wr_antenna = sc->rx_ant; 991 tap->wr_antsignal = desc->rssi; 992 993 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 994 } 995 996 wh = mtod(m, struct ieee80211_frame *); 997 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 998 999 /* send the frame to the 802.11 layer */ 1000 ieee80211_input(ic, m, ni, desc->rssi, 0); 1001 1002 /* node is no longer needed */ 1003 ieee80211_free_node(ni); 1004 1005 splx(s); 1006 1007 DPRINTFN(15, ("rx done\n")); 1008 1009 skip: /* setup a new transfer */ 1010 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1011 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1012 usbd_transfer(xfer); 1013 } 1014 1015 /* 1016 * Return the expected ack rate for a frame transmitted at rate `rate'. 1017 * XXX: this should depend on the destination node basic rate set. 1018 */ 1019 Static int 1020 ural_ack_rate(struct ieee80211com *ic, int rate) 1021 { 1022 switch (rate) { 1023 /* CCK rates */ 1024 case 2: 1025 return 2; 1026 case 4: 1027 case 11: 1028 case 22: 1029 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1030 1031 /* OFDM rates */ 1032 case 12: 1033 case 18: 1034 return 12; 1035 case 24: 1036 case 36: 1037 return 24; 1038 case 48: 1039 case 72: 1040 case 96: 1041 case 108: 1042 return 48; 1043 } 1044 1045 /* default to 1Mbps */ 1046 return 2; 1047 } 1048 1049 /* 1050 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1051 * The function automatically determines the operating mode depending on the 1052 * given rate. `flags' indicates whether short preamble is in use or not. 1053 */ 1054 Static uint16_t 1055 ural_txtime(int len, int rate, uint32_t flags) 1056 { 1057 uint16_t txtime; 1058 1059 if (RAL_RATE_IS_OFDM(rate)) { 1060 /* IEEE Std 802.11g-2003, pp. 37 */ 1061 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1062 txtime = 16 + 4 + 4 * txtime + 6; 1063 } else { 1064 /* IEEE Std 802.11b-1999, pp. 28 */ 1065 txtime = (16 * len + rate - 1) / rate; 1066 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1067 txtime += 72 + 24; 1068 else 1069 txtime += 144 + 48; 1070 } 1071 return txtime; 1072 } 1073 1074 Static uint8_t 1075 ural_plcp_signal(int rate) 1076 { 1077 switch (rate) { 1078 /* CCK rates (returned values are device-dependent) */ 1079 case 2: return 0x0; 1080 case 4: return 0x1; 1081 case 11: return 0x2; 1082 case 22: return 0x3; 1083 1084 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1085 case 12: return 0xb; 1086 case 18: return 0xf; 1087 case 24: return 0xa; 1088 case 36: return 0xe; 1089 case 48: return 0x9; 1090 case 72: return 0xd; 1091 case 96: return 0x8; 1092 case 108: return 0xc; 1093 1094 /* unsupported rates (should not get there) */ 1095 default: return 0xff; 1096 } 1097 } 1098 1099 Static void 1100 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1101 uint32_t flags, int len, int rate) 1102 { 1103 struct ieee80211com *ic = &sc->sc_ic; 1104 uint16_t plcp_length; 1105 int remainder; 1106 1107 desc->flags = htole32(flags); 1108 desc->flags |= htole32(RAL_TX_NEWSEQ); 1109 desc->flags |= htole32(len << 16); 1110 1111 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1112 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1113 1114 /* setup PLCP fields */ 1115 desc->plcp_signal = ural_plcp_signal(rate); 1116 desc->plcp_service = 4; 1117 1118 len += IEEE80211_CRC_LEN; 1119 if (RAL_RATE_IS_OFDM(rate)) { 1120 desc->flags |= htole32(RAL_TX_OFDM); 1121 1122 plcp_length = len & 0xfff; 1123 desc->plcp_length_hi = plcp_length >> 6; 1124 desc->plcp_length_lo = plcp_length & 0x3f; 1125 } else { 1126 plcp_length = (16 * len + rate - 1) / rate; 1127 if (rate == 22) { 1128 remainder = (16 * len) % 22; 1129 if (remainder != 0 && remainder < 7) 1130 desc->plcp_service |= RAL_PLCP_LENGEXT; 1131 } 1132 desc->plcp_length_hi = plcp_length >> 8; 1133 desc->plcp_length_lo = plcp_length & 0xff; 1134 1135 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1136 desc->plcp_signal |= 0x08; 1137 } 1138 1139 desc->iv = 0; 1140 desc->eiv = 0; 1141 } 1142 1143 #define RAL_TX_TIMEOUT 5000 1144 1145 Static int 1146 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1147 { 1148 struct ural_tx_desc *desc; 1149 struct usbd_xfer *xfer; 1150 uint8_t cmd = 0; 1151 usbd_status error; 1152 uint8_t *buf; 1153 int xferlen, rate; 1154 1155 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1156 1157 xfer = usbd_alloc_xfer(sc->sc_udev); 1158 if (xfer == NULL) 1159 return ENOMEM; 1160 1161 /* xfer length needs to be a multiple of two! */ 1162 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1163 1164 buf = usbd_alloc_buffer(xfer, xferlen); 1165 if (buf == NULL) { 1166 usbd_free_xfer(xfer); 1167 return ENOMEM; 1168 } 1169 1170 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1171 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1172 1173 error = usbd_sync_transfer(xfer); 1174 if (error != 0) { 1175 usbd_free_xfer(xfer); 1176 return error; 1177 } 1178 1179 desc = (struct ural_tx_desc *)buf; 1180 1181 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1182 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1183 m0->m_pkthdr.len, rate); 1184 1185 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1186 m0->m_pkthdr.len, rate, xferlen)); 1187 1188 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1189 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1190 1191 error = usbd_sync_transfer(xfer); 1192 usbd_free_xfer(xfer); 1193 1194 return error; 1195 } 1196 1197 Static int 1198 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1199 { 1200 struct ieee80211com *ic = &sc->sc_ic; 1201 struct ural_tx_desc *desc; 1202 struct ural_tx_data *data; 1203 struct ieee80211_frame *wh; 1204 struct ieee80211_key *k; 1205 uint32_t flags = 0; 1206 uint16_t dur; 1207 usbd_status error; 1208 int xferlen, rate; 1209 1210 data = &sc->tx_data[0]; 1211 desc = (struct ural_tx_desc *)data->buf; 1212 1213 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1214 1215 wh = mtod(m0, struct ieee80211_frame *); 1216 1217 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1218 k = ieee80211_crypto_encap(ic, ni, m0); 1219 if (k == NULL) { 1220 m_freem(m0); 1221 return ENOBUFS; 1222 } 1223 } 1224 1225 data->m = m0; 1226 data->ni = ni; 1227 1228 wh = mtod(m0, struct ieee80211_frame *); 1229 1230 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1231 flags |= RAL_TX_ACK; 1232 1233 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1234 *(uint16_t *)wh->i_dur = htole16(dur); 1235 1236 /* tell hardware to add timestamp for probe responses */ 1237 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1238 IEEE80211_FC0_TYPE_MGT && 1239 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1240 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1241 flags |= RAL_TX_TIMESTAMP; 1242 } 1243 1244 if (sc->sc_drvbpf != NULL) { 1245 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1246 1247 tap->wt_flags = 0; 1248 tap->wt_rate = rate; 1249 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1250 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1251 tap->wt_antenna = sc->tx_ant; 1252 1253 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1254 } 1255 1256 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1257 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1258 1259 /* align end on a 2-bytes boundary */ 1260 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1261 1262 /* 1263 * No space left in the last URB to store the extra 2 bytes, force 1264 * sending of another URB. 1265 */ 1266 if ((xferlen % 64) == 0) 1267 xferlen += 2; 1268 1269 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1270 m0->m_pkthdr.len, rate, xferlen)); 1271 1272 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1273 xferlen, USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, 1274 ural_txeof); 1275 1276 error = usbd_transfer(data->xfer); 1277 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1278 m_freem(m0); 1279 return error; 1280 } 1281 1282 sc->tx_queued++; 1283 1284 return 0; 1285 } 1286 1287 Static int 1288 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1289 { 1290 struct ieee80211com *ic = &sc->sc_ic; 1291 struct ural_tx_desc *desc; 1292 struct ural_tx_data *data; 1293 struct ieee80211_frame *wh; 1294 struct ieee80211_key *k; 1295 uint32_t flags = 0; 1296 uint16_t dur; 1297 usbd_status error; 1298 int xferlen, rate; 1299 1300 wh = mtod(m0, struct ieee80211_frame *); 1301 1302 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1303 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1304 else 1305 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1306 1307 rate &= IEEE80211_RATE_VAL; 1308 1309 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1310 k = ieee80211_crypto_encap(ic, ni, m0); 1311 if (k == NULL) { 1312 m_freem(m0); 1313 return ENOBUFS; 1314 } 1315 1316 /* packet header may have moved, reset our local pointer */ 1317 wh = mtod(m0, struct ieee80211_frame *); 1318 } 1319 1320 data = &sc->tx_data[0]; 1321 desc = (struct ural_tx_desc *)data->buf; 1322 1323 data->m = m0; 1324 data->ni = ni; 1325 1326 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1327 flags |= RAL_TX_ACK; 1328 flags |= RAL_TX_RETRY(7); 1329 1330 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1331 ic->ic_flags) + RAL_SIFS; 1332 *(uint16_t *)wh->i_dur = htole16(dur); 1333 } 1334 1335 if (sc->sc_drvbpf != NULL) { 1336 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1337 1338 tap->wt_flags = 0; 1339 tap->wt_rate = rate; 1340 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1341 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1342 tap->wt_antenna = sc->tx_ant; 1343 1344 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1345 } 1346 1347 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1348 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1349 1350 /* align end on a 2-bytes boundary */ 1351 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1352 1353 /* 1354 * No space left in the last URB to store the extra 2 bytes, force 1355 * sending of another URB. 1356 */ 1357 if ((xferlen % 64) == 0) 1358 xferlen += 2; 1359 1360 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1361 m0->m_pkthdr.len, rate, xferlen)); 1362 1363 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1364 xferlen, USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, 1365 ural_txeof); 1366 1367 error = usbd_transfer(data->xfer); 1368 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1369 return error; 1370 1371 sc->tx_queued++; 1372 1373 return 0; 1374 } 1375 1376 Static void 1377 ural_start(struct ifnet *ifp) 1378 { 1379 struct ural_softc *sc = ifp->if_softc; 1380 struct ieee80211com *ic = &sc->sc_ic; 1381 struct mbuf *m0; 1382 struct ether_header *eh; 1383 struct ieee80211_node *ni; 1384 1385 for (;;) { 1386 IF_POLL(&ic->ic_mgtq, m0); 1387 if (m0 != NULL) { 1388 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1389 ifp->if_flags |= IFF_OACTIVE; 1390 break; 1391 } 1392 IF_DEQUEUE(&ic->ic_mgtq, m0); 1393 1394 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1395 m0->m_pkthdr.rcvif = NULL; 1396 bpf_mtap3(ic->ic_rawbpf, m0); 1397 if (ural_tx_mgt(sc, m0, ni) != 0) 1398 break; 1399 1400 } else { 1401 if (ic->ic_state != IEEE80211_S_RUN) 1402 break; 1403 IFQ_DEQUEUE(&ifp->if_snd, m0); 1404 if (m0 == NULL) 1405 break; 1406 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1407 IF_PREPEND(&ifp->if_snd, m0); 1408 ifp->if_flags |= IFF_OACTIVE; 1409 break; 1410 } 1411 1412 if (m0->m_len < sizeof (struct ether_header) && 1413 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1414 continue; 1415 1416 eh = mtod(m0, struct ether_header *); 1417 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1418 if (ni == NULL) { 1419 m_freem(m0); 1420 continue; 1421 } 1422 bpf_mtap(ifp, m0); 1423 m0 = ieee80211_encap(ic, m0, ni); 1424 if (m0 == NULL) { 1425 ieee80211_free_node(ni); 1426 continue; 1427 } 1428 bpf_mtap3(ic->ic_rawbpf, m0); 1429 if (ural_tx_data(sc, m0, ni) != 0) { 1430 ieee80211_free_node(ni); 1431 ifp->if_oerrors++; 1432 break; 1433 } 1434 } 1435 1436 sc->sc_tx_timer = 5; 1437 ifp->if_timer = 1; 1438 } 1439 } 1440 1441 Static void 1442 ural_watchdog(struct ifnet *ifp) 1443 { 1444 struct ural_softc *sc = ifp->if_softc; 1445 struct ieee80211com *ic = &sc->sc_ic; 1446 1447 ifp->if_timer = 0; 1448 1449 if (sc->sc_tx_timer > 0) { 1450 if (--sc->sc_tx_timer == 0) { 1451 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1452 /*ural_init(sc); XXX needs a process context! */ 1453 ifp->if_oerrors++; 1454 return; 1455 } 1456 ifp->if_timer = 1; 1457 } 1458 1459 ieee80211_watchdog(ic); 1460 } 1461 1462 /* 1463 * This function allows for fast channel switching in monitor mode (used by 1464 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1465 * generate a new beacon frame. 1466 */ 1467 Static int 1468 ural_reset(struct ifnet *ifp) 1469 { 1470 struct ural_softc *sc = ifp->if_softc; 1471 struct ieee80211com *ic = &sc->sc_ic; 1472 1473 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1474 return ENETRESET; 1475 1476 ural_set_chan(sc, ic->ic_curchan); 1477 1478 return 0; 1479 } 1480 1481 Static int 1482 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1483 { 1484 #define IS_RUNNING(ifp) \ 1485 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1486 1487 struct ural_softc *sc = ifp->if_softc; 1488 struct ieee80211com *ic = &sc->sc_ic; 1489 int s, error = 0; 1490 1491 s = splnet(); 1492 1493 switch (cmd) { 1494 case SIOCSIFFLAGS: 1495 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1496 break; 1497 /* XXX re-use ether_ioctl() */ 1498 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1499 case IFF_UP|IFF_RUNNING: 1500 ural_update_promisc(sc); 1501 break; 1502 case IFF_UP: 1503 ural_init(ifp); 1504 break; 1505 case IFF_RUNNING: 1506 ural_stop(ifp, 1); 1507 break; 1508 case 0: 1509 break; 1510 } 1511 break; 1512 1513 case SIOCADDMULTI: 1514 case SIOCDELMULTI: 1515 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1516 error = 0; 1517 } 1518 break; 1519 1520 default: 1521 error = ieee80211_ioctl(ic, cmd, data); 1522 } 1523 1524 if (error == ENETRESET) { 1525 if (IS_RUNNING(ifp) && 1526 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1527 ural_init(ifp); 1528 error = 0; 1529 } 1530 1531 splx(s); 1532 1533 return error; 1534 #undef IS_RUNNING 1535 } 1536 1537 Static void 1538 ural_set_testmode(struct ural_softc *sc) 1539 { 1540 usb_device_request_t req; 1541 usbd_status error; 1542 1543 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1544 req.bRequest = RAL_VENDOR_REQUEST; 1545 USETW(req.wValue, 4); 1546 USETW(req.wIndex, 1); 1547 USETW(req.wLength, 0); 1548 1549 error = usbd_do_request(sc->sc_udev, &req, NULL); 1550 if (error != 0) { 1551 printf("%s: could not set test mode: %s\n", 1552 device_xname(sc->sc_dev), usbd_errstr(error)); 1553 } 1554 } 1555 1556 Static void 1557 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1558 { 1559 usb_device_request_t req; 1560 usbd_status error; 1561 1562 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1563 req.bRequest = RAL_READ_EEPROM; 1564 USETW(req.wValue, 0); 1565 USETW(req.wIndex, addr); 1566 USETW(req.wLength, len); 1567 1568 error = usbd_do_request(sc->sc_udev, &req, buf); 1569 if (error != 0) { 1570 printf("%s: could not read EEPROM: %s\n", 1571 device_xname(sc->sc_dev), usbd_errstr(error)); 1572 } 1573 } 1574 1575 Static uint16_t 1576 ural_read(struct ural_softc *sc, uint16_t reg) 1577 { 1578 usb_device_request_t req; 1579 usbd_status error; 1580 uint16_t val; 1581 1582 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1583 req.bRequest = RAL_READ_MAC; 1584 USETW(req.wValue, 0); 1585 USETW(req.wIndex, reg); 1586 USETW(req.wLength, sizeof (uint16_t)); 1587 1588 error = usbd_do_request(sc->sc_udev, &req, &val); 1589 if (error != 0) { 1590 printf("%s: could not read MAC register: %s\n", 1591 device_xname(sc->sc_dev), usbd_errstr(error)); 1592 return 0; 1593 } 1594 1595 return le16toh(val); 1596 } 1597 1598 Static void 1599 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1600 { 1601 usb_device_request_t req; 1602 usbd_status error; 1603 1604 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1605 req.bRequest = RAL_READ_MULTI_MAC; 1606 USETW(req.wValue, 0); 1607 USETW(req.wIndex, reg); 1608 USETW(req.wLength, len); 1609 1610 error = usbd_do_request(sc->sc_udev, &req, buf); 1611 if (error != 0) { 1612 printf("%s: could not read MAC register: %s\n", 1613 device_xname(sc->sc_dev), usbd_errstr(error)); 1614 } 1615 } 1616 1617 Static void 1618 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1619 { 1620 usb_device_request_t req; 1621 usbd_status error; 1622 1623 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1624 req.bRequest = RAL_WRITE_MAC; 1625 USETW(req.wValue, val); 1626 USETW(req.wIndex, reg); 1627 USETW(req.wLength, 0); 1628 1629 error = usbd_do_request(sc->sc_udev, &req, NULL); 1630 if (error != 0) { 1631 printf("%s: could not write MAC register: %s\n", 1632 device_xname(sc->sc_dev), usbd_errstr(error)); 1633 } 1634 } 1635 1636 Static void 1637 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1638 { 1639 usb_device_request_t req; 1640 usbd_status error; 1641 1642 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1643 req.bRequest = RAL_WRITE_MULTI_MAC; 1644 USETW(req.wValue, 0); 1645 USETW(req.wIndex, reg); 1646 USETW(req.wLength, len); 1647 1648 error = usbd_do_request(sc->sc_udev, &req, buf); 1649 if (error != 0) { 1650 printf("%s: could not write MAC register: %s\n", 1651 device_xname(sc->sc_dev), usbd_errstr(error)); 1652 } 1653 } 1654 1655 Static void 1656 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1657 { 1658 uint16_t tmp; 1659 int ntries; 1660 1661 for (ntries = 0; ntries < 5; ntries++) { 1662 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1663 break; 1664 } 1665 if (ntries == 5) { 1666 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1667 return; 1668 } 1669 1670 tmp = reg << 8 | val; 1671 ural_write(sc, RAL_PHY_CSR7, tmp); 1672 } 1673 1674 Static uint8_t 1675 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1676 { 1677 uint16_t val; 1678 int ntries; 1679 1680 val = RAL_BBP_WRITE | reg << 8; 1681 ural_write(sc, RAL_PHY_CSR7, val); 1682 1683 for (ntries = 0; ntries < 5; ntries++) { 1684 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1685 break; 1686 } 1687 if (ntries == 5) { 1688 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1689 return 0; 1690 } 1691 1692 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1693 } 1694 1695 Static void 1696 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1697 { 1698 uint32_t tmp; 1699 int ntries; 1700 1701 for (ntries = 0; ntries < 5; ntries++) { 1702 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1703 break; 1704 } 1705 if (ntries == 5) { 1706 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1707 return; 1708 } 1709 1710 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1711 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1712 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1713 1714 /* remember last written value in sc */ 1715 sc->rf_regs[reg] = val; 1716 1717 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1718 } 1719 1720 Static void 1721 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1722 { 1723 struct ieee80211com *ic = &sc->sc_ic; 1724 uint8_t power, tmp; 1725 u_int i, chan; 1726 1727 chan = ieee80211_chan2ieee(ic, c); 1728 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1729 return; 1730 1731 if (IEEE80211_IS_CHAN_2GHZ(c)) 1732 power = min(sc->txpow[chan - 1], 31); 1733 else 1734 power = 31; 1735 1736 /* adjust txpower using ifconfig settings */ 1737 power -= (100 - ic->ic_txpowlimit) / 8; 1738 1739 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1740 1741 switch (sc->rf_rev) { 1742 case RAL_RF_2522: 1743 ural_rf_write(sc, RAL_RF1, 0x00814); 1744 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1745 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1746 break; 1747 1748 case RAL_RF_2523: 1749 ural_rf_write(sc, RAL_RF1, 0x08804); 1750 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1751 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1752 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1753 break; 1754 1755 case RAL_RF_2524: 1756 ural_rf_write(sc, RAL_RF1, 0x0c808); 1757 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1758 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1759 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1760 break; 1761 1762 case RAL_RF_2525: 1763 ural_rf_write(sc, RAL_RF1, 0x08808); 1764 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1765 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1766 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1767 1768 ural_rf_write(sc, RAL_RF1, 0x08808); 1769 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1770 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1771 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1772 break; 1773 1774 case RAL_RF_2525E: 1775 ural_rf_write(sc, RAL_RF1, 0x08808); 1776 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1777 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1778 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1779 break; 1780 1781 case RAL_RF_2526: 1782 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1783 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1784 ural_rf_write(sc, RAL_RF1, 0x08804); 1785 1786 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1787 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1788 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1789 break; 1790 1791 /* dual-band RF */ 1792 case RAL_RF_5222: 1793 for (i = 0; ural_rf5222[i].chan != chan; i++); 1794 1795 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1796 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1797 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1798 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1799 break; 1800 } 1801 1802 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1803 ic->ic_state != IEEE80211_S_SCAN) { 1804 /* set Japan filter bit for channel 14 */ 1805 tmp = ural_bbp_read(sc, 70); 1806 1807 tmp &= ~RAL_JAPAN_FILTER; 1808 if (chan == 14) 1809 tmp |= RAL_JAPAN_FILTER; 1810 1811 ural_bbp_write(sc, 70, tmp); 1812 1813 /* clear CRC errors */ 1814 ural_read(sc, RAL_STA_CSR0); 1815 1816 DELAY(10000); 1817 ural_disable_rf_tune(sc); 1818 } 1819 } 1820 1821 /* 1822 * Disable RF auto-tuning. 1823 */ 1824 Static void 1825 ural_disable_rf_tune(struct ural_softc *sc) 1826 { 1827 uint32_t tmp; 1828 1829 if (sc->rf_rev != RAL_RF_2523) { 1830 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1831 ural_rf_write(sc, RAL_RF1, tmp); 1832 } 1833 1834 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1835 ural_rf_write(sc, RAL_RF3, tmp); 1836 1837 DPRINTFN(2, ("disabling RF autotune\n")); 1838 } 1839 1840 /* 1841 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1842 * synchronization. 1843 */ 1844 Static void 1845 ural_enable_tsf_sync(struct ural_softc *sc) 1846 { 1847 struct ieee80211com *ic = &sc->sc_ic; 1848 uint16_t logcwmin, preload, tmp; 1849 1850 /* first, disable TSF synchronization */ 1851 ural_write(sc, RAL_TXRX_CSR19, 0); 1852 1853 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1854 ural_write(sc, RAL_TXRX_CSR18, tmp); 1855 1856 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1857 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1858 tmp = logcwmin << 12 | preload; 1859 ural_write(sc, RAL_TXRX_CSR20, tmp); 1860 1861 /* finally, enable TSF synchronization */ 1862 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1863 if (ic->ic_opmode == IEEE80211_M_STA) 1864 tmp |= RAL_ENABLE_TSF_SYNC(1); 1865 else 1866 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1867 ural_write(sc, RAL_TXRX_CSR19, tmp); 1868 1869 DPRINTF(("enabling TSF synchronization\n")); 1870 } 1871 1872 Static void 1873 ural_update_slot(struct ifnet *ifp) 1874 { 1875 struct ural_softc *sc = ifp->if_softc; 1876 struct ieee80211com *ic = &sc->sc_ic; 1877 uint16_t slottime, sifs, eifs; 1878 1879 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1880 1881 /* 1882 * These settings may sound a bit inconsistent but this is what the 1883 * reference driver does. 1884 */ 1885 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1886 sifs = 16 - RAL_RXTX_TURNAROUND; 1887 eifs = 364; 1888 } else { 1889 sifs = 10 - RAL_RXTX_TURNAROUND; 1890 eifs = 64; 1891 } 1892 1893 ural_write(sc, RAL_MAC_CSR10, slottime); 1894 ural_write(sc, RAL_MAC_CSR11, sifs); 1895 ural_write(sc, RAL_MAC_CSR12, eifs); 1896 } 1897 1898 Static void 1899 ural_set_txpreamble(struct ural_softc *sc) 1900 { 1901 uint16_t tmp; 1902 1903 tmp = ural_read(sc, RAL_TXRX_CSR10); 1904 1905 tmp &= ~RAL_SHORT_PREAMBLE; 1906 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1907 tmp |= RAL_SHORT_PREAMBLE; 1908 1909 ural_write(sc, RAL_TXRX_CSR10, tmp); 1910 } 1911 1912 Static void 1913 ural_set_basicrates(struct ural_softc *sc) 1914 { 1915 struct ieee80211com *ic = &sc->sc_ic; 1916 1917 /* update basic rate set */ 1918 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1919 /* 11b basic rates: 1, 2Mbps */ 1920 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1921 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1922 /* 11a basic rates: 6, 12, 24Mbps */ 1923 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1924 } else { 1925 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1926 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1927 } 1928 } 1929 1930 Static void 1931 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1932 { 1933 uint16_t tmp; 1934 1935 tmp = bssid[0] | bssid[1] << 8; 1936 ural_write(sc, RAL_MAC_CSR5, tmp); 1937 1938 tmp = bssid[2] | bssid[3] << 8; 1939 ural_write(sc, RAL_MAC_CSR6, tmp); 1940 1941 tmp = bssid[4] | bssid[5] << 8; 1942 ural_write(sc, RAL_MAC_CSR7, tmp); 1943 1944 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1945 } 1946 1947 Static void 1948 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1949 { 1950 uint16_t tmp; 1951 1952 tmp = addr[0] | addr[1] << 8; 1953 ural_write(sc, RAL_MAC_CSR2, tmp); 1954 1955 tmp = addr[2] | addr[3] << 8; 1956 ural_write(sc, RAL_MAC_CSR3, tmp); 1957 1958 tmp = addr[4] | addr[5] << 8; 1959 ural_write(sc, RAL_MAC_CSR4, tmp); 1960 1961 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1962 } 1963 1964 Static void 1965 ural_update_promisc(struct ural_softc *sc) 1966 { 1967 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1968 uint32_t tmp; 1969 1970 tmp = ural_read(sc, RAL_TXRX_CSR2); 1971 1972 tmp &= ~RAL_DROP_NOT_TO_ME; 1973 if (!(ifp->if_flags & IFF_PROMISC)) 1974 tmp |= RAL_DROP_NOT_TO_ME; 1975 1976 ural_write(sc, RAL_TXRX_CSR2, tmp); 1977 1978 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1979 "entering" : "leaving")); 1980 } 1981 1982 Static const char * 1983 ural_get_rf(int rev) 1984 { 1985 switch (rev) { 1986 case RAL_RF_2522: return "RT2522"; 1987 case RAL_RF_2523: return "RT2523"; 1988 case RAL_RF_2524: return "RT2524"; 1989 case RAL_RF_2525: return "RT2525"; 1990 case RAL_RF_2525E: return "RT2525e"; 1991 case RAL_RF_2526: return "RT2526"; 1992 case RAL_RF_5222: return "RT5222"; 1993 default: return "unknown"; 1994 } 1995 } 1996 1997 Static void 1998 ural_read_eeprom(struct ural_softc *sc) 1999 { 2000 struct ieee80211com *ic = &sc->sc_ic; 2001 uint16_t val; 2002 2003 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 2004 val = le16toh(val); 2005 sc->rf_rev = (val >> 11) & 0x7; 2006 sc->hw_radio = (val >> 10) & 0x1; 2007 sc->led_mode = (val >> 6) & 0x7; 2008 sc->rx_ant = (val >> 4) & 0x3; 2009 sc->tx_ant = (val >> 2) & 0x3; 2010 sc->nb_ant = val & 0x3; 2011 2012 /* read MAC address */ 2013 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2014 2015 /* read default values for BBP registers */ 2016 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2017 2018 /* read Tx power for all b/g channels */ 2019 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2020 } 2021 2022 Static int 2023 ural_bbp_init(struct ural_softc *sc) 2024 { 2025 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2026 int i, ntries; 2027 2028 /* wait for BBP to be ready */ 2029 for (ntries = 0; ntries < 100; ntries++) { 2030 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2031 break; 2032 DELAY(1000); 2033 } 2034 if (ntries == 100) { 2035 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2036 return EIO; 2037 } 2038 2039 /* initialize BBP registers to default values */ 2040 for (i = 0; i < N(ural_def_bbp); i++) 2041 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2042 2043 #if 0 2044 /* initialize BBP registers to values stored in EEPROM */ 2045 for (i = 0; i < 16; i++) { 2046 if (sc->bbp_prom[i].reg == 0xff) 2047 continue; 2048 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2049 } 2050 #endif 2051 2052 return 0; 2053 #undef N 2054 } 2055 2056 Static void 2057 ural_set_txantenna(struct ural_softc *sc, int antenna) 2058 { 2059 uint16_t tmp; 2060 uint8_t tx; 2061 2062 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2063 if (antenna == 1) 2064 tx |= RAL_BBP_ANTA; 2065 else if (antenna == 2) 2066 tx |= RAL_BBP_ANTB; 2067 else 2068 tx |= RAL_BBP_DIVERSITY; 2069 2070 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2071 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2072 sc->rf_rev == RAL_RF_5222) 2073 tx |= RAL_BBP_FLIPIQ; 2074 2075 ural_bbp_write(sc, RAL_BBP_TX, tx); 2076 2077 /* update values in PHY_CSR5 and PHY_CSR6 */ 2078 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2079 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2080 2081 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2082 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2083 } 2084 2085 Static void 2086 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2087 { 2088 uint8_t rx; 2089 2090 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2091 if (antenna == 1) 2092 rx |= RAL_BBP_ANTA; 2093 else if (antenna == 2) 2094 rx |= RAL_BBP_ANTB; 2095 else 2096 rx |= RAL_BBP_DIVERSITY; 2097 2098 /* need to force no I/Q flip for RF 2525e and 2526 */ 2099 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2100 rx &= ~RAL_BBP_FLIPIQ; 2101 2102 ural_bbp_write(sc, RAL_BBP_RX, rx); 2103 } 2104 2105 Static int 2106 ural_init(struct ifnet *ifp) 2107 { 2108 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2109 struct ural_softc *sc = ifp->if_softc; 2110 struct ieee80211com *ic = &sc->sc_ic; 2111 struct ieee80211_key *wk; 2112 struct ural_rx_data *data; 2113 uint16_t tmp; 2114 usbd_status error; 2115 int i, ntries; 2116 2117 ural_set_testmode(sc); 2118 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2119 2120 ural_stop(ifp, 0); 2121 2122 /* initialize MAC registers to default values */ 2123 for (i = 0; i < N(ural_def_mac); i++) 2124 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2125 2126 /* wait for BBP and RF to wake up (this can take a long time!) */ 2127 for (ntries = 0; ntries < 100; ntries++) { 2128 tmp = ural_read(sc, RAL_MAC_CSR17); 2129 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2130 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2131 break; 2132 DELAY(1000); 2133 } 2134 if (ntries == 100) { 2135 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2136 device_xname(sc->sc_dev)); 2137 error = EIO; 2138 goto fail; 2139 } 2140 2141 /* we're ready! */ 2142 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2143 2144 /* set basic rate set (will be updated later) */ 2145 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2146 2147 error = ural_bbp_init(sc); 2148 if (error != 0) 2149 goto fail; 2150 2151 /* set default BSS channel */ 2152 ural_set_chan(sc, ic->ic_curchan); 2153 2154 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2155 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2156 2157 ural_set_txantenna(sc, sc->tx_ant); 2158 ural_set_rxantenna(sc, sc->rx_ant); 2159 2160 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2161 ural_set_macaddr(sc, ic->ic_myaddr); 2162 2163 /* 2164 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2165 */ 2166 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2167 wk = &ic->ic_crypto.cs_nw_keys[i]; 2168 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2169 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2170 } 2171 2172 /* 2173 * Allocate xfer for AMRR statistics requests. 2174 */ 2175 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2176 if (sc->amrr_xfer == NULL) { 2177 printf("%s: could not allocate AMRR xfer\n", 2178 device_xname(sc->sc_dev)); 2179 goto fail; 2180 } 2181 2182 /* 2183 * Open Tx and Rx USB bulk pipes. 2184 */ 2185 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2186 &sc->sc_tx_pipeh); 2187 if (error != 0) { 2188 printf("%s: could not open Tx pipe: %s\n", 2189 device_xname(sc->sc_dev), usbd_errstr(error)); 2190 goto fail; 2191 } 2192 2193 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2194 &sc->sc_rx_pipeh); 2195 if (error != 0) { 2196 printf("%s: could not open Rx pipe: %s\n", 2197 device_xname(sc->sc_dev), usbd_errstr(error)); 2198 goto fail; 2199 } 2200 2201 /* 2202 * Allocate Tx and Rx xfer queues. 2203 */ 2204 error = ural_alloc_tx_list(sc); 2205 if (error != 0) { 2206 printf("%s: could not allocate Tx list\n", 2207 device_xname(sc->sc_dev)); 2208 goto fail; 2209 } 2210 2211 error = ural_alloc_rx_list(sc); 2212 if (error != 0) { 2213 printf("%s: could not allocate Rx list\n", 2214 device_xname(sc->sc_dev)); 2215 goto fail; 2216 } 2217 2218 /* 2219 * Start up the receive pipe. 2220 */ 2221 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2222 data = &sc->rx_data[i]; 2223 2224 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2225 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2226 usbd_transfer(data->xfer); 2227 } 2228 2229 /* kick Rx */ 2230 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2231 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2232 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2233 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2234 tmp |= RAL_DROP_TODS; 2235 if (!(ifp->if_flags & IFF_PROMISC)) 2236 tmp |= RAL_DROP_NOT_TO_ME; 2237 } 2238 ural_write(sc, RAL_TXRX_CSR2, tmp); 2239 2240 ifp->if_flags &= ~IFF_OACTIVE; 2241 ifp->if_flags |= IFF_RUNNING; 2242 2243 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2244 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2245 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2246 } else 2247 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2248 2249 return 0; 2250 2251 fail: ural_stop(ifp, 1); 2252 return error; 2253 #undef N 2254 } 2255 2256 Static void 2257 ural_stop(struct ifnet *ifp, int disable) 2258 { 2259 struct ural_softc *sc = ifp->if_softc; 2260 struct ieee80211com *ic = &sc->sc_ic; 2261 2262 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2263 2264 sc->sc_tx_timer = 0; 2265 ifp->if_timer = 0; 2266 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2267 2268 /* disable Rx */ 2269 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2270 2271 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2272 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2273 ural_write(sc, RAL_MAC_CSR1, 0); 2274 2275 if (sc->amrr_xfer != NULL) { 2276 usbd_free_xfer(sc->amrr_xfer); 2277 sc->amrr_xfer = NULL; 2278 } 2279 2280 if (sc->sc_rx_pipeh != NULL) { 2281 usbd_abort_pipe(sc->sc_rx_pipeh); 2282 usbd_close_pipe(sc->sc_rx_pipeh); 2283 sc->sc_rx_pipeh = NULL; 2284 } 2285 2286 if (sc->sc_tx_pipeh != NULL) { 2287 usbd_abort_pipe(sc->sc_tx_pipeh); 2288 usbd_close_pipe(sc->sc_tx_pipeh); 2289 sc->sc_tx_pipeh = NULL; 2290 } 2291 2292 ural_free_rx_list(sc); 2293 ural_free_tx_list(sc); 2294 } 2295 2296 int 2297 ural_activate(device_t self, enum devact act) 2298 { 2299 struct ural_softc *sc = device_private(self); 2300 2301 switch (act) { 2302 case DVACT_DEACTIVATE: 2303 if_deactivate(&sc->sc_if); 2304 return 0; 2305 default: 2306 return EOPNOTSUPP; 2307 } 2308 } 2309 2310 Static void 2311 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2312 { 2313 int i; 2314 2315 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2316 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2317 2318 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2319 2320 /* set rate to some reasonable initial value */ 2321 for (i = ni->ni_rates.rs_nrates - 1; 2322 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2323 i--); 2324 ni->ni_txrate = i; 2325 2326 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2327 } 2328 2329 Static void 2330 ural_amrr_timeout(void *arg) 2331 { 2332 struct ural_softc *sc = (struct ural_softc *)arg; 2333 usb_device_request_t req; 2334 int s; 2335 2336 s = splusb(); 2337 2338 /* 2339 * Asynchronously read statistic registers (cleared by read). 2340 */ 2341 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2342 req.bRequest = RAL_READ_MULTI_MAC; 2343 USETW(req.wValue, 0); 2344 USETW(req.wIndex, RAL_STA_CSR0); 2345 USETW(req.wLength, sizeof sc->sta); 2346 2347 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2348 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2349 ural_amrr_update); 2350 (void)usbd_transfer(sc->amrr_xfer); 2351 2352 splx(s); 2353 } 2354 2355 Static void 2356 ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2357 usbd_status status) 2358 { 2359 struct ural_softc *sc = (struct ural_softc *)priv; 2360 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2361 2362 if (status != USBD_NORMAL_COMPLETION) { 2363 printf("%s: could not retrieve Tx statistics - " 2364 "cancelling automatic rate control\n", 2365 device_xname(sc->sc_dev)); 2366 return; 2367 } 2368 2369 /* count TX retry-fail as Tx errors */ 2370 ifp->if_oerrors += sc->sta[9]; 2371 2372 sc->amn.amn_retrycnt = 2373 sc->sta[7] + /* TX one-retry ok count */ 2374 sc->sta[8] + /* TX more-retry ok count */ 2375 sc->sta[9]; /* TX retry-fail count */ 2376 2377 sc->amn.amn_txcnt = 2378 sc->amn.amn_retrycnt + 2379 sc->sta[6]; /* TX no-retry ok count */ 2380 2381 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2382 2383 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2384 } 2385
Indexes created Fri Oct 03 02:09:57 GMT 2025