if_ural.c revision 1.44.14.7
1 /* $NetBSD: if_ural.c,v 1.44.14.7 2015/10/06 21:32:15 skrll Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.44.14.7 2015/10/06 21:32:15 skrll Exp $"); 28 29 #include <sys/param.h> 30 #include <sys/sockio.h> 31 #include <sys/sysctl.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/conf.h> 37 #include <sys/device.h> 38 39 #include <sys/bus.h> 40 #include <machine/endian.h> 41 #include <sys/intr.h> 42 43 #include <net/bpf.h> 44 #include <net/if.h> 45 #include <net/if_arp.h> 46 #include <net/if_dl.h> 47 #include <net/if_ether.h> 48 #include <net/if_media.h> 49 #include <net/if_types.h> 50 51 #include <netinet/in.h> 52 #include <netinet/in_systm.h> 53 #include <netinet/in_var.h> 54 #include <netinet/ip.h> 55 56 #include <net80211/ieee80211_netbsd.h> 57 #include <net80211/ieee80211_var.h> 58 #include <net80211/ieee80211_amrr.h> 59 #include <net80211/ieee80211_radiotap.h> 60 61 #include <dev/usb/usb.h> 62 #include <dev/usb/usbdi.h> 63 #include <dev/usb/usbdi_util.h> 64 #include <dev/usb/usbdevs.h> 65 66 #include <dev/usb/if_uralreg.h> 67 #include <dev/usb/if_uralvar.h> 68 69 #ifdef URAL_DEBUG 70 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 71 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 72 int ural_debug = 0; 73 #else 74 #define DPRINTF(x) 75 #define DPRINTFN(n, x) 76 #endif 77 78 /* various supported device vendors/products */ 79 static const struct usb_devno ural_devs[] = { 80 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 81 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 82 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 83 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 84 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 85 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 86 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 87 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 88 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 89 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 90 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 91 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 92 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 93 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 94 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 95 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 96 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 97 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 98 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 99 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 100 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 101 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 102 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 103 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 104 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 105 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 106 }; 107 108 Static int ural_alloc_tx_list(struct ural_softc *); 109 Static void ural_free_tx_list(struct ural_softc *); 110 Static int ural_alloc_rx_list(struct ural_softc *); 111 Static void ural_free_rx_list(struct ural_softc *); 112 Static int ural_media_change(struct ifnet *); 113 Static void ural_next_scan(void *); 114 Static void ural_task(void *); 115 Static int ural_newstate(struct ieee80211com *, 116 enum ieee80211_state, int); 117 Static int ural_rxrate(struct ural_rx_desc *); 118 Static void ural_txeof(struct usbd_xfer *, void *, 119 usbd_status); 120 Static void ural_rxeof(struct usbd_xfer *, void *, 121 usbd_status); 122 Static int ural_ack_rate(struct ieee80211com *, int); 123 Static uint16_t ural_txtime(int, int, uint32_t); 124 Static uint8_t ural_plcp_signal(int); 125 Static void ural_setup_tx_desc(struct ural_softc *, 126 struct ural_tx_desc *, uint32_t, int, int); 127 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 128 struct ieee80211_node *); 129 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 130 struct ieee80211_node *); 131 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 Static void ural_start(struct ifnet *); 134 Static void ural_watchdog(struct ifnet *); 135 Static int ural_reset(struct ifnet *); 136 Static int ural_ioctl(struct ifnet *, u_long, void *); 137 Static void ural_set_testmode(struct ural_softc *); 138 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 139 int); 140 Static uint16_t ural_read(struct ural_softc *, uint16_t); 141 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 142 int); 143 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 144 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 145 int); 146 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 147 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 148 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 149 Static void ural_set_chan(struct ural_softc *, 150 struct ieee80211_channel *); 151 Static void ural_disable_rf_tune(struct ural_softc *); 152 Static void ural_enable_tsf_sync(struct ural_softc *); 153 Static void ural_update_slot(struct ifnet *); 154 Static void ural_set_txpreamble(struct ural_softc *); 155 Static void ural_set_basicrates(struct ural_softc *); 156 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 157 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 158 Static void ural_update_promisc(struct ural_softc *); 159 Static const char *ural_get_rf(int); 160 Static void ural_read_eeprom(struct ural_softc *); 161 Static int ural_bbp_init(struct ural_softc *); 162 Static void ural_set_txantenna(struct ural_softc *, int); 163 Static void ural_set_rxantenna(struct ural_softc *, int); 164 Static int ural_init(struct ifnet *); 165 Static void ural_stop(struct ifnet *, int); 166 Static void ural_amrr_start(struct ural_softc *, 167 struct ieee80211_node *); 168 Static void ural_amrr_timeout(void *); 169 Static void ural_amrr_update(struct usbd_xfer *, void *, 170 usbd_status status); 171 172 /* 173 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 174 */ 175 static const struct ieee80211_rateset ural_rateset_11a = 176 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 177 178 static const struct ieee80211_rateset ural_rateset_11b = 179 { 4, { 2, 4, 11, 22 } }; 180 181 static const struct ieee80211_rateset ural_rateset_11g = 182 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 183 184 /* 185 * Default values for MAC registers; values taken from the reference driver. 186 */ 187 static const struct { 188 uint16_t reg; 189 uint16_t val; 190 } ural_def_mac[] = { 191 { RAL_TXRX_CSR5, 0x8c8d }, 192 { RAL_TXRX_CSR6, 0x8b8a }, 193 { RAL_TXRX_CSR7, 0x8687 }, 194 { RAL_TXRX_CSR8, 0x0085 }, 195 { RAL_MAC_CSR13, 0x1111 }, 196 { RAL_MAC_CSR14, 0x1e11 }, 197 { RAL_TXRX_CSR21, 0xe78f }, 198 { RAL_MAC_CSR9, 0xff1d }, 199 { RAL_MAC_CSR11, 0x0002 }, 200 { RAL_MAC_CSR22, 0x0053 }, 201 { RAL_MAC_CSR15, 0x0000 }, 202 { RAL_MAC_CSR8, 0x0780 }, 203 { RAL_TXRX_CSR19, 0x0000 }, 204 { RAL_TXRX_CSR18, 0x005a }, 205 { RAL_PHY_CSR2, 0x0000 }, 206 { RAL_TXRX_CSR0, 0x1ec0 }, 207 { RAL_PHY_CSR4, 0x000f } 208 }; 209 210 /* 211 * Default values for BBP registers; values taken from the reference driver. 212 */ 213 static const struct { 214 uint8_t reg; 215 uint8_t val; 216 } ural_def_bbp[] = { 217 { 3, 0x02 }, 218 { 4, 0x19 }, 219 { 14, 0x1c }, 220 { 15, 0x30 }, 221 { 16, 0xac }, 222 { 17, 0x48 }, 223 { 18, 0x18 }, 224 { 19, 0xff }, 225 { 20, 0x1e }, 226 { 21, 0x08 }, 227 { 22, 0x08 }, 228 { 23, 0x08 }, 229 { 24, 0x80 }, 230 { 25, 0x50 }, 231 { 26, 0x08 }, 232 { 27, 0x23 }, 233 { 30, 0x10 }, 234 { 31, 0x2b }, 235 { 32, 0xb9 }, 236 { 34, 0x12 }, 237 { 35, 0x50 }, 238 { 39, 0xc4 }, 239 { 40, 0x02 }, 240 { 41, 0x60 }, 241 { 53, 0x10 }, 242 { 54, 0x18 }, 243 { 56, 0x08 }, 244 { 57, 0x10 }, 245 { 58, 0x08 }, 246 { 61, 0x60 }, 247 { 62, 0x10 }, 248 { 75, 0xff } 249 }; 250 251 /* 252 * Default values for RF register R2 indexed by channel numbers. 253 */ 254 static const uint32_t ural_rf2522_r2[] = { 255 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 256 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 257 }; 258 259 static const uint32_t ural_rf2523_r2[] = { 260 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 261 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 262 }; 263 264 static const uint32_t ural_rf2524_r2[] = { 265 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 266 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 267 }; 268 269 static const uint32_t ural_rf2525_r2[] = { 270 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 271 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 272 }; 273 274 static const uint32_t ural_rf2525_hi_r2[] = { 275 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 276 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 277 }; 278 279 static const uint32_t ural_rf2525e_r2[] = { 280 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 281 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 282 }; 283 284 static const uint32_t ural_rf2526_hi_r2[] = { 285 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 286 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 287 }; 288 289 static const uint32_t ural_rf2526_r2[] = { 290 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 291 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 292 }; 293 294 /* 295 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 296 * values taken from the reference driver. 297 */ 298 static const struct { 299 uint8_t chan; 300 uint32_t r1; 301 uint32_t r2; 302 uint32_t r4; 303 } ural_rf5222[] = { 304 { 1, 0x08808, 0x0044d, 0x00282 }, 305 { 2, 0x08808, 0x0044e, 0x00282 }, 306 { 3, 0x08808, 0x0044f, 0x00282 }, 307 { 4, 0x08808, 0x00460, 0x00282 }, 308 { 5, 0x08808, 0x00461, 0x00282 }, 309 { 6, 0x08808, 0x00462, 0x00282 }, 310 { 7, 0x08808, 0x00463, 0x00282 }, 311 { 8, 0x08808, 0x00464, 0x00282 }, 312 { 9, 0x08808, 0x00465, 0x00282 }, 313 { 10, 0x08808, 0x00466, 0x00282 }, 314 { 11, 0x08808, 0x00467, 0x00282 }, 315 { 12, 0x08808, 0x00468, 0x00282 }, 316 { 13, 0x08808, 0x00469, 0x00282 }, 317 { 14, 0x08808, 0x0046b, 0x00286 }, 318 319 { 36, 0x08804, 0x06225, 0x00287 }, 320 { 40, 0x08804, 0x06226, 0x00287 }, 321 { 44, 0x08804, 0x06227, 0x00287 }, 322 { 48, 0x08804, 0x06228, 0x00287 }, 323 { 52, 0x08804, 0x06229, 0x00287 }, 324 { 56, 0x08804, 0x0622a, 0x00287 }, 325 { 60, 0x08804, 0x0622b, 0x00287 }, 326 { 64, 0x08804, 0x0622c, 0x00287 }, 327 328 { 100, 0x08804, 0x02200, 0x00283 }, 329 { 104, 0x08804, 0x02201, 0x00283 }, 330 { 108, 0x08804, 0x02202, 0x00283 }, 331 { 112, 0x08804, 0x02203, 0x00283 }, 332 { 116, 0x08804, 0x02204, 0x00283 }, 333 { 120, 0x08804, 0x02205, 0x00283 }, 334 { 124, 0x08804, 0x02206, 0x00283 }, 335 { 128, 0x08804, 0x02207, 0x00283 }, 336 { 132, 0x08804, 0x02208, 0x00283 }, 337 { 136, 0x08804, 0x02209, 0x00283 }, 338 { 140, 0x08804, 0x0220a, 0x00283 }, 339 340 { 149, 0x08808, 0x02429, 0x00281 }, 341 { 153, 0x08808, 0x0242b, 0x00281 }, 342 { 157, 0x08808, 0x0242d, 0x00281 }, 343 { 161, 0x08808, 0x0242f, 0x00281 } 344 }; 345 346 int ural_match(device_t, cfdata_t, void *); 347 void ural_attach(device_t, device_t, void *); 348 int ural_detach(device_t, int); 349 int ural_activate(device_t, enum devact); 350 extern struct cfdriver ural_cd; 351 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, ural_detach, ural_activate); 352 353 int 354 ural_match(device_t parent, cfdata_t match, void *aux) 355 { 356 struct usb_attach_arg *uaa = aux; 357 358 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 359 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 360 } 361 362 void 363 ural_attach(device_t parent, device_t self, void *aux) 364 { 365 struct ural_softc *sc = device_private(self); 366 struct usb_attach_arg *uaa = aux; 367 struct ieee80211com *ic = &sc->sc_ic; 368 struct ifnet *ifp = &sc->sc_if; 369 usb_interface_descriptor_t *id; 370 usb_endpoint_descriptor_t *ed; 371 usbd_status error; 372 char *devinfop; 373 int i; 374 375 sc->sc_dev = self; 376 sc->sc_udev = uaa->uaa_device; 377 378 aprint_naive("\n"); 379 aprint_normal("\n"); 380 381 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 382 aprint_normal_dev(self, "%s\n", devinfop); 383 usbd_devinfo_free(devinfop); 384 385 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 386 if (error != 0) { 387 aprint_error_dev(self, "failed to set configuration" 388 ", err=%s\n", usbd_errstr(error)); 389 return; 390 } 391 392 /* get the first interface handle */ 393 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 394 &sc->sc_iface); 395 if (error != 0) { 396 aprint_error_dev(self, "could not get interface handle\n"); 397 return; 398 } 399 400 /* 401 * Find endpoints. 402 */ 403 id = usbd_get_interface_descriptor(sc->sc_iface); 404 405 sc->sc_rx_no = sc->sc_tx_no = -1; 406 for (i = 0; i < id->bNumEndpoints; i++) { 407 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 408 if (ed == NULL) { 409 aprint_error_dev(self, 410 "no endpoint descriptor for %d\n", i); 411 return; 412 } 413 414 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 415 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 416 sc->sc_rx_no = ed->bEndpointAddress; 417 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 418 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 419 sc->sc_tx_no = ed->bEndpointAddress; 420 } 421 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 422 aprint_error_dev(self, "missing endpoint\n"); 423 return; 424 } 425 426 usb_init_task(&sc->sc_task, ural_task, sc, 0); 427 callout_init(&sc->sc_scan_ch, 0); 428 sc->amrr.amrr_min_success_threshold = 1; 429 sc->amrr.amrr_max_success_threshold = 15; 430 callout_init(&sc->sc_amrr_ch, 0); 431 432 /* retrieve RT2570 rev. no */ 433 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 434 435 /* retrieve MAC address and various other things from EEPROM */ 436 ural_read_eeprom(sc); 437 438 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 439 sc->asic_rev, ural_get_rf(sc->rf_rev)); 440 441 ifp->if_softc = sc; 442 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 443 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 444 ifp->if_init = ural_init; 445 ifp->if_ioctl = ural_ioctl; 446 ifp->if_start = ural_start; 447 ifp->if_watchdog = ural_watchdog; 448 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 449 IFQ_SET_READY(&ifp->if_snd); 450 451 ic->ic_ifp = ifp; 452 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 453 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 454 ic->ic_state = IEEE80211_S_INIT; 455 456 /* set device capabilities */ 457 ic->ic_caps = 458 IEEE80211_C_IBSS | /* IBSS mode supported */ 459 IEEE80211_C_MONITOR | /* monitor mode supported */ 460 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 461 IEEE80211_C_TXPMGT | /* tx power management */ 462 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 463 IEEE80211_C_SHSLOT | /* short slot time supported */ 464 IEEE80211_C_WPA; /* 802.11i */ 465 466 if (sc->rf_rev == RAL_RF_5222) { 467 /* set supported .11a rates */ 468 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 469 470 /* set supported .11a channels */ 471 for (i = 36; i <= 64; i += 4) { 472 ic->ic_channels[i].ic_freq = 473 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 474 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 475 } 476 for (i = 100; i <= 140; i += 4) { 477 ic->ic_channels[i].ic_freq = 478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 480 } 481 for (i = 149; i <= 161; i += 4) { 482 ic->ic_channels[i].ic_freq = 483 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 484 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 485 } 486 } 487 488 /* set supported .11b and .11g rates */ 489 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 490 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 491 492 /* set supported .11b and .11g channels (1 through 14) */ 493 for (i = 1; i <= 14; i++) { 494 ic->ic_channels[i].ic_freq = 495 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 496 ic->ic_channels[i].ic_flags = 497 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 498 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 499 } 500 501 if_attach(ifp); 502 ieee80211_ifattach(ic); 503 ic->ic_reset = ural_reset; 504 505 /* override state transition machine */ 506 sc->sc_newstate = ic->ic_newstate; 507 ic->ic_newstate = ural_newstate; 508 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 509 510 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 511 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 512 513 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 514 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 515 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 516 517 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 518 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 519 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 520 521 ieee80211_announce(ic); 522 523 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 524 sc->sc_dev); 525 526 if (!pmf_device_register(self, NULL, NULL)) 527 aprint_error_dev(self, "couldn't establish power handler\n"); 528 529 return; 530 } 531 532 int 533 ural_detach(device_t self, int flags) 534 { 535 struct ural_softc *sc = device_private(self); 536 struct ieee80211com *ic = &sc->sc_ic; 537 struct ifnet *ifp = &sc->sc_if; 538 int s; 539 540 pmf_device_deregister(self); 541 542 s = splusb(); 543 544 ural_stop(ifp, 1); 545 usb_rem_task(sc->sc_udev, &sc->sc_task); 546 callout_stop(&sc->sc_scan_ch); 547 callout_stop(&sc->sc_amrr_ch); 548 549 if (sc->amrr_xfer != NULL) { 550 usbd_destroy_xfer(sc->amrr_xfer); 551 sc->amrr_xfer = NULL; 552 } 553 554 if (sc->sc_rx_pipeh != NULL) { 555 usbd_abort_pipe(sc->sc_rx_pipeh); 556 usbd_close_pipe(sc->sc_rx_pipeh); 557 } 558 559 if (sc->sc_tx_pipeh != NULL) { 560 usbd_abort_pipe(sc->sc_tx_pipeh); 561 usbd_close_pipe(sc->sc_tx_pipeh); 562 } 563 564 bpf_detach(ifp); 565 ieee80211_ifdetach(ic); 566 if_detach(ifp); 567 568 splx(s); 569 570 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 571 sc->sc_dev); 572 573 return 0; 574 } 575 576 Static int 577 ural_alloc_tx_list(struct ural_softc *sc) 578 { 579 struct ural_tx_data *data; 580 int i, error; 581 582 sc->tx_queued = 0; 583 584 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 585 data = &sc->tx_data[i]; 586 587 data->sc = sc; 588 error = usbd_create_xfer(sc->sc_tx_pipeh, 589 RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, 590 &data->xfer); 591 if (error) { 592 printf("%s: could not allocate tx xfer\n", 593 device_xname(sc->sc_dev)); 594 goto fail; 595 } 596 597 data->buf = usbd_get_buffer(data->xfer); 598 } 599 600 return 0; 601 602 fail: ural_free_tx_list(sc); 603 return error; 604 } 605 606 Static void 607 ural_free_tx_list(struct ural_softc *sc) 608 { 609 struct ural_tx_data *data; 610 int i; 611 612 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 613 data = &sc->tx_data[i]; 614 615 if (data->xfer != NULL) { 616 usbd_destroy_xfer(data->xfer); 617 data->xfer = NULL; 618 } 619 620 if (data->ni != NULL) { 621 ieee80211_free_node(data->ni); 622 data->ni = NULL; 623 } 624 } 625 } 626 627 Static int 628 ural_alloc_rx_list(struct ural_softc *sc) 629 { 630 struct ural_rx_data *data; 631 int i, error; 632 633 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 634 data = &sc->rx_data[i]; 635 636 data->sc = sc; 637 638 error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, 639 USBD_SHORT_XFER_OK, 0, &data->xfer); 640 if (error) { 641 printf("%s: could not allocate rx xfer\n", 642 device_xname(sc->sc_dev)); 643 goto fail; 644 } 645 646 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 647 if (data->m == NULL) { 648 printf("%s: could not allocate rx mbuf\n", 649 device_xname(sc->sc_dev)); 650 error = ENOMEM; 651 goto fail; 652 } 653 654 MCLGET(data->m, M_DONTWAIT); 655 if (!(data->m->m_flags & M_EXT)) { 656 printf("%s: could not allocate rx mbuf cluster\n", 657 device_xname(sc->sc_dev)); 658 error = ENOMEM; 659 goto fail; 660 } 661 662 data->buf = mtod(data->m, uint8_t *); 663 } 664 665 return 0; 666 667 fail: ural_free_tx_list(sc); 668 return error; 669 } 670 671 Static void 672 ural_free_rx_list(struct ural_softc *sc) 673 { 674 struct ural_rx_data *data; 675 int i; 676 677 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 678 data = &sc->rx_data[i]; 679 680 if (data->xfer != NULL) { 681 usbd_destroy_xfer(data->xfer); 682 data->xfer = NULL; 683 } 684 685 if (data->m != NULL) { 686 m_freem(data->m); 687 data->m = NULL; 688 } 689 } 690 } 691 692 Static int 693 ural_media_change(struct ifnet *ifp) 694 { 695 int error; 696 697 error = ieee80211_media_change(ifp); 698 if (error != ENETRESET) 699 return error; 700 701 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 702 ural_init(ifp); 703 704 return 0; 705 } 706 707 /* 708 * This function is called periodically (every 200ms) during scanning to 709 * switch from one channel to another. 710 */ 711 Static void 712 ural_next_scan(void *arg) 713 { 714 struct ural_softc *sc = arg; 715 struct ieee80211com *ic = &sc->sc_ic; 716 717 if (ic->ic_state == IEEE80211_S_SCAN) 718 ieee80211_next_scan(ic); 719 } 720 721 Static void 722 ural_task(void *arg) 723 { 724 struct ural_softc *sc = arg; 725 struct ieee80211com *ic = &sc->sc_ic; 726 enum ieee80211_state ostate; 727 struct ieee80211_node *ni; 728 struct mbuf *m; 729 730 ostate = ic->ic_state; 731 732 switch (sc->sc_state) { 733 case IEEE80211_S_INIT: 734 if (ostate == IEEE80211_S_RUN) { 735 /* abort TSF synchronization */ 736 ural_write(sc, RAL_TXRX_CSR19, 0); 737 738 /* force tx led to stop blinking */ 739 ural_write(sc, RAL_MAC_CSR20, 0); 740 } 741 break; 742 743 case IEEE80211_S_SCAN: 744 ural_set_chan(sc, ic->ic_curchan); 745 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 746 break; 747 748 case IEEE80211_S_AUTH: 749 ural_set_chan(sc, ic->ic_curchan); 750 break; 751 752 case IEEE80211_S_ASSOC: 753 ural_set_chan(sc, ic->ic_curchan); 754 break; 755 756 case IEEE80211_S_RUN: 757 ural_set_chan(sc, ic->ic_curchan); 758 759 ni = ic->ic_bss; 760 761 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 762 ural_update_slot(ic->ic_ifp); 763 ural_set_txpreamble(sc); 764 ural_set_basicrates(sc); 765 ural_set_bssid(sc, ni->ni_bssid); 766 } 767 768 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 769 ic->ic_opmode == IEEE80211_M_IBSS) { 770 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 771 if (m == NULL) { 772 printf("%s: could not allocate beacon\n", 773 device_xname(sc->sc_dev)); 774 return; 775 } 776 777 if (ural_tx_bcn(sc, m, ni) != 0) { 778 m_freem(m); 779 printf("%s: could not send beacon\n", 780 device_xname(sc->sc_dev)); 781 return; 782 } 783 784 /* beacon is no longer needed */ 785 m_freem(m); 786 } 787 788 /* make tx led blink on tx (controlled by ASIC) */ 789 ural_write(sc, RAL_MAC_CSR20, 1); 790 791 if (ic->ic_opmode != IEEE80211_M_MONITOR) 792 ural_enable_tsf_sync(sc); 793 794 /* enable automatic rate adaptation in STA mode */ 795 if (ic->ic_opmode == IEEE80211_M_STA && 796 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 797 ural_amrr_start(sc, ni); 798 799 break; 800 } 801 802 sc->sc_newstate(ic, sc->sc_state, -1); 803 } 804 805 Static int 806 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 807 int arg) 808 { 809 struct ural_softc *sc = ic->ic_ifp->if_softc; 810 811 usb_rem_task(sc->sc_udev, &sc->sc_task); 812 callout_stop(&sc->sc_scan_ch); 813 callout_stop(&sc->sc_amrr_ch); 814 815 /* do it in a process context */ 816 sc->sc_state = nstate; 817 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 818 819 return 0; 820 } 821 822 /* quickly determine if a given rate is CCK or OFDM */ 823 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 824 825 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 826 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 827 828 #define RAL_SIFS 10 /* us */ 829 830 #define RAL_RXTX_TURNAROUND 5 /* us */ 831 832 /* 833 * This function is only used by the Rx radiotap code. 834 */ 835 Static int 836 ural_rxrate(struct ural_rx_desc *desc) 837 { 838 if (le32toh(desc->flags) & RAL_RX_OFDM) { 839 /* reverse function of ural_plcp_signal */ 840 switch (desc->rate) { 841 case 0xb: return 12; 842 case 0xf: return 18; 843 case 0xa: return 24; 844 case 0xe: return 36; 845 case 0x9: return 48; 846 case 0xd: return 72; 847 case 0x8: return 96; 848 case 0xc: return 108; 849 } 850 } else { 851 if (desc->rate == 10) 852 return 2; 853 if (desc->rate == 20) 854 return 4; 855 if (desc->rate == 55) 856 return 11; 857 if (desc->rate == 110) 858 return 22; 859 } 860 return 2; /* should not get there */ 861 } 862 863 Static void 864 ural_txeof(struct usbd_xfer *xfer, void * priv, 865 usbd_status status) 866 { 867 struct ural_tx_data *data = priv; 868 struct ural_softc *sc = data->sc; 869 struct ifnet *ifp = &sc->sc_if; 870 int s; 871 872 if (status != USBD_NORMAL_COMPLETION) { 873 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 874 return; 875 876 printf("%s: could not transmit buffer: %s\n", 877 device_xname(sc->sc_dev), usbd_errstr(status)); 878 879 if (status == USBD_STALLED) 880 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 881 882 ifp->if_oerrors++; 883 return; 884 } 885 886 s = splnet(); 887 888 m_freem(data->m); 889 data->m = NULL; 890 ieee80211_free_node(data->ni); 891 data->ni = NULL; 892 893 sc->tx_queued--; 894 ifp->if_opackets++; 895 896 DPRINTFN(10, ("tx done\n")); 897 898 sc->sc_tx_timer = 0; 899 ifp->if_flags &= ~IFF_OACTIVE; 900 ural_start(ifp); 901 902 splx(s); 903 } 904 905 Static void 906 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 907 { 908 struct ural_rx_data *data = priv; 909 struct ural_softc *sc = data->sc; 910 struct ieee80211com *ic = &sc->sc_ic; 911 struct ifnet *ifp = &sc->sc_if; 912 struct ural_rx_desc *desc; 913 struct ieee80211_frame *wh; 914 struct ieee80211_node *ni; 915 struct mbuf *mnew, *m; 916 int s, len; 917 918 if (status != USBD_NORMAL_COMPLETION) { 919 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 920 return; 921 922 if (status == USBD_STALLED) 923 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 924 goto skip; 925 } 926 927 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 928 929 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 930 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 931 len)); 932 ifp->if_ierrors++; 933 goto skip; 934 } 935 936 /* rx descriptor is located at the end */ 937 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 938 939 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 940 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 941 /* 942 * This should not happen since we did not request to receive 943 * those frames when we filled RAL_TXRX_CSR2. 944 */ 945 DPRINTFN(5, ("PHY or CRC error\n")); 946 ifp->if_ierrors++; 947 goto skip; 948 } 949 950 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 951 if (mnew == NULL) { 952 ifp->if_ierrors++; 953 goto skip; 954 } 955 956 MCLGET(mnew, M_DONTWAIT); 957 if (!(mnew->m_flags & M_EXT)) { 958 ifp->if_ierrors++; 959 m_freem(mnew); 960 goto skip; 961 } 962 963 m = data->m; 964 data->m = mnew; 965 data->buf = mtod(data->m, uint8_t *); 966 967 /* finalize mbuf */ 968 m->m_pkthdr.rcvif = ifp; 969 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 970 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 971 972 s = splnet(); 973 974 if (sc->sc_drvbpf != NULL) { 975 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 976 977 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 978 tap->wr_rate = ural_rxrate(desc); 979 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 980 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 981 tap->wr_antenna = sc->rx_ant; 982 tap->wr_antsignal = desc->rssi; 983 984 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 985 } 986 987 wh = mtod(m, struct ieee80211_frame *); 988 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 989 990 /* send the frame to the 802.11 layer */ 991 ieee80211_input(ic, m, ni, desc->rssi, 0); 992 993 /* node is no longer needed */ 994 ieee80211_free_node(ni); 995 996 splx(s); 997 998 DPRINTFN(15, ("rx done\n")); 999 1000 skip: /* setup a new transfer */ 1001 usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, 1002 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1003 usbd_transfer(xfer); 1004 } 1005 1006 /* 1007 * Return the expected ack rate for a frame transmitted at rate `rate'. 1008 * XXX: this should depend on the destination node basic rate set. 1009 */ 1010 Static int 1011 ural_ack_rate(struct ieee80211com *ic, int rate) 1012 { 1013 switch (rate) { 1014 /* CCK rates */ 1015 case 2: 1016 return 2; 1017 case 4: 1018 case 11: 1019 case 22: 1020 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1021 1022 /* OFDM rates */ 1023 case 12: 1024 case 18: 1025 return 12; 1026 case 24: 1027 case 36: 1028 return 24; 1029 case 48: 1030 case 72: 1031 case 96: 1032 case 108: 1033 return 48; 1034 } 1035 1036 /* default to 1Mbps */ 1037 return 2; 1038 } 1039 1040 /* 1041 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1042 * The function automatically determines the operating mode depending on the 1043 * given rate. `flags' indicates whether short preamble is in use or not. 1044 */ 1045 Static uint16_t 1046 ural_txtime(int len, int rate, uint32_t flags) 1047 { 1048 uint16_t txtime; 1049 1050 if (RAL_RATE_IS_OFDM(rate)) { 1051 /* IEEE Std 802.11g-2003, pp. 37 */ 1052 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1053 txtime = 16 + 4 + 4 * txtime + 6; 1054 } else { 1055 /* IEEE Std 802.11b-1999, pp. 28 */ 1056 txtime = (16 * len + rate - 1) / rate; 1057 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1058 txtime += 72 + 24; 1059 else 1060 txtime += 144 + 48; 1061 } 1062 return txtime; 1063 } 1064 1065 Static uint8_t 1066 ural_plcp_signal(int rate) 1067 { 1068 switch (rate) { 1069 /* CCK rates (returned values are device-dependent) */ 1070 case 2: return 0x0; 1071 case 4: return 0x1; 1072 case 11: return 0x2; 1073 case 22: return 0x3; 1074 1075 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1076 case 12: return 0xb; 1077 case 18: return 0xf; 1078 case 24: return 0xa; 1079 case 36: return 0xe; 1080 case 48: return 0x9; 1081 case 72: return 0xd; 1082 case 96: return 0x8; 1083 case 108: return 0xc; 1084 1085 /* unsupported rates (should not get there) */ 1086 default: return 0xff; 1087 } 1088 } 1089 1090 Static void 1091 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1092 uint32_t flags, int len, int rate) 1093 { 1094 struct ieee80211com *ic = &sc->sc_ic; 1095 uint16_t plcp_length; 1096 int remainder; 1097 1098 desc->flags = htole32(flags); 1099 desc->flags |= htole32(RAL_TX_NEWSEQ); 1100 desc->flags |= htole32(len << 16); 1101 1102 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1103 desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); 1104 1105 /* setup PLCP fields */ 1106 desc->plcp_signal = ural_plcp_signal(rate); 1107 desc->plcp_service = 4; 1108 1109 len += IEEE80211_CRC_LEN; 1110 if (RAL_RATE_IS_OFDM(rate)) { 1111 desc->flags |= htole32(RAL_TX_OFDM); 1112 1113 plcp_length = len & 0xfff; 1114 desc->plcp_length_hi = plcp_length >> 6; 1115 desc->plcp_length_lo = plcp_length & 0x3f; 1116 } else { 1117 plcp_length = (16 * len + rate - 1) / rate; 1118 if (rate == 22) { 1119 remainder = (16 * len) % 22; 1120 if (remainder != 0 && remainder < 7) 1121 desc->plcp_service |= RAL_PLCP_LENGEXT; 1122 } 1123 desc->plcp_length_hi = plcp_length >> 8; 1124 desc->plcp_length_lo = plcp_length & 0xff; 1125 1126 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1127 desc->plcp_signal |= 0x08; 1128 } 1129 1130 desc->iv = 0; 1131 desc->eiv = 0; 1132 } 1133 1134 #define RAL_TX_TIMEOUT 5000 1135 1136 Static int 1137 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1138 { 1139 struct ural_tx_desc *desc; 1140 struct usbd_xfer *xfer; 1141 uint8_t cmd = 0; 1142 usbd_status error; 1143 uint8_t *buf; 1144 int xferlen, rate; 1145 1146 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1147 1148 /* xfer length needs to be a multiple of two! */ 1149 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1150 1151 error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, 1152 USBD_FORCE_SHORT_XFER, 0, &xfer); 1153 if (error) 1154 return error; 1155 1156 buf = usbd_get_buffer(xfer); 1157 1158 usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, 1159 RAL_TX_TIMEOUT, NULL); 1160 1161 error = usbd_sync_transfer(xfer); 1162 if (error != 0) { 1163 usbd_destroy_xfer(xfer); 1164 return error; 1165 } 1166 1167 desc = (struct ural_tx_desc *)buf; 1168 1169 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1170 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1171 m0->m_pkthdr.len, rate); 1172 1173 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1174 m0->m_pkthdr.len, rate, xferlen)); 1175 1176 usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, 1177 RAL_TX_TIMEOUT, NULL); 1178 1179 error = usbd_sync_transfer(xfer); 1180 usbd_destroy_xfer(xfer); 1181 1182 return error; 1183 } 1184 1185 Static int 1186 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1187 { 1188 struct ieee80211com *ic = &sc->sc_ic; 1189 struct ural_tx_desc *desc; 1190 struct ural_tx_data *data; 1191 struct ieee80211_frame *wh; 1192 struct ieee80211_key *k; 1193 uint32_t flags = 0; 1194 uint16_t dur; 1195 usbd_status error; 1196 int xferlen, rate; 1197 1198 data = &sc->tx_data[0]; 1199 desc = (struct ural_tx_desc *)data->buf; 1200 1201 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1202 1203 wh = mtod(m0, struct ieee80211_frame *); 1204 1205 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1206 k = ieee80211_crypto_encap(ic, ni, m0); 1207 if (k == NULL) { 1208 m_freem(m0); 1209 return ENOBUFS; 1210 } 1211 } 1212 1213 data->m = m0; 1214 data->ni = ni; 1215 1216 wh = mtod(m0, struct ieee80211_frame *); 1217 1218 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1219 flags |= RAL_TX_ACK; 1220 1221 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1222 *(uint16_t *)wh->i_dur = htole16(dur); 1223 1224 /* tell hardware to add timestamp for probe responses */ 1225 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1226 IEEE80211_FC0_TYPE_MGT && 1227 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1228 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1229 flags |= RAL_TX_TIMESTAMP; 1230 } 1231 1232 if (sc->sc_drvbpf != NULL) { 1233 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1234 1235 tap->wt_flags = 0; 1236 tap->wt_rate = rate; 1237 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1238 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1239 tap->wt_antenna = sc->tx_ant; 1240 1241 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1242 } 1243 1244 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1245 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1246 1247 /* align end on a 2-bytes boundary */ 1248 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1249 1250 /* 1251 * No space left in the last URB to store the extra 2 bytes, force 1252 * sending of another URB. 1253 */ 1254 if ((xferlen % 64) == 0) 1255 xferlen += 2; 1256 1257 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1258 m0->m_pkthdr.len, rate, xferlen)); 1259 1260 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1261 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1262 1263 error = usbd_transfer(data->xfer); 1264 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1265 m_freem(m0); 1266 return error; 1267 } 1268 1269 sc->tx_queued++; 1270 1271 return 0; 1272 } 1273 1274 Static int 1275 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1276 { 1277 struct ieee80211com *ic = &sc->sc_ic; 1278 struct ural_tx_desc *desc; 1279 struct ural_tx_data *data; 1280 struct ieee80211_frame *wh; 1281 struct ieee80211_key *k; 1282 uint32_t flags = 0; 1283 uint16_t dur; 1284 usbd_status error; 1285 int xferlen, rate; 1286 1287 wh = mtod(m0, struct ieee80211_frame *); 1288 1289 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1290 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1291 else 1292 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1293 1294 rate &= IEEE80211_RATE_VAL; 1295 1296 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1297 k = ieee80211_crypto_encap(ic, ni, m0); 1298 if (k == NULL) { 1299 m_freem(m0); 1300 return ENOBUFS; 1301 } 1302 1303 /* packet header may have moved, reset our local pointer */ 1304 wh = mtod(m0, struct ieee80211_frame *); 1305 } 1306 1307 data = &sc->tx_data[0]; 1308 desc = (struct ural_tx_desc *)data->buf; 1309 1310 data->m = m0; 1311 data->ni = ni; 1312 1313 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1314 flags |= RAL_TX_ACK; 1315 flags |= RAL_TX_RETRY(7); 1316 1317 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1318 ic->ic_flags) + RAL_SIFS; 1319 *(uint16_t *)wh->i_dur = htole16(dur); 1320 } 1321 1322 if (sc->sc_drvbpf != NULL) { 1323 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1324 1325 tap->wt_flags = 0; 1326 tap->wt_rate = rate; 1327 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1328 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1329 tap->wt_antenna = sc->tx_ant; 1330 1331 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1332 } 1333 1334 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1335 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1336 1337 /* align end on a 2-bytes boundary */ 1338 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1339 1340 /* 1341 * No space left in the last URB to store the extra 2 bytes, force 1342 * sending of another URB. 1343 */ 1344 if ((xferlen % 64) == 0) 1345 xferlen += 2; 1346 1347 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1348 m0->m_pkthdr.len, rate, xferlen)); 1349 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1350 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1351 1352 error = usbd_transfer(data->xfer); 1353 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1354 return error; 1355 1356 sc->tx_queued++; 1357 1358 return 0; 1359 } 1360 1361 Static void 1362 ural_start(struct ifnet *ifp) 1363 { 1364 struct ural_softc *sc = ifp->if_softc; 1365 struct ieee80211com *ic = &sc->sc_ic; 1366 struct mbuf *m0; 1367 struct ether_header *eh; 1368 struct ieee80211_node *ni; 1369 1370 for (;;) { 1371 IF_POLL(&ic->ic_mgtq, m0); 1372 if (m0 != NULL) { 1373 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1374 ifp->if_flags |= IFF_OACTIVE; 1375 break; 1376 } 1377 IF_DEQUEUE(&ic->ic_mgtq, m0); 1378 1379 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1380 m0->m_pkthdr.rcvif = NULL; 1381 bpf_mtap3(ic->ic_rawbpf, m0); 1382 if (ural_tx_mgt(sc, m0, ni) != 0) 1383 break; 1384 1385 } else { 1386 if (ic->ic_state != IEEE80211_S_RUN) 1387 break; 1388 IFQ_DEQUEUE(&ifp->if_snd, m0); 1389 if (m0 == NULL) 1390 break; 1391 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1392 IF_PREPEND(&ifp->if_snd, m0); 1393 ifp->if_flags |= IFF_OACTIVE; 1394 break; 1395 } 1396 1397 if (m0->m_len < sizeof(struct ether_header) && 1398 !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1399 continue; 1400 1401 eh = mtod(m0, struct ether_header *); 1402 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1403 if (ni == NULL) { 1404 m_freem(m0); 1405 continue; 1406 } 1407 bpf_mtap(ifp, m0); 1408 m0 = ieee80211_encap(ic, m0, ni); 1409 if (m0 == NULL) { 1410 ieee80211_free_node(ni); 1411 continue; 1412 } 1413 bpf_mtap3(ic->ic_rawbpf, m0); 1414 if (ural_tx_data(sc, m0, ni) != 0) { 1415 ieee80211_free_node(ni); 1416 ifp->if_oerrors++; 1417 break; 1418 } 1419 } 1420 1421 sc->sc_tx_timer = 5; 1422 ifp->if_timer = 1; 1423 } 1424 } 1425 1426 Static void 1427 ural_watchdog(struct ifnet *ifp) 1428 { 1429 struct ural_softc *sc = ifp->if_softc; 1430 struct ieee80211com *ic = &sc->sc_ic; 1431 1432 ifp->if_timer = 0; 1433 1434 if (sc->sc_tx_timer > 0) { 1435 if (--sc->sc_tx_timer == 0) { 1436 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1437 /*ural_init(sc); XXX needs a process context! */ 1438 ifp->if_oerrors++; 1439 return; 1440 } 1441 ifp->if_timer = 1; 1442 } 1443 1444 ieee80211_watchdog(ic); 1445 } 1446 1447 /* 1448 * This function allows for fast channel switching in monitor mode (used by 1449 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1450 * generate a new beacon frame. 1451 */ 1452 Static int 1453 ural_reset(struct ifnet *ifp) 1454 { 1455 struct ural_softc *sc = ifp->if_softc; 1456 struct ieee80211com *ic = &sc->sc_ic; 1457 1458 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1459 return ENETRESET; 1460 1461 ural_set_chan(sc, ic->ic_curchan); 1462 1463 return 0; 1464 } 1465 1466 Static int 1467 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1468 { 1469 #define IS_RUNNING(ifp) \ 1470 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1471 1472 struct ural_softc *sc = ifp->if_softc; 1473 struct ieee80211com *ic = &sc->sc_ic; 1474 int s, error = 0; 1475 1476 s = splnet(); 1477 1478 switch (cmd) { 1479 case SIOCSIFFLAGS: 1480 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1481 break; 1482 /* XXX re-use ether_ioctl() */ 1483 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1484 case IFF_UP|IFF_RUNNING: 1485 ural_update_promisc(sc); 1486 break; 1487 case IFF_UP: 1488 ural_init(ifp); 1489 break; 1490 case IFF_RUNNING: 1491 ural_stop(ifp, 1); 1492 break; 1493 case 0: 1494 break; 1495 } 1496 break; 1497 1498 case SIOCADDMULTI: 1499 case SIOCDELMULTI: 1500 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1501 error = 0; 1502 } 1503 break; 1504 1505 default: 1506 error = ieee80211_ioctl(ic, cmd, data); 1507 } 1508 1509 if (error == ENETRESET) { 1510 if (IS_RUNNING(ifp) && 1511 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1512 ural_init(ifp); 1513 error = 0; 1514 } 1515 1516 splx(s); 1517 1518 return error; 1519 #undef IS_RUNNING 1520 } 1521 1522 Static void 1523 ural_set_testmode(struct ural_softc *sc) 1524 { 1525 usb_device_request_t req; 1526 usbd_status error; 1527 1528 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1529 req.bRequest = RAL_VENDOR_REQUEST; 1530 USETW(req.wValue, 4); 1531 USETW(req.wIndex, 1); 1532 USETW(req.wLength, 0); 1533 1534 error = usbd_do_request(sc->sc_udev, &req, NULL); 1535 if (error != 0) { 1536 printf("%s: could not set test mode: %s\n", 1537 device_xname(sc->sc_dev), usbd_errstr(error)); 1538 } 1539 } 1540 1541 Static void 1542 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1543 { 1544 usb_device_request_t req; 1545 usbd_status error; 1546 1547 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1548 req.bRequest = RAL_READ_EEPROM; 1549 USETW(req.wValue, 0); 1550 USETW(req.wIndex, addr); 1551 USETW(req.wLength, len); 1552 1553 error = usbd_do_request(sc->sc_udev, &req, buf); 1554 if (error != 0) { 1555 printf("%s: could not read EEPROM: %s\n", 1556 device_xname(sc->sc_dev), usbd_errstr(error)); 1557 } 1558 } 1559 1560 Static uint16_t 1561 ural_read(struct ural_softc *sc, uint16_t reg) 1562 { 1563 usb_device_request_t req; 1564 usbd_status error; 1565 uint16_t val; 1566 1567 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1568 req.bRequest = RAL_READ_MAC; 1569 USETW(req.wValue, 0); 1570 USETW(req.wIndex, reg); 1571 USETW(req.wLength, sizeof(uint16_t)); 1572 1573 error = usbd_do_request(sc->sc_udev, &req, &val); 1574 if (error != 0) { 1575 printf("%s: could not read MAC register: %s\n", 1576 device_xname(sc->sc_dev), usbd_errstr(error)); 1577 return 0; 1578 } 1579 1580 return le16toh(val); 1581 } 1582 1583 Static void 1584 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1585 { 1586 usb_device_request_t req; 1587 usbd_status error; 1588 1589 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1590 req.bRequest = RAL_READ_MULTI_MAC; 1591 USETW(req.wValue, 0); 1592 USETW(req.wIndex, reg); 1593 USETW(req.wLength, len); 1594 1595 error = usbd_do_request(sc->sc_udev, &req, buf); 1596 if (error != 0) { 1597 printf("%s: could not read MAC register: %s\n", 1598 device_xname(sc->sc_dev), usbd_errstr(error)); 1599 } 1600 } 1601 1602 Static void 1603 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1604 { 1605 usb_device_request_t req; 1606 usbd_status error; 1607 1608 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1609 req.bRequest = RAL_WRITE_MAC; 1610 USETW(req.wValue, val); 1611 USETW(req.wIndex, reg); 1612 USETW(req.wLength, 0); 1613 1614 error = usbd_do_request(sc->sc_udev, &req, NULL); 1615 if (error != 0) { 1616 printf("%s: could not write MAC register: %s\n", 1617 device_xname(sc->sc_dev), usbd_errstr(error)); 1618 } 1619 } 1620 1621 Static void 1622 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1623 { 1624 usb_device_request_t req; 1625 usbd_status error; 1626 1627 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1628 req.bRequest = RAL_WRITE_MULTI_MAC; 1629 USETW(req.wValue, 0); 1630 USETW(req.wIndex, reg); 1631 USETW(req.wLength, len); 1632 1633 error = usbd_do_request(sc->sc_udev, &req, buf); 1634 if (error != 0) { 1635 printf("%s: could not write MAC register: %s\n", 1636 device_xname(sc->sc_dev), usbd_errstr(error)); 1637 } 1638 } 1639 1640 Static void 1641 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1642 { 1643 uint16_t tmp; 1644 int ntries; 1645 1646 for (ntries = 0; ntries < 5; ntries++) { 1647 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1648 break; 1649 } 1650 if (ntries == 5) { 1651 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1652 return; 1653 } 1654 1655 tmp = reg << 8 | val; 1656 ural_write(sc, RAL_PHY_CSR7, tmp); 1657 } 1658 1659 Static uint8_t 1660 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1661 { 1662 uint16_t val; 1663 int ntries; 1664 1665 val = RAL_BBP_WRITE | reg << 8; 1666 ural_write(sc, RAL_PHY_CSR7, val); 1667 1668 for (ntries = 0; ntries < 5; ntries++) { 1669 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1670 break; 1671 } 1672 if (ntries == 5) { 1673 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1674 return 0; 1675 } 1676 1677 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1678 } 1679 1680 Static void 1681 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1682 { 1683 uint32_t tmp; 1684 int ntries; 1685 1686 for (ntries = 0; ntries < 5; ntries++) { 1687 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1688 break; 1689 } 1690 if (ntries == 5) { 1691 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1692 return; 1693 } 1694 1695 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1696 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1697 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1698 1699 /* remember last written value in sc */ 1700 sc->rf_regs[reg] = val; 1701 1702 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1703 } 1704 1705 Static void 1706 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1707 { 1708 struct ieee80211com *ic = &sc->sc_ic; 1709 uint8_t power, tmp; 1710 u_int i, chan; 1711 1712 chan = ieee80211_chan2ieee(ic, c); 1713 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1714 return; 1715 1716 if (IEEE80211_IS_CHAN_2GHZ(c)) 1717 power = min(sc->txpow[chan - 1], 31); 1718 else 1719 power = 31; 1720 1721 /* adjust txpower using ifconfig settings */ 1722 power -= (100 - ic->ic_txpowlimit) / 8; 1723 1724 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1725 1726 switch (sc->rf_rev) { 1727 case RAL_RF_2522: 1728 ural_rf_write(sc, RAL_RF1, 0x00814); 1729 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1730 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1731 break; 1732 1733 case RAL_RF_2523: 1734 ural_rf_write(sc, RAL_RF1, 0x08804); 1735 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1736 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1737 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1738 break; 1739 1740 case RAL_RF_2524: 1741 ural_rf_write(sc, RAL_RF1, 0x0c808); 1742 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1743 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1744 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1745 break; 1746 1747 case RAL_RF_2525: 1748 ural_rf_write(sc, RAL_RF1, 0x08808); 1749 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1750 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1751 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1752 1753 ural_rf_write(sc, RAL_RF1, 0x08808); 1754 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1755 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1756 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1757 break; 1758 1759 case RAL_RF_2525E: 1760 ural_rf_write(sc, RAL_RF1, 0x08808); 1761 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1762 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1763 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1764 break; 1765 1766 case RAL_RF_2526: 1767 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1768 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1769 ural_rf_write(sc, RAL_RF1, 0x08804); 1770 1771 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1772 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1773 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1774 break; 1775 1776 /* dual-band RF */ 1777 case RAL_RF_5222: 1778 for (i = 0; ural_rf5222[i].chan != chan; i++); 1779 1780 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1781 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1782 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1783 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1784 break; 1785 } 1786 1787 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1788 ic->ic_state != IEEE80211_S_SCAN) { 1789 /* set Japan filter bit for channel 14 */ 1790 tmp = ural_bbp_read(sc, 70); 1791 1792 tmp &= ~RAL_JAPAN_FILTER; 1793 if (chan == 14) 1794 tmp |= RAL_JAPAN_FILTER; 1795 1796 ural_bbp_write(sc, 70, tmp); 1797 1798 /* clear CRC errors */ 1799 ural_read(sc, RAL_STA_CSR0); 1800 1801 DELAY(10000); 1802 ural_disable_rf_tune(sc); 1803 } 1804 } 1805 1806 /* 1807 * Disable RF auto-tuning. 1808 */ 1809 Static void 1810 ural_disable_rf_tune(struct ural_softc *sc) 1811 { 1812 uint32_t tmp; 1813 1814 if (sc->rf_rev != RAL_RF_2523) { 1815 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1816 ural_rf_write(sc, RAL_RF1, tmp); 1817 } 1818 1819 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1820 ural_rf_write(sc, RAL_RF3, tmp); 1821 1822 DPRINTFN(2, ("disabling RF autotune\n")); 1823 } 1824 1825 /* 1826 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1827 * synchronization. 1828 */ 1829 Static void 1830 ural_enable_tsf_sync(struct ural_softc *sc) 1831 { 1832 struct ieee80211com *ic = &sc->sc_ic; 1833 uint16_t logcwmin, preload, tmp; 1834 1835 /* first, disable TSF synchronization */ 1836 ural_write(sc, RAL_TXRX_CSR19, 0); 1837 1838 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1839 ural_write(sc, RAL_TXRX_CSR18, tmp); 1840 1841 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1842 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1843 tmp = logcwmin << 12 | preload; 1844 ural_write(sc, RAL_TXRX_CSR20, tmp); 1845 1846 /* finally, enable TSF synchronization */ 1847 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1848 if (ic->ic_opmode == IEEE80211_M_STA) 1849 tmp |= RAL_ENABLE_TSF_SYNC(1); 1850 else 1851 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1852 ural_write(sc, RAL_TXRX_CSR19, tmp); 1853 1854 DPRINTF(("enabling TSF synchronization\n")); 1855 } 1856 1857 Static void 1858 ural_update_slot(struct ifnet *ifp) 1859 { 1860 struct ural_softc *sc = ifp->if_softc; 1861 struct ieee80211com *ic = &sc->sc_ic; 1862 uint16_t slottime, sifs, eifs; 1863 1864 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1865 1866 /* 1867 * These settings may sound a bit inconsistent but this is what the 1868 * reference driver does. 1869 */ 1870 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1871 sifs = 16 - RAL_RXTX_TURNAROUND; 1872 eifs = 364; 1873 } else { 1874 sifs = 10 - RAL_RXTX_TURNAROUND; 1875 eifs = 64; 1876 } 1877 1878 ural_write(sc, RAL_MAC_CSR10, slottime); 1879 ural_write(sc, RAL_MAC_CSR11, sifs); 1880 ural_write(sc, RAL_MAC_CSR12, eifs); 1881 } 1882 1883 Static void 1884 ural_set_txpreamble(struct ural_softc *sc) 1885 { 1886 uint16_t tmp; 1887 1888 tmp = ural_read(sc, RAL_TXRX_CSR10); 1889 1890 tmp &= ~RAL_SHORT_PREAMBLE; 1891 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1892 tmp |= RAL_SHORT_PREAMBLE; 1893 1894 ural_write(sc, RAL_TXRX_CSR10, tmp); 1895 } 1896 1897 Static void 1898 ural_set_basicrates(struct ural_softc *sc) 1899 { 1900 struct ieee80211com *ic = &sc->sc_ic; 1901 1902 /* update basic rate set */ 1903 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1904 /* 11b basic rates: 1, 2Mbps */ 1905 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1906 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1907 /* 11a basic rates: 6, 12, 24Mbps */ 1908 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1909 } else { 1910 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1911 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1912 } 1913 } 1914 1915 Static void 1916 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1917 { 1918 uint16_t tmp; 1919 1920 tmp = bssid[0] | bssid[1] << 8; 1921 ural_write(sc, RAL_MAC_CSR5, tmp); 1922 1923 tmp = bssid[2] | bssid[3] << 8; 1924 ural_write(sc, RAL_MAC_CSR6, tmp); 1925 1926 tmp = bssid[4] | bssid[5] << 8; 1927 ural_write(sc, RAL_MAC_CSR7, tmp); 1928 1929 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1930 } 1931 1932 Static void 1933 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1934 { 1935 uint16_t tmp; 1936 1937 tmp = addr[0] | addr[1] << 8; 1938 ural_write(sc, RAL_MAC_CSR2, tmp); 1939 1940 tmp = addr[2] | addr[3] << 8; 1941 ural_write(sc, RAL_MAC_CSR3, tmp); 1942 1943 tmp = addr[4] | addr[5] << 8; 1944 ural_write(sc, RAL_MAC_CSR4, tmp); 1945 1946 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1947 } 1948 1949 Static void 1950 ural_update_promisc(struct ural_softc *sc) 1951 { 1952 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1953 uint32_t tmp; 1954 1955 tmp = ural_read(sc, RAL_TXRX_CSR2); 1956 1957 tmp &= ~RAL_DROP_NOT_TO_ME; 1958 if (!(ifp->if_flags & IFF_PROMISC)) 1959 tmp |= RAL_DROP_NOT_TO_ME; 1960 1961 ural_write(sc, RAL_TXRX_CSR2, tmp); 1962 1963 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1964 "entering" : "leaving")); 1965 } 1966 1967 Static const char * 1968 ural_get_rf(int rev) 1969 { 1970 switch (rev) { 1971 case RAL_RF_2522: return "RT2522"; 1972 case RAL_RF_2523: return "RT2523"; 1973 case RAL_RF_2524: return "RT2524"; 1974 case RAL_RF_2525: return "RT2525"; 1975 case RAL_RF_2525E: return "RT2525e"; 1976 case RAL_RF_2526: return "RT2526"; 1977 case RAL_RF_5222: return "RT5222"; 1978 default: return "unknown"; 1979 } 1980 } 1981 1982 Static void 1983 ural_read_eeprom(struct ural_softc *sc) 1984 { 1985 struct ieee80211com *ic = &sc->sc_ic; 1986 uint16_t val; 1987 1988 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1989 val = le16toh(val); 1990 sc->rf_rev = (val >> 11) & 0x7; 1991 sc->hw_radio = (val >> 10) & 0x1; 1992 sc->led_mode = (val >> 6) & 0x7; 1993 sc->rx_ant = (val >> 4) & 0x3; 1994 sc->tx_ant = (val >> 2) & 0x3; 1995 sc->nb_ant = val & 0x3; 1996 1997 /* read MAC address */ 1998 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1999 2000 /* read default values for BBP registers */ 2001 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2002 2003 /* read Tx power for all b/g channels */ 2004 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2005 } 2006 2007 Static int 2008 ural_bbp_init(struct ural_softc *sc) 2009 { 2010 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2011 int i, ntries; 2012 2013 /* wait for BBP to be ready */ 2014 for (ntries = 0; ntries < 100; ntries++) { 2015 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2016 break; 2017 DELAY(1000); 2018 } 2019 if (ntries == 100) { 2020 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2021 return EIO; 2022 } 2023 2024 /* initialize BBP registers to default values */ 2025 for (i = 0; i < N(ural_def_bbp); i++) 2026 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2027 2028 #if 0 2029 /* initialize BBP registers to values stored in EEPROM */ 2030 for (i = 0; i < 16; i++) { 2031 if (sc->bbp_prom[i].reg == 0xff) 2032 continue; 2033 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2034 } 2035 #endif 2036 2037 return 0; 2038 #undef N 2039 } 2040 2041 Static void 2042 ural_set_txantenna(struct ural_softc *sc, int antenna) 2043 { 2044 uint16_t tmp; 2045 uint8_t tx; 2046 2047 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2048 if (antenna == 1) 2049 tx |= RAL_BBP_ANTA; 2050 else if (antenna == 2) 2051 tx |= RAL_BBP_ANTB; 2052 else 2053 tx |= RAL_BBP_DIVERSITY; 2054 2055 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2056 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2057 sc->rf_rev == RAL_RF_5222) 2058 tx |= RAL_BBP_FLIPIQ; 2059 2060 ural_bbp_write(sc, RAL_BBP_TX, tx); 2061 2062 /* update values in PHY_CSR5 and PHY_CSR6 */ 2063 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2064 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2065 2066 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2067 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2068 } 2069 2070 Static void 2071 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2072 { 2073 uint8_t rx; 2074 2075 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2076 if (antenna == 1) 2077 rx |= RAL_BBP_ANTA; 2078 else if (antenna == 2) 2079 rx |= RAL_BBP_ANTB; 2080 else 2081 rx |= RAL_BBP_DIVERSITY; 2082 2083 /* need to force no I/Q flip for RF 2525e and 2526 */ 2084 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2085 rx &= ~RAL_BBP_FLIPIQ; 2086 2087 ural_bbp_write(sc, RAL_BBP_RX, rx); 2088 } 2089 2090 Static int 2091 ural_init(struct ifnet *ifp) 2092 { 2093 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2094 struct ural_softc *sc = ifp->if_softc; 2095 struct ieee80211com *ic = &sc->sc_ic; 2096 struct ieee80211_key *wk; 2097 uint16_t tmp; 2098 usbd_status error; 2099 int i, ntries; 2100 2101 ural_set_testmode(sc); 2102 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2103 2104 ural_stop(ifp, 0); 2105 2106 /* initialize MAC registers to default values */ 2107 for (i = 0; i < N(ural_def_mac); i++) 2108 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2109 2110 /* wait for BBP and RF to wake up (this can take a long time!) */ 2111 for (ntries = 0; ntries < 100; ntries++) { 2112 tmp = ural_read(sc, RAL_MAC_CSR17); 2113 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2114 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2115 break; 2116 DELAY(1000); 2117 } 2118 if (ntries == 100) { 2119 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2120 device_xname(sc->sc_dev)); 2121 error = EIO; 2122 goto fail; 2123 } 2124 2125 /* we're ready! */ 2126 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2127 2128 /* set basic rate set (will be updated later) */ 2129 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2130 2131 error = ural_bbp_init(sc); 2132 if (error != 0) 2133 goto fail; 2134 2135 /* set default BSS channel */ 2136 ural_set_chan(sc, ic->ic_curchan); 2137 2138 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2139 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2140 2141 ural_set_txantenna(sc, sc->tx_ant); 2142 ural_set_rxantenna(sc, sc->rx_ant); 2143 2144 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2145 ural_set_macaddr(sc, ic->ic_myaddr); 2146 2147 /* 2148 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2149 */ 2150 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2151 wk = &ic->ic_crypto.cs_nw_keys[i]; 2152 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2153 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2154 } 2155 2156 /* 2157 * Allocate xfer for AMRR statistics requests. 2158 */ 2159 struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); 2160 error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); 2161 if (error) { 2162 printf("%s: could not allocate AMRR xfer\n", 2163 device_xname(sc->sc_dev)); 2164 goto fail; 2165 } 2166 2167 /* 2168 * Open Tx and Rx USB bulk pipes. 2169 */ 2170 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2171 &sc->sc_tx_pipeh); 2172 if (error != 0) { 2173 printf("%s: could not open Tx pipe: %s\n", 2174 device_xname(sc->sc_dev), usbd_errstr(error)); 2175 goto fail; 2176 } 2177 2178 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2179 &sc->sc_rx_pipeh); 2180 if (error != 0) { 2181 printf("%s: could not open Rx pipe: %s\n", 2182 device_xname(sc->sc_dev), usbd_errstr(error)); 2183 goto fail; 2184 } 2185 2186 /* 2187 * Allocate Tx and Rx xfer queues. 2188 */ 2189 error = ural_alloc_tx_list(sc); 2190 if (error != 0) { 2191 printf("%s: could not allocate Tx list\n", 2192 device_xname(sc->sc_dev)); 2193 goto fail; 2194 } 2195 2196 error = ural_alloc_rx_list(sc); 2197 if (error != 0) { 2198 printf("%s: could not allocate Rx list\n", 2199 device_xname(sc->sc_dev)); 2200 goto fail; 2201 } 2202 2203 /* 2204 * Start up the receive pipe. 2205 */ 2206 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2207 struct ural_rx_data *data = &sc->rx_data[i]; 2208 2209 usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, 2210 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2211 usbd_transfer(data->xfer); 2212 } 2213 2214 /* kick Rx */ 2215 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2216 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2217 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2218 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2219 tmp |= RAL_DROP_TODS; 2220 if (!(ifp->if_flags & IFF_PROMISC)) 2221 tmp |= RAL_DROP_NOT_TO_ME; 2222 } 2223 ural_write(sc, RAL_TXRX_CSR2, tmp); 2224 2225 ifp->if_flags &= ~IFF_OACTIVE; 2226 ifp->if_flags |= IFF_RUNNING; 2227 2228 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2229 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2230 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2231 } else 2232 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2233 2234 return 0; 2235 2236 fail: ural_stop(ifp, 1); 2237 return error; 2238 #undef N 2239 } 2240 2241 Static void 2242 ural_stop(struct ifnet *ifp, int disable) 2243 { 2244 struct ural_softc *sc = ifp->if_softc; 2245 struct ieee80211com *ic = &sc->sc_ic; 2246 2247 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2248 2249 sc->sc_tx_timer = 0; 2250 ifp->if_timer = 0; 2251 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2252 2253 /* disable Rx */ 2254 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2255 2256 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2257 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2258 ural_write(sc, RAL_MAC_CSR1, 0); 2259 2260 if (sc->amrr_xfer != NULL) { 2261 usbd_destroy_xfer(sc->amrr_xfer); 2262 sc->amrr_xfer = NULL; 2263 } 2264 2265 if (sc->sc_rx_pipeh != NULL) { 2266 usbd_abort_pipe(sc->sc_rx_pipeh); 2267 usbd_close_pipe(sc->sc_rx_pipeh); 2268 sc->sc_rx_pipeh = NULL; 2269 } 2270 2271 if (sc->sc_tx_pipeh != NULL) { 2272 usbd_abort_pipe(sc->sc_tx_pipeh); 2273 usbd_close_pipe(sc->sc_tx_pipeh); 2274 sc->sc_tx_pipeh = NULL; 2275 } 2276 2277 ural_free_rx_list(sc); 2278 ural_free_tx_list(sc); 2279 } 2280 2281 int 2282 ural_activate(device_t self, enum devact act) 2283 { 2284 struct ural_softc *sc = device_private(self); 2285 2286 switch (act) { 2287 case DVACT_DEACTIVATE: 2288 if_deactivate(&sc->sc_if); 2289 return 0; 2290 default: 2291 return EOPNOTSUPP; 2292 } 2293 } 2294 2295 Static void 2296 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2297 { 2298 int i; 2299 2300 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2301 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2302 2303 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2304 2305 /* set rate to some reasonable initial value */ 2306 for (i = ni->ni_rates.rs_nrates - 1; 2307 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2308 i--); 2309 ni->ni_txrate = i; 2310 2311 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2312 } 2313 2314 Static void 2315 ural_amrr_timeout(void *arg) 2316 { 2317 struct ural_softc *sc = (struct ural_softc *)arg; 2318 usb_device_request_t req; 2319 int s; 2320 2321 s = splusb(); 2322 2323 /* 2324 * Asynchronously read statistic registers (cleared by read). 2325 */ 2326 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2327 req.bRequest = RAL_READ_MULTI_MAC; 2328 USETW(req.wValue, 0); 2329 USETW(req.wIndex, RAL_STA_CSR0); 2330 USETW(req.wLength, sizeof(sc->sta)); 2331 2332 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2333 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, 2334 ural_amrr_update); 2335 (void)usbd_transfer(sc->amrr_xfer); 2336 2337 splx(s); 2338 } 2339 2340 Static void 2341 ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2342 usbd_status status) 2343 { 2344 struct ural_softc *sc = (struct ural_softc *)priv; 2345 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2346 2347 if (status != USBD_NORMAL_COMPLETION) { 2348 printf("%s: could not retrieve Tx statistics - " 2349 "cancelling automatic rate control\n", 2350 device_xname(sc->sc_dev)); 2351 return; 2352 } 2353 2354 /* count TX retry-fail as Tx errors */ 2355 ifp->if_oerrors += sc->sta[9]; 2356 2357 sc->amn.amn_retrycnt = 2358 sc->sta[7] + /* TX one-retry ok count */ 2359 sc->sta[8] + /* TX more-retry ok count */ 2360 sc->sta[9]; /* TX retry-fail count */ 2361 2362 sc->amn.amn_txcnt = 2363 sc->amn.amn_retrycnt + 2364 sc->sta[6]; /* TX no-retry ok count */ 2365 2366 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2367 2368 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2369 } 2370
Indexes created Fri Oct 03 02:09:57 GMT 2025