if_ural.c revision 1.45
1 /* $NetBSD: if_ural.c,v 1.45 2015/04/08 12:29:42 nonaka Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.45 2015/04/08 12:29:42 nonaka Exp $"); 28 29 #include <sys/param.h> 30 #include <sys/sockio.h> 31 #include <sys/sysctl.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/malloc.h> 37 #include <sys/conf.h> 38 #include <sys/device.h> 39 40 #include <sys/bus.h> 41 #include <machine/endian.h> 42 #include <sys/intr.h> 43 44 #include <net/bpf.h> 45 #include <net/if.h> 46 #include <net/if_arp.h> 47 #include <net/if_dl.h> 48 #include <net/if_ether.h> 49 #include <net/if_media.h> 50 #include <net/if_types.h> 51 52 #include <netinet/in.h> 53 #include <netinet/in_systm.h> 54 #include <netinet/in_var.h> 55 #include <netinet/ip.h> 56 57 #include <net80211/ieee80211_netbsd.h> 58 #include <net80211/ieee80211_var.h> 59 #include <net80211/ieee80211_amrr.h> 60 #include <net80211/ieee80211_radiotap.h> 61 62 #include <dev/usb/usb.h> 63 #include <dev/usb/usbdi.h> 64 #include <dev/usb/usbdi_util.h> 65 #include <dev/usb/usbdevs.h> 66 67 #include <dev/usb/if_uralreg.h> 68 #include <dev/usb/if_uralvar.h> 69 70 #ifdef URAL_DEBUG 71 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 72 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 73 int ural_debug = 0; 74 #else 75 #define DPRINTF(x) 76 #define DPRINTFN(n, x) 77 #endif 78 79 /* various supported device vendors/products */ 80 static const struct usb_devno ural_devs[] = { 81 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 82 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 83 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 84 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 85 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 86 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 87 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 88 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 89 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 90 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 91 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 92 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 93 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 95 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 96 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 97 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 98 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 99 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 100 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 101 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 102 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 103 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 104 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 105 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 106 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 107 }; 108 109 Static int ural_alloc_tx_list(struct ural_softc *); 110 Static void ural_free_tx_list(struct ural_softc *); 111 Static int ural_alloc_rx_list(struct ural_softc *); 112 Static void ural_free_rx_list(struct ural_softc *); 113 Static int ural_media_change(struct ifnet *); 114 Static void ural_next_scan(void *); 115 Static void ural_task(void *); 116 Static int ural_newstate(struct ieee80211com *, 117 enum ieee80211_state, int); 118 Static int ural_rxrate(struct ural_rx_desc *); 119 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 120 usbd_status); 121 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 122 usbd_status); 123 Static int ural_ack_rate(struct ieee80211com *, int); 124 Static uint16_t ural_txtime(int, int, uint32_t); 125 Static uint8_t ural_plcp_signal(int); 126 Static void ural_setup_tx_desc(struct ural_softc *, 127 struct ural_tx_desc *, uint32_t, int, int); 128 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 129 struct ieee80211_node *); 130 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 131 struct ieee80211_node *); 132 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 133 struct ieee80211_node *); 134 Static void ural_start(struct ifnet *); 135 Static void ural_watchdog(struct ifnet *); 136 Static int ural_reset(struct ifnet *); 137 Static int ural_ioctl(struct ifnet *, u_long, void *); 138 Static void ural_set_testmode(struct ural_softc *); 139 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 140 int); 141 Static uint16_t ural_read(struct ural_softc *, uint16_t); 142 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 143 int); 144 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 145 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 146 int); 147 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 148 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 149 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 150 Static void ural_set_chan(struct ural_softc *, 151 struct ieee80211_channel *); 152 Static void ural_disable_rf_tune(struct ural_softc *); 153 Static void ural_enable_tsf_sync(struct ural_softc *); 154 Static void ural_update_slot(struct ifnet *); 155 Static void ural_set_txpreamble(struct ural_softc *); 156 Static void ural_set_basicrates(struct ural_softc *); 157 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 158 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 159 Static void ural_update_promisc(struct ural_softc *); 160 Static const char *ural_get_rf(int); 161 Static void ural_read_eeprom(struct ural_softc *); 162 Static int ural_bbp_init(struct ural_softc *); 163 Static void ural_set_txantenna(struct ural_softc *, int); 164 Static void ural_set_rxantenna(struct ural_softc *, int); 165 Static int ural_init(struct ifnet *); 166 Static void ural_stop(struct ifnet *, int); 167 Static void ural_amrr_start(struct ural_softc *, 168 struct ieee80211_node *); 169 Static void ural_amrr_timeout(void *); 170 Static void ural_amrr_update(usbd_xfer_handle, usbd_private_handle, 171 usbd_status status); 172 173 /* 174 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 175 */ 176 static const struct ieee80211_rateset ural_rateset_11a = 177 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 178 179 static const struct ieee80211_rateset ural_rateset_11b = 180 { 4, { 2, 4, 11, 22 } }; 181 182 static const struct ieee80211_rateset ural_rateset_11g = 183 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 184 185 /* 186 * Default values for MAC registers; values taken from the reference driver. 187 */ 188 static const struct { 189 uint16_t reg; 190 uint16_t val; 191 } ural_def_mac[] = { 192 { RAL_TXRX_CSR5, 0x8c8d }, 193 { RAL_TXRX_CSR6, 0x8b8a }, 194 { RAL_TXRX_CSR7, 0x8687 }, 195 { RAL_TXRX_CSR8, 0x0085 }, 196 { RAL_MAC_CSR13, 0x1111 }, 197 { RAL_MAC_CSR14, 0x1e11 }, 198 { RAL_TXRX_CSR21, 0xe78f }, 199 { RAL_MAC_CSR9, 0xff1d }, 200 { RAL_MAC_CSR11, 0x0002 }, 201 { RAL_MAC_CSR22, 0x0053 }, 202 { RAL_MAC_CSR15, 0x0000 }, 203 { RAL_MAC_CSR8, 0x0780 }, 204 { RAL_TXRX_CSR19, 0x0000 }, 205 { RAL_TXRX_CSR18, 0x005a }, 206 { RAL_PHY_CSR2, 0x0000 }, 207 { RAL_TXRX_CSR0, 0x1ec0 }, 208 { RAL_PHY_CSR4, 0x000f } 209 }; 210 211 /* 212 * Default values for BBP registers; values taken from the reference driver. 213 */ 214 static const struct { 215 uint8_t reg; 216 uint8_t val; 217 } ural_def_bbp[] = { 218 { 3, 0x02 }, 219 { 4, 0x19 }, 220 { 14, 0x1c }, 221 { 15, 0x30 }, 222 { 16, 0xac }, 223 { 17, 0x48 }, 224 { 18, 0x18 }, 225 { 19, 0xff }, 226 { 20, 0x1e }, 227 { 21, 0x08 }, 228 { 22, 0x08 }, 229 { 23, 0x08 }, 230 { 24, 0x80 }, 231 { 25, 0x50 }, 232 { 26, 0x08 }, 233 { 27, 0x23 }, 234 { 30, 0x10 }, 235 { 31, 0x2b }, 236 { 32, 0xb9 }, 237 { 34, 0x12 }, 238 { 35, 0x50 }, 239 { 39, 0xc4 }, 240 { 40, 0x02 }, 241 { 41, 0x60 }, 242 { 53, 0x10 }, 243 { 54, 0x18 }, 244 { 56, 0x08 }, 245 { 57, 0x10 }, 246 { 58, 0x08 }, 247 { 61, 0x60 }, 248 { 62, 0x10 }, 249 { 75, 0xff } 250 }; 251 252 /* 253 * Default values for RF register R2 indexed by channel numbers. 254 */ 255 static const uint32_t ural_rf2522_r2[] = { 256 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 257 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 258 }; 259 260 static const uint32_t ural_rf2523_r2[] = { 261 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 262 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 263 }; 264 265 static const uint32_t ural_rf2524_r2[] = { 266 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 267 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 268 }; 269 270 static const uint32_t ural_rf2525_r2[] = { 271 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 272 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 273 }; 274 275 static const uint32_t ural_rf2525_hi_r2[] = { 276 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 277 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 278 }; 279 280 static const uint32_t ural_rf2525e_r2[] = { 281 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 282 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 283 }; 284 285 static const uint32_t ural_rf2526_hi_r2[] = { 286 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 287 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 288 }; 289 290 static const uint32_t ural_rf2526_r2[] = { 291 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 292 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 293 }; 294 295 /* 296 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 297 * values taken from the reference driver. 298 */ 299 static const struct { 300 uint8_t chan; 301 uint32_t r1; 302 uint32_t r2; 303 uint32_t r4; 304 } ural_rf5222[] = { 305 { 1, 0x08808, 0x0044d, 0x00282 }, 306 { 2, 0x08808, 0x0044e, 0x00282 }, 307 { 3, 0x08808, 0x0044f, 0x00282 }, 308 { 4, 0x08808, 0x00460, 0x00282 }, 309 { 5, 0x08808, 0x00461, 0x00282 }, 310 { 6, 0x08808, 0x00462, 0x00282 }, 311 { 7, 0x08808, 0x00463, 0x00282 }, 312 { 8, 0x08808, 0x00464, 0x00282 }, 313 { 9, 0x08808, 0x00465, 0x00282 }, 314 { 10, 0x08808, 0x00466, 0x00282 }, 315 { 11, 0x08808, 0x00467, 0x00282 }, 316 { 12, 0x08808, 0x00468, 0x00282 }, 317 { 13, 0x08808, 0x00469, 0x00282 }, 318 { 14, 0x08808, 0x0046b, 0x00286 }, 319 320 { 36, 0x08804, 0x06225, 0x00287 }, 321 { 40, 0x08804, 0x06226, 0x00287 }, 322 { 44, 0x08804, 0x06227, 0x00287 }, 323 { 48, 0x08804, 0x06228, 0x00287 }, 324 { 52, 0x08804, 0x06229, 0x00287 }, 325 { 56, 0x08804, 0x0622a, 0x00287 }, 326 { 60, 0x08804, 0x0622b, 0x00287 }, 327 { 64, 0x08804, 0x0622c, 0x00287 }, 328 329 { 100, 0x08804, 0x02200, 0x00283 }, 330 { 104, 0x08804, 0x02201, 0x00283 }, 331 { 108, 0x08804, 0x02202, 0x00283 }, 332 { 112, 0x08804, 0x02203, 0x00283 }, 333 { 116, 0x08804, 0x02204, 0x00283 }, 334 { 120, 0x08804, 0x02205, 0x00283 }, 335 { 124, 0x08804, 0x02206, 0x00283 }, 336 { 128, 0x08804, 0x02207, 0x00283 }, 337 { 132, 0x08804, 0x02208, 0x00283 }, 338 { 136, 0x08804, 0x02209, 0x00283 }, 339 { 140, 0x08804, 0x0220a, 0x00283 }, 340 341 { 149, 0x08808, 0x02429, 0x00281 }, 342 { 153, 0x08808, 0x0242b, 0x00281 }, 343 { 157, 0x08808, 0x0242d, 0x00281 }, 344 { 161, 0x08808, 0x0242f, 0x00281 } 345 }; 346 347 int ural_match(device_t, cfdata_t, void *); 348 void ural_attach(device_t, device_t, void *); 349 int ural_detach(device_t, int); 350 int ural_activate(device_t, enum devact); 351 extern struct cfdriver ural_cd; 352 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, ural_detach, ural_activate); 353 354 int 355 ural_match(device_t parent, cfdata_t match, void *aux) 356 { 357 struct usb_attach_arg *uaa = aux; 358 359 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 360 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 361 } 362 363 void 364 ural_attach(device_t parent, device_t self, void *aux) 365 { 366 struct ural_softc *sc = device_private(self); 367 struct usb_attach_arg *uaa = aux; 368 struct ieee80211com *ic = &sc->sc_ic; 369 struct ifnet *ifp = &sc->sc_if; 370 usb_interface_descriptor_t *id; 371 usb_endpoint_descriptor_t *ed; 372 usbd_status error; 373 char *devinfop; 374 int i; 375 376 sc->sc_dev = self; 377 sc->sc_udev = uaa->device; 378 379 aprint_naive("\n"); 380 aprint_normal("\n"); 381 382 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 383 aprint_normal_dev(self, "%s\n", devinfop); 384 usbd_devinfo_free(devinfop); 385 386 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 387 if (error != 0) { 388 aprint_error_dev(self, "failed to set configuration" 389 ", err=%s\n", usbd_errstr(error)); 390 return; 391 } 392 393 /* get the first interface handle */ 394 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 395 &sc->sc_iface); 396 if (error != 0) { 397 aprint_error_dev(self, "could not get interface handle\n"); 398 return; 399 } 400 401 /* 402 * Find endpoints. 403 */ 404 id = usbd_get_interface_descriptor(sc->sc_iface); 405 406 sc->sc_rx_no = sc->sc_tx_no = -1; 407 for (i = 0; i < id->bNumEndpoints; i++) { 408 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 409 if (ed == NULL) { 410 aprint_error_dev(self, 411 "no endpoint descriptor for %d\n", i); 412 return; 413 } 414 415 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 416 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 417 sc->sc_rx_no = ed->bEndpointAddress; 418 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 419 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 420 sc->sc_tx_no = ed->bEndpointAddress; 421 } 422 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 423 aprint_error_dev(self, "missing endpoint\n"); 424 return; 425 } 426 427 usb_init_task(&sc->sc_task, ural_task, sc, 0); 428 callout_init(&sc->sc_scan_ch, 0); 429 sc->amrr.amrr_min_success_threshold = 1; 430 sc->amrr.amrr_max_success_threshold = 15; 431 callout_init(&sc->sc_amrr_ch, 0); 432 433 /* retrieve RT2570 rev. no */ 434 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 435 436 /* retrieve MAC address and various other things from EEPROM */ 437 ural_read_eeprom(sc); 438 439 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 440 sc->asic_rev, ural_get_rf(sc->rf_rev)); 441 442 ifp->if_softc = sc; 443 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 444 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 445 ifp->if_init = ural_init; 446 ifp->if_ioctl = ural_ioctl; 447 ifp->if_start = ural_start; 448 ifp->if_watchdog = ural_watchdog; 449 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 450 IFQ_SET_READY(&ifp->if_snd); 451 452 ic->ic_ifp = ifp; 453 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 454 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 455 ic->ic_state = IEEE80211_S_INIT; 456 457 /* set device capabilities */ 458 ic->ic_caps = 459 IEEE80211_C_IBSS | /* IBSS mode supported */ 460 IEEE80211_C_MONITOR | /* monitor mode supported */ 461 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 462 IEEE80211_C_TXPMGT | /* tx power management */ 463 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 464 IEEE80211_C_SHSLOT | /* short slot time supported */ 465 IEEE80211_C_WPA; /* 802.11i */ 466 467 if (sc->rf_rev == RAL_RF_5222) { 468 /* set supported .11a rates */ 469 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 470 471 /* set supported .11a channels */ 472 for (i = 36; i <= 64; i += 4) { 473 ic->ic_channels[i].ic_freq = 474 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 475 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 476 } 477 for (i = 100; i <= 140; i += 4) { 478 ic->ic_channels[i].ic_freq = 479 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 480 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 481 } 482 for (i = 149; i <= 161; i += 4) { 483 ic->ic_channels[i].ic_freq = 484 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 485 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 486 } 487 } 488 489 /* set supported .11b and .11g rates */ 490 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 491 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 492 493 /* set supported .11b and .11g channels (1 through 14) */ 494 for (i = 1; i <= 14; i++) { 495 ic->ic_channels[i].ic_freq = 496 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 497 ic->ic_channels[i].ic_flags = 498 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 499 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 500 } 501 502 if_attach(ifp); 503 ieee80211_ifattach(ic); 504 ic->ic_reset = ural_reset; 505 506 /* override state transition machine */ 507 sc->sc_newstate = ic->ic_newstate; 508 ic->ic_newstate = ural_newstate; 509 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 510 511 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 512 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 513 514 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 515 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 516 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 517 518 sc->sc_txtap_len = sizeof sc->sc_txtapu; 519 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 520 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 521 522 ieee80211_announce(ic); 523 524 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 525 sc->sc_dev); 526 527 if (!pmf_device_register(self, NULL, NULL)) 528 aprint_error_dev(self, "couldn't establish power handler\n"); 529 530 return; 531 } 532 533 int 534 ural_detach(device_t self, int flags) 535 { 536 struct ural_softc *sc = device_private(self); 537 struct ieee80211com *ic = &sc->sc_ic; 538 struct ifnet *ifp = &sc->sc_if; 539 int s; 540 541 pmf_device_deregister(self); 542 543 s = splusb(); 544 545 ural_stop(ifp, 1); 546 usb_rem_task(sc->sc_udev, &sc->sc_task); 547 callout_stop(&sc->sc_scan_ch); 548 callout_stop(&sc->sc_amrr_ch); 549 550 if (sc->amrr_xfer != NULL) { 551 usbd_free_xfer(sc->amrr_xfer); 552 sc->amrr_xfer = NULL; 553 } 554 555 if (sc->sc_rx_pipeh != NULL) { 556 usbd_abort_pipe(sc->sc_rx_pipeh); 557 usbd_close_pipe(sc->sc_rx_pipeh); 558 } 559 560 if (sc->sc_tx_pipeh != NULL) { 561 usbd_abort_pipe(sc->sc_tx_pipeh); 562 usbd_close_pipe(sc->sc_tx_pipeh); 563 } 564 565 bpf_detach(ifp); 566 ieee80211_ifdetach(ic); 567 if_detach(ifp); 568 569 splx(s); 570 571 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 572 sc->sc_dev); 573 574 return 0; 575 } 576 577 Static int 578 ural_alloc_tx_list(struct ural_softc *sc) 579 { 580 struct ural_tx_data *data; 581 int i, error; 582 583 sc->tx_queued = 0; 584 585 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 586 data = &sc->tx_data[i]; 587 588 data->sc = sc; 589 590 data->xfer = usbd_alloc_xfer(sc->sc_udev); 591 if (data->xfer == NULL) { 592 printf("%s: could not allocate tx xfer\n", 593 device_xname(sc->sc_dev)); 594 error = ENOMEM; 595 goto fail; 596 } 597 598 data->buf = usbd_alloc_buffer(data->xfer, 599 RAL_TX_DESC_SIZE + MCLBYTES); 600 if (data->buf == NULL) { 601 printf("%s: could not allocate tx buffer\n", 602 device_xname(sc->sc_dev)); 603 error = ENOMEM; 604 goto fail; 605 } 606 } 607 608 return 0; 609 610 fail: ural_free_tx_list(sc); 611 return error; 612 } 613 614 Static void 615 ural_free_tx_list(struct ural_softc *sc) 616 { 617 struct ural_tx_data *data; 618 int i; 619 620 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 621 data = &sc->tx_data[i]; 622 623 if (data->xfer != NULL) { 624 usbd_free_xfer(data->xfer); 625 data->xfer = NULL; 626 } 627 628 if (data->ni != NULL) { 629 ieee80211_free_node(data->ni); 630 data->ni = NULL; 631 } 632 } 633 } 634 635 Static int 636 ural_alloc_rx_list(struct ural_softc *sc) 637 { 638 struct ural_rx_data *data; 639 int i, error; 640 641 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 642 data = &sc->rx_data[i]; 643 644 data->sc = sc; 645 646 data->xfer = usbd_alloc_xfer(sc->sc_udev); 647 if (data->xfer == NULL) { 648 printf("%s: could not allocate rx xfer\n", 649 device_xname(sc->sc_dev)); 650 error = ENOMEM; 651 goto fail; 652 } 653 654 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 655 printf("%s: could not allocate rx buffer\n", 656 device_xname(sc->sc_dev)); 657 error = ENOMEM; 658 goto fail; 659 } 660 661 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 662 if (data->m == NULL) { 663 printf("%s: could not allocate rx mbuf\n", 664 device_xname(sc->sc_dev)); 665 error = ENOMEM; 666 goto fail; 667 } 668 669 MCLGET(data->m, M_DONTWAIT); 670 if (!(data->m->m_flags & M_EXT)) { 671 printf("%s: could not allocate rx mbuf cluster\n", 672 device_xname(sc->sc_dev)); 673 error = ENOMEM; 674 goto fail; 675 } 676 677 data->buf = mtod(data->m, uint8_t *); 678 } 679 680 return 0; 681 682 fail: ural_free_tx_list(sc); 683 return error; 684 } 685 686 Static void 687 ural_free_rx_list(struct ural_softc *sc) 688 { 689 struct ural_rx_data *data; 690 int i; 691 692 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 693 data = &sc->rx_data[i]; 694 695 if (data->xfer != NULL) { 696 usbd_free_xfer(data->xfer); 697 data->xfer = NULL; 698 } 699 700 if (data->m != NULL) { 701 m_freem(data->m); 702 data->m = NULL; 703 } 704 } 705 } 706 707 Static int 708 ural_media_change(struct ifnet *ifp) 709 { 710 int error; 711 712 error = ieee80211_media_change(ifp); 713 if (error != ENETRESET) 714 return error; 715 716 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 717 ural_init(ifp); 718 719 return 0; 720 } 721 722 /* 723 * This function is called periodically (every 200ms) during scanning to 724 * switch from one channel to another. 725 */ 726 Static void 727 ural_next_scan(void *arg) 728 { 729 struct ural_softc *sc = arg; 730 struct ieee80211com *ic = &sc->sc_ic; 731 732 if (ic->ic_state == IEEE80211_S_SCAN) 733 ieee80211_next_scan(ic); 734 } 735 736 Static void 737 ural_task(void *arg) 738 { 739 struct ural_softc *sc = arg; 740 struct ieee80211com *ic = &sc->sc_ic; 741 enum ieee80211_state ostate; 742 struct ieee80211_node *ni; 743 struct mbuf *m; 744 745 ostate = ic->ic_state; 746 747 switch (sc->sc_state) { 748 case IEEE80211_S_INIT: 749 if (ostate == IEEE80211_S_RUN) { 750 /* abort TSF synchronization */ 751 ural_write(sc, RAL_TXRX_CSR19, 0); 752 753 /* force tx led to stop blinking */ 754 ural_write(sc, RAL_MAC_CSR20, 0); 755 } 756 break; 757 758 case IEEE80211_S_SCAN: 759 ural_set_chan(sc, ic->ic_curchan); 760 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 761 break; 762 763 case IEEE80211_S_AUTH: 764 ural_set_chan(sc, ic->ic_curchan); 765 break; 766 767 case IEEE80211_S_ASSOC: 768 ural_set_chan(sc, ic->ic_curchan); 769 break; 770 771 case IEEE80211_S_RUN: 772 ural_set_chan(sc, ic->ic_curchan); 773 774 ni = ic->ic_bss; 775 776 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 777 ural_update_slot(ic->ic_ifp); 778 ural_set_txpreamble(sc); 779 ural_set_basicrates(sc); 780 ural_set_bssid(sc, ni->ni_bssid); 781 } 782 783 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 784 ic->ic_opmode == IEEE80211_M_IBSS) { 785 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 786 if (m == NULL) { 787 printf("%s: could not allocate beacon\n", 788 device_xname(sc->sc_dev)); 789 return; 790 } 791 792 if (ural_tx_bcn(sc, m, ni) != 0) { 793 m_freem(m); 794 printf("%s: could not send beacon\n", 795 device_xname(sc->sc_dev)); 796 return; 797 } 798 799 /* beacon is no longer needed */ 800 m_freem(m); 801 } 802 803 /* make tx led blink on tx (controlled by ASIC) */ 804 ural_write(sc, RAL_MAC_CSR20, 1); 805 806 if (ic->ic_opmode != IEEE80211_M_MONITOR) 807 ural_enable_tsf_sync(sc); 808 809 /* enable automatic rate adaptation in STA mode */ 810 if (ic->ic_opmode == IEEE80211_M_STA && 811 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 812 ural_amrr_start(sc, ni); 813 814 break; 815 } 816 817 sc->sc_newstate(ic, sc->sc_state, -1); 818 } 819 820 Static int 821 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 822 int arg) 823 { 824 struct ural_softc *sc = ic->ic_ifp->if_softc; 825 826 usb_rem_task(sc->sc_udev, &sc->sc_task); 827 callout_stop(&sc->sc_scan_ch); 828 callout_stop(&sc->sc_amrr_ch); 829 830 /* do it in a process context */ 831 sc->sc_state = nstate; 832 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 833 834 return 0; 835 } 836 837 /* quickly determine if a given rate is CCK or OFDM */ 838 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 839 840 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 841 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 842 843 #define RAL_SIFS 10 /* us */ 844 845 #define RAL_RXTX_TURNAROUND 5 /* us */ 846 847 /* 848 * This function is only used by the Rx radiotap code. 849 */ 850 Static int 851 ural_rxrate(struct ural_rx_desc *desc) 852 { 853 if (le32toh(desc->flags) & RAL_RX_OFDM) { 854 /* reverse function of ural_plcp_signal */ 855 switch (desc->rate) { 856 case 0xb: return 12; 857 case 0xf: return 18; 858 case 0xa: return 24; 859 case 0xe: return 36; 860 case 0x9: return 48; 861 case 0xd: return 72; 862 case 0x8: return 96; 863 case 0xc: return 108; 864 } 865 } else { 866 if (desc->rate == 10) 867 return 2; 868 if (desc->rate == 20) 869 return 4; 870 if (desc->rate == 55) 871 return 11; 872 if (desc->rate == 110) 873 return 22; 874 } 875 return 2; /* should not get there */ 876 } 877 878 Static void 879 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, 880 usbd_status status) 881 { 882 struct ural_tx_data *data = priv; 883 struct ural_softc *sc = data->sc; 884 struct ifnet *ifp = &sc->sc_if; 885 int s; 886 887 if (status != USBD_NORMAL_COMPLETION) { 888 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 889 return; 890 891 printf("%s: could not transmit buffer: %s\n", 892 device_xname(sc->sc_dev), usbd_errstr(status)); 893 894 if (status == USBD_STALLED) 895 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 896 897 ifp->if_oerrors++; 898 return; 899 } 900 901 s = splnet(); 902 903 m_freem(data->m); 904 data->m = NULL; 905 ieee80211_free_node(data->ni); 906 data->ni = NULL; 907 908 sc->tx_queued--; 909 ifp->if_opackets++; 910 911 DPRINTFN(10, ("tx done\n")); 912 913 sc->sc_tx_timer = 0; 914 ifp->if_flags &= ~IFF_OACTIVE; 915 ural_start(ifp); 916 917 splx(s); 918 } 919 920 Static void 921 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 922 { 923 struct ural_rx_data *data = priv; 924 struct ural_softc *sc = data->sc; 925 struct ieee80211com *ic = &sc->sc_ic; 926 struct ifnet *ifp = &sc->sc_if; 927 struct ural_rx_desc *desc; 928 struct ieee80211_frame *wh; 929 struct ieee80211_node *ni; 930 struct mbuf *mnew, *m; 931 int s, len; 932 933 if (status != USBD_NORMAL_COMPLETION) { 934 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 935 return; 936 937 if (status == USBD_STALLED) 938 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 939 goto skip; 940 } 941 942 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 943 944 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 945 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 946 len)); 947 ifp->if_ierrors++; 948 goto skip; 949 } 950 951 /* rx descriptor is located at the end */ 952 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 953 954 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 955 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 956 /* 957 * This should not happen since we did not request to receive 958 * those frames when we filled RAL_TXRX_CSR2. 959 */ 960 DPRINTFN(5, ("PHY or CRC error\n")); 961 ifp->if_ierrors++; 962 goto skip; 963 } 964 965 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 966 if (mnew == NULL) { 967 ifp->if_ierrors++; 968 goto skip; 969 } 970 971 MCLGET(mnew, M_DONTWAIT); 972 if (!(mnew->m_flags & M_EXT)) { 973 ifp->if_ierrors++; 974 m_freem(mnew); 975 goto skip; 976 } 977 978 m = data->m; 979 data->m = mnew; 980 data->buf = mtod(data->m, uint8_t *); 981 982 /* finalize mbuf */ 983 m->m_pkthdr.rcvif = ifp; 984 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 985 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 986 987 s = splnet(); 988 989 if (sc->sc_drvbpf != NULL) { 990 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 991 992 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 993 tap->wr_rate = ural_rxrate(desc); 994 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 995 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 996 tap->wr_antenna = sc->rx_ant; 997 tap->wr_antsignal = desc->rssi; 998 999 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 1000 } 1001 1002 wh = mtod(m, struct ieee80211_frame *); 1003 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 1004 1005 /* send the frame to the 802.11 layer */ 1006 ieee80211_input(ic, m, ni, desc->rssi, 0); 1007 1008 /* node is no longer needed */ 1009 ieee80211_free_node(ni); 1010 1011 splx(s); 1012 1013 DPRINTFN(15, ("rx done\n")); 1014 1015 skip: /* setup a new transfer */ 1016 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 1017 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 1018 usbd_transfer(xfer); 1019 } 1020 1021 /* 1022 * Return the expected ack rate for a frame transmitted at rate `rate'. 1023 * XXX: this should depend on the destination node basic rate set. 1024 */ 1025 Static int 1026 ural_ack_rate(struct ieee80211com *ic, int rate) 1027 { 1028 switch (rate) { 1029 /* CCK rates */ 1030 case 2: 1031 return 2; 1032 case 4: 1033 case 11: 1034 case 22: 1035 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1036 1037 /* OFDM rates */ 1038 case 12: 1039 case 18: 1040 return 12; 1041 case 24: 1042 case 36: 1043 return 24; 1044 case 48: 1045 case 72: 1046 case 96: 1047 case 108: 1048 return 48; 1049 } 1050 1051 /* default to 1Mbps */ 1052 return 2; 1053 } 1054 1055 /* 1056 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1057 * The function automatically determines the operating mode depending on the 1058 * given rate. `flags' indicates whether short preamble is in use or not. 1059 */ 1060 Static uint16_t 1061 ural_txtime(int len, int rate, uint32_t flags) 1062 { 1063 uint16_t txtime; 1064 1065 if (RAL_RATE_IS_OFDM(rate)) { 1066 /* IEEE Std 802.11g-2003, pp. 37 */ 1067 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1068 txtime = 16 + 4 + 4 * txtime + 6; 1069 } else { 1070 /* IEEE Std 802.11b-1999, pp. 28 */ 1071 txtime = (16 * len + rate - 1) / rate; 1072 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1073 txtime += 72 + 24; 1074 else 1075 txtime += 144 + 48; 1076 } 1077 return txtime; 1078 } 1079 1080 Static uint8_t 1081 ural_plcp_signal(int rate) 1082 { 1083 switch (rate) { 1084 /* CCK rates (returned values are device-dependent) */ 1085 case 2: return 0x0; 1086 case 4: return 0x1; 1087 case 11: return 0x2; 1088 case 22: return 0x3; 1089 1090 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1091 case 12: return 0xb; 1092 case 18: return 0xf; 1093 case 24: return 0xa; 1094 case 36: return 0xe; 1095 case 48: return 0x9; 1096 case 72: return 0xd; 1097 case 96: return 0x8; 1098 case 108: return 0xc; 1099 1100 /* unsupported rates (should not get there) */ 1101 default: return 0xff; 1102 } 1103 } 1104 1105 Static void 1106 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1107 uint32_t flags, int len, int rate) 1108 { 1109 struct ieee80211com *ic = &sc->sc_ic; 1110 uint16_t plcp_length; 1111 int remainder; 1112 1113 desc->flags = htole32(flags); 1114 desc->flags |= htole32(RAL_TX_NEWSEQ); 1115 desc->flags |= htole32(len << 16); 1116 1117 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1118 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1119 1120 /* setup PLCP fields */ 1121 desc->plcp_signal = ural_plcp_signal(rate); 1122 desc->plcp_service = 4; 1123 1124 len += IEEE80211_CRC_LEN; 1125 if (RAL_RATE_IS_OFDM(rate)) { 1126 desc->flags |= htole32(RAL_TX_OFDM); 1127 1128 plcp_length = len & 0xfff; 1129 desc->plcp_length_hi = plcp_length >> 6; 1130 desc->plcp_length_lo = plcp_length & 0x3f; 1131 } else { 1132 plcp_length = (16 * len + rate - 1) / rate; 1133 if (rate == 22) { 1134 remainder = (16 * len) % 22; 1135 if (remainder != 0 && remainder < 7) 1136 desc->plcp_service |= RAL_PLCP_LENGEXT; 1137 } 1138 desc->plcp_length_hi = plcp_length >> 8; 1139 desc->plcp_length_lo = plcp_length & 0xff; 1140 1141 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1142 desc->plcp_signal |= 0x08; 1143 } 1144 1145 desc->iv = 0; 1146 desc->eiv = 0; 1147 } 1148 1149 #define RAL_TX_TIMEOUT 5000 1150 1151 Static int 1152 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1153 { 1154 struct ural_tx_desc *desc; 1155 usbd_xfer_handle xfer; 1156 uint8_t cmd = 0; 1157 usbd_status error; 1158 uint8_t *buf; 1159 int xferlen, rate; 1160 1161 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1162 1163 xfer = usbd_alloc_xfer(sc->sc_udev); 1164 if (xfer == NULL) 1165 return ENOMEM; 1166 1167 /* xfer length needs to be a multiple of two! */ 1168 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1169 1170 buf = usbd_alloc_buffer(xfer, xferlen); 1171 if (buf == NULL) { 1172 usbd_free_xfer(xfer); 1173 return ENOMEM; 1174 } 1175 1176 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1177 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1178 1179 error = usbd_sync_transfer(xfer); 1180 if (error != 0) { 1181 usbd_free_xfer(xfer); 1182 return error; 1183 } 1184 1185 desc = (struct ural_tx_desc *)buf; 1186 1187 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1188 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1189 m0->m_pkthdr.len, rate); 1190 1191 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1192 m0->m_pkthdr.len, rate, xferlen)); 1193 1194 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1195 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1196 1197 error = usbd_sync_transfer(xfer); 1198 usbd_free_xfer(xfer); 1199 1200 return error; 1201 } 1202 1203 Static int 1204 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1205 { 1206 struct ieee80211com *ic = &sc->sc_ic; 1207 struct ural_tx_desc *desc; 1208 struct ural_tx_data *data; 1209 struct ieee80211_frame *wh; 1210 struct ieee80211_key *k; 1211 uint32_t flags = 0; 1212 uint16_t dur; 1213 usbd_status error; 1214 int xferlen, rate; 1215 1216 data = &sc->tx_data[0]; 1217 desc = (struct ural_tx_desc *)data->buf; 1218 1219 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1220 1221 wh = mtod(m0, struct ieee80211_frame *); 1222 1223 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1224 k = ieee80211_crypto_encap(ic, ni, m0); 1225 if (k == NULL) { 1226 m_freem(m0); 1227 return ENOBUFS; 1228 } 1229 } 1230 1231 data->m = m0; 1232 data->ni = ni; 1233 1234 wh = mtod(m0, struct ieee80211_frame *); 1235 1236 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1237 flags |= RAL_TX_ACK; 1238 1239 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1240 *(uint16_t *)wh->i_dur = htole16(dur); 1241 1242 /* tell hardware to add timestamp for probe responses */ 1243 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1244 IEEE80211_FC0_TYPE_MGT && 1245 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1246 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1247 flags |= RAL_TX_TIMESTAMP; 1248 } 1249 1250 if (sc->sc_drvbpf != NULL) { 1251 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1252 1253 tap->wt_flags = 0; 1254 tap->wt_rate = rate; 1255 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1256 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1257 tap->wt_antenna = sc->tx_ant; 1258 1259 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1260 } 1261 1262 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1263 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1264 1265 /* align end on a 2-bytes boundary */ 1266 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1267 1268 /* 1269 * No space left in the last URB to store the extra 2 bytes, force 1270 * sending of another URB. 1271 */ 1272 if ((xferlen % 64) == 0) 1273 xferlen += 2; 1274 1275 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1276 m0->m_pkthdr.len, rate, xferlen)); 1277 1278 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1279 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1280 ural_txeof); 1281 1282 error = usbd_transfer(data->xfer); 1283 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1284 m_freem(m0); 1285 return error; 1286 } 1287 1288 sc->tx_queued++; 1289 1290 return 0; 1291 } 1292 1293 Static int 1294 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1295 { 1296 struct ieee80211com *ic = &sc->sc_ic; 1297 struct ural_tx_desc *desc; 1298 struct ural_tx_data *data; 1299 struct ieee80211_frame *wh; 1300 struct ieee80211_key *k; 1301 uint32_t flags = 0; 1302 uint16_t dur; 1303 usbd_status error; 1304 int xferlen, rate; 1305 1306 wh = mtod(m0, struct ieee80211_frame *); 1307 1308 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1309 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1310 else 1311 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1312 1313 rate &= IEEE80211_RATE_VAL; 1314 1315 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1316 k = ieee80211_crypto_encap(ic, ni, m0); 1317 if (k == NULL) { 1318 m_freem(m0); 1319 return ENOBUFS; 1320 } 1321 1322 /* packet header may have moved, reset our local pointer */ 1323 wh = mtod(m0, struct ieee80211_frame *); 1324 } 1325 1326 data = &sc->tx_data[0]; 1327 desc = (struct ural_tx_desc *)data->buf; 1328 1329 data->m = m0; 1330 data->ni = ni; 1331 1332 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1333 flags |= RAL_TX_ACK; 1334 flags |= RAL_TX_RETRY(7); 1335 1336 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1337 ic->ic_flags) + RAL_SIFS; 1338 *(uint16_t *)wh->i_dur = htole16(dur); 1339 } 1340 1341 if (sc->sc_drvbpf != NULL) { 1342 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1343 1344 tap->wt_flags = 0; 1345 tap->wt_rate = rate; 1346 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1347 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1348 tap->wt_antenna = sc->tx_ant; 1349 1350 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1351 } 1352 1353 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1354 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1355 1356 /* align end on a 2-bytes boundary */ 1357 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1358 1359 /* 1360 * No space left in the last URB to store the extra 2 bytes, force 1361 * sending of another URB. 1362 */ 1363 if ((xferlen % 64) == 0) 1364 xferlen += 2; 1365 1366 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1367 m0->m_pkthdr.len, rate, xferlen)); 1368 1369 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, 1370 xferlen, USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, 1371 ural_txeof); 1372 1373 error = usbd_transfer(data->xfer); 1374 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1375 return error; 1376 1377 sc->tx_queued++; 1378 1379 return 0; 1380 } 1381 1382 Static void 1383 ural_start(struct ifnet *ifp) 1384 { 1385 struct ural_softc *sc = ifp->if_softc; 1386 struct ieee80211com *ic = &sc->sc_ic; 1387 struct mbuf *m0; 1388 struct ether_header *eh; 1389 struct ieee80211_node *ni; 1390 1391 for (;;) { 1392 IF_POLL(&ic->ic_mgtq, m0); 1393 if (m0 != NULL) { 1394 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1395 ifp->if_flags |= IFF_OACTIVE; 1396 break; 1397 } 1398 IF_DEQUEUE(&ic->ic_mgtq, m0); 1399 1400 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1401 m0->m_pkthdr.rcvif = NULL; 1402 bpf_mtap3(ic->ic_rawbpf, m0); 1403 if (ural_tx_mgt(sc, m0, ni) != 0) 1404 break; 1405 1406 } else { 1407 if (ic->ic_state != IEEE80211_S_RUN) 1408 break; 1409 IFQ_DEQUEUE(&ifp->if_snd, m0); 1410 if (m0 == NULL) 1411 break; 1412 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1413 IF_PREPEND(&ifp->if_snd, m0); 1414 ifp->if_flags |= IFF_OACTIVE; 1415 break; 1416 } 1417 1418 if (m0->m_len < sizeof (struct ether_header) && 1419 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1420 continue; 1421 1422 eh = mtod(m0, struct ether_header *); 1423 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1424 if (ni == NULL) { 1425 m_freem(m0); 1426 continue; 1427 } 1428 bpf_mtap(ifp, m0); 1429 m0 = ieee80211_encap(ic, m0, ni); 1430 if (m0 == NULL) { 1431 ieee80211_free_node(ni); 1432 continue; 1433 } 1434 bpf_mtap3(ic->ic_rawbpf, m0); 1435 if (ural_tx_data(sc, m0, ni) != 0) { 1436 ieee80211_free_node(ni); 1437 ifp->if_oerrors++; 1438 break; 1439 } 1440 } 1441 1442 sc->sc_tx_timer = 5; 1443 ifp->if_timer = 1; 1444 } 1445 } 1446 1447 Static void 1448 ural_watchdog(struct ifnet *ifp) 1449 { 1450 struct ural_softc *sc = ifp->if_softc; 1451 struct ieee80211com *ic = &sc->sc_ic; 1452 1453 ifp->if_timer = 0; 1454 1455 if (sc->sc_tx_timer > 0) { 1456 if (--sc->sc_tx_timer == 0) { 1457 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1458 /*ural_init(sc); XXX needs a process context! */ 1459 ifp->if_oerrors++; 1460 return; 1461 } 1462 ifp->if_timer = 1; 1463 } 1464 1465 ieee80211_watchdog(ic); 1466 } 1467 1468 /* 1469 * This function allows for fast channel switching in monitor mode (used by 1470 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1471 * generate a new beacon frame. 1472 */ 1473 Static int 1474 ural_reset(struct ifnet *ifp) 1475 { 1476 struct ural_softc *sc = ifp->if_softc; 1477 struct ieee80211com *ic = &sc->sc_ic; 1478 1479 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1480 return ENETRESET; 1481 1482 ural_set_chan(sc, ic->ic_curchan); 1483 1484 return 0; 1485 } 1486 1487 Static int 1488 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1489 { 1490 #define IS_RUNNING(ifp) \ 1491 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1492 1493 struct ural_softc *sc = ifp->if_softc; 1494 struct ieee80211com *ic = &sc->sc_ic; 1495 int s, error = 0; 1496 1497 s = splnet(); 1498 1499 switch (cmd) { 1500 case SIOCSIFFLAGS: 1501 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1502 break; 1503 /* XXX re-use ether_ioctl() */ 1504 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1505 case IFF_UP|IFF_RUNNING: 1506 ural_update_promisc(sc); 1507 break; 1508 case IFF_UP: 1509 ural_init(ifp); 1510 break; 1511 case IFF_RUNNING: 1512 ural_stop(ifp, 1); 1513 break; 1514 case 0: 1515 break; 1516 } 1517 break; 1518 1519 case SIOCADDMULTI: 1520 case SIOCDELMULTI: 1521 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1522 error = 0; 1523 } 1524 break; 1525 1526 default: 1527 error = ieee80211_ioctl(ic, cmd, data); 1528 } 1529 1530 if (error == ENETRESET) { 1531 if (IS_RUNNING(ifp) && 1532 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1533 ural_init(ifp); 1534 error = 0; 1535 } 1536 1537 splx(s); 1538 1539 return error; 1540 #undef IS_RUNNING 1541 } 1542 1543 Static void 1544 ural_set_testmode(struct ural_softc *sc) 1545 { 1546 usb_device_request_t req; 1547 usbd_status error; 1548 1549 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1550 req.bRequest = RAL_VENDOR_REQUEST; 1551 USETW(req.wValue, 4); 1552 USETW(req.wIndex, 1); 1553 USETW(req.wLength, 0); 1554 1555 error = usbd_do_request(sc->sc_udev, &req, NULL); 1556 if (error != 0) { 1557 printf("%s: could not set test mode: %s\n", 1558 device_xname(sc->sc_dev), usbd_errstr(error)); 1559 } 1560 } 1561 1562 Static void 1563 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1564 { 1565 usb_device_request_t req; 1566 usbd_status error; 1567 1568 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1569 req.bRequest = RAL_READ_EEPROM; 1570 USETW(req.wValue, 0); 1571 USETW(req.wIndex, addr); 1572 USETW(req.wLength, len); 1573 1574 error = usbd_do_request(sc->sc_udev, &req, buf); 1575 if (error != 0) { 1576 printf("%s: could not read EEPROM: %s\n", 1577 device_xname(sc->sc_dev), usbd_errstr(error)); 1578 } 1579 } 1580 1581 Static uint16_t 1582 ural_read(struct ural_softc *sc, uint16_t reg) 1583 { 1584 usb_device_request_t req; 1585 usbd_status error; 1586 uint16_t val; 1587 1588 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1589 req.bRequest = RAL_READ_MAC; 1590 USETW(req.wValue, 0); 1591 USETW(req.wIndex, reg); 1592 USETW(req.wLength, sizeof (uint16_t)); 1593 1594 error = usbd_do_request(sc->sc_udev, &req, &val); 1595 if (error != 0) { 1596 printf("%s: could not read MAC register: %s\n", 1597 device_xname(sc->sc_dev), usbd_errstr(error)); 1598 return 0; 1599 } 1600 1601 return le16toh(val); 1602 } 1603 1604 Static void 1605 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1606 { 1607 usb_device_request_t req; 1608 usbd_status error; 1609 1610 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1611 req.bRequest = RAL_READ_MULTI_MAC; 1612 USETW(req.wValue, 0); 1613 USETW(req.wIndex, reg); 1614 USETW(req.wLength, len); 1615 1616 error = usbd_do_request(sc->sc_udev, &req, buf); 1617 if (error != 0) { 1618 printf("%s: could not read MAC register: %s\n", 1619 device_xname(sc->sc_dev), usbd_errstr(error)); 1620 } 1621 } 1622 1623 Static void 1624 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1625 { 1626 usb_device_request_t req; 1627 usbd_status error; 1628 1629 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1630 req.bRequest = RAL_WRITE_MAC; 1631 USETW(req.wValue, val); 1632 USETW(req.wIndex, reg); 1633 USETW(req.wLength, 0); 1634 1635 error = usbd_do_request(sc->sc_udev, &req, NULL); 1636 if (error != 0) { 1637 printf("%s: could not write MAC register: %s\n", 1638 device_xname(sc->sc_dev), usbd_errstr(error)); 1639 } 1640 } 1641 1642 Static void 1643 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1644 { 1645 usb_device_request_t req; 1646 usbd_status error; 1647 1648 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1649 req.bRequest = RAL_WRITE_MULTI_MAC; 1650 USETW(req.wValue, 0); 1651 USETW(req.wIndex, reg); 1652 USETW(req.wLength, len); 1653 1654 error = usbd_do_request(sc->sc_udev, &req, buf); 1655 if (error != 0) { 1656 printf("%s: could not write MAC register: %s\n", 1657 device_xname(sc->sc_dev), usbd_errstr(error)); 1658 } 1659 } 1660 1661 Static void 1662 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1663 { 1664 uint16_t tmp; 1665 int ntries; 1666 1667 for (ntries = 0; ntries < 5; ntries++) { 1668 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1669 break; 1670 } 1671 if (ntries == 5) { 1672 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1673 return; 1674 } 1675 1676 tmp = reg << 8 | val; 1677 ural_write(sc, RAL_PHY_CSR7, tmp); 1678 } 1679 1680 Static uint8_t 1681 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1682 { 1683 uint16_t val; 1684 int ntries; 1685 1686 val = RAL_BBP_WRITE | reg << 8; 1687 ural_write(sc, RAL_PHY_CSR7, val); 1688 1689 for (ntries = 0; ntries < 5; ntries++) { 1690 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1691 break; 1692 } 1693 if (ntries == 5) { 1694 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1695 return 0; 1696 } 1697 1698 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1699 } 1700 1701 Static void 1702 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1703 { 1704 uint32_t tmp; 1705 int ntries; 1706 1707 for (ntries = 0; ntries < 5; ntries++) { 1708 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1709 break; 1710 } 1711 if (ntries == 5) { 1712 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1713 return; 1714 } 1715 1716 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1717 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1718 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1719 1720 /* remember last written value in sc */ 1721 sc->rf_regs[reg] = val; 1722 1723 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1724 } 1725 1726 Static void 1727 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1728 { 1729 struct ieee80211com *ic = &sc->sc_ic; 1730 uint8_t power, tmp; 1731 u_int i, chan; 1732 1733 chan = ieee80211_chan2ieee(ic, c); 1734 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1735 return; 1736 1737 if (IEEE80211_IS_CHAN_2GHZ(c)) 1738 power = min(sc->txpow[chan - 1], 31); 1739 else 1740 power = 31; 1741 1742 /* adjust txpower using ifconfig settings */ 1743 power -= (100 - ic->ic_txpowlimit) / 8; 1744 1745 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1746 1747 switch (sc->rf_rev) { 1748 case RAL_RF_2522: 1749 ural_rf_write(sc, RAL_RF1, 0x00814); 1750 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1751 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1752 break; 1753 1754 case RAL_RF_2523: 1755 ural_rf_write(sc, RAL_RF1, 0x08804); 1756 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1757 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1758 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1759 break; 1760 1761 case RAL_RF_2524: 1762 ural_rf_write(sc, RAL_RF1, 0x0c808); 1763 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1764 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1765 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1766 break; 1767 1768 case RAL_RF_2525: 1769 ural_rf_write(sc, RAL_RF1, 0x08808); 1770 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1771 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1772 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1773 1774 ural_rf_write(sc, RAL_RF1, 0x08808); 1775 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1776 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1777 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1778 break; 1779 1780 case RAL_RF_2525E: 1781 ural_rf_write(sc, RAL_RF1, 0x08808); 1782 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1783 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1784 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1785 break; 1786 1787 case RAL_RF_2526: 1788 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1789 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1790 ural_rf_write(sc, RAL_RF1, 0x08804); 1791 1792 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1793 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1794 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1795 break; 1796 1797 /* dual-band RF */ 1798 case RAL_RF_5222: 1799 for (i = 0; ural_rf5222[i].chan != chan; i++); 1800 1801 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1802 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1803 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1804 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1805 break; 1806 } 1807 1808 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1809 ic->ic_state != IEEE80211_S_SCAN) { 1810 /* set Japan filter bit for channel 14 */ 1811 tmp = ural_bbp_read(sc, 70); 1812 1813 tmp &= ~RAL_JAPAN_FILTER; 1814 if (chan == 14) 1815 tmp |= RAL_JAPAN_FILTER; 1816 1817 ural_bbp_write(sc, 70, tmp); 1818 1819 /* clear CRC errors */ 1820 ural_read(sc, RAL_STA_CSR0); 1821 1822 DELAY(10000); 1823 ural_disable_rf_tune(sc); 1824 } 1825 } 1826 1827 /* 1828 * Disable RF auto-tuning. 1829 */ 1830 Static void 1831 ural_disable_rf_tune(struct ural_softc *sc) 1832 { 1833 uint32_t tmp; 1834 1835 if (sc->rf_rev != RAL_RF_2523) { 1836 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1837 ural_rf_write(sc, RAL_RF1, tmp); 1838 } 1839 1840 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1841 ural_rf_write(sc, RAL_RF3, tmp); 1842 1843 DPRINTFN(2, ("disabling RF autotune\n")); 1844 } 1845 1846 /* 1847 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1848 * synchronization. 1849 */ 1850 Static void 1851 ural_enable_tsf_sync(struct ural_softc *sc) 1852 { 1853 struct ieee80211com *ic = &sc->sc_ic; 1854 uint16_t logcwmin, preload, tmp; 1855 1856 /* first, disable TSF synchronization */ 1857 ural_write(sc, RAL_TXRX_CSR19, 0); 1858 1859 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1860 ural_write(sc, RAL_TXRX_CSR18, tmp); 1861 1862 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1863 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1864 tmp = logcwmin << 12 | preload; 1865 ural_write(sc, RAL_TXRX_CSR20, tmp); 1866 1867 /* finally, enable TSF synchronization */ 1868 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1869 if (ic->ic_opmode == IEEE80211_M_STA) 1870 tmp |= RAL_ENABLE_TSF_SYNC(1); 1871 else 1872 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1873 ural_write(sc, RAL_TXRX_CSR19, tmp); 1874 1875 DPRINTF(("enabling TSF synchronization\n")); 1876 } 1877 1878 Static void 1879 ural_update_slot(struct ifnet *ifp) 1880 { 1881 struct ural_softc *sc = ifp->if_softc; 1882 struct ieee80211com *ic = &sc->sc_ic; 1883 uint16_t slottime, sifs, eifs; 1884 1885 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1886 1887 /* 1888 * These settings may sound a bit inconsistent but this is what the 1889 * reference driver does. 1890 */ 1891 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1892 sifs = 16 - RAL_RXTX_TURNAROUND; 1893 eifs = 364; 1894 } else { 1895 sifs = 10 - RAL_RXTX_TURNAROUND; 1896 eifs = 64; 1897 } 1898 1899 ural_write(sc, RAL_MAC_CSR10, slottime); 1900 ural_write(sc, RAL_MAC_CSR11, sifs); 1901 ural_write(sc, RAL_MAC_CSR12, eifs); 1902 } 1903 1904 Static void 1905 ural_set_txpreamble(struct ural_softc *sc) 1906 { 1907 uint16_t tmp; 1908 1909 tmp = ural_read(sc, RAL_TXRX_CSR10); 1910 1911 tmp &= ~RAL_SHORT_PREAMBLE; 1912 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1913 tmp |= RAL_SHORT_PREAMBLE; 1914 1915 ural_write(sc, RAL_TXRX_CSR10, tmp); 1916 } 1917 1918 Static void 1919 ural_set_basicrates(struct ural_softc *sc) 1920 { 1921 struct ieee80211com *ic = &sc->sc_ic; 1922 1923 /* update basic rate set */ 1924 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1925 /* 11b basic rates: 1, 2Mbps */ 1926 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1927 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1928 /* 11a basic rates: 6, 12, 24Mbps */ 1929 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1930 } else { 1931 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1932 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1933 } 1934 } 1935 1936 Static void 1937 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1938 { 1939 uint16_t tmp; 1940 1941 tmp = bssid[0] | bssid[1] << 8; 1942 ural_write(sc, RAL_MAC_CSR5, tmp); 1943 1944 tmp = bssid[2] | bssid[3] << 8; 1945 ural_write(sc, RAL_MAC_CSR6, tmp); 1946 1947 tmp = bssid[4] | bssid[5] << 8; 1948 ural_write(sc, RAL_MAC_CSR7, tmp); 1949 1950 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1951 } 1952 1953 Static void 1954 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1955 { 1956 uint16_t tmp; 1957 1958 tmp = addr[0] | addr[1] << 8; 1959 ural_write(sc, RAL_MAC_CSR2, tmp); 1960 1961 tmp = addr[2] | addr[3] << 8; 1962 ural_write(sc, RAL_MAC_CSR3, tmp); 1963 1964 tmp = addr[4] | addr[5] << 8; 1965 ural_write(sc, RAL_MAC_CSR4, tmp); 1966 1967 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1968 } 1969 1970 Static void 1971 ural_update_promisc(struct ural_softc *sc) 1972 { 1973 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1974 uint32_t tmp; 1975 1976 tmp = ural_read(sc, RAL_TXRX_CSR2); 1977 1978 tmp &= ~RAL_DROP_NOT_TO_ME; 1979 if (!(ifp->if_flags & IFF_PROMISC)) 1980 tmp |= RAL_DROP_NOT_TO_ME; 1981 1982 ural_write(sc, RAL_TXRX_CSR2, tmp); 1983 1984 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1985 "entering" : "leaving")); 1986 } 1987 1988 Static const char * 1989 ural_get_rf(int rev) 1990 { 1991 switch (rev) { 1992 case RAL_RF_2522: return "RT2522"; 1993 case RAL_RF_2523: return "RT2523"; 1994 case RAL_RF_2524: return "RT2524"; 1995 case RAL_RF_2525: return "RT2525"; 1996 case RAL_RF_2525E: return "RT2525e"; 1997 case RAL_RF_2526: return "RT2526"; 1998 case RAL_RF_5222: return "RT5222"; 1999 default: return "unknown"; 2000 } 2001 } 2002 2003 Static void 2004 ural_read_eeprom(struct ural_softc *sc) 2005 { 2006 struct ieee80211com *ic = &sc->sc_ic; 2007 uint16_t val; 2008 2009 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 2010 val = le16toh(val); 2011 sc->rf_rev = (val >> 11) & 0x7; 2012 sc->hw_radio = (val >> 10) & 0x1; 2013 sc->led_mode = (val >> 6) & 0x7; 2014 sc->rx_ant = (val >> 4) & 0x3; 2015 sc->tx_ant = (val >> 2) & 0x3; 2016 sc->nb_ant = val & 0x3; 2017 2018 /* read MAC address */ 2019 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 2020 2021 /* read default values for BBP registers */ 2022 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 2023 2024 /* read Tx power for all b/g channels */ 2025 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 2026 } 2027 2028 Static int 2029 ural_bbp_init(struct ural_softc *sc) 2030 { 2031 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2032 int i, ntries; 2033 2034 /* wait for BBP to be ready */ 2035 for (ntries = 0; ntries < 100; ntries++) { 2036 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2037 break; 2038 DELAY(1000); 2039 } 2040 if (ntries == 100) { 2041 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2042 return EIO; 2043 } 2044 2045 /* initialize BBP registers to default values */ 2046 for (i = 0; i < N(ural_def_bbp); i++) 2047 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2048 2049 #if 0 2050 /* initialize BBP registers to values stored in EEPROM */ 2051 for (i = 0; i < 16; i++) { 2052 if (sc->bbp_prom[i].reg == 0xff) 2053 continue; 2054 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2055 } 2056 #endif 2057 2058 return 0; 2059 #undef N 2060 } 2061 2062 Static void 2063 ural_set_txantenna(struct ural_softc *sc, int antenna) 2064 { 2065 uint16_t tmp; 2066 uint8_t tx; 2067 2068 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2069 if (antenna == 1) 2070 tx |= RAL_BBP_ANTA; 2071 else if (antenna == 2) 2072 tx |= RAL_BBP_ANTB; 2073 else 2074 tx |= RAL_BBP_DIVERSITY; 2075 2076 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2077 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2078 sc->rf_rev == RAL_RF_5222) 2079 tx |= RAL_BBP_FLIPIQ; 2080 2081 ural_bbp_write(sc, RAL_BBP_TX, tx); 2082 2083 /* update values in PHY_CSR5 and PHY_CSR6 */ 2084 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2085 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2086 2087 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2088 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2089 } 2090 2091 Static void 2092 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2093 { 2094 uint8_t rx; 2095 2096 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2097 if (antenna == 1) 2098 rx |= RAL_BBP_ANTA; 2099 else if (antenna == 2) 2100 rx |= RAL_BBP_ANTB; 2101 else 2102 rx |= RAL_BBP_DIVERSITY; 2103 2104 /* need to force no I/Q flip for RF 2525e and 2526 */ 2105 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2106 rx &= ~RAL_BBP_FLIPIQ; 2107 2108 ural_bbp_write(sc, RAL_BBP_RX, rx); 2109 } 2110 2111 Static int 2112 ural_init(struct ifnet *ifp) 2113 { 2114 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2115 struct ural_softc *sc = ifp->if_softc; 2116 struct ieee80211com *ic = &sc->sc_ic; 2117 struct ieee80211_key *wk; 2118 struct ural_rx_data *data; 2119 uint16_t tmp; 2120 usbd_status error; 2121 int i, ntries; 2122 2123 ural_set_testmode(sc); 2124 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2125 2126 ural_stop(ifp, 0); 2127 2128 /* initialize MAC registers to default values */ 2129 for (i = 0; i < N(ural_def_mac); i++) 2130 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2131 2132 /* wait for BBP and RF to wake up (this can take a long time!) */ 2133 for (ntries = 0; ntries < 100; ntries++) { 2134 tmp = ural_read(sc, RAL_MAC_CSR17); 2135 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2136 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2137 break; 2138 DELAY(1000); 2139 } 2140 if (ntries == 100) { 2141 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2142 device_xname(sc->sc_dev)); 2143 error = EIO; 2144 goto fail; 2145 } 2146 2147 /* we're ready! */ 2148 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2149 2150 /* set basic rate set (will be updated later) */ 2151 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2152 2153 error = ural_bbp_init(sc); 2154 if (error != 0) 2155 goto fail; 2156 2157 /* set default BSS channel */ 2158 ural_set_chan(sc, ic->ic_curchan); 2159 2160 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2161 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2162 2163 ural_set_txantenna(sc, sc->tx_ant); 2164 ural_set_rxantenna(sc, sc->rx_ant); 2165 2166 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2167 ural_set_macaddr(sc, ic->ic_myaddr); 2168 2169 /* 2170 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2171 */ 2172 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2173 wk = &ic->ic_crypto.cs_nw_keys[i]; 2174 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2175 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2176 } 2177 2178 /* 2179 * Allocate xfer for AMRR statistics requests. 2180 */ 2181 sc->amrr_xfer = usbd_alloc_xfer(sc->sc_udev); 2182 if (sc->amrr_xfer == NULL) { 2183 printf("%s: could not allocate AMRR xfer\n", 2184 device_xname(sc->sc_dev)); 2185 goto fail; 2186 } 2187 2188 /* 2189 * Open Tx and Rx USB bulk pipes. 2190 */ 2191 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2192 &sc->sc_tx_pipeh); 2193 if (error != 0) { 2194 printf("%s: could not open Tx pipe: %s\n", 2195 device_xname(sc->sc_dev), usbd_errstr(error)); 2196 goto fail; 2197 } 2198 2199 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2200 &sc->sc_rx_pipeh); 2201 if (error != 0) { 2202 printf("%s: could not open Rx pipe: %s\n", 2203 device_xname(sc->sc_dev), usbd_errstr(error)); 2204 goto fail; 2205 } 2206 2207 /* 2208 * Allocate Tx and Rx xfer queues. 2209 */ 2210 error = ural_alloc_tx_list(sc); 2211 if (error != 0) { 2212 printf("%s: could not allocate Tx list\n", 2213 device_xname(sc->sc_dev)); 2214 goto fail; 2215 } 2216 2217 error = ural_alloc_rx_list(sc); 2218 if (error != 0) { 2219 printf("%s: could not allocate Rx list\n", 2220 device_xname(sc->sc_dev)); 2221 goto fail; 2222 } 2223 2224 /* 2225 * Start up the receive pipe. 2226 */ 2227 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2228 data = &sc->rx_data[i]; 2229 2230 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2231 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2232 usbd_transfer(data->xfer); 2233 } 2234 2235 /* kick Rx */ 2236 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2237 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2238 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2239 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2240 tmp |= RAL_DROP_TODS; 2241 if (!(ifp->if_flags & IFF_PROMISC)) 2242 tmp |= RAL_DROP_NOT_TO_ME; 2243 } 2244 ural_write(sc, RAL_TXRX_CSR2, tmp); 2245 2246 ifp->if_flags &= ~IFF_OACTIVE; 2247 ifp->if_flags |= IFF_RUNNING; 2248 2249 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2250 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2251 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2252 } else 2253 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2254 2255 return 0; 2256 2257 fail: ural_stop(ifp, 1); 2258 return error; 2259 #undef N 2260 } 2261 2262 Static void 2263 ural_stop(struct ifnet *ifp, int disable) 2264 { 2265 struct ural_softc *sc = ifp->if_softc; 2266 struct ieee80211com *ic = &sc->sc_ic; 2267 2268 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2269 2270 sc->sc_tx_timer = 0; 2271 ifp->if_timer = 0; 2272 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2273 2274 /* disable Rx */ 2275 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2276 2277 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2278 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2279 ural_write(sc, RAL_MAC_CSR1, 0); 2280 2281 if (sc->amrr_xfer != NULL) { 2282 usbd_free_xfer(sc->amrr_xfer); 2283 sc->amrr_xfer = NULL; 2284 } 2285 2286 if (sc->sc_rx_pipeh != NULL) { 2287 usbd_abort_pipe(sc->sc_rx_pipeh); 2288 usbd_close_pipe(sc->sc_rx_pipeh); 2289 sc->sc_rx_pipeh = NULL; 2290 } 2291 2292 if (sc->sc_tx_pipeh != NULL) { 2293 usbd_abort_pipe(sc->sc_tx_pipeh); 2294 usbd_close_pipe(sc->sc_tx_pipeh); 2295 sc->sc_tx_pipeh = NULL; 2296 } 2297 2298 ural_free_rx_list(sc); 2299 ural_free_tx_list(sc); 2300 } 2301 2302 int 2303 ural_activate(device_t self, enum devact act) 2304 { 2305 struct ural_softc *sc = device_private(self); 2306 2307 switch (act) { 2308 case DVACT_DEACTIVATE: 2309 if_deactivate(&sc->sc_if); 2310 return 0; 2311 default: 2312 return EOPNOTSUPP; 2313 } 2314 } 2315 2316 Static void 2317 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2318 { 2319 int i; 2320 2321 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2322 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof sc->sta); 2323 2324 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2325 2326 /* set rate to some reasonable initial value */ 2327 for (i = ni->ni_rates.rs_nrates - 1; 2328 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2329 i--); 2330 ni->ni_txrate = i; 2331 2332 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2333 } 2334 2335 Static void 2336 ural_amrr_timeout(void *arg) 2337 { 2338 struct ural_softc *sc = (struct ural_softc *)arg; 2339 usb_device_request_t req; 2340 int s; 2341 2342 s = splusb(); 2343 2344 /* 2345 * Asynchronously read statistic registers (cleared by read). 2346 */ 2347 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2348 req.bRequest = RAL_READ_MULTI_MAC; 2349 USETW(req.wValue, 0); 2350 USETW(req.wIndex, RAL_STA_CSR0); 2351 USETW(req.wLength, sizeof sc->sta); 2352 2353 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2354 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof sc->sta, 0, 2355 ural_amrr_update); 2356 (void)usbd_transfer(sc->amrr_xfer); 2357 2358 splx(s); 2359 } 2360 2361 Static void 2362 ural_amrr_update(usbd_xfer_handle xfer, usbd_private_handle priv, 2363 usbd_status status) 2364 { 2365 struct ural_softc *sc = (struct ural_softc *)priv; 2366 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2367 2368 if (status != USBD_NORMAL_COMPLETION) { 2369 printf("%s: could not retrieve Tx statistics - " 2370 "cancelling automatic rate control\n", 2371 device_xname(sc->sc_dev)); 2372 return; 2373 } 2374 2375 /* count TX retry-fail as Tx errors */ 2376 ifp->if_oerrors += sc->sta[9]; 2377 2378 sc->amn.amn_retrycnt = 2379 sc->sta[7] + /* TX one-retry ok count */ 2380 sc->sta[8] + /* TX more-retry ok count */ 2381 sc->sta[9]; /* TX retry-fail count */ 2382 2383 sc->amn.amn_txcnt = 2384 sc->amn.amn_retrycnt + 2385 sc->sta[6]; /* TX no-retry ok count */ 2386 2387 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2388 2389 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2390 } 2391
Indexes created Mon Sep 29 21:09:56 GMT 2025