if_ural.c revision 1.47
1 /* $NetBSD: if_ural.c,v 1.47 2016/05/26 05:01:12 ozaki-r Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.47 2016/05/26 05:01:12 ozaki-r Exp $"); 28 29 #include <sys/param.h> 30 #include <sys/sockio.h> 31 #include <sys/sysctl.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/conf.h> 37 #include <sys/device.h> 38 39 #include <sys/bus.h> 40 #include <machine/endian.h> 41 #include <sys/intr.h> 42 43 #include <net/bpf.h> 44 #include <net/if.h> 45 #include <net/if_arp.h> 46 #include <net/if_dl.h> 47 #include <net/if_ether.h> 48 #include <net/if_media.h> 49 #include <net/if_types.h> 50 51 #include <netinet/in.h> 52 #include <netinet/in_systm.h> 53 #include <netinet/in_var.h> 54 #include <netinet/ip.h> 55 56 #include <net80211/ieee80211_netbsd.h> 57 #include <net80211/ieee80211_var.h> 58 #include <net80211/ieee80211_amrr.h> 59 #include <net80211/ieee80211_radiotap.h> 60 61 #include <dev/usb/usb.h> 62 #include <dev/usb/usbdi.h> 63 #include <dev/usb/usbdi_util.h> 64 #include <dev/usb/usbdevs.h> 65 66 #include <dev/usb/if_uralreg.h> 67 #include <dev/usb/if_uralvar.h> 68 69 #ifdef URAL_DEBUG 70 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 71 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 72 int ural_debug = 0; 73 #else 74 #define DPRINTF(x) 75 #define DPRINTFN(n, x) 76 #endif 77 78 /* various supported device vendors/products */ 79 static const struct usb_devno ural_devs[] = { 80 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 81 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 82 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 83 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 84 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 85 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 86 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 87 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 88 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 89 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 90 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 91 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 92 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 93 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 94 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 95 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 96 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 97 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 98 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 99 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 100 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 101 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 102 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 103 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 104 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 105 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 106 }; 107 108 Static int ural_alloc_tx_list(struct ural_softc *); 109 Static void ural_free_tx_list(struct ural_softc *); 110 Static int ural_alloc_rx_list(struct ural_softc *); 111 Static void ural_free_rx_list(struct ural_softc *); 112 Static int ural_media_change(struct ifnet *); 113 Static void ural_next_scan(void *); 114 Static void ural_task(void *); 115 Static int ural_newstate(struct ieee80211com *, 116 enum ieee80211_state, int); 117 Static int ural_rxrate(struct ural_rx_desc *); 118 Static void ural_txeof(struct usbd_xfer *, void *, 119 usbd_status); 120 Static void ural_rxeof(struct usbd_xfer *, void *, 121 usbd_status); 122 Static int ural_ack_rate(struct ieee80211com *, int); 123 Static uint16_t ural_txtime(int, int, uint32_t); 124 Static uint8_t ural_plcp_signal(int); 125 Static void ural_setup_tx_desc(struct ural_softc *, 126 struct ural_tx_desc *, uint32_t, int, int); 127 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 128 struct ieee80211_node *); 129 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 130 struct ieee80211_node *); 131 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 Static void ural_start(struct ifnet *); 134 Static void ural_watchdog(struct ifnet *); 135 Static int ural_reset(struct ifnet *); 136 Static int ural_ioctl(struct ifnet *, u_long, void *); 137 Static void ural_set_testmode(struct ural_softc *); 138 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 139 int); 140 Static uint16_t ural_read(struct ural_softc *, uint16_t); 141 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 142 int); 143 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 144 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 145 int); 146 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 147 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 148 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 149 Static void ural_set_chan(struct ural_softc *, 150 struct ieee80211_channel *); 151 Static void ural_disable_rf_tune(struct ural_softc *); 152 Static void ural_enable_tsf_sync(struct ural_softc *); 153 Static void ural_update_slot(struct ifnet *); 154 Static void ural_set_txpreamble(struct ural_softc *); 155 Static void ural_set_basicrates(struct ural_softc *); 156 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 157 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 158 Static void ural_update_promisc(struct ural_softc *); 159 Static const char *ural_get_rf(int); 160 Static void ural_read_eeprom(struct ural_softc *); 161 Static int ural_bbp_init(struct ural_softc *); 162 Static void ural_set_txantenna(struct ural_softc *, int); 163 Static void ural_set_rxantenna(struct ural_softc *, int); 164 Static int ural_init(struct ifnet *); 165 Static void ural_stop(struct ifnet *, int); 166 Static void ural_amrr_start(struct ural_softc *, 167 struct ieee80211_node *); 168 Static void ural_amrr_timeout(void *); 169 Static void ural_amrr_update(struct usbd_xfer *, void *, 170 usbd_status status); 171 172 /* 173 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 174 */ 175 static const struct ieee80211_rateset ural_rateset_11a = 176 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 177 178 static const struct ieee80211_rateset ural_rateset_11b = 179 { 4, { 2, 4, 11, 22 } }; 180 181 static const struct ieee80211_rateset ural_rateset_11g = 182 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 183 184 /* 185 * Default values for MAC registers; values taken from the reference driver. 186 */ 187 static const struct { 188 uint16_t reg; 189 uint16_t val; 190 } ural_def_mac[] = { 191 { RAL_TXRX_CSR5, 0x8c8d }, 192 { RAL_TXRX_CSR6, 0x8b8a }, 193 { RAL_TXRX_CSR7, 0x8687 }, 194 { RAL_TXRX_CSR8, 0x0085 }, 195 { RAL_MAC_CSR13, 0x1111 }, 196 { RAL_MAC_CSR14, 0x1e11 }, 197 { RAL_TXRX_CSR21, 0xe78f }, 198 { RAL_MAC_CSR9, 0xff1d }, 199 { RAL_MAC_CSR11, 0x0002 }, 200 { RAL_MAC_CSR22, 0x0053 }, 201 { RAL_MAC_CSR15, 0x0000 }, 202 { RAL_MAC_CSR8, 0x0780 }, 203 { RAL_TXRX_CSR19, 0x0000 }, 204 { RAL_TXRX_CSR18, 0x005a }, 205 { RAL_PHY_CSR2, 0x0000 }, 206 { RAL_TXRX_CSR0, 0x1ec0 }, 207 { RAL_PHY_CSR4, 0x000f } 208 }; 209 210 /* 211 * Default values for BBP registers; values taken from the reference driver. 212 */ 213 static const struct { 214 uint8_t reg; 215 uint8_t val; 216 } ural_def_bbp[] = { 217 { 3, 0x02 }, 218 { 4, 0x19 }, 219 { 14, 0x1c }, 220 { 15, 0x30 }, 221 { 16, 0xac }, 222 { 17, 0x48 }, 223 { 18, 0x18 }, 224 { 19, 0xff }, 225 { 20, 0x1e }, 226 { 21, 0x08 }, 227 { 22, 0x08 }, 228 { 23, 0x08 }, 229 { 24, 0x80 }, 230 { 25, 0x50 }, 231 { 26, 0x08 }, 232 { 27, 0x23 }, 233 { 30, 0x10 }, 234 { 31, 0x2b }, 235 { 32, 0xb9 }, 236 { 34, 0x12 }, 237 { 35, 0x50 }, 238 { 39, 0xc4 }, 239 { 40, 0x02 }, 240 { 41, 0x60 }, 241 { 53, 0x10 }, 242 { 54, 0x18 }, 243 { 56, 0x08 }, 244 { 57, 0x10 }, 245 { 58, 0x08 }, 246 { 61, 0x60 }, 247 { 62, 0x10 }, 248 { 75, 0xff } 249 }; 250 251 /* 252 * Default values for RF register R2 indexed by channel numbers. 253 */ 254 static const uint32_t ural_rf2522_r2[] = { 255 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 256 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 257 }; 258 259 static const uint32_t ural_rf2523_r2[] = { 260 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 261 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 262 }; 263 264 static const uint32_t ural_rf2524_r2[] = { 265 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 266 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 267 }; 268 269 static const uint32_t ural_rf2525_r2[] = { 270 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 271 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 272 }; 273 274 static const uint32_t ural_rf2525_hi_r2[] = { 275 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 276 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 277 }; 278 279 static const uint32_t ural_rf2525e_r2[] = { 280 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 281 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 282 }; 283 284 static const uint32_t ural_rf2526_hi_r2[] = { 285 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 286 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 287 }; 288 289 static const uint32_t ural_rf2526_r2[] = { 290 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 291 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 292 }; 293 294 /* 295 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 296 * values taken from the reference driver. 297 */ 298 static const struct { 299 uint8_t chan; 300 uint32_t r1; 301 uint32_t r2; 302 uint32_t r4; 303 } ural_rf5222[] = { 304 { 1, 0x08808, 0x0044d, 0x00282 }, 305 { 2, 0x08808, 0x0044e, 0x00282 }, 306 { 3, 0x08808, 0x0044f, 0x00282 }, 307 { 4, 0x08808, 0x00460, 0x00282 }, 308 { 5, 0x08808, 0x00461, 0x00282 }, 309 { 6, 0x08808, 0x00462, 0x00282 }, 310 { 7, 0x08808, 0x00463, 0x00282 }, 311 { 8, 0x08808, 0x00464, 0x00282 }, 312 { 9, 0x08808, 0x00465, 0x00282 }, 313 { 10, 0x08808, 0x00466, 0x00282 }, 314 { 11, 0x08808, 0x00467, 0x00282 }, 315 { 12, 0x08808, 0x00468, 0x00282 }, 316 { 13, 0x08808, 0x00469, 0x00282 }, 317 { 14, 0x08808, 0x0046b, 0x00286 }, 318 319 { 36, 0x08804, 0x06225, 0x00287 }, 320 { 40, 0x08804, 0x06226, 0x00287 }, 321 { 44, 0x08804, 0x06227, 0x00287 }, 322 { 48, 0x08804, 0x06228, 0x00287 }, 323 { 52, 0x08804, 0x06229, 0x00287 }, 324 { 56, 0x08804, 0x0622a, 0x00287 }, 325 { 60, 0x08804, 0x0622b, 0x00287 }, 326 { 64, 0x08804, 0x0622c, 0x00287 }, 327 328 { 100, 0x08804, 0x02200, 0x00283 }, 329 { 104, 0x08804, 0x02201, 0x00283 }, 330 { 108, 0x08804, 0x02202, 0x00283 }, 331 { 112, 0x08804, 0x02203, 0x00283 }, 332 { 116, 0x08804, 0x02204, 0x00283 }, 333 { 120, 0x08804, 0x02205, 0x00283 }, 334 { 124, 0x08804, 0x02206, 0x00283 }, 335 { 128, 0x08804, 0x02207, 0x00283 }, 336 { 132, 0x08804, 0x02208, 0x00283 }, 337 { 136, 0x08804, 0x02209, 0x00283 }, 338 { 140, 0x08804, 0x0220a, 0x00283 }, 339 340 { 149, 0x08808, 0x02429, 0x00281 }, 341 { 153, 0x08808, 0x0242b, 0x00281 }, 342 { 157, 0x08808, 0x0242d, 0x00281 }, 343 { 161, 0x08808, 0x0242f, 0x00281 } 344 }; 345 346 int ural_match(device_t, cfdata_t, void *); 347 void ural_attach(device_t, device_t, void *); 348 int ural_detach(device_t, int); 349 int ural_activate(device_t, enum devact); 350 extern struct cfdriver ural_cd; 351 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, ural_detach, ural_activate); 352 353 int 354 ural_match(device_t parent, cfdata_t match, void *aux) 355 { 356 struct usb_attach_arg *uaa = aux; 357 358 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 359 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 360 } 361 362 void 363 ural_attach(device_t parent, device_t self, void *aux) 364 { 365 struct ural_softc *sc = device_private(self); 366 struct usb_attach_arg *uaa = aux; 367 struct ieee80211com *ic = &sc->sc_ic; 368 struct ifnet *ifp = &sc->sc_if; 369 usb_interface_descriptor_t *id; 370 usb_endpoint_descriptor_t *ed; 371 usbd_status error; 372 char *devinfop; 373 int i; 374 375 sc->sc_dev = self; 376 sc->sc_udev = uaa->uaa_device; 377 378 aprint_naive("\n"); 379 aprint_normal("\n"); 380 381 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 382 aprint_normal_dev(self, "%s\n", devinfop); 383 usbd_devinfo_free(devinfop); 384 385 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 386 if (error != 0) { 387 aprint_error_dev(self, "failed to set configuration" 388 ", err=%s\n", usbd_errstr(error)); 389 return; 390 } 391 392 /* get the first interface handle */ 393 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 394 &sc->sc_iface); 395 if (error != 0) { 396 aprint_error_dev(self, "could not get interface handle\n"); 397 return; 398 } 399 400 /* 401 * Find endpoints. 402 */ 403 id = usbd_get_interface_descriptor(sc->sc_iface); 404 405 sc->sc_rx_no = sc->sc_tx_no = -1; 406 for (i = 0; i < id->bNumEndpoints; i++) { 407 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 408 if (ed == NULL) { 409 aprint_error_dev(self, 410 "no endpoint descriptor for %d\n", i); 411 return; 412 } 413 414 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 415 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 416 sc->sc_rx_no = ed->bEndpointAddress; 417 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 418 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 419 sc->sc_tx_no = ed->bEndpointAddress; 420 } 421 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 422 aprint_error_dev(self, "missing endpoint\n"); 423 return; 424 } 425 426 usb_init_task(&sc->sc_task, ural_task, sc, 0); 427 callout_init(&sc->sc_scan_ch, 0); 428 sc->amrr.amrr_min_success_threshold = 1; 429 sc->amrr.amrr_max_success_threshold = 15; 430 callout_init(&sc->sc_amrr_ch, 0); 431 432 /* retrieve RT2570 rev. no */ 433 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 434 435 /* retrieve MAC address and various other things from EEPROM */ 436 ural_read_eeprom(sc); 437 438 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 439 sc->asic_rev, ural_get_rf(sc->rf_rev)); 440 441 ifp->if_softc = sc; 442 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 443 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 444 ifp->if_init = ural_init; 445 ifp->if_ioctl = ural_ioctl; 446 ifp->if_start = ural_start; 447 ifp->if_watchdog = ural_watchdog; 448 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 449 IFQ_SET_READY(&ifp->if_snd); 450 451 ic->ic_ifp = ifp; 452 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 453 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 454 ic->ic_state = IEEE80211_S_INIT; 455 456 /* set device capabilities */ 457 ic->ic_caps = 458 IEEE80211_C_IBSS | /* IBSS mode supported */ 459 IEEE80211_C_MONITOR | /* monitor mode supported */ 460 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 461 IEEE80211_C_TXPMGT | /* tx power management */ 462 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 463 IEEE80211_C_SHSLOT | /* short slot time supported */ 464 IEEE80211_C_WPA; /* 802.11i */ 465 466 if (sc->rf_rev == RAL_RF_5222) { 467 /* set supported .11a rates */ 468 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 469 470 /* set supported .11a channels */ 471 for (i = 36; i <= 64; i += 4) { 472 ic->ic_channels[i].ic_freq = 473 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 474 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 475 } 476 for (i = 100; i <= 140; i += 4) { 477 ic->ic_channels[i].ic_freq = 478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 480 } 481 for (i = 149; i <= 161; i += 4) { 482 ic->ic_channels[i].ic_freq = 483 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 484 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 485 } 486 } 487 488 /* set supported .11b and .11g rates */ 489 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 490 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 491 492 /* set supported .11b and .11g channels (1 through 14) */ 493 for (i = 1; i <= 14; i++) { 494 ic->ic_channels[i].ic_freq = 495 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 496 ic->ic_channels[i].ic_flags = 497 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 498 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 499 } 500 501 if_attach(ifp); 502 ieee80211_ifattach(ic); 503 ic->ic_reset = ural_reset; 504 505 /* override state transition machine */ 506 sc->sc_newstate = ic->ic_newstate; 507 ic->ic_newstate = ural_newstate; 508 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 509 510 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 511 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 512 513 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 514 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 515 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 516 517 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 518 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 519 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 520 521 ieee80211_announce(ic); 522 523 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 524 sc->sc_dev); 525 526 if (!pmf_device_register(self, NULL, NULL)) 527 aprint_error_dev(self, "couldn't establish power handler\n"); 528 529 return; 530 } 531 532 int 533 ural_detach(device_t self, int flags) 534 { 535 struct ural_softc *sc = device_private(self); 536 struct ieee80211com *ic = &sc->sc_ic; 537 struct ifnet *ifp = &sc->sc_if; 538 int s; 539 540 pmf_device_deregister(self); 541 542 s = splusb(); 543 544 ural_stop(ifp, 1); 545 usb_rem_task(sc->sc_udev, &sc->sc_task); 546 callout_stop(&sc->sc_scan_ch); 547 callout_stop(&sc->sc_amrr_ch); 548 549 bpf_detach(ifp); 550 ieee80211_ifdetach(ic); 551 if_detach(ifp); 552 553 splx(s); 554 555 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 556 sc->sc_dev); 557 558 return 0; 559 } 560 561 Static int 562 ural_alloc_tx_list(struct ural_softc *sc) 563 { 564 struct ural_tx_data *data; 565 int i, error; 566 567 sc->tx_queued = 0; 568 569 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 570 data = &sc->tx_data[i]; 571 572 data->sc = sc; 573 error = usbd_create_xfer(sc->sc_tx_pipeh, 574 RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, 575 &data->xfer); 576 if (error) { 577 printf("%s: could not allocate tx xfer\n", 578 device_xname(sc->sc_dev)); 579 goto fail; 580 } 581 582 data->buf = usbd_get_buffer(data->xfer); 583 } 584 585 return 0; 586 587 fail: ural_free_tx_list(sc); 588 return error; 589 } 590 591 Static void 592 ural_free_tx_list(struct ural_softc *sc) 593 { 594 struct ural_tx_data *data; 595 int i; 596 597 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 598 data = &sc->tx_data[i]; 599 600 if (data->xfer != NULL) { 601 usbd_destroy_xfer(data->xfer); 602 data->xfer = NULL; 603 } 604 605 if (data->ni != NULL) { 606 ieee80211_free_node(data->ni); 607 data->ni = NULL; 608 } 609 } 610 } 611 612 Static int 613 ural_alloc_rx_list(struct ural_softc *sc) 614 { 615 struct ural_rx_data *data; 616 int i, error; 617 618 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 619 data = &sc->rx_data[i]; 620 621 data->sc = sc; 622 623 error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, 624 USBD_SHORT_XFER_OK, 0, &data->xfer); 625 if (error) { 626 printf("%s: could not allocate rx xfer\n", 627 device_xname(sc->sc_dev)); 628 goto fail; 629 } 630 631 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 632 if (data->m == NULL) { 633 printf("%s: could not allocate rx mbuf\n", 634 device_xname(sc->sc_dev)); 635 error = ENOMEM; 636 goto fail; 637 } 638 639 MCLGET(data->m, M_DONTWAIT); 640 if (!(data->m->m_flags & M_EXT)) { 641 printf("%s: could not allocate rx mbuf cluster\n", 642 device_xname(sc->sc_dev)); 643 error = ENOMEM; 644 goto fail; 645 } 646 647 data->buf = mtod(data->m, uint8_t *); 648 } 649 650 return 0; 651 652 fail: ural_free_tx_list(sc); 653 return error; 654 } 655 656 Static void 657 ural_free_rx_list(struct ural_softc *sc) 658 { 659 struct ural_rx_data *data; 660 int i; 661 662 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 663 data = &sc->rx_data[i]; 664 665 if (data->xfer != NULL) { 666 usbd_destroy_xfer(data->xfer); 667 data->xfer = NULL; 668 } 669 670 if (data->m != NULL) { 671 m_freem(data->m); 672 data->m = NULL; 673 } 674 } 675 } 676 677 Static int 678 ural_media_change(struct ifnet *ifp) 679 { 680 int error; 681 682 error = ieee80211_media_change(ifp); 683 if (error != ENETRESET) 684 return error; 685 686 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 687 ural_init(ifp); 688 689 return 0; 690 } 691 692 /* 693 * This function is called periodically (every 200ms) during scanning to 694 * switch from one channel to another. 695 */ 696 Static void 697 ural_next_scan(void *arg) 698 { 699 struct ural_softc *sc = arg; 700 struct ieee80211com *ic = &sc->sc_ic; 701 702 if (ic->ic_state == IEEE80211_S_SCAN) 703 ieee80211_next_scan(ic); 704 } 705 706 Static void 707 ural_task(void *arg) 708 { 709 struct ural_softc *sc = arg; 710 struct ieee80211com *ic = &sc->sc_ic; 711 enum ieee80211_state ostate; 712 struct ieee80211_node *ni; 713 struct mbuf *m; 714 715 ostate = ic->ic_state; 716 717 switch (sc->sc_state) { 718 case IEEE80211_S_INIT: 719 if (ostate == IEEE80211_S_RUN) { 720 /* abort TSF synchronization */ 721 ural_write(sc, RAL_TXRX_CSR19, 0); 722 723 /* force tx led to stop blinking */ 724 ural_write(sc, RAL_MAC_CSR20, 0); 725 } 726 break; 727 728 case IEEE80211_S_SCAN: 729 ural_set_chan(sc, ic->ic_curchan); 730 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 731 break; 732 733 case IEEE80211_S_AUTH: 734 ural_set_chan(sc, ic->ic_curchan); 735 break; 736 737 case IEEE80211_S_ASSOC: 738 ural_set_chan(sc, ic->ic_curchan); 739 break; 740 741 case IEEE80211_S_RUN: 742 ural_set_chan(sc, ic->ic_curchan); 743 744 ni = ic->ic_bss; 745 746 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 747 ural_update_slot(ic->ic_ifp); 748 ural_set_txpreamble(sc); 749 ural_set_basicrates(sc); 750 ural_set_bssid(sc, ni->ni_bssid); 751 } 752 753 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 754 ic->ic_opmode == IEEE80211_M_IBSS) { 755 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 756 if (m == NULL) { 757 printf("%s: could not allocate beacon\n", 758 device_xname(sc->sc_dev)); 759 return; 760 } 761 762 if (ural_tx_bcn(sc, m, ni) != 0) { 763 m_freem(m); 764 printf("%s: could not send beacon\n", 765 device_xname(sc->sc_dev)); 766 return; 767 } 768 769 /* beacon is no longer needed */ 770 m_freem(m); 771 } 772 773 /* make tx led blink on tx (controlled by ASIC) */ 774 ural_write(sc, RAL_MAC_CSR20, 1); 775 776 if (ic->ic_opmode != IEEE80211_M_MONITOR) 777 ural_enable_tsf_sync(sc); 778 779 /* enable automatic rate adaptation in STA mode */ 780 if (ic->ic_opmode == IEEE80211_M_STA && 781 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 782 ural_amrr_start(sc, ni); 783 784 break; 785 } 786 787 sc->sc_newstate(ic, sc->sc_state, -1); 788 } 789 790 Static int 791 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 792 int arg) 793 { 794 struct ural_softc *sc = ic->ic_ifp->if_softc; 795 796 usb_rem_task(sc->sc_udev, &sc->sc_task); 797 callout_stop(&sc->sc_scan_ch); 798 callout_stop(&sc->sc_amrr_ch); 799 800 /* do it in a process context */ 801 sc->sc_state = nstate; 802 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 803 804 return 0; 805 } 806 807 /* quickly determine if a given rate is CCK or OFDM */ 808 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 809 810 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 811 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 812 813 #define RAL_SIFS 10 /* us */ 814 815 #define RAL_RXTX_TURNAROUND 5 /* us */ 816 817 /* 818 * This function is only used by the Rx radiotap code. 819 */ 820 Static int 821 ural_rxrate(struct ural_rx_desc *desc) 822 { 823 if (le32toh(desc->flags) & RAL_RX_OFDM) { 824 /* reverse function of ural_plcp_signal */ 825 switch (desc->rate) { 826 case 0xb: return 12; 827 case 0xf: return 18; 828 case 0xa: return 24; 829 case 0xe: return 36; 830 case 0x9: return 48; 831 case 0xd: return 72; 832 case 0x8: return 96; 833 case 0xc: return 108; 834 } 835 } else { 836 if (desc->rate == 10) 837 return 2; 838 if (desc->rate == 20) 839 return 4; 840 if (desc->rate == 55) 841 return 11; 842 if (desc->rate == 110) 843 return 22; 844 } 845 return 2; /* should not get there */ 846 } 847 848 Static void 849 ural_txeof(struct usbd_xfer *xfer, void * priv, 850 usbd_status status) 851 { 852 struct ural_tx_data *data = priv; 853 struct ural_softc *sc = data->sc; 854 struct ifnet *ifp = &sc->sc_if; 855 int s; 856 857 if (status != USBD_NORMAL_COMPLETION) { 858 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 859 return; 860 861 printf("%s: could not transmit buffer: %s\n", 862 device_xname(sc->sc_dev), usbd_errstr(status)); 863 864 if (status == USBD_STALLED) 865 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 866 867 ifp->if_oerrors++; 868 return; 869 } 870 871 s = splnet(); 872 873 m_freem(data->m); 874 data->m = NULL; 875 ieee80211_free_node(data->ni); 876 data->ni = NULL; 877 878 sc->tx_queued--; 879 ifp->if_opackets++; 880 881 DPRINTFN(10, ("tx done\n")); 882 883 sc->sc_tx_timer = 0; 884 ifp->if_flags &= ~IFF_OACTIVE; 885 ural_start(ifp); 886 887 splx(s); 888 } 889 890 Static void 891 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 892 { 893 struct ural_rx_data *data = priv; 894 struct ural_softc *sc = data->sc; 895 struct ieee80211com *ic = &sc->sc_ic; 896 struct ifnet *ifp = &sc->sc_if; 897 struct ural_rx_desc *desc; 898 struct ieee80211_frame *wh; 899 struct ieee80211_node *ni; 900 struct mbuf *mnew, *m; 901 int s, len; 902 903 if (status != USBD_NORMAL_COMPLETION) { 904 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 905 return; 906 907 if (status == USBD_STALLED) 908 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 909 goto skip; 910 } 911 912 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 913 914 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 915 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 916 len)); 917 ifp->if_ierrors++; 918 goto skip; 919 } 920 921 /* rx descriptor is located at the end */ 922 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 923 924 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 925 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 926 /* 927 * This should not happen since we did not request to receive 928 * those frames when we filled RAL_TXRX_CSR2. 929 */ 930 DPRINTFN(5, ("PHY or CRC error\n")); 931 ifp->if_ierrors++; 932 goto skip; 933 } 934 935 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 936 if (mnew == NULL) { 937 ifp->if_ierrors++; 938 goto skip; 939 } 940 941 MCLGET(mnew, M_DONTWAIT); 942 if (!(mnew->m_flags & M_EXT)) { 943 ifp->if_ierrors++; 944 m_freem(mnew); 945 goto skip; 946 } 947 948 m = data->m; 949 data->m = mnew; 950 data->buf = mtod(data->m, uint8_t *); 951 952 /* finalize mbuf */ 953 m->m_pkthdr.rcvif = ifp; 954 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 955 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 956 957 s = splnet(); 958 959 if (sc->sc_drvbpf != NULL) { 960 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 961 962 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 963 tap->wr_rate = ural_rxrate(desc); 964 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 965 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 966 tap->wr_antenna = sc->rx_ant; 967 tap->wr_antsignal = desc->rssi; 968 969 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 970 } 971 972 wh = mtod(m, struct ieee80211_frame *); 973 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 974 975 /* send the frame to the 802.11 layer */ 976 ieee80211_input(ic, m, ni, desc->rssi, 0); 977 978 /* node is no longer needed */ 979 ieee80211_free_node(ni); 980 981 splx(s); 982 983 DPRINTFN(15, ("rx done\n")); 984 985 skip: /* setup a new transfer */ 986 usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, 987 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 988 usbd_transfer(xfer); 989 } 990 991 /* 992 * Return the expected ack rate for a frame transmitted at rate `rate'. 993 * XXX: this should depend on the destination node basic rate set. 994 */ 995 Static int 996 ural_ack_rate(struct ieee80211com *ic, int rate) 997 { 998 switch (rate) { 999 /* CCK rates */ 1000 case 2: 1001 return 2; 1002 case 4: 1003 case 11: 1004 case 22: 1005 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1006 1007 /* OFDM rates */ 1008 case 12: 1009 case 18: 1010 return 12; 1011 case 24: 1012 case 36: 1013 return 24; 1014 case 48: 1015 case 72: 1016 case 96: 1017 case 108: 1018 return 48; 1019 } 1020 1021 /* default to 1Mbps */ 1022 return 2; 1023 } 1024 1025 /* 1026 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1027 * The function automatically determines the operating mode depending on the 1028 * given rate. `flags' indicates whether short preamble is in use or not. 1029 */ 1030 Static uint16_t 1031 ural_txtime(int len, int rate, uint32_t flags) 1032 { 1033 uint16_t txtime; 1034 1035 if (RAL_RATE_IS_OFDM(rate)) { 1036 /* IEEE Std 802.11g-2003, pp. 37 */ 1037 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1038 txtime = 16 + 4 + 4 * txtime + 6; 1039 } else { 1040 /* IEEE Std 802.11b-1999, pp. 28 */ 1041 txtime = (16 * len + rate - 1) / rate; 1042 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1043 txtime += 72 + 24; 1044 else 1045 txtime += 144 + 48; 1046 } 1047 return txtime; 1048 } 1049 1050 Static uint8_t 1051 ural_plcp_signal(int rate) 1052 { 1053 switch (rate) { 1054 /* CCK rates (returned values are device-dependent) */ 1055 case 2: return 0x0; 1056 case 4: return 0x1; 1057 case 11: return 0x2; 1058 case 22: return 0x3; 1059 1060 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1061 case 12: return 0xb; 1062 case 18: return 0xf; 1063 case 24: return 0xa; 1064 case 36: return 0xe; 1065 case 48: return 0x9; 1066 case 72: return 0xd; 1067 case 96: return 0x8; 1068 case 108: return 0xc; 1069 1070 /* unsupported rates (should not get there) */ 1071 default: return 0xff; 1072 } 1073 } 1074 1075 Static void 1076 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1077 uint32_t flags, int len, int rate) 1078 { 1079 struct ieee80211com *ic = &sc->sc_ic; 1080 uint16_t plcp_length; 1081 int remainder; 1082 1083 desc->flags = htole32(flags); 1084 desc->flags |= htole32(RAL_TX_NEWSEQ); 1085 desc->flags |= htole32(len << 16); 1086 1087 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1088 desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); 1089 1090 /* setup PLCP fields */ 1091 desc->plcp_signal = ural_plcp_signal(rate); 1092 desc->plcp_service = 4; 1093 1094 len += IEEE80211_CRC_LEN; 1095 if (RAL_RATE_IS_OFDM(rate)) { 1096 desc->flags |= htole32(RAL_TX_OFDM); 1097 1098 plcp_length = len & 0xfff; 1099 desc->plcp_length_hi = plcp_length >> 6; 1100 desc->plcp_length_lo = plcp_length & 0x3f; 1101 } else { 1102 plcp_length = (16 * len + rate - 1) / rate; 1103 if (rate == 22) { 1104 remainder = (16 * len) % 22; 1105 if (remainder != 0 && remainder < 7) 1106 desc->plcp_service |= RAL_PLCP_LENGEXT; 1107 } 1108 desc->plcp_length_hi = plcp_length >> 8; 1109 desc->plcp_length_lo = plcp_length & 0xff; 1110 1111 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1112 desc->plcp_signal |= 0x08; 1113 } 1114 1115 desc->iv = 0; 1116 desc->eiv = 0; 1117 } 1118 1119 #define RAL_TX_TIMEOUT 5000 1120 1121 Static int 1122 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1123 { 1124 struct ural_tx_desc *desc; 1125 struct usbd_xfer *xfer; 1126 uint8_t cmd = 0; 1127 usbd_status error; 1128 uint8_t *buf; 1129 int xferlen, rate; 1130 1131 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1132 1133 /* xfer length needs to be a multiple of two! */ 1134 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1135 1136 error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, 1137 USBD_FORCE_SHORT_XFER, 0, &xfer); 1138 if (error) 1139 return error; 1140 1141 buf = usbd_get_buffer(xfer); 1142 1143 usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, 1144 RAL_TX_TIMEOUT, NULL); 1145 1146 error = usbd_sync_transfer(xfer); 1147 if (error != 0) { 1148 usbd_destroy_xfer(xfer); 1149 return error; 1150 } 1151 1152 desc = (struct ural_tx_desc *)buf; 1153 1154 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1155 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1156 m0->m_pkthdr.len, rate); 1157 1158 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1159 m0->m_pkthdr.len, rate, xferlen)); 1160 1161 usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, 1162 RAL_TX_TIMEOUT, NULL); 1163 1164 error = usbd_sync_transfer(xfer); 1165 usbd_destroy_xfer(xfer); 1166 1167 return error; 1168 } 1169 1170 Static int 1171 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1172 { 1173 struct ieee80211com *ic = &sc->sc_ic; 1174 struct ural_tx_desc *desc; 1175 struct ural_tx_data *data; 1176 struct ieee80211_frame *wh; 1177 struct ieee80211_key *k; 1178 uint32_t flags = 0; 1179 uint16_t dur; 1180 usbd_status error; 1181 int xferlen, rate; 1182 1183 data = &sc->tx_data[0]; 1184 desc = (struct ural_tx_desc *)data->buf; 1185 1186 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1187 1188 wh = mtod(m0, struct ieee80211_frame *); 1189 1190 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1191 k = ieee80211_crypto_encap(ic, ni, m0); 1192 if (k == NULL) { 1193 m_freem(m0); 1194 return ENOBUFS; 1195 } 1196 } 1197 1198 data->m = m0; 1199 data->ni = ni; 1200 1201 wh = mtod(m0, struct ieee80211_frame *); 1202 1203 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1204 flags |= RAL_TX_ACK; 1205 1206 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1207 *(uint16_t *)wh->i_dur = htole16(dur); 1208 1209 /* tell hardware to add timestamp for probe responses */ 1210 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1211 IEEE80211_FC0_TYPE_MGT && 1212 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1213 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1214 flags |= RAL_TX_TIMESTAMP; 1215 } 1216 1217 if (sc->sc_drvbpf != NULL) { 1218 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1219 1220 tap->wt_flags = 0; 1221 tap->wt_rate = rate; 1222 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1223 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1224 tap->wt_antenna = sc->tx_ant; 1225 1226 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1227 } 1228 1229 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1230 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1231 1232 /* align end on a 2-bytes boundary */ 1233 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1234 1235 /* 1236 * No space left in the last URB to store the extra 2 bytes, force 1237 * sending of another URB. 1238 */ 1239 if ((xferlen % 64) == 0) 1240 xferlen += 2; 1241 1242 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1243 m0->m_pkthdr.len, rate, xferlen)); 1244 1245 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1246 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1247 1248 error = usbd_transfer(data->xfer); 1249 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1250 m_freem(m0); 1251 return error; 1252 } 1253 1254 sc->tx_queued++; 1255 1256 return 0; 1257 } 1258 1259 Static int 1260 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1261 { 1262 struct ieee80211com *ic = &sc->sc_ic; 1263 struct ural_tx_desc *desc; 1264 struct ural_tx_data *data; 1265 struct ieee80211_frame *wh; 1266 struct ieee80211_key *k; 1267 uint32_t flags = 0; 1268 uint16_t dur; 1269 usbd_status error; 1270 int xferlen, rate; 1271 1272 wh = mtod(m0, struct ieee80211_frame *); 1273 1274 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1275 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1276 else 1277 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1278 1279 rate &= IEEE80211_RATE_VAL; 1280 1281 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1282 k = ieee80211_crypto_encap(ic, ni, m0); 1283 if (k == NULL) { 1284 m_freem(m0); 1285 return ENOBUFS; 1286 } 1287 1288 /* packet header may have moved, reset our local pointer */ 1289 wh = mtod(m0, struct ieee80211_frame *); 1290 } 1291 1292 data = &sc->tx_data[0]; 1293 desc = (struct ural_tx_desc *)data->buf; 1294 1295 data->m = m0; 1296 data->ni = ni; 1297 1298 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1299 flags |= RAL_TX_ACK; 1300 flags |= RAL_TX_RETRY(7); 1301 1302 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1303 ic->ic_flags) + RAL_SIFS; 1304 *(uint16_t *)wh->i_dur = htole16(dur); 1305 } 1306 1307 if (sc->sc_drvbpf != NULL) { 1308 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1309 1310 tap->wt_flags = 0; 1311 tap->wt_rate = rate; 1312 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1313 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1314 tap->wt_antenna = sc->tx_ant; 1315 1316 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1317 } 1318 1319 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1320 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1321 1322 /* align end on a 2-bytes boundary */ 1323 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1324 1325 /* 1326 * No space left in the last URB to store the extra 2 bytes, force 1327 * sending of another URB. 1328 */ 1329 if ((xferlen % 64) == 0) 1330 xferlen += 2; 1331 1332 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1333 m0->m_pkthdr.len, rate, xferlen)); 1334 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1335 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1336 1337 error = usbd_transfer(data->xfer); 1338 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1339 return error; 1340 1341 sc->tx_queued++; 1342 1343 return 0; 1344 } 1345 1346 Static void 1347 ural_start(struct ifnet *ifp) 1348 { 1349 struct ural_softc *sc = ifp->if_softc; 1350 struct ieee80211com *ic = &sc->sc_ic; 1351 struct mbuf *m0; 1352 struct ether_header *eh; 1353 struct ieee80211_node *ni; 1354 1355 for (;;) { 1356 IF_POLL(&ic->ic_mgtq, m0); 1357 if (m0 != NULL) { 1358 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1359 ifp->if_flags |= IFF_OACTIVE; 1360 break; 1361 } 1362 IF_DEQUEUE(&ic->ic_mgtq, m0); 1363 1364 ni = M_GETCTX(m0, struct ieee80211_node *); 1365 m0->m_pkthdr.rcvif = NULL; 1366 bpf_mtap3(ic->ic_rawbpf, m0); 1367 if (ural_tx_mgt(sc, m0, ni) != 0) 1368 break; 1369 1370 } else { 1371 if (ic->ic_state != IEEE80211_S_RUN) 1372 break; 1373 IFQ_DEQUEUE(&ifp->if_snd, m0); 1374 if (m0 == NULL) 1375 break; 1376 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1377 IF_PREPEND(&ifp->if_snd, m0); 1378 ifp->if_flags |= IFF_OACTIVE; 1379 break; 1380 } 1381 1382 if (m0->m_len < sizeof(struct ether_header) && 1383 !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1384 continue; 1385 1386 eh = mtod(m0, struct ether_header *); 1387 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1388 if (ni == NULL) { 1389 m_freem(m0); 1390 continue; 1391 } 1392 bpf_mtap(ifp, m0); 1393 m0 = ieee80211_encap(ic, m0, ni); 1394 if (m0 == NULL) { 1395 ieee80211_free_node(ni); 1396 continue; 1397 } 1398 bpf_mtap3(ic->ic_rawbpf, m0); 1399 if (ural_tx_data(sc, m0, ni) != 0) { 1400 ieee80211_free_node(ni); 1401 ifp->if_oerrors++; 1402 break; 1403 } 1404 } 1405 1406 sc->sc_tx_timer = 5; 1407 ifp->if_timer = 1; 1408 } 1409 } 1410 1411 Static void 1412 ural_watchdog(struct ifnet *ifp) 1413 { 1414 struct ural_softc *sc = ifp->if_softc; 1415 struct ieee80211com *ic = &sc->sc_ic; 1416 1417 ifp->if_timer = 0; 1418 1419 if (sc->sc_tx_timer > 0) { 1420 if (--sc->sc_tx_timer == 0) { 1421 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1422 /*ural_init(sc); XXX needs a process context! */ 1423 ifp->if_oerrors++; 1424 return; 1425 } 1426 ifp->if_timer = 1; 1427 } 1428 1429 ieee80211_watchdog(ic); 1430 } 1431 1432 /* 1433 * This function allows for fast channel switching in monitor mode (used by 1434 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1435 * generate a new beacon frame. 1436 */ 1437 Static int 1438 ural_reset(struct ifnet *ifp) 1439 { 1440 struct ural_softc *sc = ifp->if_softc; 1441 struct ieee80211com *ic = &sc->sc_ic; 1442 1443 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1444 return ENETRESET; 1445 1446 ural_set_chan(sc, ic->ic_curchan); 1447 1448 return 0; 1449 } 1450 1451 Static int 1452 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1453 { 1454 #define IS_RUNNING(ifp) \ 1455 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1456 1457 struct ural_softc *sc = ifp->if_softc; 1458 struct ieee80211com *ic = &sc->sc_ic; 1459 int s, error = 0; 1460 1461 s = splnet(); 1462 1463 switch (cmd) { 1464 case SIOCSIFFLAGS: 1465 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1466 break; 1467 /* XXX re-use ether_ioctl() */ 1468 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1469 case IFF_UP|IFF_RUNNING: 1470 ural_update_promisc(sc); 1471 break; 1472 case IFF_UP: 1473 ural_init(ifp); 1474 break; 1475 case IFF_RUNNING: 1476 ural_stop(ifp, 1); 1477 break; 1478 case 0: 1479 break; 1480 } 1481 break; 1482 1483 case SIOCADDMULTI: 1484 case SIOCDELMULTI: 1485 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1486 error = 0; 1487 } 1488 break; 1489 1490 default: 1491 error = ieee80211_ioctl(ic, cmd, data); 1492 } 1493 1494 if (error == ENETRESET) { 1495 if (IS_RUNNING(ifp) && 1496 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1497 ural_init(ifp); 1498 error = 0; 1499 } 1500 1501 splx(s); 1502 1503 return error; 1504 #undef IS_RUNNING 1505 } 1506 1507 Static void 1508 ural_set_testmode(struct ural_softc *sc) 1509 { 1510 usb_device_request_t req; 1511 usbd_status error; 1512 1513 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1514 req.bRequest = RAL_VENDOR_REQUEST; 1515 USETW(req.wValue, 4); 1516 USETW(req.wIndex, 1); 1517 USETW(req.wLength, 0); 1518 1519 error = usbd_do_request(sc->sc_udev, &req, NULL); 1520 if (error != 0) { 1521 printf("%s: could not set test mode: %s\n", 1522 device_xname(sc->sc_dev), usbd_errstr(error)); 1523 } 1524 } 1525 1526 Static void 1527 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1528 { 1529 usb_device_request_t req; 1530 usbd_status error; 1531 1532 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1533 req.bRequest = RAL_READ_EEPROM; 1534 USETW(req.wValue, 0); 1535 USETW(req.wIndex, addr); 1536 USETW(req.wLength, len); 1537 1538 error = usbd_do_request(sc->sc_udev, &req, buf); 1539 if (error != 0) { 1540 printf("%s: could not read EEPROM: %s\n", 1541 device_xname(sc->sc_dev), usbd_errstr(error)); 1542 } 1543 } 1544 1545 Static uint16_t 1546 ural_read(struct ural_softc *sc, uint16_t reg) 1547 { 1548 usb_device_request_t req; 1549 usbd_status error; 1550 uint16_t val; 1551 1552 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1553 req.bRequest = RAL_READ_MAC; 1554 USETW(req.wValue, 0); 1555 USETW(req.wIndex, reg); 1556 USETW(req.wLength, sizeof(uint16_t)); 1557 1558 error = usbd_do_request(sc->sc_udev, &req, &val); 1559 if (error != 0) { 1560 printf("%s: could not read MAC register: %s\n", 1561 device_xname(sc->sc_dev), usbd_errstr(error)); 1562 return 0; 1563 } 1564 1565 return le16toh(val); 1566 } 1567 1568 Static void 1569 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1570 { 1571 usb_device_request_t req; 1572 usbd_status error; 1573 1574 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1575 req.bRequest = RAL_READ_MULTI_MAC; 1576 USETW(req.wValue, 0); 1577 USETW(req.wIndex, reg); 1578 USETW(req.wLength, len); 1579 1580 error = usbd_do_request(sc->sc_udev, &req, buf); 1581 if (error != 0) { 1582 printf("%s: could not read MAC register: %s\n", 1583 device_xname(sc->sc_dev), usbd_errstr(error)); 1584 } 1585 } 1586 1587 Static void 1588 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1589 { 1590 usb_device_request_t req; 1591 usbd_status error; 1592 1593 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1594 req.bRequest = RAL_WRITE_MAC; 1595 USETW(req.wValue, val); 1596 USETW(req.wIndex, reg); 1597 USETW(req.wLength, 0); 1598 1599 error = usbd_do_request(sc->sc_udev, &req, NULL); 1600 if (error != 0) { 1601 printf("%s: could not write MAC register: %s\n", 1602 device_xname(sc->sc_dev), usbd_errstr(error)); 1603 } 1604 } 1605 1606 Static void 1607 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1608 { 1609 usb_device_request_t req; 1610 usbd_status error; 1611 1612 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1613 req.bRequest = RAL_WRITE_MULTI_MAC; 1614 USETW(req.wValue, 0); 1615 USETW(req.wIndex, reg); 1616 USETW(req.wLength, len); 1617 1618 error = usbd_do_request(sc->sc_udev, &req, buf); 1619 if (error != 0) { 1620 printf("%s: could not write MAC register: %s\n", 1621 device_xname(sc->sc_dev), usbd_errstr(error)); 1622 } 1623 } 1624 1625 Static void 1626 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1627 { 1628 uint16_t tmp; 1629 int ntries; 1630 1631 for (ntries = 0; ntries < 5; ntries++) { 1632 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1633 break; 1634 } 1635 if (ntries == 5) { 1636 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1637 return; 1638 } 1639 1640 tmp = reg << 8 | val; 1641 ural_write(sc, RAL_PHY_CSR7, tmp); 1642 } 1643 1644 Static uint8_t 1645 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1646 { 1647 uint16_t val; 1648 int ntries; 1649 1650 val = RAL_BBP_WRITE | reg << 8; 1651 ural_write(sc, RAL_PHY_CSR7, val); 1652 1653 for (ntries = 0; ntries < 5; ntries++) { 1654 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1655 break; 1656 } 1657 if (ntries == 5) { 1658 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1659 return 0; 1660 } 1661 1662 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1663 } 1664 1665 Static void 1666 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1667 { 1668 uint32_t tmp; 1669 int ntries; 1670 1671 for (ntries = 0; ntries < 5; ntries++) { 1672 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1673 break; 1674 } 1675 if (ntries == 5) { 1676 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1677 return; 1678 } 1679 1680 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1681 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1682 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1683 1684 /* remember last written value in sc */ 1685 sc->rf_regs[reg] = val; 1686 1687 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1688 } 1689 1690 Static void 1691 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1692 { 1693 struct ieee80211com *ic = &sc->sc_ic; 1694 uint8_t power, tmp; 1695 u_int i, chan; 1696 1697 chan = ieee80211_chan2ieee(ic, c); 1698 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1699 return; 1700 1701 if (IEEE80211_IS_CHAN_2GHZ(c)) 1702 power = min(sc->txpow[chan - 1], 31); 1703 else 1704 power = 31; 1705 1706 /* adjust txpower using ifconfig settings */ 1707 power -= (100 - ic->ic_txpowlimit) / 8; 1708 1709 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1710 1711 switch (sc->rf_rev) { 1712 case RAL_RF_2522: 1713 ural_rf_write(sc, RAL_RF1, 0x00814); 1714 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1715 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1716 break; 1717 1718 case RAL_RF_2523: 1719 ural_rf_write(sc, RAL_RF1, 0x08804); 1720 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1721 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1722 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1723 break; 1724 1725 case RAL_RF_2524: 1726 ural_rf_write(sc, RAL_RF1, 0x0c808); 1727 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1728 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1729 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1730 break; 1731 1732 case RAL_RF_2525: 1733 ural_rf_write(sc, RAL_RF1, 0x08808); 1734 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1735 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1736 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1737 1738 ural_rf_write(sc, RAL_RF1, 0x08808); 1739 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1740 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1741 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1742 break; 1743 1744 case RAL_RF_2525E: 1745 ural_rf_write(sc, RAL_RF1, 0x08808); 1746 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1747 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1748 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1749 break; 1750 1751 case RAL_RF_2526: 1752 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1753 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1754 ural_rf_write(sc, RAL_RF1, 0x08804); 1755 1756 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1757 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1758 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1759 break; 1760 1761 /* dual-band RF */ 1762 case RAL_RF_5222: 1763 for (i = 0; ural_rf5222[i].chan != chan; i++); 1764 1765 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1766 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1767 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1768 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1769 break; 1770 } 1771 1772 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1773 ic->ic_state != IEEE80211_S_SCAN) { 1774 /* set Japan filter bit for channel 14 */ 1775 tmp = ural_bbp_read(sc, 70); 1776 1777 tmp &= ~RAL_JAPAN_FILTER; 1778 if (chan == 14) 1779 tmp |= RAL_JAPAN_FILTER; 1780 1781 ural_bbp_write(sc, 70, tmp); 1782 1783 /* clear CRC errors */ 1784 ural_read(sc, RAL_STA_CSR0); 1785 1786 DELAY(10000); 1787 ural_disable_rf_tune(sc); 1788 } 1789 } 1790 1791 /* 1792 * Disable RF auto-tuning. 1793 */ 1794 Static void 1795 ural_disable_rf_tune(struct ural_softc *sc) 1796 { 1797 uint32_t tmp; 1798 1799 if (sc->rf_rev != RAL_RF_2523) { 1800 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1801 ural_rf_write(sc, RAL_RF1, tmp); 1802 } 1803 1804 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1805 ural_rf_write(sc, RAL_RF3, tmp); 1806 1807 DPRINTFN(2, ("disabling RF autotune\n")); 1808 } 1809 1810 /* 1811 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1812 * synchronization. 1813 */ 1814 Static void 1815 ural_enable_tsf_sync(struct ural_softc *sc) 1816 { 1817 struct ieee80211com *ic = &sc->sc_ic; 1818 uint16_t logcwmin, preload, tmp; 1819 1820 /* first, disable TSF synchronization */ 1821 ural_write(sc, RAL_TXRX_CSR19, 0); 1822 1823 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1824 ural_write(sc, RAL_TXRX_CSR18, tmp); 1825 1826 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1827 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1828 tmp = logcwmin << 12 | preload; 1829 ural_write(sc, RAL_TXRX_CSR20, tmp); 1830 1831 /* finally, enable TSF synchronization */ 1832 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1833 if (ic->ic_opmode == IEEE80211_M_STA) 1834 tmp |= RAL_ENABLE_TSF_SYNC(1); 1835 else 1836 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1837 ural_write(sc, RAL_TXRX_CSR19, tmp); 1838 1839 DPRINTF(("enabling TSF synchronization\n")); 1840 } 1841 1842 Static void 1843 ural_update_slot(struct ifnet *ifp) 1844 { 1845 struct ural_softc *sc = ifp->if_softc; 1846 struct ieee80211com *ic = &sc->sc_ic; 1847 uint16_t slottime, sifs, eifs; 1848 1849 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1850 1851 /* 1852 * These settings may sound a bit inconsistent but this is what the 1853 * reference driver does. 1854 */ 1855 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1856 sifs = 16 - RAL_RXTX_TURNAROUND; 1857 eifs = 364; 1858 } else { 1859 sifs = 10 - RAL_RXTX_TURNAROUND; 1860 eifs = 64; 1861 } 1862 1863 ural_write(sc, RAL_MAC_CSR10, slottime); 1864 ural_write(sc, RAL_MAC_CSR11, sifs); 1865 ural_write(sc, RAL_MAC_CSR12, eifs); 1866 } 1867 1868 Static void 1869 ural_set_txpreamble(struct ural_softc *sc) 1870 { 1871 uint16_t tmp; 1872 1873 tmp = ural_read(sc, RAL_TXRX_CSR10); 1874 1875 tmp &= ~RAL_SHORT_PREAMBLE; 1876 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1877 tmp |= RAL_SHORT_PREAMBLE; 1878 1879 ural_write(sc, RAL_TXRX_CSR10, tmp); 1880 } 1881 1882 Static void 1883 ural_set_basicrates(struct ural_softc *sc) 1884 { 1885 struct ieee80211com *ic = &sc->sc_ic; 1886 1887 /* update basic rate set */ 1888 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1889 /* 11b basic rates: 1, 2Mbps */ 1890 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1891 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1892 /* 11a basic rates: 6, 12, 24Mbps */ 1893 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1894 } else { 1895 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1896 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1897 } 1898 } 1899 1900 Static void 1901 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1902 { 1903 uint16_t tmp; 1904 1905 tmp = bssid[0] | bssid[1] << 8; 1906 ural_write(sc, RAL_MAC_CSR5, tmp); 1907 1908 tmp = bssid[2] | bssid[3] << 8; 1909 ural_write(sc, RAL_MAC_CSR6, tmp); 1910 1911 tmp = bssid[4] | bssid[5] << 8; 1912 ural_write(sc, RAL_MAC_CSR7, tmp); 1913 1914 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1915 } 1916 1917 Static void 1918 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1919 { 1920 uint16_t tmp; 1921 1922 tmp = addr[0] | addr[1] << 8; 1923 ural_write(sc, RAL_MAC_CSR2, tmp); 1924 1925 tmp = addr[2] | addr[3] << 8; 1926 ural_write(sc, RAL_MAC_CSR3, tmp); 1927 1928 tmp = addr[4] | addr[5] << 8; 1929 ural_write(sc, RAL_MAC_CSR4, tmp); 1930 1931 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1932 } 1933 1934 Static void 1935 ural_update_promisc(struct ural_softc *sc) 1936 { 1937 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1938 uint32_t tmp; 1939 1940 tmp = ural_read(sc, RAL_TXRX_CSR2); 1941 1942 tmp &= ~RAL_DROP_NOT_TO_ME; 1943 if (!(ifp->if_flags & IFF_PROMISC)) 1944 tmp |= RAL_DROP_NOT_TO_ME; 1945 1946 ural_write(sc, RAL_TXRX_CSR2, tmp); 1947 1948 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1949 "entering" : "leaving")); 1950 } 1951 1952 Static const char * 1953 ural_get_rf(int rev) 1954 { 1955 switch (rev) { 1956 case RAL_RF_2522: return "RT2522"; 1957 case RAL_RF_2523: return "RT2523"; 1958 case RAL_RF_2524: return "RT2524"; 1959 case RAL_RF_2525: return "RT2525"; 1960 case RAL_RF_2525E: return "RT2525e"; 1961 case RAL_RF_2526: return "RT2526"; 1962 case RAL_RF_5222: return "RT5222"; 1963 default: return "unknown"; 1964 } 1965 } 1966 1967 Static void 1968 ural_read_eeprom(struct ural_softc *sc) 1969 { 1970 struct ieee80211com *ic = &sc->sc_ic; 1971 uint16_t val; 1972 1973 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1974 val = le16toh(val); 1975 sc->rf_rev = (val >> 11) & 0x7; 1976 sc->hw_radio = (val >> 10) & 0x1; 1977 sc->led_mode = (val >> 6) & 0x7; 1978 sc->rx_ant = (val >> 4) & 0x3; 1979 sc->tx_ant = (val >> 2) & 0x3; 1980 sc->nb_ant = val & 0x3; 1981 1982 /* read MAC address */ 1983 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1984 1985 /* read default values for BBP registers */ 1986 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1987 1988 /* read Tx power for all b/g channels */ 1989 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1990 } 1991 1992 Static int 1993 ural_bbp_init(struct ural_softc *sc) 1994 { 1995 int i, ntries; 1996 1997 /* wait for BBP to be ready */ 1998 for (ntries = 0; ntries < 100; ntries++) { 1999 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2000 break; 2001 DELAY(1000); 2002 } 2003 if (ntries == 100) { 2004 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2005 return EIO; 2006 } 2007 2008 /* initialize BBP registers to default values */ 2009 for (i = 0; i < __arraycount(ural_def_bbp); i++) 2010 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2011 2012 #if 0 2013 /* initialize BBP registers to values stored in EEPROM */ 2014 for (i = 0; i < 16; i++) { 2015 if (sc->bbp_prom[i].reg == 0xff) 2016 continue; 2017 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2018 } 2019 #endif 2020 2021 return 0; 2022 } 2023 2024 Static void 2025 ural_set_txantenna(struct ural_softc *sc, int antenna) 2026 { 2027 uint16_t tmp; 2028 uint8_t tx; 2029 2030 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2031 if (antenna == 1) 2032 tx |= RAL_BBP_ANTA; 2033 else if (antenna == 2) 2034 tx |= RAL_BBP_ANTB; 2035 else 2036 tx |= RAL_BBP_DIVERSITY; 2037 2038 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2039 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2040 sc->rf_rev == RAL_RF_5222) 2041 tx |= RAL_BBP_FLIPIQ; 2042 2043 ural_bbp_write(sc, RAL_BBP_TX, tx); 2044 2045 /* update values in PHY_CSR5 and PHY_CSR6 */ 2046 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2047 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2048 2049 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2050 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2051 } 2052 2053 Static void 2054 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2055 { 2056 uint8_t rx; 2057 2058 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2059 if (antenna == 1) 2060 rx |= RAL_BBP_ANTA; 2061 else if (antenna == 2) 2062 rx |= RAL_BBP_ANTB; 2063 else 2064 rx |= RAL_BBP_DIVERSITY; 2065 2066 /* need to force no I/Q flip for RF 2525e and 2526 */ 2067 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2068 rx &= ~RAL_BBP_FLIPIQ; 2069 2070 ural_bbp_write(sc, RAL_BBP_RX, rx); 2071 } 2072 2073 Static int 2074 ural_init(struct ifnet *ifp) 2075 { 2076 struct ural_softc *sc = ifp->if_softc; 2077 struct ieee80211com *ic = &sc->sc_ic; 2078 struct ieee80211_key *wk; 2079 uint16_t tmp; 2080 usbd_status error; 2081 int i, ntries; 2082 2083 ural_set_testmode(sc); 2084 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2085 2086 ural_stop(ifp, 0); 2087 2088 /* initialize MAC registers to default values */ 2089 for (i = 0; i < __arraycount(ural_def_mac); i++) 2090 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2091 2092 /* wait for BBP and RF to wake up (this can take a long time!) */ 2093 for (ntries = 0; ntries < 100; ntries++) { 2094 tmp = ural_read(sc, RAL_MAC_CSR17); 2095 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2096 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2097 break; 2098 DELAY(1000); 2099 } 2100 if (ntries == 100) { 2101 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2102 device_xname(sc->sc_dev)); 2103 error = EIO; 2104 goto fail; 2105 } 2106 2107 /* we're ready! */ 2108 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2109 2110 /* set basic rate set (will be updated later) */ 2111 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2112 2113 error = ural_bbp_init(sc); 2114 if (error != 0) 2115 goto fail; 2116 2117 /* set default BSS channel */ 2118 ural_set_chan(sc, ic->ic_curchan); 2119 2120 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2121 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2122 2123 ural_set_txantenna(sc, sc->tx_ant); 2124 ural_set_rxantenna(sc, sc->rx_ant); 2125 2126 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2127 ural_set_macaddr(sc, ic->ic_myaddr); 2128 2129 /* 2130 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2131 */ 2132 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2133 wk = &ic->ic_crypto.cs_nw_keys[i]; 2134 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2135 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2136 } 2137 2138 /* 2139 * Allocate xfer for AMRR statistics requests. 2140 */ 2141 struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); 2142 error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); 2143 if (error) { 2144 printf("%s: could not allocate AMRR xfer\n", 2145 device_xname(sc->sc_dev)); 2146 goto fail; 2147 } 2148 2149 /* 2150 * Open Tx and Rx USB bulk pipes. 2151 */ 2152 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2153 &sc->sc_tx_pipeh); 2154 if (error != 0) { 2155 printf("%s: could not open Tx pipe: %s\n", 2156 device_xname(sc->sc_dev), usbd_errstr(error)); 2157 goto fail; 2158 } 2159 2160 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2161 &sc->sc_rx_pipeh); 2162 if (error != 0) { 2163 printf("%s: could not open Rx pipe: %s\n", 2164 device_xname(sc->sc_dev), usbd_errstr(error)); 2165 goto fail; 2166 } 2167 2168 /* 2169 * Allocate Tx and Rx xfer queues. 2170 */ 2171 error = ural_alloc_tx_list(sc); 2172 if (error != 0) { 2173 printf("%s: could not allocate Tx list\n", 2174 device_xname(sc->sc_dev)); 2175 goto fail; 2176 } 2177 2178 error = ural_alloc_rx_list(sc); 2179 if (error != 0) { 2180 printf("%s: could not allocate Rx list\n", 2181 device_xname(sc->sc_dev)); 2182 goto fail; 2183 } 2184 2185 /* 2186 * Start up the receive pipe. 2187 */ 2188 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2189 struct ural_rx_data *data = &sc->rx_data[i]; 2190 2191 usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, 2192 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2193 usbd_transfer(data->xfer); 2194 } 2195 2196 /* kick Rx */ 2197 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2198 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2199 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2200 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2201 tmp |= RAL_DROP_TODS; 2202 if (!(ifp->if_flags & IFF_PROMISC)) 2203 tmp |= RAL_DROP_NOT_TO_ME; 2204 } 2205 ural_write(sc, RAL_TXRX_CSR2, tmp); 2206 2207 ifp->if_flags &= ~IFF_OACTIVE; 2208 ifp->if_flags |= IFF_RUNNING; 2209 2210 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2211 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2212 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2213 } else 2214 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2215 2216 return 0; 2217 2218 fail: ural_stop(ifp, 1); 2219 return error; 2220 } 2221 2222 Static void 2223 ural_stop(struct ifnet *ifp, int disable) 2224 { 2225 struct ural_softc *sc = ifp->if_softc; 2226 struct ieee80211com *ic = &sc->sc_ic; 2227 2228 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2229 2230 sc->sc_tx_timer = 0; 2231 ifp->if_timer = 0; 2232 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2233 2234 /* disable Rx */ 2235 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2236 2237 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2238 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2239 ural_write(sc, RAL_MAC_CSR1, 0); 2240 2241 if (sc->amrr_xfer != NULL) { 2242 usbd_destroy_xfer(sc->amrr_xfer); 2243 sc->amrr_xfer = NULL; 2244 } 2245 2246 if (sc->sc_rx_pipeh != NULL) { 2247 usbd_abort_pipe(sc->sc_rx_pipeh); 2248 } 2249 2250 if (sc->sc_tx_pipeh != NULL) { 2251 usbd_abort_pipe(sc->sc_tx_pipeh); 2252 } 2253 2254 ural_free_rx_list(sc); 2255 ural_free_tx_list(sc); 2256 2257 if (sc->sc_rx_pipeh != NULL) { 2258 usbd_close_pipe(sc->sc_rx_pipeh); 2259 sc->sc_rx_pipeh = NULL; 2260 } 2261 2262 if (sc->sc_tx_pipeh != NULL) { 2263 usbd_close_pipe(sc->sc_tx_pipeh); 2264 sc->sc_tx_pipeh = NULL; 2265 } 2266 } 2267 2268 int 2269 ural_activate(device_t self, enum devact act) 2270 { 2271 struct ural_softc *sc = device_private(self); 2272 2273 switch (act) { 2274 case DVACT_DEACTIVATE: 2275 if_deactivate(&sc->sc_if); 2276 return 0; 2277 default: 2278 return EOPNOTSUPP; 2279 } 2280 } 2281 2282 Static void 2283 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2284 { 2285 int i; 2286 2287 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2288 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2289 2290 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2291 2292 /* set rate to some reasonable initial value */ 2293 for (i = ni->ni_rates.rs_nrates - 1; 2294 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2295 i--); 2296 ni->ni_txrate = i; 2297 2298 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2299 } 2300 2301 Static void 2302 ural_amrr_timeout(void *arg) 2303 { 2304 struct ural_softc *sc = (struct ural_softc *)arg; 2305 usb_device_request_t req; 2306 int s; 2307 2308 s = splusb(); 2309 2310 /* 2311 * Asynchronously read statistic registers (cleared by read). 2312 */ 2313 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2314 req.bRequest = RAL_READ_MULTI_MAC; 2315 USETW(req.wValue, 0); 2316 USETW(req.wIndex, RAL_STA_CSR0); 2317 USETW(req.wLength, sizeof(sc->sta)); 2318 2319 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2320 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, 2321 ural_amrr_update); 2322 (void)usbd_transfer(sc->amrr_xfer); 2323 2324 splx(s); 2325 } 2326 2327 Static void 2328 ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2329 usbd_status status) 2330 { 2331 struct ural_softc *sc = (struct ural_softc *)priv; 2332 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2333 2334 if (status != USBD_NORMAL_COMPLETION) { 2335 printf("%s: could not retrieve Tx statistics - " 2336 "cancelling automatic rate control\n", 2337 device_xname(sc->sc_dev)); 2338 return; 2339 } 2340 2341 /* count TX retry-fail as Tx errors */ 2342 ifp->if_oerrors += sc->sta[9]; 2343 2344 sc->amn.amn_retrycnt = 2345 sc->sta[7] + /* TX one-retry ok count */ 2346 sc->sta[8] + /* TX more-retry ok count */ 2347 sc->sta[9]; /* TX retry-fail count */ 2348 2349 sc->amn.amn_txcnt = 2350 sc->amn.amn_retrycnt + 2351 sc->sta[6]; /* TX no-retry ok count */ 2352 2353 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2354 2355 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2356 } 2357
Indexes created Mon Sep 29 21:09:56 GMT 2025