if_ural.c revision 1.51
1 /* $NetBSD: if_ural.c,v 1.51 2016/11/25 12:56:29 skrll Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.51 2016/11/25 12:56:29 skrll Exp $"); 28 29 #ifdef _KERNEL_OPT 30 #include "opt_usb.h" 31 #endif 32 33 #include <sys/param.h> 34 #include <sys/sockio.h> 35 #include <sys/sysctl.h> 36 #include <sys/mbuf.h> 37 #include <sys/kernel.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/conf.h> 41 #include <sys/device.h> 42 43 #include <sys/bus.h> 44 #include <machine/endian.h> 45 #include <sys/intr.h> 46 47 #include <net/bpf.h> 48 #include <net/if.h> 49 #include <net/if_arp.h> 50 #include <net/if_dl.h> 51 #include <net/if_ether.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 55 #include <netinet/in.h> 56 #include <netinet/in_systm.h> 57 #include <netinet/in_var.h> 58 #include <netinet/ip.h> 59 60 #include <net80211/ieee80211_netbsd.h> 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_amrr.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usbdevs.h> 69 70 #include <dev/usb/if_uralreg.h> 71 #include <dev/usb/if_uralvar.h> 72 73 #ifdef URAL_DEBUG 74 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 75 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 76 int ural_debug = 0; 77 #else 78 #define DPRINTF(x) 79 #define DPRINTFN(n, x) 80 #endif 81 82 /* various supported device vendors/products */ 83 static const struct usb_devno ural_devs[] = { 84 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 85 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 86 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 87 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 88 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 89 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 90 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 91 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 92 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 93 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 95 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 98 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 99 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 101 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 102 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 105 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 106 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 107 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 108 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 109 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 110 }; 111 112 Static int ural_alloc_tx_list(struct ural_softc *); 113 Static void ural_free_tx_list(struct ural_softc *); 114 Static int ural_alloc_rx_list(struct ural_softc *); 115 Static void ural_free_rx_list(struct ural_softc *); 116 Static int ural_media_change(struct ifnet *); 117 Static void ural_next_scan(void *); 118 Static void ural_task(void *); 119 Static int ural_newstate(struct ieee80211com *, 120 enum ieee80211_state, int); 121 Static int ural_rxrate(struct ural_rx_desc *); 122 Static void ural_txeof(struct usbd_xfer *, void *, 123 usbd_status); 124 Static void ural_rxeof(struct usbd_xfer *, void *, 125 usbd_status); 126 Static int ural_ack_rate(struct ieee80211com *, int); 127 Static uint16_t ural_txtime(int, int, uint32_t); 128 Static uint8_t ural_plcp_signal(int); 129 Static void ural_setup_tx_desc(struct ural_softc *, 130 struct ural_tx_desc *, uint32_t, int, int); 131 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137 Static void ural_start(struct ifnet *); 138 Static void ural_watchdog(struct ifnet *); 139 Static int ural_reset(struct ifnet *); 140 Static int ural_ioctl(struct ifnet *, u_long, void *); 141 Static void ural_set_testmode(struct ural_softc *); 142 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 143 int); 144 Static uint16_t ural_read(struct ural_softc *, uint16_t); 145 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 146 int); 147 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 148 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 149 int); 150 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 151 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 152 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 153 Static void ural_set_chan(struct ural_softc *, 154 struct ieee80211_channel *); 155 Static void ural_disable_rf_tune(struct ural_softc *); 156 Static void ural_enable_tsf_sync(struct ural_softc *); 157 Static void ural_update_slot(struct ifnet *); 158 Static void ural_set_txpreamble(struct ural_softc *); 159 Static void ural_set_basicrates(struct ural_softc *); 160 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 161 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 162 Static void ural_update_promisc(struct ural_softc *); 163 Static const char *ural_get_rf(int); 164 Static void ural_read_eeprom(struct ural_softc *); 165 Static int ural_bbp_init(struct ural_softc *); 166 Static void ural_set_txantenna(struct ural_softc *, int); 167 Static void ural_set_rxantenna(struct ural_softc *, int); 168 Static int ural_init(struct ifnet *); 169 Static void ural_stop(struct ifnet *, int); 170 Static void ural_amrr_start(struct ural_softc *, 171 struct ieee80211_node *); 172 Static void ural_amrr_timeout(void *); 173 Static void ural_amrr_update(struct usbd_xfer *, void *, 174 usbd_status status); 175 176 /* 177 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 178 */ 179 static const struct ieee80211_rateset ural_rateset_11a = 180 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 181 182 static const struct ieee80211_rateset ural_rateset_11b = 183 { 4, { 2, 4, 11, 22 } }; 184 185 static const struct ieee80211_rateset ural_rateset_11g = 186 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 187 188 /* 189 * Default values for MAC registers; values taken from the reference driver. 190 */ 191 static const struct { 192 uint16_t reg; 193 uint16_t val; 194 } ural_def_mac[] = { 195 { RAL_TXRX_CSR5, 0x8c8d }, 196 { RAL_TXRX_CSR6, 0x8b8a }, 197 { RAL_TXRX_CSR7, 0x8687 }, 198 { RAL_TXRX_CSR8, 0x0085 }, 199 { RAL_MAC_CSR13, 0x1111 }, 200 { RAL_MAC_CSR14, 0x1e11 }, 201 { RAL_TXRX_CSR21, 0xe78f }, 202 { RAL_MAC_CSR9, 0xff1d }, 203 { RAL_MAC_CSR11, 0x0002 }, 204 { RAL_MAC_CSR22, 0x0053 }, 205 { RAL_MAC_CSR15, 0x0000 }, 206 { RAL_MAC_CSR8, 0x0780 }, 207 { RAL_TXRX_CSR19, 0x0000 }, 208 { RAL_TXRX_CSR18, 0x005a }, 209 { RAL_PHY_CSR2, 0x0000 }, 210 { RAL_TXRX_CSR0, 0x1ec0 }, 211 { RAL_PHY_CSR4, 0x000f } 212 }; 213 214 /* 215 * Default values for BBP registers; values taken from the reference driver. 216 */ 217 static const struct { 218 uint8_t reg; 219 uint8_t val; 220 } ural_def_bbp[] = { 221 { 3, 0x02 }, 222 { 4, 0x19 }, 223 { 14, 0x1c }, 224 { 15, 0x30 }, 225 { 16, 0xac }, 226 { 17, 0x48 }, 227 { 18, 0x18 }, 228 { 19, 0xff }, 229 { 20, 0x1e }, 230 { 21, 0x08 }, 231 { 22, 0x08 }, 232 { 23, 0x08 }, 233 { 24, 0x80 }, 234 { 25, 0x50 }, 235 { 26, 0x08 }, 236 { 27, 0x23 }, 237 { 30, 0x10 }, 238 { 31, 0x2b }, 239 { 32, 0xb9 }, 240 { 34, 0x12 }, 241 { 35, 0x50 }, 242 { 39, 0xc4 }, 243 { 40, 0x02 }, 244 { 41, 0x60 }, 245 { 53, 0x10 }, 246 { 54, 0x18 }, 247 { 56, 0x08 }, 248 { 57, 0x10 }, 249 { 58, 0x08 }, 250 { 61, 0x60 }, 251 { 62, 0x10 }, 252 { 75, 0xff } 253 }; 254 255 /* 256 * Default values for RF register R2 indexed by channel numbers. 257 */ 258 static const uint32_t ural_rf2522_r2[] = { 259 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 260 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 261 }; 262 263 static const uint32_t ural_rf2523_r2[] = { 264 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 265 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 266 }; 267 268 static const uint32_t ural_rf2524_r2[] = { 269 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 270 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 271 }; 272 273 static const uint32_t ural_rf2525_r2[] = { 274 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 275 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 276 }; 277 278 static const uint32_t ural_rf2525_hi_r2[] = { 279 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 280 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 281 }; 282 283 static const uint32_t ural_rf2525e_r2[] = { 284 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 285 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 286 }; 287 288 static const uint32_t ural_rf2526_hi_r2[] = { 289 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 290 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 291 }; 292 293 static const uint32_t ural_rf2526_r2[] = { 294 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 295 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 296 }; 297 298 /* 299 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 300 * values taken from the reference driver. 301 */ 302 static const struct { 303 uint8_t chan; 304 uint32_t r1; 305 uint32_t r2; 306 uint32_t r4; 307 } ural_rf5222[] = { 308 { 1, 0x08808, 0x0044d, 0x00282 }, 309 { 2, 0x08808, 0x0044e, 0x00282 }, 310 { 3, 0x08808, 0x0044f, 0x00282 }, 311 { 4, 0x08808, 0x00460, 0x00282 }, 312 { 5, 0x08808, 0x00461, 0x00282 }, 313 { 6, 0x08808, 0x00462, 0x00282 }, 314 { 7, 0x08808, 0x00463, 0x00282 }, 315 { 8, 0x08808, 0x00464, 0x00282 }, 316 { 9, 0x08808, 0x00465, 0x00282 }, 317 { 10, 0x08808, 0x00466, 0x00282 }, 318 { 11, 0x08808, 0x00467, 0x00282 }, 319 { 12, 0x08808, 0x00468, 0x00282 }, 320 { 13, 0x08808, 0x00469, 0x00282 }, 321 { 14, 0x08808, 0x0046b, 0x00286 }, 322 323 { 36, 0x08804, 0x06225, 0x00287 }, 324 { 40, 0x08804, 0x06226, 0x00287 }, 325 { 44, 0x08804, 0x06227, 0x00287 }, 326 { 48, 0x08804, 0x06228, 0x00287 }, 327 { 52, 0x08804, 0x06229, 0x00287 }, 328 { 56, 0x08804, 0x0622a, 0x00287 }, 329 { 60, 0x08804, 0x0622b, 0x00287 }, 330 { 64, 0x08804, 0x0622c, 0x00287 }, 331 332 { 100, 0x08804, 0x02200, 0x00283 }, 333 { 104, 0x08804, 0x02201, 0x00283 }, 334 { 108, 0x08804, 0x02202, 0x00283 }, 335 { 112, 0x08804, 0x02203, 0x00283 }, 336 { 116, 0x08804, 0x02204, 0x00283 }, 337 { 120, 0x08804, 0x02205, 0x00283 }, 338 { 124, 0x08804, 0x02206, 0x00283 }, 339 { 128, 0x08804, 0x02207, 0x00283 }, 340 { 132, 0x08804, 0x02208, 0x00283 }, 341 { 136, 0x08804, 0x02209, 0x00283 }, 342 { 140, 0x08804, 0x0220a, 0x00283 }, 343 344 { 149, 0x08808, 0x02429, 0x00281 }, 345 { 153, 0x08808, 0x0242b, 0x00281 }, 346 { 157, 0x08808, 0x0242d, 0x00281 }, 347 { 161, 0x08808, 0x0242f, 0x00281 } 348 }; 349 350 int ural_match(device_t, cfdata_t, void *); 351 void ural_attach(device_t, device_t, void *); 352 int ural_detach(device_t, int); 353 int ural_activate(device_t, enum devact); 354 extern struct cfdriver ural_cd; 355 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, 356 ural_detach, ural_activate); 357 358 int 359 ural_match(device_t parent, cfdata_t match, void *aux) 360 { 361 struct usb_attach_arg *uaa = aux; 362 363 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 364 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 365 } 366 367 void 368 ural_attach(device_t parent, device_t self, void *aux) 369 { 370 struct ural_softc *sc = device_private(self); 371 struct usb_attach_arg *uaa = aux; 372 struct ieee80211com *ic = &sc->sc_ic; 373 struct ifnet *ifp = &sc->sc_if; 374 usb_interface_descriptor_t *id; 375 usb_endpoint_descriptor_t *ed; 376 usbd_status error; 377 char *devinfop; 378 int i; 379 380 sc->sc_dev = self; 381 sc->sc_udev = uaa->uaa_device; 382 383 aprint_naive("\n"); 384 aprint_normal("\n"); 385 386 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 387 aprint_normal_dev(self, "%s\n", devinfop); 388 usbd_devinfo_free(devinfop); 389 390 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 391 if (error != 0) { 392 aprint_error_dev(self, "failed to set configuration" 393 ", err=%s\n", usbd_errstr(error)); 394 return; 395 } 396 397 /* get the first interface handle */ 398 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 399 &sc->sc_iface); 400 if (error != 0) { 401 aprint_error_dev(self, "could not get interface handle\n"); 402 return; 403 } 404 405 /* 406 * Find endpoints. 407 */ 408 id = usbd_get_interface_descriptor(sc->sc_iface); 409 410 sc->sc_rx_no = sc->sc_tx_no = -1; 411 for (i = 0; i < id->bNumEndpoints; i++) { 412 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 413 if (ed == NULL) { 414 aprint_error_dev(self, 415 "no endpoint descriptor for %d\n", i); 416 return; 417 } 418 419 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 420 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 421 sc->sc_rx_no = ed->bEndpointAddress; 422 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 423 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 424 sc->sc_tx_no = ed->bEndpointAddress; 425 } 426 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 427 aprint_error_dev(self, "missing endpoint\n"); 428 return; 429 } 430 431 usb_init_task(&sc->sc_task, ural_task, sc, 0); 432 callout_init(&sc->sc_scan_ch, 0); 433 sc->amrr.amrr_min_success_threshold = 1; 434 sc->amrr.amrr_max_success_threshold = 15; 435 callout_init(&sc->sc_amrr_ch, 0); 436 437 /* retrieve RT2570 rev. no */ 438 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 439 440 /* retrieve MAC address and various other things from EEPROM */ 441 ural_read_eeprom(sc); 442 443 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 444 sc->asic_rev, ural_get_rf(sc->rf_rev)); 445 446 ifp->if_softc = sc; 447 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 448 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 449 ifp->if_init = ural_init; 450 ifp->if_ioctl = ural_ioctl; 451 ifp->if_start = ural_start; 452 ifp->if_watchdog = ural_watchdog; 453 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 454 IFQ_SET_READY(&ifp->if_snd); 455 456 ic->ic_ifp = ifp; 457 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 458 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 459 ic->ic_state = IEEE80211_S_INIT; 460 461 /* set device capabilities */ 462 ic->ic_caps = 463 IEEE80211_C_IBSS | /* IBSS mode supported */ 464 IEEE80211_C_MONITOR | /* monitor mode supported */ 465 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 466 IEEE80211_C_TXPMGT | /* tx power management */ 467 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 468 IEEE80211_C_SHSLOT | /* short slot time supported */ 469 IEEE80211_C_WPA; /* 802.11i */ 470 471 if (sc->rf_rev == RAL_RF_5222) { 472 /* set supported .11a rates */ 473 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 474 475 /* set supported .11a channels */ 476 for (i = 36; i <= 64; i += 4) { 477 ic->ic_channels[i].ic_freq = 478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 480 } 481 for (i = 100; i <= 140; i += 4) { 482 ic->ic_channels[i].ic_freq = 483 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 484 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 485 } 486 for (i = 149; i <= 161; i += 4) { 487 ic->ic_channels[i].ic_freq = 488 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 489 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 490 } 491 } 492 493 /* set supported .11b and .11g rates */ 494 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 495 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 496 497 /* set supported .11b and .11g channels (1 through 14) */ 498 for (i = 1; i <= 14; i++) { 499 ic->ic_channels[i].ic_freq = 500 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 501 ic->ic_channels[i].ic_flags = 502 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 503 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 504 } 505 506 if_attach(ifp); 507 ieee80211_ifattach(ic); 508 ic->ic_reset = ural_reset; 509 510 /* override state transition machine */ 511 sc->sc_newstate = ic->ic_newstate; 512 ic->ic_newstate = ural_newstate; 513 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 514 515 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 516 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 517 518 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 519 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 520 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 521 522 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 523 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 524 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 525 526 ieee80211_announce(ic); 527 528 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 529 530 if (!pmf_device_register(self, NULL, NULL)) 531 aprint_error_dev(self, "couldn't establish power handler\n"); 532 533 return; 534 } 535 536 int 537 ural_detach(device_t self, int flags) 538 { 539 struct ural_softc *sc = device_private(self); 540 struct ieee80211com *ic = &sc->sc_ic; 541 struct ifnet *ifp = &sc->sc_if; 542 int s; 543 544 pmf_device_deregister(self); 545 546 s = splusb(); 547 548 ural_stop(ifp, 1); 549 usb_rem_task(sc->sc_udev, &sc->sc_task); 550 callout_stop(&sc->sc_scan_ch); 551 callout_stop(&sc->sc_amrr_ch); 552 553 bpf_detach(ifp); 554 ieee80211_ifdetach(ic); 555 if_detach(ifp); 556 557 splx(s); 558 559 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 560 561 return 0; 562 } 563 564 Static int 565 ural_alloc_tx_list(struct ural_softc *sc) 566 { 567 struct ural_tx_data *data; 568 int i, error; 569 570 sc->tx_queued = 0; 571 572 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 573 data = &sc->tx_data[i]; 574 575 data->sc = sc; 576 error = usbd_create_xfer(sc->sc_tx_pipeh, 577 RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, 578 &data->xfer); 579 if (error) { 580 printf("%s: could not allocate tx xfer\n", 581 device_xname(sc->sc_dev)); 582 goto fail; 583 } 584 585 data->buf = usbd_get_buffer(data->xfer); 586 } 587 588 return 0; 589 590 fail: ural_free_tx_list(sc); 591 return error; 592 } 593 594 Static void 595 ural_free_tx_list(struct ural_softc *sc) 596 { 597 struct ural_tx_data *data; 598 int i; 599 600 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 601 data = &sc->tx_data[i]; 602 603 if (data->xfer != NULL) { 604 usbd_destroy_xfer(data->xfer); 605 data->xfer = NULL; 606 } 607 608 if (data->ni != NULL) { 609 ieee80211_free_node(data->ni); 610 data->ni = NULL; 611 } 612 } 613 } 614 615 Static int 616 ural_alloc_rx_list(struct ural_softc *sc) 617 { 618 struct ural_rx_data *data; 619 int i, error; 620 621 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 622 data = &sc->rx_data[i]; 623 624 data->sc = sc; 625 626 error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, 627 USBD_SHORT_XFER_OK, 0, &data->xfer); 628 if (error) { 629 printf("%s: could not allocate rx xfer\n", 630 device_xname(sc->sc_dev)); 631 goto fail; 632 } 633 634 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 635 if (data->m == NULL) { 636 printf("%s: could not allocate rx mbuf\n", 637 device_xname(sc->sc_dev)); 638 error = ENOMEM; 639 goto fail; 640 } 641 642 MCLGET(data->m, M_DONTWAIT); 643 if (!(data->m->m_flags & M_EXT)) { 644 printf("%s: could not allocate rx mbuf cluster\n", 645 device_xname(sc->sc_dev)); 646 error = ENOMEM; 647 goto fail; 648 } 649 650 data->buf = mtod(data->m, uint8_t *); 651 } 652 653 return 0; 654 655 fail: ural_free_tx_list(sc); 656 return error; 657 } 658 659 Static void 660 ural_free_rx_list(struct ural_softc *sc) 661 { 662 struct ural_rx_data *data; 663 int i; 664 665 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 666 data = &sc->rx_data[i]; 667 668 if (data->xfer != NULL) { 669 usbd_destroy_xfer(data->xfer); 670 data->xfer = NULL; 671 } 672 673 if (data->m != NULL) { 674 m_freem(data->m); 675 data->m = NULL; 676 } 677 } 678 } 679 680 Static int 681 ural_media_change(struct ifnet *ifp) 682 { 683 int error; 684 685 error = ieee80211_media_change(ifp); 686 if (error != ENETRESET) 687 return error; 688 689 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 690 ural_init(ifp); 691 692 return 0; 693 } 694 695 /* 696 * This function is called periodically (every 200ms) during scanning to 697 * switch from one channel to another. 698 */ 699 Static void 700 ural_next_scan(void *arg) 701 { 702 struct ural_softc *sc = arg; 703 struct ieee80211com *ic = &sc->sc_ic; 704 705 if (ic->ic_state == IEEE80211_S_SCAN) 706 ieee80211_next_scan(ic); 707 } 708 709 Static void 710 ural_task(void *arg) 711 { 712 struct ural_softc *sc = arg; 713 struct ieee80211com *ic = &sc->sc_ic; 714 enum ieee80211_state ostate; 715 struct ieee80211_node *ni; 716 struct mbuf *m; 717 718 ostate = ic->ic_state; 719 720 switch (sc->sc_state) { 721 case IEEE80211_S_INIT: 722 if (ostate == IEEE80211_S_RUN) { 723 /* abort TSF synchronization */ 724 ural_write(sc, RAL_TXRX_CSR19, 0); 725 726 /* force tx led to stop blinking */ 727 ural_write(sc, RAL_MAC_CSR20, 0); 728 } 729 break; 730 731 case IEEE80211_S_SCAN: 732 ural_set_chan(sc, ic->ic_curchan); 733 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 734 break; 735 736 case IEEE80211_S_AUTH: 737 ural_set_chan(sc, ic->ic_curchan); 738 break; 739 740 case IEEE80211_S_ASSOC: 741 ural_set_chan(sc, ic->ic_curchan); 742 break; 743 744 case IEEE80211_S_RUN: 745 ural_set_chan(sc, ic->ic_curchan); 746 747 ni = ic->ic_bss; 748 749 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 750 ural_update_slot(ic->ic_ifp); 751 ural_set_txpreamble(sc); 752 ural_set_basicrates(sc); 753 ural_set_bssid(sc, ni->ni_bssid); 754 } 755 756 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 757 ic->ic_opmode == IEEE80211_M_IBSS) { 758 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 759 if (m == NULL) { 760 printf("%s: could not allocate beacon\n", 761 device_xname(sc->sc_dev)); 762 return; 763 } 764 765 if (ural_tx_bcn(sc, m, ni) != 0) { 766 m_freem(m); 767 printf("%s: could not send beacon\n", 768 device_xname(sc->sc_dev)); 769 return; 770 } 771 772 /* beacon is no longer needed */ 773 m_freem(m); 774 } 775 776 /* make tx led blink on tx (controlled by ASIC) */ 777 ural_write(sc, RAL_MAC_CSR20, 1); 778 779 if (ic->ic_opmode != IEEE80211_M_MONITOR) 780 ural_enable_tsf_sync(sc); 781 782 /* enable automatic rate adaptation in STA mode */ 783 if (ic->ic_opmode == IEEE80211_M_STA && 784 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 785 ural_amrr_start(sc, ni); 786 787 break; 788 } 789 790 sc->sc_newstate(ic, sc->sc_state, -1); 791 } 792 793 Static int 794 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 795 int arg) 796 { 797 struct ural_softc *sc = ic->ic_ifp->if_softc; 798 799 usb_rem_task(sc->sc_udev, &sc->sc_task); 800 callout_stop(&sc->sc_scan_ch); 801 callout_stop(&sc->sc_amrr_ch); 802 803 /* do it in a process context */ 804 sc->sc_state = nstate; 805 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 806 807 return 0; 808 } 809 810 /* quickly determine if a given rate is CCK or OFDM */ 811 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 812 813 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 814 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 815 816 #define RAL_SIFS 10 /* us */ 817 818 #define RAL_RXTX_TURNAROUND 5 /* us */ 819 820 /* 821 * This function is only used by the Rx radiotap code. 822 */ 823 Static int 824 ural_rxrate(struct ural_rx_desc *desc) 825 { 826 if (le32toh(desc->flags) & RAL_RX_OFDM) { 827 /* reverse function of ural_plcp_signal */ 828 switch (desc->rate) { 829 case 0xb: return 12; 830 case 0xf: return 18; 831 case 0xa: return 24; 832 case 0xe: return 36; 833 case 0x9: return 48; 834 case 0xd: return 72; 835 case 0x8: return 96; 836 case 0xc: return 108; 837 } 838 } else { 839 if (desc->rate == 10) 840 return 2; 841 if (desc->rate == 20) 842 return 4; 843 if (desc->rate == 55) 844 return 11; 845 if (desc->rate == 110) 846 return 22; 847 } 848 return 2; /* should not get there */ 849 } 850 851 Static void 852 ural_txeof(struct usbd_xfer *xfer, void * priv, 853 usbd_status status) 854 { 855 struct ural_tx_data *data = priv; 856 struct ural_softc *sc = data->sc; 857 struct ifnet *ifp = &sc->sc_if; 858 int s; 859 860 if (status != USBD_NORMAL_COMPLETION) { 861 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 862 return; 863 864 printf("%s: could not transmit buffer: %s\n", 865 device_xname(sc->sc_dev), usbd_errstr(status)); 866 867 if (status == USBD_STALLED) 868 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 869 870 ifp->if_oerrors++; 871 return; 872 } 873 874 s = splnet(); 875 876 m_freem(data->m); 877 data->m = NULL; 878 ieee80211_free_node(data->ni); 879 data->ni = NULL; 880 881 sc->tx_queued--; 882 ifp->if_opackets++; 883 884 DPRINTFN(10, ("tx done\n")); 885 886 sc->sc_tx_timer = 0; 887 ifp->if_flags &= ~IFF_OACTIVE; 888 ural_start(ifp); 889 890 splx(s); 891 } 892 893 Static void 894 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 895 { 896 struct ural_rx_data *data = priv; 897 struct ural_softc *sc = data->sc; 898 struct ieee80211com *ic = &sc->sc_ic; 899 struct ifnet *ifp = &sc->sc_if; 900 struct ural_rx_desc *desc; 901 struct ieee80211_frame *wh; 902 struct ieee80211_node *ni; 903 struct mbuf *mnew, *m; 904 int s, len; 905 906 if (status != USBD_NORMAL_COMPLETION) { 907 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 908 return; 909 910 if (status == USBD_STALLED) 911 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 912 goto skip; 913 } 914 915 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 916 917 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 918 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 919 len)); 920 ifp->if_ierrors++; 921 goto skip; 922 } 923 924 /* rx descriptor is located at the end */ 925 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 926 927 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 928 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 929 /* 930 * This should not happen since we did not request to receive 931 * those frames when we filled RAL_TXRX_CSR2. 932 */ 933 DPRINTFN(5, ("PHY or CRC error\n")); 934 ifp->if_ierrors++; 935 goto skip; 936 } 937 938 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 939 if (mnew == NULL) { 940 ifp->if_ierrors++; 941 goto skip; 942 } 943 944 MCLGET(mnew, M_DONTWAIT); 945 if (!(mnew->m_flags & M_EXT)) { 946 ifp->if_ierrors++; 947 m_freem(mnew); 948 goto skip; 949 } 950 951 m = data->m; 952 data->m = mnew; 953 data->buf = mtod(data->m, uint8_t *); 954 955 /* finalize mbuf */ 956 m_set_rcvif(m, ifp); 957 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 958 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 959 960 s = splnet(); 961 962 if (sc->sc_drvbpf != NULL) { 963 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 964 965 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 966 tap->wr_rate = ural_rxrate(desc); 967 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 968 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 969 tap->wr_antenna = sc->rx_ant; 970 tap->wr_antsignal = desc->rssi; 971 972 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 973 } 974 975 wh = mtod(m, struct ieee80211_frame *); 976 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 977 978 /* send the frame to the 802.11 layer */ 979 ieee80211_input(ic, m, ni, desc->rssi, 0); 980 981 /* node is no longer needed */ 982 ieee80211_free_node(ni); 983 984 splx(s); 985 986 DPRINTFN(15, ("rx done\n")); 987 988 skip: /* setup a new transfer */ 989 usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, 990 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 991 usbd_transfer(xfer); 992 } 993 994 /* 995 * Return the expected ack rate for a frame transmitted at rate `rate'. 996 * XXX: this should depend on the destination node basic rate set. 997 */ 998 Static int 999 ural_ack_rate(struct ieee80211com *ic, int rate) 1000 { 1001 switch (rate) { 1002 /* CCK rates */ 1003 case 2: 1004 return 2; 1005 case 4: 1006 case 11: 1007 case 22: 1008 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1009 1010 /* OFDM rates */ 1011 case 12: 1012 case 18: 1013 return 12; 1014 case 24: 1015 case 36: 1016 return 24; 1017 case 48: 1018 case 72: 1019 case 96: 1020 case 108: 1021 return 48; 1022 } 1023 1024 /* default to 1Mbps */ 1025 return 2; 1026 } 1027 1028 /* 1029 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1030 * The function automatically determines the operating mode depending on the 1031 * given rate. `flags' indicates whether short preamble is in use or not. 1032 */ 1033 Static uint16_t 1034 ural_txtime(int len, int rate, uint32_t flags) 1035 { 1036 uint16_t txtime; 1037 1038 if (RAL_RATE_IS_OFDM(rate)) { 1039 /* IEEE Std 802.11g-2003, pp. 37 */ 1040 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1041 txtime = 16 + 4 + 4 * txtime + 6; 1042 } else { 1043 /* IEEE Std 802.11b-1999, pp. 28 */ 1044 txtime = (16 * len + rate - 1) / rate; 1045 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1046 txtime += 72 + 24; 1047 else 1048 txtime += 144 + 48; 1049 } 1050 return txtime; 1051 } 1052 1053 Static uint8_t 1054 ural_plcp_signal(int rate) 1055 { 1056 switch (rate) { 1057 /* CCK rates (returned values are device-dependent) */ 1058 case 2: return 0x0; 1059 case 4: return 0x1; 1060 case 11: return 0x2; 1061 case 22: return 0x3; 1062 1063 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1064 case 12: return 0xb; 1065 case 18: return 0xf; 1066 case 24: return 0xa; 1067 case 36: return 0xe; 1068 case 48: return 0x9; 1069 case 72: return 0xd; 1070 case 96: return 0x8; 1071 case 108: return 0xc; 1072 1073 /* unsupported rates (should not get there) */ 1074 default: return 0xff; 1075 } 1076 } 1077 1078 Static void 1079 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1080 uint32_t flags, int len, int rate) 1081 { 1082 struct ieee80211com *ic = &sc->sc_ic; 1083 uint16_t plcp_length; 1084 int remainder; 1085 1086 desc->flags = htole32(flags); 1087 desc->flags |= htole32(RAL_TX_NEWSEQ); 1088 desc->flags |= htole32(len << 16); 1089 1090 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1091 desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); 1092 1093 /* setup PLCP fields */ 1094 desc->plcp_signal = ural_plcp_signal(rate); 1095 desc->plcp_service = 4; 1096 1097 len += IEEE80211_CRC_LEN; 1098 if (RAL_RATE_IS_OFDM(rate)) { 1099 desc->flags |= htole32(RAL_TX_OFDM); 1100 1101 plcp_length = len & 0xfff; 1102 desc->plcp_length_hi = plcp_length >> 6; 1103 desc->plcp_length_lo = plcp_length & 0x3f; 1104 } else { 1105 plcp_length = (16 * len + rate - 1) / rate; 1106 if (rate == 22) { 1107 remainder = (16 * len) % 22; 1108 if (remainder != 0 && remainder < 7) 1109 desc->plcp_service |= RAL_PLCP_LENGEXT; 1110 } 1111 desc->plcp_length_hi = plcp_length >> 8; 1112 desc->plcp_length_lo = plcp_length & 0xff; 1113 1114 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1115 desc->plcp_signal |= 0x08; 1116 } 1117 1118 desc->iv = 0; 1119 desc->eiv = 0; 1120 } 1121 1122 #define RAL_TX_TIMEOUT 5000 1123 1124 Static int 1125 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1126 { 1127 struct ural_tx_desc *desc; 1128 struct usbd_xfer *xfer; 1129 uint8_t cmd = 0; 1130 usbd_status error; 1131 uint8_t *buf; 1132 int xferlen, rate; 1133 1134 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1135 1136 /* xfer length needs to be a multiple of two! */ 1137 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1138 1139 error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, 1140 USBD_FORCE_SHORT_XFER, 0, &xfer); 1141 if (error) 1142 return error; 1143 1144 buf = usbd_get_buffer(xfer); 1145 1146 usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, 1147 RAL_TX_TIMEOUT, NULL); 1148 1149 error = usbd_sync_transfer(xfer); 1150 if (error != 0) { 1151 usbd_destroy_xfer(xfer); 1152 return error; 1153 } 1154 1155 desc = (struct ural_tx_desc *)buf; 1156 1157 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1158 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1159 m0->m_pkthdr.len, rate); 1160 1161 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1162 m0->m_pkthdr.len, rate, xferlen)); 1163 1164 usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, 1165 RAL_TX_TIMEOUT, NULL); 1166 1167 error = usbd_sync_transfer(xfer); 1168 usbd_destroy_xfer(xfer); 1169 1170 return error; 1171 } 1172 1173 Static int 1174 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1175 { 1176 struct ieee80211com *ic = &sc->sc_ic; 1177 struct ural_tx_desc *desc; 1178 struct ural_tx_data *data; 1179 struct ieee80211_frame *wh; 1180 struct ieee80211_key *k; 1181 uint32_t flags = 0; 1182 uint16_t dur; 1183 usbd_status error; 1184 int xferlen, rate; 1185 1186 data = &sc->tx_data[0]; 1187 desc = (struct ural_tx_desc *)data->buf; 1188 1189 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1190 1191 wh = mtod(m0, struct ieee80211_frame *); 1192 1193 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1194 k = ieee80211_crypto_encap(ic, ni, m0); 1195 if (k == NULL) { 1196 m_freem(m0); 1197 return ENOBUFS; 1198 } 1199 } 1200 1201 data->m = m0; 1202 data->ni = ni; 1203 1204 wh = mtod(m0, struct ieee80211_frame *); 1205 1206 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1207 flags |= RAL_TX_ACK; 1208 1209 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1210 *(uint16_t *)wh->i_dur = htole16(dur); 1211 1212 /* tell hardware to add timestamp for probe responses */ 1213 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1214 IEEE80211_FC0_TYPE_MGT && 1215 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1216 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1217 flags |= RAL_TX_TIMESTAMP; 1218 } 1219 1220 if (sc->sc_drvbpf != NULL) { 1221 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1222 1223 tap->wt_flags = 0; 1224 tap->wt_rate = rate; 1225 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1226 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1227 tap->wt_antenna = sc->tx_ant; 1228 1229 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1230 } 1231 1232 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1233 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1234 1235 /* align end on a 2-bytes boundary */ 1236 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1237 1238 /* 1239 * No space left in the last URB to store the extra 2 bytes, force 1240 * sending of another URB. 1241 */ 1242 if ((xferlen % 64) == 0) 1243 xferlen += 2; 1244 1245 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1246 m0->m_pkthdr.len, rate, xferlen)); 1247 1248 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1249 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1250 1251 error = usbd_transfer(data->xfer); 1252 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1253 m_freem(m0); 1254 return error; 1255 } 1256 1257 sc->tx_queued++; 1258 1259 return 0; 1260 } 1261 1262 Static int 1263 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1264 { 1265 struct ieee80211com *ic = &sc->sc_ic; 1266 struct ural_tx_desc *desc; 1267 struct ural_tx_data *data; 1268 struct ieee80211_frame *wh; 1269 struct ieee80211_key *k; 1270 uint32_t flags = 0; 1271 uint16_t dur; 1272 usbd_status error; 1273 int xferlen, rate; 1274 1275 wh = mtod(m0, struct ieee80211_frame *); 1276 1277 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1278 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1279 else 1280 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1281 1282 rate &= IEEE80211_RATE_VAL; 1283 1284 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1285 k = ieee80211_crypto_encap(ic, ni, m0); 1286 if (k == NULL) { 1287 m_freem(m0); 1288 return ENOBUFS; 1289 } 1290 1291 /* packet header may have moved, reset our local pointer */ 1292 wh = mtod(m0, struct ieee80211_frame *); 1293 } 1294 1295 data = &sc->tx_data[0]; 1296 desc = (struct ural_tx_desc *)data->buf; 1297 1298 data->m = m0; 1299 data->ni = ni; 1300 1301 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1302 flags |= RAL_TX_ACK; 1303 flags |= RAL_TX_RETRY(7); 1304 1305 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1306 ic->ic_flags) + RAL_SIFS; 1307 *(uint16_t *)wh->i_dur = htole16(dur); 1308 } 1309 1310 if (sc->sc_drvbpf != NULL) { 1311 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1312 1313 tap->wt_flags = 0; 1314 tap->wt_rate = rate; 1315 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1316 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1317 tap->wt_antenna = sc->tx_ant; 1318 1319 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1320 } 1321 1322 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1323 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1324 1325 /* align end on a 2-bytes boundary */ 1326 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1327 1328 /* 1329 * No space left in the last URB to store the extra 2 bytes, force 1330 * sending of another URB. 1331 */ 1332 if ((xferlen % 64) == 0) 1333 xferlen += 2; 1334 1335 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1336 m0->m_pkthdr.len, rate, xferlen)); 1337 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1338 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1339 1340 error = usbd_transfer(data->xfer); 1341 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1342 return error; 1343 1344 sc->tx_queued++; 1345 1346 return 0; 1347 } 1348 1349 Static void 1350 ural_start(struct ifnet *ifp) 1351 { 1352 struct ural_softc *sc = ifp->if_softc; 1353 struct ieee80211com *ic = &sc->sc_ic; 1354 struct mbuf *m0; 1355 struct ether_header *eh; 1356 struct ieee80211_node *ni; 1357 1358 for (;;) { 1359 IF_POLL(&ic->ic_mgtq, m0); 1360 if (m0 != NULL) { 1361 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1362 ifp->if_flags |= IFF_OACTIVE; 1363 break; 1364 } 1365 IF_DEQUEUE(&ic->ic_mgtq, m0); 1366 1367 ni = M_GETCTX(m0, struct ieee80211_node *); 1368 M_CLEARCTX(m0); 1369 bpf_mtap3(ic->ic_rawbpf, m0); 1370 if (ural_tx_mgt(sc, m0, ni) != 0) 1371 break; 1372 1373 } else { 1374 if (ic->ic_state != IEEE80211_S_RUN) 1375 break; 1376 IFQ_DEQUEUE(&ifp->if_snd, m0); 1377 if (m0 == NULL) 1378 break; 1379 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1380 IF_PREPEND(&ifp->if_snd, m0); 1381 ifp->if_flags |= IFF_OACTIVE; 1382 break; 1383 } 1384 1385 if (m0->m_len < sizeof(struct ether_header) && 1386 !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1387 continue; 1388 1389 eh = mtod(m0, struct ether_header *); 1390 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1391 if (ni == NULL) { 1392 m_freem(m0); 1393 continue; 1394 } 1395 bpf_mtap(ifp, m0); 1396 m0 = ieee80211_encap(ic, m0, ni); 1397 if (m0 == NULL) { 1398 ieee80211_free_node(ni); 1399 continue; 1400 } 1401 bpf_mtap3(ic->ic_rawbpf, m0); 1402 if (ural_tx_data(sc, m0, ni) != 0) { 1403 ieee80211_free_node(ni); 1404 ifp->if_oerrors++; 1405 break; 1406 } 1407 } 1408 1409 sc->sc_tx_timer = 5; 1410 ifp->if_timer = 1; 1411 } 1412 } 1413 1414 Static void 1415 ural_watchdog(struct ifnet *ifp) 1416 { 1417 struct ural_softc *sc = ifp->if_softc; 1418 struct ieee80211com *ic = &sc->sc_ic; 1419 1420 ifp->if_timer = 0; 1421 1422 if (sc->sc_tx_timer > 0) { 1423 if (--sc->sc_tx_timer == 0) { 1424 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1425 /*ural_init(sc); XXX needs a process context! */ 1426 ifp->if_oerrors++; 1427 return; 1428 } 1429 ifp->if_timer = 1; 1430 } 1431 1432 ieee80211_watchdog(ic); 1433 } 1434 1435 /* 1436 * This function allows for fast channel switching in monitor mode (used by 1437 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1438 * generate a new beacon frame. 1439 */ 1440 Static int 1441 ural_reset(struct ifnet *ifp) 1442 { 1443 struct ural_softc *sc = ifp->if_softc; 1444 struct ieee80211com *ic = &sc->sc_ic; 1445 1446 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1447 return ENETRESET; 1448 1449 ural_set_chan(sc, ic->ic_curchan); 1450 1451 return 0; 1452 } 1453 1454 Static int 1455 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1456 { 1457 #define IS_RUNNING(ifp) \ 1458 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1459 1460 struct ural_softc *sc = ifp->if_softc; 1461 struct ieee80211com *ic = &sc->sc_ic; 1462 int s, error = 0; 1463 1464 s = splnet(); 1465 1466 switch (cmd) { 1467 case SIOCSIFFLAGS: 1468 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1469 break; 1470 /* XXX re-use ether_ioctl() */ 1471 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1472 case IFF_UP|IFF_RUNNING: 1473 ural_update_promisc(sc); 1474 break; 1475 case IFF_UP: 1476 ural_init(ifp); 1477 break; 1478 case IFF_RUNNING: 1479 ural_stop(ifp, 1); 1480 break; 1481 case 0: 1482 break; 1483 } 1484 break; 1485 1486 case SIOCADDMULTI: 1487 case SIOCDELMULTI: 1488 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1489 error = 0; 1490 } 1491 break; 1492 1493 default: 1494 error = ieee80211_ioctl(ic, cmd, data); 1495 } 1496 1497 if (error == ENETRESET) { 1498 if (IS_RUNNING(ifp) && 1499 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1500 ural_init(ifp); 1501 error = 0; 1502 } 1503 1504 splx(s); 1505 1506 return error; 1507 #undef IS_RUNNING 1508 } 1509 1510 Static void 1511 ural_set_testmode(struct ural_softc *sc) 1512 { 1513 usb_device_request_t req; 1514 usbd_status error; 1515 1516 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1517 req.bRequest = RAL_VENDOR_REQUEST; 1518 USETW(req.wValue, 4); 1519 USETW(req.wIndex, 1); 1520 USETW(req.wLength, 0); 1521 1522 error = usbd_do_request(sc->sc_udev, &req, NULL); 1523 if (error != 0) { 1524 printf("%s: could not set test mode: %s\n", 1525 device_xname(sc->sc_dev), usbd_errstr(error)); 1526 } 1527 } 1528 1529 Static void 1530 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1531 { 1532 usb_device_request_t req; 1533 usbd_status error; 1534 1535 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1536 req.bRequest = RAL_READ_EEPROM; 1537 USETW(req.wValue, 0); 1538 USETW(req.wIndex, addr); 1539 USETW(req.wLength, len); 1540 1541 error = usbd_do_request(sc->sc_udev, &req, buf); 1542 if (error != 0) { 1543 printf("%s: could not read EEPROM: %s\n", 1544 device_xname(sc->sc_dev), usbd_errstr(error)); 1545 } 1546 } 1547 1548 Static uint16_t 1549 ural_read(struct ural_softc *sc, uint16_t reg) 1550 { 1551 usb_device_request_t req; 1552 usbd_status error; 1553 uint16_t val; 1554 1555 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1556 req.bRequest = RAL_READ_MAC; 1557 USETW(req.wValue, 0); 1558 USETW(req.wIndex, reg); 1559 USETW(req.wLength, sizeof(uint16_t)); 1560 1561 error = usbd_do_request(sc->sc_udev, &req, &val); 1562 if (error != 0) { 1563 printf("%s: could not read MAC register: %s\n", 1564 device_xname(sc->sc_dev), usbd_errstr(error)); 1565 return 0; 1566 } 1567 1568 return le16toh(val); 1569 } 1570 1571 Static void 1572 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1573 { 1574 usb_device_request_t req; 1575 usbd_status error; 1576 1577 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1578 req.bRequest = RAL_READ_MULTI_MAC; 1579 USETW(req.wValue, 0); 1580 USETW(req.wIndex, reg); 1581 USETW(req.wLength, len); 1582 1583 error = usbd_do_request(sc->sc_udev, &req, buf); 1584 if (error != 0) { 1585 printf("%s: could not read MAC register: %s\n", 1586 device_xname(sc->sc_dev), usbd_errstr(error)); 1587 } 1588 } 1589 1590 Static void 1591 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1592 { 1593 usb_device_request_t req; 1594 usbd_status error; 1595 1596 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1597 req.bRequest = RAL_WRITE_MAC; 1598 USETW(req.wValue, val); 1599 USETW(req.wIndex, reg); 1600 USETW(req.wLength, 0); 1601 1602 error = usbd_do_request(sc->sc_udev, &req, NULL); 1603 if (error != 0) { 1604 printf("%s: could not write MAC register: %s\n", 1605 device_xname(sc->sc_dev), usbd_errstr(error)); 1606 } 1607 } 1608 1609 Static void 1610 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1611 { 1612 usb_device_request_t req; 1613 usbd_status error; 1614 1615 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1616 req.bRequest = RAL_WRITE_MULTI_MAC; 1617 USETW(req.wValue, 0); 1618 USETW(req.wIndex, reg); 1619 USETW(req.wLength, len); 1620 1621 error = usbd_do_request(sc->sc_udev, &req, buf); 1622 if (error != 0) { 1623 printf("%s: could not write MAC register: %s\n", 1624 device_xname(sc->sc_dev), usbd_errstr(error)); 1625 } 1626 } 1627 1628 Static void 1629 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1630 { 1631 uint16_t tmp; 1632 int ntries; 1633 1634 for (ntries = 0; ntries < 5; ntries++) { 1635 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1636 break; 1637 } 1638 if (ntries == 5) { 1639 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1640 return; 1641 } 1642 1643 tmp = reg << 8 | val; 1644 ural_write(sc, RAL_PHY_CSR7, tmp); 1645 } 1646 1647 Static uint8_t 1648 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1649 { 1650 uint16_t val; 1651 int ntries; 1652 1653 val = RAL_BBP_WRITE | reg << 8; 1654 ural_write(sc, RAL_PHY_CSR7, val); 1655 1656 for (ntries = 0; ntries < 5; ntries++) { 1657 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1658 break; 1659 } 1660 if (ntries == 5) { 1661 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1662 return 0; 1663 } 1664 1665 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1666 } 1667 1668 Static void 1669 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1670 { 1671 uint32_t tmp; 1672 int ntries; 1673 1674 for (ntries = 0; ntries < 5; ntries++) { 1675 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1676 break; 1677 } 1678 if (ntries == 5) { 1679 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1680 return; 1681 } 1682 1683 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1684 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1685 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1686 1687 /* remember last written value in sc */ 1688 sc->rf_regs[reg] = val; 1689 1690 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1691 } 1692 1693 Static void 1694 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1695 { 1696 struct ieee80211com *ic = &sc->sc_ic; 1697 uint8_t power, tmp; 1698 u_int i, chan; 1699 1700 chan = ieee80211_chan2ieee(ic, c); 1701 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1702 return; 1703 1704 if (IEEE80211_IS_CHAN_2GHZ(c)) 1705 power = min(sc->txpow[chan - 1], 31); 1706 else 1707 power = 31; 1708 1709 /* adjust txpower using ifconfig settings */ 1710 power -= (100 - ic->ic_txpowlimit) / 8; 1711 1712 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1713 1714 switch (sc->rf_rev) { 1715 case RAL_RF_2522: 1716 ural_rf_write(sc, RAL_RF1, 0x00814); 1717 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1718 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1719 break; 1720 1721 case RAL_RF_2523: 1722 ural_rf_write(sc, RAL_RF1, 0x08804); 1723 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1724 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1725 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1726 break; 1727 1728 case RAL_RF_2524: 1729 ural_rf_write(sc, RAL_RF1, 0x0c808); 1730 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1731 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1732 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1733 break; 1734 1735 case RAL_RF_2525: 1736 ural_rf_write(sc, RAL_RF1, 0x08808); 1737 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1738 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1739 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1740 1741 ural_rf_write(sc, RAL_RF1, 0x08808); 1742 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1743 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1744 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1745 break; 1746 1747 case RAL_RF_2525E: 1748 ural_rf_write(sc, RAL_RF1, 0x08808); 1749 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1750 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1751 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1752 break; 1753 1754 case RAL_RF_2526: 1755 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1756 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1757 ural_rf_write(sc, RAL_RF1, 0x08804); 1758 1759 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1760 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1761 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1762 break; 1763 1764 /* dual-band RF */ 1765 case RAL_RF_5222: 1766 for (i = 0; ural_rf5222[i].chan != chan; i++); 1767 1768 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1769 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1770 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1771 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1772 break; 1773 } 1774 1775 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1776 ic->ic_state != IEEE80211_S_SCAN) { 1777 /* set Japan filter bit for channel 14 */ 1778 tmp = ural_bbp_read(sc, 70); 1779 1780 tmp &= ~RAL_JAPAN_FILTER; 1781 if (chan == 14) 1782 tmp |= RAL_JAPAN_FILTER; 1783 1784 ural_bbp_write(sc, 70, tmp); 1785 1786 /* clear CRC errors */ 1787 ural_read(sc, RAL_STA_CSR0); 1788 1789 DELAY(10000); 1790 ural_disable_rf_tune(sc); 1791 } 1792 } 1793 1794 /* 1795 * Disable RF auto-tuning. 1796 */ 1797 Static void 1798 ural_disable_rf_tune(struct ural_softc *sc) 1799 { 1800 uint32_t tmp; 1801 1802 if (sc->rf_rev != RAL_RF_2523) { 1803 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1804 ural_rf_write(sc, RAL_RF1, tmp); 1805 } 1806 1807 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1808 ural_rf_write(sc, RAL_RF3, tmp); 1809 1810 DPRINTFN(2, ("disabling RF autotune\n")); 1811 } 1812 1813 /* 1814 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1815 * synchronization. 1816 */ 1817 Static void 1818 ural_enable_tsf_sync(struct ural_softc *sc) 1819 { 1820 struct ieee80211com *ic = &sc->sc_ic; 1821 uint16_t logcwmin, preload, tmp; 1822 1823 /* first, disable TSF synchronization */ 1824 ural_write(sc, RAL_TXRX_CSR19, 0); 1825 1826 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1827 ural_write(sc, RAL_TXRX_CSR18, tmp); 1828 1829 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1830 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1831 tmp = logcwmin << 12 | preload; 1832 ural_write(sc, RAL_TXRX_CSR20, tmp); 1833 1834 /* finally, enable TSF synchronization */ 1835 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1836 if (ic->ic_opmode == IEEE80211_M_STA) 1837 tmp |= RAL_ENABLE_TSF_SYNC(1); 1838 else 1839 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1840 ural_write(sc, RAL_TXRX_CSR19, tmp); 1841 1842 DPRINTF(("enabling TSF synchronization\n")); 1843 } 1844 1845 Static void 1846 ural_update_slot(struct ifnet *ifp) 1847 { 1848 struct ural_softc *sc = ifp->if_softc; 1849 struct ieee80211com *ic = &sc->sc_ic; 1850 uint16_t slottime, sifs, eifs; 1851 1852 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1853 1854 /* 1855 * These settings may sound a bit inconsistent but this is what the 1856 * reference driver does. 1857 */ 1858 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1859 sifs = 16 - RAL_RXTX_TURNAROUND; 1860 eifs = 364; 1861 } else { 1862 sifs = 10 - RAL_RXTX_TURNAROUND; 1863 eifs = 64; 1864 } 1865 1866 ural_write(sc, RAL_MAC_CSR10, slottime); 1867 ural_write(sc, RAL_MAC_CSR11, sifs); 1868 ural_write(sc, RAL_MAC_CSR12, eifs); 1869 } 1870 1871 Static void 1872 ural_set_txpreamble(struct ural_softc *sc) 1873 { 1874 uint16_t tmp; 1875 1876 tmp = ural_read(sc, RAL_TXRX_CSR10); 1877 1878 tmp &= ~RAL_SHORT_PREAMBLE; 1879 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1880 tmp |= RAL_SHORT_PREAMBLE; 1881 1882 ural_write(sc, RAL_TXRX_CSR10, tmp); 1883 } 1884 1885 Static void 1886 ural_set_basicrates(struct ural_softc *sc) 1887 { 1888 struct ieee80211com *ic = &sc->sc_ic; 1889 1890 /* update basic rate set */ 1891 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1892 /* 11b basic rates: 1, 2Mbps */ 1893 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1894 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1895 /* 11a basic rates: 6, 12, 24Mbps */ 1896 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1897 } else { 1898 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1899 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1900 } 1901 } 1902 1903 Static void 1904 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1905 { 1906 uint16_t tmp; 1907 1908 tmp = bssid[0] | bssid[1] << 8; 1909 ural_write(sc, RAL_MAC_CSR5, tmp); 1910 1911 tmp = bssid[2] | bssid[3] << 8; 1912 ural_write(sc, RAL_MAC_CSR6, tmp); 1913 1914 tmp = bssid[4] | bssid[5] << 8; 1915 ural_write(sc, RAL_MAC_CSR7, tmp); 1916 1917 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1918 } 1919 1920 Static void 1921 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1922 { 1923 uint16_t tmp; 1924 1925 tmp = addr[0] | addr[1] << 8; 1926 ural_write(sc, RAL_MAC_CSR2, tmp); 1927 1928 tmp = addr[2] | addr[3] << 8; 1929 ural_write(sc, RAL_MAC_CSR3, tmp); 1930 1931 tmp = addr[4] | addr[5] << 8; 1932 ural_write(sc, RAL_MAC_CSR4, tmp); 1933 1934 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1935 } 1936 1937 Static void 1938 ural_update_promisc(struct ural_softc *sc) 1939 { 1940 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1941 uint32_t tmp; 1942 1943 tmp = ural_read(sc, RAL_TXRX_CSR2); 1944 1945 tmp &= ~RAL_DROP_NOT_TO_ME; 1946 if (!(ifp->if_flags & IFF_PROMISC)) 1947 tmp |= RAL_DROP_NOT_TO_ME; 1948 1949 ural_write(sc, RAL_TXRX_CSR2, tmp); 1950 1951 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1952 "entering" : "leaving")); 1953 } 1954 1955 Static const char * 1956 ural_get_rf(int rev) 1957 { 1958 switch (rev) { 1959 case RAL_RF_2522: return "RT2522"; 1960 case RAL_RF_2523: return "RT2523"; 1961 case RAL_RF_2524: return "RT2524"; 1962 case RAL_RF_2525: return "RT2525"; 1963 case RAL_RF_2525E: return "RT2525e"; 1964 case RAL_RF_2526: return "RT2526"; 1965 case RAL_RF_5222: return "RT5222"; 1966 default: return "unknown"; 1967 } 1968 } 1969 1970 Static void 1971 ural_read_eeprom(struct ural_softc *sc) 1972 { 1973 struct ieee80211com *ic = &sc->sc_ic; 1974 uint16_t val; 1975 1976 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1977 val = le16toh(val); 1978 sc->rf_rev = (val >> 11) & 0x7; 1979 sc->hw_radio = (val >> 10) & 0x1; 1980 sc->led_mode = (val >> 6) & 0x7; 1981 sc->rx_ant = (val >> 4) & 0x3; 1982 sc->tx_ant = (val >> 2) & 0x3; 1983 sc->nb_ant = val & 0x3; 1984 1985 /* read MAC address */ 1986 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1987 1988 /* read default values for BBP registers */ 1989 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1990 1991 /* read Tx power for all b/g channels */ 1992 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1993 } 1994 1995 Static int 1996 ural_bbp_init(struct ural_softc *sc) 1997 { 1998 int i, ntries; 1999 2000 /* wait for BBP to be ready */ 2001 for (ntries = 0; ntries < 100; ntries++) { 2002 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2003 break; 2004 DELAY(1000); 2005 } 2006 if (ntries == 100) { 2007 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2008 return EIO; 2009 } 2010 2011 /* initialize BBP registers to default values */ 2012 for (i = 0; i < __arraycount(ural_def_bbp); i++) 2013 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2014 2015 #if 0 2016 /* initialize BBP registers to values stored in EEPROM */ 2017 for (i = 0; i < 16; i++) { 2018 if (sc->bbp_prom[i].reg == 0xff) 2019 continue; 2020 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2021 } 2022 #endif 2023 2024 return 0; 2025 } 2026 2027 Static void 2028 ural_set_txantenna(struct ural_softc *sc, int antenna) 2029 { 2030 uint16_t tmp; 2031 uint8_t tx; 2032 2033 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2034 if (antenna == 1) 2035 tx |= RAL_BBP_ANTA; 2036 else if (antenna == 2) 2037 tx |= RAL_BBP_ANTB; 2038 else 2039 tx |= RAL_BBP_DIVERSITY; 2040 2041 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2042 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2043 sc->rf_rev == RAL_RF_5222) 2044 tx |= RAL_BBP_FLIPIQ; 2045 2046 ural_bbp_write(sc, RAL_BBP_TX, tx); 2047 2048 /* update values in PHY_CSR5 and PHY_CSR6 */ 2049 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2050 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2051 2052 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2053 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2054 } 2055 2056 Static void 2057 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2058 { 2059 uint8_t rx; 2060 2061 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2062 if (antenna == 1) 2063 rx |= RAL_BBP_ANTA; 2064 else if (antenna == 2) 2065 rx |= RAL_BBP_ANTB; 2066 else 2067 rx |= RAL_BBP_DIVERSITY; 2068 2069 /* need to force no I/Q flip for RF 2525e and 2526 */ 2070 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2071 rx &= ~RAL_BBP_FLIPIQ; 2072 2073 ural_bbp_write(sc, RAL_BBP_RX, rx); 2074 } 2075 2076 Static int 2077 ural_init(struct ifnet *ifp) 2078 { 2079 struct ural_softc *sc = ifp->if_softc; 2080 struct ieee80211com *ic = &sc->sc_ic; 2081 struct ieee80211_key *wk; 2082 uint16_t tmp; 2083 usbd_status error; 2084 int i, ntries; 2085 2086 ural_set_testmode(sc); 2087 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2088 2089 ural_stop(ifp, 0); 2090 2091 /* initialize MAC registers to default values */ 2092 for (i = 0; i < __arraycount(ural_def_mac); i++) 2093 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2094 2095 /* wait for BBP and RF to wake up (this can take a long time!) */ 2096 for (ntries = 0; ntries < 100; ntries++) { 2097 tmp = ural_read(sc, RAL_MAC_CSR17); 2098 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2099 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2100 break; 2101 DELAY(1000); 2102 } 2103 if (ntries == 100) { 2104 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2105 device_xname(sc->sc_dev)); 2106 error = EIO; 2107 goto fail; 2108 } 2109 2110 /* we're ready! */ 2111 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2112 2113 /* set basic rate set (will be updated later) */ 2114 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2115 2116 error = ural_bbp_init(sc); 2117 if (error != 0) 2118 goto fail; 2119 2120 /* set default BSS channel */ 2121 ural_set_chan(sc, ic->ic_curchan); 2122 2123 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2124 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2125 2126 ural_set_txantenna(sc, sc->tx_ant); 2127 ural_set_rxantenna(sc, sc->rx_ant); 2128 2129 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2130 ural_set_macaddr(sc, ic->ic_myaddr); 2131 2132 /* 2133 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2134 */ 2135 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2136 wk = &ic->ic_crypto.cs_nw_keys[i]; 2137 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2138 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2139 } 2140 2141 /* 2142 * Allocate xfer for AMRR statistics requests. 2143 */ 2144 struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); 2145 error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); 2146 if (error) { 2147 printf("%s: could not allocate AMRR xfer\n", 2148 device_xname(sc->sc_dev)); 2149 goto fail; 2150 } 2151 2152 /* 2153 * Open Tx and Rx USB bulk pipes. 2154 */ 2155 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2156 &sc->sc_tx_pipeh); 2157 if (error != 0) { 2158 printf("%s: could not open Tx pipe: %s\n", 2159 device_xname(sc->sc_dev), usbd_errstr(error)); 2160 goto fail; 2161 } 2162 2163 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2164 &sc->sc_rx_pipeh); 2165 if (error != 0) { 2166 printf("%s: could not open Rx pipe: %s\n", 2167 device_xname(sc->sc_dev), usbd_errstr(error)); 2168 goto fail; 2169 } 2170 2171 /* 2172 * Allocate Tx and Rx xfer queues. 2173 */ 2174 error = ural_alloc_tx_list(sc); 2175 if (error != 0) { 2176 printf("%s: could not allocate Tx list\n", 2177 device_xname(sc->sc_dev)); 2178 goto fail; 2179 } 2180 2181 error = ural_alloc_rx_list(sc); 2182 if (error != 0) { 2183 printf("%s: could not allocate Rx list\n", 2184 device_xname(sc->sc_dev)); 2185 goto fail; 2186 } 2187 2188 /* 2189 * Start up the receive pipe. 2190 */ 2191 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2192 struct ural_rx_data *data = &sc->rx_data[i]; 2193 2194 usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, 2195 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2196 usbd_transfer(data->xfer); 2197 } 2198 2199 /* kick Rx */ 2200 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2201 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2202 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2203 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2204 tmp |= RAL_DROP_TODS; 2205 if (!(ifp->if_flags & IFF_PROMISC)) 2206 tmp |= RAL_DROP_NOT_TO_ME; 2207 } 2208 ural_write(sc, RAL_TXRX_CSR2, tmp); 2209 2210 ifp->if_flags &= ~IFF_OACTIVE; 2211 ifp->if_flags |= IFF_RUNNING; 2212 2213 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2214 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2215 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2216 } else 2217 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2218 2219 return 0; 2220 2221 fail: ural_stop(ifp, 1); 2222 return error; 2223 } 2224 2225 Static void 2226 ural_stop(struct ifnet *ifp, int disable) 2227 { 2228 struct ural_softc *sc = ifp->if_softc; 2229 struct ieee80211com *ic = &sc->sc_ic; 2230 2231 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2232 2233 sc->sc_tx_timer = 0; 2234 ifp->if_timer = 0; 2235 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2236 2237 /* disable Rx */ 2238 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2239 2240 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2241 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2242 ural_write(sc, RAL_MAC_CSR1, 0); 2243 2244 if (sc->amrr_xfer != NULL) { 2245 usbd_destroy_xfer(sc->amrr_xfer); 2246 sc->amrr_xfer = NULL; 2247 } 2248 2249 if (sc->sc_rx_pipeh != NULL) { 2250 usbd_abort_pipe(sc->sc_rx_pipeh); 2251 } 2252 2253 if (sc->sc_tx_pipeh != NULL) { 2254 usbd_abort_pipe(sc->sc_tx_pipeh); 2255 } 2256 2257 ural_free_rx_list(sc); 2258 ural_free_tx_list(sc); 2259 2260 if (sc->sc_rx_pipeh != NULL) { 2261 usbd_close_pipe(sc->sc_rx_pipeh); 2262 sc->sc_rx_pipeh = NULL; 2263 } 2264 2265 if (sc->sc_tx_pipeh != NULL) { 2266 usbd_close_pipe(sc->sc_tx_pipeh); 2267 sc->sc_tx_pipeh = NULL; 2268 } 2269 } 2270 2271 int 2272 ural_activate(device_t self, enum devact act) 2273 { 2274 struct ural_softc *sc = device_private(self); 2275 2276 switch (act) { 2277 case DVACT_DEACTIVATE: 2278 if_deactivate(&sc->sc_if); 2279 return 0; 2280 default: 2281 return EOPNOTSUPP; 2282 } 2283 } 2284 2285 Static void 2286 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2287 { 2288 int i; 2289 2290 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2291 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2292 2293 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2294 2295 /* set rate to some reasonable initial value */ 2296 for (i = ni->ni_rates.rs_nrates - 1; 2297 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2298 i--); 2299 ni->ni_txrate = i; 2300 2301 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2302 } 2303 2304 Static void 2305 ural_amrr_timeout(void *arg) 2306 { 2307 struct ural_softc *sc = (struct ural_softc *)arg; 2308 usb_device_request_t req; 2309 int s; 2310 2311 s = splusb(); 2312 2313 /* 2314 * Asynchronously read statistic registers (cleared by read). 2315 */ 2316 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2317 req.bRequest = RAL_READ_MULTI_MAC; 2318 USETW(req.wValue, 0); 2319 USETW(req.wIndex, RAL_STA_CSR0); 2320 USETW(req.wLength, sizeof(sc->sta)); 2321 2322 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2323 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, 2324 ural_amrr_update); 2325 (void)usbd_transfer(sc->amrr_xfer); 2326 2327 splx(s); 2328 } 2329 2330 Static void 2331 ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2332 usbd_status status) 2333 { 2334 struct ural_softc *sc = (struct ural_softc *)priv; 2335 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2336 2337 if (status != USBD_NORMAL_COMPLETION) { 2338 printf("%s: could not retrieve Tx statistics - " 2339 "cancelling automatic rate control\n", 2340 device_xname(sc->sc_dev)); 2341 return; 2342 } 2343 2344 /* count TX retry-fail as Tx errors */ 2345 ifp->if_oerrors += sc->sta[9]; 2346 2347 sc->amn.amn_retrycnt = 2348 sc->sta[7] + /* TX one-retry ok count */ 2349 sc->sta[8] + /* TX more-retry ok count */ 2350 sc->sta[9]; /* TX retry-fail count */ 2351 2352 sc->amn.amn_txcnt = 2353 sc->amn.amn_retrycnt + 2354 sc->sta[6]; /* TX no-retry ok count */ 2355 2356 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2357 2358 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2359 } 2360
Indexes created Mon Sep 29 18:09:42 GMT 2025