if_ural.c revision 1.51.8.3
1 /* $NetBSD: if_ural.c,v 1.51.8.3 2018/08/08 10:28:35 martin Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.51.8.3 2018/08/08 10:28:35 martin Exp $"); 28 29 #ifdef _KERNEL_OPT 30 #include "opt_usb.h" 31 #endif 32 33 #include <sys/param.h> 34 #include <sys/sockio.h> 35 #include <sys/sysctl.h> 36 #include <sys/mbuf.h> 37 #include <sys/kernel.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/conf.h> 41 #include <sys/device.h> 42 43 #include <sys/bus.h> 44 #include <machine/endian.h> 45 #include <sys/intr.h> 46 47 #include <net/bpf.h> 48 #include <net/if.h> 49 #include <net/if_arp.h> 50 #include <net/if_dl.h> 51 #include <net/if_ether.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 55 #include <netinet/in.h> 56 #include <netinet/in_systm.h> 57 #include <netinet/in_var.h> 58 #include <netinet/ip.h> 59 60 #include <net80211/ieee80211_netbsd.h> 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_amrr.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usbdevs.h> 69 70 #include <dev/usb/if_uralreg.h> 71 #include <dev/usb/if_uralvar.h> 72 73 #ifdef URAL_DEBUG 74 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 75 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 76 int ural_debug = 0; 77 #else 78 #define DPRINTF(x) 79 #define DPRINTFN(n, x) 80 #endif 81 82 /* various supported device vendors/products */ 83 static const struct usb_devno ural_devs[] = { 84 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 85 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 86 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 87 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 88 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 89 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 90 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 91 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 92 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 93 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 95 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 98 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 99 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 101 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 102 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 105 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 106 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 107 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 108 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 109 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 110 }; 111 112 Static int ural_alloc_tx_list(struct ural_softc *); 113 Static void ural_free_tx_list(struct ural_softc *); 114 Static int ural_alloc_rx_list(struct ural_softc *); 115 Static void ural_free_rx_list(struct ural_softc *); 116 Static int ural_media_change(struct ifnet *); 117 Static void ural_next_scan(void *); 118 Static void ural_task(void *); 119 Static int ural_newstate(struct ieee80211com *, 120 enum ieee80211_state, int); 121 Static int ural_rxrate(struct ural_rx_desc *); 122 Static void ural_txeof(struct usbd_xfer *, void *, 123 usbd_status); 124 Static void ural_rxeof(struct usbd_xfer *, void *, 125 usbd_status); 126 Static int ural_ack_rate(struct ieee80211com *, int); 127 Static uint16_t ural_txtime(int, int, uint32_t); 128 Static uint8_t ural_plcp_signal(int); 129 Static void ural_setup_tx_desc(struct ural_softc *, 130 struct ural_tx_desc *, uint32_t, int, int); 131 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137 Static void ural_start(struct ifnet *); 138 Static void ural_watchdog(struct ifnet *); 139 Static int ural_reset(struct ifnet *); 140 Static int ural_ioctl(struct ifnet *, u_long, void *); 141 Static void ural_set_testmode(struct ural_softc *); 142 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 143 int); 144 Static uint16_t ural_read(struct ural_softc *, uint16_t); 145 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 146 int); 147 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 148 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 149 int); 150 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 151 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 152 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 153 Static void ural_set_chan(struct ural_softc *, 154 struct ieee80211_channel *); 155 Static void ural_disable_rf_tune(struct ural_softc *); 156 Static void ural_enable_tsf_sync(struct ural_softc *); 157 Static void ural_update_slot(struct ifnet *); 158 Static void ural_set_txpreamble(struct ural_softc *); 159 Static void ural_set_basicrates(struct ural_softc *); 160 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 161 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 162 Static void ural_update_promisc(struct ural_softc *); 163 Static const char *ural_get_rf(int); 164 Static void ural_read_eeprom(struct ural_softc *); 165 Static int ural_bbp_init(struct ural_softc *); 166 Static void ural_set_txantenna(struct ural_softc *, int); 167 Static void ural_set_rxantenna(struct ural_softc *, int); 168 Static int ural_init(struct ifnet *); 169 Static void ural_stop(struct ifnet *, int); 170 Static void ural_amrr_start(struct ural_softc *, 171 struct ieee80211_node *); 172 Static void ural_amrr_timeout(void *); 173 Static void ural_amrr_update(struct usbd_xfer *, void *, 174 usbd_status status); 175 176 /* 177 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 178 */ 179 static const struct ieee80211_rateset ural_rateset_11a = 180 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 181 182 static const struct ieee80211_rateset ural_rateset_11b = 183 { 4, { 2, 4, 11, 22 } }; 184 185 static const struct ieee80211_rateset ural_rateset_11g = 186 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 187 188 /* 189 * Default values for MAC registers; values taken from the reference driver. 190 */ 191 static const struct { 192 uint16_t reg; 193 uint16_t val; 194 } ural_def_mac[] = { 195 { RAL_TXRX_CSR5, 0x8c8d }, 196 { RAL_TXRX_CSR6, 0x8b8a }, 197 { RAL_TXRX_CSR7, 0x8687 }, 198 { RAL_TXRX_CSR8, 0x0085 }, 199 { RAL_MAC_CSR13, 0x1111 }, 200 { RAL_MAC_CSR14, 0x1e11 }, 201 { RAL_TXRX_CSR21, 0xe78f }, 202 { RAL_MAC_CSR9, 0xff1d }, 203 { RAL_MAC_CSR11, 0x0002 }, 204 { RAL_MAC_CSR22, 0x0053 }, 205 { RAL_MAC_CSR15, 0x0000 }, 206 { RAL_MAC_CSR8, 0x0780 }, 207 { RAL_TXRX_CSR19, 0x0000 }, 208 { RAL_TXRX_CSR18, 0x005a }, 209 { RAL_PHY_CSR2, 0x0000 }, 210 { RAL_TXRX_CSR0, 0x1ec0 }, 211 { RAL_PHY_CSR4, 0x000f } 212 }; 213 214 /* 215 * Default values for BBP registers; values taken from the reference driver. 216 */ 217 static const struct { 218 uint8_t reg; 219 uint8_t val; 220 } ural_def_bbp[] = { 221 { 3, 0x02 }, 222 { 4, 0x19 }, 223 { 14, 0x1c }, 224 { 15, 0x30 }, 225 { 16, 0xac }, 226 { 17, 0x48 }, 227 { 18, 0x18 }, 228 { 19, 0xff }, 229 { 20, 0x1e }, 230 { 21, 0x08 }, 231 { 22, 0x08 }, 232 { 23, 0x08 }, 233 { 24, 0x80 }, 234 { 25, 0x50 }, 235 { 26, 0x08 }, 236 { 27, 0x23 }, 237 { 30, 0x10 }, 238 { 31, 0x2b }, 239 { 32, 0xb9 }, 240 { 34, 0x12 }, 241 { 35, 0x50 }, 242 { 39, 0xc4 }, 243 { 40, 0x02 }, 244 { 41, 0x60 }, 245 { 53, 0x10 }, 246 { 54, 0x18 }, 247 { 56, 0x08 }, 248 { 57, 0x10 }, 249 { 58, 0x08 }, 250 { 61, 0x60 }, 251 { 62, 0x10 }, 252 { 75, 0xff } 253 }; 254 255 /* 256 * Default values for RF register R2 indexed by channel numbers. 257 */ 258 static const uint32_t ural_rf2522_r2[] = { 259 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 260 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 261 }; 262 263 static const uint32_t ural_rf2523_r2[] = { 264 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 265 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 266 }; 267 268 static const uint32_t ural_rf2524_r2[] = { 269 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 270 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 271 }; 272 273 static const uint32_t ural_rf2525_r2[] = { 274 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 275 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 276 }; 277 278 static const uint32_t ural_rf2525_hi_r2[] = { 279 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 280 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 281 }; 282 283 static const uint32_t ural_rf2525e_r2[] = { 284 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 285 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 286 }; 287 288 static const uint32_t ural_rf2526_hi_r2[] = { 289 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 290 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 291 }; 292 293 static const uint32_t ural_rf2526_r2[] = { 294 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 295 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 296 }; 297 298 /* 299 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 300 * values taken from the reference driver. 301 */ 302 static const struct { 303 uint8_t chan; 304 uint32_t r1; 305 uint32_t r2; 306 uint32_t r4; 307 } ural_rf5222[] = { 308 { 1, 0x08808, 0x0044d, 0x00282 }, 309 { 2, 0x08808, 0x0044e, 0x00282 }, 310 { 3, 0x08808, 0x0044f, 0x00282 }, 311 { 4, 0x08808, 0x00460, 0x00282 }, 312 { 5, 0x08808, 0x00461, 0x00282 }, 313 { 6, 0x08808, 0x00462, 0x00282 }, 314 { 7, 0x08808, 0x00463, 0x00282 }, 315 { 8, 0x08808, 0x00464, 0x00282 }, 316 { 9, 0x08808, 0x00465, 0x00282 }, 317 { 10, 0x08808, 0x00466, 0x00282 }, 318 { 11, 0x08808, 0x00467, 0x00282 }, 319 { 12, 0x08808, 0x00468, 0x00282 }, 320 { 13, 0x08808, 0x00469, 0x00282 }, 321 { 14, 0x08808, 0x0046b, 0x00286 }, 322 323 { 36, 0x08804, 0x06225, 0x00287 }, 324 { 40, 0x08804, 0x06226, 0x00287 }, 325 { 44, 0x08804, 0x06227, 0x00287 }, 326 { 48, 0x08804, 0x06228, 0x00287 }, 327 { 52, 0x08804, 0x06229, 0x00287 }, 328 { 56, 0x08804, 0x0622a, 0x00287 }, 329 { 60, 0x08804, 0x0622b, 0x00287 }, 330 { 64, 0x08804, 0x0622c, 0x00287 }, 331 332 { 100, 0x08804, 0x02200, 0x00283 }, 333 { 104, 0x08804, 0x02201, 0x00283 }, 334 { 108, 0x08804, 0x02202, 0x00283 }, 335 { 112, 0x08804, 0x02203, 0x00283 }, 336 { 116, 0x08804, 0x02204, 0x00283 }, 337 { 120, 0x08804, 0x02205, 0x00283 }, 338 { 124, 0x08804, 0x02206, 0x00283 }, 339 { 128, 0x08804, 0x02207, 0x00283 }, 340 { 132, 0x08804, 0x02208, 0x00283 }, 341 { 136, 0x08804, 0x02209, 0x00283 }, 342 { 140, 0x08804, 0x0220a, 0x00283 }, 343 344 { 149, 0x08808, 0x02429, 0x00281 }, 345 { 153, 0x08808, 0x0242b, 0x00281 }, 346 { 157, 0x08808, 0x0242d, 0x00281 }, 347 { 161, 0x08808, 0x0242f, 0x00281 } 348 }; 349 350 int ural_match(device_t, cfdata_t, void *); 351 void ural_attach(device_t, device_t, void *); 352 int ural_detach(device_t, int); 353 int ural_activate(device_t, enum devact); 354 extern struct cfdriver ural_cd; 355 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, 356 ural_detach, ural_activate); 357 358 int 359 ural_match(device_t parent, cfdata_t match, void *aux) 360 { 361 struct usb_attach_arg *uaa = aux; 362 363 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 364 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 365 } 366 367 void 368 ural_attach(device_t parent, device_t self, void *aux) 369 { 370 struct ural_softc *sc = device_private(self); 371 struct usb_attach_arg *uaa = aux; 372 struct ieee80211com *ic = &sc->sc_ic; 373 struct ifnet *ifp = &sc->sc_if; 374 usb_interface_descriptor_t *id; 375 usb_endpoint_descriptor_t *ed; 376 usbd_status error; 377 char *devinfop; 378 int i; 379 380 sc->sc_dev = self; 381 sc->sc_udev = uaa->uaa_device; 382 383 aprint_naive("\n"); 384 aprint_normal("\n"); 385 386 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 387 aprint_normal_dev(self, "%s\n", devinfop); 388 usbd_devinfo_free(devinfop); 389 390 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 391 if (error != 0) { 392 aprint_error_dev(self, "failed to set configuration" 393 ", err=%s\n", usbd_errstr(error)); 394 return; 395 } 396 397 /* get the first interface handle */ 398 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 399 &sc->sc_iface); 400 if (error != 0) { 401 aprint_error_dev(self, "could not get interface handle\n"); 402 return; 403 } 404 405 /* 406 * Find endpoints. 407 */ 408 id = usbd_get_interface_descriptor(sc->sc_iface); 409 410 sc->sc_rx_no = sc->sc_tx_no = -1; 411 for (i = 0; i < id->bNumEndpoints; i++) { 412 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 413 if (ed == NULL) { 414 aprint_error_dev(self, 415 "no endpoint descriptor for %d\n", i); 416 return; 417 } 418 419 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 420 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 421 sc->sc_rx_no = ed->bEndpointAddress; 422 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 423 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 424 sc->sc_tx_no = ed->bEndpointAddress; 425 } 426 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 427 aprint_error_dev(self, "missing endpoint\n"); 428 return; 429 } 430 431 usb_init_task(&sc->sc_task, ural_task, sc, 0); 432 callout_init(&sc->sc_scan_ch, 0); 433 sc->amrr.amrr_min_success_threshold = 1; 434 sc->amrr.amrr_max_success_threshold = 15; 435 callout_init(&sc->sc_amrr_ch, 0); 436 437 /* retrieve RT2570 rev. no */ 438 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 439 440 /* retrieve MAC address and various other things from EEPROM */ 441 ural_read_eeprom(sc); 442 443 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 444 sc->asic_rev, ural_get_rf(sc->rf_rev)); 445 446 ifp->if_softc = sc; 447 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 448 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 449 ifp->if_init = ural_init; 450 ifp->if_ioctl = ural_ioctl; 451 ifp->if_start = ural_start; 452 ifp->if_watchdog = ural_watchdog; 453 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 454 IFQ_SET_READY(&ifp->if_snd); 455 456 ic->ic_ifp = ifp; 457 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 458 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 459 ic->ic_state = IEEE80211_S_INIT; 460 461 /* set device capabilities */ 462 ic->ic_caps = 463 IEEE80211_C_IBSS | /* IBSS mode supported */ 464 IEEE80211_C_MONITOR | /* monitor mode supported */ 465 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 466 IEEE80211_C_TXPMGT | /* tx power management */ 467 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 468 IEEE80211_C_SHSLOT | /* short slot time supported */ 469 IEEE80211_C_WPA; /* 802.11i */ 470 471 if (sc->rf_rev == RAL_RF_5222) { 472 /* set supported .11a rates */ 473 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 474 475 /* set supported .11a channels */ 476 for (i = 36; i <= 64; i += 4) { 477 ic->ic_channels[i].ic_freq = 478 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 479 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 480 } 481 for (i = 100; i <= 140; i += 4) { 482 ic->ic_channels[i].ic_freq = 483 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 484 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 485 } 486 for (i = 149; i <= 161; i += 4) { 487 ic->ic_channels[i].ic_freq = 488 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 489 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 490 } 491 } 492 493 /* set supported .11b and .11g rates */ 494 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 495 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 496 497 /* set supported .11b and .11g channels (1 through 14) */ 498 for (i = 1; i <= 14; i++) { 499 ic->ic_channels[i].ic_freq = 500 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 501 ic->ic_channels[i].ic_flags = 502 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 503 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 504 } 505 506 if_attach(ifp); 507 ieee80211_ifattach(ic); 508 ic->ic_reset = ural_reset; 509 510 /* override state transition machine */ 511 sc->sc_newstate = ic->ic_newstate; 512 ic->ic_newstate = ural_newstate; 513 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 514 515 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 516 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 517 518 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 519 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 520 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 521 522 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 523 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 524 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 525 526 ieee80211_announce(ic); 527 528 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 529 530 if (!pmf_device_register(self, NULL, NULL)) 531 aprint_error_dev(self, "couldn't establish power handler\n"); 532 533 return; 534 } 535 536 int 537 ural_detach(device_t self, int flags) 538 { 539 struct ural_softc *sc = device_private(self); 540 struct ieee80211com *ic = &sc->sc_ic; 541 struct ifnet *ifp = &sc->sc_if; 542 int s; 543 544 pmf_device_deregister(self); 545 546 s = splusb(); 547 548 ural_stop(ifp, 1); 549 callout_halt(&sc->sc_scan_ch, NULL); 550 callout_halt(&sc->sc_amrr_ch, NULL); 551 usb_rem_task_wait(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER, NULL); 552 553 bpf_detach(ifp); 554 ieee80211_ifdetach(ic); 555 if_detach(ifp); 556 557 splx(s); 558 559 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 560 561 return 0; 562 } 563 564 Static int 565 ural_alloc_tx_list(struct ural_softc *sc) 566 { 567 struct ural_tx_data *data; 568 int i, error; 569 570 sc->tx_queued = 0; 571 572 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 573 data = &sc->tx_data[i]; 574 575 data->sc = sc; 576 error = usbd_create_xfer(sc->sc_tx_pipeh, 577 RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, 578 &data->xfer); 579 if (error) { 580 printf("%s: could not allocate tx xfer\n", 581 device_xname(sc->sc_dev)); 582 goto fail; 583 } 584 585 data->buf = usbd_get_buffer(data->xfer); 586 } 587 588 return 0; 589 590 fail: ural_free_tx_list(sc); 591 return error; 592 } 593 594 Static void 595 ural_free_tx_list(struct ural_softc *sc) 596 { 597 struct ural_tx_data *data; 598 int i; 599 600 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 601 data = &sc->tx_data[i]; 602 603 if (data->xfer != NULL) { 604 usbd_destroy_xfer(data->xfer); 605 data->xfer = NULL; 606 } 607 608 if (data->ni != NULL) { 609 ieee80211_free_node(data->ni); 610 data->ni = NULL; 611 } 612 } 613 } 614 615 Static int 616 ural_alloc_rx_list(struct ural_softc *sc) 617 { 618 struct ural_rx_data *data; 619 int i, error; 620 621 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 622 data = &sc->rx_data[i]; 623 624 data->sc = sc; 625 626 error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, 627 0, 0, &data->xfer); 628 if (error) { 629 printf("%s: could not allocate rx xfer\n", 630 device_xname(sc->sc_dev)); 631 goto fail; 632 } 633 634 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 635 if (data->m == NULL) { 636 printf("%s: could not allocate rx mbuf\n", 637 device_xname(sc->sc_dev)); 638 error = ENOMEM; 639 goto fail; 640 } 641 642 MCLGET(data->m, M_DONTWAIT); 643 if (!(data->m->m_flags & M_EXT)) { 644 printf("%s: could not allocate rx mbuf cluster\n", 645 device_xname(sc->sc_dev)); 646 error = ENOMEM; 647 goto fail; 648 } 649 650 data->buf = mtod(data->m, uint8_t *); 651 } 652 653 return 0; 654 655 fail: ural_free_rx_list(sc); 656 return error; 657 } 658 659 Static void 660 ural_free_rx_list(struct ural_softc *sc) 661 { 662 struct ural_rx_data *data; 663 int i; 664 665 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 666 data = &sc->rx_data[i]; 667 668 if (data->xfer != NULL) { 669 usbd_destroy_xfer(data->xfer); 670 data->xfer = NULL; 671 } 672 673 if (data->m != NULL) { 674 m_freem(data->m); 675 data->m = NULL; 676 } 677 } 678 } 679 680 Static int 681 ural_media_change(struct ifnet *ifp) 682 { 683 int error; 684 685 error = ieee80211_media_change(ifp); 686 if (error != ENETRESET) 687 return error; 688 689 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 690 ural_init(ifp); 691 692 return 0; 693 } 694 695 /* 696 * This function is called periodically (every 200ms) during scanning to 697 * switch from one channel to another. 698 */ 699 Static void 700 ural_next_scan(void *arg) 701 { 702 struct ural_softc *sc = arg; 703 struct ieee80211com *ic = &sc->sc_ic; 704 705 if (ic->ic_state == IEEE80211_S_SCAN) 706 ieee80211_next_scan(ic); 707 } 708 709 Static void 710 ural_task(void *arg) 711 { 712 struct ural_softc *sc = arg; 713 struct ieee80211com *ic = &sc->sc_ic; 714 enum ieee80211_state ostate; 715 struct ieee80211_node *ni; 716 struct mbuf *m; 717 718 ostate = ic->ic_state; 719 720 switch (sc->sc_state) { 721 case IEEE80211_S_INIT: 722 if (ostate == IEEE80211_S_RUN) { 723 /* abort TSF synchronization */ 724 ural_write(sc, RAL_TXRX_CSR19, 0); 725 726 /* force tx led to stop blinking */ 727 ural_write(sc, RAL_MAC_CSR20, 0); 728 } 729 break; 730 731 case IEEE80211_S_SCAN: 732 ural_set_chan(sc, ic->ic_curchan); 733 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 734 break; 735 736 case IEEE80211_S_AUTH: 737 ural_set_chan(sc, ic->ic_curchan); 738 break; 739 740 case IEEE80211_S_ASSOC: 741 ural_set_chan(sc, ic->ic_curchan); 742 break; 743 744 case IEEE80211_S_RUN: 745 ural_set_chan(sc, ic->ic_curchan); 746 747 ni = ic->ic_bss; 748 749 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 750 ural_update_slot(ic->ic_ifp); 751 ural_set_txpreamble(sc); 752 ural_set_basicrates(sc); 753 ural_set_bssid(sc, ni->ni_bssid); 754 } 755 756 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 757 ic->ic_opmode == IEEE80211_M_IBSS) { 758 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 759 if (m == NULL) { 760 printf("%s: could not allocate beacon\n", 761 device_xname(sc->sc_dev)); 762 return; 763 } 764 765 if (ural_tx_bcn(sc, m, ni) != 0) { 766 m_freem(m); 767 printf("%s: could not send beacon\n", 768 device_xname(sc->sc_dev)); 769 return; 770 } 771 772 /* beacon is no longer needed */ 773 m_freem(m); 774 } 775 776 /* make tx led blink on tx (controlled by ASIC) */ 777 ural_write(sc, RAL_MAC_CSR20, 1); 778 779 if (ic->ic_opmode != IEEE80211_M_MONITOR) 780 ural_enable_tsf_sync(sc); 781 782 /* enable automatic rate adaptation in STA mode */ 783 if (ic->ic_opmode == IEEE80211_M_STA && 784 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 785 ural_amrr_start(sc, ni); 786 787 break; 788 } 789 790 sc->sc_newstate(ic, sc->sc_state, -1); 791 } 792 793 Static int 794 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 795 int arg) 796 { 797 struct ural_softc *sc = ic->ic_ifp->if_softc; 798 799 /* 800 * XXXSMP: This does not wait for the task, if it is in flight, 801 * to complete. If this code works at all, it must rely on the 802 * kernel lock to serialize with the USB task thread. 803 */ 804 usb_rem_task(sc->sc_udev, &sc->sc_task); 805 callout_stop(&sc->sc_scan_ch); 806 callout_stop(&sc->sc_amrr_ch); 807 808 /* do it in a process context */ 809 sc->sc_state = nstate; 810 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 811 812 return 0; 813 } 814 815 /* quickly determine if a given rate is CCK or OFDM */ 816 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 817 818 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 819 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 820 821 #define RAL_SIFS 10 /* us */ 822 823 #define RAL_RXTX_TURNAROUND 5 /* us */ 824 825 /* 826 * This function is only used by the Rx radiotap code. 827 */ 828 Static int 829 ural_rxrate(struct ural_rx_desc *desc) 830 { 831 if (le32toh(desc->flags) & RAL_RX_OFDM) { 832 /* reverse function of ural_plcp_signal */ 833 switch (desc->rate) { 834 case 0xb: return 12; 835 case 0xf: return 18; 836 case 0xa: return 24; 837 case 0xe: return 36; 838 case 0x9: return 48; 839 case 0xd: return 72; 840 case 0x8: return 96; 841 case 0xc: return 108; 842 } 843 } else { 844 if (desc->rate == 10) 845 return 2; 846 if (desc->rate == 20) 847 return 4; 848 if (desc->rate == 55) 849 return 11; 850 if (desc->rate == 110) 851 return 22; 852 } 853 return 2; /* should not get there */ 854 } 855 856 Static void 857 ural_txeof(struct usbd_xfer *xfer, void * priv, 858 usbd_status status) 859 { 860 struct ural_tx_data *data = priv; 861 struct ural_softc *sc = data->sc; 862 struct ifnet *ifp = &sc->sc_if; 863 int s; 864 865 if (status != USBD_NORMAL_COMPLETION) { 866 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 867 return; 868 869 printf("%s: could not transmit buffer: %s\n", 870 device_xname(sc->sc_dev), usbd_errstr(status)); 871 872 if (status == USBD_STALLED) 873 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 874 875 ifp->if_oerrors++; 876 return; 877 } 878 879 s = splnet(); 880 881 m_freem(data->m); 882 data->m = NULL; 883 ieee80211_free_node(data->ni); 884 data->ni = NULL; 885 886 sc->tx_queued--; 887 ifp->if_opackets++; 888 889 DPRINTFN(10, ("tx done\n")); 890 891 sc->sc_tx_timer = 0; 892 ifp->if_flags &= ~IFF_OACTIVE; 893 ural_start(ifp); 894 895 splx(s); 896 } 897 898 Static void 899 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 900 { 901 struct ural_rx_data *data = priv; 902 struct ural_softc *sc = data->sc; 903 struct ieee80211com *ic = &sc->sc_ic; 904 struct ifnet *ifp = &sc->sc_if; 905 struct ural_rx_desc *desc; 906 struct ieee80211_frame *wh; 907 struct ieee80211_node *ni; 908 struct mbuf *mnew, *m; 909 int s, len; 910 911 if (status != USBD_NORMAL_COMPLETION) { 912 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 913 return; 914 915 if (status == USBD_STALLED) 916 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 917 goto skip; 918 } 919 920 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 921 922 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 923 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 924 len)); 925 ifp->if_ierrors++; 926 goto skip; 927 } 928 929 /* rx descriptor is located at the end */ 930 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 931 932 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 933 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 934 /* 935 * This should not happen since we did not request to receive 936 * those frames when we filled RAL_TXRX_CSR2. 937 */ 938 DPRINTFN(5, ("PHY or CRC error\n")); 939 ifp->if_ierrors++; 940 goto skip; 941 } 942 943 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 944 if (mnew == NULL) { 945 ifp->if_ierrors++; 946 goto skip; 947 } 948 949 MCLGET(mnew, M_DONTWAIT); 950 if (!(mnew->m_flags & M_EXT)) { 951 ifp->if_ierrors++; 952 m_freem(mnew); 953 goto skip; 954 } 955 956 m = data->m; 957 data->m = mnew; 958 data->buf = mtod(data->m, uint8_t *); 959 960 /* finalize mbuf */ 961 m_set_rcvif(m, ifp); 962 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 963 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 964 965 s = splnet(); 966 967 if (sc->sc_drvbpf != NULL) { 968 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 969 970 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 971 tap->wr_rate = ural_rxrate(desc); 972 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 973 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 974 tap->wr_antenna = sc->rx_ant; 975 tap->wr_antsignal = desc->rssi; 976 977 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 978 } 979 980 wh = mtod(m, struct ieee80211_frame *); 981 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 982 983 /* send the frame to the 802.11 layer */ 984 ieee80211_input(ic, m, ni, desc->rssi, 0); 985 986 /* node is no longer needed */ 987 ieee80211_free_node(ni); 988 989 splx(s); 990 991 DPRINTFN(15, ("rx done\n")); 992 993 skip: /* setup a new transfer */ 994 usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, 995 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 996 usbd_transfer(xfer); 997 } 998 999 /* 1000 * Return the expected ack rate for a frame transmitted at rate `rate'. 1001 * XXX: this should depend on the destination node basic rate set. 1002 */ 1003 Static int 1004 ural_ack_rate(struct ieee80211com *ic, int rate) 1005 { 1006 switch (rate) { 1007 /* CCK rates */ 1008 case 2: 1009 return 2; 1010 case 4: 1011 case 11: 1012 case 22: 1013 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1014 1015 /* OFDM rates */ 1016 case 12: 1017 case 18: 1018 return 12; 1019 case 24: 1020 case 36: 1021 return 24; 1022 case 48: 1023 case 72: 1024 case 96: 1025 case 108: 1026 return 48; 1027 } 1028 1029 /* default to 1Mbps */ 1030 return 2; 1031 } 1032 1033 /* 1034 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1035 * The function automatically determines the operating mode depending on the 1036 * given rate. `flags' indicates whether short preamble is in use or not. 1037 */ 1038 Static uint16_t 1039 ural_txtime(int len, int rate, uint32_t flags) 1040 { 1041 uint16_t txtime; 1042 1043 if (RAL_RATE_IS_OFDM(rate)) { 1044 /* IEEE Std 802.11g-2003, pp. 37 */ 1045 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1046 txtime = 16 + 4 + 4 * txtime + 6; 1047 } else { 1048 /* IEEE Std 802.11b-1999, pp. 28 */ 1049 txtime = (16 * len + rate - 1) / rate; 1050 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1051 txtime += 72 + 24; 1052 else 1053 txtime += 144 + 48; 1054 } 1055 return txtime; 1056 } 1057 1058 Static uint8_t 1059 ural_plcp_signal(int rate) 1060 { 1061 switch (rate) { 1062 /* CCK rates (returned values are device-dependent) */ 1063 case 2: return 0x0; 1064 case 4: return 0x1; 1065 case 11: return 0x2; 1066 case 22: return 0x3; 1067 1068 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1069 case 12: return 0xb; 1070 case 18: return 0xf; 1071 case 24: return 0xa; 1072 case 36: return 0xe; 1073 case 48: return 0x9; 1074 case 72: return 0xd; 1075 case 96: return 0x8; 1076 case 108: return 0xc; 1077 1078 /* unsupported rates (should not get there) */ 1079 default: return 0xff; 1080 } 1081 } 1082 1083 Static void 1084 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1085 uint32_t flags, int len, int rate) 1086 { 1087 struct ieee80211com *ic = &sc->sc_ic; 1088 uint16_t plcp_length; 1089 int remainder; 1090 1091 desc->flags = htole32(flags); 1092 desc->flags |= htole32(RAL_TX_NEWSEQ); 1093 desc->flags |= htole32(len << 16); 1094 1095 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1096 desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); 1097 1098 /* setup PLCP fields */ 1099 desc->plcp_signal = ural_plcp_signal(rate); 1100 desc->plcp_service = 4; 1101 1102 len += IEEE80211_CRC_LEN; 1103 if (RAL_RATE_IS_OFDM(rate)) { 1104 desc->flags |= htole32(RAL_TX_OFDM); 1105 1106 plcp_length = len & 0xfff; 1107 desc->plcp_length_hi = plcp_length >> 6; 1108 desc->plcp_length_lo = plcp_length & 0x3f; 1109 } else { 1110 plcp_length = (16 * len + rate - 1) / rate; 1111 if (rate == 22) { 1112 remainder = (16 * len) % 22; 1113 if (remainder != 0 && remainder < 7) 1114 desc->plcp_service |= RAL_PLCP_LENGEXT; 1115 } 1116 desc->plcp_length_hi = plcp_length >> 8; 1117 desc->plcp_length_lo = plcp_length & 0xff; 1118 1119 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1120 desc->plcp_signal |= 0x08; 1121 } 1122 1123 desc->iv = 0; 1124 desc->eiv = 0; 1125 } 1126 1127 #define RAL_TX_TIMEOUT 5000 1128 1129 Static int 1130 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1131 { 1132 struct ural_tx_desc *desc; 1133 struct usbd_xfer *xfer; 1134 uint8_t cmd = 0; 1135 usbd_status error; 1136 uint8_t *buf; 1137 int xferlen, rate; 1138 1139 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1140 1141 /* xfer length needs to be a multiple of two! */ 1142 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1143 1144 error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, 1145 USBD_FORCE_SHORT_XFER, 0, &xfer); 1146 if (error) 1147 return error; 1148 1149 buf = usbd_get_buffer(xfer); 1150 1151 usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, 1152 RAL_TX_TIMEOUT, NULL); 1153 1154 error = usbd_sync_transfer(xfer); 1155 if (error != 0) { 1156 usbd_destroy_xfer(xfer); 1157 return error; 1158 } 1159 1160 desc = (struct ural_tx_desc *)buf; 1161 1162 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1163 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1164 m0->m_pkthdr.len, rate); 1165 1166 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1167 m0->m_pkthdr.len, rate, xferlen)); 1168 1169 usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, 1170 RAL_TX_TIMEOUT, NULL); 1171 1172 error = usbd_sync_transfer(xfer); 1173 usbd_destroy_xfer(xfer); 1174 1175 return error; 1176 } 1177 1178 Static int 1179 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1180 { 1181 struct ieee80211com *ic = &sc->sc_ic; 1182 struct ural_tx_desc *desc; 1183 struct ural_tx_data *data; 1184 struct ieee80211_frame *wh; 1185 struct ieee80211_key *k; 1186 uint32_t flags = 0; 1187 uint16_t dur; 1188 usbd_status error; 1189 int xferlen, rate; 1190 1191 data = &sc->tx_data[0]; 1192 desc = (struct ural_tx_desc *)data->buf; 1193 1194 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1195 1196 wh = mtod(m0, struct ieee80211_frame *); 1197 1198 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1199 k = ieee80211_crypto_encap(ic, ni, m0); 1200 if (k == NULL) { 1201 m_freem(m0); 1202 return ENOBUFS; 1203 } 1204 } 1205 1206 data->m = m0; 1207 data->ni = ni; 1208 1209 wh = mtod(m0, struct ieee80211_frame *); 1210 1211 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1212 flags |= RAL_TX_ACK; 1213 1214 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1215 *(uint16_t *)wh->i_dur = htole16(dur); 1216 1217 /* tell hardware to add timestamp for probe responses */ 1218 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1219 IEEE80211_FC0_TYPE_MGT && 1220 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1221 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1222 flags |= RAL_TX_TIMESTAMP; 1223 } 1224 1225 if (sc->sc_drvbpf != NULL) { 1226 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1227 1228 tap->wt_flags = 0; 1229 tap->wt_rate = rate; 1230 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1231 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1232 tap->wt_antenna = sc->tx_ant; 1233 1234 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1235 } 1236 1237 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1238 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1239 1240 /* align end on a 2-bytes boundary */ 1241 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1242 1243 /* 1244 * No space left in the last URB to store the extra 2 bytes, force 1245 * sending of another URB. 1246 */ 1247 if ((xferlen % 64) == 0) 1248 xferlen += 2; 1249 1250 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1251 m0->m_pkthdr.len, rate, xferlen)); 1252 1253 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1254 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1255 1256 error = usbd_transfer(data->xfer); 1257 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1258 m_freem(m0); 1259 return error; 1260 } 1261 1262 sc->tx_queued++; 1263 1264 return 0; 1265 } 1266 1267 Static int 1268 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1269 { 1270 struct ieee80211com *ic = &sc->sc_ic; 1271 struct ural_tx_desc *desc; 1272 struct ural_tx_data *data; 1273 struct ieee80211_frame *wh; 1274 struct ieee80211_key *k; 1275 uint32_t flags = 0; 1276 uint16_t dur; 1277 usbd_status error; 1278 int xferlen, rate; 1279 1280 wh = mtod(m0, struct ieee80211_frame *); 1281 1282 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1283 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1284 else 1285 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1286 1287 rate &= IEEE80211_RATE_VAL; 1288 1289 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1290 k = ieee80211_crypto_encap(ic, ni, m0); 1291 if (k == NULL) { 1292 m_freem(m0); 1293 return ENOBUFS; 1294 } 1295 1296 /* packet header may have moved, reset our local pointer */ 1297 wh = mtod(m0, struct ieee80211_frame *); 1298 } 1299 1300 data = &sc->tx_data[0]; 1301 desc = (struct ural_tx_desc *)data->buf; 1302 1303 data->m = m0; 1304 data->ni = ni; 1305 1306 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1307 flags |= RAL_TX_ACK; 1308 flags |= RAL_TX_RETRY(7); 1309 1310 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1311 ic->ic_flags) + RAL_SIFS; 1312 *(uint16_t *)wh->i_dur = htole16(dur); 1313 } 1314 1315 if (sc->sc_drvbpf != NULL) { 1316 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1317 1318 tap->wt_flags = 0; 1319 tap->wt_rate = rate; 1320 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1321 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1322 tap->wt_antenna = sc->tx_ant; 1323 1324 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1325 } 1326 1327 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1328 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1329 1330 /* align end on a 2-bytes boundary */ 1331 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1332 1333 /* 1334 * No space left in the last URB to store the extra 2 bytes, force 1335 * sending of another URB. 1336 */ 1337 if ((xferlen % 64) == 0) 1338 xferlen += 2; 1339 1340 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1341 m0->m_pkthdr.len, rate, xferlen)); 1342 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1343 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1344 1345 error = usbd_transfer(data->xfer); 1346 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1347 return error; 1348 1349 sc->tx_queued++; 1350 1351 return 0; 1352 } 1353 1354 Static void 1355 ural_start(struct ifnet *ifp) 1356 { 1357 struct ural_softc *sc = ifp->if_softc; 1358 struct ieee80211com *ic = &sc->sc_ic; 1359 struct mbuf *m0; 1360 struct ether_header *eh; 1361 struct ieee80211_node *ni; 1362 1363 for (;;) { 1364 IF_POLL(&ic->ic_mgtq, m0); 1365 if (m0 != NULL) { 1366 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1367 ifp->if_flags |= IFF_OACTIVE; 1368 break; 1369 } 1370 IF_DEQUEUE(&ic->ic_mgtq, m0); 1371 1372 ni = M_GETCTX(m0, struct ieee80211_node *); 1373 M_CLEARCTX(m0); 1374 bpf_mtap3(ic->ic_rawbpf, m0); 1375 if (ural_tx_mgt(sc, m0, ni) != 0) 1376 break; 1377 1378 } else { 1379 if (ic->ic_state != IEEE80211_S_RUN) 1380 break; 1381 IFQ_DEQUEUE(&ifp->if_snd, m0); 1382 if (m0 == NULL) 1383 break; 1384 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1385 IF_PREPEND(&ifp->if_snd, m0); 1386 ifp->if_flags |= IFF_OACTIVE; 1387 break; 1388 } 1389 1390 if (m0->m_len < sizeof(struct ether_header) && 1391 !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1392 continue; 1393 1394 eh = mtod(m0, struct ether_header *); 1395 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1396 if (ni == NULL) { 1397 m_freem(m0); 1398 continue; 1399 } 1400 bpf_mtap(ifp, m0); 1401 m0 = ieee80211_encap(ic, m0, ni); 1402 if (m0 == NULL) { 1403 ieee80211_free_node(ni); 1404 continue; 1405 } 1406 bpf_mtap3(ic->ic_rawbpf, m0); 1407 if (ural_tx_data(sc, m0, ni) != 0) { 1408 ieee80211_free_node(ni); 1409 ifp->if_oerrors++; 1410 break; 1411 } 1412 } 1413 1414 sc->sc_tx_timer = 5; 1415 ifp->if_timer = 1; 1416 } 1417 } 1418 1419 Static void 1420 ural_watchdog(struct ifnet *ifp) 1421 { 1422 struct ural_softc *sc = ifp->if_softc; 1423 struct ieee80211com *ic = &sc->sc_ic; 1424 1425 ifp->if_timer = 0; 1426 1427 if (sc->sc_tx_timer > 0) { 1428 if (--sc->sc_tx_timer == 0) { 1429 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1430 /*ural_init(sc); XXX needs a process context! */ 1431 ifp->if_oerrors++; 1432 return; 1433 } 1434 ifp->if_timer = 1; 1435 } 1436 1437 ieee80211_watchdog(ic); 1438 } 1439 1440 /* 1441 * This function allows for fast channel switching in monitor mode (used by 1442 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1443 * generate a new beacon frame. 1444 */ 1445 Static int 1446 ural_reset(struct ifnet *ifp) 1447 { 1448 struct ural_softc *sc = ifp->if_softc; 1449 struct ieee80211com *ic = &sc->sc_ic; 1450 1451 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1452 return ENETRESET; 1453 1454 ural_set_chan(sc, ic->ic_curchan); 1455 1456 return 0; 1457 } 1458 1459 Static int 1460 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1461 { 1462 #define IS_RUNNING(ifp) \ 1463 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1464 1465 struct ural_softc *sc = ifp->if_softc; 1466 struct ieee80211com *ic = &sc->sc_ic; 1467 int s, error = 0; 1468 1469 s = splnet(); 1470 1471 switch (cmd) { 1472 case SIOCSIFFLAGS: 1473 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1474 break; 1475 /* XXX re-use ether_ioctl() */ 1476 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1477 case IFF_UP|IFF_RUNNING: 1478 ural_update_promisc(sc); 1479 break; 1480 case IFF_UP: 1481 ural_init(ifp); 1482 break; 1483 case IFF_RUNNING: 1484 ural_stop(ifp, 1); 1485 break; 1486 case 0: 1487 break; 1488 } 1489 break; 1490 1491 case SIOCADDMULTI: 1492 case SIOCDELMULTI: 1493 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1494 error = 0; 1495 } 1496 break; 1497 1498 default: 1499 error = ieee80211_ioctl(ic, cmd, data); 1500 } 1501 1502 if (error == ENETRESET) { 1503 if (IS_RUNNING(ifp) && 1504 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1505 ural_init(ifp); 1506 error = 0; 1507 } 1508 1509 splx(s); 1510 1511 return error; 1512 #undef IS_RUNNING 1513 } 1514 1515 Static void 1516 ural_set_testmode(struct ural_softc *sc) 1517 { 1518 usb_device_request_t req; 1519 usbd_status error; 1520 1521 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1522 req.bRequest = RAL_VENDOR_REQUEST; 1523 USETW(req.wValue, 4); 1524 USETW(req.wIndex, 1); 1525 USETW(req.wLength, 0); 1526 1527 error = usbd_do_request(sc->sc_udev, &req, NULL); 1528 if (error != 0) { 1529 printf("%s: could not set test mode: %s\n", 1530 device_xname(sc->sc_dev), usbd_errstr(error)); 1531 } 1532 } 1533 1534 Static void 1535 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1536 { 1537 usb_device_request_t req; 1538 usbd_status error; 1539 1540 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1541 req.bRequest = RAL_READ_EEPROM; 1542 USETW(req.wValue, 0); 1543 USETW(req.wIndex, addr); 1544 USETW(req.wLength, len); 1545 1546 error = usbd_do_request(sc->sc_udev, &req, buf); 1547 if (error != 0) { 1548 printf("%s: could not read EEPROM: %s\n", 1549 device_xname(sc->sc_dev), usbd_errstr(error)); 1550 } 1551 } 1552 1553 Static uint16_t 1554 ural_read(struct ural_softc *sc, uint16_t reg) 1555 { 1556 usb_device_request_t req; 1557 usbd_status error; 1558 uint16_t val; 1559 1560 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1561 req.bRequest = RAL_READ_MAC; 1562 USETW(req.wValue, 0); 1563 USETW(req.wIndex, reg); 1564 USETW(req.wLength, sizeof(uint16_t)); 1565 1566 error = usbd_do_request(sc->sc_udev, &req, &val); 1567 if (error != 0) { 1568 printf("%s: could not read MAC register: %s\n", 1569 device_xname(sc->sc_dev), usbd_errstr(error)); 1570 return 0; 1571 } 1572 1573 return le16toh(val); 1574 } 1575 1576 Static void 1577 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1578 { 1579 usb_device_request_t req; 1580 usbd_status error; 1581 1582 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1583 req.bRequest = RAL_READ_MULTI_MAC; 1584 USETW(req.wValue, 0); 1585 USETW(req.wIndex, reg); 1586 USETW(req.wLength, len); 1587 1588 error = usbd_do_request(sc->sc_udev, &req, buf); 1589 if (error != 0) { 1590 printf("%s: could not read MAC register: %s\n", 1591 device_xname(sc->sc_dev), usbd_errstr(error)); 1592 } 1593 } 1594 1595 Static void 1596 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1597 { 1598 usb_device_request_t req; 1599 usbd_status error; 1600 1601 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1602 req.bRequest = RAL_WRITE_MAC; 1603 USETW(req.wValue, val); 1604 USETW(req.wIndex, reg); 1605 USETW(req.wLength, 0); 1606 1607 error = usbd_do_request(sc->sc_udev, &req, NULL); 1608 if (error != 0) { 1609 printf("%s: could not write MAC register: %s\n", 1610 device_xname(sc->sc_dev), usbd_errstr(error)); 1611 } 1612 } 1613 1614 Static void 1615 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1616 { 1617 usb_device_request_t req; 1618 usbd_status error; 1619 1620 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1621 req.bRequest = RAL_WRITE_MULTI_MAC; 1622 USETW(req.wValue, 0); 1623 USETW(req.wIndex, reg); 1624 USETW(req.wLength, len); 1625 1626 error = usbd_do_request(sc->sc_udev, &req, buf); 1627 if (error != 0) { 1628 printf("%s: could not write MAC register: %s\n", 1629 device_xname(sc->sc_dev), usbd_errstr(error)); 1630 } 1631 } 1632 1633 Static void 1634 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1635 { 1636 uint16_t tmp; 1637 int ntries; 1638 1639 for (ntries = 0; ntries < 5; ntries++) { 1640 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1641 break; 1642 } 1643 if (ntries == 5) { 1644 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1645 return; 1646 } 1647 1648 tmp = reg << 8 | val; 1649 ural_write(sc, RAL_PHY_CSR7, tmp); 1650 } 1651 1652 Static uint8_t 1653 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1654 { 1655 uint16_t val; 1656 int ntries; 1657 1658 val = RAL_BBP_WRITE | reg << 8; 1659 ural_write(sc, RAL_PHY_CSR7, val); 1660 1661 for (ntries = 0; ntries < 5; ntries++) { 1662 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1663 break; 1664 } 1665 if (ntries == 5) { 1666 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1667 return 0; 1668 } 1669 1670 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1671 } 1672 1673 Static void 1674 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1675 { 1676 uint32_t tmp; 1677 int ntries; 1678 1679 for (ntries = 0; ntries < 5; ntries++) { 1680 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1681 break; 1682 } 1683 if (ntries == 5) { 1684 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1685 return; 1686 } 1687 1688 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1689 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1690 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1691 1692 /* remember last written value in sc */ 1693 sc->rf_regs[reg] = val; 1694 1695 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1696 } 1697 1698 Static void 1699 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1700 { 1701 struct ieee80211com *ic = &sc->sc_ic; 1702 uint8_t power, tmp; 1703 u_int i, chan; 1704 1705 chan = ieee80211_chan2ieee(ic, c); 1706 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1707 return; 1708 1709 if (IEEE80211_IS_CHAN_2GHZ(c)) 1710 power = min(sc->txpow[chan - 1], 31); 1711 else 1712 power = 31; 1713 1714 /* adjust txpower using ifconfig settings */ 1715 power -= (100 - ic->ic_txpowlimit) / 8; 1716 1717 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1718 1719 switch (sc->rf_rev) { 1720 case RAL_RF_2522: 1721 ural_rf_write(sc, RAL_RF1, 0x00814); 1722 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1723 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1724 break; 1725 1726 case RAL_RF_2523: 1727 ural_rf_write(sc, RAL_RF1, 0x08804); 1728 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1729 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1730 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1731 break; 1732 1733 case RAL_RF_2524: 1734 ural_rf_write(sc, RAL_RF1, 0x0c808); 1735 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1736 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1737 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1738 break; 1739 1740 case RAL_RF_2525: 1741 ural_rf_write(sc, RAL_RF1, 0x08808); 1742 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1743 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1744 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1745 1746 ural_rf_write(sc, RAL_RF1, 0x08808); 1747 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1748 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1749 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1750 break; 1751 1752 case RAL_RF_2525E: 1753 ural_rf_write(sc, RAL_RF1, 0x08808); 1754 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1755 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1756 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1757 break; 1758 1759 case RAL_RF_2526: 1760 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1761 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1762 ural_rf_write(sc, RAL_RF1, 0x08804); 1763 1764 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1765 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1766 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1767 break; 1768 1769 /* dual-band RF */ 1770 case RAL_RF_5222: 1771 for (i = 0; ural_rf5222[i].chan != chan; i++); 1772 1773 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1774 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1775 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1776 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1777 break; 1778 } 1779 1780 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1781 ic->ic_state != IEEE80211_S_SCAN) { 1782 /* set Japan filter bit for channel 14 */ 1783 tmp = ural_bbp_read(sc, 70); 1784 1785 tmp &= ~RAL_JAPAN_FILTER; 1786 if (chan == 14) 1787 tmp |= RAL_JAPAN_FILTER; 1788 1789 ural_bbp_write(sc, 70, tmp); 1790 1791 /* clear CRC errors */ 1792 ural_read(sc, RAL_STA_CSR0); 1793 1794 DELAY(10000); 1795 ural_disable_rf_tune(sc); 1796 } 1797 } 1798 1799 /* 1800 * Disable RF auto-tuning. 1801 */ 1802 Static void 1803 ural_disable_rf_tune(struct ural_softc *sc) 1804 { 1805 uint32_t tmp; 1806 1807 if (sc->rf_rev != RAL_RF_2523) { 1808 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1809 ural_rf_write(sc, RAL_RF1, tmp); 1810 } 1811 1812 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1813 ural_rf_write(sc, RAL_RF3, tmp); 1814 1815 DPRINTFN(2, ("disabling RF autotune\n")); 1816 } 1817 1818 /* 1819 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1820 * synchronization. 1821 */ 1822 Static void 1823 ural_enable_tsf_sync(struct ural_softc *sc) 1824 { 1825 struct ieee80211com *ic = &sc->sc_ic; 1826 uint16_t logcwmin, preload, tmp; 1827 1828 /* first, disable TSF synchronization */ 1829 ural_write(sc, RAL_TXRX_CSR19, 0); 1830 1831 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1832 ural_write(sc, RAL_TXRX_CSR18, tmp); 1833 1834 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1835 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1836 tmp = logcwmin << 12 | preload; 1837 ural_write(sc, RAL_TXRX_CSR20, tmp); 1838 1839 /* finally, enable TSF synchronization */ 1840 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1841 if (ic->ic_opmode == IEEE80211_M_STA) 1842 tmp |= RAL_ENABLE_TSF_SYNC(1); 1843 else 1844 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1845 ural_write(sc, RAL_TXRX_CSR19, tmp); 1846 1847 DPRINTF(("enabling TSF synchronization\n")); 1848 } 1849 1850 Static void 1851 ural_update_slot(struct ifnet *ifp) 1852 { 1853 struct ural_softc *sc = ifp->if_softc; 1854 struct ieee80211com *ic = &sc->sc_ic; 1855 uint16_t slottime, sifs, eifs; 1856 1857 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1858 1859 /* 1860 * These settings may sound a bit inconsistent but this is what the 1861 * reference driver does. 1862 */ 1863 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1864 sifs = 16 - RAL_RXTX_TURNAROUND; 1865 eifs = 364; 1866 } else { 1867 sifs = 10 - RAL_RXTX_TURNAROUND; 1868 eifs = 64; 1869 } 1870 1871 ural_write(sc, RAL_MAC_CSR10, slottime); 1872 ural_write(sc, RAL_MAC_CSR11, sifs); 1873 ural_write(sc, RAL_MAC_CSR12, eifs); 1874 } 1875 1876 Static void 1877 ural_set_txpreamble(struct ural_softc *sc) 1878 { 1879 uint16_t tmp; 1880 1881 tmp = ural_read(sc, RAL_TXRX_CSR10); 1882 1883 tmp &= ~RAL_SHORT_PREAMBLE; 1884 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1885 tmp |= RAL_SHORT_PREAMBLE; 1886 1887 ural_write(sc, RAL_TXRX_CSR10, tmp); 1888 } 1889 1890 Static void 1891 ural_set_basicrates(struct ural_softc *sc) 1892 { 1893 struct ieee80211com *ic = &sc->sc_ic; 1894 1895 /* update basic rate set */ 1896 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1897 /* 11b basic rates: 1, 2Mbps */ 1898 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1899 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1900 /* 11a basic rates: 6, 12, 24Mbps */ 1901 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1902 } else { 1903 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1904 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1905 } 1906 } 1907 1908 Static void 1909 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1910 { 1911 uint16_t tmp; 1912 1913 tmp = bssid[0] | bssid[1] << 8; 1914 ural_write(sc, RAL_MAC_CSR5, tmp); 1915 1916 tmp = bssid[2] | bssid[3] << 8; 1917 ural_write(sc, RAL_MAC_CSR6, tmp); 1918 1919 tmp = bssid[4] | bssid[5] << 8; 1920 ural_write(sc, RAL_MAC_CSR7, tmp); 1921 1922 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1923 } 1924 1925 Static void 1926 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1927 { 1928 uint16_t tmp; 1929 1930 tmp = addr[0] | addr[1] << 8; 1931 ural_write(sc, RAL_MAC_CSR2, tmp); 1932 1933 tmp = addr[2] | addr[3] << 8; 1934 ural_write(sc, RAL_MAC_CSR3, tmp); 1935 1936 tmp = addr[4] | addr[5] << 8; 1937 ural_write(sc, RAL_MAC_CSR4, tmp); 1938 1939 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1940 } 1941 1942 Static void 1943 ural_update_promisc(struct ural_softc *sc) 1944 { 1945 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1946 uint32_t tmp; 1947 1948 tmp = ural_read(sc, RAL_TXRX_CSR2); 1949 1950 tmp &= ~RAL_DROP_NOT_TO_ME; 1951 if (!(ifp->if_flags & IFF_PROMISC)) 1952 tmp |= RAL_DROP_NOT_TO_ME; 1953 1954 ural_write(sc, RAL_TXRX_CSR2, tmp); 1955 1956 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1957 "entering" : "leaving")); 1958 } 1959 1960 Static const char * 1961 ural_get_rf(int rev) 1962 { 1963 switch (rev) { 1964 case RAL_RF_2522: return "RT2522"; 1965 case RAL_RF_2523: return "RT2523"; 1966 case RAL_RF_2524: return "RT2524"; 1967 case RAL_RF_2525: return "RT2525"; 1968 case RAL_RF_2525E: return "RT2525e"; 1969 case RAL_RF_2526: return "RT2526"; 1970 case RAL_RF_5222: return "RT5222"; 1971 default: return "unknown"; 1972 } 1973 } 1974 1975 Static void 1976 ural_read_eeprom(struct ural_softc *sc) 1977 { 1978 struct ieee80211com *ic = &sc->sc_ic; 1979 uint16_t val; 1980 1981 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1982 val = le16toh(val); 1983 sc->rf_rev = (val >> 11) & 0x7; 1984 sc->hw_radio = (val >> 10) & 0x1; 1985 sc->led_mode = (val >> 6) & 0x7; 1986 sc->rx_ant = (val >> 4) & 0x3; 1987 sc->tx_ant = (val >> 2) & 0x3; 1988 sc->nb_ant = val & 0x3; 1989 1990 /* read MAC address */ 1991 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1992 1993 /* read default values for BBP registers */ 1994 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1995 1996 /* read Tx power for all b/g channels */ 1997 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1998 } 1999 2000 Static int 2001 ural_bbp_init(struct ural_softc *sc) 2002 { 2003 int i, ntries; 2004 2005 /* wait for BBP to be ready */ 2006 for (ntries = 0; ntries < 100; ntries++) { 2007 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2008 break; 2009 DELAY(1000); 2010 } 2011 if (ntries == 100) { 2012 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2013 return EIO; 2014 } 2015 2016 /* initialize BBP registers to default values */ 2017 for (i = 0; i < __arraycount(ural_def_bbp); i++) 2018 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2019 2020 #if 0 2021 /* initialize BBP registers to values stored in EEPROM */ 2022 for (i = 0; i < 16; i++) { 2023 if (sc->bbp_prom[i].reg == 0xff) 2024 continue; 2025 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2026 } 2027 #endif 2028 2029 return 0; 2030 } 2031 2032 Static void 2033 ural_set_txantenna(struct ural_softc *sc, int antenna) 2034 { 2035 uint16_t tmp; 2036 uint8_t tx; 2037 2038 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2039 if (antenna == 1) 2040 tx |= RAL_BBP_ANTA; 2041 else if (antenna == 2) 2042 tx |= RAL_BBP_ANTB; 2043 else 2044 tx |= RAL_BBP_DIVERSITY; 2045 2046 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2047 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2048 sc->rf_rev == RAL_RF_5222) 2049 tx |= RAL_BBP_FLIPIQ; 2050 2051 ural_bbp_write(sc, RAL_BBP_TX, tx); 2052 2053 /* update values in PHY_CSR5 and PHY_CSR6 */ 2054 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2055 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2056 2057 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2058 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2059 } 2060 2061 Static void 2062 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2063 { 2064 uint8_t rx; 2065 2066 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2067 if (antenna == 1) 2068 rx |= RAL_BBP_ANTA; 2069 else if (antenna == 2) 2070 rx |= RAL_BBP_ANTB; 2071 else 2072 rx |= RAL_BBP_DIVERSITY; 2073 2074 /* need to force no I/Q flip for RF 2525e and 2526 */ 2075 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2076 rx &= ~RAL_BBP_FLIPIQ; 2077 2078 ural_bbp_write(sc, RAL_BBP_RX, rx); 2079 } 2080 2081 Static int 2082 ural_init(struct ifnet *ifp) 2083 { 2084 struct ural_softc *sc = ifp->if_softc; 2085 struct ieee80211com *ic = &sc->sc_ic; 2086 struct ieee80211_key *wk; 2087 uint16_t tmp; 2088 usbd_status error; 2089 int i, ntries; 2090 2091 ural_set_testmode(sc); 2092 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2093 2094 ural_stop(ifp, 0); 2095 2096 /* initialize MAC registers to default values */ 2097 for (i = 0; i < __arraycount(ural_def_mac); i++) 2098 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2099 2100 /* wait for BBP and RF to wake up (this can take a long time!) */ 2101 for (ntries = 0; ntries < 100; ntries++) { 2102 tmp = ural_read(sc, RAL_MAC_CSR17); 2103 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2104 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2105 break; 2106 DELAY(1000); 2107 } 2108 if (ntries == 100) { 2109 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2110 device_xname(sc->sc_dev)); 2111 error = EIO; 2112 goto fail; 2113 } 2114 2115 /* we're ready! */ 2116 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2117 2118 /* set basic rate set (will be updated later) */ 2119 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2120 2121 error = ural_bbp_init(sc); 2122 if (error != 0) 2123 goto fail; 2124 2125 /* set default BSS channel */ 2126 ural_set_chan(sc, ic->ic_curchan); 2127 2128 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2129 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2130 2131 ural_set_txantenna(sc, sc->tx_ant); 2132 ural_set_rxantenna(sc, sc->rx_ant); 2133 2134 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2135 ural_set_macaddr(sc, ic->ic_myaddr); 2136 2137 /* 2138 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2139 */ 2140 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2141 wk = &ic->ic_crypto.cs_nw_keys[i]; 2142 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2143 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2144 } 2145 2146 /* 2147 * Allocate xfer for AMRR statistics requests. 2148 */ 2149 struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); 2150 error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); 2151 if (error) { 2152 printf("%s: could not allocate AMRR xfer\n", 2153 device_xname(sc->sc_dev)); 2154 goto fail; 2155 } 2156 2157 /* 2158 * Open Tx and Rx USB bulk pipes. 2159 */ 2160 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2161 &sc->sc_tx_pipeh); 2162 if (error != 0) { 2163 printf("%s: could not open Tx pipe: %s\n", 2164 device_xname(sc->sc_dev), usbd_errstr(error)); 2165 goto fail; 2166 } 2167 2168 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2169 &sc->sc_rx_pipeh); 2170 if (error != 0) { 2171 printf("%s: could not open Rx pipe: %s\n", 2172 device_xname(sc->sc_dev), usbd_errstr(error)); 2173 goto fail; 2174 } 2175 2176 /* 2177 * Allocate Tx and Rx xfer queues. 2178 */ 2179 error = ural_alloc_tx_list(sc); 2180 if (error != 0) { 2181 printf("%s: could not allocate Tx list\n", 2182 device_xname(sc->sc_dev)); 2183 goto fail; 2184 } 2185 2186 error = ural_alloc_rx_list(sc); 2187 if (error != 0) { 2188 printf("%s: could not allocate Rx list\n", 2189 device_xname(sc->sc_dev)); 2190 goto fail; 2191 } 2192 2193 /* 2194 * Start up the receive pipe. 2195 */ 2196 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2197 struct ural_rx_data *data = &sc->rx_data[i]; 2198 2199 usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, 2200 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2201 usbd_transfer(data->xfer); 2202 } 2203 2204 /* kick Rx */ 2205 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2206 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2207 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2208 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2209 tmp |= RAL_DROP_TODS; 2210 if (!(ifp->if_flags & IFF_PROMISC)) 2211 tmp |= RAL_DROP_NOT_TO_ME; 2212 } 2213 ural_write(sc, RAL_TXRX_CSR2, tmp); 2214 2215 ifp->if_flags &= ~IFF_OACTIVE; 2216 ifp->if_flags |= IFF_RUNNING; 2217 2218 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2219 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2220 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2221 } else 2222 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2223 2224 return 0; 2225 2226 fail: ural_stop(ifp, 1); 2227 return error; 2228 } 2229 2230 Static void 2231 ural_stop(struct ifnet *ifp, int disable) 2232 { 2233 struct ural_softc *sc = ifp->if_softc; 2234 struct ieee80211com *ic = &sc->sc_ic; 2235 2236 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2237 2238 sc->sc_tx_timer = 0; 2239 ifp->if_timer = 0; 2240 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2241 2242 /* disable Rx */ 2243 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2244 2245 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2246 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2247 ural_write(sc, RAL_MAC_CSR1, 0); 2248 2249 if (sc->amrr_xfer != NULL) { 2250 usbd_destroy_xfer(sc->amrr_xfer); 2251 sc->amrr_xfer = NULL; 2252 } 2253 2254 if (sc->sc_rx_pipeh != NULL) { 2255 usbd_abort_pipe(sc->sc_rx_pipeh); 2256 } 2257 2258 if (sc->sc_tx_pipeh != NULL) { 2259 usbd_abort_pipe(sc->sc_tx_pipeh); 2260 } 2261 2262 ural_free_rx_list(sc); 2263 ural_free_tx_list(sc); 2264 2265 if (sc->sc_rx_pipeh != NULL) { 2266 usbd_close_pipe(sc->sc_rx_pipeh); 2267 sc->sc_rx_pipeh = NULL; 2268 } 2269 2270 if (sc->sc_tx_pipeh != NULL) { 2271 usbd_close_pipe(sc->sc_tx_pipeh); 2272 sc->sc_tx_pipeh = NULL; 2273 } 2274 } 2275 2276 int 2277 ural_activate(device_t self, enum devact act) 2278 { 2279 struct ural_softc *sc = device_private(self); 2280 2281 switch (act) { 2282 case DVACT_DEACTIVATE: 2283 if_deactivate(&sc->sc_if); 2284 return 0; 2285 default: 2286 return EOPNOTSUPP; 2287 } 2288 } 2289 2290 Static void 2291 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2292 { 2293 int i; 2294 2295 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2296 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2297 2298 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2299 2300 /* set rate to some reasonable initial value */ 2301 for (i = ni->ni_rates.rs_nrates - 1; 2302 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2303 i--); 2304 ni->ni_txrate = i; 2305 2306 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2307 } 2308 2309 Static void 2310 ural_amrr_timeout(void *arg) 2311 { 2312 struct ural_softc *sc = (struct ural_softc *)arg; 2313 usb_device_request_t req; 2314 int s; 2315 2316 s = splusb(); 2317 2318 /* 2319 * Asynchronously read statistic registers (cleared by read). 2320 */ 2321 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2322 req.bRequest = RAL_READ_MULTI_MAC; 2323 USETW(req.wValue, 0); 2324 USETW(req.wIndex, RAL_STA_CSR0); 2325 USETW(req.wLength, sizeof(sc->sta)); 2326 2327 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2328 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, 2329 ural_amrr_update); 2330 (void)usbd_transfer(sc->amrr_xfer); 2331 2332 splx(s); 2333 } 2334 2335 Static void 2336 ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2337 usbd_status status) 2338 { 2339 struct ural_softc *sc = (struct ural_softc *)priv; 2340 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2341 2342 if (status != USBD_NORMAL_COMPLETION) { 2343 printf("%s: could not retrieve Tx statistics - " 2344 "cancelling automatic rate control\n", 2345 device_xname(sc->sc_dev)); 2346 return; 2347 } 2348 2349 /* count TX retry-fail as Tx errors */ 2350 ifp->if_oerrors += sc->sta[9]; 2351 2352 sc->amn.amn_retrycnt = 2353 sc->sta[7] + /* TX one-retry ok count */ 2354 sc->sta[8] + /* TX more-retry ok count */ 2355 sc->sta[9]; /* TX retry-fail count */ 2356 2357 sc->amn.amn_txcnt = 2358 sc->amn.amn_retrycnt + 2359 sc->sta[6]; /* TX no-retry ok count */ 2360 2361 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2362 2363 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2364 } 2365
Indexes created Fri Oct 03 02:09:57 GMT 2025