if_ural.c revision 1.57
1 /* $NetBSD: if_ural.c,v 1.57 2018/08/02 06:09:04 riastradh Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.57 2018/08/02 06:09:04 riastradh Exp $"); 28 29 #ifdef _KERNEL_OPT 30 #include "opt_usb.h" 31 #endif 32 33 #include <sys/param.h> 34 #include <sys/sockio.h> 35 #include <sys/sysctl.h> 36 #include <sys/mbuf.h> 37 #include <sys/kernel.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/conf.h> 41 #include <sys/device.h> 42 43 #include <sys/bus.h> 44 #include <machine/endian.h> 45 #include <sys/intr.h> 46 47 #include <net/bpf.h> 48 #include <net/if.h> 49 #include <net/if_arp.h> 50 #include <net/if_dl.h> 51 #include <net/if_ether.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 55 #include <netinet/in.h> 56 #include <netinet/in_systm.h> 57 #include <netinet/in_var.h> 58 #include <netinet/ip.h> 59 60 #include <net80211/ieee80211_netbsd.h> 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_amrr.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usbdevs.h> 69 70 #include <dev/usb/if_uralreg.h> 71 #include <dev/usb/if_uralvar.h> 72 73 #ifdef URAL_DEBUG 74 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 75 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 76 int ural_debug = 0; 77 #else 78 #define DPRINTF(x) 79 #define DPRINTFN(n, x) 80 #endif 81 82 /* various supported device vendors/products */ 83 static const struct usb_devno ural_devs[] = { 84 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 85 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 86 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 87 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 88 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 89 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 90 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 91 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 92 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 93 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 95 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 98 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 99 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 101 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 102 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 105 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 106 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 107 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 108 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 109 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 110 }; 111 112 Static int ural_alloc_tx_list(struct ural_softc *); 113 Static void ural_free_tx_list(struct ural_softc *); 114 Static int ural_alloc_rx_list(struct ural_softc *); 115 Static void ural_free_rx_list(struct ural_softc *); 116 Static int ural_media_change(struct ifnet *); 117 Static void ural_next_scan(void *); 118 Static void ural_task(void *); 119 Static int ural_newstate(struct ieee80211com *, 120 enum ieee80211_state, int); 121 Static int ural_rxrate(struct ural_rx_desc *); 122 Static void ural_txeof(struct usbd_xfer *, void *, 123 usbd_status); 124 Static void ural_rxeof(struct usbd_xfer *, void *, 125 usbd_status); 126 Static int ural_ack_rate(struct ieee80211com *, int); 127 Static uint16_t ural_txtime(int, int, uint32_t); 128 Static uint8_t ural_plcp_signal(int); 129 Static void ural_setup_tx_desc(struct ural_softc *, 130 struct ural_tx_desc *, uint32_t, int, int); 131 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137 Static void ural_start(struct ifnet *); 138 Static void ural_watchdog(struct ifnet *); 139 Static int ural_reset(struct ifnet *); 140 Static int ural_ioctl(struct ifnet *, u_long, void *); 141 Static void ural_set_testmode(struct ural_softc *); 142 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 143 int); 144 Static uint16_t ural_read(struct ural_softc *, uint16_t); 145 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 146 int); 147 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 148 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 149 int); 150 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 151 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 152 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 153 Static void ural_set_chan(struct ural_softc *, 154 struct ieee80211_channel *); 155 Static void ural_disable_rf_tune(struct ural_softc *); 156 Static void ural_enable_tsf_sync(struct ural_softc *); 157 Static void ural_update_slot(struct ifnet *); 158 Static void ural_set_txpreamble(struct ural_softc *); 159 Static void ural_set_basicrates(struct ural_softc *); 160 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 161 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 162 Static void ural_update_promisc(struct ural_softc *); 163 Static const char *ural_get_rf(int); 164 Static void ural_read_eeprom(struct ural_softc *); 165 Static int ural_bbp_init(struct ural_softc *); 166 Static void ural_set_txantenna(struct ural_softc *, int); 167 Static void ural_set_rxantenna(struct ural_softc *, int); 168 Static int ural_init(struct ifnet *); 169 Static void ural_stop(struct ifnet *, int); 170 Static void ural_amrr_start(struct ural_softc *, 171 struct ieee80211_node *); 172 Static void ural_amrr_timeout(void *); 173 Static void ural_amrr_update(struct usbd_xfer *, void *, 174 usbd_status status); 175 176 /* 177 * Default values for MAC registers; values taken from the reference driver. 178 */ 179 static const struct { 180 uint16_t reg; 181 uint16_t val; 182 } ural_def_mac[] = { 183 { RAL_TXRX_CSR5, 0x8c8d }, 184 { RAL_TXRX_CSR6, 0x8b8a }, 185 { RAL_TXRX_CSR7, 0x8687 }, 186 { RAL_TXRX_CSR8, 0x0085 }, 187 { RAL_MAC_CSR13, 0x1111 }, 188 { RAL_MAC_CSR14, 0x1e11 }, 189 { RAL_TXRX_CSR21, 0xe78f }, 190 { RAL_MAC_CSR9, 0xff1d }, 191 { RAL_MAC_CSR11, 0x0002 }, 192 { RAL_MAC_CSR22, 0x0053 }, 193 { RAL_MAC_CSR15, 0x0000 }, 194 { RAL_MAC_CSR8, 0x0780 }, 195 { RAL_TXRX_CSR19, 0x0000 }, 196 { RAL_TXRX_CSR18, 0x005a }, 197 { RAL_PHY_CSR2, 0x0000 }, 198 { RAL_TXRX_CSR0, 0x1ec0 }, 199 { RAL_PHY_CSR4, 0x000f } 200 }; 201 202 /* 203 * Default values for BBP registers; values taken from the reference driver. 204 */ 205 static const struct { 206 uint8_t reg; 207 uint8_t val; 208 } ural_def_bbp[] = { 209 { 3, 0x02 }, 210 { 4, 0x19 }, 211 { 14, 0x1c }, 212 { 15, 0x30 }, 213 { 16, 0xac }, 214 { 17, 0x48 }, 215 { 18, 0x18 }, 216 { 19, 0xff }, 217 { 20, 0x1e }, 218 { 21, 0x08 }, 219 { 22, 0x08 }, 220 { 23, 0x08 }, 221 { 24, 0x80 }, 222 { 25, 0x50 }, 223 { 26, 0x08 }, 224 { 27, 0x23 }, 225 { 30, 0x10 }, 226 { 31, 0x2b }, 227 { 32, 0xb9 }, 228 { 34, 0x12 }, 229 { 35, 0x50 }, 230 { 39, 0xc4 }, 231 { 40, 0x02 }, 232 { 41, 0x60 }, 233 { 53, 0x10 }, 234 { 54, 0x18 }, 235 { 56, 0x08 }, 236 { 57, 0x10 }, 237 { 58, 0x08 }, 238 { 61, 0x60 }, 239 { 62, 0x10 }, 240 { 75, 0xff } 241 }; 242 243 /* 244 * Default values for RF register R2 indexed by channel numbers. 245 */ 246 static const uint32_t ural_rf2522_r2[] = { 247 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 248 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 249 }; 250 251 static const uint32_t ural_rf2523_r2[] = { 252 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 253 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 254 }; 255 256 static const uint32_t ural_rf2524_r2[] = { 257 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 258 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 259 }; 260 261 static const uint32_t ural_rf2525_r2[] = { 262 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 263 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 264 }; 265 266 static const uint32_t ural_rf2525_hi_r2[] = { 267 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 268 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 269 }; 270 271 static const uint32_t ural_rf2525e_r2[] = { 272 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 273 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 274 }; 275 276 static const uint32_t ural_rf2526_hi_r2[] = { 277 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 278 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 279 }; 280 281 static const uint32_t ural_rf2526_r2[] = { 282 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 283 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 284 }; 285 286 /* 287 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 288 * values taken from the reference driver. 289 */ 290 static const struct { 291 uint8_t chan; 292 uint32_t r1; 293 uint32_t r2; 294 uint32_t r4; 295 } ural_rf5222[] = { 296 { 1, 0x08808, 0x0044d, 0x00282 }, 297 { 2, 0x08808, 0x0044e, 0x00282 }, 298 { 3, 0x08808, 0x0044f, 0x00282 }, 299 { 4, 0x08808, 0x00460, 0x00282 }, 300 { 5, 0x08808, 0x00461, 0x00282 }, 301 { 6, 0x08808, 0x00462, 0x00282 }, 302 { 7, 0x08808, 0x00463, 0x00282 }, 303 { 8, 0x08808, 0x00464, 0x00282 }, 304 { 9, 0x08808, 0x00465, 0x00282 }, 305 { 10, 0x08808, 0x00466, 0x00282 }, 306 { 11, 0x08808, 0x00467, 0x00282 }, 307 { 12, 0x08808, 0x00468, 0x00282 }, 308 { 13, 0x08808, 0x00469, 0x00282 }, 309 { 14, 0x08808, 0x0046b, 0x00286 }, 310 311 { 36, 0x08804, 0x06225, 0x00287 }, 312 { 40, 0x08804, 0x06226, 0x00287 }, 313 { 44, 0x08804, 0x06227, 0x00287 }, 314 { 48, 0x08804, 0x06228, 0x00287 }, 315 { 52, 0x08804, 0x06229, 0x00287 }, 316 { 56, 0x08804, 0x0622a, 0x00287 }, 317 { 60, 0x08804, 0x0622b, 0x00287 }, 318 { 64, 0x08804, 0x0622c, 0x00287 }, 319 320 { 100, 0x08804, 0x02200, 0x00283 }, 321 { 104, 0x08804, 0x02201, 0x00283 }, 322 { 108, 0x08804, 0x02202, 0x00283 }, 323 { 112, 0x08804, 0x02203, 0x00283 }, 324 { 116, 0x08804, 0x02204, 0x00283 }, 325 { 120, 0x08804, 0x02205, 0x00283 }, 326 { 124, 0x08804, 0x02206, 0x00283 }, 327 { 128, 0x08804, 0x02207, 0x00283 }, 328 { 132, 0x08804, 0x02208, 0x00283 }, 329 { 136, 0x08804, 0x02209, 0x00283 }, 330 { 140, 0x08804, 0x0220a, 0x00283 }, 331 332 { 149, 0x08808, 0x02429, 0x00281 }, 333 { 153, 0x08808, 0x0242b, 0x00281 }, 334 { 157, 0x08808, 0x0242d, 0x00281 }, 335 { 161, 0x08808, 0x0242f, 0x00281 } 336 }; 337 338 int ural_match(device_t, cfdata_t, void *); 339 void ural_attach(device_t, device_t, void *); 340 int ural_detach(device_t, int); 341 int ural_activate(device_t, enum devact); 342 extern struct cfdriver ural_cd; 343 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, 344 ural_detach, ural_activate); 345 346 int 347 ural_match(device_t parent, cfdata_t match, void *aux) 348 { 349 struct usb_attach_arg *uaa = aux; 350 351 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 352 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 353 } 354 355 void 356 ural_attach(device_t parent, device_t self, void *aux) 357 { 358 struct ural_softc *sc = device_private(self); 359 struct usb_attach_arg *uaa = aux; 360 struct ieee80211com *ic = &sc->sc_ic; 361 struct ifnet *ifp = &sc->sc_if; 362 usb_interface_descriptor_t *id; 363 usb_endpoint_descriptor_t *ed; 364 usbd_status error; 365 char *devinfop; 366 int i; 367 368 sc->sc_dev = self; 369 sc->sc_udev = uaa->uaa_device; 370 371 aprint_naive("\n"); 372 aprint_normal("\n"); 373 374 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 375 aprint_normal_dev(self, "%s\n", devinfop); 376 usbd_devinfo_free(devinfop); 377 378 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 379 if (error != 0) { 380 aprint_error_dev(self, "failed to set configuration" 381 ", err=%s\n", usbd_errstr(error)); 382 return; 383 } 384 385 /* get the first interface handle */ 386 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 387 &sc->sc_iface); 388 if (error != 0) { 389 aprint_error_dev(self, "could not get interface handle\n"); 390 return; 391 } 392 393 /* 394 * Find endpoints. 395 */ 396 id = usbd_get_interface_descriptor(sc->sc_iface); 397 398 sc->sc_rx_no = sc->sc_tx_no = -1; 399 for (i = 0; i < id->bNumEndpoints; i++) { 400 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 401 if (ed == NULL) { 402 aprint_error_dev(self, 403 "no endpoint descriptor for %d\n", i); 404 return; 405 } 406 407 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 408 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 409 sc->sc_rx_no = ed->bEndpointAddress; 410 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 411 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 412 sc->sc_tx_no = ed->bEndpointAddress; 413 } 414 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 415 aprint_error_dev(self, "missing endpoint\n"); 416 return; 417 } 418 419 usb_init_task(&sc->sc_task, ural_task, sc, 0); 420 callout_init(&sc->sc_scan_ch, 0); 421 sc->amrr.amrr_min_success_threshold = 1; 422 sc->amrr.amrr_max_success_threshold = 15; 423 callout_init(&sc->sc_amrr_ch, 0); 424 425 /* retrieve RT2570 rev. no */ 426 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 427 428 /* retrieve MAC address and various other things from EEPROM */ 429 ural_read_eeprom(sc); 430 431 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 432 sc->asic_rev, ural_get_rf(sc->rf_rev)); 433 434 ifp->if_softc = sc; 435 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 436 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 437 ifp->if_init = ural_init; 438 ifp->if_ioctl = ural_ioctl; 439 ifp->if_start = ural_start; 440 ifp->if_watchdog = ural_watchdog; 441 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 442 IFQ_SET_READY(&ifp->if_snd); 443 444 ic->ic_ifp = ifp; 445 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 446 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 447 ic->ic_state = IEEE80211_S_INIT; 448 449 /* set device capabilities */ 450 ic->ic_caps = 451 IEEE80211_C_IBSS | /* IBSS mode supported */ 452 IEEE80211_C_MONITOR | /* monitor mode supported */ 453 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 454 IEEE80211_C_TXPMGT | /* tx power management */ 455 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 456 IEEE80211_C_SHSLOT | /* short slot time supported */ 457 IEEE80211_C_WPA; /* 802.11i */ 458 459 if (sc->rf_rev == RAL_RF_5222) { 460 /* set supported .11a rates */ 461 ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a; 462 463 /* set supported .11a channels */ 464 for (i = 36; i <= 64; i += 4) { 465 ic->ic_channels[i].ic_freq = 466 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 467 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 468 } 469 for (i = 100; i <= 140; i += 4) { 470 ic->ic_channels[i].ic_freq = 471 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 472 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 473 } 474 for (i = 149; i <= 161; i += 4) { 475 ic->ic_channels[i].ic_freq = 476 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 477 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 478 } 479 } 480 481 /* set supported .11b and .11g rates */ 482 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 483 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 484 485 /* set supported .11b and .11g channels (1 through 14) */ 486 for (i = 1; i <= 14; i++) { 487 ic->ic_channels[i].ic_freq = 488 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 489 ic->ic_channels[i].ic_flags = 490 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 491 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 492 } 493 494 if_attach(ifp); 495 ieee80211_ifattach(ic); 496 ic->ic_reset = ural_reset; 497 498 /* override state transition machine */ 499 sc->sc_newstate = ic->ic_newstate; 500 ic->ic_newstate = ural_newstate; 501 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 502 503 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 504 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 505 506 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 507 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 508 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 509 510 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 511 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 512 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 513 514 ieee80211_announce(ic); 515 516 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 517 518 if (!pmf_device_register(self, NULL, NULL)) 519 aprint_error_dev(self, "couldn't establish power handler\n"); 520 521 return; 522 } 523 524 int 525 ural_detach(device_t self, int flags) 526 { 527 struct ural_softc *sc = device_private(self); 528 struct ieee80211com *ic = &sc->sc_ic; 529 struct ifnet *ifp = &sc->sc_if; 530 int s; 531 532 pmf_device_deregister(self); 533 534 s = splusb(); 535 536 ural_stop(ifp, 1); 537 callout_halt(&sc->sc_scan_ch, NULL); 538 callout_halt(&sc->sc_amrr_ch, NULL); 539 usb_rem_task_wait(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER, NULL); 540 541 bpf_detach(ifp); 542 ieee80211_ifdetach(ic); 543 if_detach(ifp); 544 545 splx(s); 546 547 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 548 549 return 0; 550 } 551 552 Static int 553 ural_alloc_tx_list(struct ural_softc *sc) 554 { 555 struct ural_tx_data *data; 556 int i, error; 557 558 sc->tx_queued = 0; 559 560 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 561 data = &sc->tx_data[i]; 562 563 data->sc = sc; 564 error = usbd_create_xfer(sc->sc_tx_pipeh, 565 RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, 566 &data->xfer); 567 if (error) { 568 printf("%s: could not allocate tx xfer\n", 569 device_xname(sc->sc_dev)); 570 goto fail; 571 } 572 573 data->buf = usbd_get_buffer(data->xfer); 574 } 575 576 return 0; 577 578 fail: ural_free_tx_list(sc); 579 return error; 580 } 581 582 Static void 583 ural_free_tx_list(struct ural_softc *sc) 584 { 585 struct ural_tx_data *data; 586 int i; 587 588 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 589 data = &sc->tx_data[i]; 590 591 if (data->xfer != NULL) { 592 usbd_destroy_xfer(data->xfer); 593 data->xfer = NULL; 594 } 595 596 if (data->ni != NULL) { 597 ieee80211_free_node(data->ni); 598 data->ni = NULL; 599 } 600 } 601 } 602 603 Static int 604 ural_alloc_rx_list(struct ural_softc *sc) 605 { 606 struct ural_rx_data *data; 607 int i, error; 608 609 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 610 data = &sc->rx_data[i]; 611 612 data->sc = sc; 613 614 error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, 615 0, 0, &data->xfer); 616 if (error) { 617 printf("%s: could not allocate rx xfer\n", 618 device_xname(sc->sc_dev)); 619 goto fail; 620 } 621 622 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 623 if (data->m == NULL) { 624 printf("%s: could not allocate rx mbuf\n", 625 device_xname(sc->sc_dev)); 626 error = ENOMEM; 627 goto fail; 628 } 629 630 MCLGET(data->m, M_DONTWAIT); 631 if (!(data->m->m_flags & M_EXT)) { 632 printf("%s: could not allocate rx mbuf cluster\n", 633 device_xname(sc->sc_dev)); 634 error = ENOMEM; 635 goto fail; 636 } 637 638 data->buf = mtod(data->m, uint8_t *); 639 } 640 641 return 0; 642 643 fail: ural_free_rx_list(sc); 644 return error; 645 } 646 647 Static void 648 ural_free_rx_list(struct ural_softc *sc) 649 { 650 struct ural_rx_data *data; 651 int i; 652 653 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 654 data = &sc->rx_data[i]; 655 656 if (data->xfer != NULL) { 657 usbd_destroy_xfer(data->xfer); 658 data->xfer = NULL; 659 } 660 661 if (data->m != NULL) { 662 m_freem(data->m); 663 data->m = NULL; 664 } 665 } 666 } 667 668 Static int 669 ural_media_change(struct ifnet *ifp) 670 { 671 int error; 672 673 error = ieee80211_media_change(ifp); 674 if (error != ENETRESET) 675 return error; 676 677 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 678 ural_init(ifp); 679 680 return 0; 681 } 682 683 /* 684 * This function is called periodically (every 200ms) during scanning to 685 * switch from one channel to another. 686 */ 687 Static void 688 ural_next_scan(void *arg) 689 { 690 struct ural_softc *sc = arg; 691 struct ieee80211com *ic = &sc->sc_ic; 692 693 if (ic->ic_state == IEEE80211_S_SCAN) 694 ieee80211_next_scan(ic); 695 } 696 697 Static void 698 ural_task(void *arg) 699 { 700 struct ural_softc *sc = arg; 701 struct ieee80211com *ic = &sc->sc_ic; 702 enum ieee80211_state ostate; 703 struct ieee80211_node *ni; 704 struct mbuf *m; 705 706 ostate = ic->ic_state; 707 708 switch (sc->sc_state) { 709 case IEEE80211_S_INIT: 710 if (ostate == IEEE80211_S_RUN) { 711 /* abort TSF synchronization */ 712 ural_write(sc, RAL_TXRX_CSR19, 0); 713 714 /* force tx led to stop blinking */ 715 ural_write(sc, RAL_MAC_CSR20, 0); 716 } 717 break; 718 719 case IEEE80211_S_SCAN: 720 ural_set_chan(sc, ic->ic_curchan); 721 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 722 break; 723 724 case IEEE80211_S_AUTH: 725 ural_set_chan(sc, ic->ic_curchan); 726 break; 727 728 case IEEE80211_S_ASSOC: 729 ural_set_chan(sc, ic->ic_curchan); 730 break; 731 732 case IEEE80211_S_RUN: 733 ural_set_chan(sc, ic->ic_curchan); 734 735 ni = ic->ic_bss; 736 737 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 738 ural_update_slot(ic->ic_ifp); 739 ural_set_txpreamble(sc); 740 ural_set_basicrates(sc); 741 ural_set_bssid(sc, ni->ni_bssid); 742 } 743 744 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 745 ic->ic_opmode == IEEE80211_M_IBSS) { 746 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 747 if (m == NULL) { 748 printf("%s: could not allocate beacon\n", 749 device_xname(sc->sc_dev)); 750 return; 751 } 752 753 if (ural_tx_bcn(sc, m, ni) != 0) { 754 m_freem(m); 755 printf("%s: could not send beacon\n", 756 device_xname(sc->sc_dev)); 757 return; 758 } 759 760 /* beacon is no longer needed */ 761 m_freem(m); 762 } 763 764 /* make tx led blink on tx (controlled by ASIC) */ 765 ural_write(sc, RAL_MAC_CSR20, 1); 766 767 if (ic->ic_opmode != IEEE80211_M_MONITOR) 768 ural_enable_tsf_sync(sc); 769 770 /* enable automatic rate adaptation in STA mode */ 771 if (ic->ic_opmode == IEEE80211_M_STA && 772 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 773 ural_amrr_start(sc, ni); 774 775 break; 776 } 777 778 sc->sc_newstate(ic, sc->sc_state, -1); 779 } 780 781 Static int 782 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 783 int arg) 784 { 785 struct ural_softc *sc = ic->ic_ifp->if_softc; 786 787 /* 788 * XXXSMP: This does not wait for the task, if it is in flight, 789 * to complete. If this code works at all, it must rely on the 790 * kernel lock to serialize with the USB task thread. 791 */ 792 usb_rem_task(sc->sc_udev, &sc->sc_task); 793 callout_stop(&sc->sc_scan_ch); 794 callout_stop(&sc->sc_amrr_ch); 795 796 /* do it in a process context */ 797 sc->sc_state = nstate; 798 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 799 800 return 0; 801 } 802 803 /* quickly determine if a given rate is CCK or OFDM */ 804 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 805 806 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 807 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 808 809 #define RAL_SIFS 10 /* us */ 810 811 #define RAL_RXTX_TURNAROUND 5 /* us */ 812 813 /* 814 * This function is only used by the Rx radiotap code. 815 */ 816 Static int 817 ural_rxrate(struct ural_rx_desc *desc) 818 { 819 if (le32toh(desc->flags) & RAL_RX_OFDM) { 820 /* reverse function of ural_plcp_signal */ 821 switch (desc->rate) { 822 case 0xb: return 12; 823 case 0xf: return 18; 824 case 0xa: return 24; 825 case 0xe: return 36; 826 case 0x9: return 48; 827 case 0xd: return 72; 828 case 0x8: return 96; 829 case 0xc: return 108; 830 } 831 } else { 832 if (desc->rate == 10) 833 return 2; 834 if (desc->rate == 20) 835 return 4; 836 if (desc->rate == 55) 837 return 11; 838 if (desc->rate == 110) 839 return 22; 840 } 841 return 2; /* should not get there */ 842 } 843 844 Static void 845 ural_txeof(struct usbd_xfer *xfer, void * priv, 846 usbd_status status) 847 { 848 struct ural_tx_data *data = priv; 849 struct ural_softc *sc = data->sc; 850 struct ifnet *ifp = &sc->sc_if; 851 int s; 852 853 if (status != USBD_NORMAL_COMPLETION) { 854 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 855 return; 856 857 printf("%s: could not transmit buffer: %s\n", 858 device_xname(sc->sc_dev), usbd_errstr(status)); 859 860 if (status == USBD_STALLED) 861 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 862 863 ifp->if_oerrors++; 864 return; 865 } 866 867 s = splnet(); 868 869 m_freem(data->m); 870 data->m = NULL; 871 ieee80211_free_node(data->ni); 872 data->ni = NULL; 873 874 sc->tx_queued--; 875 ifp->if_opackets++; 876 877 DPRINTFN(10, ("tx done\n")); 878 879 sc->sc_tx_timer = 0; 880 ifp->if_flags &= ~IFF_OACTIVE; 881 ural_start(ifp); 882 883 splx(s); 884 } 885 886 Static void 887 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 888 { 889 struct ural_rx_data *data = priv; 890 struct ural_softc *sc = data->sc; 891 struct ieee80211com *ic = &sc->sc_ic; 892 struct ifnet *ifp = &sc->sc_if; 893 struct ural_rx_desc *desc; 894 struct ieee80211_frame *wh; 895 struct ieee80211_node *ni; 896 struct mbuf *mnew, *m; 897 int s, len; 898 899 if (status != USBD_NORMAL_COMPLETION) { 900 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 901 return; 902 903 if (status == USBD_STALLED) 904 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 905 goto skip; 906 } 907 908 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 909 910 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 911 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 912 len)); 913 ifp->if_ierrors++; 914 goto skip; 915 } 916 917 /* rx descriptor is located at the end */ 918 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 919 920 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 921 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 922 /* 923 * This should not happen since we did not request to receive 924 * those frames when we filled RAL_TXRX_CSR2. 925 */ 926 DPRINTFN(5, ("PHY or CRC error\n")); 927 ifp->if_ierrors++; 928 goto skip; 929 } 930 931 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 932 if (mnew == NULL) { 933 ifp->if_ierrors++; 934 goto skip; 935 } 936 937 MCLGET(mnew, M_DONTWAIT); 938 if (!(mnew->m_flags & M_EXT)) { 939 ifp->if_ierrors++; 940 m_freem(mnew); 941 goto skip; 942 } 943 944 m = data->m; 945 data->m = mnew; 946 data->buf = mtod(data->m, uint8_t *); 947 948 /* finalize mbuf */ 949 m_set_rcvif(m, ifp); 950 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 951 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 952 953 s = splnet(); 954 955 if (sc->sc_drvbpf != NULL) { 956 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 957 958 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 959 tap->wr_rate = ural_rxrate(desc); 960 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 961 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 962 tap->wr_antenna = sc->rx_ant; 963 tap->wr_antsignal = desc->rssi; 964 965 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, BPF_D_IN); 966 } 967 968 wh = mtod(m, struct ieee80211_frame *); 969 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 970 971 /* send the frame to the 802.11 layer */ 972 ieee80211_input(ic, m, ni, desc->rssi, 0); 973 974 /* node is no longer needed */ 975 ieee80211_free_node(ni); 976 977 splx(s); 978 979 DPRINTFN(15, ("rx done\n")); 980 981 skip: /* setup a new transfer */ 982 usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, 983 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 984 usbd_transfer(xfer); 985 } 986 987 /* 988 * Return the expected ack rate for a frame transmitted at rate `rate'. 989 * XXX: this should depend on the destination node basic rate set. 990 */ 991 Static int 992 ural_ack_rate(struct ieee80211com *ic, int rate) 993 { 994 switch (rate) { 995 /* CCK rates */ 996 case 2: 997 return 2; 998 case 4: 999 case 11: 1000 case 22: 1001 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1002 1003 /* OFDM rates */ 1004 case 12: 1005 case 18: 1006 return 12; 1007 case 24: 1008 case 36: 1009 return 24; 1010 case 48: 1011 case 72: 1012 case 96: 1013 case 108: 1014 return 48; 1015 } 1016 1017 /* default to 1Mbps */ 1018 return 2; 1019 } 1020 1021 /* 1022 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1023 * The function automatically determines the operating mode depending on the 1024 * given rate. `flags' indicates whether short preamble is in use or not. 1025 */ 1026 Static uint16_t 1027 ural_txtime(int len, int rate, uint32_t flags) 1028 { 1029 uint16_t txtime; 1030 1031 if (RAL_RATE_IS_OFDM(rate)) { 1032 /* IEEE Std 802.11g-2003, pp. 37 */ 1033 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1034 txtime = 16 + 4 + 4 * txtime + 6; 1035 } else { 1036 /* IEEE Std 802.11b-1999, pp. 28 */ 1037 txtime = (16 * len + rate - 1) / rate; 1038 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1039 txtime += 72 + 24; 1040 else 1041 txtime += 144 + 48; 1042 } 1043 return txtime; 1044 } 1045 1046 Static uint8_t 1047 ural_plcp_signal(int rate) 1048 { 1049 switch (rate) { 1050 /* CCK rates (returned values are device-dependent) */ 1051 case 2: return 0x0; 1052 case 4: return 0x1; 1053 case 11: return 0x2; 1054 case 22: return 0x3; 1055 1056 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1057 case 12: return 0xb; 1058 case 18: return 0xf; 1059 case 24: return 0xa; 1060 case 36: return 0xe; 1061 case 48: return 0x9; 1062 case 72: return 0xd; 1063 case 96: return 0x8; 1064 case 108: return 0xc; 1065 1066 /* unsupported rates (should not get there) */ 1067 default: return 0xff; 1068 } 1069 } 1070 1071 Static void 1072 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1073 uint32_t flags, int len, int rate) 1074 { 1075 struct ieee80211com *ic = &sc->sc_ic; 1076 uint16_t plcp_length; 1077 int remainder; 1078 1079 desc->flags = htole32(flags); 1080 desc->flags |= htole32(RAL_TX_NEWSEQ); 1081 desc->flags |= htole32(len << 16); 1082 1083 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1084 desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); 1085 1086 /* setup PLCP fields */ 1087 desc->plcp_signal = ural_plcp_signal(rate); 1088 desc->plcp_service = 4; 1089 1090 len += IEEE80211_CRC_LEN; 1091 if (RAL_RATE_IS_OFDM(rate)) { 1092 desc->flags |= htole32(RAL_TX_OFDM); 1093 1094 plcp_length = len & 0xfff; 1095 desc->plcp_length_hi = plcp_length >> 6; 1096 desc->plcp_length_lo = plcp_length & 0x3f; 1097 } else { 1098 plcp_length = (16 * len + rate - 1) / rate; 1099 if (rate == 22) { 1100 remainder = (16 * len) % 22; 1101 if (remainder != 0 && remainder < 7) 1102 desc->plcp_service |= RAL_PLCP_LENGEXT; 1103 } 1104 desc->plcp_length_hi = plcp_length >> 8; 1105 desc->plcp_length_lo = plcp_length & 0xff; 1106 1107 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1108 desc->plcp_signal |= 0x08; 1109 } 1110 1111 desc->iv = 0; 1112 desc->eiv = 0; 1113 } 1114 1115 #define RAL_TX_TIMEOUT 5000 1116 1117 Static int 1118 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1119 { 1120 struct ural_tx_desc *desc; 1121 struct usbd_xfer *xfer; 1122 uint8_t cmd = 0; 1123 usbd_status error; 1124 uint8_t *buf; 1125 int xferlen, rate; 1126 1127 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1128 1129 /* xfer length needs to be a multiple of two! */ 1130 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1131 1132 error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, 1133 USBD_FORCE_SHORT_XFER, 0, &xfer); 1134 if (error) 1135 return error; 1136 1137 buf = usbd_get_buffer(xfer); 1138 1139 usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, 1140 RAL_TX_TIMEOUT, NULL); 1141 1142 error = usbd_sync_transfer(xfer); 1143 if (error != 0) { 1144 usbd_destroy_xfer(xfer); 1145 return error; 1146 } 1147 1148 desc = (struct ural_tx_desc *)buf; 1149 1150 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1151 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1152 m0->m_pkthdr.len, rate); 1153 1154 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1155 m0->m_pkthdr.len, rate, xferlen)); 1156 1157 usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, 1158 RAL_TX_TIMEOUT, NULL); 1159 1160 error = usbd_sync_transfer(xfer); 1161 usbd_destroy_xfer(xfer); 1162 1163 return error; 1164 } 1165 1166 Static int 1167 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1168 { 1169 struct ieee80211com *ic = &sc->sc_ic; 1170 struct ural_tx_desc *desc; 1171 struct ural_tx_data *data; 1172 struct ieee80211_frame *wh; 1173 struct ieee80211_key *k; 1174 uint32_t flags = 0; 1175 uint16_t dur; 1176 usbd_status error; 1177 int xferlen, rate; 1178 1179 data = &sc->tx_data[0]; 1180 desc = (struct ural_tx_desc *)data->buf; 1181 1182 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1183 1184 wh = mtod(m0, struct ieee80211_frame *); 1185 1186 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1187 k = ieee80211_crypto_encap(ic, ni, m0); 1188 if (k == NULL) { 1189 m_freem(m0); 1190 return ENOBUFS; 1191 } 1192 } 1193 1194 data->m = m0; 1195 data->ni = ni; 1196 1197 wh = mtod(m0, struct ieee80211_frame *); 1198 1199 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1200 flags |= RAL_TX_ACK; 1201 1202 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1203 *(uint16_t *)wh->i_dur = htole16(dur); 1204 1205 /* tell hardware to add timestamp for probe responses */ 1206 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1207 IEEE80211_FC0_TYPE_MGT && 1208 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1209 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1210 flags |= RAL_TX_TIMESTAMP; 1211 } 1212 1213 if (sc->sc_drvbpf != NULL) { 1214 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1215 1216 tap->wt_flags = 0; 1217 tap->wt_rate = rate; 1218 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1219 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1220 tap->wt_antenna = sc->tx_ant; 1221 1222 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1223 } 1224 1225 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1226 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1227 1228 /* align end on a 2-bytes boundary */ 1229 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1230 1231 /* 1232 * No space left in the last URB to store the extra 2 bytes, force 1233 * sending of another URB. 1234 */ 1235 if ((xferlen % 64) == 0) 1236 xferlen += 2; 1237 1238 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1239 m0->m_pkthdr.len, rate, xferlen)); 1240 1241 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1242 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1243 1244 error = usbd_transfer(data->xfer); 1245 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1246 m_freem(m0); 1247 return error; 1248 } 1249 1250 sc->tx_queued++; 1251 1252 return 0; 1253 } 1254 1255 Static int 1256 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1257 { 1258 struct ieee80211com *ic = &sc->sc_ic; 1259 struct ural_tx_desc *desc; 1260 struct ural_tx_data *data; 1261 struct ieee80211_frame *wh; 1262 struct ieee80211_key *k; 1263 uint32_t flags = 0; 1264 uint16_t dur; 1265 usbd_status error; 1266 int xferlen, rate; 1267 1268 wh = mtod(m0, struct ieee80211_frame *); 1269 1270 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1271 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1272 else 1273 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1274 1275 rate &= IEEE80211_RATE_VAL; 1276 1277 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1278 k = ieee80211_crypto_encap(ic, ni, m0); 1279 if (k == NULL) { 1280 m_freem(m0); 1281 return ENOBUFS; 1282 } 1283 1284 /* packet header may have moved, reset our local pointer */ 1285 wh = mtod(m0, struct ieee80211_frame *); 1286 } 1287 1288 data = &sc->tx_data[0]; 1289 desc = (struct ural_tx_desc *)data->buf; 1290 1291 data->m = m0; 1292 data->ni = ni; 1293 1294 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1295 flags |= RAL_TX_ACK; 1296 flags |= RAL_TX_RETRY(7); 1297 1298 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1299 ic->ic_flags) + RAL_SIFS; 1300 *(uint16_t *)wh->i_dur = htole16(dur); 1301 } 1302 1303 if (sc->sc_drvbpf != NULL) { 1304 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1305 1306 tap->wt_flags = 0; 1307 tap->wt_rate = rate; 1308 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1309 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1310 tap->wt_antenna = sc->tx_ant; 1311 1312 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1313 } 1314 1315 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1316 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1317 1318 /* align end on a 2-bytes boundary */ 1319 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1320 1321 /* 1322 * No space left in the last URB to store the extra 2 bytes, force 1323 * sending of another URB. 1324 */ 1325 if ((xferlen % 64) == 0) 1326 xferlen += 2; 1327 1328 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1329 m0->m_pkthdr.len, rate, xferlen)); 1330 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1331 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1332 1333 error = usbd_transfer(data->xfer); 1334 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1335 return error; 1336 1337 sc->tx_queued++; 1338 1339 return 0; 1340 } 1341 1342 Static void 1343 ural_start(struct ifnet *ifp) 1344 { 1345 struct ural_softc *sc = ifp->if_softc; 1346 struct ieee80211com *ic = &sc->sc_ic; 1347 struct mbuf *m0; 1348 struct ether_header *eh; 1349 struct ieee80211_node *ni; 1350 1351 for (;;) { 1352 IF_POLL(&ic->ic_mgtq, m0); 1353 if (m0 != NULL) { 1354 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1355 ifp->if_flags |= IFF_OACTIVE; 1356 break; 1357 } 1358 IF_DEQUEUE(&ic->ic_mgtq, m0); 1359 1360 ni = M_GETCTX(m0, struct ieee80211_node *); 1361 M_CLEARCTX(m0); 1362 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1363 if (ural_tx_mgt(sc, m0, ni) != 0) 1364 break; 1365 1366 } else { 1367 if (ic->ic_state != IEEE80211_S_RUN) 1368 break; 1369 IFQ_DEQUEUE(&ifp->if_snd, m0); 1370 if (m0 == NULL) 1371 break; 1372 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1373 IF_PREPEND(&ifp->if_snd, m0); 1374 ifp->if_flags |= IFF_OACTIVE; 1375 break; 1376 } 1377 1378 if (m0->m_len < sizeof(struct ether_header) && 1379 !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1380 continue; 1381 1382 eh = mtod(m0, struct ether_header *); 1383 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1384 if (ni == NULL) { 1385 m_freem(m0); 1386 continue; 1387 } 1388 bpf_mtap(ifp, m0, BPF_D_OUT); 1389 m0 = ieee80211_encap(ic, m0, ni); 1390 if (m0 == NULL) { 1391 ieee80211_free_node(ni); 1392 continue; 1393 } 1394 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1395 if (ural_tx_data(sc, m0, ni) != 0) { 1396 ieee80211_free_node(ni); 1397 ifp->if_oerrors++; 1398 break; 1399 } 1400 } 1401 1402 sc->sc_tx_timer = 5; 1403 ifp->if_timer = 1; 1404 } 1405 } 1406 1407 Static void 1408 ural_watchdog(struct ifnet *ifp) 1409 { 1410 struct ural_softc *sc = ifp->if_softc; 1411 struct ieee80211com *ic = &sc->sc_ic; 1412 1413 ifp->if_timer = 0; 1414 1415 if (sc->sc_tx_timer > 0) { 1416 if (--sc->sc_tx_timer == 0) { 1417 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1418 /*ural_init(sc); XXX needs a process context! */ 1419 ifp->if_oerrors++; 1420 return; 1421 } 1422 ifp->if_timer = 1; 1423 } 1424 1425 ieee80211_watchdog(ic); 1426 } 1427 1428 /* 1429 * This function allows for fast channel switching in monitor mode (used by 1430 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1431 * generate a new beacon frame. 1432 */ 1433 Static int 1434 ural_reset(struct ifnet *ifp) 1435 { 1436 struct ural_softc *sc = ifp->if_softc; 1437 struct ieee80211com *ic = &sc->sc_ic; 1438 1439 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1440 return ENETRESET; 1441 1442 ural_set_chan(sc, ic->ic_curchan); 1443 1444 return 0; 1445 } 1446 1447 Static int 1448 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1449 { 1450 #define IS_RUNNING(ifp) \ 1451 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1452 1453 struct ural_softc *sc = ifp->if_softc; 1454 struct ieee80211com *ic = &sc->sc_ic; 1455 int s, error = 0; 1456 1457 s = splnet(); 1458 1459 switch (cmd) { 1460 case SIOCSIFFLAGS: 1461 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1462 break; 1463 /* XXX re-use ether_ioctl() */ 1464 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1465 case IFF_UP|IFF_RUNNING: 1466 ural_update_promisc(sc); 1467 break; 1468 case IFF_UP: 1469 ural_init(ifp); 1470 break; 1471 case IFF_RUNNING: 1472 ural_stop(ifp, 1); 1473 break; 1474 case 0: 1475 break; 1476 } 1477 break; 1478 1479 case SIOCADDMULTI: 1480 case SIOCDELMULTI: 1481 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1482 error = 0; 1483 } 1484 break; 1485 1486 default: 1487 error = ieee80211_ioctl(ic, cmd, data); 1488 } 1489 1490 if (error == ENETRESET) { 1491 if (IS_RUNNING(ifp) && 1492 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1493 ural_init(ifp); 1494 error = 0; 1495 } 1496 1497 splx(s); 1498 1499 return error; 1500 #undef IS_RUNNING 1501 } 1502 1503 Static void 1504 ural_set_testmode(struct ural_softc *sc) 1505 { 1506 usb_device_request_t req; 1507 usbd_status error; 1508 1509 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1510 req.bRequest = RAL_VENDOR_REQUEST; 1511 USETW(req.wValue, 4); 1512 USETW(req.wIndex, 1); 1513 USETW(req.wLength, 0); 1514 1515 error = usbd_do_request(sc->sc_udev, &req, NULL); 1516 if (error != 0) { 1517 printf("%s: could not set test mode: %s\n", 1518 device_xname(sc->sc_dev), usbd_errstr(error)); 1519 } 1520 } 1521 1522 Static void 1523 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1524 { 1525 usb_device_request_t req; 1526 usbd_status error; 1527 1528 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1529 req.bRequest = RAL_READ_EEPROM; 1530 USETW(req.wValue, 0); 1531 USETW(req.wIndex, addr); 1532 USETW(req.wLength, len); 1533 1534 error = usbd_do_request(sc->sc_udev, &req, buf); 1535 if (error != 0) { 1536 printf("%s: could not read EEPROM: %s\n", 1537 device_xname(sc->sc_dev), usbd_errstr(error)); 1538 } 1539 } 1540 1541 Static uint16_t 1542 ural_read(struct ural_softc *sc, uint16_t reg) 1543 { 1544 usb_device_request_t req; 1545 usbd_status error; 1546 uint16_t val; 1547 1548 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1549 req.bRequest = RAL_READ_MAC; 1550 USETW(req.wValue, 0); 1551 USETW(req.wIndex, reg); 1552 USETW(req.wLength, sizeof(uint16_t)); 1553 1554 error = usbd_do_request(sc->sc_udev, &req, &val); 1555 if (error != 0) { 1556 printf("%s: could not read MAC register: %s\n", 1557 device_xname(sc->sc_dev), usbd_errstr(error)); 1558 return 0; 1559 } 1560 1561 return le16toh(val); 1562 } 1563 1564 Static void 1565 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1566 { 1567 usb_device_request_t req; 1568 usbd_status error; 1569 1570 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1571 req.bRequest = RAL_READ_MULTI_MAC; 1572 USETW(req.wValue, 0); 1573 USETW(req.wIndex, reg); 1574 USETW(req.wLength, len); 1575 1576 error = usbd_do_request(sc->sc_udev, &req, buf); 1577 if (error != 0) { 1578 printf("%s: could not read MAC register: %s\n", 1579 device_xname(sc->sc_dev), usbd_errstr(error)); 1580 } 1581 } 1582 1583 Static void 1584 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1585 { 1586 usb_device_request_t req; 1587 usbd_status error; 1588 1589 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1590 req.bRequest = RAL_WRITE_MAC; 1591 USETW(req.wValue, val); 1592 USETW(req.wIndex, reg); 1593 USETW(req.wLength, 0); 1594 1595 error = usbd_do_request(sc->sc_udev, &req, NULL); 1596 if (error != 0) { 1597 printf("%s: could not write MAC register: %s\n", 1598 device_xname(sc->sc_dev), usbd_errstr(error)); 1599 } 1600 } 1601 1602 Static void 1603 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1604 { 1605 usb_device_request_t req; 1606 usbd_status error; 1607 1608 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1609 req.bRequest = RAL_WRITE_MULTI_MAC; 1610 USETW(req.wValue, 0); 1611 USETW(req.wIndex, reg); 1612 USETW(req.wLength, len); 1613 1614 error = usbd_do_request(sc->sc_udev, &req, buf); 1615 if (error != 0) { 1616 printf("%s: could not write MAC register: %s\n", 1617 device_xname(sc->sc_dev), usbd_errstr(error)); 1618 } 1619 } 1620 1621 Static void 1622 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1623 { 1624 uint16_t tmp; 1625 int ntries; 1626 1627 for (ntries = 0; ntries < 5; ntries++) { 1628 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1629 break; 1630 } 1631 if (ntries == 5) { 1632 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1633 return; 1634 } 1635 1636 tmp = reg << 8 | val; 1637 ural_write(sc, RAL_PHY_CSR7, tmp); 1638 } 1639 1640 Static uint8_t 1641 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1642 { 1643 uint16_t val; 1644 int ntries; 1645 1646 val = RAL_BBP_WRITE | reg << 8; 1647 ural_write(sc, RAL_PHY_CSR7, val); 1648 1649 for (ntries = 0; ntries < 5; ntries++) { 1650 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1651 break; 1652 } 1653 if (ntries == 5) { 1654 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1655 return 0; 1656 } 1657 1658 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1659 } 1660 1661 Static void 1662 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1663 { 1664 uint32_t tmp; 1665 int ntries; 1666 1667 for (ntries = 0; ntries < 5; ntries++) { 1668 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1669 break; 1670 } 1671 if (ntries == 5) { 1672 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1673 return; 1674 } 1675 1676 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1677 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1678 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1679 1680 /* remember last written value in sc */ 1681 sc->rf_regs[reg] = val; 1682 1683 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1684 } 1685 1686 Static void 1687 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1688 { 1689 struct ieee80211com *ic = &sc->sc_ic; 1690 uint8_t power, tmp; 1691 u_int i, chan; 1692 1693 chan = ieee80211_chan2ieee(ic, c); 1694 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1695 return; 1696 1697 if (IEEE80211_IS_CHAN_2GHZ(c)) 1698 power = min(sc->txpow[chan - 1], 31); 1699 else 1700 power = 31; 1701 1702 /* adjust txpower using ifconfig settings */ 1703 power -= (100 - ic->ic_txpowlimit) / 8; 1704 1705 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1706 1707 switch (sc->rf_rev) { 1708 case RAL_RF_2522: 1709 ural_rf_write(sc, RAL_RF1, 0x00814); 1710 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1711 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1712 break; 1713 1714 case RAL_RF_2523: 1715 ural_rf_write(sc, RAL_RF1, 0x08804); 1716 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1717 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1718 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1719 break; 1720 1721 case RAL_RF_2524: 1722 ural_rf_write(sc, RAL_RF1, 0x0c808); 1723 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1724 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1725 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1726 break; 1727 1728 case RAL_RF_2525: 1729 ural_rf_write(sc, RAL_RF1, 0x08808); 1730 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1731 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1732 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1733 1734 ural_rf_write(sc, RAL_RF1, 0x08808); 1735 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1736 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1737 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1738 break; 1739 1740 case RAL_RF_2525E: 1741 ural_rf_write(sc, RAL_RF1, 0x08808); 1742 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1743 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1744 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1745 break; 1746 1747 case RAL_RF_2526: 1748 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1749 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1750 ural_rf_write(sc, RAL_RF1, 0x08804); 1751 1752 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1753 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1754 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1755 break; 1756 1757 /* dual-band RF */ 1758 case RAL_RF_5222: 1759 for (i = 0; ural_rf5222[i].chan != chan; i++); 1760 1761 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1762 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1763 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1764 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1765 break; 1766 } 1767 1768 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1769 ic->ic_state != IEEE80211_S_SCAN) { 1770 /* set Japan filter bit for channel 14 */ 1771 tmp = ural_bbp_read(sc, 70); 1772 1773 tmp &= ~RAL_JAPAN_FILTER; 1774 if (chan == 14) 1775 tmp |= RAL_JAPAN_FILTER; 1776 1777 ural_bbp_write(sc, 70, tmp); 1778 1779 /* clear CRC errors */ 1780 ural_read(sc, RAL_STA_CSR0); 1781 1782 DELAY(10000); 1783 ural_disable_rf_tune(sc); 1784 } 1785 } 1786 1787 /* 1788 * Disable RF auto-tuning. 1789 */ 1790 Static void 1791 ural_disable_rf_tune(struct ural_softc *sc) 1792 { 1793 uint32_t tmp; 1794 1795 if (sc->rf_rev != RAL_RF_2523) { 1796 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1797 ural_rf_write(sc, RAL_RF1, tmp); 1798 } 1799 1800 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1801 ural_rf_write(sc, RAL_RF3, tmp); 1802 1803 DPRINTFN(2, ("disabling RF autotune\n")); 1804 } 1805 1806 /* 1807 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1808 * synchronization. 1809 */ 1810 Static void 1811 ural_enable_tsf_sync(struct ural_softc *sc) 1812 { 1813 struct ieee80211com *ic = &sc->sc_ic; 1814 uint16_t logcwmin, preload, tmp; 1815 1816 /* first, disable TSF synchronization */ 1817 ural_write(sc, RAL_TXRX_CSR19, 0); 1818 1819 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1820 ural_write(sc, RAL_TXRX_CSR18, tmp); 1821 1822 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1823 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1824 tmp = logcwmin << 12 | preload; 1825 ural_write(sc, RAL_TXRX_CSR20, tmp); 1826 1827 /* finally, enable TSF synchronization */ 1828 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1829 if (ic->ic_opmode == IEEE80211_M_STA) 1830 tmp |= RAL_ENABLE_TSF_SYNC(1); 1831 else 1832 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1833 ural_write(sc, RAL_TXRX_CSR19, tmp); 1834 1835 DPRINTF(("enabling TSF synchronization\n")); 1836 } 1837 1838 Static void 1839 ural_update_slot(struct ifnet *ifp) 1840 { 1841 struct ural_softc *sc = ifp->if_softc; 1842 struct ieee80211com *ic = &sc->sc_ic; 1843 uint16_t slottime, sifs, eifs; 1844 1845 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1846 1847 /* 1848 * These settings may sound a bit inconsistent but this is what the 1849 * reference driver does. 1850 */ 1851 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1852 sifs = 16 - RAL_RXTX_TURNAROUND; 1853 eifs = 364; 1854 } else { 1855 sifs = 10 - RAL_RXTX_TURNAROUND; 1856 eifs = 64; 1857 } 1858 1859 ural_write(sc, RAL_MAC_CSR10, slottime); 1860 ural_write(sc, RAL_MAC_CSR11, sifs); 1861 ural_write(sc, RAL_MAC_CSR12, eifs); 1862 } 1863 1864 Static void 1865 ural_set_txpreamble(struct ural_softc *sc) 1866 { 1867 uint16_t tmp; 1868 1869 tmp = ural_read(sc, RAL_TXRX_CSR10); 1870 1871 tmp &= ~RAL_SHORT_PREAMBLE; 1872 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1873 tmp |= RAL_SHORT_PREAMBLE; 1874 1875 ural_write(sc, RAL_TXRX_CSR10, tmp); 1876 } 1877 1878 Static void 1879 ural_set_basicrates(struct ural_softc *sc) 1880 { 1881 struct ieee80211com *ic = &sc->sc_ic; 1882 1883 /* update basic rate set */ 1884 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1885 /* 11b basic rates: 1, 2Mbps */ 1886 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1887 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1888 /* 11a basic rates: 6, 12, 24Mbps */ 1889 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1890 } else { 1891 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1892 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1893 } 1894 } 1895 1896 Static void 1897 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1898 { 1899 uint16_t tmp; 1900 1901 tmp = bssid[0] | bssid[1] << 8; 1902 ural_write(sc, RAL_MAC_CSR5, tmp); 1903 1904 tmp = bssid[2] | bssid[3] << 8; 1905 ural_write(sc, RAL_MAC_CSR6, tmp); 1906 1907 tmp = bssid[4] | bssid[5] << 8; 1908 ural_write(sc, RAL_MAC_CSR7, tmp); 1909 1910 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1911 } 1912 1913 Static void 1914 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1915 { 1916 uint16_t tmp; 1917 1918 tmp = addr[0] | addr[1] << 8; 1919 ural_write(sc, RAL_MAC_CSR2, tmp); 1920 1921 tmp = addr[2] | addr[3] << 8; 1922 ural_write(sc, RAL_MAC_CSR3, tmp); 1923 1924 tmp = addr[4] | addr[5] << 8; 1925 ural_write(sc, RAL_MAC_CSR4, tmp); 1926 1927 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1928 } 1929 1930 Static void 1931 ural_update_promisc(struct ural_softc *sc) 1932 { 1933 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1934 uint32_t tmp; 1935 1936 tmp = ural_read(sc, RAL_TXRX_CSR2); 1937 1938 tmp &= ~RAL_DROP_NOT_TO_ME; 1939 if (!(ifp->if_flags & IFF_PROMISC)) 1940 tmp |= RAL_DROP_NOT_TO_ME; 1941 1942 ural_write(sc, RAL_TXRX_CSR2, tmp); 1943 1944 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1945 "entering" : "leaving")); 1946 } 1947 1948 Static const char * 1949 ural_get_rf(int rev) 1950 { 1951 switch (rev) { 1952 case RAL_RF_2522: return "RT2522"; 1953 case RAL_RF_2523: return "RT2523"; 1954 case RAL_RF_2524: return "RT2524"; 1955 case RAL_RF_2525: return "RT2525"; 1956 case RAL_RF_2525E: return "RT2525e"; 1957 case RAL_RF_2526: return "RT2526"; 1958 case RAL_RF_5222: return "RT5222"; 1959 default: return "unknown"; 1960 } 1961 } 1962 1963 Static void 1964 ural_read_eeprom(struct ural_softc *sc) 1965 { 1966 struct ieee80211com *ic = &sc->sc_ic; 1967 uint16_t val; 1968 1969 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1970 val = le16toh(val); 1971 sc->rf_rev = (val >> 11) & 0x7; 1972 sc->hw_radio = (val >> 10) & 0x1; 1973 sc->led_mode = (val >> 6) & 0x7; 1974 sc->rx_ant = (val >> 4) & 0x3; 1975 sc->tx_ant = (val >> 2) & 0x3; 1976 sc->nb_ant = val & 0x3; 1977 1978 /* read MAC address */ 1979 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1980 1981 /* read default values for BBP registers */ 1982 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1983 1984 /* read Tx power for all b/g channels */ 1985 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1986 } 1987 1988 Static int 1989 ural_bbp_init(struct ural_softc *sc) 1990 { 1991 int i, ntries; 1992 1993 /* wait for BBP to be ready */ 1994 for (ntries = 0; ntries < 100; ntries++) { 1995 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 1996 break; 1997 DELAY(1000); 1998 } 1999 if (ntries == 100) { 2000 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2001 return EIO; 2002 } 2003 2004 /* initialize BBP registers to default values */ 2005 for (i = 0; i < __arraycount(ural_def_bbp); i++) 2006 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2007 2008 #if 0 2009 /* initialize BBP registers to values stored in EEPROM */ 2010 for (i = 0; i < 16; i++) { 2011 if (sc->bbp_prom[i].reg == 0xff) 2012 continue; 2013 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2014 } 2015 #endif 2016 2017 return 0; 2018 } 2019 2020 Static void 2021 ural_set_txantenna(struct ural_softc *sc, int antenna) 2022 { 2023 uint16_t tmp; 2024 uint8_t tx; 2025 2026 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2027 if (antenna == 1) 2028 tx |= RAL_BBP_ANTA; 2029 else if (antenna == 2) 2030 tx |= RAL_BBP_ANTB; 2031 else 2032 tx |= RAL_BBP_DIVERSITY; 2033 2034 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2035 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2036 sc->rf_rev == RAL_RF_5222) 2037 tx |= RAL_BBP_FLIPIQ; 2038 2039 ural_bbp_write(sc, RAL_BBP_TX, tx); 2040 2041 /* update values in PHY_CSR5 and PHY_CSR6 */ 2042 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2043 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2044 2045 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2046 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2047 } 2048 2049 Static void 2050 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2051 { 2052 uint8_t rx; 2053 2054 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2055 if (antenna == 1) 2056 rx |= RAL_BBP_ANTA; 2057 else if (antenna == 2) 2058 rx |= RAL_BBP_ANTB; 2059 else 2060 rx |= RAL_BBP_DIVERSITY; 2061 2062 /* need to force no I/Q flip for RF 2525e and 2526 */ 2063 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2064 rx &= ~RAL_BBP_FLIPIQ; 2065 2066 ural_bbp_write(sc, RAL_BBP_RX, rx); 2067 } 2068 2069 Static int 2070 ural_init(struct ifnet *ifp) 2071 { 2072 struct ural_softc *sc = ifp->if_softc; 2073 struct ieee80211com *ic = &sc->sc_ic; 2074 struct ieee80211_key *wk; 2075 uint16_t tmp; 2076 usbd_status error; 2077 int i, ntries; 2078 2079 ural_set_testmode(sc); 2080 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2081 2082 ural_stop(ifp, 0); 2083 2084 /* initialize MAC registers to default values */ 2085 for (i = 0; i < __arraycount(ural_def_mac); i++) 2086 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2087 2088 /* wait for BBP and RF to wake up (this can take a long time!) */ 2089 for (ntries = 0; ntries < 100; ntries++) { 2090 tmp = ural_read(sc, RAL_MAC_CSR17); 2091 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2092 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2093 break; 2094 DELAY(1000); 2095 } 2096 if (ntries == 100) { 2097 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2098 device_xname(sc->sc_dev)); 2099 error = EIO; 2100 goto fail; 2101 } 2102 2103 /* we're ready! */ 2104 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2105 2106 /* set basic rate set (will be updated later) */ 2107 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2108 2109 error = ural_bbp_init(sc); 2110 if (error != 0) 2111 goto fail; 2112 2113 /* set default BSS channel */ 2114 ural_set_chan(sc, ic->ic_curchan); 2115 2116 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2117 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2118 2119 ural_set_txantenna(sc, sc->tx_ant); 2120 ural_set_rxantenna(sc, sc->rx_ant); 2121 2122 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2123 ural_set_macaddr(sc, ic->ic_myaddr); 2124 2125 /* 2126 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2127 */ 2128 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2129 wk = &ic->ic_crypto.cs_nw_keys[i]; 2130 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2131 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2132 } 2133 2134 /* 2135 * Allocate xfer for AMRR statistics requests. 2136 */ 2137 struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); 2138 error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); 2139 if (error) { 2140 printf("%s: could not allocate AMRR xfer\n", 2141 device_xname(sc->sc_dev)); 2142 goto fail; 2143 } 2144 2145 /* 2146 * Open Tx and Rx USB bulk pipes. 2147 */ 2148 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2149 &sc->sc_tx_pipeh); 2150 if (error != 0) { 2151 printf("%s: could not open Tx pipe: %s\n", 2152 device_xname(sc->sc_dev), usbd_errstr(error)); 2153 goto fail; 2154 } 2155 2156 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2157 &sc->sc_rx_pipeh); 2158 if (error != 0) { 2159 printf("%s: could not open Rx pipe: %s\n", 2160 device_xname(sc->sc_dev), usbd_errstr(error)); 2161 goto fail; 2162 } 2163 2164 /* 2165 * Allocate Tx and Rx xfer queues. 2166 */ 2167 error = ural_alloc_tx_list(sc); 2168 if (error != 0) { 2169 printf("%s: could not allocate Tx list\n", 2170 device_xname(sc->sc_dev)); 2171 goto fail; 2172 } 2173 2174 error = ural_alloc_rx_list(sc); 2175 if (error != 0) { 2176 printf("%s: could not allocate Rx list\n", 2177 device_xname(sc->sc_dev)); 2178 goto fail; 2179 } 2180 2181 /* 2182 * Start up the receive pipe. 2183 */ 2184 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2185 struct ural_rx_data *data = &sc->rx_data[i]; 2186 2187 usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, 2188 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2189 usbd_transfer(data->xfer); 2190 } 2191 2192 /* kick Rx */ 2193 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2194 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2195 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2196 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2197 tmp |= RAL_DROP_TODS; 2198 if (!(ifp->if_flags & IFF_PROMISC)) 2199 tmp |= RAL_DROP_NOT_TO_ME; 2200 } 2201 ural_write(sc, RAL_TXRX_CSR2, tmp); 2202 2203 ifp->if_flags &= ~IFF_OACTIVE; 2204 ifp->if_flags |= IFF_RUNNING; 2205 2206 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2207 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2208 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2209 } else 2210 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2211 2212 return 0; 2213 2214 fail: ural_stop(ifp, 1); 2215 return error; 2216 } 2217 2218 Static void 2219 ural_stop(struct ifnet *ifp, int disable) 2220 { 2221 struct ural_softc *sc = ifp->if_softc; 2222 struct ieee80211com *ic = &sc->sc_ic; 2223 2224 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2225 2226 sc->sc_tx_timer = 0; 2227 ifp->if_timer = 0; 2228 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2229 2230 /* disable Rx */ 2231 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2232 2233 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2234 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2235 ural_write(sc, RAL_MAC_CSR1, 0); 2236 2237 if (sc->amrr_xfer != NULL) { 2238 usbd_destroy_xfer(sc->amrr_xfer); 2239 sc->amrr_xfer = NULL; 2240 } 2241 2242 if (sc->sc_rx_pipeh != NULL) { 2243 usbd_abort_pipe(sc->sc_rx_pipeh); 2244 } 2245 2246 if (sc->sc_tx_pipeh != NULL) { 2247 usbd_abort_pipe(sc->sc_tx_pipeh); 2248 } 2249 2250 ural_free_rx_list(sc); 2251 ural_free_tx_list(sc); 2252 2253 if (sc->sc_rx_pipeh != NULL) { 2254 usbd_close_pipe(sc->sc_rx_pipeh); 2255 sc->sc_rx_pipeh = NULL; 2256 } 2257 2258 if (sc->sc_tx_pipeh != NULL) { 2259 usbd_close_pipe(sc->sc_tx_pipeh); 2260 sc->sc_tx_pipeh = NULL; 2261 } 2262 } 2263 2264 int 2265 ural_activate(device_t self, enum devact act) 2266 { 2267 struct ural_softc *sc = device_private(self); 2268 2269 switch (act) { 2270 case DVACT_DEACTIVATE: 2271 if_deactivate(&sc->sc_if); 2272 return 0; 2273 default: 2274 return EOPNOTSUPP; 2275 } 2276 } 2277 2278 Static void 2279 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2280 { 2281 int i; 2282 2283 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2284 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2285 2286 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2287 2288 /* set rate to some reasonable initial value */ 2289 for (i = ni->ni_rates.rs_nrates - 1; 2290 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2291 i--); 2292 ni->ni_txrate = i; 2293 2294 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2295 } 2296 2297 Static void 2298 ural_amrr_timeout(void *arg) 2299 { 2300 struct ural_softc *sc = (struct ural_softc *)arg; 2301 usb_device_request_t req; 2302 int s; 2303 2304 s = splusb(); 2305 2306 /* 2307 * Asynchronously read statistic registers (cleared by read). 2308 */ 2309 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2310 req.bRequest = RAL_READ_MULTI_MAC; 2311 USETW(req.wValue, 0); 2312 USETW(req.wIndex, RAL_STA_CSR0); 2313 USETW(req.wLength, sizeof(sc->sta)); 2314 2315 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2316 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, 2317 ural_amrr_update); 2318 (void)usbd_transfer(sc->amrr_xfer); 2319 2320 splx(s); 2321 } 2322 2323 Static void 2324 ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2325 usbd_status status) 2326 { 2327 struct ural_softc *sc = (struct ural_softc *)priv; 2328 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2329 2330 if (status != USBD_NORMAL_COMPLETION) { 2331 printf("%s: could not retrieve Tx statistics - " 2332 "cancelling automatic rate control\n", 2333 device_xname(sc->sc_dev)); 2334 return; 2335 } 2336 2337 /* count TX retry-fail as Tx errors */ 2338 ifp->if_oerrors += sc->sta[9]; 2339 2340 sc->amn.amn_retrycnt = 2341 sc->sta[7] + /* TX one-retry ok count */ 2342 sc->sta[8] + /* TX more-retry ok count */ 2343 sc->sta[9]; /* TX retry-fail count */ 2344 2345 sc->amn.amn_txcnt = 2346 sc->amn.amn_retrycnt + 2347 sc->sta[6]; /* TX no-retry ok count */ 2348 2349 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2350 2351 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2352 } 2353
Indexes created Mon Sep 29 21:09:56 GMT 2025