if_ural.c revision 1.60
1 /* $NetBSD: if_ural.c,v 1.60 2019/09/14 12:42:36 maxv Exp $ */ 2 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/usb/if_ural.c,v 1.40 2006/06/02 23:14:40 sam Exp $ */ 3 4 /*- 5 * Copyright (c) 2005, 2006 6 * Damien Bergamini <damien.bergamini (at) free.fr> 7 * 8 * Permission to use, copy, modify, and distribute this software for any 9 * purpose with or without fee is hereby granted, provided that the above 10 * copyright notice and this permission notice appear in all copies. 11 * 12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 19 */ 20 21 /*- 22 * Ralink Technology RT2500USB chipset driver 23 * http://www.ralinktech.com/ 24 */ 25 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.60 2019/09/14 12:42:36 maxv Exp $"); 28 29 #ifdef _KERNEL_OPT 30 #include "opt_usb.h" 31 #endif 32 33 #include <sys/param.h> 34 #include <sys/sockio.h> 35 #include <sys/sysctl.h> 36 #include <sys/mbuf.h> 37 #include <sys/kernel.h> 38 #include <sys/socket.h> 39 #include <sys/systm.h> 40 #include <sys/conf.h> 41 #include <sys/device.h> 42 43 #include <sys/bus.h> 44 #include <machine/endian.h> 45 #include <sys/intr.h> 46 47 #include <net/bpf.h> 48 #include <net/if.h> 49 #include <net/if_arp.h> 50 #include <net/if_dl.h> 51 #include <net/if_ether.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 55 #include <netinet/in.h> 56 #include <netinet/in_systm.h> 57 #include <netinet/in_var.h> 58 #include <netinet/ip.h> 59 60 #include <net80211/ieee80211_netbsd.h> 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_amrr.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/usb/usb.h> 66 #include <dev/usb/usbdi.h> 67 #include <dev/usb/usbdi_util.h> 68 #include <dev/usb/usbdevs.h> 69 70 #include <dev/usb/if_uralreg.h> 71 #include <dev/usb/if_uralvar.h> 72 73 #ifdef URAL_DEBUG 74 #define DPRINTF(x) do { if (ural_debug) printf x; } while (0) 75 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) printf x; } while (0) 76 int ural_debug = 0; 77 #else 78 #define DPRINTF(x) 79 #define DPRINTFN(n, x) 80 #endif 81 82 /* various supported device vendors/products */ 83 static const struct usb_devno ural_devs[] = { 84 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 85 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 86 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 87 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 88 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 89 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_HU200TS }, 90 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 91 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 92 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 93 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 94 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 95 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 96 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 97 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_NINWIFI }, 98 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 99 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 100 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 101 { USB_VENDOR_NOVATECH, USB_PRODUCT_NOVATECH_NV902W }, 102 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 103 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 105 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 106 { USB_VENDOR_SPHAIRON, USB_PRODUCT_SPHAIRON_UB801R }, 107 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 108 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 109 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 110 }; 111 112 Static int ural_alloc_tx_list(struct ural_softc *); 113 Static void ural_free_tx_list(struct ural_softc *); 114 Static int ural_alloc_rx_list(struct ural_softc *); 115 Static void ural_free_rx_list(struct ural_softc *); 116 Static int ural_media_change(struct ifnet *); 117 Static void ural_next_scan(void *); 118 Static void ural_task(void *); 119 Static int ural_newstate(struct ieee80211com *, 120 enum ieee80211_state, int); 121 Static int ural_rxrate(struct ural_rx_desc *); 122 Static void ural_txeof(struct usbd_xfer *, void *, 123 usbd_status); 124 Static void ural_rxeof(struct usbd_xfer *, void *, 125 usbd_status); 126 Static int ural_ack_rate(struct ieee80211com *, int); 127 Static uint16_t ural_txtime(int, int, uint32_t); 128 Static uint8_t ural_plcp_signal(int); 129 Static void ural_setup_tx_desc(struct ural_softc *, 130 struct ural_tx_desc *, uint32_t, int, int); 131 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137 Static void ural_start(struct ifnet *); 138 Static void ural_watchdog(struct ifnet *); 139 Static int ural_reset(struct ifnet *); 140 Static int ural_ioctl(struct ifnet *, u_long, void *); 141 Static void ural_set_testmode(struct ural_softc *); 142 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 143 int); 144 Static uint16_t ural_read(struct ural_softc *, uint16_t); 145 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 146 int); 147 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 148 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 149 int); 150 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 151 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 152 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 153 Static void ural_set_chan(struct ural_softc *, 154 struct ieee80211_channel *); 155 Static void ural_disable_rf_tune(struct ural_softc *); 156 Static void ural_enable_tsf_sync(struct ural_softc *); 157 Static void ural_update_slot(struct ifnet *); 158 Static void ural_set_txpreamble(struct ural_softc *); 159 Static void ural_set_basicrates(struct ural_softc *); 160 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 161 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 162 Static void ural_update_promisc(struct ural_softc *); 163 Static const char *ural_get_rf(int); 164 Static void ural_read_eeprom(struct ural_softc *); 165 Static int ural_bbp_init(struct ural_softc *); 166 Static void ural_set_txantenna(struct ural_softc *, int); 167 Static void ural_set_rxantenna(struct ural_softc *, int); 168 Static int ural_init(struct ifnet *); 169 Static void ural_stop(struct ifnet *, int); 170 Static void ural_amrr_start(struct ural_softc *, 171 struct ieee80211_node *); 172 Static void ural_amrr_timeout(void *); 173 Static void ural_amrr_update(struct usbd_xfer *, void *, 174 usbd_status status); 175 176 /* 177 * Default values for MAC registers; values taken from the reference driver. 178 */ 179 static const struct { 180 uint16_t reg; 181 uint16_t val; 182 } ural_def_mac[] = { 183 { RAL_TXRX_CSR5, 0x8c8d }, 184 { RAL_TXRX_CSR6, 0x8b8a }, 185 { RAL_TXRX_CSR7, 0x8687 }, 186 { RAL_TXRX_CSR8, 0x0085 }, 187 { RAL_MAC_CSR13, 0x1111 }, 188 { RAL_MAC_CSR14, 0x1e11 }, 189 { RAL_TXRX_CSR21, 0xe78f }, 190 { RAL_MAC_CSR9, 0xff1d }, 191 { RAL_MAC_CSR11, 0x0002 }, 192 { RAL_MAC_CSR22, 0x0053 }, 193 { RAL_MAC_CSR15, 0x0000 }, 194 { RAL_MAC_CSR8, 0x0780 }, 195 { RAL_TXRX_CSR19, 0x0000 }, 196 { RAL_TXRX_CSR18, 0x005a }, 197 { RAL_PHY_CSR2, 0x0000 }, 198 { RAL_TXRX_CSR0, 0x1ec0 }, 199 { RAL_PHY_CSR4, 0x000f } 200 }; 201 202 /* 203 * Default values for BBP registers; values taken from the reference driver. 204 */ 205 static const struct { 206 uint8_t reg; 207 uint8_t val; 208 } ural_def_bbp[] = { 209 { 3, 0x02 }, 210 { 4, 0x19 }, 211 { 14, 0x1c }, 212 { 15, 0x30 }, 213 { 16, 0xac }, 214 { 17, 0x48 }, 215 { 18, 0x18 }, 216 { 19, 0xff }, 217 { 20, 0x1e }, 218 { 21, 0x08 }, 219 { 22, 0x08 }, 220 { 23, 0x08 }, 221 { 24, 0x80 }, 222 { 25, 0x50 }, 223 { 26, 0x08 }, 224 { 27, 0x23 }, 225 { 30, 0x10 }, 226 { 31, 0x2b }, 227 { 32, 0xb9 }, 228 { 34, 0x12 }, 229 { 35, 0x50 }, 230 { 39, 0xc4 }, 231 { 40, 0x02 }, 232 { 41, 0x60 }, 233 { 53, 0x10 }, 234 { 54, 0x18 }, 235 { 56, 0x08 }, 236 { 57, 0x10 }, 237 { 58, 0x08 }, 238 { 61, 0x60 }, 239 { 62, 0x10 }, 240 { 75, 0xff } 241 }; 242 243 /* 244 * Default values for RF register R2 indexed by channel numbers. 245 */ 246 static const uint32_t ural_rf2522_r2[] = { 247 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 248 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 249 }; 250 251 static const uint32_t ural_rf2523_r2[] = { 252 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 253 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 254 }; 255 256 static const uint32_t ural_rf2524_r2[] = { 257 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 258 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 259 }; 260 261 static const uint32_t ural_rf2525_r2[] = { 262 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 263 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 264 }; 265 266 static const uint32_t ural_rf2525_hi_r2[] = { 267 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 268 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 269 }; 270 271 static const uint32_t ural_rf2525e_r2[] = { 272 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 273 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 274 }; 275 276 static const uint32_t ural_rf2526_hi_r2[] = { 277 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 278 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 279 }; 280 281 static const uint32_t ural_rf2526_r2[] = { 282 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 283 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 284 }; 285 286 /* 287 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 288 * values taken from the reference driver. 289 */ 290 static const struct { 291 uint8_t chan; 292 uint32_t r1; 293 uint32_t r2; 294 uint32_t r4; 295 } ural_rf5222[] = { 296 { 1, 0x08808, 0x0044d, 0x00282 }, 297 { 2, 0x08808, 0x0044e, 0x00282 }, 298 { 3, 0x08808, 0x0044f, 0x00282 }, 299 { 4, 0x08808, 0x00460, 0x00282 }, 300 { 5, 0x08808, 0x00461, 0x00282 }, 301 { 6, 0x08808, 0x00462, 0x00282 }, 302 { 7, 0x08808, 0x00463, 0x00282 }, 303 { 8, 0x08808, 0x00464, 0x00282 }, 304 { 9, 0x08808, 0x00465, 0x00282 }, 305 { 10, 0x08808, 0x00466, 0x00282 }, 306 { 11, 0x08808, 0x00467, 0x00282 }, 307 { 12, 0x08808, 0x00468, 0x00282 }, 308 { 13, 0x08808, 0x00469, 0x00282 }, 309 { 14, 0x08808, 0x0046b, 0x00286 }, 310 311 { 36, 0x08804, 0x06225, 0x00287 }, 312 { 40, 0x08804, 0x06226, 0x00287 }, 313 { 44, 0x08804, 0x06227, 0x00287 }, 314 { 48, 0x08804, 0x06228, 0x00287 }, 315 { 52, 0x08804, 0x06229, 0x00287 }, 316 { 56, 0x08804, 0x0622a, 0x00287 }, 317 { 60, 0x08804, 0x0622b, 0x00287 }, 318 { 64, 0x08804, 0x0622c, 0x00287 }, 319 320 { 100, 0x08804, 0x02200, 0x00283 }, 321 { 104, 0x08804, 0x02201, 0x00283 }, 322 { 108, 0x08804, 0x02202, 0x00283 }, 323 { 112, 0x08804, 0x02203, 0x00283 }, 324 { 116, 0x08804, 0x02204, 0x00283 }, 325 { 120, 0x08804, 0x02205, 0x00283 }, 326 { 124, 0x08804, 0x02206, 0x00283 }, 327 { 128, 0x08804, 0x02207, 0x00283 }, 328 { 132, 0x08804, 0x02208, 0x00283 }, 329 { 136, 0x08804, 0x02209, 0x00283 }, 330 { 140, 0x08804, 0x0220a, 0x00283 }, 331 332 { 149, 0x08808, 0x02429, 0x00281 }, 333 { 153, 0x08808, 0x0242b, 0x00281 }, 334 { 157, 0x08808, 0x0242d, 0x00281 }, 335 { 161, 0x08808, 0x0242f, 0x00281 } 336 }; 337 338 int ural_match(device_t, cfdata_t, void *); 339 void ural_attach(device_t, device_t, void *); 340 int ural_detach(device_t, int); 341 int ural_activate(device_t, enum devact); 342 343 CFATTACH_DECL_NEW(ural, sizeof(struct ural_softc), ural_match, ural_attach, 344 ural_detach, ural_activate); 345 346 int 347 ural_match(device_t parent, cfdata_t match, void *aux) 348 { 349 struct usb_attach_arg *uaa = aux; 350 351 return (usb_lookup(ural_devs, uaa->uaa_vendor, uaa->uaa_product) != NULL) ? 352 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 353 } 354 355 void 356 ural_attach(device_t parent, device_t self, void *aux) 357 { 358 struct ural_softc *sc = device_private(self); 359 struct usb_attach_arg *uaa = aux; 360 struct ieee80211com *ic = &sc->sc_ic; 361 struct ifnet *ifp = &sc->sc_if; 362 usb_interface_descriptor_t *id; 363 usb_endpoint_descriptor_t *ed; 364 usbd_status error; 365 char *devinfop; 366 int i; 367 368 sc->sc_dev = self; 369 sc->sc_udev = uaa->uaa_device; 370 sc->sc_init_state = URAL_INIT_NONE; 371 372 aprint_naive("\n"); 373 aprint_normal("\n"); 374 375 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 376 aprint_normal_dev(self, "%s\n", devinfop); 377 usbd_devinfo_free(devinfop); 378 379 error = usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0); 380 if (error != 0) { 381 aprint_error_dev(self, "failed to set configuration" 382 ", err=%s\n", usbd_errstr(error)); 383 return; 384 } 385 386 /* get the first interface handle */ 387 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 388 &sc->sc_iface); 389 if (error != 0) { 390 aprint_error_dev(self, "could not get interface handle\n"); 391 return; 392 } 393 394 /* 395 * Find endpoints. 396 */ 397 id = usbd_get_interface_descriptor(sc->sc_iface); 398 399 sc->sc_rx_no = sc->sc_tx_no = -1; 400 for (i = 0; i < id->bNumEndpoints; i++) { 401 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 402 if (ed == NULL) { 403 aprint_error_dev(self, 404 "no endpoint descriptor for %d\n", i); 405 return; 406 } 407 408 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 409 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 410 sc->sc_rx_no = ed->bEndpointAddress; 411 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 412 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 413 sc->sc_tx_no = ed->bEndpointAddress; 414 } 415 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 416 aprint_error_dev(self, "missing endpoint\n"); 417 return; 418 } 419 420 usb_init_task(&sc->sc_task, ural_task, sc, 0); 421 callout_init(&sc->sc_scan_ch, 0); 422 sc->amrr.amrr_min_success_threshold = 1; 423 sc->amrr.amrr_max_success_threshold = 15; 424 callout_init(&sc->sc_amrr_ch, 0); 425 426 /* retrieve RT2570 rev. no */ 427 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 428 429 /* retrieve MAC address and various other things from EEPROM */ 430 ural_read_eeprom(sc); 431 432 aprint_normal_dev(self, "MAC/BBP RT2570 (rev 0x%02x), RF %s\n", 433 sc->asic_rev, ural_get_rf(sc->rf_rev)); 434 435 ifp->if_softc = sc; 436 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 437 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 438 ifp->if_init = ural_init; 439 ifp->if_ioctl = ural_ioctl; 440 ifp->if_start = ural_start; 441 ifp->if_watchdog = ural_watchdog; 442 IFQ_SET_MAXLEN(&ifp->if_snd, IFQ_MAXLEN); 443 IFQ_SET_READY(&ifp->if_snd); 444 445 ic->ic_ifp = ifp; 446 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 447 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 448 ic->ic_state = IEEE80211_S_INIT; 449 450 /* set device capabilities */ 451 ic->ic_caps = 452 IEEE80211_C_IBSS | /* IBSS mode supported */ 453 IEEE80211_C_MONITOR | /* monitor mode supported */ 454 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 455 IEEE80211_C_TXPMGT | /* tx power management */ 456 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 457 IEEE80211_C_SHSLOT | /* short slot time supported */ 458 IEEE80211_C_WPA; /* 802.11i */ 459 460 if (sc->rf_rev == RAL_RF_5222) { 461 /* set supported .11a rates */ 462 ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a; 463 464 /* set supported .11a channels */ 465 for (i = 36; i <= 64; i += 4) { 466 ic->ic_channels[i].ic_freq = 467 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 468 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 469 } 470 for (i = 100; i <= 140; i += 4) { 471 ic->ic_channels[i].ic_freq = 472 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 473 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 474 } 475 for (i = 149; i <= 161; i += 4) { 476 ic->ic_channels[i].ic_freq = 477 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 478 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 479 } 480 } 481 482 /* set supported .11b and .11g rates */ 483 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 484 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 485 486 /* set supported .11b and .11g channels (1 through 14) */ 487 for (i = 1; i <= 14; i++) { 488 ic->ic_channels[i].ic_freq = 489 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 490 ic->ic_channels[i].ic_flags = 491 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 492 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 493 } 494 495 if_attach(ifp); 496 ieee80211_ifattach(ic); 497 ic->ic_reset = ural_reset; 498 499 /* override state transition machine */ 500 sc->sc_newstate = ic->ic_newstate; 501 ic->ic_newstate = ural_newstate; 502 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 503 504 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 505 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 506 507 sc->sc_rxtap_len = sizeof(sc->sc_rxtapu); 508 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 509 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 510 511 sc->sc_txtap_len = sizeof(sc->sc_txtapu); 512 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 513 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 514 515 ieee80211_announce(ic); 516 517 sc->sc_init_state = URAL_INIT_INITED; 518 519 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, sc->sc_dev); 520 521 if (!pmf_device_register(self, NULL, NULL)) 522 aprint_error_dev(self, "couldn't establish power handler\n"); 523 524 return; 525 } 526 527 int 528 ural_detach(device_t self, int flags) 529 { 530 struct ural_softc *sc = device_private(self); 531 struct ieee80211com *ic = &sc->sc_ic; 532 struct ifnet *ifp = &sc->sc_if; 533 int s; 534 535 if (sc->sc_init_state < URAL_INIT_INITED) 536 return 0; 537 538 pmf_device_deregister(self); 539 540 s = splusb(); 541 542 ural_stop(ifp, 1); 543 callout_halt(&sc->sc_scan_ch, NULL); 544 callout_halt(&sc->sc_amrr_ch, NULL); 545 usb_rem_task_wait(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER, NULL); 546 547 bpf_detach(ifp); 548 ieee80211_ifdetach(ic); 549 if_detach(ifp); 550 551 splx(s); 552 553 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev); 554 555 return 0; 556 } 557 558 Static int 559 ural_alloc_tx_list(struct ural_softc *sc) 560 { 561 struct ural_tx_data *data; 562 int i, error; 563 564 sc->tx_queued = 0; 565 566 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 567 data = &sc->tx_data[i]; 568 569 data->sc = sc; 570 error = usbd_create_xfer(sc->sc_tx_pipeh, 571 RAL_TX_DESC_SIZE + MCLBYTES, USBD_FORCE_SHORT_XFER, 0, 572 &data->xfer); 573 if (error) { 574 printf("%s: could not allocate tx xfer\n", 575 device_xname(sc->sc_dev)); 576 goto fail; 577 } 578 579 data->buf = usbd_get_buffer(data->xfer); 580 } 581 582 return 0; 583 584 fail: ural_free_tx_list(sc); 585 return error; 586 } 587 588 Static void 589 ural_free_tx_list(struct ural_softc *sc) 590 { 591 struct ural_tx_data *data; 592 int i; 593 594 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 595 data = &sc->tx_data[i]; 596 597 if (data->xfer != NULL) { 598 usbd_destroy_xfer(data->xfer); 599 data->xfer = NULL; 600 } 601 602 if (data->ni != NULL) { 603 ieee80211_free_node(data->ni); 604 data->ni = NULL; 605 } 606 } 607 } 608 609 Static int 610 ural_alloc_rx_list(struct ural_softc *sc) 611 { 612 struct ural_rx_data *data; 613 int i, error; 614 615 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 616 data = &sc->rx_data[i]; 617 618 data->sc = sc; 619 620 error = usbd_create_xfer(sc->sc_rx_pipeh, MCLBYTES, 621 0, 0, &data->xfer); 622 if (error) { 623 printf("%s: could not allocate rx xfer\n", 624 device_xname(sc->sc_dev)); 625 goto fail; 626 } 627 628 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 629 if (data->m == NULL) { 630 printf("%s: could not allocate rx mbuf\n", 631 device_xname(sc->sc_dev)); 632 error = ENOMEM; 633 goto fail; 634 } 635 636 MCLGET(data->m, M_DONTWAIT); 637 if (!(data->m->m_flags & M_EXT)) { 638 printf("%s: could not allocate rx mbuf cluster\n", 639 device_xname(sc->sc_dev)); 640 error = ENOMEM; 641 goto fail; 642 } 643 644 data->buf = mtod(data->m, uint8_t *); 645 } 646 647 return 0; 648 649 fail: ural_free_rx_list(sc); 650 return error; 651 } 652 653 Static void 654 ural_free_rx_list(struct ural_softc *sc) 655 { 656 struct ural_rx_data *data; 657 int i; 658 659 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 660 data = &sc->rx_data[i]; 661 662 if (data->xfer != NULL) { 663 usbd_destroy_xfer(data->xfer); 664 data->xfer = NULL; 665 } 666 667 if (data->m != NULL) { 668 m_freem(data->m); 669 data->m = NULL; 670 } 671 } 672 } 673 674 Static int 675 ural_media_change(struct ifnet *ifp) 676 { 677 int error; 678 679 error = ieee80211_media_change(ifp); 680 if (error != ENETRESET) 681 return error; 682 683 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 684 ural_init(ifp); 685 686 return 0; 687 } 688 689 /* 690 * This function is called periodically (every 200ms) during scanning to 691 * switch from one channel to another. 692 */ 693 Static void 694 ural_next_scan(void *arg) 695 { 696 struct ural_softc *sc = arg; 697 struct ieee80211com *ic = &sc->sc_ic; 698 699 if (ic->ic_state == IEEE80211_S_SCAN) 700 ieee80211_next_scan(ic); 701 } 702 703 Static void 704 ural_task(void *arg) 705 { 706 struct ural_softc *sc = arg; 707 struct ieee80211com *ic = &sc->sc_ic; 708 enum ieee80211_state ostate; 709 struct ieee80211_node *ni; 710 struct mbuf *m; 711 712 ostate = ic->ic_state; 713 714 switch (sc->sc_state) { 715 case IEEE80211_S_INIT: 716 if (ostate == IEEE80211_S_RUN) { 717 /* abort TSF synchronization */ 718 ural_write(sc, RAL_TXRX_CSR19, 0); 719 720 /* force tx led to stop blinking */ 721 ural_write(sc, RAL_MAC_CSR20, 0); 722 } 723 break; 724 725 case IEEE80211_S_SCAN: 726 ural_set_chan(sc, ic->ic_curchan); 727 callout_reset(&sc->sc_scan_ch, hz / 5, ural_next_scan, sc); 728 break; 729 730 case IEEE80211_S_AUTH: 731 ural_set_chan(sc, ic->ic_curchan); 732 break; 733 734 case IEEE80211_S_ASSOC: 735 ural_set_chan(sc, ic->ic_curchan); 736 break; 737 738 case IEEE80211_S_RUN: 739 ural_set_chan(sc, ic->ic_curchan); 740 741 ni = ic->ic_bss; 742 743 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 744 ural_update_slot(ic->ic_ifp); 745 ural_set_txpreamble(sc); 746 ural_set_basicrates(sc); 747 ural_set_bssid(sc, ni->ni_bssid); 748 } 749 750 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 751 ic->ic_opmode == IEEE80211_M_IBSS) { 752 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 753 if (m == NULL) { 754 printf("%s: could not allocate beacon\n", 755 device_xname(sc->sc_dev)); 756 return; 757 } 758 759 if (ural_tx_bcn(sc, m, ni) != 0) { 760 m_freem(m); 761 printf("%s: could not send beacon\n", 762 device_xname(sc->sc_dev)); 763 return; 764 } 765 766 /* beacon is no longer needed */ 767 m_freem(m); 768 } 769 770 /* make tx led blink on tx (controlled by ASIC) */ 771 ural_write(sc, RAL_MAC_CSR20, 1); 772 773 if (ic->ic_opmode != IEEE80211_M_MONITOR) 774 ural_enable_tsf_sync(sc); 775 776 /* enable automatic rate adaptation in STA mode */ 777 if (ic->ic_opmode == IEEE80211_M_STA && 778 ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) 779 ural_amrr_start(sc, ni); 780 781 break; 782 } 783 784 sc->sc_newstate(ic, sc->sc_state, -1); 785 } 786 787 Static int 788 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, 789 int arg) 790 { 791 struct ural_softc *sc = ic->ic_ifp->if_softc; 792 793 /* 794 * XXXSMP: This does not wait for the task, if it is in flight, 795 * to complete. If this code works at all, it must rely on the 796 * kernel lock to serialize with the USB task thread. 797 */ 798 usb_rem_task(sc->sc_udev, &sc->sc_task); 799 callout_stop(&sc->sc_scan_ch); 800 callout_stop(&sc->sc_amrr_ch); 801 802 /* do it in a process context */ 803 sc->sc_state = nstate; 804 usb_add_task(sc->sc_udev, &sc->sc_task, USB_TASKQ_DRIVER); 805 806 return 0; 807 } 808 809 /* quickly determine if a given rate is CCK or OFDM */ 810 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 811 812 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 813 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 814 815 #define RAL_SIFS 10 /* us */ 816 817 #define RAL_RXTX_TURNAROUND 5 /* us */ 818 819 /* 820 * This function is only used by the Rx radiotap code. 821 */ 822 Static int 823 ural_rxrate(struct ural_rx_desc *desc) 824 { 825 if (le32toh(desc->flags) & RAL_RX_OFDM) { 826 /* reverse function of ural_plcp_signal */ 827 switch (desc->rate) { 828 case 0xb: return 12; 829 case 0xf: return 18; 830 case 0xa: return 24; 831 case 0xe: return 36; 832 case 0x9: return 48; 833 case 0xd: return 72; 834 case 0x8: return 96; 835 case 0xc: return 108; 836 } 837 } else { 838 if (desc->rate == 10) 839 return 2; 840 if (desc->rate == 20) 841 return 4; 842 if (desc->rate == 55) 843 return 11; 844 if (desc->rate == 110) 845 return 22; 846 } 847 return 2; /* should not get there */ 848 } 849 850 Static void 851 ural_txeof(struct usbd_xfer *xfer, void * priv, 852 usbd_status status) 853 { 854 struct ural_tx_data *data = priv; 855 struct ural_softc *sc = data->sc; 856 struct ifnet *ifp = &sc->sc_if; 857 int s; 858 859 if (status != USBD_NORMAL_COMPLETION) { 860 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 861 return; 862 863 printf("%s: could not transmit buffer: %s\n", 864 device_xname(sc->sc_dev), usbd_errstr(status)); 865 866 if (status == USBD_STALLED) 867 usbd_clear_endpoint_stall_async(sc->sc_tx_pipeh); 868 869 ifp->if_oerrors++; 870 return; 871 } 872 873 s = splnet(); 874 875 m_freem(data->m); 876 data->m = NULL; 877 ieee80211_free_node(data->ni); 878 data->ni = NULL; 879 880 sc->tx_queued--; 881 ifp->if_opackets++; 882 883 DPRINTFN(10, ("tx done\n")); 884 885 sc->sc_tx_timer = 0; 886 ifp->if_flags &= ~IFF_OACTIVE; 887 ural_start(ifp); 888 889 splx(s); 890 } 891 892 Static void 893 ural_rxeof(struct usbd_xfer *xfer, void * priv, usbd_status status) 894 { 895 struct ural_rx_data *data = priv; 896 struct ural_softc *sc = data->sc; 897 struct ieee80211com *ic = &sc->sc_ic; 898 struct ifnet *ifp = &sc->sc_if; 899 struct ural_rx_desc *desc; 900 struct ieee80211_frame *wh; 901 struct ieee80211_node *ni; 902 struct mbuf *mnew, *m; 903 int s, len; 904 905 if (status != USBD_NORMAL_COMPLETION) { 906 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 907 return; 908 909 if (status == USBD_STALLED) 910 usbd_clear_endpoint_stall_async(sc->sc_rx_pipeh); 911 goto skip; 912 } 913 914 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 915 916 if (len < RAL_RX_DESC_SIZE + IEEE80211_MIN_LEN) { 917 DPRINTF(("%s: xfer too short %d\n", device_xname(sc->sc_dev), 918 len)); 919 ifp->if_ierrors++; 920 goto skip; 921 } 922 923 /* rx descriptor is located at the end */ 924 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 925 926 if ((le32toh(desc->flags) & RAL_RX_PHY_ERROR) || 927 (le32toh(desc->flags) & RAL_RX_CRC_ERROR)) { 928 /* 929 * This should not happen since we did not request to receive 930 * those frames when we filled RAL_TXRX_CSR2. 931 */ 932 DPRINTFN(5, ("PHY or CRC error\n")); 933 ifp->if_ierrors++; 934 goto skip; 935 } 936 937 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 938 if (mnew == NULL) { 939 ifp->if_ierrors++; 940 goto skip; 941 } 942 943 MCLGET(mnew, M_DONTWAIT); 944 if (!(mnew->m_flags & M_EXT)) { 945 ifp->if_ierrors++; 946 m_freem(mnew); 947 goto skip; 948 } 949 950 m = data->m; 951 data->m = mnew; 952 data->buf = mtod(data->m, uint8_t *); 953 954 /* finalize mbuf */ 955 m_set_rcvif(m, ifp); 956 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 957 m->m_flags |= M_HASFCS; /* h/w leaves FCS */ 958 959 s = splnet(); 960 961 if (sc->sc_drvbpf != NULL) { 962 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 963 964 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 965 tap->wr_rate = ural_rxrate(desc); 966 tap->wr_chan_freq = htole16(ic->ic_curchan->ic_freq); 967 tap->wr_chan_flags = htole16(ic->ic_curchan->ic_flags); 968 tap->wr_antenna = sc->rx_ant; 969 tap->wr_antsignal = desc->rssi; 970 971 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m, BPF_D_IN); 972 } 973 974 wh = mtod(m, struct ieee80211_frame *); 975 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh); 976 977 /* send the frame to the 802.11 layer */ 978 ieee80211_input(ic, m, ni, desc->rssi, 0); 979 980 /* node is no longer needed */ 981 ieee80211_free_node(ni); 982 983 splx(s); 984 985 DPRINTFN(15, ("rx done\n")); 986 987 skip: /* setup a new transfer */ 988 usbd_setup_xfer(xfer, data, data->buf, MCLBYTES, 989 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 990 usbd_transfer(xfer); 991 } 992 993 /* 994 * Return the expected ack rate for a frame transmitted at rate `rate'. 995 * XXX: this should depend on the destination node basic rate set. 996 */ 997 Static int 998 ural_ack_rate(struct ieee80211com *ic, int rate) 999 { 1000 switch (rate) { 1001 /* CCK rates */ 1002 case 2: 1003 return 2; 1004 case 4: 1005 case 11: 1006 case 22: 1007 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1008 1009 /* OFDM rates */ 1010 case 12: 1011 case 18: 1012 return 12; 1013 case 24: 1014 case 36: 1015 return 24; 1016 case 48: 1017 case 72: 1018 case 96: 1019 case 108: 1020 return 48; 1021 } 1022 1023 /* default to 1Mbps */ 1024 return 2; 1025 } 1026 1027 /* 1028 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1029 * The function automatically determines the operating mode depending on the 1030 * given rate. `flags' indicates whether short preamble is in use or not. 1031 */ 1032 Static uint16_t 1033 ural_txtime(int len, int rate, uint32_t flags) 1034 { 1035 uint16_t txtime; 1036 1037 if (RAL_RATE_IS_OFDM(rate)) { 1038 /* IEEE Std 802.11g-2003, pp. 37 */ 1039 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1040 txtime = 16 + 4 + 4 * txtime + 6; 1041 } else { 1042 /* IEEE Std 802.11b-1999, pp. 28 */ 1043 txtime = (16 * len + rate - 1) / rate; 1044 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1045 txtime += 72 + 24; 1046 else 1047 txtime += 144 + 48; 1048 } 1049 return txtime; 1050 } 1051 1052 Static uint8_t 1053 ural_plcp_signal(int rate) 1054 { 1055 switch (rate) { 1056 /* CCK rates (returned values are device-dependent) */ 1057 case 2: return 0x0; 1058 case 4: return 0x1; 1059 case 11: return 0x2; 1060 case 22: return 0x3; 1061 1062 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1063 case 12: return 0xb; 1064 case 18: return 0xf; 1065 case 24: return 0xa; 1066 case 36: return 0xe; 1067 case 48: return 0x9; 1068 case 72: return 0xd; 1069 case 96: return 0x8; 1070 case 108: return 0xc; 1071 1072 /* unsupported rates (should not get there) */ 1073 default: return 0xff; 1074 } 1075 } 1076 1077 Static void 1078 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1079 uint32_t flags, int len, int rate) 1080 { 1081 struct ieee80211com *ic = &sc->sc_ic; 1082 uint16_t plcp_length; 1083 int remainder; 1084 1085 desc->flags = htole32(flags); 1086 desc->flags |= htole32(RAL_TX_NEWSEQ); 1087 desc->flags |= htole32(len << 16); 1088 1089 desc->wme = htole16(RAL_AIFSN(2) | RAL_LOGCWMIN(3) | RAL_LOGCWMAX(5)); 1090 desc->wme |= htole16(RAL_IVOFFSET(sizeof(struct ieee80211_frame))); 1091 1092 /* setup PLCP fields */ 1093 desc->plcp_signal = ural_plcp_signal(rate); 1094 desc->plcp_service = 4; 1095 1096 len += IEEE80211_CRC_LEN; 1097 if (RAL_RATE_IS_OFDM(rate)) { 1098 desc->flags |= htole32(RAL_TX_OFDM); 1099 1100 plcp_length = len & 0xfff; 1101 desc->plcp_length_hi = plcp_length >> 6; 1102 desc->plcp_length_lo = plcp_length & 0x3f; 1103 } else { 1104 plcp_length = (16 * len + rate - 1) / rate; 1105 if (rate == 22) { 1106 remainder = (16 * len) % 22; 1107 if (remainder != 0 && remainder < 7) 1108 desc->plcp_service |= RAL_PLCP_LENGEXT; 1109 } 1110 desc->plcp_length_hi = plcp_length >> 8; 1111 desc->plcp_length_lo = plcp_length & 0xff; 1112 1113 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1114 desc->plcp_signal |= 0x08; 1115 } 1116 1117 desc->iv = 0; 1118 desc->eiv = 0; 1119 } 1120 1121 #define RAL_TX_TIMEOUT 5000 1122 1123 Static int 1124 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1125 { 1126 struct ural_tx_desc *desc; 1127 struct usbd_xfer *xfer; 1128 uint8_t cmd = 0; 1129 usbd_status error; 1130 uint8_t *buf; 1131 int xferlen, rate; 1132 1133 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1134 1135 /* xfer length needs to be a multiple of two! */ 1136 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1137 1138 error = usbd_create_xfer(sc->sc_tx_pipeh, xferlen, 1139 USBD_FORCE_SHORT_XFER, 0, &xfer); 1140 if (error) 1141 return error; 1142 1143 buf = usbd_get_buffer(xfer); 1144 1145 usbd_setup_xfer(xfer, NULL, &cmd, sizeof(cmd), USBD_FORCE_SHORT_XFER, 1146 RAL_TX_TIMEOUT, NULL); 1147 1148 error = usbd_sync_transfer(xfer); 1149 if (error != 0) { 1150 usbd_destroy_xfer(xfer); 1151 return error; 1152 } 1153 1154 desc = (struct ural_tx_desc *)buf; 1155 1156 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1157 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1158 m0->m_pkthdr.len, rate); 1159 1160 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1161 m0->m_pkthdr.len, rate, xferlen)); 1162 1163 usbd_setup_xfer(xfer, NULL, buf, xferlen, USBD_FORCE_SHORT_XFER, 1164 RAL_TX_TIMEOUT, NULL); 1165 1166 error = usbd_sync_transfer(xfer); 1167 usbd_destroy_xfer(xfer); 1168 1169 return error; 1170 } 1171 1172 Static int 1173 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1174 { 1175 struct ieee80211com *ic = &sc->sc_ic; 1176 struct ural_tx_desc *desc; 1177 struct ural_tx_data *data; 1178 struct ieee80211_frame *wh; 1179 struct ieee80211_key *k; 1180 uint32_t flags = 0; 1181 uint16_t dur; 1182 usbd_status error; 1183 int xferlen, rate; 1184 1185 data = &sc->tx_data[0]; 1186 desc = (struct ural_tx_desc *)data->buf; 1187 1188 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2; 1189 1190 wh = mtod(m0, struct ieee80211_frame *); 1191 1192 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1193 k = ieee80211_crypto_encap(ic, ni, m0); 1194 if (k == NULL) { 1195 m_freem(m0); 1196 return ENOBUFS; 1197 } 1198 } 1199 1200 data->m = m0; 1201 data->ni = ni; 1202 1203 wh = mtod(m0, struct ieee80211_frame *); 1204 1205 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1206 flags |= RAL_TX_ACK; 1207 1208 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1209 *(uint16_t *)wh->i_dur = htole16(dur); 1210 1211 /* tell hardware to add timestamp for probe responses */ 1212 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) == 1213 IEEE80211_FC0_TYPE_MGT && 1214 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1215 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1216 flags |= RAL_TX_TIMESTAMP; 1217 } 1218 1219 if (sc->sc_drvbpf != NULL) { 1220 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1221 1222 tap->wt_flags = 0; 1223 tap->wt_rate = rate; 1224 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1225 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1226 tap->wt_antenna = sc->tx_ant; 1227 1228 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1229 } 1230 1231 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1232 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1233 1234 /* align end on a 2-bytes boundary */ 1235 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1236 1237 /* 1238 * No space left in the last URB to store the extra 2 bytes, force 1239 * sending of another URB. 1240 */ 1241 if ((xferlen % 64) == 0) 1242 xferlen += 2; 1243 1244 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1245 m0->m_pkthdr.len, rate, xferlen)); 1246 1247 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1248 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1249 1250 error = usbd_transfer(data->xfer); 1251 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1252 m_freem(m0); 1253 return error; 1254 } 1255 1256 sc->tx_queued++; 1257 1258 return 0; 1259 } 1260 1261 Static int 1262 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1263 { 1264 struct ieee80211com *ic = &sc->sc_ic; 1265 struct ural_tx_desc *desc; 1266 struct ural_tx_data *data; 1267 struct ieee80211_frame *wh; 1268 struct ieee80211_key *k; 1269 uint32_t flags = 0; 1270 uint16_t dur; 1271 usbd_status error; 1272 int xferlen, rate; 1273 1274 wh = mtod(m0, struct ieee80211_frame *); 1275 1276 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) 1277 rate = ic->ic_bss->ni_rates.rs_rates[ic->ic_fixed_rate]; 1278 else 1279 rate = ni->ni_rates.rs_rates[ni->ni_txrate]; 1280 1281 rate &= IEEE80211_RATE_VAL; 1282 1283 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1284 k = ieee80211_crypto_encap(ic, ni, m0); 1285 if (k == NULL) { 1286 m_freem(m0); 1287 return ENOBUFS; 1288 } 1289 1290 /* packet header may have moved, reset our local pointer */ 1291 wh = mtod(m0, struct ieee80211_frame *); 1292 } 1293 1294 data = &sc->tx_data[0]; 1295 desc = (struct ural_tx_desc *)data->buf; 1296 1297 data->m = m0; 1298 data->ni = ni; 1299 1300 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1301 flags |= RAL_TX_ACK; 1302 flags |= RAL_TX_RETRY(7); 1303 1304 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(ic, rate), 1305 ic->ic_flags) + RAL_SIFS; 1306 *(uint16_t *)wh->i_dur = htole16(dur); 1307 } 1308 1309 if (sc->sc_drvbpf != NULL) { 1310 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1311 1312 tap->wt_flags = 0; 1313 tap->wt_rate = rate; 1314 tap->wt_chan_freq = htole16(ic->ic_curchan->ic_freq); 1315 tap->wt_chan_flags = htole16(ic->ic_curchan->ic_flags); 1316 tap->wt_antenna = sc->tx_ant; 1317 1318 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1319 } 1320 1321 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1322 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1323 1324 /* align end on a 2-bytes boundary */ 1325 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1326 1327 /* 1328 * No space left in the last URB to store the extra 2 bytes, force 1329 * sending of another URB. 1330 */ 1331 if ((xferlen % 64) == 0) 1332 xferlen += 2; 1333 1334 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1335 m0->m_pkthdr.len, rate, xferlen)); 1336 usbd_setup_xfer(data->xfer, data, data->buf, xferlen, 1337 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, ural_txeof); 1338 1339 error = usbd_transfer(data->xfer); 1340 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) 1341 return error; 1342 1343 sc->tx_queued++; 1344 1345 return 0; 1346 } 1347 1348 Static void 1349 ural_start(struct ifnet *ifp) 1350 { 1351 struct ural_softc *sc = ifp->if_softc; 1352 struct ieee80211com *ic = &sc->sc_ic; 1353 struct mbuf *m0; 1354 struct ether_header *eh; 1355 struct ieee80211_node *ni; 1356 1357 for (;;) { 1358 IF_POLL(&ic->ic_mgtq, m0); 1359 if (m0 != NULL) { 1360 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1361 ifp->if_flags |= IFF_OACTIVE; 1362 break; 1363 } 1364 IF_DEQUEUE(&ic->ic_mgtq, m0); 1365 1366 ni = M_GETCTX(m0, struct ieee80211_node *); 1367 M_CLEARCTX(m0); 1368 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1369 if (ural_tx_mgt(sc, m0, ni) != 0) 1370 break; 1371 1372 } else { 1373 if (ic->ic_state != IEEE80211_S_RUN) 1374 break; 1375 IFQ_DEQUEUE(&ifp->if_snd, m0); 1376 if (m0 == NULL) 1377 break; 1378 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1379 IF_PREPEND(&ifp->if_snd, m0); 1380 ifp->if_flags |= IFF_OACTIVE; 1381 break; 1382 } 1383 1384 if (m0->m_len < sizeof(struct ether_header) && 1385 !(m0 = m_pullup(m0, sizeof(struct ether_header)))) 1386 continue; 1387 1388 eh = mtod(m0, struct ether_header *); 1389 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1390 if (ni == NULL) { 1391 m_freem(m0); 1392 continue; 1393 } 1394 bpf_mtap(ifp, m0, BPF_D_OUT); 1395 m0 = ieee80211_encap(ic, m0, ni); 1396 if (m0 == NULL) { 1397 ieee80211_free_node(ni); 1398 continue; 1399 } 1400 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 1401 if (ural_tx_data(sc, m0, ni) != 0) { 1402 ieee80211_free_node(ni); 1403 ifp->if_oerrors++; 1404 break; 1405 } 1406 } 1407 1408 sc->sc_tx_timer = 5; 1409 ifp->if_timer = 1; 1410 } 1411 } 1412 1413 Static void 1414 ural_watchdog(struct ifnet *ifp) 1415 { 1416 struct ural_softc *sc = ifp->if_softc; 1417 struct ieee80211com *ic = &sc->sc_ic; 1418 1419 ifp->if_timer = 0; 1420 1421 if (sc->sc_tx_timer > 0) { 1422 if (--sc->sc_tx_timer == 0) { 1423 printf("%s: device timeout\n", device_xname(sc->sc_dev)); 1424 /*ural_init(sc); XXX needs a process context! */ 1425 ifp->if_oerrors++; 1426 return; 1427 } 1428 ifp->if_timer = 1; 1429 } 1430 1431 ieee80211_watchdog(ic); 1432 } 1433 1434 /* 1435 * This function allows for fast channel switching in monitor mode (used by 1436 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 1437 * generate a new beacon frame. 1438 */ 1439 Static int 1440 ural_reset(struct ifnet *ifp) 1441 { 1442 struct ural_softc *sc = ifp->if_softc; 1443 struct ieee80211com *ic = &sc->sc_ic; 1444 1445 if (ic->ic_opmode != IEEE80211_M_MONITOR) 1446 return ENETRESET; 1447 1448 ural_set_chan(sc, ic->ic_curchan); 1449 1450 return 0; 1451 } 1452 1453 Static int 1454 ural_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1455 { 1456 #define IS_RUNNING(ifp) \ 1457 (((ifp)->if_flags & IFF_UP) && ((ifp)->if_flags & IFF_RUNNING)) 1458 1459 struct ural_softc *sc = ifp->if_softc; 1460 struct ieee80211com *ic = &sc->sc_ic; 1461 int s, error = 0; 1462 1463 s = splnet(); 1464 1465 switch (cmd) { 1466 case SIOCSIFFLAGS: 1467 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1468 break; 1469 /* XXX re-use ether_ioctl() */ 1470 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1471 case IFF_UP|IFF_RUNNING: 1472 ural_update_promisc(sc); 1473 break; 1474 case IFF_UP: 1475 ural_init(ifp); 1476 break; 1477 case IFF_RUNNING: 1478 ural_stop(ifp, 1); 1479 break; 1480 case 0: 1481 break; 1482 } 1483 break; 1484 1485 case SIOCADDMULTI: 1486 case SIOCDELMULTI: 1487 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1488 error = 0; 1489 } 1490 break; 1491 1492 default: 1493 error = ieee80211_ioctl(ic, cmd, data); 1494 } 1495 1496 if (error == ENETRESET) { 1497 if (IS_RUNNING(ifp) && 1498 (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)) 1499 ural_init(ifp); 1500 error = 0; 1501 } 1502 1503 splx(s); 1504 1505 return error; 1506 #undef IS_RUNNING 1507 } 1508 1509 Static void 1510 ural_set_testmode(struct ural_softc *sc) 1511 { 1512 usb_device_request_t req; 1513 usbd_status error; 1514 1515 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1516 req.bRequest = RAL_VENDOR_REQUEST; 1517 USETW(req.wValue, 4); 1518 USETW(req.wIndex, 1); 1519 USETW(req.wLength, 0); 1520 1521 error = usbd_do_request(sc->sc_udev, &req, NULL); 1522 if (error != 0) { 1523 printf("%s: could not set test mode: %s\n", 1524 device_xname(sc->sc_dev), usbd_errstr(error)); 1525 } 1526 } 1527 1528 Static void 1529 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1530 { 1531 usb_device_request_t req; 1532 usbd_status error; 1533 1534 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1535 req.bRequest = RAL_READ_EEPROM; 1536 USETW(req.wValue, 0); 1537 USETW(req.wIndex, addr); 1538 USETW(req.wLength, len); 1539 1540 error = usbd_do_request(sc->sc_udev, &req, buf); 1541 if (error != 0) { 1542 printf("%s: could not read EEPROM: %s\n", 1543 device_xname(sc->sc_dev), usbd_errstr(error)); 1544 } 1545 } 1546 1547 Static uint16_t 1548 ural_read(struct ural_softc *sc, uint16_t reg) 1549 { 1550 usb_device_request_t req; 1551 usbd_status error; 1552 uint16_t val; 1553 1554 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1555 req.bRequest = RAL_READ_MAC; 1556 USETW(req.wValue, 0); 1557 USETW(req.wIndex, reg); 1558 USETW(req.wLength, sizeof(uint16_t)); 1559 1560 error = usbd_do_request(sc->sc_udev, &req, &val); 1561 if (error != 0) { 1562 printf("%s: could not read MAC register: %s\n", 1563 device_xname(sc->sc_dev), usbd_errstr(error)); 1564 return 0; 1565 } 1566 1567 return le16toh(val); 1568 } 1569 1570 Static void 1571 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1572 { 1573 usb_device_request_t req; 1574 usbd_status error; 1575 1576 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1577 req.bRequest = RAL_READ_MULTI_MAC; 1578 USETW(req.wValue, 0); 1579 USETW(req.wIndex, reg); 1580 USETW(req.wLength, len); 1581 1582 error = usbd_do_request(sc->sc_udev, &req, buf); 1583 if (error != 0) { 1584 printf("%s: could not read MAC register: %s\n", 1585 device_xname(sc->sc_dev), usbd_errstr(error)); 1586 } 1587 } 1588 1589 Static void 1590 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1591 { 1592 usb_device_request_t req; 1593 usbd_status error; 1594 1595 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1596 req.bRequest = RAL_WRITE_MAC; 1597 USETW(req.wValue, val); 1598 USETW(req.wIndex, reg); 1599 USETW(req.wLength, 0); 1600 1601 error = usbd_do_request(sc->sc_udev, &req, NULL); 1602 if (error != 0) { 1603 printf("%s: could not write MAC register: %s\n", 1604 device_xname(sc->sc_dev), usbd_errstr(error)); 1605 } 1606 } 1607 1608 Static void 1609 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1610 { 1611 usb_device_request_t req; 1612 usbd_status error; 1613 1614 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1615 req.bRequest = RAL_WRITE_MULTI_MAC; 1616 USETW(req.wValue, 0); 1617 USETW(req.wIndex, reg); 1618 USETW(req.wLength, len); 1619 1620 error = usbd_do_request(sc->sc_udev, &req, buf); 1621 if (error != 0) { 1622 printf("%s: could not write MAC register: %s\n", 1623 device_xname(sc->sc_dev), usbd_errstr(error)); 1624 } 1625 } 1626 1627 Static void 1628 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1629 { 1630 uint16_t tmp; 1631 int ntries; 1632 1633 for (ntries = 0; ntries < 5; ntries++) { 1634 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1635 break; 1636 } 1637 if (ntries == 5) { 1638 printf("%s: could not write to BBP\n", device_xname(sc->sc_dev)); 1639 return; 1640 } 1641 1642 tmp = reg << 8 | val; 1643 ural_write(sc, RAL_PHY_CSR7, tmp); 1644 } 1645 1646 Static uint8_t 1647 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1648 { 1649 uint16_t val; 1650 int ntries; 1651 1652 val = RAL_BBP_WRITE | reg << 8; 1653 ural_write(sc, RAL_PHY_CSR7, val); 1654 1655 for (ntries = 0; ntries < 5; ntries++) { 1656 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1657 break; 1658 } 1659 if (ntries == 5) { 1660 printf("%s: could not read BBP\n", device_xname(sc->sc_dev)); 1661 return 0; 1662 } 1663 1664 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1665 } 1666 1667 Static void 1668 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1669 { 1670 uint32_t tmp; 1671 int ntries; 1672 1673 for (ntries = 0; ntries < 5; ntries++) { 1674 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1675 break; 1676 } 1677 if (ntries == 5) { 1678 printf("%s: could not write to RF\n", device_xname(sc->sc_dev)); 1679 return; 1680 } 1681 1682 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1683 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1684 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1685 1686 /* remember last written value in sc */ 1687 sc->rf_regs[reg] = val; 1688 1689 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1690 } 1691 1692 Static void 1693 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1694 { 1695 struct ieee80211com *ic = &sc->sc_ic; 1696 uint8_t power, tmp; 1697 u_int i, chan; 1698 1699 chan = ieee80211_chan2ieee(ic, c); 1700 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1701 return; 1702 1703 if (IEEE80211_IS_CHAN_2GHZ(c)) 1704 power = uimin(sc->txpow[chan - 1], 31); 1705 else 1706 power = 31; 1707 1708 /* adjust txpower using ifconfig settings */ 1709 power -= (100 - ic->ic_txpowlimit) / 8; 1710 1711 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1712 1713 switch (sc->rf_rev) { 1714 case RAL_RF_2522: 1715 ural_rf_write(sc, RAL_RF1, 0x00814); 1716 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1717 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1718 break; 1719 1720 case RAL_RF_2523: 1721 ural_rf_write(sc, RAL_RF1, 0x08804); 1722 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1723 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1724 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1725 break; 1726 1727 case RAL_RF_2524: 1728 ural_rf_write(sc, RAL_RF1, 0x0c808); 1729 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1730 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1731 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1732 break; 1733 1734 case RAL_RF_2525: 1735 ural_rf_write(sc, RAL_RF1, 0x08808); 1736 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1737 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1738 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1739 1740 ural_rf_write(sc, RAL_RF1, 0x08808); 1741 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1742 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1743 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1744 break; 1745 1746 case RAL_RF_2525E: 1747 ural_rf_write(sc, RAL_RF1, 0x08808); 1748 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1749 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1750 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1751 break; 1752 1753 case RAL_RF_2526: 1754 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1755 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1756 ural_rf_write(sc, RAL_RF1, 0x08804); 1757 1758 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1759 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1760 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1761 break; 1762 1763 /* dual-band RF */ 1764 case RAL_RF_5222: 1765 for (i = 0; ural_rf5222[i].chan != chan; i++); 1766 1767 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1768 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1769 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1770 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1771 break; 1772 } 1773 1774 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1775 ic->ic_state != IEEE80211_S_SCAN) { 1776 /* set Japan filter bit for channel 14 */ 1777 tmp = ural_bbp_read(sc, 70); 1778 1779 tmp &= ~RAL_JAPAN_FILTER; 1780 if (chan == 14) 1781 tmp |= RAL_JAPAN_FILTER; 1782 1783 ural_bbp_write(sc, 70, tmp); 1784 1785 /* clear CRC errors */ 1786 ural_read(sc, RAL_STA_CSR0); 1787 1788 DELAY(10000); 1789 ural_disable_rf_tune(sc); 1790 } 1791 } 1792 1793 /* 1794 * Disable RF auto-tuning. 1795 */ 1796 Static void 1797 ural_disable_rf_tune(struct ural_softc *sc) 1798 { 1799 uint32_t tmp; 1800 1801 if (sc->rf_rev != RAL_RF_2523) { 1802 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1803 ural_rf_write(sc, RAL_RF1, tmp); 1804 } 1805 1806 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1807 ural_rf_write(sc, RAL_RF3, tmp); 1808 1809 DPRINTFN(2, ("disabling RF autotune\n")); 1810 } 1811 1812 /* 1813 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1814 * synchronization. 1815 */ 1816 Static void 1817 ural_enable_tsf_sync(struct ural_softc *sc) 1818 { 1819 struct ieee80211com *ic = &sc->sc_ic; 1820 uint16_t logcwmin, preload, tmp; 1821 1822 /* first, disable TSF synchronization */ 1823 ural_write(sc, RAL_TXRX_CSR19, 0); 1824 1825 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1826 ural_write(sc, RAL_TXRX_CSR18, tmp); 1827 1828 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1829 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1830 tmp = logcwmin << 12 | preload; 1831 ural_write(sc, RAL_TXRX_CSR20, tmp); 1832 1833 /* finally, enable TSF synchronization */ 1834 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1835 if (ic->ic_opmode == IEEE80211_M_STA) 1836 tmp |= RAL_ENABLE_TSF_SYNC(1); 1837 else 1838 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1839 ural_write(sc, RAL_TXRX_CSR19, tmp); 1840 1841 DPRINTF(("enabling TSF synchronization\n")); 1842 } 1843 1844 Static void 1845 ural_update_slot(struct ifnet *ifp) 1846 { 1847 struct ural_softc *sc = ifp->if_softc; 1848 struct ieee80211com *ic = &sc->sc_ic; 1849 uint16_t slottime, sifs, eifs; 1850 1851 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 1852 1853 /* 1854 * These settings may sound a bit inconsistent but this is what the 1855 * reference driver does. 1856 */ 1857 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1858 sifs = 16 - RAL_RXTX_TURNAROUND; 1859 eifs = 364; 1860 } else { 1861 sifs = 10 - RAL_RXTX_TURNAROUND; 1862 eifs = 64; 1863 } 1864 1865 ural_write(sc, RAL_MAC_CSR10, slottime); 1866 ural_write(sc, RAL_MAC_CSR11, sifs); 1867 ural_write(sc, RAL_MAC_CSR12, eifs); 1868 } 1869 1870 Static void 1871 ural_set_txpreamble(struct ural_softc *sc) 1872 { 1873 uint16_t tmp; 1874 1875 tmp = ural_read(sc, RAL_TXRX_CSR10); 1876 1877 tmp &= ~RAL_SHORT_PREAMBLE; 1878 if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE) 1879 tmp |= RAL_SHORT_PREAMBLE; 1880 1881 ural_write(sc, RAL_TXRX_CSR10, tmp); 1882 } 1883 1884 Static void 1885 ural_set_basicrates(struct ural_softc *sc) 1886 { 1887 struct ieee80211com *ic = &sc->sc_ic; 1888 1889 /* update basic rate set */ 1890 if (ic->ic_curmode == IEEE80211_MODE_11B) { 1891 /* 11b basic rates: 1, 2Mbps */ 1892 ural_write(sc, RAL_TXRX_CSR11, 0x3); 1893 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 1894 /* 11a basic rates: 6, 12, 24Mbps */ 1895 ural_write(sc, RAL_TXRX_CSR11, 0x150); 1896 } else { 1897 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 1898 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 1899 } 1900 } 1901 1902 Static void 1903 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1904 { 1905 uint16_t tmp; 1906 1907 tmp = bssid[0] | bssid[1] << 8; 1908 ural_write(sc, RAL_MAC_CSR5, tmp); 1909 1910 tmp = bssid[2] | bssid[3] << 8; 1911 ural_write(sc, RAL_MAC_CSR6, tmp); 1912 1913 tmp = bssid[4] | bssid[5] << 8; 1914 ural_write(sc, RAL_MAC_CSR7, tmp); 1915 1916 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1917 } 1918 1919 Static void 1920 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1921 { 1922 uint16_t tmp; 1923 1924 tmp = addr[0] | addr[1] << 8; 1925 ural_write(sc, RAL_MAC_CSR2, tmp); 1926 1927 tmp = addr[2] | addr[3] << 8; 1928 ural_write(sc, RAL_MAC_CSR3, tmp); 1929 1930 tmp = addr[4] | addr[5] << 8; 1931 ural_write(sc, RAL_MAC_CSR4, tmp); 1932 1933 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1934 } 1935 1936 Static void 1937 ural_update_promisc(struct ural_softc *sc) 1938 { 1939 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1940 uint32_t tmp; 1941 1942 tmp = ural_read(sc, RAL_TXRX_CSR2); 1943 1944 tmp &= ~RAL_DROP_NOT_TO_ME; 1945 if (!(ifp->if_flags & IFF_PROMISC)) 1946 tmp |= RAL_DROP_NOT_TO_ME; 1947 1948 ural_write(sc, RAL_TXRX_CSR2, tmp); 1949 1950 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1951 "entering" : "leaving")); 1952 } 1953 1954 Static const char * 1955 ural_get_rf(int rev) 1956 { 1957 switch (rev) { 1958 case RAL_RF_2522: return "RT2522"; 1959 case RAL_RF_2523: return "RT2523"; 1960 case RAL_RF_2524: return "RT2524"; 1961 case RAL_RF_2525: return "RT2525"; 1962 case RAL_RF_2525E: return "RT2525e"; 1963 case RAL_RF_2526: return "RT2526"; 1964 case RAL_RF_5222: return "RT5222"; 1965 default: return "unknown"; 1966 } 1967 } 1968 1969 Static void 1970 ural_read_eeprom(struct ural_softc *sc) 1971 { 1972 struct ieee80211com *ic = &sc->sc_ic; 1973 uint16_t val; 1974 1975 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1976 val = le16toh(val); 1977 sc->rf_rev = (val >> 11) & 0x7; 1978 sc->hw_radio = (val >> 10) & 0x1; 1979 sc->led_mode = (val >> 6) & 0x7; 1980 sc->rx_ant = (val >> 4) & 0x3; 1981 sc->tx_ant = (val >> 2) & 0x3; 1982 sc->nb_ant = val & 0x3; 1983 1984 /* read MAC address */ 1985 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1986 1987 /* read default values for BBP registers */ 1988 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1989 1990 /* read Tx power for all b/g channels */ 1991 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1992 } 1993 1994 Static int 1995 ural_bbp_init(struct ural_softc *sc) 1996 { 1997 int i, ntries; 1998 1999 /* wait for BBP to be ready */ 2000 for (ntries = 0; ntries < 100; ntries++) { 2001 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 2002 break; 2003 DELAY(1000); 2004 } 2005 if (ntries == 100) { 2006 printf("%s: timeout waiting for BBP\n", device_xname(sc->sc_dev)); 2007 return EIO; 2008 } 2009 2010 /* initialize BBP registers to default values */ 2011 for (i = 0; i < __arraycount(ural_def_bbp); i++) 2012 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 2013 2014 #if 0 2015 /* initialize BBP registers to values stored in EEPROM */ 2016 for (i = 0; i < 16; i++) { 2017 if (sc->bbp_prom[i].reg == 0xff) 2018 continue; 2019 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2020 } 2021 #endif 2022 2023 return 0; 2024 } 2025 2026 Static void 2027 ural_set_txantenna(struct ural_softc *sc, int antenna) 2028 { 2029 uint16_t tmp; 2030 uint8_t tx; 2031 2032 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 2033 if (antenna == 1) 2034 tx |= RAL_BBP_ANTA; 2035 else if (antenna == 2) 2036 tx |= RAL_BBP_ANTB; 2037 else 2038 tx |= RAL_BBP_DIVERSITY; 2039 2040 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2041 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 2042 sc->rf_rev == RAL_RF_5222) 2043 tx |= RAL_BBP_FLIPIQ; 2044 2045 ural_bbp_write(sc, RAL_BBP_TX, tx); 2046 2047 /* update values in PHY_CSR5 and PHY_CSR6 */ 2048 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 2049 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 2050 2051 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 2052 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 2053 } 2054 2055 Static void 2056 ural_set_rxantenna(struct ural_softc *sc, int antenna) 2057 { 2058 uint8_t rx; 2059 2060 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 2061 if (antenna == 1) 2062 rx |= RAL_BBP_ANTA; 2063 else if (antenna == 2) 2064 rx |= RAL_BBP_ANTB; 2065 else 2066 rx |= RAL_BBP_DIVERSITY; 2067 2068 /* need to force no I/Q flip for RF 2525e and 2526 */ 2069 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 2070 rx &= ~RAL_BBP_FLIPIQ; 2071 2072 ural_bbp_write(sc, RAL_BBP_RX, rx); 2073 } 2074 2075 Static int 2076 ural_init(struct ifnet *ifp) 2077 { 2078 struct ural_softc *sc = ifp->if_softc; 2079 struct ieee80211com *ic = &sc->sc_ic; 2080 struct ieee80211_key *wk; 2081 uint16_t tmp; 2082 usbd_status error; 2083 int i, ntries; 2084 2085 ural_set_testmode(sc); 2086 ural_write(sc, 0x308, 0x00f0); /* XXX magic */ 2087 2088 ural_stop(ifp, 0); 2089 2090 /* initialize MAC registers to default values */ 2091 for (i = 0; i < __arraycount(ural_def_mac); i++) 2092 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 2093 2094 /* wait for BBP and RF to wake up (this can take a long time!) */ 2095 for (ntries = 0; ntries < 100; ntries++) { 2096 tmp = ural_read(sc, RAL_MAC_CSR17); 2097 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 2098 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 2099 break; 2100 DELAY(1000); 2101 } 2102 if (ntries == 100) { 2103 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2104 device_xname(sc->sc_dev)); 2105 error = EIO; 2106 goto fail; 2107 } 2108 2109 /* we're ready! */ 2110 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2111 2112 /* set basic rate set (will be updated later) */ 2113 ural_write(sc, RAL_TXRX_CSR11, 0x15f); 2114 2115 error = ural_bbp_init(sc); 2116 if (error != 0) 2117 goto fail; 2118 2119 /* set default BSS channel */ 2120 ural_set_chan(sc, ic->ic_curchan); 2121 2122 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2123 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2124 2125 ural_set_txantenna(sc, sc->tx_ant); 2126 ural_set_rxantenna(sc, sc->rx_ant); 2127 2128 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2129 ural_set_macaddr(sc, ic->ic_myaddr); 2130 2131 /* 2132 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2133 */ 2134 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2135 wk = &ic->ic_crypto.cs_nw_keys[i]; 2136 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2137 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2138 } 2139 2140 /* 2141 * Allocate xfer for AMRR statistics requests. 2142 */ 2143 struct usbd_pipe *pipe0 = usbd_get_pipe0(sc->sc_udev); 2144 error = usbd_create_xfer(pipe0, sizeof(sc->sta), 0, 0, &sc->amrr_xfer); 2145 if (error) { 2146 printf("%s: could not allocate AMRR xfer\n", 2147 device_xname(sc->sc_dev)); 2148 goto fail; 2149 } 2150 2151 /* 2152 * Open Tx and Rx USB bulk pipes. 2153 */ 2154 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2155 &sc->sc_tx_pipeh); 2156 if (error != 0) { 2157 printf("%s: could not open Tx pipe: %s\n", 2158 device_xname(sc->sc_dev), usbd_errstr(error)); 2159 goto fail; 2160 } 2161 2162 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2163 &sc->sc_rx_pipeh); 2164 if (error != 0) { 2165 printf("%s: could not open Rx pipe: %s\n", 2166 device_xname(sc->sc_dev), usbd_errstr(error)); 2167 goto fail; 2168 } 2169 2170 /* 2171 * Allocate Tx and Rx xfer queues. 2172 */ 2173 error = ural_alloc_tx_list(sc); 2174 if (error != 0) { 2175 printf("%s: could not allocate Tx list\n", 2176 device_xname(sc->sc_dev)); 2177 goto fail; 2178 } 2179 2180 error = ural_alloc_rx_list(sc); 2181 if (error != 0) { 2182 printf("%s: could not allocate Rx list\n", 2183 device_xname(sc->sc_dev)); 2184 goto fail; 2185 } 2186 2187 /* 2188 * Start up the receive pipe. 2189 */ 2190 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2191 struct ural_rx_data *data = &sc->rx_data[i]; 2192 2193 usbd_setup_xfer(data->xfer, data, data->buf, MCLBYTES, 2194 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2195 usbd_transfer(data->xfer); 2196 } 2197 2198 /* kick Rx */ 2199 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2200 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2201 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2202 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2203 tmp |= RAL_DROP_TODS; 2204 if (!(ifp->if_flags & IFF_PROMISC)) 2205 tmp |= RAL_DROP_NOT_TO_ME; 2206 } 2207 ural_write(sc, RAL_TXRX_CSR2, tmp); 2208 2209 ifp->if_flags &= ~IFF_OACTIVE; 2210 ifp->if_flags |= IFF_RUNNING; 2211 2212 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2213 if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL) 2214 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2215 } else 2216 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2217 2218 return 0; 2219 2220 fail: ural_stop(ifp, 1); 2221 return error; 2222 } 2223 2224 Static void 2225 ural_stop(struct ifnet *ifp, int disable) 2226 { 2227 struct ural_softc *sc = ifp->if_softc; 2228 struct ieee80211com *ic = &sc->sc_ic; 2229 2230 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2231 2232 sc->sc_tx_timer = 0; 2233 ifp->if_timer = 0; 2234 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2235 2236 /* disable Rx */ 2237 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2238 2239 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2240 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2241 ural_write(sc, RAL_MAC_CSR1, 0); 2242 2243 if (sc->amrr_xfer != NULL) { 2244 usbd_destroy_xfer(sc->amrr_xfer); 2245 sc->amrr_xfer = NULL; 2246 } 2247 2248 if (sc->sc_rx_pipeh != NULL) { 2249 usbd_abort_pipe(sc->sc_rx_pipeh); 2250 } 2251 2252 if (sc->sc_tx_pipeh != NULL) { 2253 usbd_abort_pipe(sc->sc_tx_pipeh); 2254 } 2255 2256 ural_free_rx_list(sc); 2257 ural_free_tx_list(sc); 2258 2259 if (sc->sc_rx_pipeh != NULL) { 2260 usbd_close_pipe(sc->sc_rx_pipeh); 2261 sc->sc_rx_pipeh = NULL; 2262 } 2263 2264 if (sc->sc_tx_pipeh != NULL) { 2265 usbd_close_pipe(sc->sc_tx_pipeh); 2266 sc->sc_tx_pipeh = NULL; 2267 } 2268 } 2269 2270 int 2271 ural_activate(device_t self, enum devact act) 2272 { 2273 struct ural_softc *sc = device_private(self); 2274 2275 switch (act) { 2276 case DVACT_DEACTIVATE: 2277 if_deactivate(&sc->sc_if); 2278 return 0; 2279 default: 2280 return EOPNOTSUPP; 2281 } 2282 } 2283 2284 Static void 2285 ural_amrr_start(struct ural_softc *sc, struct ieee80211_node *ni) 2286 { 2287 int i; 2288 2289 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2290 ural_read_multi(sc, RAL_STA_CSR0, sc->sta, sizeof(sc->sta)); 2291 2292 ieee80211_amrr_node_init(&sc->amrr, &sc->amn); 2293 2294 /* set rate to some reasonable initial value */ 2295 for (i = ni->ni_rates.rs_nrates - 1; 2296 i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72; 2297 i--); 2298 ni->ni_txrate = i; 2299 2300 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2301 } 2302 2303 Static void 2304 ural_amrr_timeout(void *arg) 2305 { 2306 struct ural_softc *sc = (struct ural_softc *)arg; 2307 usb_device_request_t req; 2308 int s; 2309 2310 s = splusb(); 2311 2312 /* 2313 * Asynchronously read statistic registers (cleared by read). 2314 */ 2315 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2316 req.bRequest = RAL_READ_MULTI_MAC; 2317 USETW(req.wValue, 0); 2318 USETW(req.wIndex, RAL_STA_CSR0); 2319 USETW(req.wLength, sizeof(sc->sta)); 2320 2321 usbd_setup_default_xfer(sc->amrr_xfer, sc->sc_udev, sc, 2322 USBD_DEFAULT_TIMEOUT, &req, sc->sta, sizeof(sc->sta), 0, 2323 ural_amrr_update); 2324 (void)usbd_transfer(sc->amrr_xfer); 2325 2326 splx(s); 2327 } 2328 2329 Static void 2330 ural_amrr_update(struct usbd_xfer *xfer, void * priv, 2331 usbd_status status) 2332 { 2333 struct ural_softc *sc = (struct ural_softc *)priv; 2334 struct ifnet *ifp = sc->sc_ic.ic_ifp; 2335 2336 if (status != USBD_NORMAL_COMPLETION) { 2337 printf("%s: could not retrieve Tx statistics - " 2338 "cancelling automatic rate control\n", 2339 device_xname(sc->sc_dev)); 2340 return; 2341 } 2342 2343 /* count TX retry-fail as Tx errors */ 2344 ifp->if_oerrors += sc->sta[9]; 2345 2346 sc->amn.amn_retrycnt = 2347 sc->sta[7] + /* TX one-retry ok count */ 2348 sc->sta[8] + /* TX more-retry ok count */ 2349 sc->sta[9]; /* TX retry-fail count */ 2350 2351 sc->amn.amn_txcnt = 2352 sc->amn.amn_retrycnt + 2353 sc->sta[6]; /* TX no-retry ok count */ 2354 2355 ieee80211_amrr_choose(&sc->amrr, sc->sc_ic.ic_bss, &sc->amn); 2356 2357 callout_reset(&sc->sc_amrr_ch, hz, ural_amrr_timeout, sc); 2358 } 2359
Indexes created Tue Sep 30 06:09:59 GMT 2025