if_ural.c revision 1.7
1 /* $NetBSD: if_ural.c,v 1.7 2005/08/16 19:35:17 drochner Exp $ */ 2 /* $OpenBSD: if_ral.c,v 1.38 2005/07/07 08:33:22 jsg Exp $ */ 3 /* $FreeBSD: /a/cvsroot/freebsd.repo/ncvs/src/sys/dev/usb/if_ural.c,v 1.10 2005/07/10 00:17:05 sam Exp $ */ 4 5 /*- 6 * Copyright (c) 2005 7 * Damien Bergamini <damien.bergamini (at) free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2500USB chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: if_ural.c,v 1.7 2005/08/16 19:35:17 drochner Exp $"); 29 30 #include "bpfilter.h" 31 32 #include <sys/param.h> 33 #include <sys/sockio.h> 34 #include <sys/sysctl.h> 35 #include <sys/mbuf.h> 36 #include <sys/kernel.h> 37 #include <sys/socket.h> 38 #include <sys/systm.h> 39 #include <sys/malloc.h> 40 #include <sys/conf.h> 41 #include <sys/device.h> 42 43 #include <machine/bus.h> 44 #include <machine/endian.h> 45 #include <machine/intr.h> 46 47 #if NBPFILTER > 0 48 #include <net/bpf.h> 49 #endif 50 #include <net/if.h> 51 #include <net/if_arp.h> 52 #include <net/if_dl.h> 53 #include <net/if_ether.h> 54 #include <net/if_media.h> 55 #include <net/if_types.h> 56 57 #include <netinet/in.h> 58 #include <netinet/in_systm.h> 59 #include <netinet/in_var.h> 60 #include <netinet/ip.h> 61 62 #include <net80211/ieee80211_netbsd.h> 63 #include <net80211/ieee80211_var.h> 64 #include <net80211/ieee80211_radiotap.h> 65 66 #include <dev/usb/usb.h> 67 #include <dev/usb/usbdi.h> 68 #include <dev/usb/usbdi_util.h> 69 #include <dev/usb/usbdevs.h> 70 71 #include <dev/usb/if_uralreg.h> 72 #include <dev/usb/if_uralvar.h> 73 74 #ifdef USB_DEBUG 75 #define URAL_DEBUG 76 #endif 77 78 #ifdef URAL_DEBUG 79 #define DPRINTF(x) do { if (ural_debug) logprintf x; } while (0) 80 #define DPRINTFN(n, x) do { if (ural_debug >= (n)) logprintf x; } while (0) 81 int ural_debug = 0; 82 #else 83 #define DPRINTF(x) 84 #define DPRINTFN(n, x) 85 #endif 86 87 /* various supported device vendors/products */ 88 static const struct usb_devno ural_devs[] = { 89 { USB_VENDOR_ASUSTEK, USB_PRODUCT_ASUSTEK_WL167G }, 90 { USB_VENDOR_ASUSTEK, USB_PRODUCT_RALINK_RT2570 }, 91 { USB_VENDOR_BELKIN, USB_PRODUCT_BELKIN_F5D7050 }, 92 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54G }, 93 { USB_VENDOR_CISCOLINKSYS, USB_PRODUCT_CISCOLINKSYS_WUSB54GP }, 94 { USB_VENDOR_CONCEPTRONIC, USB_PRODUCT_CONCEPTRONIC_C54RU }, 95 { USB_VENDOR_DLINK, USB_PRODUCT_DLINK_DWLG122 }, 96 { USB_VENDOR_GIGABYTE, USB_PRODUCT_GIGABYTE_GNWBKG }, 97 { USB_VENDOR_GUILLEMOT, USB_PRODUCT_GUILLEMOT_HWGUSB254 }, 98 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54 }, 99 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54AI }, 100 { USB_VENDOR_MELCO, USB_PRODUCT_MELCO_KG54YB }, 101 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6861 }, 102 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6865 }, 103 { USB_VENDOR_MSI, USB_PRODUCT_MSI_MS6869 }, 104 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570 }, 105 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_2 }, 106 { USB_VENDOR_RALINK, USB_PRODUCT_RALINK_RT2570_3 }, 107 { USB_VENDOR_SMC, USB_PRODUCT_SMC_2862WG }, 108 { USB_VENDOR_SURECOM, USB_PRODUCT_SURECOM_EP9001G }, 109 { USB_VENDOR_VTECH, USB_PRODUCT_VTECH_RT2570 }, 110 { USB_VENDOR_ZINWELL, USB_PRODUCT_ZINWELL_ZWXG261 }, 111 }; 112 113 Static int ural_alloc_tx_list(struct ural_softc *); 114 Static void ural_free_tx_list(struct ural_softc *); 115 Static int ural_alloc_rx_list(struct ural_softc *); 116 Static void ural_free_rx_list(struct ural_softc *); 117 Static int ural_media_change(struct ifnet *); 118 Static void ural_next_scan(void *); 119 Static void ural_task(void *); 120 Static int ural_newstate(struct ieee80211com *, 121 enum ieee80211_state, int); 122 Static void ural_txeof(usbd_xfer_handle, usbd_private_handle, 123 usbd_status); 124 Static void ural_rxeof(usbd_xfer_handle, usbd_private_handle, 125 usbd_status); 126 Static int ural_ack_rate(int); 127 Static uint16_t ural_txtime(int, int, uint32_t); 128 Static uint8_t ural_plcp_signal(int); 129 Static void ural_setup_tx_desc(struct ural_softc *, 130 struct ural_tx_desc *, uint32_t, int, int); 131 Static int ural_tx_bcn(struct ural_softc *, struct mbuf *, 132 struct ieee80211_node *); 133 Static int ural_tx_mgt(struct ural_softc *, struct mbuf *, 134 struct ieee80211_node *); 135 Static int ural_tx_data(struct ural_softc *, struct mbuf *, 136 struct ieee80211_node *); 137 Static void ural_start(struct ifnet *); 138 Static void ural_watchdog(struct ifnet *); 139 Static int ural_ioctl(struct ifnet *, u_long, caddr_t); 140 Static void ural_eeprom_read(struct ural_softc *, uint16_t, void *, 141 int); 142 Static uint16_t ural_read(struct ural_softc *, uint16_t); 143 Static void ural_read_multi(struct ural_softc *, uint16_t, void *, 144 int); 145 Static void ural_write(struct ural_softc *, uint16_t, uint16_t); 146 Static void ural_write_multi(struct ural_softc *, uint16_t, void *, 147 int); 148 Static void ural_bbp_write(struct ural_softc *, uint8_t, uint8_t); 149 Static uint8_t ural_bbp_read(struct ural_softc *, uint8_t); 150 Static void ural_rf_write(struct ural_softc *, uint8_t, uint32_t); 151 Static void ural_set_chan(struct ural_softc *, 152 struct ieee80211_channel *); 153 Static void ural_disable_rf_tune(struct ural_softc *); 154 Static void ural_enable_tsf_sync(struct ural_softc *); 155 Static void ural_set_bssid(struct ural_softc *, uint8_t *); 156 Static void ural_set_macaddr(struct ural_softc *, uint8_t *); 157 Static void ural_update_promisc(struct ural_softc *); 158 Static const char *ural_get_rf(int); 159 Static void ural_read_eeprom(struct ural_softc *); 160 Static int ural_bbp_init(struct ural_softc *); 161 Static void ural_set_txantenna(struct ural_softc *, int); 162 Static void ural_set_rxantenna(struct ural_softc *, int); 163 Static int ural_init(struct ifnet *); 164 Static void ural_stop(struct ifnet *, int); 165 166 /* 167 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 168 */ 169 static const struct ieee80211_rateset ural_rateset_11a = 170 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 171 172 static const struct ieee80211_rateset ural_rateset_11b = 173 { 4, { 2, 4, 11, 22 } }; 174 175 static const struct ieee80211_rateset ural_rateset_11g = 176 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 177 178 /* 179 * Default values for MAC registers; values taken from the reference driver. 180 */ 181 static const struct { 182 uint16_t reg; 183 uint16_t val; 184 } ural_def_mac[] = { 185 { RAL_TXRX_CSR5, 0x8c8d }, 186 { RAL_TXRX_CSR6, 0x8b8a }, 187 { RAL_TXRX_CSR7, 0x8687 }, 188 { RAL_TXRX_CSR8, 0x0085 }, 189 { RAL_MAC_CSR13, 0x1111 }, 190 { RAL_MAC_CSR14, 0x1e11 }, 191 { RAL_TXRX_CSR21, 0xe78f }, 192 { RAL_MAC_CSR9, 0xff1d }, 193 { RAL_MAC_CSR11, 0x0002 }, 194 { RAL_MAC_CSR22, 0x0053 }, 195 { RAL_MAC_CSR15, 0x0000 }, 196 { RAL_MAC_CSR8, 0x0780 }, 197 { RAL_TXRX_CSR19, 0x0000 }, 198 { RAL_TXRX_CSR18, 0x005a }, 199 { RAL_PHY_CSR2, 0x0000 }, 200 { RAL_TXRX_CSR0, 0x1ec0 }, 201 { RAL_PHY_CSR4, 0x000f } 202 }; 203 204 /* 205 * Default values for BBP registers; values taken from the reference driver. 206 */ 207 static const struct { 208 uint8_t reg; 209 uint8_t val; 210 } ural_def_bbp[] = { 211 { 3, 0x02 }, 212 { 4, 0x19 }, 213 { 14, 0x1c }, 214 { 15, 0x30 }, 215 { 16, 0xac }, 216 { 17, 0x48 }, 217 { 18, 0x18 }, 218 { 19, 0xff }, 219 { 20, 0x1e }, 220 { 21, 0x08 }, 221 { 22, 0x08 }, 222 { 23, 0x08 }, 223 { 24, 0x80 }, 224 { 25, 0x50 }, 225 { 26, 0x08 }, 226 { 27, 0x23 }, 227 { 30, 0x10 }, 228 { 31, 0x2b }, 229 { 32, 0xb9 }, 230 { 34, 0x12 }, 231 { 35, 0x50 }, 232 { 39, 0xc4 }, 233 { 40, 0x02 }, 234 { 41, 0x60 }, 235 { 53, 0x10 }, 236 { 54, 0x18 }, 237 { 56, 0x08 }, 238 { 57, 0x10 }, 239 { 58, 0x08 }, 240 { 61, 0x60 }, 241 { 62, 0x10 }, 242 { 75, 0xff } 243 }; 244 245 /* 246 * Default values for RF register R2 indexed by channel numbers. 247 */ 248 static const uint32_t ural_rf2522_r2[] = { 249 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 250 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 251 }; 252 253 static const uint32_t ural_rf2523_r2[] = { 254 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 255 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 256 }; 257 258 static const uint32_t ural_rf2524_r2[] = { 259 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 260 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 261 }; 262 263 static const uint32_t ural_rf2525_r2[] = { 264 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 265 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 266 }; 267 268 static const uint32_t ural_rf2525_hi_r2[] = { 269 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 270 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 271 }; 272 273 static const uint32_t ural_rf2525e_r2[] = { 274 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 275 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 276 }; 277 278 static const uint32_t ural_rf2526_hi_r2[] = { 279 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 280 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 281 }; 282 283 static const uint32_t ural_rf2526_r2[] = { 284 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 285 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 286 }; 287 288 /* 289 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 290 * values taken from the reference driver. 291 */ 292 static const struct { 293 uint8_t chan; 294 uint32_t r1; 295 uint32_t r2; 296 uint32_t r4; 297 } ural_rf5222[] = { 298 /* channels in the 2.4GHz band */ 299 { 1, 0x08808, 0x0044d, 0x00282 }, 300 { 2, 0x08808, 0x0044e, 0x00282 }, 301 { 3, 0x08808, 0x0044f, 0x00282 }, 302 { 4, 0x08808, 0x00460, 0x00282 }, 303 { 5, 0x08808, 0x00461, 0x00282 }, 304 { 6, 0x08808, 0x00462, 0x00282 }, 305 { 7, 0x08808, 0x00463, 0x00282 }, 306 { 8, 0x08808, 0x00464, 0x00282 }, 307 { 9, 0x08808, 0x00465, 0x00282 }, 308 { 10, 0x08808, 0x00466, 0x00282 }, 309 { 11, 0x08808, 0x00467, 0x00282 }, 310 { 12, 0x08808, 0x00468, 0x00282 }, 311 { 13, 0x08808, 0x00469, 0x00282 }, 312 { 14, 0x08808, 0x0046b, 0x00286 }, 313 314 /* channels in the 5.2GHz band */ 315 { 36, 0x08804, 0x06225, 0x00287 }, 316 { 40, 0x08804, 0x06226, 0x00287 }, 317 { 44, 0x08804, 0x06227, 0x00287 }, 318 { 48, 0x08804, 0x06228, 0x00287 }, 319 { 52, 0x08804, 0x06229, 0x00287 }, 320 { 56, 0x08804, 0x0622a, 0x00287 }, 321 { 60, 0x08804, 0x0622b, 0x00287 }, 322 { 64, 0x08804, 0x0622c, 0x00287 }, 323 324 { 100, 0x08804, 0x02200, 0x00283 }, 325 { 104, 0x08804, 0x02201, 0x00283 }, 326 { 108, 0x08804, 0x02202, 0x00283 }, 327 { 112, 0x08804, 0x02203, 0x00283 }, 328 { 116, 0x08804, 0x02204, 0x00283 }, 329 { 120, 0x08804, 0x02205, 0x00283 }, 330 { 124, 0x08804, 0x02206, 0x00283 }, 331 { 128, 0x08804, 0x02207, 0x00283 }, 332 { 132, 0x08804, 0x02208, 0x00283 }, 333 { 136, 0x08804, 0x02209, 0x00283 }, 334 { 140, 0x08804, 0x0220a, 0x00283 }, 335 336 { 149, 0x08808, 0x02429, 0x00281 }, 337 { 153, 0x08808, 0x0242b, 0x00281 }, 338 { 157, 0x08808, 0x0242d, 0x00281 }, 339 { 161, 0x08808, 0x0242f, 0x00281 } 340 }; 341 342 USB_DECLARE_DRIVER(ural); 343 344 USB_MATCH(ural) 345 { 346 USB_MATCH_START(ural, uaa); 347 348 if (uaa->iface != NULL) 349 return UMATCH_NONE; 350 351 return (usb_lookup(ural_devs, uaa->vendor, uaa->product) != NULL) ? 352 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 353 } 354 355 USB_ATTACH(ural) 356 { 357 USB_ATTACH_START(ural, sc, uaa); 358 struct ieee80211com *ic = &sc->sc_ic; 359 struct ifnet *ifp = &sc->sc_if; 360 usb_interface_descriptor_t *id; 361 usb_endpoint_descriptor_t *ed; 362 usbd_status error; 363 char *devinfop; 364 int i; 365 366 sc->sc_udev = uaa->device; 367 368 devinfop = usbd_devinfo_alloc(sc->sc_udev, 0); 369 USB_ATTACH_SETUP; 370 printf("%s: %s\n", USBDEVNAME(sc->sc_dev), devinfop); 371 usbd_devinfo_free(devinfop); 372 373 if (usbd_set_config_no(sc->sc_udev, RAL_CONFIG_NO, 0) != 0) { 374 printf("%s: could not set configuration no\n", 375 USBDEVNAME(sc->sc_dev)); 376 USB_ATTACH_ERROR_RETURN; 377 } 378 379 /* get the first interface handle */ 380 error = usbd_device2interface_handle(sc->sc_udev, RAL_IFACE_INDEX, 381 &sc->sc_iface); 382 if (error != 0) { 383 printf("%s: could not get interface handle\n", 384 USBDEVNAME(sc->sc_dev)); 385 USB_ATTACH_ERROR_RETURN; 386 } 387 388 /* 389 * Find endpoints. 390 */ 391 id = usbd_get_interface_descriptor(sc->sc_iface); 392 393 sc->sc_rx_no = sc->sc_tx_no = -1; 394 for (i = 0; i < id->bNumEndpoints; i++) { 395 ed = usbd_interface2endpoint_descriptor(sc->sc_iface, i); 396 if (ed == NULL) { 397 printf("%s: no endpoint descriptor for iface %d\n", 398 USBDEVNAME(sc->sc_dev), i); 399 USB_ATTACH_ERROR_RETURN; 400 } 401 402 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN && 403 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 404 sc->sc_rx_no = ed->bEndpointAddress; 405 else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT && 406 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) 407 sc->sc_tx_no = ed->bEndpointAddress; 408 } 409 if (sc->sc_rx_no == -1 || sc->sc_tx_no == -1) { 410 printf("%s: missing endpoint\n", USBDEVNAME(sc->sc_dev)); 411 USB_ATTACH_ERROR_RETURN; 412 } 413 414 usb_init_task(&sc->sc_task, ural_task, sc); 415 callout_init(&sc->scan_ch); 416 417 /* retrieve RT2570 rev. no */ 418 sc->asic_rev = ural_read(sc, RAL_MAC_CSR0); 419 420 /* retrieve MAC address and various other things from EEPROM */ 421 ural_read_eeprom(sc); 422 423 printf("%s: MAC/BBP RT2570 (rev 0x%02x), RF %s, address %s\n", 424 USBDEVNAME(sc->sc_dev), sc->asic_rev, ural_get_rf(sc->rf_rev), 425 ether_sprintf(ic->ic_myaddr)); 426 427 ic->ic_ifp = ifp; 428 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 429 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 430 ic->ic_state = IEEE80211_S_INIT; 431 432 /* set device capabilities */ 433 ic->ic_caps = IEEE80211_C_MONITOR | IEEE80211_C_IBSS | 434 IEEE80211_C_HOSTAP | IEEE80211_C_SHPREAMBLE | IEEE80211_C_SHSLOT | 435 IEEE80211_C_PMGT | IEEE80211_C_TXPMGT | IEEE80211_C_WPA; 436 437 if (sc->rf_rev == RAL_RF_5222) { 438 /* set supported .11a rates */ 439 ic->ic_sup_rates[IEEE80211_MODE_11A] = ural_rateset_11a; 440 441 /* set supported .11a channels */ 442 for (i = 36; i <= 64; i += 4) { 443 ic->ic_channels[i].ic_freq = 444 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 445 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 446 } 447 for (i = 100; i <= 140; i += 4) { 448 ic->ic_channels[i].ic_freq = 449 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 450 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 451 } 452 for (i = 149; i <= 161; i += 4) { 453 ic->ic_channels[i].ic_freq = 454 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 455 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 456 } 457 } 458 459 /* set supported .11b and .11g rates */ 460 ic->ic_sup_rates[IEEE80211_MODE_11B] = ural_rateset_11b; 461 ic->ic_sup_rates[IEEE80211_MODE_11G] = ural_rateset_11g; 462 463 /* set supported .11b and .11g channels (1 through 14) */ 464 for (i = 1; i <= 14; i++) { 465 ic->ic_channels[i].ic_freq = 466 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 467 ic->ic_channels[i].ic_flags = 468 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 469 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 470 } 471 472 ifp->if_softc = sc; 473 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 474 ifp->if_init = ural_init; 475 ifp->if_stop = ural_stop; 476 ifp->if_ioctl = ural_ioctl; 477 ifp->if_start = ural_start; 478 ifp->if_watchdog = ural_watchdog; 479 IFQ_SET_READY(&ifp->if_snd); 480 memcpy(ifp->if_xname, USBDEVNAME(sc->sc_dev), IFNAMSIZ); 481 482 if_attach(ifp); 483 ieee80211_ifattach(ic); 484 485 /* override state transition machine */ 486 sc->sc_newstate = ic->ic_newstate; 487 ic->ic_newstate = ural_newstate; 488 ieee80211_media_init(ic, ural_media_change, ieee80211_media_status); 489 490 #if NBPFILTER > 0 491 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 492 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 493 494 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 495 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 496 sc->sc_rxtap.wr_ihdr.it_present = htole32(RAL_RX_RADIOTAP_PRESENT); 497 498 sc->sc_txtap_len = sizeof sc->sc_txtapu; 499 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 500 sc->sc_txtap.wt_ihdr.it_present = htole32(RAL_TX_RADIOTAP_PRESENT); 501 #endif 502 503 ieee80211_announce(ic); 504 505 usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, sc->sc_udev, 506 USBDEV(sc->sc_dev)); 507 508 USB_ATTACH_SUCCESS_RETURN; 509 } 510 511 USB_DETACH(ural) 512 { 513 USB_DETACH_START(ural, sc); 514 struct ieee80211com *ic = &sc->sc_ic; 515 struct ifnet *ifp = &sc->sc_if; 516 int s; 517 518 s = splusb(); 519 520 usb_rem_task(sc->sc_udev, &sc->sc_task); 521 callout_stop(&sc->scan_ch); 522 523 if (sc->sc_rx_pipeh != NULL) { 524 usbd_abort_pipe(sc->sc_rx_pipeh); 525 usbd_close_pipe(sc->sc_rx_pipeh); 526 } 527 528 if (sc->sc_tx_pipeh != NULL) { 529 usbd_abort_pipe(sc->sc_tx_pipeh); 530 usbd_close_pipe(sc->sc_tx_pipeh); 531 } 532 533 ural_free_rx_list(sc); 534 ural_free_tx_list(sc); 535 536 #if NBPFILTER > 0 537 bpfdetach(ifp); 538 #endif 539 ieee80211_ifdetach(ic); 540 if_detach(ifp); 541 542 splx(s); 543 544 usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, 545 USBDEV(sc->sc_dev)); 546 547 return 0; 548 } 549 550 Static int 551 ural_alloc_tx_list(struct ural_softc *sc) 552 { 553 struct ural_tx_data *data; 554 int i, error; 555 556 sc->tx_queued = 0; 557 558 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 559 data = &sc->tx_data[i]; 560 561 data->sc = sc; 562 563 data->xfer = usbd_alloc_xfer(sc->sc_udev); 564 if (data->xfer == NULL) { 565 printf("%s: could not allocate tx xfer\n", 566 USBDEVNAME(sc->sc_dev)); 567 error = ENOMEM; 568 goto fail; 569 } 570 571 data->buf = usbd_alloc_buffer(data->xfer, 572 RAL_TX_DESC_SIZE + MCLBYTES); 573 if (data->buf == NULL) { 574 printf("%s: could not allocate tx buffer\n", 575 USBDEVNAME(sc->sc_dev)); 576 error = ENOMEM; 577 goto fail; 578 } 579 } 580 581 return 0; 582 583 fail: ural_free_tx_list(sc); 584 return error; 585 } 586 587 Static void 588 ural_free_tx_list(struct ural_softc *sc) 589 { 590 struct ural_tx_data *data; 591 int i; 592 593 for (i = 0; i < RAL_TX_LIST_COUNT; i++) { 594 data = &sc->tx_data[i]; 595 596 if (data->xfer != NULL) { 597 usbd_free_xfer(data->xfer); 598 data->xfer = NULL; 599 } 600 601 if (data->ni != NULL) { 602 ieee80211_free_node(data->ni); 603 data->ni = NULL; 604 } 605 } 606 } 607 608 Static int 609 ural_alloc_rx_list(struct ural_softc *sc) 610 { 611 struct ural_rx_data *data; 612 int i, error; 613 614 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 615 data = &sc->rx_data[i]; 616 617 data->sc = sc; 618 619 data->xfer = usbd_alloc_xfer(sc->sc_udev); 620 if (data->xfer == NULL) { 621 printf("%s: could not allocate rx xfer\n", 622 USBDEVNAME(sc->sc_dev)); 623 error = ENOMEM; 624 goto fail; 625 } 626 627 if (usbd_alloc_buffer(data->xfer, MCLBYTES) == NULL) { 628 printf("%s: could not allocate rx buffer\n", 629 USBDEVNAME(sc->sc_dev)); 630 error = ENOMEM; 631 goto fail; 632 } 633 634 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 635 if (data->m == NULL) { 636 printf("%s: could not allocate rx mbuf\n", 637 USBDEVNAME(sc->sc_dev)); 638 error = ENOMEM; 639 goto fail; 640 } 641 642 MCLGET(data->m, M_DONTWAIT); 643 if (!(data->m->m_flags & M_EXT)) { 644 printf("%s: could not allocate rx mbuf cluster\n", 645 USBDEVNAME(sc->sc_dev)); 646 error = ENOMEM; 647 goto fail; 648 } 649 650 data->buf = mtod(data->m, uint8_t *); 651 } 652 653 return 0; 654 655 fail: ural_free_tx_list(sc); 656 return error; 657 } 658 659 Static void 660 ural_free_rx_list(struct ural_softc *sc) 661 { 662 struct ural_rx_data *data; 663 int i; 664 665 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 666 data = &sc->rx_data[i]; 667 668 if (data->xfer != NULL) { 669 usbd_free_xfer(data->xfer); 670 data->xfer = NULL; 671 } 672 673 if (data->m != NULL) { 674 m_freem(data->m); 675 data->m = NULL; 676 } 677 } 678 } 679 680 Static int 681 ural_media_change(struct ifnet *ifp) 682 { 683 int error; 684 685 error = ieee80211_media_change(ifp); 686 if (error != ENETRESET) 687 return error; 688 689 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 690 ural_init(ifp); 691 692 return 0; 693 } 694 695 /* 696 * This function is called periodically (every 200ms) during scanning to 697 * switch from one channel to another. 698 */ 699 Static void 700 ural_next_scan(void *arg) 701 { 702 struct ural_softc *sc = arg; 703 struct ieee80211com *ic = &sc->sc_ic; 704 705 if (ic->ic_state == IEEE80211_S_SCAN) 706 ieee80211_next_scan(ic); 707 } 708 709 Static void 710 ural_task(void *arg) 711 { 712 struct ural_softc *sc = arg; 713 struct ieee80211com *ic = &sc->sc_ic; 714 enum ieee80211_state ostate; 715 struct mbuf *m; 716 717 ostate = ic->ic_state; 718 719 switch (sc->sc_state) { 720 case IEEE80211_S_INIT: 721 if (ostate == IEEE80211_S_RUN) { 722 /* abort TSF synchronization */ 723 ural_write(sc, RAL_TXRX_CSR19, 0); 724 725 /* force tx led to stop blinking */ 726 ural_write(sc, RAL_MAC_CSR20, 0); 727 } 728 break; 729 730 case IEEE80211_S_SCAN: 731 ural_set_chan(sc, ic->ic_bss->ni_chan); 732 callout_reset(&sc->scan_ch, hz / 5, ural_next_scan, sc); 733 break; 734 735 case IEEE80211_S_AUTH: 736 ural_set_chan(sc, ic->ic_bss->ni_chan); 737 break; 738 739 case IEEE80211_S_ASSOC: 740 ural_set_chan(sc, ic->ic_bss->ni_chan); 741 break; 742 743 case IEEE80211_S_RUN: 744 ural_set_chan(sc, ic->ic_bss->ni_chan); 745 746 if (ic->ic_opmode != IEEE80211_M_MONITOR) 747 ural_set_bssid(sc, ic->ic_bss->ni_bssid); 748 749 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 750 ic->ic_opmode == IEEE80211_M_IBSS) { 751 m = ieee80211_beacon_alloc(ic, ic->ic_bss, &sc->sc_bo); 752 if (m == NULL) { 753 printf("%s: could not allocate beacon\n", 754 USBDEVNAME(sc->sc_dev)); 755 return; 756 } 757 758 if (ural_tx_bcn(sc, m, ic->ic_bss) != 0) { 759 m_freem(m); 760 printf("%s: could not transmit beacon\n", 761 USBDEVNAME(sc->sc_dev)); 762 return; 763 } 764 765 /* beacon is no longer needed */ 766 m_freem(m); 767 } 768 769 /* make tx led blink on tx (controlled by ASIC) */ 770 ural_write(sc, RAL_MAC_CSR20, 1); 771 772 if (ic->ic_opmode != IEEE80211_M_MONITOR) 773 ural_enable_tsf_sync(sc); 774 break; 775 } 776 777 sc->sc_newstate(ic, sc->sc_state, -1); 778 } 779 780 Static int 781 ural_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 782 { 783 struct ural_softc *sc = ic->ic_ifp->if_softc; 784 785 usb_rem_task(sc->sc_udev, &sc->sc_task); 786 callout_stop(&sc->scan_ch); 787 788 /* do it in a process context */ 789 sc->sc_state = nstate; 790 usb_add_task(sc->sc_udev, &sc->sc_task); 791 792 return 0; 793 } 794 795 /* quickly determine if a given rate is CCK or OFDM */ 796 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 797 798 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 799 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 800 #define RAL_SIFS 10 801 802 Static void 803 ural_txeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 804 { 805 struct ural_tx_data *data = priv; 806 struct ural_softc *sc = data->sc; 807 struct ifnet *ifp = &sc->sc_if; 808 int s; 809 810 if (status != USBD_NORMAL_COMPLETION) { 811 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 812 return; 813 814 printf("%s: could not transmit buffer: %s\n", 815 USBDEVNAME(sc->sc_dev), usbd_errstr(status)); 816 817 if (status == USBD_STALLED) 818 usbd_clear_endpoint_stall(sc->sc_tx_pipeh); 819 820 ifp->if_oerrors++; 821 return; 822 } 823 824 s = splnet(); 825 826 m_freem(data->m); 827 data->m = NULL; 828 ieee80211_free_node(data->ni); 829 data->ni = NULL; 830 831 sc->tx_queued--; 832 ifp->if_opackets++; 833 834 DPRINTFN(10, ("tx done\n")); 835 836 sc->sc_tx_timer = 0; 837 ifp->if_flags &= ~IFF_OACTIVE; 838 ural_start(ifp); 839 840 splx(s); 841 } 842 843 Static void 844 ural_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status) 845 { 846 struct ural_rx_data *data = priv; 847 struct ural_softc *sc = data->sc; 848 struct ieee80211com *ic = &sc->sc_ic; 849 struct ifnet *ifp = &sc->sc_if; 850 struct ural_rx_desc *desc; 851 struct ieee80211_frame_min *wh; 852 struct ieee80211_node *ni; 853 struct mbuf *m; 854 int s, len; 855 856 if (status != USBD_NORMAL_COMPLETION) { 857 if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) 858 return; 859 860 if (status == USBD_STALLED) 861 usbd_clear_endpoint_stall(sc->sc_rx_pipeh); 862 goto skip; 863 } 864 865 usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL); 866 867 if (len < RAL_RX_DESC_SIZE) { 868 printf("%s: xfer too short %d\n", USBDEVNAME(sc->sc_dev), len); 869 ifp->if_ierrors++; 870 goto skip; 871 } 872 873 /* rx descriptor is located at the end */ 874 desc = (struct ural_rx_desc *)(data->buf + len - RAL_RX_DESC_SIZE); 875 876 if (le32toh(desc->flags) & (RAL_RX_PHY_ERROR | RAL_RX_CRC_ERROR)) { 877 /* 878 * This should not happen since we did not request to receive 879 * those frames when we filled RAL_TXRX_CSR2. 880 */ 881 DPRINTFN(5, ("PHY or CRC error\n")); 882 ifp->if_ierrors++; 883 goto skip; 884 } 885 886 /* finalize mbuf */ 887 m = data->m; 888 m->m_pkthdr.rcvif = ifp; 889 m->m_pkthdr.len = m->m_len = (le32toh(desc->flags) >> 16) & 0xfff; 890 m->m_flags |= M_HASFCS; /* hardware appends FCS */ 891 892 s = splnet(); 893 894 #if NBPFILTER > 0 895 if (sc->sc_drvbpf != NULL) { 896 struct ural_rx_radiotap_header *tap = &sc->sc_rxtap; 897 898 tap->wr_flags = IEEE80211_RADIOTAP_F_FCS; 899 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 900 tap->wr_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 901 tap->wr_antenna = sc->rx_ant; 902 tap->wr_antsignal = desc->rssi; 903 904 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m); 905 } 906 #endif 907 908 wh = mtod(m, struct ieee80211_frame_min *); 909 ni = ieee80211_find_rxnode(ic, wh); 910 911 /* send the frame to the 802.11 layer */ 912 ieee80211_input(ic, m, ni, desc->rssi, 0); 913 914 /* node is no longer needed */ 915 ieee80211_free_node(ni); 916 917 splx(s); 918 919 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 920 if (data->m == NULL) { 921 printf("%s: could not allocate rx mbuf\n", 922 USBDEVNAME(sc->sc_dev)); 923 return; 924 } 925 926 MCLGET(data->m, M_DONTWAIT); 927 if (!(data->m->m_flags & M_EXT)) { 928 printf("%s: could not allocate rx mbuf cluster\n", 929 USBDEVNAME(sc->sc_dev)); 930 m_freem(data->m); 931 data->m = NULL; 932 return; 933 } 934 935 data->buf = mtod(data->m, uint8_t *); 936 937 DPRINTFN(15, ("rx done\n")); 938 939 skip: /* setup a new transfer */ 940 usbd_setup_xfer(xfer, sc->sc_rx_pipeh, data, data->buf, MCLBYTES, 941 USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 942 usbd_transfer(xfer); 943 } 944 945 /* 946 * Return the expected ack rate for a frame transmitted at rate `rate'. 947 * XXX: this should depend on the destination node basic rate set. 948 */ 949 Static int 950 ural_ack_rate(int rate) 951 { 952 switch (rate) { 953 /* CCK rates */ 954 case 2: 955 return 2; 956 case 4: 957 case 11: 958 case 22: 959 return 4; 960 961 /* OFDM rates */ 962 case 12: 963 case 18: 964 return 12; 965 case 24: 966 case 36: 967 return 24; 968 case 48: 969 case 72: 970 case 96: 971 case 108: 972 return 48; 973 } 974 975 /* default to 1Mbps */ 976 return 2; 977 } 978 979 /* 980 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 981 * The function automatically determines the operating mode depending on the 982 * given rate. `flags' indicates whether short preamble is in use or not. 983 */ 984 Static uint16_t 985 ural_txtime(int len, int rate, uint32_t flags) 986 { 987 uint16_t txtime; 988 int ceil, dbps; 989 990 if (RAL_RATE_IS_OFDM(rate)) { 991 /* 992 * OFDM TXTIME calculation. 993 * From IEEE Std 802.11a-1999, pp. 37. 994 */ 995 dbps = rate * 2; /* data bits per OFDM symbol */ 996 997 ceil = (16 + 8 * len + 6) / dbps; 998 if ((16 + 8 * len + 6) % dbps != 0) 999 ceil++; 1000 1001 txtime = 16 + 4 + 4 * ceil + 6; 1002 } else { 1003 /* 1004 * High Rate TXTIME calculation. 1005 * From IEEE Std 802.11b-1999, pp. 28. 1006 */ 1007 ceil = (8 * len * 2) / rate; 1008 if ((8 * len * 2) % rate != 0) 1009 ceil++; 1010 1011 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1012 txtime = 72 + 24 + ceil; 1013 else 1014 txtime = 144 + 48 + ceil; 1015 } 1016 1017 return txtime; 1018 } 1019 1020 Static uint8_t 1021 ural_plcp_signal(int rate) 1022 { 1023 switch (rate) { 1024 /* CCK rates (returned values are device-dependent) */ 1025 case 2: return 0x0; 1026 case 4: return 0x1; 1027 case 11: return 0x2; 1028 case 22: return 0x3; 1029 1030 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1031 case 12: return 0xb; 1032 case 18: return 0xf; 1033 case 24: return 0xa; 1034 case 36: return 0xe; 1035 case 48: return 0x9; 1036 case 72: return 0xd; 1037 case 96: return 0x8; 1038 case 108: return 0xc; 1039 1040 /* unsupported rates (should not get there) */ 1041 default: return 0xff; 1042 } 1043 } 1044 1045 Static void 1046 ural_setup_tx_desc(struct ural_softc *sc, struct ural_tx_desc *desc, 1047 uint32_t flags, int len, int rate) 1048 { 1049 struct ieee80211com *ic = &sc->sc_ic; 1050 uint16_t plcp_length; 1051 int remainder; 1052 1053 desc->flags = htole32(flags); 1054 desc->flags |= htole32(RAL_TX_NEWSEQ); 1055 desc->flags |= htole32(len << 16); 1056 1057 if (RAL_RATE_IS_OFDM(rate)) 1058 desc->flags |= htole32(RAL_TX_OFDM); 1059 1060 desc->wme = htole16(RAL_LOGCWMAX(5) | RAL_LOGCWMIN(3) | RAL_AIFSN(2)); 1061 desc->wme |= htole16(RAL_IVOFFSET(sizeof (struct ieee80211_frame))); 1062 1063 /* 1064 * Fill PLCP fields. 1065 */ 1066 desc->plcp_service = 4; 1067 1068 len += 4; /* account for FCS */ 1069 if (RAL_RATE_IS_OFDM(rate)) { 1070 /* 1071 * PLCP length field (LENGTH). 1072 * From IEEE Std 802.11a-1999, pp. 14. 1073 */ 1074 plcp_length = len & 0xfff; 1075 desc->plcp_length = htole16((plcp_length >> 6) << 8 | 1076 (plcp_length & 0x3f)); 1077 } else { 1078 /* 1079 * Long PLCP LENGTH field. 1080 * From IEEE Std 802.11b-1999, pp. 16. 1081 */ 1082 plcp_length = (8 * len * 2) / rate; 1083 remainder = (8 * len * 2) % rate; 1084 if (remainder != 0) { 1085 if (rate == 22 && (rate - remainder) / 16 != 0) 1086 desc->plcp_service |= RAL_PLCP_LENGEXT; 1087 plcp_length++; 1088 } 1089 desc->plcp_length = htole16(plcp_length); 1090 } 1091 1092 desc->plcp_signal = ural_plcp_signal(rate); 1093 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1094 desc->plcp_signal |= 0x08; 1095 1096 desc->iv = 0; 1097 desc->eiv = 0; 1098 } 1099 1100 #define RAL_TX_TIMEOUT 5000 1101 1102 Static int 1103 ural_tx_bcn(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1104 { 1105 struct ural_tx_desc *desc; 1106 usbd_xfer_handle xfer; 1107 usbd_status error; 1108 uint8_t cmd = 0; 1109 uint8_t *buf; 1110 int xferlen, rate; 1111 1112 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 4; 1113 1114 xfer = usbd_alloc_xfer(sc->sc_udev); 1115 if (xfer == NULL) 1116 return ENOMEM; 1117 1118 /* xfer length needs to be a multiple of two! */ 1119 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1120 1121 buf = usbd_alloc_buffer(xfer, xferlen); 1122 if (buf == NULL) { 1123 usbd_free_xfer(xfer); 1124 return ENOMEM; 1125 } 1126 1127 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, &cmd, sizeof cmd, 1128 USBD_FORCE_SHORT_XFER, RAL_TX_TIMEOUT, NULL); 1129 1130 error = usbd_sync_transfer(xfer); 1131 if (error != 0) { 1132 usbd_free_xfer(xfer); 1133 return error; 1134 } 1135 1136 desc = (struct ural_tx_desc *)buf; 1137 1138 m_copydata(m0, 0, m0->m_pkthdr.len, buf + RAL_TX_DESC_SIZE); 1139 ural_setup_tx_desc(sc, desc, RAL_TX_IFS_NEWBACKOFF | RAL_TX_TIMESTAMP, 1140 m0->m_pkthdr.len, rate); 1141 1142 DPRINTFN(10, ("sending beacon frame len=%u rate=%u xfer len=%u\n", 1143 m0->m_pkthdr.len, rate, xferlen)); 1144 1145 usbd_setup_xfer(xfer, sc->sc_tx_pipeh, NULL, buf, xferlen, 1146 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, NULL); 1147 1148 error = usbd_sync_transfer(xfer); 1149 usbd_free_xfer(xfer); 1150 1151 return error; 1152 } 1153 1154 Static int 1155 ural_tx_mgt(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1156 { 1157 struct ieee80211com *ic = &sc->sc_ic; 1158 struct ural_tx_desc *desc; 1159 struct ural_tx_data *data; 1160 struct ieee80211_frame *wh; 1161 uint32_t flags = 0; 1162 uint16_t dur; 1163 usbd_status error; 1164 int xferlen, rate; 1165 1166 data = &sc->tx_data[0]; 1167 desc = (struct ural_tx_desc *)data->buf; 1168 1169 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 4; 1170 data->m = m0; 1171 data->ni = ni; 1172 1173 wh = mtod(m0, struct ieee80211_frame *); 1174 1175 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1176 flags |= RAL_TX_ACK; 1177 1178 dur = ural_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + RAL_SIFS; 1179 *(uint16_t *)wh->i_dur = htole16(dur); 1180 1181 /* tell hardware to add timestamp for probe responses */ 1182 if ((wh->i_fc[0] & 1183 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1184 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1185 flags |= RAL_TX_TIMESTAMP; 1186 } 1187 1188 #if NBPFILTER > 0 1189 if (sc->sc_drvbpf != NULL) { 1190 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1191 1192 tap->wt_flags = 0; 1193 tap->wt_rate = rate; 1194 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq); 1195 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags); 1196 tap->wt_antenna = sc->tx_ant; 1197 1198 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1199 } 1200 #endif 1201 1202 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1203 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1204 1205 /* xfer length needs to be a multiple of two! */ 1206 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1207 1208 DPRINTFN(10, ("sending mgt frame len=%u rate=%u xfer len=%u\n", 1209 m0->m_pkthdr.len, rate, xferlen)); 1210 1211 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen, 1212 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, ural_txeof); 1213 1214 error = usbd_transfer(data->xfer); 1215 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1216 m_freem(m0); 1217 return error; 1218 } 1219 1220 sc->tx_queued++; 1221 1222 return 0; 1223 } 1224 1225 Static int 1226 ural_tx_data(struct ural_softc *sc, struct mbuf *m0, struct ieee80211_node *ni) 1227 { 1228 struct ieee80211com *ic = &sc->sc_ic; 1229 struct ieee80211_rateset *rs; 1230 struct ural_tx_desc *desc; 1231 struct ural_tx_data *data; 1232 struct ieee80211_frame *wh; 1233 struct ieee80211_key *k; 1234 uint32_t flags = 0; 1235 uint16_t dur; 1236 usbd_status error; 1237 int xferlen, rate; 1238 1239 wh = mtod(m0, struct ieee80211_frame *); 1240 1241 /* XXX this should be reworked! */ 1242 if (ic->ic_fixed_rate != -1) { 1243 if (ic->ic_curmode != IEEE80211_MODE_AUTO) 1244 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1245 else 1246 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G]; 1247 1248 rate = rs->rs_rates[ic->ic_fixed_rate]; 1249 } else { 1250 rs = &ni->ni_rates; 1251 rate = rs->rs_rates[ni->ni_txrate]; 1252 } 1253 rate &= IEEE80211_RATE_VAL; 1254 1255 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1256 k = ieee80211_crypto_encap(ic, ni, m0); 1257 if (k == NULL) { 1258 m_freem(m0); 1259 return ENOBUFS; 1260 } 1261 1262 /* packet header may have moved, reset our local pointer */ 1263 wh = mtod(m0, struct ieee80211_frame *); 1264 } 1265 1266 #if NBPFILTER > 0 1267 if (sc->sc_drvbpf != NULL) { 1268 struct ural_tx_radiotap_header *tap = &sc->sc_txtap; 1269 1270 tap->wt_flags = 0; 1271 tap->wt_rate = rate; 1272 tap->wt_chan_freq = htole16(ni->ni_chan->ic_freq); 1273 tap->wt_chan_flags = htole16(ni->ni_chan->ic_flags); 1274 tap->wt_antenna = sc->tx_ant; 1275 1276 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1277 } 1278 #endif 1279 1280 data = &sc->tx_data[0]; 1281 desc = (struct ural_tx_desc *)data->buf; 1282 1283 data->m = m0; 1284 data->ni = ni; 1285 1286 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1287 flags |= RAL_TX_ACK; 1288 flags |= RAL_TX_RETRY(7); 1289 1290 dur = ural_txtime(RAL_ACK_SIZE, ural_ack_rate(rate), 1291 ic->ic_flags) + RAL_SIFS; 1292 *(uint16_t *)wh->i_dur = htole16(dur); 1293 } 1294 1295 m_copydata(m0, 0, m0->m_pkthdr.len, data->buf + RAL_TX_DESC_SIZE); 1296 ural_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate); 1297 1298 /* xfer length needs to be a multiple of two! */ 1299 xferlen = (RAL_TX_DESC_SIZE + m0->m_pkthdr.len + 1) & ~1; 1300 1301 DPRINTFN(10, ("sending data frame len=%u rate=%u xfer len=%u\n", 1302 m0->m_pkthdr.len, rate, xferlen)); 1303 1304 usbd_setup_xfer(data->xfer, sc->sc_tx_pipeh, data, data->buf, xferlen, 1305 USBD_FORCE_SHORT_XFER | USBD_NO_COPY, RAL_TX_TIMEOUT, ural_txeof); 1306 1307 error = usbd_transfer(data->xfer); 1308 if (error != USBD_NORMAL_COMPLETION && error != USBD_IN_PROGRESS) { 1309 m_freem(m0); 1310 return error; 1311 } 1312 1313 sc->tx_queued++; 1314 1315 return 0; 1316 } 1317 1318 Static void 1319 ural_start(struct ifnet *ifp) 1320 { 1321 struct ural_softc *sc = ifp->if_softc; 1322 struct ieee80211com *ic = &sc->sc_ic; 1323 struct ether_header *eh; 1324 struct ieee80211_node *ni; 1325 struct mbuf *m0; 1326 1327 for (;;) { 1328 IF_POLL(&ic->ic_mgtq, m0); 1329 if (m0 != NULL) { 1330 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1331 ifp->if_flags |= IFF_OACTIVE; 1332 break; 1333 } 1334 IF_DEQUEUE(&ic->ic_mgtq, m0); 1335 1336 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 1337 m0->m_pkthdr.rcvif = NULL; 1338 #if NBPFILTER > 0 1339 if (ic->ic_rawbpf != NULL) 1340 bpf_mtap(ic->ic_rawbpf, m0); 1341 #endif 1342 if (ural_tx_mgt(sc, m0, ni) != 0) 1343 break; 1344 1345 } else { 1346 if (ic->ic_state != IEEE80211_S_RUN) 1347 break; 1348 IFQ_DEQUEUE(&ifp->if_snd, m0); 1349 if (m0 == NULL) 1350 break; 1351 if (sc->tx_queued >= RAL_TX_LIST_COUNT) { 1352 IF_PREPEND(&ifp->if_snd, m0); 1353 ifp->if_flags |= IFF_OACTIVE; 1354 break; 1355 } 1356 1357 if (m0->m_len < sizeof (struct ether_header) && 1358 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 1359 continue; 1360 1361 eh = mtod(m0, struct ether_header *); 1362 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 1363 if (ni == NULL) { 1364 m_freem(m0); 1365 continue; 1366 } 1367 #if NBPFILTER > 0 1368 if (ifp->if_bpf != NULL) 1369 bpf_mtap(ifp->if_bpf, m0); 1370 #endif 1371 m0 = ieee80211_encap(ic, m0, ni); 1372 if (m0 == NULL) { 1373 ieee80211_free_node(ni); 1374 continue; 1375 } 1376 #if NBPFILTER > 0 1377 if (ic->ic_rawbpf != NULL) 1378 bpf_mtap(ic->ic_rawbpf, m0); 1379 #endif 1380 if (ural_tx_data(sc, m0, ni) != 0) { 1381 ieee80211_free_node(ni); 1382 ifp->if_oerrors++; 1383 break; 1384 } 1385 } 1386 1387 sc->sc_tx_timer = 5; 1388 ifp->if_timer = 1; 1389 } 1390 } 1391 1392 Static void 1393 ural_watchdog(struct ifnet *ifp) 1394 { 1395 struct ural_softc *sc = ifp->if_softc; 1396 struct ieee80211com *ic = &sc->sc_ic; 1397 1398 ifp->if_timer = 0; 1399 1400 if (sc->sc_tx_timer > 0) { 1401 if (--sc->sc_tx_timer == 0) { 1402 printf("%s: device timeout\n", USBDEVNAME(sc->sc_dev)); 1403 /*ural_init(ifp); XXX needs a process context! */ 1404 ifp->if_oerrors++; 1405 return; 1406 } 1407 ifp->if_timer = 1; 1408 } 1409 1410 ieee80211_watchdog(ic); 1411 } 1412 1413 Static int 1414 ural_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 1415 { 1416 struct ural_softc *sc = ifp->if_softc; 1417 struct ieee80211com *ic = &sc->sc_ic; 1418 struct ifreq *ifr; 1419 int s, error = 0; 1420 1421 s = splnet(); 1422 1423 switch (cmd) { 1424 case SIOCSIFFLAGS: 1425 if (ifp->if_flags & IFF_UP) { 1426 if (ifp->if_flags & IFF_RUNNING) 1427 ural_update_promisc(sc); 1428 else 1429 ural_init(ifp); 1430 } else { 1431 if (ifp->if_flags & IFF_RUNNING) 1432 ural_stop(ifp, 1); 1433 } 1434 break; 1435 1436 case SIOCADDMULTI: 1437 case SIOCDELMULTI: 1438 ifr = (struct ifreq *)data; 1439 error = (cmd == SIOCADDMULTI) ? 1440 ether_addmulti(ifr, &sc->sc_ec) : 1441 ether_delmulti(ifr, &sc->sc_ec); 1442 1443 if (error == ENETRESET) 1444 error = 0; 1445 break; 1446 1447 case SIOCS80211CHANNEL: 1448 /* 1449 * This allows for fast channel switching in monitor mode 1450 * (used by kismet). In IBSS mode, we must explicitly reset 1451 * the interface to generate a new beacon frame. 1452 */ 1453 error = ieee80211_ioctl(ic, cmd, data); 1454 if (error == ENETRESET && 1455 ic->ic_opmode == IEEE80211_M_MONITOR) { 1456 ural_set_chan(sc, ic->ic_ibss_chan); 1457 error = 0; 1458 } 1459 break; 1460 1461 default: 1462 error = ieee80211_ioctl(ic, cmd, data); 1463 } 1464 1465 if (error == ENETRESET) { 1466 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 1467 (IFF_UP | IFF_RUNNING)) 1468 ural_init(ifp); 1469 error = 0; 1470 } 1471 1472 splx(s); 1473 1474 return error; 1475 } 1476 1477 Static void 1478 ural_eeprom_read(struct ural_softc *sc, uint16_t addr, void *buf, int len) 1479 { 1480 usb_device_request_t req; 1481 usbd_status error; 1482 1483 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1484 req.bRequest = RAL_READ_EEPROM; 1485 USETW(req.wValue, 0); 1486 USETW(req.wIndex, addr); 1487 USETW(req.wLength, len); 1488 1489 error = usbd_do_request(sc->sc_udev, &req, buf); 1490 if (error != 0) { 1491 printf("%s: could not read EEPROM: %s\n", 1492 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1493 } 1494 } 1495 1496 Static uint16_t 1497 ural_read(struct ural_softc *sc, uint16_t reg) 1498 { 1499 usb_device_request_t req; 1500 usbd_status error; 1501 uint16_t val; 1502 1503 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1504 req.bRequest = RAL_READ_MAC; 1505 USETW(req.wValue, 0); 1506 USETW(req.wIndex, reg); 1507 USETW(req.wLength, sizeof (uint16_t)); 1508 1509 error = usbd_do_request(sc->sc_udev, &req, &val); 1510 if (error != 0) { 1511 printf("%s: could not read MAC register: %s\n", 1512 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1513 return 0; 1514 } 1515 1516 return le16toh(val); 1517 } 1518 1519 Static void 1520 ural_read_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1521 { 1522 usb_device_request_t req; 1523 usbd_status error; 1524 1525 req.bmRequestType = UT_READ_VENDOR_DEVICE; 1526 req.bRequest = RAL_READ_MULTI_MAC; 1527 USETW(req.wValue, 0); 1528 USETW(req.wIndex, reg); 1529 USETW(req.wLength, len); 1530 1531 error = usbd_do_request(sc->sc_udev, &req, buf); 1532 if (error != 0) { 1533 printf("%s: could not read MAC register: %s\n", 1534 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1535 return; 1536 } 1537 } 1538 1539 Static void 1540 ural_write(struct ural_softc *sc, uint16_t reg, uint16_t val) 1541 { 1542 usb_device_request_t req; 1543 usbd_status error; 1544 1545 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1546 req.bRequest = RAL_WRITE_MAC; 1547 USETW(req.wValue, val); 1548 USETW(req.wIndex, reg); 1549 USETW(req.wLength, 0); 1550 1551 error = usbd_do_request(sc->sc_udev, &req, NULL); 1552 if (error != 0) { 1553 printf("%s: could not write MAC register: %s\n", 1554 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1555 } 1556 } 1557 1558 Static void 1559 ural_write_multi(struct ural_softc *sc, uint16_t reg, void *buf, int len) 1560 { 1561 usb_device_request_t req; 1562 usbd_status error; 1563 1564 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 1565 req.bRequest = RAL_WRITE_MULTI_MAC; 1566 USETW(req.wValue, 0); 1567 USETW(req.wIndex, reg); 1568 USETW(req.wLength, len); 1569 1570 error = usbd_do_request(sc->sc_udev, &req, buf); 1571 if (error != 0) { 1572 printf("%s: could not write MAC register: %s\n", 1573 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 1574 } 1575 } 1576 1577 Static void 1578 ural_bbp_write(struct ural_softc *sc, uint8_t reg, uint8_t val) 1579 { 1580 uint16_t tmp; 1581 int ntries; 1582 1583 for (ntries = 0; ntries < 5; ntries++) { 1584 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1585 break; 1586 } 1587 if (ntries == 5) { 1588 printf("%s: could not write to BBP\n", USBDEVNAME(sc->sc_dev)); 1589 return; 1590 } 1591 1592 tmp = reg << 8 | val; 1593 ural_write(sc, RAL_PHY_CSR7, tmp); 1594 } 1595 1596 Static uint8_t 1597 ural_bbp_read(struct ural_softc *sc, uint8_t reg) 1598 { 1599 uint16_t val; 1600 int ntries; 1601 1602 val = RAL_BBP_WRITE | reg << 8; 1603 ural_write(sc, RAL_PHY_CSR7, val); 1604 1605 for (ntries = 0; ntries < 5; ntries++) { 1606 if (!(ural_read(sc, RAL_PHY_CSR8) & RAL_BBP_BUSY)) 1607 break; 1608 } 1609 if (ntries == 5) { 1610 printf("%s: could not read BBP\n", USBDEVNAME(sc->sc_dev)); 1611 return 0; 1612 } 1613 1614 return ural_read(sc, RAL_PHY_CSR7) & 0xff; 1615 } 1616 1617 Static void 1618 ural_rf_write(struct ural_softc *sc, uint8_t reg, uint32_t val) 1619 { 1620 uint32_t tmp; 1621 int ntries; 1622 1623 for (ntries = 0; ntries < 5; ntries++) { 1624 if (!(ural_read(sc, RAL_PHY_CSR10) & RAL_RF_LOBUSY)) 1625 break; 1626 } 1627 if (ntries == 5) { 1628 printf("%s: could not write to RF\n", USBDEVNAME(sc->sc_dev)); 1629 return; 1630 } 1631 1632 tmp = RAL_RF_BUSY | RAL_RF_20BIT | (val & 0xfffff) << 2 | (reg & 0x3); 1633 ural_write(sc, RAL_PHY_CSR9, tmp & 0xffff); 1634 ural_write(sc, RAL_PHY_CSR10, tmp >> 16); 1635 1636 /* remember last written value in sc */ 1637 sc->rf_regs[reg] = val; 1638 1639 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 1640 } 1641 1642 Static void 1643 ural_set_chan(struct ural_softc *sc, struct ieee80211_channel *c) 1644 { 1645 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1646 struct ieee80211com *ic = &sc->sc_ic; 1647 uint8_t power, tmp; 1648 u_int i, chan; 1649 1650 chan = ieee80211_chan2ieee(ic, c); 1651 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 1652 return; 1653 1654 if (IEEE80211_IS_CHAN_2GHZ(c)) 1655 power = min(sc->txpow[chan - 1], 31); 1656 else 1657 power = 31; 1658 1659 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 1660 1661 switch (sc->rf_rev) { 1662 case RAL_RF_2522: 1663 ural_rf_write(sc, RAL_RF1, 0x00814); 1664 ural_rf_write(sc, RAL_RF2, ural_rf2522_r2[chan - 1]); 1665 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1666 break; 1667 1668 case RAL_RF_2523: 1669 ural_rf_write(sc, RAL_RF1, 0x08804); 1670 ural_rf_write(sc, RAL_RF2, ural_rf2523_r2[chan - 1]); 1671 ural_rf_write(sc, RAL_RF3, power << 7 | 0x38044); 1672 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1673 break; 1674 1675 case RAL_RF_2524: 1676 ural_rf_write(sc, RAL_RF1, 0x0c808); 1677 ural_rf_write(sc, RAL_RF2, ural_rf2524_r2[chan - 1]); 1678 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1679 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1680 break; 1681 1682 case RAL_RF_2525: 1683 ural_rf_write(sc, RAL_RF1, 0x08808); 1684 ural_rf_write(sc, RAL_RF2, ural_rf2525_hi_r2[chan - 1]); 1685 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1686 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1687 1688 ural_rf_write(sc, RAL_RF1, 0x08808); 1689 ural_rf_write(sc, RAL_RF2, ural_rf2525_r2[chan - 1]); 1690 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1691 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00280 : 0x00286); 1692 break; 1693 1694 case RAL_RF_2525E: 1695 ural_rf_write(sc, RAL_RF1, 0x08808); 1696 ural_rf_write(sc, RAL_RF2, ural_rf2525e_r2[chan - 1]); 1697 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1698 ural_rf_write(sc, RAL_RF4, (chan == 14) ? 0x00286 : 0x00282); 1699 break; 1700 1701 case RAL_RF_2526: 1702 ural_rf_write(sc, RAL_RF2, ural_rf2526_hi_r2[chan - 1]); 1703 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1704 ural_rf_write(sc, RAL_RF1, 0x08804); 1705 1706 ural_rf_write(sc, RAL_RF2, ural_rf2526_r2[chan - 1]); 1707 ural_rf_write(sc, RAL_RF3, power << 7 | 0x18044); 1708 ural_rf_write(sc, RAL_RF4, (chan & 1) ? 0x00386 : 0x00381); 1709 break; 1710 1711 /* dual-band RF */ 1712 case RAL_RF_5222: 1713 for (i = 0; i < N(ural_rf5222); i++) 1714 if (ural_rf5222[i].chan == chan) 1715 break; 1716 1717 if (i < N(ural_rf5222)) { 1718 ural_rf_write(sc, RAL_RF1, ural_rf5222[i].r1); 1719 ural_rf_write(sc, RAL_RF2, ural_rf5222[i].r2); 1720 ural_rf_write(sc, RAL_RF3, power << 7 | 0x00040); 1721 ural_rf_write(sc, RAL_RF4, ural_rf5222[i].r4); 1722 } 1723 break; 1724 } 1725 1726 if (ic->ic_opmode != IEEE80211_M_MONITOR && 1727 ic->ic_state != IEEE80211_S_SCAN) { 1728 /* set Japan filter bit for channel 14 */ 1729 tmp = ural_bbp_read(sc, 70); 1730 1731 tmp &= ~RAL_JAPAN_FILTER; 1732 if (chan == 14) 1733 tmp |= RAL_JAPAN_FILTER; 1734 1735 ural_bbp_write(sc, 70, tmp); 1736 1737 /* clear CRC errors */ 1738 ural_read(sc, RAL_STA_CSR0); 1739 1740 DELAY(1000); /* RF needs a 1ms delay here */ 1741 ural_disable_rf_tune(sc); 1742 } 1743 #undef N 1744 } 1745 1746 /* 1747 * Disable RF auto-tuning. 1748 */ 1749 Static void 1750 ural_disable_rf_tune(struct ural_softc *sc) 1751 { 1752 uint32_t tmp; 1753 1754 if (sc->rf_rev != RAL_RF_2523) { 1755 tmp = sc->rf_regs[RAL_RF1] & ~RAL_RF1_AUTOTUNE; 1756 ural_rf_write(sc, RAL_RF1, tmp); 1757 } 1758 1759 tmp = sc->rf_regs[RAL_RF3] & ~RAL_RF3_AUTOTUNE; 1760 ural_rf_write(sc, RAL_RF3, tmp); 1761 1762 DPRINTFN(2, ("disabling RF autotune\n")); 1763 } 1764 1765 /* 1766 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 1767 * synchronization. 1768 */ 1769 Static void 1770 ural_enable_tsf_sync(struct ural_softc *sc) 1771 { 1772 struct ieee80211com *ic = &sc->sc_ic; 1773 uint16_t logcwmin, preload, tmp; 1774 1775 /* first, disable TSF synchronization */ 1776 ural_write(sc, RAL_TXRX_CSR19, 0); 1777 1778 tmp = (16 * ic->ic_bss->ni_intval) << 4; 1779 ural_write(sc, RAL_TXRX_CSR18, tmp); 1780 1781 logcwmin = (ic->ic_opmode == IEEE80211_M_IBSS) ? 2 : 0; 1782 preload = (ic->ic_opmode == IEEE80211_M_IBSS) ? 320 : 6; 1783 tmp = logcwmin << 12 | preload; 1784 ural_write(sc, RAL_TXRX_CSR20, tmp); 1785 1786 /* finally, enable TSF synchronization */ 1787 tmp = RAL_ENABLE_TSF | RAL_ENABLE_TBCN; 1788 if (ic->ic_opmode == IEEE80211_M_STA) 1789 tmp |= RAL_ENABLE_TSF_SYNC(1); 1790 else 1791 tmp |= RAL_ENABLE_TSF_SYNC(2) | RAL_ENABLE_BEACON_GENERATOR; 1792 ural_write(sc, RAL_TXRX_CSR19, tmp); 1793 1794 DPRINTF(("enabling TSF synchronization\n")); 1795 } 1796 1797 Static void 1798 ural_set_bssid(struct ural_softc *sc, uint8_t *bssid) 1799 { 1800 uint16_t tmp; 1801 1802 tmp = bssid[0] | bssid[1] << 8; 1803 ural_write(sc, RAL_MAC_CSR5, tmp); 1804 1805 tmp = bssid[2] | bssid[3] << 8; 1806 ural_write(sc, RAL_MAC_CSR6, tmp); 1807 1808 tmp = bssid[4] | bssid[5] << 8; 1809 ural_write(sc, RAL_MAC_CSR7, tmp); 1810 1811 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 1812 } 1813 1814 Static void 1815 ural_set_macaddr(struct ural_softc *sc, uint8_t *addr) 1816 { 1817 uint16_t tmp; 1818 1819 tmp = addr[0] | addr[1] << 8; 1820 ural_write(sc, RAL_MAC_CSR2, tmp); 1821 1822 tmp = addr[2] | addr[3] << 8; 1823 ural_write(sc, RAL_MAC_CSR3, tmp); 1824 1825 tmp = addr[4] | addr[5] << 8; 1826 ural_write(sc, RAL_MAC_CSR4, tmp); 1827 1828 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 1829 } 1830 1831 Static void 1832 ural_update_promisc(struct ural_softc *sc) 1833 { 1834 struct ifnet *ifp = &sc->sc_if; 1835 uint16_t tmp; 1836 1837 tmp = ural_read(sc, RAL_TXRX_CSR2); 1838 1839 tmp &= ~RAL_DROP_NOT_TO_ME; 1840 if (!(ifp->if_flags & IFF_PROMISC)) 1841 tmp |= RAL_DROP_NOT_TO_ME; 1842 1843 ural_write(sc, RAL_TXRX_CSR2, tmp); 1844 1845 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 1846 "entering" : "leaving")); 1847 } 1848 1849 Static const char * 1850 ural_get_rf(int rev) 1851 { 1852 switch (rev) { 1853 case RAL_RF_2522: return "RT2522"; 1854 case RAL_RF_2523: return "RT2523"; 1855 case RAL_RF_2524: return "RT2524"; 1856 case RAL_RF_2525: return "RT2525"; 1857 case RAL_RF_2525E: return "RT2525e"; 1858 case RAL_RF_2526: return "RT2526"; 1859 case RAL_RF_5222: return "RT5222"; 1860 default: return "unknown"; 1861 } 1862 } 1863 1864 Static void 1865 ural_read_eeprom(struct ural_softc *sc) 1866 { 1867 struct ieee80211com *ic = &sc->sc_ic; 1868 uint16_t val; 1869 1870 ural_eeprom_read(sc, RAL_EEPROM_CONFIG0, &val, 2); 1871 val = le16toh(val); 1872 sc->rf_rev = (val >> 11) & 0x7; 1873 sc->hw_radio = (val >> 10) & 0x1; 1874 sc->led_mode = (val >> 6) & 0x7; 1875 sc->rx_ant = (val >> 4) & 0x3; 1876 sc->tx_ant = (val >> 2) & 0x3; 1877 sc->nb_ant = val & 0x3; 1878 1879 /* read MAC address */ 1880 ural_eeprom_read(sc, RAL_EEPROM_ADDRESS, ic->ic_myaddr, 6); 1881 1882 /* read default values for BBP registers */ 1883 ural_eeprom_read(sc, RAL_EEPROM_BBP_BASE, sc->bbp_prom, 2 * 16); 1884 1885 /* read Tx power for all b/g channels */ 1886 ural_eeprom_read(sc, RAL_EEPROM_TXPOWER, sc->txpow, 14); 1887 } 1888 1889 Static int 1890 ural_bbp_init(struct ural_softc *sc) 1891 { 1892 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1893 int i, ntries; 1894 1895 /* wait for BBP to be ready */ 1896 for (ntries = 0; ntries < 100; ntries++) { 1897 if (ural_bbp_read(sc, RAL_BBP_VERSION) != 0) 1898 break; 1899 DELAY(1000); 1900 } 1901 if (ntries == 100) { 1902 printf("%s: timeout waiting for BBP\n", USBDEVNAME(sc->sc_dev)); 1903 return EIO; 1904 } 1905 1906 /* initialize BBP registers to default values */ 1907 for (i = 0; i < N(ural_def_bbp); i++) 1908 ural_bbp_write(sc, ural_def_bbp[i].reg, ural_def_bbp[i].val); 1909 1910 #if 0 1911 /* initialize BBP registers to values stored in EEPROM */ 1912 for (i = 0; i < 16; i++) { 1913 if (sc->bbp_prom[i].reg == 0xff) 1914 continue; 1915 ural_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 1916 } 1917 #endif 1918 1919 return 0; 1920 #undef N 1921 } 1922 1923 Static void 1924 ural_set_txantenna(struct ural_softc *sc, int antenna) 1925 { 1926 uint16_t tmp; 1927 uint8_t tx; 1928 1929 tx = ural_bbp_read(sc, RAL_BBP_TX) & ~RAL_BBP_ANTMASK; 1930 if (antenna == 1) 1931 tx |= RAL_BBP_ANTA; 1932 else if (antenna == 2) 1933 tx |= RAL_BBP_ANTB; 1934 else 1935 tx |= RAL_BBP_DIVERSITY; 1936 1937 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 1938 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526 || 1939 sc->rf_rev == RAL_RF_5222) 1940 tx |= RAL_BBP_FLIPIQ; 1941 1942 ural_bbp_write(sc, RAL_BBP_TX, tx); 1943 1944 /* update flags in PHY_CSR5 and PHY_CSR6 too */ 1945 tmp = ural_read(sc, RAL_PHY_CSR5) & ~0x7; 1946 ural_write(sc, RAL_PHY_CSR5, tmp | (tx & 0x7)); 1947 1948 tmp = ural_read(sc, RAL_PHY_CSR6) & ~0x7; 1949 ural_write(sc, RAL_PHY_CSR6, tmp | (tx & 0x7)); 1950 } 1951 1952 Static void 1953 ural_set_rxantenna(struct ural_softc *sc, int antenna) 1954 { 1955 uint8_t rx; 1956 1957 rx = ural_bbp_read(sc, RAL_BBP_RX) & ~RAL_BBP_ANTMASK; 1958 if (antenna == 1) 1959 rx |= RAL_BBP_ANTA; 1960 else if (antenna == 2) 1961 rx |= RAL_BBP_ANTB; 1962 else 1963 rx |= RAL_BBP_DIVERSITY; 1964 1965 /* need to force no I/Q flip for RF 2525e and 2526 */ 1966 if (sc->rf_rev == RAL_RF_2525E || sc->rf_rev == RAL_RF_2526) 1967 rx &= ~RAL_BBP_FLIPIQ; 1968 1969 ural_bbp_write(sc, RAL_BBP_RX, rx); 1970 } 1971 1972 Static int 1973 ural_init(struct ifnet *ifp) 1974 { 1975 #define N(a) (sizeof (a) / sizeof ((a)[0])) 1976 struct ural_softc *sc = ifp->if_softc; 1977 struct ieee80211com *ic = &sc->sc_ic; 1978 struct ieee80211_key *wk; 1979 struct ural_rx_data *data; 1980 uint16_t sta[11], tmp; 1981 usbd_status error; 1982 int i, ntries; 1983 1984 ural_stop(ifp, 0); 1985 1986 /* initialize MAC registers to default values */ 1987 for (i = 0; i < N(ural_def_mac); i++) 1988 ural_write(sc, ural_def_mac[i].reg, ural_def_mac[i].val); 1989 1990 /* wait for BBP and RF to wake up (this can take a long time!) */ 1991 for (ntries = 0; ntries < 100; ntries++) { 1992 tmp = ural_read(sc, RAL_MAC_CSR17); 1993 if ((tmp & (RAL_BBP_AWAKE | RAL_RF_AWAKE)) == 1994 (RAL_BBP_AWAKE | RAL_RF_AWAKE)) 1995 break; 1996 DELAY(1000); 1997 } 1998 if (ntries == 100) { 1999 printf("%s: timeout waiting for BBP/RF to wakeup\n", 2000 USBDEVNAME(sc->sc_dev)); 2001 error = EIO; 2002 goto fail; 2003 } 2004 2005 /* we're ready! */ 2006 ural_write(sc, RAL_MAC_CSR1, RAL_HOST_READY); 2007 2008 /* set supported basic rates (1, 2, 6, 12, 24) */ 2009 ural_write(sc, RAL_TXRX_CSR11, 0x153); 2010 2011 error = ural_bbp_init(sc); 2012 if (error != 0) 2013 goto fail; 2014 2015 /* set default BSS channel */ 2016 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2017 ural_set_chan(sc, ic->ic_bss->ni_chan); 2018 2019 /* clear statistic registers (STA_CSR0 to STA_CSR10) */ 2020 ural_read_multi(sc, RAL_STA_CSR0, sta, sizeof sta); 2021 2022 ural_set_txantenna(sc, 1); 2023 ural_set_rxantenna(sc, 1); 2024 2025 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2026 ural_set_macaddr(sc, ic->ic_myaddr); 2027 2028 /* 2029 * Copy WEP keys into adapter's memory (SEC_CSR0 to SEC_CSR31). 2030 */ 2031 for (i = 0; i < IEEE80211_WEP_NKID; i++) { 2032 wk = &ic->ic_nw_keys[i]; 2033 ural_write_multi(sc, wk->wk_keyix * IEEE80211_KEYBUF_SIZE + 2034 RAL_SEC_CSR0, wk->wk_key, IEEE80211_KEYBUF_SIZE); 2035 } 2036 2037 /* 2038 * Open Tx and Rx USB bulk pipes. 2039 */ 2040 error = usbd_open_pipe(sc->sc_iface, sc->sc_tx_no, USBD_EXCLUSIVE_USE, 2041 &sc->sc_tx_pipeh); 2042 if (error != 0) { 2043 printf("%s: could not open Tx pipe: %s\n", 2044 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2045 goto fail; 2046 } 2047 2048 error = usbd_open_pipe(sc->sc_iface, sc->sc_rx_no, USBD_EXCLUSIVE_USE, 2049 &sc->sc_rx_pipeh); 2050 if (error != 0) { 2051 printf("%s: could not open Rx pipe: %s\n", 2052 USBDEVNAME(sc->sc_dev), usbd_errstr(error)); 2053 goto fail; 2054 } 2055 2056 /* 2057 * Allocate Tx and Rx xfer queues. 2058 */ 2059 error = ural_alloc_tx_list(sc); 2060 if (error != 0) { 2061 printf("%s: could not allocate Tx list\n", 2062 USBDEVNAME(sc->sc_dev)); 2063 goto fail; 2064 } 2065 2066 error = ural_alloc_rx_list(sc); 2067 if (error != 0) { 2068 printf("%s: could not allocate Rx list\n", 2069 USBDEVNAME(sc->sc_dev)); 2070 goto fail; 2071 } 2072 2073 /* 2074 * Start up the receive pipe. 2075 */ 2076 for (i = 0; i < RAL_RX_LIST_COUNT; i++) { 2077 data = &sc->rx_data[i]; 2078 2079 usbd_setup_xfer(data->xfer, sc->sc_rx_pipeh, data, data->buf, 2080 MCLBYTES, USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, ural_rxeof); 2081 usbd_transfer(data->xfer); 2082 } 2083 2084 /* kick Rx */ 2085 tmp = RAL_DROP_PHY_ERROR | RAL_DROP_CRC_ERROR; 2086 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2087 tmp |= RAL_DROP_CTL | RAL_DROP_VERSION_ERROR; 2088 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2089 tmp |= RAL_DROP_TODS; 2090 if (!(ifp->if_flags & IFF_PROMISC)) 2091 tmp |= RAL_DROP_NOT_TO_ME; 2092 } 2093 ural_write(sc, RAL_TXRX_CSR2, tmp); 2094 2095 ifp->if_flags &= ~IFF_OACTIVE; 2096 ifp->if_flags |= IFF_RUNNING; 2097 2098 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2099 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2100 else 2101 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2102 2103 return 0; 2104 2105 fail: ural_stop(ifp, 1); 2106 return error; 2107 #undef N 2108 } 2109 2110 Static void 2111 ural_stop(struct ifnet *ifp, int disable) 2112 { 2113 struct ural_softc *sc = ifp->if_softc; 2114 struct ieee80211com *ic = &sc->sc_ic; 2115 2116 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); 2117 2118 sc->sc_tx_timer = 0; 2119 ifp->if_timer = 0; 2120 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2121 2122 /* disable Rx */ 2123 ural_write(sc, RAL_TXRX_CSR2, RAL_DISABLE_RX); 2124 2125 /* reset ASIC and BBP (but won't reset MAC registers!) */ 2126 ural_write(sc, RAL_MAC_CSR1, RAL_RESET_ASIC | RAL_RESET_BBP); 2127 ural_write(sc, RAL_MAC_CSR1, 0); 2128 2129 if (sc->sc_rx_pipeh != NULL) { 2130 usbd_abort_pipe(sc->sc_rx_pipeh); 2131 usbd_close_pipe(sc->sc_rx_pipeh); 2132 sc->sc_rx_pipeh = NULL; 2133 } 2134 2135 if (sc->sc_tx_pipeh != NULL) { 2136 usbd_abort_pipe(sc->sc_tx_pipeh); 2137 usbd_close_pipe(sc->sc_tx_pipeh); 2138 sc->sc_tx_pipeh = NULL; 2139 } 2140 2141 ural_free_rx_list(sc); 2142 ural_free_tx_list(sc); 2143 } 2144 2145 int 2146 ural_activate(device_ptr_t self, enum devact act) 2147 { 2148 struct ural_softc *sc = (struct ural_softc *)self; 2149 2150 switch (act) { 2151 case DVACT_ACTIVATE: 2152 return EOPNOTSUPP; 2153 break; 2154 2155 case DVACT_DEACTIVATE: 2156 if_deactivate(&sc->sc_if); 2157 break; 2158 } 2159 2160 return 0; 2161 } 2162
Indexes created Mon Sep 29 21:09:56 GMT 2025