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if_url.c revision 1.36.2.2
      1  1.36.2.2  uebayasi /*	$NetBSD: if_url.c,v 1.36.2.2 2010/11/06 08:08:36 uebayasi Exp $	*/
      2       1.1    ichiro /*
      3       1.1    ichiro  * Copyright (c) 2001, 2002
      4       1.1    ichiro  *     Shingo WATANABE <nabe (at) nabechan.org>.  All rights reserved.
      5       1.1    ichiro  *
      6       1.1    ichiro  * Redistribution and use in source and binary forms, with or without
      7       1.1    ichiro  * modification, are permitted provided that the following conditions
      8       1.1    ichiro  * are met:
      9       1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     10       1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     11       1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     12       1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     13       1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     14       1.8   tsutsui  * 3. Neither the name of the author nor the names of any co-contributors
     15       1.1    ichiro  *    may be used to endorse or promote products derived from this software
     16       1.1    ichiro  *    without specific prior written permission.
     17       1.1    ichiro  *
     18       1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     19       1.1    ichiro  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     20       1.1    ichiro  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     21       1.1    ichiro  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     22       1.1    ichiro  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     23       1.1    ichiro  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     24       1.1    ichiro  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     25       1.1    ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     26       1.1    ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27       1.1    ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28       1.1    ichiro  * SUCH DAMAGE.
     29       1.1    ichiro  *
     30       1.1    ichiro  */
     31       1.1    ichiro 
     32       1.1    ichiro /*
     33       1.1    ichiro  * The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at
     34       1.1    ichiro  *   ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf
     35       1.1    ichiro  *   ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf
     36       1.1    ichiro  */
     37       1.1    ichiro 
     38       1.1    ichiro /*
     39       1.1    ichiro  * TODO:
     40       1.1    ichiro  *	Interrupt Endpoint support
     41       1.1    ichiro  *	External PHYs
     42       1.1    ichiro  *	powerhook() support?
     43       1.1    ichiro  */
     44       1.1    ichiro 
     45       1.1    ichiro #include <sys/cdefs.h>
     46  1.36.2.2  uebayasi __KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.36.2.2 2010/11/06 08:08:36 uebayasi Exp $");
     47       1.1    ichiro 
     48       1.1    ichiro #include "opt_inet.h"
     49       1.1    ichiro #include "rnd.h"
     50       1.1    ichiro 
     51       1.1    ichiro #include <sys/param.h>
     52       1.1    ichiro #include <sys/systm.h>
     53      1.27   xtraeme #include <sys/rwlock.h>
     54       1.1    ichiro #include <sys/mbuf.h>
     55       1.1    ichiro #include <sys/kernel.h>
     56       1.1    ichiro #include <sys/socket.h>
     57       1.1    ichiro 
     58       1.1    ichiro #include <sys/device.h>
     59       1.1    ichiro #if NRND > 0
     60       1.1    ichiro #include <sys/rnd.h>
     61       1.1    ichiro #endif
     62       1.1    ichiro 
     63       1.1    ichiro #include <net/if.h>
     64       1.1    ichiro #include <net/if_arp.h>
     65       1.1    ichiro #include <net/if_dl.h>
     66       1.1    ichiro #include <net/if_media.h>
     67       1.1    ichiro 
     68       1.1    ichiro #include <net/bpf.h>
     69       1.1    ichiro 
     70       1.1    ichiro #include <net/if_ether.h>
     71       1.1    ichiro #ifdef INET
     72       1.1    ichiro #include <netinet/in.h>
     73       1.1    ichiro #include <netinet/if_inarp.h>
     74       1.1    ichiro #endif
     75       1.1    ichiro 
     76       1.1    ichiro #include <dev/mii/mii.h>
     77       1.1    ichiro #include <dev/mii/miivar.h>
     78       1.1    ichiro #include <dev/mii/urlphyreg.h>
     79       1.1    ichiro 
     80       1.1    ichiro #include <dev/usb/usb.h>
     81       1.1    ichiro #include <dev/usb/usbdi.h>
     82       1.1    ichiro #include <dev/usb/usbdi_util.h>
     83       1.1    ichiro #include <dev/usb/usbdevs.h>
     84       1.1    ichiro 
     85       1.1    ichiro #include <dev/usb/if_urlreg.h>
     86       1.1    ichiro 
     87       1.1    ichiro 
     88       1.1    ichiro /* Function declarations */
     89  1.36.2.2  uebayasi int             url_match(device_t, cfdata_t, void *);
     90  1.36.2.2  uebayasi void            url_attach(device_t, device_t, void *);
     91  1.36.2.2  uebayasi int             url_detach(device_t, int);
     92  1.36.2.2  uebayasi int             url_activate(device_t, enum devact);
     93  1.36.2.2  uebayasi extern struct cfdriver url_cd;
     94  1.36.2.2  uebayasi CFATTACH_DECL_NEW(url, sizeof(struct url_softc), url_match, url_attach, url_detach, url_activate);
     95       1.1    ichiro 
     96       1.1    ichiro Static int url_openpipes(struct url_softc *);
     97       1.1    ichiro Static int url_rx_list_init(struct url_softc *);
     98       1.1    ichiro Static int url_tx_list_init(struct url_softc *);
     99       1.1    ichiro Static int url_newbuf(struct url_softc *, struct url_chain *, struct mbuf *);
    100       1.1    ichiro Static void url_start(struct ifnet *);
    101       1.1    ichiro Static int url_send(struct url_softc *, struct mbuf *, int);
    102       1.1    ichiro Static void url_txeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
    103       1.1    ichiro Static void url_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
    104       1.1    ichiro Static void url_tick(void *);
    105       1.1    ichiro Static void url_tick_task(void *);
    106      1.25  christos Static int url_ioctl(struct ifnet *, u_long, void *);
    107       1.1    ichiro Static void url_stop_task(struct url_softc *);
    108       1.1    ichiro Static void url_stop(struct ifnet *, int);
    109       1.1    ichiro Static void url_watchdog(struct ifnet *);
    110       1.1    ichiro Static int url_ifmedia_change(struct ifnet *);
    111       1.1    ichiro Static void url_ifmedia_status(struct ifnet *, struct ifmediareq *);
    112       1.1    ichiro Static void url_lock_mii(struct url_softc *);
    113       1.1    ichiro Static void url_unlock_mii(struct url_softc *);
    114  1.36.2.2  uebayasi Static int url_int_miibus_readreg(device_t, int, int);
    115  1.36.2.2  uebayasi Static void url_int_miibus_writereg(device_t, int, int, int);
    116  1.36.2.2  uebayasi Static void url_miibus_statchg(device_t);
    117       1.1    ichiro Static int url_init(struct ifnet *);
    118       1.1    ichiro Static void url_setmulti(struct url_softc *);
    119       1.1    ichiro Static void url_reset(struct url_softc *);
    120       1.1    ichiro 
    121       1.1    ichiro Static int url_csr_read_1(struct url_softc *, int);
    122       1.1    ichiro Static int url_csr_read_2(struct url_softc *, int);
    123       1.1    ichiro Static int url_csr_write_1(struct url_softc *, int, int);
    124       1.1    ichiro Static int url_csr_write_2(struct url_softc *, int, int);
    125       1.1    ichiro Static int url_csr_write_4(struct url_softc *, int, int);
    126       1.1    ichiro Static int url_mem(struct url_softc *, int, int, void *, int);
    127       1.1    ichiro 
    128       1.1    ichiro /* Macros */
    129       1.1    ichiro #ifdef URL_DEBUG
    130  1.36.2.2  uebayasi #define DPRINTF(x)	if (urldebug) printf x
    131  1.36.2.2  uebayasi #define DPRINTFN(n,x)	if (urldebug >= (n)) printf x
    132       1.2    ichiro int urldebug = 0;
    133       1.1    ichiro #else
    134       1.1    ichiro #define DPRINTF(x)
    135       1.1    ichiro #define DPRINTFN(n,x)
    136       1.1    ichiro #endif
    137       1.1    ichiro 
    138       1.1    ichiro #define	URL_SETBIT(sc, reg, x)	\
    139       1.1    ichiro 	url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) | (x))
    140       1.1    ichiro 
    141       1.1    ichiro #define	URL_SETBIT2(sc, reg, x)	\
    142       1.1    ichiro 	url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) | (x))
    143       1.1    ichiro 
    144       1.1    ichiro #define	URL_CLRBIT(sc, reg, x)	\
    145       1.1    ichiro 	url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) & ~(x))
    146       1.1    ichiro 
    147       1.1    ichiro #define	URL_CLRBIT2(sc, reg, x)	\
    148       1.1    ichiro 	url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) & ~(x))
    149       1.1    ichiro 
    150       1.1    ichiro static const struct url_type {
    151       1.1    ichiro 	struct usb_devno url_dev;
    152       1.1    ichiro 	u_int16_t url_flags;
    153       1.1    ichiro #define URL_EXT_PHY	0x0001
    154       1.1    ichiro } url_devs [] = {
    155       1.1    ichiro 	/* MELCO LUA-KTX */
    156       1.1    ichiro 	{{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0},
    157      1.10   mycroft 	/* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */
    158      1.11  augustss 	{{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0},
    159      1.11  augustss 	/* Longshine LCS-8138TX */
    160      1.11  augustss 	{{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0},
    161      1.11  augustss 	/* Micronet SP128AR */
    162      1.11  augustss 	{{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0},
    163      1.13    itojun 	/* OQO model 01 */
    164      1.13    itojun 	{{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0},
    165       1.1    ichiro };
    166      1.17  christos #define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p))
    167       1.1    ichiro 
    168       1.1    ichiro 
    169       1.1    ichiro /* Probe */
    170  1.36.2.2  uebayasi int
    171  1.36.2.2  uebayasi url_match(device_t parent, cfdata_t match, void *aux)
    172       1.1    ichiro {
    173  1.36.2.2  uebayasi 	struct usb_attach_arg *uaa = aux;
    174       1.1    ichiro 
    175       1.1    ichiro 	return (url_lookup(uaa->vendor, uaa->product) != NULL ?
    176       1.1    ichiro 		UMATCH_VENDOR_PRODUCT : UMATCH_NONE);
    177       1.1    ichiro }
    178       1.1    ichiro /* Attach */
    179  1.36.2.2  uebayasi void
    180  1.36.2.2  uebayasi url_attach(device_t parent, device_t self, void *aux)
    181       1.1    ichiro {
    182  1.36.2.2  uebayasi 	struct url_softc *sc = device_private(self);
    183  1.36.2.2  uebayasi 	struct usb_attach_arg *uaa = aux;
    184       1.1    ichiro 	usbd_device_handle dev = uaa->device;
    185       1.1    ichiro 	usbd_interface_handle iface;
    186       1.1    ichiro 	usbd_status err;
    187       1.1    ichiro 	usb_interface_descriptor_t *id;
    188       1.1    ichiro 	usb_endpoint_descriptor_t *ed;
    189      1.16  augustss 	char *devinfop;
    190       1.1    ichiro 	struct ifnet *ifp;
    191       1.1    ichiro 	struct mii_data *mii;
    192       1.1    ichiro 	u_char eaddr[ETHER_ADDR_LEN];
    193       1.1    ichiro 	int i, s;
    194       1.1    ichiro 
    195      1.32      cube 	sc->sc_dev = self;
    196      1.32      cube 
    197      1.34    plunky 	aprint_naive("\n");
    198      1.34    plunky 	aprint_normal("\n");
    199      1.34    plunky 
    200      1.16  augustss 	devinfop = usbd_devinfo_alloc(dev, 0);
    201      1.32      cube 	aprint_normal_dev(self, "%s\n", devinfop);
    202      1.16  augustss 	usbd_devinfo_free(devinfop);
    203       1.1    ichiro 
    204       1.1    ichiro 	/* Move the device into the configured state. */
    205       1.1    ichiro 	err = usbd_set_config_no(dev, URL_CONFIG_NO, 1);
    206       1.1    ichiro 	if (err) {
    207      1.32      cube 		aprint_error_dev(self, "setting config no failed\n");
    208       1.1    ichiro 		goto bad;
    209       1.1    ichiro 	}
    210       1.1    ichiro 
    211       1.1    ichiro 	usb_init_task(&sc->sc_tick_task, url_tick_task, sc);
    212      1.27   xtraeme 	rw_init(&sc->sc_mii_rwlock);
    213       1.1    ichiro 	usb_init_task(&sc->sc_stop_task, (void (*)(void *)) url_stop_task, sc);
    214       1.1    ichiro 
    215       1.1    ichiro 	/* get control interface */
    216       1.1    ichiro 	err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface);
    217       1.1    ichiro 	if (err) {
    218      1.32      cube 		aprint_error_dev(self, "failed to get interface, err=%s\n",
    219       1.1    ichiro 		       usbd_errstr(err));
    220       1.1    ichiro 		goto bad;
    221       1.1    ichiro 	}
    222       1.1    ichiro 
    223       1.1    ichiro 	sc->sc_udev = dev;
    224       1.1    ichiro 	sc->sc_ctl_iface = iface;
    225       1.1    ichiro 	sc->sc_flags = url_lookup(uaa->vendor, uaa->product)->url_flags;
    226       1.1    ichiro 
    227       1.1    ichiro 	/* get interface descriptor */
    228       1.1    ichiro 	id = usbd_get_interface_descriptor(sc->sc_ctl_iface);
    229       1.1    ichiro 
    230       1.1    ichiro 	/* find endpoints */
    231       1.1    ichiro 	sc->sc_bulkin_no = sc->sc_bulkout_no = sc->sc_intrin_no = -1;
    232       1.1    ichiro 	for (i = 0; i < id->bNumEndpoints; i++) {
    233       1.1    ichiro 		ed = usbd_interface2endpoint_descriptor(sc->sc_ctl_iface, i);
    234       1.1    ichiro 		if (ed == NULL) {
    235      1.32      cube 			aprint_error_dev(self,
    236      1.32      cube 			    "couldn't get endpoint %d\n", i);
    237       1.1    ichiro 			goto bad;
    238       1.1    ichiro 		}
    239       1.1    ichiro 		if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
    240       1.1    ichiro 		    UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
    241       1.1    ichiro 			sc->sc_bulkin_no = ed->bEndpointAddress; /* RX */
    242       1.1    ichiro 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
    243       1.1    ichiro 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT)
    244       1.1    ichiro 			sc->sc_bulkout_no = ed->bEndpointAddress; /* TX */
    245       1.1    ichiro 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT &&
    246       1.1    ichiro 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
    247       1.1    ichiro 			sc->sc_intrin_no = ed->bEndpointAddress; /* Status */
    248       1.1    ichiro 	}
    249       1.1    ichiro 
    250       1.1    ichiro 	if (sc->sc_bulkin_no == -1 || sc->sc_bulkout_no == -1 ||
    251       1.1    ichiro 	    sc->sc_intrin_no == -1) {
    252      1.32      cube 		aprint_error_dev(self, "missing endpoint\n");
    253       1.1    ichiro 		goto bad;
    254       1.1    ichiro 	}
    255       1.1    ichiro 
    256       1.1    ichiro 	s = splnet();
    257       1.1    ichiro 
    258       1.1    ichiro 	/* reset the adapter */
    259       1.1    ichiro 	url_reset(sc);
    260       1.1    ichiro 
    261       1.1    ichiro 	/* Get Ethernet Address */
    262       1.1    ichiro 	err = url_mem(sc, URL_CMD_READMEM, URL_IDR0, (void *)eaddr,
    263       1.1    ichiro 		      ETHER_ADDR_LEN);
    264       1.1    ichiro 	if (err) {
    265      1.32      cube 		aprint_error_dev(self, "read MAC address failed\n");
    266       1.1    ichiro 		splx(s);
    267       1.1    ichiro 		goto bad;
    268       1.1    ichiro 	}
    269       1.1    ichiro 
    270       1.1    ichiro 	/* Print Ethernet Address */
    271      1.32      cube 	aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(eaddr));
    272       1.1    ichiro 
    273      1.19       wiz 	/* initialize interface information */
    274       1.1    ichiro 	ifp = GET_IFP(sc);
    275       1.1    ichiro 	ifp->if_softc = sc;
    276       1.3  augustss 	ifp->if_mtu = ETHERMTU;
    277      1.32      cube 	strncpy(ifp->if_xname, device_xname(self), IFNAMSIZ);
    278       1.1    ichiro 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
    279       1.1    ichiro 	ifp->if_start = url_start;
    280       1.1    ichiro 	ifp->if_ioctl = url_ioctl;
    281       1.1    ichiro 	ifp->if_watchdog = url_watchdog;
    282       1.1    ichiro 	ifp->if_init = url_init;
    283       1.1    ichiro 	ifp->if_stop = url_stop;
    284       1.1    ichiro 
    285       1.1    ichiro 	IFQ_SET_READY(&ifp->if_snd);
    286       1.1    ichiro 
    287       1.1    ichiro 	/*
    288       1.1    ichiro 	 * Do ifmedia setup.
    289       1.1    ichiro 	 */
    290       1.1    ichiro 	mii = &sc->sc_mii;
    291       1.1    ichiro 	mii->mii_ifp = ifp;
    292       1.1    ichiro 	mii->mii_readreg = url_int_miibus_readreg;
    293       1.1    ichiro 	mii->mii_writereg = url_int_miibus_writereg;
    294       1.1    ichiro #if 0
    295       1.1    ichiro 	if (sc->sc_flags & URL_EXT_PHY) {
    296       1.1    ichiro 		mii->mii_readreg = url_ext_miibus_readreg;
    297       1.1    ichiro 		mii->mii_writereg = url_ext_miibus_writereg;
    298       1.1    ichiro 	}
    299       1.1    ichiro #endif
    300       1.1    ichiro 	mii->mii_statchg = url_miibus_statchg;
    301       1.1    ichiro 	mii->mii_flags = MIIF_AUTOTSLEEP;
    302      1.30    dyoung 	sc->sc_ec.ec_mii = mii;
    303       1.1    ichiro 	ifmedia_init(&mii->mii_media, 0,
    304       1.1    ichiro 		     url_ifmedia_change, url_ifmedia_status);
    305       1.1    ichiro 	mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
    306       1.1    ichiro 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
    307       1.1    ichiro 		ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
    308       1.1    ichiro 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
    309       1.1    ichiro 	} else
    310       1.1    ichiro 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
    311       1.1    ichiro 
    312       1.1    ichiro 	/* attach the interface */
    313       1.1    ichiro 	if_attach(ifp);
    314  1.36.2.2  uebayasi 	ether_ifattach(ifp, eaddr);
    315       1.1    ichiro 
    316       1.1    ichiro #if NRND > 0
    317      1.32      cube 	rnd_attach_source(&sc->rnd_source, device_xname(self),
    318      1.32      cube 	    RND_TYPE_NET, 0);
    319       1.1    ichiro #endif
    320       1.1    ichiro 
    321  1.36.2.2  uebayasi 	callout_init(&sc->sc_stat_ch, 0);
    322       1.1    ichiro 	sc->sc_attached = 1;
    323       1.1    ichiro 	splx(s);
    324       1.1    ichiro 
    325  1.36.2.2  uebayasi 	usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, dev, sc->sc_dev);
    326       1.1    ichiro 
    327  1.36.2.2  uebayasi 	return;
    328       1.1    ichiro 
    329       1.1    ichiro  bad:
    330       1.1    ichiro 	sc->sc_dying = 1;
    331  1.36.2.2  uebayasi 	return;
    332       1.1    ichiro }
    333       1.1    ichiro 
    334       1.1    ichiro /* detach */
    335  1.36.2.2  uebayasi int
    336  1.36.2.2  uebayasi url_detach(device_t self, int flags)
    337       1.1    ichiro {
    338  1.36.2.2  uebayasi 	struct url_softc *sc = device_private(self);
    339       1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    340       1.1    ichiro 	int s;
    341       1.1    ichiro 
    342  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    343       1.1    ichiro 
    344       1.1    ichiro 	/* Detached before attached finished */
    345       1.1    ichiro 	if (!sc->sc_attached)
    346       1.1    ichiro 		return (0);
    347       1.1    ichiro 
    348  1.36.2.2  uebayasi 	callout_stop(&sc->sc_stat_ch);
    349       1.1    ichiro 
    350       1.1    ichiro 	/* Remove any pending tasks */
    351       1.1    ichiro 	usb_rem_task(sc->sc_udev, &sc->sc_tick_task);
    352       1.1    ichiro 	usb_rem_task(sc->sc_udev, &sc->sc_stop_task);
    353       1.1    ichiro 
    354       1.1    ichiro 	s = splusb();
    355       1.1    ichiro 
    356       1.1    ichiro 	if (--sc->sc_refcnt >= 0) {
    357       1.1    ichiro 		/* Wait for processes to go away */
    358  1.36.2.2  uebayasi 		usb_detach_wait(sc->sc_dev);
    359       1.1    ichiro 	}
    360       1.1    ichiro 
    361       1.1    ichiro 	if (ifp->if_flags & IFF_RUNNING)
    362       1.1    ichiro 		url_stop(GET_IFP(sc), 1);
    363       1.1    ichiro 
    364       1.1    ichiro #if NRND > 0
    365       1.1    ichiro 	rnd_detach_source(&sc->rnd_source);
    366       1.1    ichiro #endif
    367       1.1    ichiro 	mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
    368       1.1    ichiro 	ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
    369       1.1    ichiro 	ether_ifdetach(ifp);
    370       1.1    ichiro 	if_detach(ifp);
    371       1.1    ichiro 
    372       1.1    ichiro #ifdef DIAGNOSTIC
    373       1.1    ichiro 	if (sc->sc_pipe_tx != NULL)
    374      1.32      cube 		aprint_debug_dev(self, "detach has active tx endpoint.\n");
    375       1.1    ichiro 	if (sc->sc_pipe_rx != NULL)
    376      1.32      cube 		aprint_debug_dev(self, "detach has active rx endpoint.\n");
    377       1.1    ichiro 	if (sc->sc_pipe_intr != NULL)
    378      1.32      cube 		aprint_debug_dev(self, "detach has active intr endpoint.\n");
    379       1.1    ichiro #endif
    380       1.1    ichiro 
    381       1.1    ichiro 	sc->sc_attached = 0;
    382       1.1    ichiro 
    383       1.1    ichiro 	splx(s);
    384       1.1    ichiro 
    385      1.28   xtraeme 	rw_destroy(&sc->sc_mii_rwlock);
    386       1.1    ichiro 	usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
    387  1.36.2.2  uebayasi 			   sc->sc_dev);
    388       1.1    ichiro 
    389       1.1    ichiro 	return (0);
    390       1.1    ichiro }
    391       1.1    ichiro 
    392       1.1    ichiro /* read/write memory */
    393       1.1    ichiro Static int
    394       1.1    ichiro url_mem(struct url_softc *sc, int cmd, int offset, void *buf, int len)
    395       1.1    ichiro {
    396       1.1    ichiro 	usb_device_request_t req;
    397       1.1    ichiro 	usbd_status err;
    398       1.1    ichiro 
    399       1.1    ichiro 	if (sc == NULL)
    400       1.1    ichiro 		return (0);
    401       1.1    ichiro 
    402       1.1    ichiro 	DPRINTFN(0x200,
    403  1.36.2.2  uebayasi 		("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    404       1.1    ichiro 
    405       1.1    ichiro 	if (sc->sc_dying)
    406       1.1    ichiro 		return (0);
    407       1.1    ichiro 
    408       1.1    ichiro 	if (cmd == URL_CMD_READMEM)
    409       1.1    ichiro 		req.bmRequestType = UT_READ_VENDOR_DEVICE;
    410       1.1    ichiro 	else
    411       1.1    ichiro 		req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
    412       1.1    ichiro 	req.bRequest = URL_REQ_MEM;
    413       1.1    ichiro 	USETW(req.wValue, offset);
    414       1.1    ichiro 	USETW(req.wIndex, 0x0000);
    415       1.1    ichiro 	USETW(req.wLength, len);
    416       1.1    ichiro 
    417       1.1    ichiro 	sc->sc_refcnt++;
    418       1.1    ichiro 	err = usbd_do_request(sc->sc_udev, &req, buf);
    419       1.1    ichiro 	if (--sc->sc_refcnt < 0)
    420  1.36.2.2  uebayasi 		usb_detach_wakeup(sc->sc_dev);
    421       1.1    ichiro 	if (err) {
    422       1.1    ichiro 		DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n",
    423  1.36.2.2  uebayasi 			 device_xname(sc->sc_dev),
    424       1.1    ichiro 			 cmd == URL_CMD_READMEM ? "read" : "write",
    425       1.1    ichiro 			 offset, err));
    426       1.5  augustss 	}
    427       1.1    ichiro 
    428       1.1    ichiro 	return (err);
    429       1.1    ichiro }
    430       1.1    ichiro 
    431       1.1    ichiro /* read 1byte from register */
    432       1.1    ichiro Static int
    433       1.1    ichiro url_csr_read_1(struct url_softc *sc, int reg)
    434       1.1    ichiro {
    435       1.1    ichiro 	u_int8_t val = 0;
    436       1.1    ichiro 
    437       1.1    ichiro 	DPRINTFN(0x100,
    438  1.36.2.2  uebayasi 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    439       1.1    ichiro 
    440       1.1    ichiro 	if (sc->sc_dying)
    441       1.1    ichiro 		return (0);
    442       1.5  augustss 
    443       1.1    ichiro 	return (url_mem(sc, URL_CMD_READMEM, reg, &val, 1) ? 0 : val);
    444       1.1    ichiro }
    445       1.1    ichiro 
    446       1.1    ichiro /* read 2bytes from register */
    447       1.1    ichiro Static int
    448       1.1    ichiro url_csr_read_2(struct url_softc *sc, int reg)
    449       1.1    ichiro {
    450       1.1    ichiro 	uWord val;
    451       1.1    ichiro 
    452       1.1    ichiro 	DPRINTFN(0x100,
    453  1.36.2.2  uebayasi 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    454       1.1    ichiro 
    455       1.1    ichiro 	if (sc->sc_dying)
    456       1.1    ichiro 		return (0);
    457       1.5  augustss 
    458       1.1    ichiro 	USETW(val, 0);
    459       1.1    ichiro 	return (url_mem(sc, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val));
    460       1.1    ichiro }
    461       1.1    ichiro 
    462       1.1    ichiro /* write 1byte to register */
    463       1.1    ichiro Static int
    464       1.1    ichiro url_csr_write_1(struct url_softc *sc, int reg, int aval)
    465       1.1    ichiro {
    466       1.1    ichiro 	u_int8_t val = aval;
    467       1.1    ichiro 
    468       1.1    ichiro 	DPRINTFN(0x100,
    469  1.36.2.2  uebayasi 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    470       1.1    ichiro 
    471       1.1    ichiro 	if (sc->sc_dying)
    472       1.1    ichiro 		return (0);
    473       1.5  augustss 
    474       1.1    ichiro 	return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0);
    475       1.1    ichiro }
    476       1.1    ichiro 
    477       1.1    ichiro /* write 2bytes to register */
    478       1.1    ichiro Static int
    479       1.1    ichiro url_csr_write_2(struct url_softc *sc, int reg, int aval)
    480       1.1    ichiro {
    481       1.1    ichiro 	uWord val;
    482       1.1    ichiro 
    483       1.1    ichiro 	DPRINTFN(0x100,
    484  1.36.2.2  uebayasi 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    485       1.1    ichiro 
    486       1.1    ichiro 	USETW(val, aval);
    487       1.1    ichiro 
    488       1.1    ichiro 	if (sc->sc_dying)
    489       1.1    ichiro 		return (0);
    490       1.5  augustss 
    491       1.1    ichiro 	return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0);
    492       1.1    ichiro }
    493       1.1    ichiro 
    494       1.1    ichiro /* write 4bytes to register */
    495       1.1    ichiro Static int
    496       1.1    ichiro url_csr_write_4(struct url_softc *sc, int reg, int aval)
    497       1.1    ichiro {
    498       1.1    ichiro 	uDWord val;
    499       1.1    ichiro 
    500       1.1    ichiro 	DPRINTFN(0x100,
    501  1.36.2.2  uebayasi 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    502       1.1    ichiro 
    503       1.1    ichiro 	USETDW(val, aval);
    504       1.1    ichiro 
    505       1.1    ichiro 	if (sc->sc_dying)
    506       1.1    ichiro 		return (0);
    507       1.5  augustss 
    508       1.1    ichiro 	return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0);
    509       1.1    ichiro }
    510       1.1    ichiro 
    511       1.1    ichiro Static int
    512       1.1    ichiro url_init(struct ifnet *ifp)
    513       1.1    ichiro {
    514       1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
    515       1.1    ichiro 	struct mii_data *mii = GET_MII(sc);
    516      1.29    dyoung 	const u_char *eaddr;
    517      1.30    dyoung 	int i, rc, s;
    518       1.1    ichiro 
    519  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    520       1.5  augustss 
    521       1.1    ichiro 	if (sc->sc_dying)
    522       1.1    ichiro 		return (EIO);
    523       1.1    ichiro 
    524       1.1    ichiro 	s = splnet();
    525       1.1    ichiro 
    526       1.1    ichiro 	/* Cancel pending I/O and free all TX/RX buffers */
    527       1.1    ichiro 	url_stop(ifp, 1);
    528       1.1    ichiro 
    529      1.29    dyoung 	eaddr = CLLADDR(ifp->if_sadl);
    530       1.1    ichiro 	for (i = 0; i < ETHER_ADDR_LEN; i++)
    531       1.1    ichiro 		url_csr_write_1(sc, URL_IDR0 + i, eaddr[i]);
    532       1.1    ichiro 
    533       1.1    ichiro 	/* Init transmission control register */
    534       1.1    ichiro 	URL_CLRBIT(sc, URL_TCR,
    535       1.1    ichiro 		   URL_TCR_TXRR1 | URL_TCR_TXRR0 |
    536       1.1    ichiro 		   URL_TCR_IFG1 | URL_TCR_IFG0 |
    537       1.1    ichiro 		   URL_TCR_NOCRC);
    538       1.1    ichiro 
    539       1.1    ichiro 	/* Init receive control register */
    540       1.1    ichiro 	URL_SETBIT2(sc, URL_RCR, URL_RCR_TAIL | URL_RCR_AD);
    541       1.1    ichiro 	if (ifp->if_flags & IFF_BROADCAST)
    542       1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AB);
    543       1.1    ichiro 	else
    544       1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AB);
    545       1.1    ichiro 
    546       1.1    ichiro 	/* If we want promiscuous mode, accept all physical frames. */
    547       1.1    ichiro 	if (ifp->if_flags & IFF_PROMISC)
    548       1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    549       1.1    ichiro 	else
    550       1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    551       1.1    ichiro 
    552       1.5  augustss 
    553       1.1    ichiro 	/* Initialize transmit ring */
    554       1.1    ichiro 	if (url_tx_list_init(sc) == ENOBUFS) {
    555  1.36.2.2  uebayasi 		printf("%s: tx list init failed\n", device_xname(sc->sc_dev));
    556       1.1    ichiro 		splx(s);
    557       1.1    ichiro 		return (EIO);
    558       1.1    ichiro 	}
    559       1.1    ichiro 
    560       1.1    ichiro 	/* Initialize receive ring */
    561       1.1    ichiro 	if (url_rx_list_init(sc) == ENOBUFS) {
    562  1.36.2.2  uebayasi 		printf("%s: rx list init failed\n", device_xname(sc->sc_dev));
    563       1.1    ichiro 		splx(s);
    564       1.1    ichiro 		return (EIO);
    565       1.1    ichiro 	}
    566       1.1    ichiro 
    567       1.1    ichiro 	/* Load the multicast filter */
    568       1.1    ichiro 	url_setmulti(sc);
    569       1.1    ichiro 
    570       1.1    ichiro 	/* Enable RX and TX */
    571       1.1    ichiro 	URL_SETBIT(sc, URL_CR, URL_CR_TE | URL_CR_RE);
    572       1.1    ichiro 
    573      1.30    dyoung 	if ((rc = mii_mediachg(mii)) == ENXIO)
    574      1.30    dyoung 		rc = 0;
    575      1.30    dyoung 	else if (rc != 0)
    576      1.30    dyoung 		goto out;
    577       1.1    ichiro 
    578       1.1    ichiro 	if (sc->sc_pipe_tx == NULL || sc->sc_pipe_rx == NULL) {
    579       1.1    ichiro 		if (url_openpipes(sc)) {
    580       1.1    ichiro 			splx(s);
    581       1.1    ichiro 			return (EIO);
    582       1.1    ichiro 		}
    583       1.1    ichiro 	}
    584       1.1    ichiro 
    585       1.1    ichiro 	ifp->if_flags |= IFF_RUNNING;
    586       1.1    ichiro 	ifp->if_flags &= ~IFF_OACTIVE;
    587       1.1    ichiro 
    588  1.36.2.2  uebayasi 	callout_reset(&sc->sc_stat_ch, hz, url_tick, sc);
    589       1.1    ichiro 
    590      1.30    dyoung out:
    591      1.30    dyoung 	splx(s);
    592      1.30    dyoung 	return rc;
    593       1.1    ichiro }
    594       1.1    ichiro 
    595       1.1    ichiro Static void
    596       1.1    ichiro url_reset(struct url_softc *sc)
    597       1.1    ichiro {
    598       1.1    ichiro 	int i;
    599       1.5  augustss 
    600  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    601       1.1    ichiro 
    602       1.1    ichiro 	if (sc->sc_dying)
    603       1.1    ichiro 		return;
    604       1.1    ichiro 
    605       1.1    ichiro 	URL_SETBIT(sc, URL_CR, URL_CR_SOFT_RST);
    606       1.1    ichiro 
    607       1.1    ichiro 	for (i = 0; i < URL_TX_TIMEOUT; i++) {
    608       1.1    ichiro 		if (!(url_csr_read_1(sc, URL_CR) & URL_CR_SOFT_RST))
    609       1.1    ichiro 			break;
    610       1.1    ichiro 		delay(10);	/* XXX */
    611       1.1    ichiro 	}
    612       1.1    ichiro 
    613       1.1    ichiro 	delay(10000);		/* XXX */
    614       1.1    ichiro }
    615       1.1    ichiro 
    616       1.1    ichiro int
    617  1.36.2.2  uebayasi url_activate(device_t self, enum devact act)
    618       1.1    ichiro {
    619      1.32      cube 	struct url_softc *sc = device_private(self);
    620       1.1    ichiro 
    621  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter, act=%d\n", device_xname(sc->sc_dev),
    622       1.4  augustss 		 __func__, act));
    623       1.1    ichiro 
    624       1.1    ichiro 	switch (act) {
    625       1.1    ichiro 	case DVACT_DEACTIVATE:
    626       1.1    ichiro 		if_deactivate(&sc->sc_ec.ec_if);
    627       1.1    ichiro 		sc->sc_dying = 1;
    628      1.35    dyoung 		return 0;
    629      1.35    dyoung 	default:
    630      1.35    dyoung 		return EOPNOTSUPP;
    631       1.1    ichiro 	}
    632       1.1    ichiro }
    633       1.1    ichiro 
    634       1.1    ichiro #define url_calchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) >> 26)
    635       1.1    ichiro 
    636       1.1    ichiro 
    637       1.1    ichiro Static void
    638       1.1    ichiro url_setmulti(struct url_softc *sc)
    639       1.1    ichiro {
    640       1.1    ichiro 	struct ifnet *ifp;
    641       1.1    ichiro 	struct ether_multi *enm;
    642       1.1    ichiro 	struct ether_multistep step;
    643       1.1    ichiro 	u_int32_t hashes[2] = { 0, 0 };
    644       1.1    ichiro 	int h = 0;
    645       1.1    ichiro 	int mcnt = 0;
    646       1.1    ichiro 
    647  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    648       1.1    ichiro 
    649       1.1    ichiro 	if (sc->sc_dying)
    650       1.1    ichiro 		return;
    651       1.1    ichiro 
    652       1.1    ichiro 	ifp = GET_IFP(sc);
    653       1.1    ichiro 
    654       1.1    ichiro 	if (ifp->if_flags & IFF_PROMISC) {
    655       1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    656       1.1    ichiro 		return;
    657       1.1    ichiro 	} else if (ifp->if_flags & IFF_ALLMULTI) {
    658       1.1    ichiro 	allmulti:
    659       1.1    ichiro 		ifp->if_flags |= IFF_ALLMULTI;
    660       1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM);
    661       1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAP);
    662       1.1    ichiro 		return;
    663       1.1    ichiro 	}
    664       1.1    ichiro 
    665       1.1    ichiro 	/* first, zot all the existing hash bits */
    666       1.1    ichiro 	url_csr_write_4(sc, URL_MAR0, 0);
    667       1.1    ichiro 	url_csr_write_4(sc, URL_MAR4, 0);
    668       1.1    ichiro 
    669       1.1    ichiro 	/* now program new ones */
    670       1.1    ichiro 	ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
    671       1.1    ichiro 	while (enm != NULL) {
    672       1.1    ichiro 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
    673       1.1    ichiro 			   ETHER_ADDR_LEN) != 0)
    674       1.1    ichiro 			goto allmulti;
    675       1.1    ichiro 
    676       1.1    ichiro 		h = url_calchash(enm->enm_addrlo);
    677       1.1    ichiro 		if (h < 32)
    678       1.1    ichiro 			hashes[0] |= (1 << h);
    679       1.1    ichiro 		else
    680       1.1    ichiro 			hashes[1] |= (1 << (h -32));
    681       1.1    ichiro 		mcnt++;
    682       1.1    ichiro 		ETHER_NEXT_MULTI(step, enm);
    683       1.1    ichiro 	}
    684       1.1    ichiro 
    685       1.1    ichiro 	ifp->if_flags &= ~IFF_ALLMULTI;
    686       1.1    ichiro 
    687       1.1    ichiro 	URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    688       1.1    ichiro 
    689       1.1    ichiro 	if (mcnt){
    690       1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AM);
    691       1.1    ichiro 	} else {
    692       1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AM);
    693       1.1    ichiro 	}
    694       1.1    ichiro 	url_csr_write_4(sc, URL_MAR0, hashes[0]);
    695       1.1    ichiro 	url_csr_write_4(sc, URL_MAR4, hashes[1]);
    696       1.1    ichiro }
    697       1.1    ichiro 
    698       1.1    ichiro Static int
    699       1.1    ichiro url_openpipes(struct url_softc *sc)
    700       1.1    ichiro {
    701       1.1    ichiro 	struct url_chain *c;
    702       1.1    ichiro 	usbd_status err;
    703       1.1    ichiro 	int i;
    704       1.1    ichiro 	int error = 0;
    705       1.1    ichiro 
    706       1.1    ichiro 	if (sc->sc_dying)
    707       1.1    ichiro 		return (EIO);
    708       1.5  augustss 
    709       1.1    ichiro 	sc->sc_refcnt++;
    710       1.1    ichiro 
    711       1.1    ichiro 	/* Open RX pipe */
    712       1.1    ichiro 	err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkin_no,
    713       1.1    ichiro 			     USBD_EXCLUSIVE_USE, &sc->sc_pipe_rx);
    714       1.1    ichiro 	if (err) {
    715       1.1    ichiro 		printf("%s: open rx pipe failed: %s\n",
    716  1.36.2.2  uebayasi 		       device_xname(sc->sc_dev), usbd_errstr(err));
    717       1.1    ichiro 		error = EIO;
    718       1.1    ichiro 		goto done;
    719       1.1    ichiro 	}
    720       1.5  augustss 
    721       1.1    ichiro 	/* Open TX pipe */
    722       1.1    ichiro 	err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkout_no,
    723       1.1    ichiro 			     USBD_EXCLUSIVE_USE, &sc->sc_pipe_tx);
    724       1.1    ichiro 	if (err) {
    725       1.1    ichiro 		printf("%s: open tx pipe failed: %s\n",
    726  1.36.2.2  uebayasi 		       device_xname(sc->sc_dev), usbd_errstr(err));
    727       1.1    ichiro 		error = EIO;
    728       1.1    ichiro 		goto done;
    729       1.1    ichiro 	}
    730       1.1    ichiro 
    731       1.1    ichiro #if 0
    732       1.1    ichiro 	/* XXX: interrupt endpoint is not yet supported */
    733       1.1    ichiro 	/* Open Interrupt pipe */
    734       1.1    ichiro 	err = usbd_open_pipe_intr(sc->sc_ctl_iface, sc->sc_intrin_no,
    735       1.1    ichiro 				  USBD_EXCLUSIVE_USE, &sc->sc_pipe_intr, sc,
    736       1.1    ichiro 				  &sc->sc_cdata.url_ibuf, URL_INTR_PKGLEN,
    737      1.24  drochner 				  url_intr, USBD_DEFAULT_INTERVAL);
    738       1.1    ichiro 	if (err) {
    739       1.1    ichiro 		printf("%s: open intr pipe failed: %s\n",
    740  1.36.2.2  uebayasi 		       device_xname(sc->sc_dev), usbd_errstr(err));
    741       1.1    ichiro 		error = EIO;
    742       1.1    ichiro 		goto done;
    743       1.1    ichiro 	}
    744       1.1    ichiro #endif
    745       1.1    ichiro 
    746       1.1    ichiro 
    747       1.1    ichiro 	/* Start up the receive pipe. */
    748       1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
    749       1.1    ichiro 		c = &sc->sc_cdata.url_rx_chain[i];
    750       1.1    ichiro 		usbd_setup_xfer(c->url_xfer, sc->sc_pipe_rx,
    751       1.1    ichiro 				c, c->url_buf, URL_BUFSZ,
    752       1.1    ichiro 				USBD_SHORT_XFER_OK | USBD_NO_COPY,
    753       1.1    ichiro 				USBD_NO_TIMEOUT, url_rxeof);
    754       1.1    ichiro 		(void)usbd_transfer(c->url_xfer);
    755  1.36.2.2  uebayasi 		DPRINTF(("%s: %s: start read\n", device_xname(sc->sc_dev),
    756       1.4  augustss 			 __func__));
    757       1.1    ichiro 	}
    758       1.1    ichiro 
    759       1.1    ichiro  done:
    760       1.1    ichiro 	if (--sc->sc_refcnt < 0)
    761  1.36.2.2  uebayasi 		usb_detach_wakeup(sc->sc_dev);
    762       1.5  augustss 
    763       1.1    ichiro 	return (error);
    764       1.1    ichiro }
    765       1.1    ichiro 
    766       1.1    ichiro Static int
    767       1.1    ichiro url_newbuf(struct url_softc *sc, struct url_chain *c, struct mbuf *m)
    768       1.1    ichiro {
    769       1.1    ichiro 	struct mbuf *m_new = NULL;
    770       1.1    ichiro 
    771  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    772       1.1    ichiro 
    773       1.1    ichiro 	if (m == NULL) {
    774       1.1    ichiro 		MGETHDR(m_new, M_DONTWAIT, MT_DATA);
    775       1.1    ichiro 		if (m_new == NULL) {
    776       1.1    ichiro 			printf("%s: no memory for rx list "
    777  1.36.2.2  uebayasi 			       "-- packet dropped!\n", device_xname(sc->sc_dev));
    778       1.1    ichiro 			return (ENOBUFS);
    779       1.1    ichiro 		}
    780       1.1    ichiro 		MCLGET(m_new, M_DONTWAIT);
    781       1.1    ichiro 		if (!(m_new->m_flags & M_EXT)) {
    782       1.1    ichiro 			printf("%s: no memory for rx list "
    783  1.36.2.2  uebayasi 			       "-- packet dropped!\n", device_xname(sc->sc_dev));
    784       1.1    ichiro 			m_freem(m_new);
    785       1.1    ichiro 			return (ENOBUFS);
    786       1.1    ichiro 		}
    787       1.1    ichiro 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
    788       1.1    ichiro 	} else {
    789       1.1    ichiro 		m_new = m;
    790       1.1    ichiro 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
    791       1.1    ichiro 		m_new->m_data = m_new->m_ext.ext_buf;
    792       1.1    ichiro 	}
    793       1.1    ichiro 
    794       1.1    ichiro 	m_adj(m_new, ETHER_ALIGN);
    795       1.1    ichiro 	c->url_mbuf = m_new;
    796       1.1    ichiro 
    797       1.1    ichiro 	return (0);
    798       1.1    ichiro }
    799       1.5  augustss 
    800       1.1    ichiro 
    801       1.1    ichiro Static int
    802       1.1    ichiro url_rx_list_init(struct url_softc *sc)
    803       1.1    ichiro {
    804       1.1    ichiro 	struct url_cdata *cd;
    805       1.1    ichiro 	struct url_chain *c;
    806       1.1    ichiro 	int i;
    807       1.1    ichiro 
    808  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    809       1.1    ichiro 
    810       1.1    ichiro 	cd = &sc->sc_cdata;
    811       1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
    812       1.1    ichiro 		c = &cd->url_rx_chain[i];
    813       1.1    ichiro 		c->url_sc = sc;
    814       1.1    ichiro 		c->url_idx = i;
    815       1.1    ichiro 		if (url_newbuf(sc, c, NULL) == ENOBUFS)
    816       1.1    ichiro 			return (ENOBUFS);
    817       1.1    ichiro 		if (c->url_xfer == NULL) {
    818       1.1    ichiro 			c->url_xfer = usbd_alloc_xfer(sc->sc_udev);
    819       1.1    ichiro 			if (c->url_xfer == NULL)
    820       1.1    ichiro 				return (ENOBUFS);
    821       1.1    ichiro 			c->url_buf = usbd_alloc_buffer(c->url_xfer, URL_BUFSZ);
    822       1.1    ichiro 			if (c->url_buf == NULL) {
    823       1.1    ichiro 				usbd_free_xfer(c->url_xfer);
    824       1.1    ichiro 				return (ENOBUFS);
    825       1.1    ichiro 			}
    826       1.1    ichiro 		}
    827       1.1    ichiro 	}
    828       1.5  augustss 
    829       1.1    ichiro 	return (0);
    830       1.1    ichiro }
    831       1.1    ichiro 
    832       1.1    ichiro Static int
    833       1.1    ichiro url_tx_list_init(struct url_softc *sc)
    834       1.1    ichiro {
    835       1.1    ichiro 	struct url_cdata *cd;
    836       1.1    ichiro 	struct url_chain *c;
    837       1.1    ichiro 	int i;
    838       1.1    ichiro 
    839  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    840       1.1    ichiro 
    841       1.1    ichiro 	cd = &sc->sc_cdata;
    842       1.1    ichiro 	for (i = 0; i < URL_TX_LIST_CNT; i++) {
    843       1.1    ichiro 		c = &cd->url_tx_chain[i];
    844       1.1    ichiro 		c->url_sc = sc;
    845       1.1    ichiro 		c->url_idx = i;
    846       1.1    ichiro 		c->url_mbuf = NULL;
    847       1.1    ichiro 		if (c->url_xfer == NULL) {
    848       1.1    ichiro 			c->url_xfer = usbd_alloc_xfer(sc->sc_udev);
    849       1.1    ichiro 			if (c->url_xfer == NULL)
    850       1.1    ichiro 				return (ENOBUFS);
    851       1.1    ichiro 			c->url_buf = usbd_alloc_buffer(c->url_xfer, URL_BUFSZ);
    852       1.1    ichiro 			if (c->url_buf == NULL) {
    853       1.1    ichiro 				usbd_free_xfer(c->url_xfer);
    854       1.1    ichiro 				return (ENOBUFS);
    855       1.1    ichiro 			}
    856       1.1    ichiro 		}
    857       1.1    ichiro 	}
    858       1.5  augustss 
    859       1.1    ichiro 	return (0);
    860       1.1    ichiro }
    861       1.1    ichiro 
    862       1.1    ichiro Static void
    863       1.1    ichiro url_start(struct ifnet *ifp)
    864       1.1    ichiro {
    865       1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
    866       1.1    ichiro 	struct mbuf *m_head = NULL;
    867       1.5  augustss 
    868  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter, link=%d\n", device_xname(sc->sc_dev),
    869       1.4  augustss 		 __func__, sc->sc_link));
    870       1.1    ichiro 
    871       1.1    ichiro 	if (sc->sc_dying)
    872       1.1    ichiro 		return;
    873       1.1    ichiro 
    874       1.1    ichiro 	if (!sc->sc_link)
    875       1.1    ichiro 		return;
    876       1.1    ichiro 
    877       1.1    ichiro 	if (ifp->if_flags & IFF_OACTIVE)
    878       1.1    ichiro 		return;
    879       1.1    ichiro 
    880       1.1    ichiro 	IFQ_POLL(&ifp->if_snd, m_head);
    881       1.1    ichiro 	if (m_head == NULL)
    882       1.1    ichiro 		return;
    883       1.1    ichiro 
    884       1.1    ichiro 	if (url_send(sc, m_head, 0)) {
    885       1.1    ichiro 		ifp->if_flags |= IFF_OACTIVE;
    886       1.1    ichiro 		return;
    887       1.1    ichiro 	}
    888       1.1    ichiro 
    889       1.1    ichiro 	IFQ_DEQUEUE(&ifp->if_snd, m_head);
    890       1.1    ichiro 
    891  1.36.2.1  uebayasi 	bpf_mtap(ifp, m_head);
    892       1.1    ichiro 
    893       1.1    ichiro 	ifp->if_flags |= IFF_OACTIVE;
    894       1.1    ichiro 
    895       1.1    ichiro 	/* Set a timeout in case the chip goes out to lunch. */
    896       1.1    ichiro 	ifp->if_timer = 5;
    897       1.1    ichiro }
    898       1.1    ichiro 
    899       1.1    ichiro Static int
    900       1.1    ichiro url_send(struct url_softc *sc, struct mbuf *m, int idx)
    901       1.1    ichiro {
    902       1.1    ichiro 	int total_len;
    903       1.1    ichiro 	struct url_chain *c;
    904       1.1    ichiro 	usbd_status err;
    905       1.1    ichiro 
    906  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev),__func__));
    907       1.1    ichiro 
    908       1.1    ichiro 	c = &sc->sc_cdata.url_tx_chain[idx];
    909       1.1    ichiro 
    910       1.1    ichiro 	/* Copy the mbuf data into a contiguous buffer */
    911       1.1    ichiro 	m_copydata(m, 0, m->m_pkthdr.len, c->url_buf);
    912       1.1    ichiro 	c->url_mbuf = m;
    913       1.1    ichiro 	total_len = m->m_pkthdr.len;
    914       1.1    ichiro 
    915       1.7    bouyer 	if (total_len < URL_MIN_FRAME_LEN) {
    916       1.7    bouyer 		memset(c->url_buf + total_len, 0,
    917       1.7    bouyer 		    URL_MIN_FRAME_LEN - total_len);
    918       1.1    ichiro 		total_len = URL_MIN_FRAME_LEN;
    919       1.7    bouyer 	}
    920       1.1    ichiro 	usbd_setup_xfer(c->url_xfer, sc->sc_pipe_tx, c, c->url_buf, total_len,
    921       1.1    ichiro 			USBD_FORCE_SHORT_XFER | USBD_NO_COPY,
    922       1.1    ichiro 			URL_TX_TIMEOUT, url_txeof);
    923       1.1    ichiro 
    924       1.1    ichiro 	/* Transmit */
    925       1.1    ichiro 	sc->sc_refcnt++;
    926       1.1    ichiro 	err = usbd_transfer(c->url_xfer);
    927       1.1    ichiro 	if (--sc->sc_refcnt < 0)
    928  1.36.2.2  uebayasi 		usb_detach_wakeup(sc->sc_dev);
    929       1.1    ichiro 	if (err != USBD_IN_PROGRESS) {
    930  1.36.2.2  uebayasi 		printf("%s: url_send error=%s\n", device_xname(sc->sc_dev),
    931       1.1    ichiro 		       usbd_errstr(err));
    932       1.1    ichiro 		/* Stop the interface */
    933      1.22     joerg 		usb_add_task(sc->sc_udev, &sc->sc_stop_task,
    934      1.22     joerg 		    USB_TASKQ_DRIVER);
    935       1.1    ichiro 		return (EIO);
    936       1.1    ichiro 	}
    937       1.1    ichiro 
    938  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: send %d bytes\n", device_xname(sc->sc_dev),
    939       1.4  augustss 		 __func__, total_len));
    940       1.1    ichiro 
    941       1.1    ichiro 	sc->sc_cdata.url_tx_cnt++;
    942       1.1    ichiro 
    943       1.1    ichiro 	return (0);
    944       1.1    ichiro }
    945       1.1    ichiro 
    946       1.1    ichiro Static void
    947      1.23  christos url_txeof(usbd_xfer_handle xfer, usbd_private_handle priv,
    948      1.21  christos     usbd_status status)
    949       1.1    ichiro {
    950       1.1    ichiro 	struct url_chain *c = priv;
    951       1.1    ichiro 	struct url_softc *sc = c->url_sc;
    952       1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    953       1.1    ichiro 	int s;
    954       1.1    ichiro 
    955       1.1    ichiro 	if (sc->sc_dying)
    956       1.1    ichiro 		return;
    957       1.1    ichiro 
    958       1.1    ichiro 	s = splnet();
    959       1.1    ichiro 
    960  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    961       1.1    ichiro 
    962       1.1    ichiro 	ifp->if_timer = 0;
    963       1.1    ichiro 	ifp->if_flags &= ~IFF_OACTIVE;
    964       1.1    ichiro 
    965       1.1    ichiro 	if (status != USBD_NORMAL_COMPLETION) {
    966       1.1    ichiro 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
    967       1.1    ichiro 			splx(s);
    968       1.1    ichiro 			return;
    969       1.1    ichiro 		}
    970       1.1    ichiro 		ifp->if_oerrors++;
    971  1.36.2.2  uebayasi 		printf("%s: usb error on tx: %s\n", device_xname(sc->sc_dev),
    972       1.1    ichiro 		       usbd_errstr(status));
    973       1.1    ichiro 		if (status == USBD_STALLED) {
    974       1.1    ichiro 			sc->sc_refcnt++;
    975      1.18  augustss 			usbd_clear_endpoint_stall_async(sc->sc_pipe_tx);
    976       1.1    ichiro 			if (--sc->sc_refcnt < 0)
    977  1.36.2.2  uebayasi 				usb_detach_wakeup(sc->sc_dev);
    978       1.1    ichiro 		}
    979       1.1    ichiro 		splx(s);
    980       1.1    ichiro 		return;
    981       1.1    ichiro 	}
    982       1.1    ichiro 
    983       1.1    ichiro 	ifp->if_opackets++;
    984       1.1    ichiro 
    985       1.6    martin 	m_freem(c->url_mbuf);
    986       1.1    ichiro 	c->url_mbuf = NULL;
    987       1.1    ichiro 
    988       1.1    ichiro 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
    989       1.1    ichiro 		url_start(ifp);
    990       1.1    ichiro 
    991       1.1    ichiro 	splx(s);
    992       1.1    ichiro }
    993       1.1    ichiro 
    994       1.1    ichiro Static void
    995       1.1    ichiro url_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
    996       1.1    ichiro {
    997       1.1    ichiro 	struct url_chain *c = priv;
    998       1.1    ichiro 	struct url_softc *sc = c->url_sc;
    999       1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
   1000       1.1    ichiro 	struct mbuf *m;
   1001       1.1    ichiro 	u_int32_t total_len;
   1002       1.1    ichiro 	url_rxhdr_t rxhdr;
   1003       1.1    ichiro 	int s;
   1004       1.1    ichiro 
   1005  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev),__func__));
   1006       1.1    ichiro 
   1007       1.1    ichiro 	if (sc->sc_dying)
   1008       1.1    ichiro 		return;
   1009       1.1    ichiro 
   1010       1.1    ichiro 	if (status != USBD_NORMAL_COMPLETION) {
   1011       1.1    ichiro 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
   1012       1.1    ichiro 			return;
   1013       1.1    ichiro 		sc->sc_rx_errs++;
   1014       1.1    ichiro 		if (usbd_ratecheck(&sc->sc_rx_notice)) {
   1015       1.1    ichiro 			printf("%s: %u usb errors on rx: %s\n",
   1016  1.36.2.2  uebayasi 			       device_xname(sc->sc_dev), sc->sc_rx_errs,
   1017       1.1    ichiro 			       usbd_errstr(status));
   1018       1.1    ichiro 			sc->sc_rx_errs = 0;
   1019       1.1    ichiro 		}
   1020       1.1    ichiro 		if (status == USBD_STALLED) {
   1021       1.1    ichiro 			sc->sc_refcnt++;
   1022      1.18  augustss 			usbd_clear_endpoint_stall_async(sc->sc_pipe_rx);
   1023       1.1    ichiro 			if (--sc->sc_refcnt < 0)
   1024  1.36.2.2  uebayasi 				usb_detach_wakeup(sc->sc_dev);
   1025       1.1    ichiro 		}
   1026       1.1    ichiro 		goto done;
   1027       1.1    ichiro 	}
   1028       1.1    ichiro 
   1029       1.1    ichiro 	usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
   1030       1.1    ichiro 
   1031       1.1    ichiro 	memcpy(mtod(c->url_mbuf, char *), c->url_buf, total_len);
   1032       1.1    ichiro 
   1033       1.1    ichiro 	if (total_len <= ETHER_CRC_LEN) {
   1034       1.1    ichiro 		ifp->if_ierrors++;
   1035       1.1    ichiro 		goto done;
   1036       1.1    ichiro 	}
   1037       1.1    ichiro 
   1038       1.1    ichiro 	memcpy(&rxhdr, c->url_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr));
   1039       1.1    ichiro 
   1040       1.1    ichiro 	DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n",
   1041  1.36.2.2  uebayasi 		 device_xname(sc->sc_dev),
   1042       1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK,
   1043       1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "",
   1044       1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "",
   1045       1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "",
   1046       1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : ""));
   1047       1.1    ichiro 
   1048       1.1    ichiro 	if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) {
   1049       1.1    ichiro 		ifp->if_ierrors++;
   1050       1.1    ichiro 		goto done;
   1051       1.1    ichiro 	}
   1052       1.1    ichiro 
   1053       1.1    ichiro 	ifp->if_ipackets++;
   1054       1.1    ichiro 	total_len -= ETHER_CRC_LEN;
   1055       1.1    ichiro 
   1056       1.1    ichiro 	m = c->url_mbuf;
   1057       1.1    ichiro 	m->m_pkthdr.len = m->m_len = total_len;
   1058       1.1    ichiro 	m->m_pkthdr.rcvif = ifp;
   1059       1.1    ichiro 
   1060       1.1    ichiro 	s = splnet();
   1061       1.1    ichiro 
   1062       1.1    ichiro 	if (url_newbuf(sc, c, NULL) == ENOBUFS) {
   1063       1.1    ichiro 		ifp->if_ierrors++;
   1064       1.1    ichiro 		goto done1;
   1065       1.1    ichiro 	}
   1066       1.1    ichiro 
   1067  1.36.2.1  uebayasi 	bpf_mtap(ifp, m);
   1068       1.1    ichiro 
   1069  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: deliver %d\n", device_xname(sc->sc_dev),
   1070       1.4  augustss 		 __func__, m->m_len));
   1071  1.36.2.2  uebayasi 	(*(ifp)->if_input)((ifp), (m));
   1072       1.1    ichiro 
   1073       1.1    ichiro  done1:
   1074       1.1    ichiro 	splx(s);
   1075       1.1    ichiro 
   1076       1.1    ichiro  done:
   1077       1.1    ichiro 	/* Setup new transfer */
   1078       1.1    ichiro 	usbd_setup_xfer(xfer, sc->sc_pipe_rx, c, c->url_buf, URL_BUFSZ,
   1079       1.1    ichiro 			USBD_SHORT_XFER_OK | USBD_NO_COPY,
   1080       1.1    ichiro 			USBD_NO_TIMEOUT, url_rxeof);
   1081       1.1    ichiro 	sc->sc_refcnt++;
   1082       1.1    ichiro 	usbd_transfer(xfer);
   1083       1.1    ichiro 	if (--sc->sc_refcnt < 0)
   1084  1.36.2.2  uebayasi 		usb_detach_wakeup(sc->sc_dev);
   1085       1.1    ichiro 
   1086  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: start rx\n", device_xname(sc->sc_dev), __func__));
   1087       1.1    ichiro }
   1088       1.1    ichiro 
   1089       1.1    ichiro #if 0
   1090      1.33    cegger Static void url_intr(void)
   1091       1.1    ichiro {
   1092       1.1    ichiro }
   1093       1.1    ichiro #endif
   1094       1.1    ichiro 
   1095       1.1    ichiro Static int
   1096      1.25  christos url_ioctl(struct ifnet *ifp, u_long cmd, void *data)
   1097       1.1    ichiro {
   1098       1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1099       1.1    ichiro 	int s, error = 0;
   1100       1.1    ichiro 
   1101  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1102       1.1    ichiro 
   1103       1.1    ichiro 	if (sc->sc_dying)
   1104       1.1    ichiro 		return (EIO);
   1105       1.1    ichiro 
   1106       1.1    ichiro 	s = splnet();
   1107       1.1    ichiro 
   1108      1.30    dyoung 	error = ether_ioctl(ifp, cmd, data);
   1109      1.30    dyoung 	if (error == ENETRESET) {
   1110      1.30    dyoung 		if (ifp->if_flags & IFF_RUNNING)
   1111      1.30    dyoung 			url_setmulti(sc);
   1112      1.30    dyoung 		error = 0;
   1113       1.1    ichiro 	}
   1114       1.1    ichiro 
   1115       1.1    ichiro 	splx(s);
   1116       1.1    ichiro 
   1117       1.1    ichiro 	return (error);
   1118       1.1    ichiro }
   1119       1.1    ichiro 
   1120       1.1    ichiro Static void
   1121       1.1    ichiro url_watchdog(struct ifnet *ifp)
   1122       1.1    ichiro {
   1123       1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1124       1.1    ichiro 	struct url_chain *c;
   1125       1.1    ichiro 	usbd_status stat;
   1126       1.1    ichiro 	int s;
   1127       1.5  augustss 
   1128  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1129       1.1    ichiro 
   1130       1.1    ichiro 	ifp->if_oerrors++;
   1131  1.36.2.2  uebayasi 	printf("%s: watchdog timeout\n", device_xname(sc->sc_dev));
   1132       1.1    ichiro 
   1133       1.1    ichiro 	s = splusb();
   1134       1.1    ichiro 	c = &sc->sc_cdata.url_tx_chain[0];
   1135       1.1    ichiro 	usbd_get_xfer_status(c->url_xfer, NULL, NULL, NULL, &stat);
   1136       1.1    ichiro 	url_txeof(c->url_xfer, c, stat);
   1137       1.1    ichiro 
   1138       1.1    ichiro 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1139       1.1    ichiro 		url_start(ifp);
   1140       1.1    ichiro 	splx(s);
   1141       1.1    ichiro }
   1142       1.1    ichiro 
   1143       1.1    ichiro Static void
   1144       1.1    ichiro url_stop_task(struct url_softc *sc)
   1145       1.1    ichiro {
   1146       1.1    ichiro 	url_stop(GET_IFP(sc), 1);
   1147       1.1    ichiro }
   1148       1.1    ichiro 
   1149       1.1    ichiro /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */
   1150       1.1    ichiro Static void
   1151      1.23  christos url_stop(struct ifnet *ifp, int disable)
   1152       1.1    ichiro {
   1153       1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1154       1.1    ichiro 	usbd_status err;
   1155       1.1    ichiro 	int i;
   1156       1.5  augustss 
   1157  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1158       1.1    ichiro 
   1159       1.1    ichiro 	ifp->if_timer = 0;
   1160       1.1    ichiro 
   1161       1.1    ichiro 	url_reset(sc);
   1162       1.1    ichiro 
   1163  1.36.2.2  uebayasi 	callout_stop(&sc->sc_stat_ch);
   1164       1.1    ichiro 
   1165       1.1    ichiro 	/* Stop transfers */
   1166       1.1    ichiro 	/* RX endpoint */
   1167       1.1    ichiro 	if (sc->sc_pipe_rx != NULL) {
   1168       1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_rx);
   1169       1.1    ichiro 		if (err)
   1170       1.1    ichiro 			printf("%s: abort rx pipe failed: %s\n",
   1171  1.36.2.2  uebayasi 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1172       1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_rx);
   1173       1.1    ichiro 		if (err)
   1174       1.1    ichiro 			printf("%s: close rx pipe failed: %s\n",
   1175  1.36.2.2  uebayasi 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1176       1.1    ichiro 		sc->sc_pipe_rx = NULL;
   1177       1.1    ichiro 	}
   1178       1.1    ichiro 
   1179       1.1    ichiro 	/* TX endpoint */
   1180       1.1    ichiro 	if (sc->sc_pipe_tx != NULL) {
   1181       1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_tx);
   1182       1.1    ichiro 		if (err)
   1183       1.1    ichiro 			printf("%s: abort tx pipe failed: %s\n",
   1184  1.36.2.2  uebayasi 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1185       1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_tx);
   1186       1.1    ichiro 		if (err)
   1187       1.1    ichiro 			printf("%s: close tx pipe failed: %s\n",
   1188  1.36.2.2  uebayasi 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1189       1.1    ichiro 		sc->sc_pipe_tx = NULL;
   1190       1.1    ichiro 	}
   1191       1.1    ichiro 
   1192       1.1    ichiro #if 0
   1193       1.1    ichiro 	/* XXX: Interrupt endpoint is not yet supported!! */
   1194       1.1    ichiro 	/* Interrupt endpoint */
   1195       1.1    ichiro 	if (sc->sc_pipe_intr != NULL) {
   1196       1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_intr);
   1197       1.1    ichiro 		if (err)
   1198       1.1    ichiro 			printf("%s: abort intr pipe failed: %s\n",
   1199  1.36.2.2  uebayasi 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1200       1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_intr);
   1201       1.1    ichiro 		if (err)
   1202       1.1    ichiro 			printf("%s: close intr pipe failed: %s\n",
   1203  1.36.2.2  uebayasi 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1204       1.1    ichiro 		sc->sc_pipe_intr = NULL;
   1205       1.1    ichiro 	}
   1206       1.1    ichiro #endif
   1207       1.1    ichiro 
   1208       1.1    ichiro 	/* Free RX resources. */
   1209       1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
   1210       1.1    ichiro 		if (sc->sc_cdata.url_rx_chain[i].url_mbuf != NULL) {
   1211       1.1    ichiro 			m_freem(sc->sc_cdata.url_rx_chain[i].url_mbuf);
   1212       1.1    ichiro 			sc->sc_cdata.url_rx_chain[i].url_mbuf = NULL;
   1213       1.1    ichiro 		}
   1214       1.1    ichiro 		if (sc->sc_cdata.url_rx_chain[i].url_xfer != NULL) {
   1215       1.1    ichiro 			usbd_free_xfer(sc->sc_cdata.url_rx_chain[i].url_xfer);
   1216       1.1    ichiro 			sc->sc_cdata.url_rx_chain[i].url_xfer = NULL;
   1217       1.1    ichiro 		}
   1218       1.1    ichiro 	}
   1219       1.1    ichiro 
   1220       1.1    ichiro 	/* Free TX resources. */
   1221       1.1    ichiro 	for (i = 0; i < URL_TX_LIST_CNT; i++) {
   1222       1.1    ichiro 		if (sc->sc_cdata.url_tx_chain[i].url_mbuf != NULL) {
   1223       1.1    ichiro 			m_freem(sc->sc_cdata.url_tx_chain[i].url_mbuf);
   1224       1.1    ichiro 			sc->sc_cdata.url_tx_chain[i].url_mbuf = NULL;
   1225       1.1    ichiro 		}
   1226       1.1    ichiro 		if (sc->sc_cdata.url_tx_chain[i].url_xfer != NULL) {
   1227       1.1    ichiro 			usbd_free_xfer(sc->sc_cdata.url_tx_chain[i].url_xfer);
   1228       1.1    ichiro 			sc->sc_cdata.url_tx_chain[i].url_xfer = NULL;
   1229       1.1    ichiro 		}
   1230       1.1    ichiro 	}
   1231       1.1    ichiro 
   1232       1.1    ichiro 	sc->sc_link = 0;
   1233       1.1    ichiro 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1234       1.1    ichiro }
   1235       1.1    ichiro 
   1236       1.1    ichiro /* Set media options */
   1237       1.1    ichiro Static int
   1238       1.1    ichiro url_ifmedia_change(struct ifnet *ifp)
   1239       1.1    ichiro {
   1240       1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1241       1.1    ichiro 	struct mii_data *mii = GET_MII(sc);
   1242      1.30    dyoung 	int rc;
   1243       1.1    ichiro 
   1244  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1245       1.1    ichiro 
   1246       1.1    ichiro 	if (sc->sc_dying)
   1247       1.1    ichiro 		return (0);
   1248       1.1    ichiro 
   1249       1.1    ichiro 	sc->sc_link = 0;
   1250      1.30    dyoung 	if ((rc = mii_mediachg(mii)) == ENXIO)
   1251      1.30    dyoung 		return 0;
   1252      1.30    dyoung 	return rc;
   1253       1.1    ichiro }
   1254       1.1    ichiro 
   1255       1.1    ichiro /* Report current media status. */
   1256       1.1    ichiro Static void
   1257       1.1    ichiro url_ifmedia_status(struct ifnet *ifp, struct ifmediareq *ifmr)
   1258       1.1    ichiro {
   1259       1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1260       1.1    ichiro 
   1261  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1262       1.1    ichiro 
   1263       1.1    ichiro 	if (sc->sc_dying)
   1264       1.1    ichiro 		return;
   1265       1.1    ichiro 
   1266      1.30    dyoung 	ether_mediastatus(ifp, ifmr);
   1267       1.1    ichiro }
   1268       1.1    ichiro 
   1269       1.1    ichiro Static void
   1270       1.1    ichiro url_tick(void *xsc)
   1271       1.1    ichiro {
   1272       1.1    ichiro 	struct url_softc *sc = xsc;
   1273       1.1    ichiro 
   1274       1.1    ichiro 	if (sc == NULL)
   1275       1.1    ichiro 		return;
   1276       1.1    ichiro 
   1277  1.36.2.2  uebayasi 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1278       1.4  augustss 			__func__));
   1279       1.1    ichiro 
   1280       1.1    ichiro 	if (sc->sc_dying)
   1281       1.1    ichiro 		return;
   1282       1.1    ichiro 
   1283       1.1    ichiro 	/* Perform periodic stuff in process context */
   1284      1.22     joerg 	usb_add_task(sc->sc_udev, &sc->sc_tick_task, USB_TASKQ_DRIVER);
   1285       1.1    ichiro }
   1286       1.1    ichiro 
   1287       1.1    ichiro Static void
   1288       1.1    ichiro url_tick_task(void *xsc)
   1289       1.1    ichiro {
   1290       1.1    ichiro 	struct url_softc *sc = xsc;
   1291       1.1    ichiro 	struct ifnet *ifp;
   1292       1.1    ichiro 	struct mii_data *mii;
   1293       1.1    ichiro 	int s;
   1294       1.1    ichiro 
   1295       1.1    ichiro 	if (sc == NULL)
   1296       1.1    ichiro 		return;
   1297       1.1    ichiro 
   1298  1.36.2.2  uebayasi 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1299       1.4  augustss 			__func__));
   1300       1.1    ichiro 
   1301       1.1    ichiro 	if (sc->sc_dying)
   1302       1.1    ichiro 		return;
   1303       1.1    ichiro 
   1304       1.1    ichiro 	ifp = GET_IFP(sc);
   1305       1.1    ichiro 	mii = GET_MII(sc);
   1306       1.1    ichiro 
   1307       1.1    ichiro 	if (mii == NULL)
   1308       1.1    ichiro 		return;
   1309       1.1    ichiro 
   1310       1.1    ichiro 	s = splnet();
   1311       1.1    ichiro 
   1312       1.1    ichiro 	mii_tick(mii);
   1313       1.1    ichiro 	if (!sc->sc_link) {
   1314       1.1    ichiro 		mii_pollstat(mii);
   1315       1.1    ichiro 		if (mii->mii_media_status & IFM_ACTIVE &&
   1316       1.1    ichiro 		    IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
   1317       1.1    ichiro 			DPRINTF(("%s: %s: got link\n",
   1318  1.36.2.2  uebayasi 				 device_xname(sc->sc_dev), __func__));
   1319       1.1    ichiro 			sc->sc_link++;
   1320       1.1    ichiro 			if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1321       1.1    ichiro 				   url_start(ifp);
   1322       1.1    ichiro 		}
   1323       1.1    ichiro 	}
   1324       1.1    ichiro 
   1325  1.36.2.2  uebayasi 	callout_reset(&sc->sc_stat_ch, hz, url_tick, sc);
   1326       1.1    ichiro 
   1327       1.1    ichiro 	splx(s);
   1328       1.1    ichiro }
   1329       1.1    ichiro 
   1330       1.1    ichiro /* Get exclusive access to the MII registers */
   1331       1.1    ichiro Static void
   1332       1.1    ichiro url_lock_mii(struct url_softc *sc)
   1333       1.1    ichiro {
   1334  1.36.2.2  uebayasi 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1335       1.4  augustss 			__func__));
   1336       1.1    ichiro 
   1337       1.1    ichiro 	sc->sc_refcnt++;
   1338      1.27   xtraeme 	rw_enter(&sc->sc_mii_rwlock, RW_WRITER);
   1339       1.1    ichiro }
   1340       1.1    ichiro 
   1341       1.1    ichiro Static void
   1342       1.1    ichiro url_unlock_mii(struct url_softc *sc)
   1343       1.1    ichiro {
   1344  1.36.2.2  uebayasi 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1345       1.4  augustss 		       __func__));
   1346       1.1    ichiro 
   1347      1.27   xtraeme 	rw_exit(&sc->sc_mii_rwlock);
   1348       1.1    ichiro 	if (--sc->sc_refcnt < 0)
   1349  1.36.2.2  uebayasi 		usb_detach_wakeup(sc->sc_dev);
   1350       1.1    ichiro }
   1351       1.1    ichiro 
   1352       1.1    ichiro Static int
   1353  1.36.2.2  uebayasi url_int_miibus_readreg(device_t dev, int phy, int reg)
   1354       1.1    ichiro {
   1355       1.1    ichiro 	struct url_softc *sc;
   1356       1.1    ichiro 	u_int16_t val;
   1357       1.1    ichiro 
   1358       1.1    ichiro 	if (dev == NULL)
   1359       1.1    ichiro 		return (0);
   1360       1.1    ichiro 
   1361  1.36.2.2  uebayasi 	sc = device_private(dev);
   1362       1.1    ichiro 
   1363       1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n",
   1364  1.36.2.2  uebayasi 		 device_xname(sc->sc_dev), __func__, phy, reg));
   1365       1.1    ichiro 
   1366       1.1    ichiro 	if (sc->sc_dying) {
   1367       1.1    ichiro #ifdef DIAGNOSTIC
   1368  1.36.2.2  uebayasi 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1369       1.4  augustss 		       __func__);
   1370       1.1    ichiro #endif
   1371       1.1    ichiro 		return (0);
   1372       1.1    ichiro 	}
   1373       1.1    ichiro 
   1374       1.1    ichiro 	/* XXX: one PHY only for the RTL8150 internal PHY */
   1375       1.1    ichiro 	if (phy != 0) {
   1376       1.1    ichiro 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
   1377  1.36.2.2  uebayasi 			 device_xname(sc->sc_dev), __func__, phy));
   1378       1.1    ichiro 		return (0);
   1379       1.1    ichiro 	}
   1380       1.1    ichiro 
   1381       1.1    ichiro 	url_lock_mii(sc);
   1382       1.1    ichiro 
   1383       1.1    ichiro 	switch (reg) {
   1384       1.1    ichiro 	case MII_BMCR:		/* Control Register */
   1385       1.1    ichiro 		reg = URL_BMCR;
   1386       1.1    ichiro 		break;
   1387       1.1    ichiro 	case MII_BMSR:		/* Status Register */
   1388       1.1    ichiro 		reg = URL_BMSR;
   1389       1.1    ichiro 		break;
   1390       1.1    ichiro 	case MII_PHYIDR1:
   1391       1.1    ichiro 	case MII_PHYIDR2:
   1392       1.1    ichiro 		val = 0;
   1393       1.1    ichiro 		goto R_DONE;
   1394       1.1    ichiro 		break;
   1395       1.1    ichiro 	case MII_ANAR:		/* Autonegotiation advertisement */
   1396       1.1    ichiro 		reg = URL_ANAR;
   1397       1.1    ichiro 		break;
   1398       1.1    ichiro 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
   1399       1.1    ichiro 		reg = URL_ANLP;
   1400       1.1    ichiro 		break;
   1401       1.1    ichiro 	case URLPHY_MSR:	/* Media Status Register */
   1402       1.1    ichiro 		reg = URL_MSR;
   1403       1.1    ichiro 		break;
   1404       1.1    ichiro 	default:
   1405       1.1    ichiro 		printf("%s: %s: bad register %04x\n",
   1406  1.36.2.2  uebayasi 		       device_xname(sc->sc_dev), __func__, reg);
   1407       1.1    ichiro 		val = 0;
   1408       1.1    ichiro 		goto R_DONE;
   1409       1.1    ichiro 		break;
   1410       1.1    ichiro 	}
   1411       1.1    ichiro 
   1412       1.1    ichiro 	if (reg == URL_MSR)
   1413       1.1    ichiro 		val = url_csr_read_1(sc, reg);
   1414       1.1    ichiro 	else
   1415       1.1    ichiro 		val = url_csr_read_2(sc, reg);
   1416       1.1    ichiro 
   1417       1.1    ichiro  R_DONE:
   1418       1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
   1419  1.36.2.2  uebayasi 		 device_xname(sc->sc_dev), __func__, phy, reg, val));
   1420       1.1    ichiro 
   1421       1.1    ichiro 	url_unlock_mii(sc);
   1422       1.1    ichiro 	return (val);
   1423       1.1    ichiro }
   1424       1.1    ichiro 
   1425       1.1    ichiro Static void
   1426  1.36.2.2  uebayasi url_int_miibus_writereg(device_t dev, int phy, int reg, int data)
   1427       1.1    ichiro {
   1428       1.1    ichiro 	struct url_softc *sc;
   1429       1.1    ichiro 
   1430       1.1    ichiro 	if (dev == NULL)
   1431       1.1    ichiro 		return;
   1432       1.1    ichiro 
   1433  1.36.2.2  uebayasi 	sc = device_private(dev);
   1434       1.1    ichiro 
   1435       1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
   1436  1.36.2.2  uebayasi 		 device_xname(sc->sc_dev), __func__, phy, reg, data));
   1437       1.1    ichiro 
   1438       1.1    ichiro 	if (sc->sc_dying) {
   1439       1.1    ichiro #ifdef DIAGNOSTIC
   1440  1.36.2.2  uebayasi 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1441       1.4  augustss 		       __func__);
   1442       1.1    ichiro #endif
   1443       1.1    ichiro 		return;
   1444       1.1    ichiro 	}
   1445       1.1    ichiro 
   1446       1.1    ichiro 	/* XXX: one PHY only for the RTL8150 internal PHY */
   1447       1.1    ichiro 	if (phy != 0) {
   1448       1.1    ichiro 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
   1449  1.36.2.2  uebayasi 			 device_xname(sc->sc_dev), __func__, phy));
   1450       1.1    ichiro 		return;
   1451       1.1    ichiro 	}
   1452       1.1    ichiro 
   1453       1.1    ichiro 	url_lock_mii(sc);
   1454       1.1    ichiro 
   1455       1.1    ichiro 	switch (reg) {
   1456       1.1    ichiro 	case MII_BMCR:		/* Control Register */
   1457       1.1    ichiro 		reg = URL_BMCR;
   1458       1.1    ichiro 		break;
   1459       1.1    ichiro 	case MII_BMSR:		/* Status Register */
   1460       1.1    ichiro 		reg = URL_BMSR;
   1461       1.1    ichiro 		break;
   1462       1.1    ichiro 	case MII_PHYIDR1:
   1463       1.1    ichiro 	case MII_PHYIDR2:
   1464       1.1    ichiro 		goto W_DONE;
   1465       1.1    ichiro 		break;
   1466       1.1    ichiro 	case MII_ANAR:		/* Autonegotiation advertisement */
   1467       1.1    ichiro 		reg = URL_ANAR;
   1468       1.1    ichiro 		break;
   1469       1.1    ichiro 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
   1470       1.1    ichiro 		reg = URL_ANLP;
   1471       1.1    ichiro 		break;
   1472       1.1    ichiro 	case URLPHY_MSR:	/* Media Status Register */
   1473       1.1    ichiro 		reg = URL_MSR;
   1474       1.1    ichiro 		break;
   1475       1.1    ichiro 	default:
   1476       1.1    ichiro 		printf("%s: %s: bad register %04x\n",
   1477  1.36.2.2  uebayasi 		       device_xname(sc->sc_dev), __func__, reg);
   1478       1.1    ichiro 		goto W_DONE;
   1479       1.1    ichiro 		break;
   1480       1.1    ichiro 	}
   1481       1.1    ichiro 
   1482       1.1    ichiro 	if (reg == URL_MSR)
   1483       1.1    ichiro 		url_csr_write_1(sc, reg, data);
   1484       1.1    ichiro 	else
   1485       1.1    ichiro 		url_csr_write_2(sc, reg, data);
   1486       1.1    ichiro  W_DONE:
   1487       1.1    ichiro 
   1488       1.1    ichiro 	url_unlock_mii(sc);
   1489       1.1    ichiro 	return;
   1490       1.1    ichiro }
   1491       1.1    ichiro 
   1492       1.1    ichiro Static void
   1493  1.36.2.2  uebayasi url_miibus_statchg(device_t dev)
   1494       1.1    ichiro {
   1495       1.1    ichiro #ifdef URL_DEBUG
   1496       1.1    ichiro 	struct url_softc *sc;
   1497       1.1    ichiro 
   1498       1.1    ichiro 	if (dev == NULL)
   1499       1.1    ichiro 		return;
   1500       1.1    ichiro 
   1501  1.36.2.2  uebayasi 	sc = device_private(dev);
   1502  1.36.2.2  uebayasi 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1503       1.1    ichiro #endif
   1504       1.1    ichiro 	/* Nothing to do */
   1505       1.1    ichiro }
   1506       1.1    ichiro 
   1507       1.1    ichiro #if 0
   1508       1.1    ichiro /*
   1509       1.1    ichiro  * external PHYs support, but not test.
   1510       1.1    ichiro  */
   1511       1.1    ichiro Static int
   1512  1.36.2.2  uebayasi url_ext_miibus_redreg(device_t dev, int phy, int reg)
   1513       1.1    ichiro {
   1514  1.36.2.2  uebayasi 	struct url_softc *sc = device_private(dev);
   1515       1.1    ichiro 	u_int16_t val;
   1516       1.1    ichiro 
   1517       1.1    ichiro 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n",
   1518  1.36.2.2  uebayasi 		 device_xname(sc->sc_dev), __func__, phy, reg));
   1519       1.1    ichiro 
   1520       1.1    ichiro 	if (sc->sc_dying) {
   1521       1.1    ichiro #ifdef DIAGNOSTIC
   1522  1.36.2.2  uebayasi 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1523       1.4  augustss 		       __func__);
   1524       1.1    ichiro #endif
   1525       1.1    ichiro 		return (0);
   1526       1.1    ichiro 	}
   1527       1.1    ichiro 
   1528       1.1    ichiro 	url_lock_mii(sc);
   1529       1.1    ichiro 
   1530       1.1    ichiro 	url_csr_write_1(sc, URL_PHYADD, phy & URL_PHYADD_MASK);
   1531       1.1    ichiro 	/*
   1532       1.1    ichiro 	 * RTL8150L will initiate a MII management data transaction
   1533       1.1    ichiro 	 * if PHYCNT_OWN bit is set 1 by software. After transaction,
   1534       1.1    ichiro 	 * this bit is auto cleared by TRL8150L.
   1535       1.1    ichiro 	 */
   1536       1.1    ichiro 	url_csr_write_1(sc, URL_PHYCNT,
   1537       1.1    ichiro 			(reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR);
   1538       1.1    ichiro 	for (i = 0; i < URL_TIMEOUT; i++) {
   1539       1.1    ichiro 		if ((url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0)
   1540       1.1    ichiro 			break;
   1541       1.1    ichiro 	}
   1542       1.1    ichiro 	if (i == URL_TIMEOUT) {
   1543  1.36.2.2  uebayasi 		printf("%s: MII read timed out\n", device_xname(sc->sc_dev));
   1544       1.1    ichiro 	}
   1545       1.5  augustss 
   1546       1.1    ichiro 	val = url_csr_read_2(sc, URL_PHYDAT);
   1547       1.1    ichiro 
   1548       1.1    ichiro 	DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
   1549  1.36.2.2  uebayasi 		 device_xname(sc->sc_dev), __func__, phy, reg, val));
   1550       1.1    ichiro 
   1551       1.1    ichiro 	url_unlock_mii(sc);
   1552       1.1    ichiro 	return (val);
   1553       1.1    ichiro }
   1554       1.1    ichiro 
   1555       1.1    ichiro Static void
   1556  1.36.2.2  uebayasi url_ext_miibus_writereg(device_t dev, int phy, int reg, int data)
   1557       1.1    ichiro {
   1558  1.36.2.2  uebayasi 	struct url_softc *sc = device_private(dev);
   1559       1.1    ichiro 
   1560       1.1    ichiro 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
   1561  1.36.2.2  uebayasi 		 device_xname(sc->sc_dev), __func__, phy, reg, data));
   1562       1.1    ichiro 
   1563       1.1    ichiro 	if (sc->sc_dying) {
   1564       1.1    ichiro #ifdef DIAGNOSTIC
   1565  1.36.2.2  uebayasi 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1566       1.4  augustss 		       __func__);
   1567       1.1    ichiro #endif
   1568       1.1    ichiro 		return;
   1569       1.1    ichiro 	}
   1570       1.1    ichiro 
   1571       1.1    ichiro 	url_lock_mii(sc);
   1572       1.1    ichiro 
   1573       1.1    ichiro 	url_csr_write_2(sc, URL_PHYDAT, data);
   1574       1.1    ichiro 	url_csr_write_1(sc, URL_PHYADD, phy);
   1575       1.1    ichiro 	url_csr_write_1(sc, URL_PHYCNT, reg | URL_PHYCNT_RWCR);	/* Write */
   1576       1.1    ichiro 
   1577       1.1    ichiro 	for (i=0; i < URL_TIMEOUT; i++) {
   1578       1.1    ichiro 		if (url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN)
   1579       1.1    ichiro 			break;
   1580       1.1    ichiro 	}
   1581       1.1    ichiro 
   1582       1.1    ichiro 	if (i == URL_TIMEOUT) {
   1583       1.1    ichiro 		printf("%s: MII write timed out\n",
   1584  1.36.2.2  uebayasi 		       device_xname(sc->sc_dev));
   1585       1.1    ichiro 	}
   1586       1.1    ichiro 
   1587       1.1    ichiro 	url_unlock_mii(sc);
   1588       1.1    ichiro 	return;
   1589       1.1    ichiro }
   1590       1.1    ichiro #endif
   1591       1.1    ichiro 
   1592