Home | History | Annotate | Line # | Download | only in usb
if_url.c revision 1.42
      1  1.42       mrg /*	$NetBSD: if_url.c,v 1.42 2012/03/06 03:35:29 mrg Exp $	*/
      2   1.1    ichiro /*
      3   1.1    ichiro  * Copyright (c) 2001, 2002
      4   1.1    ichiro  *     Shingo WATANABE <nabe (at) nabechan.org>.  All rights reserved.
      5   1.1    ichiro  *
      6   1.1    ichiro  * Redistribution and use in source and binary forms, with or without
      7   1.1    ichiro  * modification, are permitted provided that the following conditions
      8   1.1    ichiro  * are met:
      9   1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     10   1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     11   1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     12   1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     13   1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     14   1.8   tsutsui  * 3. Neither the name of the author nor the names of any co-contributors
     15   1.1    ichiro  *    may be used to endorse or promote products derived from this software
     16   1.1    ichiro  *    without specific prior written permission.
     17   1.1    ichiro  *
     18   1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     19   1.1    ichiro  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     20   1.1    ichiro  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     21   1.1    ichiro  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     22   1.1    ichiro  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     23   1.1    ichiro  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     24   1.1    ichiro  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     25   1.1    ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     26   1.1    ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     27   1.1    ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     28   1.1    ichiro  * SUCH DAMAGE.
     29   1.1    ichiro  *
     30   1.1    ichiro  */
     31   1.1    ichiro 
     32   1.1    ichiro /*
     33   1.1    ichiro  * The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at
     34   1.1    ichiro  *   ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf
     35   1.1    ichiro  *   ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf
     36   1.1    ichiro  */
     37   1.1    ichiro 
     38   1.1    ichiro /*
     39   1.1    ichiro  * TODO:
     40   1.1    ichiro  *	Interrupt Endpoint support
     41   1.1    ichiro  *	External PHYs
     42   1.1    ichiro  *	powerhook() support?
     43   1.1    ichiro  */
     44   1.1    ichiro 
     45   1.1    ichiro #include <sys/cdefs.h>
     46  1.42       mrg __KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.42 2012/03/06 03:35:29 mrg Exp $");
     47   1.1    ichiro 
     48   1.1    ichiro #include "opt_inet.h"
     49   1.1    ichiro 
     50   1.1    ichiro #include <sys/param.h>
     51   1.1    ichiro #include <sys/systm.h>
     52  1.27   xtraeme #include <sys/rwlock.h>
     53   1.1    ichiro #include <sys/mbuf.h>
     54   1.1    ichiro #include <sys/kernel.h>
     55   1.1    ichiro #include <sys/socket.h>
     56   1.1    ichiro 
     57   1.1    ichiro #include <sys/device.h>
     58   1.1    ichiro #include <sys/rnd.h>
     59   1.1    ichiro 
     60   1.1    ichiro #include <net/if.h>
     61   1.1    ichiro #include <net/if_arp.h>
     62   1.1    ichiro #include <net/if_dl.h>
     63   1.1    ichiro #include <net/if_media.h>
     64   1.1    ichiro 
     65   1.1    ichiro #include <net/bpf.h>
     66   1.1    ichiro 
     67   1.1    ichiro #include <net/if_ether.h>
     68   1.1    ichiro #ifdef INET
     69   1.1    ichiro #include <netinet/in.h>
     70   1.1    ichiro #include <netinet/if_inarp.h>
     71   1.1    ichiro #endif
     72   1.1    ichiro 
     73   1.1    ichiro #include <dev/mii/mii.h>
     74   1.1    ichiro #include <dev/mii/miivar.h>
     75   1.1    ichiro #include <dev/mii/urlphyreg.h>
     76   1.1    ichiro 
     77   1.1    ichiro #include <dev/usb/usb.h>
     78   1.1    ichiro #include <dev/usb/usbdi.h>
     79   1.1    ichiro #include <dev/usb/usbdi_util.h>
     80   1.1    ichiro #include <dev/usb/usbdevs.h>
     81   1.1    ichiro 
     82   1.1    ichiro #include <dev/usb/if_urlreg.h>
     83   1.1    ichiro 
     84   1.1    ichiro 
     85   1.1    ichiro /* Function declarations */
     86  1.38    dyoung int             url_match(device_t, cfdata_t, void *);
     87  1.38    dyoung void            url_attach(device_t, device_t, void *);
     88  1.38    dyoung int             url_detach(device_t, int);
     89  1.38    dyoung int             url_activate(device_t, enum devact);
     90  1.38    dyoung extern struct cfdriver url_cd;
     91  1.38    dyoung CFATTACH_DECL_NEW(url, sizeof(struct url_softc), url_match, url_attach, url_detach, url_activate);
     92   1.1    ichiro 
     93   1.1    ichiro Static int url_openpipes(struct url_softc *);
     94   1.1    ichiro Static int url_rx_list_init(struct url_softc *);
     95   1.1    ichiro Static int url_tx_list_init(struct url_softc *);
     96   1.1    ichiro Static int url_newbuf(struct url_softc *, struct url_chain *, struct mbuf *);
     97   1.1    ichiro Static void url_start(struct ifnet *);
     98   1.1    ichiro Static int url_send(struct url_softc *, struct mbuf *, int);
     99   1.1    ichiro Static void url_txeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
    100   1.1    ichiro Static void url_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
    101   1.1    ichiro Static void url_tick(void *);
    102   1.1    ichiro Static void url_tick_task(void *);
    103  1.25  christos Static int url_ioctl(struct ifnet *, u_long, void *);
    104   1.1    ichiro Static void url_stop_task(struct url_softc *);
    105   1.1    ichiro Static void url_stop(struct ifnet *, int);
    106   1.1    ichiro Static void url_watchdog(struct ifnet *);
    107   1.1    ichiro Static int url_ifmedia_change(struct ifnet *);
    108   1.1    ichiro Static void url_ifmedia_status(struct ifnet *, struct ifmediareq *);
    109   1.1    ichiro Static void url_lock_mii(struct url_softc *);
    110   1.1    ichiro Static void url_unlock_mii(struct url_softc *);
    111  1.38    dyoung Static int url_int_miibus_readreg(device_t, int, int);
    112  1.38    dyoung Static void url_int_miibus_writereg(device_t, int, int, int);
    113  1.38    dyoung Static void url_miibus_statchg(device_t);
    114   1.1    ichiro Static int url_init(struct ifnet *);
    115   1.1    ichiro Static void url_setmulti(struct url_softc *);
    116   1.1    ichiro Static void url_reset(struct url_softc *);
    117   1.1    ichiro 
    118   1.1    ichiro Static int url_csr_read_1(struct url_softc *, int);
    119   1.1    ichiro Static int url_csr_read_2(struct url_softc *, int);
    120   1.1    ichiro Static int url_csr_write_1(struct url_softc *, int, int);
    121   1.1    ichiro Static int url_csr_write_2(struct url_softc *, int, int);
    122   1.1    ichiro Static int url_csr_write_4(struct url_softc *, int, int);
    123   1.1    ichiro Static int url_mem(struct url_softc *, int, int, void *, int);
    124   1.1    ichiro 
    125   1.1    ichiro /* Macros */
    126   1.1    ichiro #ifdef URL_DEBUG
    127  1.38    dyoung #define DPRINTF(x)	if (urldebug) printf x
    128  1.38    dyoung #define DPRINTFN(n,x)	if (urldebug >= (n)) printf x
    129   1.2    ichiro int urldebug = 0;
    130   1.1    ichiro #else
    131   1.1    ichiro #define DPRINTF(x)
    132   1.1    ichiro #define DPRINTFN(n,x)
    133   1.1    ichiro #endif
    134   1.1    ichiro 
    135   1.1    ichiro #define	URL_SETBIT(sc, reg, x)	\
    136   1.1    ichiro 	url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) | (x))
    137   1.1    ichiro 
    138   1.1    ichiro #define	URL_SETBIT2(sc, reg, x)	\
    139   1.1    ichiro 	url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) | (x))
    140   1.1    ichiro 
    141   1.1    ichiro #define	URL_CLRBIT(sc, reg, x)	\
    142   1.1    ichiro 	url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) & ~(x))
    143   1.1    ichiro 
    144   1.1    ichiro #define	URL_CLRBIT2(sc, reg, x)	\
    145   1.1    ichiro 	url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) & ~(x))
    146   1.1    ichiro 
    147   1.1    ichiro static const struct url_type {
    148   1.1    ichiro 	struct usb_devno url_dev;
    149   1.1    ichiro 	u_int16_t url_flags;
    150   1.1    ichiro #define URL_EXT_PHY	0x0001
    151   1.1    ichiro } url_devs [] = {
    152   1.1    ichiro 	/* MELCO LUA-KTX */
    153   1.1    ichiro 	{{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0},
    154  1.10   mycroft 	/* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */
    155  1.11  augustss 	{{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0},
    156  1.11  augustss 	/* Longshine LCS-8138TX */
    157  1.11  augustss 	{{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0},
    158  1.11  augustss 	/* Micronet SP128AR */
    159  1.11  augustss 	{{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0},
    160  1.13    itojun 	/* OQO model 01 */
    161  1.13    itojun 	{{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0},
    162   1.1    ichiro };
    163  1.17  christos #define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p))
    164   1.1    ichiro 
    165   1.1    ichiro 
    166   1.1    ichiro /* Probe */
    167  1.40  jakllsch int
    168  1.38    dyoung url_match(device_t parent, cfdata_t match, void *aux)
    169   1.1    ichiro {
    170  1.38    dyoung 	struct usb_attach_arg *uaa = aux;
    171   1.1    ichiro 
    172   1.1    ichiro 	return (url_lookup(uaa->vendor, uaa->product) != NULL ?
    173   1.1    ichiro 		UMATCH_VENDOR_PRODUCT : UMATCH_NONE);
    174   1.1    ichiro }
    175   1.1    ichiro /* Attach */
    176  1.40  jakllsch void
    177  1.38    dyoung url_attach(device_t parent, device_t self, void *aux)
    178   1.1    ichiro {
    179  1.38    dyoung 	struct url_softc *sc = device_private(self);
    180  1.38    dyoung 	struct usb_attach_arg *uaa = aux;
    181   1.1    ichiro 	usbd_device_handle dev = uaa->device;
    182   1.1    ichiro 	usbd_interface_handle iface;
    183   1.1    ichiro 	usbd_status err;
    184   1.1    ichiro 	usb_interface_descriptor_t *id;
    185   1.1    ichiro 	usb_endpoint_descriptor_t *ed;
    186  1.16  augustss 	char *devinfop;
    187   1.1    ichiro 	struct ifnet *ifp;
    188   1.1    ichiro 	struct mii_data *mii;
    189   1.1    ichiro 	u_char eaddr[ETHER_ADDR_LEN];
    190   1.1    ichiro 	int i, s;
    191   1.1    ichiro 
    192  1.32      cube 	sc->sc_dev = self;
    193  1.32      cube 
    194  1.34    plunky 	aprint_naive("\n");
    195  1.34    plunky 	aprint_normal("\n");
    196  1.34    plunky 
    197  1.16  augustss 	devinfop = usbd_devinfo_alloc(dev, 0);
    198  1.32      cube 	aprint_normal_dev(self, "%s\n", devinfop);
    199  1.16  augustss 	usbd_devinfo_free(devinfop);
    200   1.1    ichiro 
    201   1.1    ichiro 	/* Move the device into the configured state. */
    202   1.1    ichiro 	err = usbd_set_config_no(dev, URL_CONFIG_NO, 1);
    203   1.1    ichiro 	if (err) {
    204  1.32      cube 		aprint_error_dev(self, "setting config no failed\n");
    205   1.1    ichiro 		goto bad;
    206   1.1    ichiro 	}
    207   1.1    ichiro 
    208   1.1    ichiro 	usb_init_task(&sc->sc_tick_task, url_tick_task, sc);
    209  1.27   xtraeme 	rw_init(&sc->sc_mii_rwlock);
    210   1.1    ichiro 	usb_init_task(&sc->sc_stop_task, (void (*)(void *)) url_stop_task, sc);
    211   1.1    ichiro 
    212   1.1    ichiro 	/* get control interface */
    213   1.1    ichiro 	err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface);
    214   1.1    ichiro 	if (err) {
    215  1.32      cube 		aprint_error_dev(self, "failed to get interface, err=%s\n",
    216   1.1    ichiro 		       usbd_errstr(err));
    217   1.1    ichiro 		goto bad;
    218   1.1    ichiro 	}
    219   1.1    ichiro 
    220   1.1    ichiro 	sc->sc_udev = dev;
    221   1.1    ichiro 	sc->sc_ctl_iface = iface;
    222   1.1    ichiro 	sc->sc_flags = url_lookup(uaa->vendor, uaa->product)->url_flags;
    223   1.1    ichiro 
    224   1.1    ichiro 	/* get interface descriptor */
    225   1.1    ichiro 	id = usbd_get_interface_descriptor(sc->sc_ctl_iface);
    226   1.1    ichiro 
    227   1.1    ichiro 	/* find endpoints */
    228   1.1    ichiro 	sc->sc_bulkin_no = sc->sc_bulkout_no = sc->sc_intrin_no = -1;
    229   1.1    ichiro 	for (i = 0; i < id->bNumEndpoints; i++) {
    230   1.1    ichiro 		ed = usbd_interface2endpoint_descriptor(sc->sc_ctl_iface, i);
    231   1.1    ichiro 		if (ed == NULL) {
    232  1.32      cube 			aprint_error_dev(self,
    233  1.32      cube 			    "couldn't get endpoint %d\n", i);
    234   1.1    ichiro 			goto bad;
    235   1.1    ichiro 		}
    236   1.1    ichiro 		if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
    237   1.1    ichiro 		    UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
    238   1.1    ichiro 			sc->sc_bulkin_no = ed->bEndpointAddress; /* RX */
    239   1.1    ichiro 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
    240   1.1    ichiro 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT)
    241   1.1    ichiro 			sc->sc_bulkout_no = ed->bEndpointAddress; /* TX */
    242   1.1    ichiro 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT &&
    243   1.1    ichiro 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
    244   1.1    ichiro 			sc->sc_intrin_no = ed->bEndpointAddress; /* Status */
    245   1.1    ichiro 	}
    246   1.1    ichiro 
    247   1.1    ichiro 	if (sc->sc_bulkin_no == -1 || sc->sc_bulkout_no == -1 ||
    248   1.1    ichiro 	    sc->sc_intrin_no == -1) {
    249  1.32      cube 		aprint_error_dev(self, "missing endpoint\n");
    250   1.1    ichiro 		goto bad;
    251   1.1    ichiro 	}
    252   1.1    ichiro 
    253   1.1    ichiro 	s = splnet();
    254   1.1    ichiro 
    255   1.1    ichiro 	/* reset the adapter */
    256   1.1    ichiro 	url_reset(sc);
    257   1.1    ichiro 
    258   1.1    ichiro 	/* Get Ethernet Address */
    259   1.1    ichiro 	err = url_mem(sc, URL_CMD_READMEM, URL_IDR0, (void *)eaddr,
    260   1.1    ichiro 		      ETHER_ADDR_LEN);
    261   1.1    ichiro 	if (err) {
    262  1.32      cube 		aprint_error_dev(self, "read MAC address failed\n");
    263   1.1    ichiro 		splx(s);
    264   1.1    ichiro 		goto bad;
    265   1.1    ichiro 	}
    266   1.1    ichiro 
    267   1.1    ichiro 	/* Print Ethernet Address */
    268  1.32      cube 	aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(eaddr));
    269   1.1    ichiro 
    270  1.19       wiz 	/* initialize interface information */
    271   1.1    ichiro 	ifp = GET_IFP(sc);
    272   1.1    ichiro 	ifp->if_softc = sc;
    273   1.3  augustss 	ifp->if_mtu = ETHERMTU;
    274  1.32      cube 	strncpy(ifp->if_xname, device_xname(self), IFNAMSIZ);
    275   1.1    ichiro 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
    276   1.1    ichiro 	ifp->if_start = url_start;
    277   1.1    ichiro 	ifp->if_ioctl = url_ioctl;
    278   1.1    ichiro 	ifp->if_watchdog = url_watchdog;
    279   1.1    ichiro 	ifp->if_init = url_init;
    280   1.1    ichiro 	ifp->if_stop = url_stop;
    281   1.1    ichiro 
    282   1.1    ichiro 	IFQ_SET_READY(&ifp->if_snd);
    283   1.1    ichiro 
    284   1.1    ichiro 	/*
    285   1.1    ichiro 	 * Do ifmedia setup.
    286   1.1    ichiro 	 */
    287   1.1    ichiro 	mii = &sc->sc_mii;
    288   1.1    ichiro 	mii->mii_ifp = ifp;
    289   1.1    ichiro 	mii->mii_readreg = url_int_miibus_readreg;
    290   1.1    ichiro 	mii->mii_writereg = url_int_miibus_writereg;
    291   1.1    ichiro #if 0
    292   1.1    ichiro 	if (sc->sc_flags & URL_EXT_PHY) {
    293   1.1    ichiro 		mii->mii_readreg = url_ext_miibus_readreg;
    294   1.1    ichiro 		mii->mii_writereg = url_ext_miibus_writereg;
    295   1.1    ichiro 	}
    296   1.1    ichiro #endif
    297   1.1    ichiro 	mii->mii_statchg = url_miibus_statchg;
    298   1.1    ichiro 	mii->mii_flags = MIIF_AUTOTSLEEP;
    299  1.30    dyoung 	sc->sc_ec.ec_mii = mii;
    300   1.1    ichiro 	ifmedia_init(&mii->mii_media, 0,
    301   1.1    ichiro 		     url_ifmedia_change, url_ifmedia_status);
    302   1.1    ichiro 	mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
    303   1.1    ichiro 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
    304   1.1    ichiro 		ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
    305   1.1    ichiro 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
    306   1.1    ichiro 	} else
    307   1.1    ichiro 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
    308   1.1    ichiro 
    309   1.1    ichiro 	/* attach the interface */
    310   1.1    ichiro 	if_attach(ifp);
    311  1.38    dyoung 	ether_ifattach(ifp, eaddr);
    312   1.1    ichiro 
    313  1.32      cube 	rnd_attach_source(&sc->rnd_source, device_xname(self),
    314  1.32      cube 	    RND_TYPE_NET, 0);
    315   1.1    ichiro 
    316  1.38    dyoung 	callout_init(&sc->sc_stat_ch, 0);
    317   1.1    ichiro 	sc->sc_attached = 1;
    318   1.1    ichiro 	splx(s);
    319   1.1    ichiro 
    320  1.38    dyoung 	usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, dev, sc->sc_dev);
    321   1.1    ichiro 
    322  1.38    dyoung 	return;
    323   1.1    ichiro 
    324   1.1    ichiro  bad:
    325   1.1    ichiro 	sc->sc_dying = 1;
    326  1.38    dyoung 	return;
    327   1.1    ichiro }
    328   1.1    ichiro 
    329   1.1    ichiro /* detach */
    330  1.40  jakllsch int
    331  1.38    dyoung url_detach(device_t self, int flags)
    332   1.1    ichiro {
    333  1.38    dyoung 	struct url_softc *sc = device_private(self);
    334   1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    335   1.1    ichiro 	int s;
    336   1.1    ichiro 
    337  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    338   1.1    ichiro 
    339   1.1    ichiro 	/* Detached before attached finished */
    340   1.1    ichiro 	if (!sc->sc_attached)
    341   1.1    ichiro 		return (0);
    342   1.1    ichiro 
    343  1.38    dyoung 	callout_stop(&sc->sc_stat_ch);
    344   1.1    ichiro 
    345   1.1    ichiro 	/* Remove any pending tasks */
    346   1.1    ichiro 	usb_rem_task(sc->sc_udev, &sc->sc_tick_task);
    347   1.1    ichiro 	usb_rem_task(sc->sc_udev, &sc->sc_stop_task);
    348   1.1    ichiro 
    349   1.1    ichiro 	s = splusb();
    350   1.1    ichiro 
    351   1.1    ichiro 	if (--sc->sc_refcnt >= 0) {
    352   1.1    ichiro 		/* Wait for processes to go away */
    353  1.42       mrg 		usb_detach_waitold(sc->sc_dev);
    354   1.1    ichiro 	}
    355   1.1    ichiro 
    356   1.1    ichiro 	if (ifp->if_flags & IFF_RUNNING)
    357   1.1    ichiro 		url_stop(GET_IFP(sc), 1);
    358   1.1    ichiro 
    359   1.1    ichiro 	rnd_detach_source(&sc->rnd_source);
    360   1.1    ichiro 	mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
    361   1.1    ichiro 	ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
    362   1.1    ichiro 	ether_ifdetach(ifp);
    363   1.1    ichiro 	if_detach(ifp);
    364   1.1    ichiro 
    365   1.1    ichiro #ifdef DIAGNOSTIC
    366   1.1    ichiro 	if (sc->sc_pipe_tx != NULL)
    367  1.32      cube 		aprint_debug_dev(self, "detach has active tx endpoint.\n");
    368   1.1    ichiro 	if (sc->sc_pipe_rx != NULL)
    369  1.32      cube 		aprint_debug_dev(self, "detach has active rx endpoint.\n");
    370   1.1    ichiro 	if (sc->sc_pipe_intr != NULL)
    371  1.32      cube 		aprint_debug_dev(self, "detach has active intr endpoint.\n");
    372   1.1    ichiro #endif
    373   1.1    ichiro 
    374   1.1    ichiro 	sc->sc_attached = 0;
    375   1.1    ichiro 
    376   1.1    ichiro 	splx(s);
    377   1.1    ichiro 
    378  1.28   xtraeme 	rw_destroy(&sc->sc_mii_rwlock);
    379   1.1    ichiro 	usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
    380  1.38    dyoung 			   sc->sc_dev);
    381   1.1    ichiro 
    382   1.1    ichiro 	return (0);
    383   1.1    ichiro }
    384   1.1    ichiro 
    385   1.1    ichiro /* read/write memory */
    386   1.1    ichiro Static int
    387   1.1    ichiro url_mem(struct url_softc *sc, int cmd, int offset, void *buf, int len)
    388   1.1    ichiro {
    389   1.1    ichiro 	usb_device_request_t req;
    390   1.1    ichiro 	usbd_status err;
    391   1.1    ichiro 
    392   1.1    ichiro 	if (sc == NULL)
    393   1.1    ichiro 		return (0);
    394   1.1    ichiro 
    395   1.1    ichiro 	DPRINTFN(0x200,
    396  1.38    dyoung 		("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    397   1.1    ichiro 
    398   1.1    ichiro 	if (sc->sc_dying)
    399   1.1    ichiro 		return (0);
    400   1.1    ichiro 
    401   1.1    ichiro 	if (cmd == URL_CMD_READMEM)
    402   1.1    ichiro 		req.bmRequestType = UT_READ_VENDOR_DEVICE;
    403   1.1    ichiro 	else
    404   1.1    ichiro 		req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
    405   1.1    ichiro 	req.bRequest = URL_REQ_MEM;
    406   1.1    ichiro 	USETW(req.wValue, offset);
    407   1.1    ichiro 	USETW(req.wIndex, 0x0000);
    408   1.1    ichiro 	USETW(req.wLength, len);
    409   1.1    ichiro 
    410   1.1    ichiro 	sc->sc_refcnt++;
    411   1.1    ichiro 	err = usbd_do_request(sc->sc_udev, &req, buf);
    412   1.1    ichiro 	if (--sc->sc_refcnt < 0)
    413  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
    414   1.1    ichiro 	if (err) {
    415   1.1    ichiro 		DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n",
    416  1.38    dyoung 			 device_xname(sc->sc_dev),
    417   1.1    ichiro 			 cmd == URL_CMD_READMEM ? "read" : "write",
    418   1.1    ichiro 			 offset, err));
    419   1.5  augustss 	}
    420   1.1    ichiro 
    421   1.1    ichiro 	return (err);
    422   1.1    ichiro }
    423   1.1    ichiro 
    424   1.1    ichiro /* read 1byte from register */
    425   1.1    ichiro Static int
    426   1.1    ichiro url_csr_read_1(struct url_softc *sc, int reg)
    427   1.1    ichiro {
    428   1.1    ichiro 	u_int8_t val = 0;
    429   1.1    ichiro 
    430   1.1    ichiro 	DPRINTFN(0x100,
    431  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    432   1.1    ichiro 
    433   1.1    ichiro 	if (sc->sc_dying)
    434   1.1    ichiro 		return (0);
    435   1.5  augustss 
    436   1.1    ichiro 	return (url_mem(sc, URL_CMD_READMEM, reg, &val, 1) ? 0 : val);
    437   1.1    ichiro }
    438   1.1    ichiro 
    439   1.1    ichiro /* read 2bytes from register */
    440   1.1    ichiro Static int
    441   1.1    ichiro url_csr_read_2(struct url_softc *sc, int reg)
    442   1.1    ichiro {
    443   1.1    ichiro 	uWord val;
    444   1.1    ichiro 
    445   1.1    ichiro 	DPRINTFN(0x100,
    446  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    447   1.1    ichiro 
    448   1.1    ichiro 	if (sc->sc_dying)
    449   1.1    ichiro 		return (0);
    450   1.5  augustss 
    451   1.1    ichiro 	USETW(val, 0);
    452   1.1    ichiro 	return (url_mem(sc, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val));
    453   1.1    ichiro }
    454   1.1    ichiro 
    455   1.1    ichiro /* write 1byte to register */
    456   1.1    ichiro Static int
    457   1.1    ichiro url_csr_write_1(struct url_softc *sc, int reg, int aval)
    458   1.1    ichiro {
    459   1.1    ichiro 	u_int8_t val = aval;
    460   1.1    ichiro 
    461   1.1    ichiro 	DPRINTFN(0x100,
    462  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    463   1.1    ichiro 
    464   1.1    ichiro 	if (sc->sc_dying)
    465   1.1    ichiro 		return (0);
    466   1.5  augustss 
    467   1.1    ichiro 	return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0);
    468   1.1    ichiro }
    469   1.1    ichiro 
    470   1.1    ichiro /* write 2bytes to register */
    471   1.1    ichiro Static int
    472   1.1    ichiro url_csr_write_2(struct url_softc *sc, int reg, int aval)
    473   1.1    ichiro {
    474   1.1    ichiro 	uWord val;
    475   1.1    ichiro 
    476   1.1    ichiro 	DPRINTFN(0x100,
    477  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    478   1.1    ichiro 
    479   1.1    ichiro 	USETW(val, aval);
    480   1.1    ichiro 
    481   1.1    ichiro 	if (sc->sc_dying)
    482   1.1    ichiro 		return (0);
    483   1.5  augustss 
    484   1.1    ichiro 	return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0);
    485   1.1    ichiro }
    486   1.1    ichiro 
    487   1.1    ichiro /* write 4bytes to register */
    488   1.1    ichiro Static int
    489   1.1    ichiro url_csr_write_4(struct url_softc *sc, int reg, int aval)
    490   1.1    ichiro {
    491   1.1    ichiro 	uDWord val;
    492   1.1    ichiro 
    493   1.1    ichiro 	DPRINTFN(0x100,
    494  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    495   1.1    ichiro 
    496   1.1    ichiro 	USETDW(val, aval);
    497   1.1    ichiro 
    498   1.1    ichiro 	if (sc->sc_dying)
    499   1.1    ichiro 		return (0);
    500   1.5  augustss 
    501   1.1    ichiro 	return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0);
    502   1.1    ichiro }
    503   1.1    ichiro 
    504   1.1    ichiro Static int
    505   1.1    ichiro url_init(struct ifnet *ifp)
    506   1.1    ichiro {
    507   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
    508   1.1    ichiro 	struct mii_data *mii = GET_MII(sc);
    509  1.29    dyoung 	const u_char *eaddr;
    510  1.30    dyoung 	int i, rc, s;
    511   1.1    ichiro 
    512  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    513   1.5  augustss 
    514   1.1    ichiro 	if (sc->sc_dying)
    515   1.1    ichiro 		return (EIO);
    516   1.1    ichiro 
    517   1.1    ichiro 	s = splnet();
    518   1.1    ichiro 
    519   1.1    ichiro 	/* Cancel pending I/O and free all TX/RX buffers */
    520   1.1    ichiro 	url_stop(ifp, 1);
    521   1.1    ichiro 
    522  1.29    dyoung 	eaddr = CLLADDR(ifp->if_sadl);
    523   1.1    ichiro 	for (i = 0; i < ETHER_ADDR_LEN; i++)
    524   1.1    ichiro 		url_csr_write_1(sc, URL_IDR0 + i, eaddr[i]);
    525   1.1    ichiro 
    526   1.1    ichiro 	/* Init transmission control register */
    527   1.1    ichiro 	URL_CLRBIT(sc, URL_TCR,
    528   1.1    ichiro 		   URL_TCR_TXRR1 | URL_TCR_TXRR0 |
    529   1.1    ichiro 		   URL_TCR_IFG1 | URL_TCR_IFG0 |
    530   1.1    ichiro 		   URL_TCR_NOCRC);
    531   1.1    ichiro 
    532   1.1    ichiro 	/* Init receive control register */
    533   1.1    ichiro 	URL_SETBIT2(sc, URL_RCR, URL_RCR_TAIL | URL_RCR_AD);
    534   1.1    ichiro 	if (ifp->if_flags & IFF_BROADCAST)
    535   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AB);
    536   1.1    ichiro 	else
    537   1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AB);
    538   1.1    ichiro 
    539   1.1    ichiro 	/* If we want promiscuous mode, accept all physical frames. */
    540   1.1    ichiro 	if (ifp->if_flags & IFF_PROMISC)
    541   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    542   1.1    ichiro 	else
    543   1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    544   1.1    ichiro 
    545   1.5  augustss 
    546   1.1    ichiro 	/* Initialize transmit ring */
    547   1.1    ichiro 	if (url_tx_list_init(sc) == ENOBUFS) {
    548  1.38    dyoung 		printf("%s: tx list init failed\n", device_xname(sc->sc_dev));
    549   1.1    ichiro 		splx(s);
    550   1.1    ichiro 		return (EIO);
    551   1.1    ichiro 	}
    552   1.1    ichiro 
    553   1.1    ichiro 	/* Initialize receive ring */
    554   1.1    ichiro 	if (url_rx_list_init(sc) == ENOBUFS) {
    555  1.38    dyoung 		printf("%s: rx list init failed\n", device_xname(sc->sc_dev));
    556   1.1    ichiro 		splx(s);
    557   1.1    ichiro 		return (EIO);
    558   1.1    ichiro 	}
    559   1.1    ichiro 
    560   1.1    ichiro 	/* Load the multicast filter */
    561   1.1    ichiro 	url_setmulti(sc);
    562   1.1    ichiro 
    563   1.1    ichiro 	/* Enable RX and TX */
    564   1.1    ichiro 	URL_SETBIT(sc, URL_CR, URL_CR_TE | URL_CR_RE);
    565   1.1    ichiro 
    566  1.30    dyoung 	if ((rc = mii_mediachg(mii)) == ENXIO)
    567  1.30    dyoung 		rc = 0;
    568  1.30    dyoung 	else if (rc != 0)
    569  1.30    dyoung 		goto out;
    570   1.1    ichiro 
    571   1.1    ichiro 	if (sc->sc_pipe_tx == NULL || sc->sc_pipe_rx == NULL) {
    572   1.1    ichiro 		if (url_openpipes(sc)) {
    573   1.1    ichiro 			splx(s);
    574   1.1    ichiro 			return (EIO);
    575   1.1    ichiro 		}
    576   1.1    ichiro 	}
    577   1.1    ichiro 
    578   1.1    ichiro 	ifp->if_flags |= IFF_RUNNING;
    579   1.1    ichiro 	ifp->if_flags &= ~IFF_OACTIVE;
    580   1.1    ichiro 
    581  1.38    dyoung 	callout_reset(&sc->sc_stat_ch, hz, url_tick, sc);
    582   1.1    ichiro 
    583  1.30    dyoung out:
    584  1.30    dyoung 	splx(s);
    585  1.30    dyoung 	return rc;
    586   1.1    ichiro }
    587   1.1    ichiro 
    588   1.1    ichiro Static void
    589   1.1    ichiro url_reset(struct url_softc *sc)
    590   1.1    ichiro {
    591   1.1    ichiro 	int i;
    592   1.5  augustss 
    593  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    594   1.1    ichiro 
    595   1.1    ichiro 	if (sc->sc_dying)
    596   1.1    ichiro 		return;
    597   1.1    ichiro 
    598   1.1    ichiro 	URL_SETBIT(sc, URL_CR, URL_CR_SOFT_RST);
    599   1.1    ichiro 
    600   1.1    ichiro 	for (i = 0; i < URL_TX_TIMEOUT; i++) {
    601   1.1    ichiro 		if (!(url_csr_read_1(sc, URL_CR) & URL_CR_SOFT_RST))
    602   1.1    ichiro 			break;
    603   1.1    ichiro 		delay(10);	/* XXX */
    604   1.1    ichiro 	}
    605   1.1    ichiro 
    606   1.1    ichiro 	delay(10000);		/* XXX */
    607   1.1    ichiro }
    608   1.1    ichiro 
    609   1.1    ichiro int
    610  1.38    dyoung url_activate(device_t self, enum devact act)
    611   1.1    ichiro {
    612  1.32      cube 	struct url_softc *sc = device_private(self);
    613   1.1    ichiro 
    614  1.38    dyoung 	DPRINTF(("%s: %s: enter, act=%d\n", device_xname(sc->sc_dev),
    615   1.4  augustss 		 __func__, act));
    616   1.1    ichiro 
    617   1.1    ichiro 	switch (act) {
    618   1.1    ichiro 	case DVACT_DEACTIVATE:
    619   1.1    ichiro 		if_deactivate(&sc->sc_ec.ec_if);
    620   1.1    ichiro 		sc->sc_dying = 1;
    621  1.35    dyoung 		return 0;
    622  1.35    dyoung 	default:
    623  1.35    dyoung 		return EOPNOTSUPP;
    624   1.1    ichiro 	}
    625   1.1    ichiro }
    626   1.1    ichiro 
    627   1.1    ichiro #define url_calchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) >> 26)
    628   1.1    ichiro 
    629   1.1    ichiro 
    630   1.1    ichiro Static void
    631   1.1    ichiro url_setmulti(struct url_softc *sc)
    632   1.1    ichiro {
    633   1.1    ichiro 	struct ifnet *ifp;
    634   1.1    ichiro 	struct ether_multi *enm;
    635   1.1    ichiro 	struct ether_multistep step;
    636   1.1    ichiro 	u_int32_t hashes[2] = { 0, 0 };
    637   1.1    ichiro 	int h = 0;
    638   1.1    ichiro 	int mcnt = 0;
    639   1.1    ichiro 
    640  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    641   1.1    ichiro 
    642   1.1    ichiro 	if (sc->sc_dying)
    643   1.1    ichiro 		return;
    644   1.1    ichiro 
    645   1.1    ichiro 	ifp = GET_IFP(sc);
    646   1.1    ichiro 
    647   1.1    ichiro 	if (ifp->if_flags & IFF_PROMISC) {
    648   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    649   1.1    ichiro 		return;
    650   1.1    ichiro 	} else if (ifp->if_flags & IFF_ALLMULTI) {
    651   1.1    ichiro 	allmulti:
    652   1.1    ichiro 		ifp->if_flags |= IFF_ALLMULTI;
    653   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM);
    654   1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAP);
    655   1.1    ichiro 		return;
    656   1.1    ichiro 	}
    657   1.1    ichiro 
    658   1.1    ichiro 	/* first, zot all the existing hash bits */
    659   1.1    ichiro 	url_csr_write_4(sc, URL_MAR0, 0);
    660   1.1    ichiro 	url_csr_write_4(sc, URL_MAR4, 0);
    661   1.1    ichiro 
    662   1.1    ichiro 	/* now program new ones */
    663   1.1    ichiro 	ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
    664   1.1    ichiro 	while (enm != NULL) {
    665   1.1    ichiro 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
    666   1.1    ichiro 			   ETHER_ADDR_LEN) != 0)
    667   1.1    ichiro 			goto allmulti;
    668   1.1    ichiro 
    669   1.1    ichiro 		h = url_calchash(enm->enm_addrlo);
    670   1.1    ichiro 		if (h < 32)
    671   1.1    ichiro 			hashes[0] |= (1 << h);
    672   1.1    ichiro 		else
    673   1.1    ichiro 			hashes[1] |= (1 << (h -32));
    674   1.1    ichiro 		mcnt++;
    675   1.1    ichiro 		ETHER_NEXT_MULTI(step, enm);
    676   1.1    ichiro 	}
    677   1.1    ichiro 
    678   1.1    ichiro 	ifp->if_flags &= ~IFF_ALLMULTI;
    679   1.1    ichiro 
    680   1.1    ichiro 	URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    681   1.1    ichiro 
    682   1.1    ichiro 	if (mcnt){
    683   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AM);
    684   1.1    ichiro 	} else {
    685   1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AM);
    686   1.1    ichiro 	}
    687   1.1    ichiro 	url_csr_write_4(sc, URL_MAR0, hashes[0]);
    688   1.1    ichiro 	url_csr_write_4(sc, URL_MAR4, hashes[1]);
    689   1.1    ichiro }
    690   1.1    ichiro 
    691   1.1    ichiro Static int
    692   1.1    ichiro url_openpipes(struct url_softc *sc)
    693   1.1    ichiro {
    694   1.1    ichiro 	struct url_chain *c;
    695   1.1    ichiro 	usbd_status err;
    696   1.1    ichiro 	int i;
    697   1.1    ichiro 	int error = 0;
    698   1.1    ichiro 
    699   1.1    ichiro 	if (sc->sc_dying)
    700   1.1    ichiro 		return (EIO);
    701   1.5  augustss 
    702   1.1    ichiro 	sc->sc_refcnt++;
    703   1.1    ichiro 
    704   1.1    ichiro 	/* Open RX pipe */
    705   1.1    ichiro 	err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkin_no,
    706   1.1    ichiro 			     USBD_EXCLUSIVE_USE, &sc->sc_pipe_rx);
    707   1.1    ichiro 	if (err) {
    708   1.1    ichiro 		printf("%s: open rx pipe failed: %s\n",
    709  1.38    dyoung 		       device_xname(sc->sc_dev), usbd_errstr(err));
    710   1.1    ichiro 		error = EIO;
    711   1.1    ichiro 		goto done;
    712   1.1    ichiro 	}
    713   1.5  augustss 
    714   1.1    ichiro 	/* Open TX pipe */
    715   1.1    ichiro 	err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkout_no,
    716   1.1    ichiro 			     USBD_EXCLUSIVE_USE, &sc->sc_pipe_tx);
    717   1.1    ichiro 	if (err) {
    718   1.1    ichiro 		printf("%s: open tx pipe failed: %s\n",
    719  1.38    dyoung 		       device_xname(sc->sc_dev), usbd_errstr(err));
    720   1.1    ichiro 		error = EIO;
    721   1.1    ichiro 		goto done;
    722   1.1    ichiro 	}
    723   1.1    ichiro 
    724   1.1    ichiro #if 0
    725   1.1    ichiro 	/* XXX: interrupt endpoint is not yet supported */
    726   1.1    ichiro 	/* Open Interrupt pipe */
    727   1.1    ichiro 	err = usbd_open_pipe_intr(sc->sc_ctl_iface, sc->sc_intrin_no,
    728   1.1    ichiro 				  USBD_EXCLUSIVE_USE, &sc->sc_pipe_intr, sc,
    729   1.1    ichiro 				  &sc->sc_cdata.url_ibuf, URL_INTR_PKGLEN,
    730  1.24  drochner 				  url_intr, USBD_DEFAULT_INTERVAL);
    731   1.1    ichiro 	if (err) {
    732   1.1    ichiro 		printf("%s: open intr pipe failed: %s\n",
    733  1.38    dyoung 		       device_xname(sc->sc_dev), usbd_errstr(err));
    734   1.1    ichiro 		error = EIO;
    735   1.1    ichiro 		goto done;
    736   1.1    ichiro 	}
    737   1.1    ichiro #endif
    738   1.1    ichiro 
    739   1.1    ichiro 
    740   1.1    ichiro 	/* Start up the receive pipe. */
    741   1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
    742   1.1    ichiro 		c = &sc->sc_cdata.url_rx_chain[i];
    743   1.1    ichiro 		usbd_setup_xfer(c->url_xfer, sc->sc_pipe_rx,
    744   1.1    ichiro 				c, c->url_buf, URL_BUFSZ,
    745   1.1    ichiro 				USBD_SHORT_XFER_OK | USBD_NO_COPY,
    746   1.1    ichiro 				USBD_NO_TIMEOUT, url_rxeof);
    747   1.1    ichiro 		(void)usbd_transfer(c->url_xfer);
    748  1.38    dyoung 		DPRINTF(("%s: %s: start read\n", device_xname(sc->sc_dev),
    749   1.4  augustss 			 __func__));
    750   1.1    ichiro 	}
    751   1.1    ichiro 
    752   1.1    ichiro  done:
    753   1.1    ichiro 	if (--sc->sc_refcnt < 0)
    754  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
    755   1.5  augustss 
    756   1.1    ichiro 	return (error);
    757   1.1    ichiro }
    758   1.1    ichiro 
    759   1.1    ichiro Static int
    760   1.1    ichiro url_newbuf(struct url_softc *sc, struct url_chain *c, struct mbuf *m)
    761   1.1    ichiro {
    762   1.1    ichiro 	struct mbuf *m_new = NULL;
    763   1.1    ichiro 
    764  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    765   1.1    ichiro 
    766   1.1    ichiro 	if (m == NULL) {
    767   1.1    ichiro 		MGETHDR(m_new, M_DONTWAIT, MT_DATA);
    768   1.1    ichiro 		if (m_new == NULL) {
    769   1.1    ichiro 			printf("%s: no memory for rx list "
    770  1.38    dyoung 			       "-- packet dropped!\n", device_xname(sc->sc_dev));
    771   1.1    ichiro 			return (ENOBUFS);
    772   1.1    ichiro 		}
    773   1.1    ichiro 		MCLGET(m_new, M_DONTWAIT);
    774   1.1    ichiro 		if (!(m_new->m_flags & M_EXT)) {
    775   1.1    ichiro 			printf("%s: no memory for rx list "
    776  1.38    dyoung 			       "-- packet dropped!\n", device_xname(sc->sc_dev));
    777   1.1    ichiro 			m_freem(m_new);
    778   1.1    ichiro 			return (ENOBUFS);
    779   1.1    ichiro 		}
    780   1.1    ichiro 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
    781   1.1    ichiro 	} else {
    782   1.1    ichiro 		m_new = m;
    783   1.1    ichiro 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
    784   1.1    ichiro 		m_new->m_data = m_new->m_ext.ext_buf;
    785   1.1    ichiro 	}
    786   1.1    ichiro 
    787   1.1    ichiro 	m_adj(m_new, ETHER_ALIGN);
    788   1.1    ichiro 	c->url_mbuf = m_new;
    789   1.1    ichiro 
    790   1.1    ichiro 	return (0);
    791   1.1    ichiro }
    792   1.5  augustss 
    793   1.1    ichiro 
    794   1.1    ichiro Static int
    795   1.1    ichiro url_rx_list_init(struct url_softc *sc)
    796   1.1    ichiro {
    797   1.1    ichiro 	struct url_cdata *cd;
    798   1.1    ichiro 	struct url_chain *c;
    799   1.1    ichiro 	int i;
    800   1.1    ichiro 
    801  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    802   1.1    ichiro 
    803   1.1    ichiro 	cd = &sc->sc_cdata;
    804   1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
    805   1.1    ichiro 		c = &cd->url_rx_chain[i];
    806   1.1    ichiro 		c->url_sc = sc;
    807   1.1    ichiro 		c->url_idx = i;
    808   1.1    ichiro 		if (url_newbuf(sc, c, NULL) == ENOBUFS)
    809   1.1    ichiro 			return (ENOBUFS);
    810   1.1    ichiro 		if (c->url_xfer == NULL) {
    811   1.1    ichiro 			c->url_xfer = usbd_alloc_xfer(sc->sc_udev);
    812   1.1    ichiro 			if (c->url_xfer == NULL)
    813   1.1    ichiro 				return (ENOBUFS);
    814   1.1    ichiro 			c->url_buf = usbd_alloc_buffer(c->url_xfer, URL_BUFSZ);
    815   1.1    ichiro 			if (c->url_buf == NULL) {
    816   1.1    ichiro 				usbd_free_xfer(c->url_xfer);
    817   1.1    ichiro 				return (ENOBUFS);
    818   1.1    ichiro 			}
    819   1.1    ichiro 		}
    820   1.1    ichiro 	}
    821   1.5  augustss 
    822   1.1    ichiro 	return (0);
    823   1.1    ichiro }
    824   1.1    ichiro 
    825   1.1    ichiro Static int
    826   1.1    ichiro url_tx_list_init(struct url_softc *sc)
    827   1.1    ichiro {
    828   1.1    ichiro 	struct url_cdata *cd;
    829   1.1    ichiro 	struct url_chain *c;
    830   1.1    ichiro 	int i;
    831   1.1    ichiro 
    832  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    833   1.1    ichiro 
    834   1.1    ichiro 	cd = &sc->sc_cdata;
    835   1.1    ichiro 	for (i = 0; i < URL_TX_LIST_CNT; i++) {
    836   1.1    ichiro 		c = &cd->url_tx_chain[i];
    837   1.1    ichiro 		c->url_sc = sc;
    838   1.1    ichiro 		c->url_idx = i;
    839   1.1    ichiro 		c->url_mbuf = NULL;
    840   1.1    ichiro 		if (c->url_xfer == NULL) {
    841   1.1    ichiro 			c->url_xfer = usbd_alloc_xfer(sc->sc_udev);
    842   1.1    ichiro 			if (c->url_xfer == NULL)
    843   1.1    ichiro 				return (ENOBUFS);
    844   1.1    ichiro 			c->url_buf = usbd_alloc_buffer(c->url_xfer, URL_BUFSZ);
    845   1.1    ichiro 			if (c->url_buf == NULL) {
    846   1.1    ichiro 				usbd_free_xfer(c->url_xfer);
    847   1.1    ichiro 				return (ENOBUFS);
    848   1.1    ichiro 			}
    849   1.1    ichiro 		}
    850   1.1    ichiro 	}
    851   1.5  augustss 
    852   1.1    ichiro 	return (0);
    853   1.1    ichiro }
    854   1.1    ichiro 
    855   1.1    ichiro Static void
    856   1.1    ichiro url_start(struct ifnet *ifp)
    857   1.1    ichiro {
    858   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
    859   1.1    ichiro 	struct mbuf *m_head = NULL;
    860   1.5  augustss 
    861  1.38    dyoung 	DPRINTF(("%s: %s: enter, link=%d\n", device_xname(sc->sc_dev),
    862   1.4  augustss 		 __func__, sc->sc_link));
    863   1.1    ichiro 
    864   1.1    ichiro 	if (sc->sc_dying)
    865   1.1    ichiro 		return;
    866   1.1    ichiro 
    867   1.1    ichiro 	if (!sc->sc_link)
    868   1.1    ichiro 		return;
    869   1.1    ichiro 
    870   1.1    ichiro 	if (ifp->if_flags & IFF_OACTIVE)
    871   1.1    ichiro 		return;
    872   1.1    ichiro 
    873   1.1    ichiro 	IFQ_POLL(&ifp->if_snd, m_head);
    874   1.1    ichiro 	if (m_head == NULL)
    875   1.1    ichiro 		return;
    876   1.1    ichiro 
    877   1.1    ichiro 	if (url_send(sc, m_head, 0)) {
    878   1.1    ichiro 		ifp->if_flags |= IFF_OACTIVE;
    879   1.1    ichiro 		return;
    880   1.1    ichiro 	}
    881   1.1    ichiro 
    882   1.1    ichiro 	IFQ_DEQUEUE(&ifp->if_snd, m_head);
    883   1.1    ichiro 
    884  1.37     joerg 	bpf_mtap(ifp, m_head);
    885   1.1    ichiro 
    886   1.1    ichiro 	ifp->if_flags |= IFF_OACTIVE;
    887   1.1    ichiro 
    888   1.1    ichiro 	/* Set a timeout in case the chip goes out to lunch. */
    889   1.1    ichiro 	ifp->if_timer = 5;
    890   1.1    ichiro }
    891   1.1    ichiro 
    892   1.1    ichiro Static int
    893   1.1    ichiro url_send(struct url_softc *sc, struct mbuf *m, int idx)
    894   1.1    ichiro {
    895   1.1    ichiro 	int total_len;
    896   1.1    ichiro 	struct url_chain *c;
    897   1.1    ichiro 	usbd_status err;
    898   1.1    ichiro 
    899  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev),__func__));
    900   1.1    ichiro 
    901   1.1    ichiro 	c = &sc->sc_cdata.url_tx_chain[idx];
    902   1.1    ichiro 
    903   1.1    ichiro 	/* Copy the mbuf data into a contiguous buffer */
    904   1.1    ichiro 	m_copydata(m, 0, m->m_pkthdr.len, c->url_buf);
    905   1.1    ichiro 	c->url_mbuf = m;
    906   1.1    ichiro 	total_len = m->m_pkthdr.len;
    907   1.1    ichiro 
    908   1.7    bouyer 	if (total_len < URL_MIN_FRAME_LEN) {
    909   1.7    bouyer 		memset(c->url_buf + total_len, 0,
    910   1.7    bouyer 		    URL_MIN_FRAME_LEN - total_len);
    911   1.1    ichiro 		total_len = URL_MIN_FRAME_LEN;
    912   1.7    bouyer 	}
    913   1.1    ichiro 	usbd_setup_xfer(c->url_xfer, sc->sc_pipe_tx, c, c->url_buf, total_len,
    914   1.1    ichiro 			USBD_FORCE_SHORT_XFER | USBD_NO_COPY,
    915   1.1    ichiro 			URL_TX_TIMEOUT, url_txeof);
    916   1.1    ichiro 
    917   1.1    ichiro 	/* Transmit */
    918   1.1    ichiro 	sc->sc_refcnt++;
    919   1.1    ichiro 	err = usbd_transfer(c->url_xfer);
    920   1.1    ichiro 	if (--sc->sc_refcnt < 0)
    921  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
    922   1.1    ichiro 	if (err != USBD_IN_PROGRESS) {
    923  1.38    dyoung 		printf("%s: url_send error=%s\n", device_xname(sc->sc_dev),
    924   1.1    ichiro 		       usbd_errstr(err));
    925   1.1    ichiro 		/* Stop the interface */
    926  1.22     joerg 		usb_add_task(sc->sc_udev, &sc->sc_stop_task,
    927  1.22     joerg 		    USB_TASKQ_DRIVER);
    928   1.1    ichiro 		return (EIO);
    929   1.1    ichiro 	}
    930   1.1    ichiro 
    931  1.38    dyoung 	DPRINTF(("%s: %s: send %d bytes\n", device_xname(sc->sc_dev),
    932   1.4  augustss 		 __func__, total_len));
    933   1.1    ichiro 
    934   1.1    ichiro 	sc->sc_cdata.url_tx_cnt++;
    935   1.1    ichiro 
    936   1.1    ichiro 	return (0);
    937   1.1    ichiro }
    938   1.1    ichiro 
    939   1.1    ichiro Static void
    940  1.23  christos url_txeof(usbd_xfer_handle xfer, usbd_private_handle priv,
    941  1.21  christos     usbd_status status)
    942   1.1    ichiro {
    943   1.1    ichiro 	struct url_chain *c = priv;
    944   1.1    ichiro 	struct url_softc *sc = c->url_sc;
    945   1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    946   1.1    ichiro 	int s;
    947   1.1    ichiro 
    948   1.1    ichiro 	if (sc->sc_dying)
    949   1.1    ichiro 		return;
    950   1.1    ichiro 
    951   1.1    ichiro 	s = splnet();
    952   1.1    ichiro 
    953  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    954   1.1    ichiro 
    955   1.1    ichiro 	ifp->if_timer = 0;
    956   1.1    ichiro 	ifp->if_flags &= ~IFF_OACTIVE;
    957   1.1    ichiro 
    958   1.1    ichiro 	if (status != USBD_NORMAL_COMPLETION) {
    959   1.1    ichiro 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
    960   1.1    ichiro 			splx(s);
    961   1.1    ichiro 			return;
    962   1.1    ichiro 		}
    963   1.1    ichiro 		ifp->if_oerrors++;
    964  1.38    dyoung 		printf("%s: usb error on tx: %s\n", device_xname(sc->sc_dev),
    965   1.1    ichiro 		       usbd_errstr(status));
    966   1.1    ichiro 		if (status == USBD_STALLED) {
    967   1.1    ichiro 			sc->sc_refcnt++;
    968  1.18  augustss 			usbd_clear_endpoint_stall_async(sc->sc_pipe_tx);
    969   1.1    ichiro 			if (--sc->sc_refcnt < 0)
    970  1.42       mrg 				usb_detach_wakeupold(sc->sc_dev);
    971   1.1    ichiro 		}
    972   1.1    ichiro 		splx(s);
    973   1.1    ichiro 		return;
    974   1.1    ichiro 	}
    975   1.1    ichiro 
    976   1.1    ichiro 	ifp->if_opackets++;
    977   1.1    ichiro 
    978   1.6    martin 	m_freem(c->url_mbuf);
    979   1.1    ichiro 	c->url_mbuf = NULL;
    980   1.1    ichiro 
    981   1.1    ichiro 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
    982   1.1    ichiro 		url_start(ifp);
    983   1.1    ichiro 
    984   1.1    ichiro 	splx(s);
    985   1.1    ichiro }
    986   1.1    ichiro 
    987   1.1    ichiro Static void
    988   1.1    ichiro url_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
    989   1.1    ichiro {
    990   1.1    ichiro 	struct url_chain *c = priv;
    991   1.1    ichiro 	struct url_softc *sc = c->url_sc;
    992   1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    993   1.1    ichiro 	struct mbuf *m;
    994   1.1    ichiro 	u_int32_t total_len;
    995   1.1    ichiro 	url_rxhdr_t rxhdr;
    996   1.1    ichiro 	int s;
    997   1.1    ichiro 
    998  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev),__func__));
    999   1.1    ichiro 
   1000   1.1    ichiro 	if (sc->sc_dying)
   1001   1.1    ichiro 		return;
   1002   1.1    ichiro 
   1003   1.1    ichiro 	if (status != USBD_NORMAL_COMPLETION) {
   1004   1.1    ichiro 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
   1005   1.1    ichiro 			return;
   1006   1.1    ichiro 		sc->sc_rx_errs++;
   1007   1.1    ichiro 		if (usbd_ratecheck(&sc->sc_rx_notice)) {
   1008   1.1    ichiro 			printf("%s: %u usb errors on rx: %s\n",
   1009  1.38    dyoung 			       device_xname(sc->sc_dev), sc->sc_rx_errs,
   1010   1.1    ichiro 			       usbd_errstr(status));
   1011   1.1    ichiro 			sc->sc_rx_errs = 0;
   1012   1.1    ichiro 		}
   1013   1.1    ichiro 		if (status == USBD_STALLED) {
   1014   1.1    ichiro 			sc->sc_refcnt++;
   1015  1.18  augustss 			usbd_clear_endpoint_stall_async(sc->sc_pipe_rx);
   1016   1.1    ichiro 			if (--sc->sc_refcnt < 0)
   1017  1.42       mrg 				usb_detach_wakeupold(sc->sc_dev);
   1018   1.1    ichiro 		}
   1019   1.1    ichiro 		goto done;
   1020   1.1    ichiro 	}
   1021   1.1    ichiro 
   1022   1.1    ichiro 	usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
   1023   1.1    ichiro 
   1024   1.1    ichiro 	memcpy(mtod(c->url_mbuf, char *), c->url_buf, total_len);
   1025   1.1    ichiro 
   1026   1.1    ichiro 	if (total_len <= ETHER_CRC_LEN) {
   1027   1.1    ichiro 		ifp->if_ierrors++;
   1028   1.1    ichiro 		goto done;
   1029   1.1    ichiro 	}
   1030   1.1    ichiro 
   1031   1.1    ichiro 	memcpy(&rxhdr, c->url_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr));
   1032   1.1    ichiro 
   1033   1.1    ichiro 	DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n",
   1034  1.38    dyoung 		 device_xname(sc->sc_dev),
   1035   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK,
   1036   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "",
   1037   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "",
   1038   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "",
   1039   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : ""));
   1040   1.1    ichiro 
   1041   1.1    ichiro 	if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) {
   1042   1.1    ichiro 		ifp->if_ierrors++;
   1043   1.1    ichiro 		goto done;
   1044   1.1    ichiro 	}
   1045   1.1    ichiro 
   1046   1.1    ichiro 	ifp->if_ipackets++;
   1047   1.1    ichiro 	total_len -= ETHER_CRC_LEN;
   1048   1.1    ichiro 
   1049   1.1    ichiro 	m = c->url_mbuf;
   1050   1.1    ichiro 	m->m_pkthdr.len = m->m_len = total_len;
   1051   1.1    ichiro 	m->m_pkthdr.rcvif = ifp;
   1052   1.1    ichiro 
   1053   1.1    ichiro 	s = splnet();
   1054   1.1    ichiro 
   1055   1.1    ichiro 	if (url_newbuf(sc, c, NULL) == ENOBUFS) {
   1056   1.1    ichiro 		ifp->if_ierrors++;
   1057   1.1    ichiro 		goto done1;
   1058   1.1    ichiro 	}
   1059   1.1    ichiro 
   1060  1.37     joerg 	bpf_mtap(ifp, m);
   1061   1.1    ichiro 
   1062  1.38    dyoung 	DPRINTF(("%s: %s: deliver %d\n", device_xname(sc->sc_dev),
   1063   1.4  augustss 		 __func__, m->m_len));
   1064  1.38    dyoung 	(*(ifp)->if_input)((ifp), (m));
   1065   1.1    ichiro 
   1066   1.1    ichiro  done1:
   1067   1.1    ichiro 	splx(s);
   1068   1.1    ichiro 
   1069   1.1    ichiro  done:
   1070   1.1    ichiro 	/* Setup new transfer */
   1071   1.1    ichiro 	usbd_setup_xfer(xfer, sc->sc_pipe_rx, c, c->url_buf, URL_BUFSZ,
   1072   1.1    ichiro 			USBD_SHORT_XFER_OK | USBD_NO_COPY,
   1073   1.1    ichiro 			USBD_NO_TIMEOUT, url_rxeof);
   1074   1.1    ichiro 	sc->sc_refcnt++;
   1075   1.1    ichiro 	usbd_transfer(xfer);
   1076   1.1    ichiro 	if (--sc->sc_refcnt < 0)
   1077  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
   1078   1.1    ichiro 
   1079  1.38    dyoung 	DPRINTF(("%s: %s: start rx\n", device_xname(sc->sc_dev), __func__));
   1080   1.1    ichiro }
   1081   1.1    ichiro 
   1082   1.1    ichiro #if 0
   1083  1.33    cegger Static void url_intr(void)
   1084   1.1    ichiro {
   1085   1.1    ichiro }
   1086   1.1    ichiro #endif
   1087   1.1    ichiro 
   1088   1.1    ichiro Static int
   1089  1.25  christos url_ioctl(struct ifnet *ifp, u_long cmd, void *data)
   1090   1.1    ichiro {
   1091   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1092   1.1    ichiro 	int s, error = 0;
   1093   1.1    ichiro 
   1094  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1095   1.1    ichiro 
   1096   1.1    ichiro 	if (sc->sc_dying)
   1097   1.1    ichiro 		return (EIO);
   1098   1.1    ichiro 
   1099   1.1    ichiro 	s = splnet();
   1100   1.1    ichiro 
   1101  1.30    dyoung 	error = ether_ioctl(ifp, cmd, data);
   1102  1.30    dyoung 	if (error == ENETRESET) {
   1103  1.30    dyoung 		if (ifp->if_flags & IFF_RUNNING)
   1104  1.30    dyoung 			url_setmulti(sc);
   1105  1.30    dyoung 		error = 0;
   1106   1.1    ichiro 	}
   1107   1.1    ichiro 
   1108   1.1    ichiro 	splx(s);
   1109   1.1    ichiro 
   1110   1.1    ichiro 	return (error);
   1111   1.1    ichiro }
   1112   1.1    ichiro 
   1113   1.1    ichiro Static void
   1114   1.1    ichiro url_watchdog(struct ifnet *ifp)
   1115   1.1    ichiro {
   1116   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1117   1.1    ichiro 	struct url_chain *c;
   1118   1.1    ichiro 	usbd_status stat;
   1119   1.1    ichiro 	int s;
   1120   1.5  augustss 
   1121  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1122   1.1    ichiro 
   1123   1.1    ichiro 	ifp->if_oerrors++;
   1124  1.38    dyoung 	printf("%s: watchdog timeout\n", device_xname(sc->sc_dev));
   1125   1.1    ichiro 
   1126   1.1    ichiro 	s = splusb();
   1127   1.1    ichiro 	c = &sc->sc_cdata.url_tx_chain[0];
   1128   1.1    ichiro 	usbd_get_xfer_status(c->url_xfer, NULL, NULL, NULL, &stat);
   1129   1.1    ichiro 	url_txeof(c->url_xfer, c, stat);
   1130   1.1    ichiro 
   1131   1.1    ichiro 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1132   1.1    ichiro 		url_start(ifp);
   1133   1.1    ichiro 	splx(s);
   1134   1.1    ichiro }
   1135   1.1    ichiro 
   1136   1.1    ichiro Static void
   1137   1.1    ichiro url_stop_task(struct url_softc *sc)
   1138   1.1    ichiro {
   1139   1.1    ichiro 	url_stop(GET_IFP(sc), 1);
   1140   1.1    ichiro }
   1141   1.1    ichiro 
   1142   1.1    ichiro /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */
   1143   1.1    ichiro Static void
   1144  1.23  christos url_stop(struct ifnet *ifp, int disable)
   1145   1.1    ichiro {
   1146   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1147   1.1    ichiro 	usbd_status err;
   1148   1.1    ichiro 	int i;
   1149   1.5  augustss 
   1150  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1151   1.1    ichiro 
   1152   1.1    ichiro 	ifp->if_timer = 0;
   1153   1.1    ichiro 
   1154   1.1    ichiro 	url_reset(sc);
   1155   1.1    ichiro 
   1156  1.38    dyoung 	callout_stop(&sc->sc_stat_ch);
   1157   1.1    ichiro 
   1158   1.1    ichiro 	/* Stop transfers */
   1159   1.1    ichiro 	/* RX endpoint */
   1160   1.1    ichiro 	if (sc->sc_pipe_rx != NULL) {
   1161   1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_rx);
   1162   1.1    ichiro 		if (err)
   1163   1.1    ichiro 			printf("%s: abort rx pipe failed: %s\n",
   1164  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1165   1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_rx);
   1166   1.1    ichiro 		if (err)
   1167   1.1    ichiro 			printf("%s: close rx pipe failed: %s\n",
   1168  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1169   1.1    ichiro 		sc->sc_pipe_rx = NULL;
   1170   1.1    ichiro 	}
   1171   1.1    ichiro 
   1172   1.1    ichiro 	/* TX endpoint */
   1173   1.1    ichiro 	if (sc->sc_pipe_tx != NULL) {
   1174   1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_tx);
   1175   1.1    ichiro 		if (err)
   1176   1.1    ichiro 			printf("%s: abort tx pipe failed: %s\n",
   1177  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1178   1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_tx);
   1179   1.1    ichiro 		if (err)
   1180   1.1    ichiro 			printf("%s: close tx pipe failed: %s\n",
   1181  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1182   1.1    ichiro 		sc->sc_pipe_tx = NULL;
   1183   1.1    ichiro 	}
   1184   1.1    ichiro 
   1185   1.1    ichiro #if 0
   1186   1.1    ichiro 	/* XXX: Interrupt endpoint is not yet supported!! */
   1187   1.1    ichiro 	/* Interrupt endpoint */
   1188   1.1    ichiro 	if (sc->sc_pipe_intr != NULL) {
   1189   1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_intr);
   1190   1.1    ichiro 		if (err)
   1191   1.1    ichiro 			printf("%s: abort intr pipe failed: %s\n",
   1192  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1193   1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_intr);
   1194   1.1    ichiro 		if (err)
   1195   1.1    ichiro 			printf("%s: close intr pipe failed: %s\n",
   1196  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1197   1.1    ichiro 		sc->sc_pipe_intr = NULL;
   1198   1.1    ichiro 	}
   1199   1.1    ichiro #endif
   1200   1.1    ichiro 
   1201   1.1    ichiro 	/* Free RX resources. */
   1202   1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
   1203   1.1    ichiro 		if (sc->sc_cdata.url_rx_chain[i].url_mbuf != NULL) {
   1204   1.1    ichiro 			m_freem(sc->sc_cdata.url_rx_chain[i].url_mbuf);
   1205   1.1    ichiro 			sc->sc_cdata.url_rx_chain[i].url_mbuf = NULL;
   1206   1.1    ichiro 		}
   1207   1.1    ichiro 		if (sc->sc_cdata.url_rx_chain[i].url_xfer != NULL) {
   1208   1.1    ichiro 			usbd_free_xfer(sc->sc_cdata.url_rx_chain[i].url_xfer);
   1209   1.1    ichiro 			sc->sc_cdata.url_rx_chain[i].url_xfer = NULL;
   1210   1.1    ichiro 		}
   1211   1.1    ichiro 	}
   1212   1.1    ichiro 
   1213   1.1    ichiro 	/* Free TX resources. */
   1214   1.1    ichiro 	for (i = 0; i < URL_TX_LIST_CNT; i++) {
   1215   1.1    ichiro 		if (sc->sc_cdata.url_tx_chain[i].url_mbuf != NULL) {
   1216   1.1    ichiro 			m_freem(sc->sc_cdata.url_tx_chain[i].url_mbuf);
   1217   1.1    ichiro 			sc->sc_cdata.url_tx_chain[i].url_mbuf = NULL;
   1218   1.1    ichiro 		}
   1219   1.1    ichiro 		if (sc->sc_cdata.url_tx_chain[i].url_xfer != NULL) {
   1220   1.1    ichiro 			usbd_free_xfer(sc->sc_cdata.url_tx_chain[i].url_xfer);
   1221   1.1    ichiro 			sc->sc_cdata.url_tx_chain[i].url_xfer = NULL;
   1222   1.1    ichiro 		}
   1223   1.1    ichiro 	}
   1224   1.1    ichiro 
   1225   1.1    ichiro 	sc->sc_link = 0;
   1226   1.1    ichiro 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1227   1.1    ichiro }
   1228   1.1    ichiro 
   1229   1.1    ichiro /* Set media options */
   1230   1.1    ichiro Static int
   1231   1.1    ichiro url_ifmedia_change(struct ifnet *ifp)
   1232   1.1    ichiro {
   1233   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1234   1.1    ichiro 	struct mii_data *mii = GET_MII(sc);
   1235  1.30    dyoung 	int rc;
   1236   1.1    ichiro 
   1237  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1238   1.1    ichiro 
   1239   1.1    ichiro 	if (sc->sc_dying)
   1240   1.1    ichiro 		return (0);
   1241   1.1    ichiro 
   1242   1.1    ichiro 	sc->sc_link = 0;
   1243  1.30    dyoung 	if ((rc = mii_mediachg(mii)) == ENXIO)
   1244  1.30    dyoung 		return 0;
   1245  1.30    dyoung 	return rc;
   1246   1.1    ichiro }
   1247   1.1    ichiro 
   1248   1.1    ichiro /* Report current media status. */
   1249   1.1    ichiro Static void
   1250   1.1    ichiro url_ifmedia_status(struct ifnet *ifp, struct ifmediareq *ifmr)
   1251   1.1    ichiro {
   1252   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1253   1.1    ichiro 
   1254  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1255   1.1    ichiro 
   1256   1.1    ichiro 	if (sc->sc_dying)
   1257   1.1    ichiro 		return;
   1258   1.1    ichiro 
   1259  1.30    dyoung 	ether_mediastatus(ifp, ifmr);
   1260   1.1    ichiro }
   1261   1.1    ichiro 
   1262   1.1    ichiro Static void
   1263   1.1    ichiro url_tick(void *xsc)
   1264   1.1    ichiro {
   1265   1.1    ichiro 	struct url_softc *sc = xsc;
   1266   1.1    ichiro 
   1267   1.1    ichiro 	if (sc == NULL)
   1268   1.1    ichiro 		return;
   1269   1.1    ichiro 
   1270  1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1271   1.4  augustss 			__func__));
   1272   1.1    ichiro 
   1273   1.1    ichiro 	if (sc->sc_dying)
   1274   1.1    ichiro 		return;
   1275   1.1    ichiro 
   1276   1.1    ichiro 	/* Perform periodic stuff in process context */
   1277  1.22     joerg 	usb_add_task(sc->sc_udev, &sc->sc_tick_task, USB_TASKQ_DRIVER);
   1278   1.1    ichiro }
   1279   1.1    ichiro 
   1280   1.1    ichiro Static void
   1281   1.1    ichiro url_tick_task(void *xsc)
   1282   1.1    ichiro {
   1283   1.1    ichiro 	struct url_softc *sc = xsc;
   1284   1.1    ichiro 	struct ifnet *ifp;
   1285   1.1    ichiro 	struct mii_data *mii;
   1286   1.1    ichiro 	int s;
   1287   1.1    ichiro 
   1288   1.1    ichiro 	if (sc == NULL)
   1289   1.1    ichiro 		return;
   1290   1.1    ichiro 
   1291  1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1292   1.4  augustss 			__func__));
   1293   1.1    ichiro 
   1294   1.1    ichiro 	if (sc->sc_dying)
   1295   1.1    ichiro 		return;
   1296   1.1    ichiro 
   1297   1.1    ichiro 	ifp = GET_IFP(sc);
   1298   1.1    ichiro 	mii = GET_MII(sc);
   1299   1.1    ichiro 
   1300   1.1    ichiro 	if (mii == NULL)
   1301   1.1    ichiro 		return;
   1302   1.1    ichiro 
   1303   1.1    ichiro 	s = splnet();
   1304   1.1    ichiro 
   1305   1.1    ichiro 	mii_tick(mii);
   1306   1.1    ichiro 	if (!sc->sc_link) {
   1307   1.1    ichiro 		mii_pollstat(mii);
   1308   1.1    ichiro 		if (mii->mii_media_status & IFM_ACTIVE &&
   1309   1.1    ichiro 		    IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
   1310   1.1    ichiro 			DPRINTF(("%s: %s: got link\n",
   1311  1.38    dyoung 				 device_xname(sc->sc_dev), __func__));
   1312   1.1    ichiro 			sc->sc_link++;
   1313   1.1    ichiro 			if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1314   1.1    ichiro 				   url_start(ifp);
   1315   1.1    ichiro 		}
   1316   1.1    ichiro 	}
   1317   1.1    ichiro 
   1318  1.38    dyoung 	callout_reset(&sc->sc_stat_ch, hz, url_tick, sc);
   1319   1.1    ichiro 
   1320   1.1    ichiro 	splx(s);
   1321   1.1    ichiro }
   1322   1.1    ichiro 
   1323   1.1    ichiro /* Get exclusive access to the MII registers */
   1324   1.1    ichiro Static void
   1325   1.1    ichiro url_lock_mii(struct url_softc *sc)
   1326   1.1    ichiro {
   1327  1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1328   1.4  augustss 			__func__));
   1329   1.1    ichiro 
   1330   1.1    ichiro 	sc->sc_refcnt++;
   1331  1.27   xtraeme 	rw_enter(&sc->sc_mii_rwlock, RW_WRITER);
   1332   1.1    ichiro }
   1333   1.1    ichiro 
   1334   1.1    ichiro Static void
   1335   1.1    ichiro url_unlock_mii(struct url_softc *sc)
   1336   1.1    ichiro {
   1337  1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1338   1.4  augustss 		       __func__));
   1339   1.1    ichiro 
   1340  1.27   xtraeme 	rw_exit(&sc->sc_mii_rwlock);
   1341   1.1    ichiro 	if (--sc->sc_refcnt < 0)
   1342  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
   1343   1.1    ichiro }
   1344   1.1    ichiro 
   1345   1.1    ichiro Static int
   1346  1.38    dyoung url_int_miibus_readreg(device_t dev, int phy, int reg)
   1347   1.1    ichiro {
   1348   1.1    ichiro 	struct url_softc *sc;
   1349   1.1    ichiro 	u_int16_t val;
   1350   1.1    ichiro 
   1351   1.1    ichiro 	if (dev == NULL)
   1352   1.1    ichiro 		return (0);
   1353   1.1    ichiro 
   1354  1.38    dyoung 	sc = device_private(dev);
   1355   1.1    ichiro 
   1356   1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n",
   1357  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg));
   1358   1.1    ichiro 
   1359   1.1    ichiro 	if (sc->sc_dying) {
   1360   1.1    ichiro #ifdef DIAGNOSTIC
   1361  1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1362   1.4  augustss 		       __func__);
   1363   1.1    ichiro #endif
   1364   1.1    ichiro 		return (0);
   1365   1.1    ichiro 	}
   1366   1.1    ichiro 
   1367   1.1    ichiro 	/* XXX: one PHY only for the RTL8150 internal PHY */
   1368   1.1    ichiro 	if (phy != 0) {
   1369   1.1    ichiro 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
   1370  1.38    dyoung 			 device_xname(sc->sc_dev), __func__, phy));
   1371   1.1    ichiro 		return (0);
   1372   1.1    ichiro 	}
   1373   1.1    ichiro 
   1374   1.1    ichiro 	url_lock_mii(sc);
   1375   1.1    ichiro 
   1376   1.1    ichiro 	switch (reg) {
   1377   1.1    ichiro 	case MII_BMCR:		/* Control Register */
   1378   1.1    ichiro 		reg = URL_BMCR;
   1379   1.1    ichiro 		break;
   1380   1.1    ichiro 	case MII_BMSR:		/* Status Register */
   1381   1.1    ichiro 		reg = URL_BMSR;
   1382   1.1    ichiro 		break;
   1383   1.1    ichiro 	case MII_PHYIDR1:
   1384   1.1    ichiro 	case MII_PHYIDR2:
   1385   1.1    ichiro 		val = 0;
   1386   1.1    ichiro 		goto R_DONE;
   1387   1.1    ichiro 		break;
   1388   1.1    ichiro 	case MII_ANAR:		/* Autonegotiation advertisement */
   1389   1.1    ichiro 		reg = URL_ANAR;
   1390   1.1    ichiro 		break;
   1391   1.1    ichiro 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
   1392   1.1    ichiro 		reg = URL_ANLP;
   1393   1.1    ichiro 		break;
   1394   1.1    ichiro 	case URLPHY_MSR:	/* Media Status Register */
   1395   1.1    ichiro 		reg = URL_MSR;
   1396   1.1    ichiro 		break;
   1397   1.1    ichiro 	default:
   1398   1.1    ichiro 		printf("%s: %s: bad register %04x\n",
   1399  1.38    dyoung 		       device_xname(sc->sc_dev), __func__, reg);
   1400   1.1    ichiro 		val = 0;
   1401   1.1    ichiro 		goto R_DONE;
   1402   1.1    ichiro 		break;
   1403   1.1    ichiro 	}
   1404   1.1    ichiro 
   1405   1.1    ichiro 	if (reg == URL_MSR)
   1406   1.1    ichiro 		val = url_csr_read_1(sc, reg);
   1407   1.1    ichiro 	else
   1408   1.1    ichiro 		val = url_csr_read_2(sc, reg);
   1409   1.1    ichiro 
   1410   1.1    ichiro  R_DONE:
   1411   1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
   1412  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, val));
   1413   1.1    ichiro 
   1414   1.1    ichiro 	url_unlock_mii(sc);
   1415   1.1    ichiro 	return (val);
   1416   1.1    ichiro }
   1417   1.1    ichiro 
   1418   1.1    ichiro Static void
   1419  1.38    dyoung url_int_miibus_writereg(device_t dev, int phy, int reg, int data)
   1420   1.1    ichiro {
   1421   1.1    ichiro 	struct url_softc *sc;
   1422   1.1    ichiro 
   1423   1.1    ichiro 	if (dev == NULL)
   1424   1.1    ichiro 		return;
   1425   1.1    ichiro 
   1426  1.38    dyoung 	sc = device_private(dev);
   1427   1.1    ichiro 
   1428   1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
   1429  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, data));
   1430   1.1    ichiro 
   1431   1.1    ichiro 	if (sc->sc_dying) {
   1432   1.1    ichiro #ifdef DIAGNOSTIC
   1433  1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1434   1.4  augustss 		       __func__);
   1435   1.1    ichiro #endif
   1436   1.1    ichiro 		return;
   1437   1.1    ichiro 	}
   1438   1.1    ichiro 
   1439   1.1    ichiro 	/* XXX: one PHY only for the RTL8150 internal PHY */
   1440   1.1    ichiro 	if (phy != 0) {
   1441   1.1    ichiro 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
   1442  1.38    dyoung 			 device_xname(sc->sc_dev), __func__, phy));
   1443   1.1    ichiro 		return;
   1444   1.1    ichiro 	}
   1445   1.1    ichiro 
   1446   1.1    ichiro 	url_lock_mii(sc);
   1447   1.1    ichiro 
   1448   1.1    ichiro 	switch (reg) {
   1449   1.1    ichiro 	case MII_BMCR:		/* Control Register */
   1450   1.1    ichiro 		reg = URL_BMCR;
   1451   1.1    ichiro 		break;
   1452   1.1    ichiro 	case MII_BMSR:		/* Status Register */
   1453   1.1    ichiro 		reg = URL_BMSR;
   1454   1.1    ichiro 		break;
   1455   1.1    ichiro 	case MII_PHYIDR1:
   1456   1.1    ichiro 	case MII_PHYIDR2:
   1457   1.1    ichiro 		goto W_DONE;
   1458   1.1    ichiro 		break;
   1459   1.1    ichiro 	case MII_ANAR:		/* Autonegotiation advertisement */
   1460   1.1    ichiro 		reg = URL_ANAR;
   1461   1.1    ichiro 		break;
   1462   1.1    ichiro 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
   1463   1.1    ichiro 		reg = URL_ANLP;
   1464   1.1    ichiro 		break;
   1465   1.1    ichiro 	case URLPHY_MSR:	/* Media Status Register */
   1466   1.1    ichiro 		reg = URL_MSR;
   1467   1.1    ichiro 		break;
   1468   1.1    ichiro 	default:
   1469   1.1    ichiro 		printf("%s: %s: bad register %04x\n",
   1470  1.38    dyoung 		       device_xname(sc->sc_dev), __func__, reg);
   1471   1.1    ichiro 		goto W_DONE;
   1472   1.1    ichiro 		break;
   1473   1.1    ichiro 	}
   1474   1.1    ichiro 
   1475   1.1    ichiro 	if (reg == URL_MSR)
   1476   1.1    ichiro 		url_csr_write_1(sc, reg, data);
   1477   1.1    ichiro 	else
   1478   1.1    ichiro 		url_csr_write_2(sc, reg, data);
   1479   1.1    ichiro  W_DONE:
   1480   1.1    ichiro 
   1481   1.1    ichiro 	url_unlock_mii(sc);
   1482   1.1    ichiro 	return;
   1483   1.1    ichiro }
   1484   1.1    ichiro 
   1485   1.1    ichiro Static void
   1486  1.38    dyoung url_miibus_statchg(device_t dev)
   1487   1.1    ichiro {
   1488   1.1    ichiro #ifdef URL_DEBUG
   1489   1.1    ichiro 	struct url_softc *sc;
   1490   1.1    ichiro 
   1491   1.1    ichiro 	if (dev == NULL)
   1492   1.1    ichiro 		return;
   1493   1.1    ichiro 
   1494  1.38    dyoung 	sc = device_private(dev);
   1495  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1496   1.1    ichiro #endif
   1497   1.1    ichiro 	/* Nothing to do */
   1498   1.1    ichiro }
   1499   1.1    ichiro 
   1500   1.1    ichiro #if 0
   1501   1.1    ichiro /*
   1502   1.1    ichiro  * external PHYs support, but not test.
   1503   1.1    ichiro  */
   1504   1.1    ichiro Static int
   1505  1.38    dyoung url_ext_miibus_redreg(device_t dev, int phy, int reg)
   1506   1.1    ichiro {
   1507  1.38    dyoung 	struct url_softc *sc = device_private(dev);
   1508   1.1    ichiro 	u_int16_t val;
   1509   1.1    ichiro 
   1510   1.1    ichiro 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n",
   1511  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg));
   1512   1.1    ichiro 
   1513   1.1    ichiro 	if (sc->sc_dying) {
   1514   1.1    ichiro #ifdef DIAGNOSTIC
   1515  1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1516   1.4  augustss 		       __func__);
   1517   1.1    ichiro #endif
   1518   1.1    ichiro 		return (0);
   1519   1.1    ichiro 	}
   1520   1.1    ichiro 
   1521   1.1    ichiro 	url_lock_mii(sc);
   1522   1.1    ichiro 
   1523   1.1    ichiro 	url_csr_write_1(sc, URL_PHYADD, phy & URL_PHYADD_MASK);
   1524   1.1    ichiro 	/*
   1525   1.1    ichiro 	 * RTL8150L will initiate a MII management data transaction
   1526   1.1    ichiro 	 * if PHYCNT_OWN bit is set 1 by software. After transaction,
   1527   1.1    ichiro 	 * this bit is auto cleared by TRL8150L.
   1528   1.1    ichiro 	 */
   1529   1.1    ichiro 	url_csr_write_1(sc, URL_PHYCNT,
   1530   1.1    ichiro 			(reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR);
   1531   1.1    ichiro 	for (i = 0; i < URL_TIMEOUT; i++) {
   1532   1.1    ichiro 		if ((url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0)
   1533   1.1    ichiro 			break;
   1534   1.1    ichiro 	}
   1535   1.1    ichiro 	if (i == URL_TIMEOUT) {
   1536  1.38    dyoung 		printf("%s: MII read timed out\n", device_xname(sc->sc_dev));
   1537   1.1    ichiro 	}
   1538   1.5  augustss 
   1539   1.1    ichiro 	val = url_csr_read_2(sc, URL_PHYDAT);
   1540   1.1    ichiro 
   1541   1.1    ichiro 	DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
   1542  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, val));
   1543   1.1    ichiro 
   1544   1.1    ichiro 	url_unlock_mii(sc);
   1545   1.1    ichiro 	return (val);
   1546   1.1    ichiro }
   1547   1.1    ichiro 
   1548   1.1    ichiro Static void
   1549  1.38    dyoung url_ext_miibus_writereg(device_t dev, int phy, int reg, int data)
   1550   1.1    ichiro {
   1551  1.38    dyoung 	struct url_softc *sc = device_private(dev);
   1552   1.1    ichiro 
   1553   1.1    ichiro 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
   1554  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, data));
   1555   1.1    ichiro 
   1556   1.1    ichiro 	if (sc->sc_dying) {
   1557   1.1    ichiro #ifdef DIAGNOSTIC
   1558  1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1559   1.4  augustss 		       __func__);
   1560   1.1    ichiro #endif
   1561   1.1    ichiro 		return;
   1562   1.1    ichiro 	}
   1563   1.1    ichiro 
   1564   1.1    ichiro 	url_lock_mii(sc);
   1565   1.1    ichiro 
   1566   1.1    ichiro 	url_csr_write_2(sc, URL_PHYDAT, data);
   1567   1.1    ichiro 	url_csr_write_1(sc, URL_PHYADD, phy);
   1568   1.1    ichiro 	url_csr_write_1(sc, URL_PHYCNT, reg | URL_PHYCNT_RWCR);	/* Write */
   1569   1.1    ichiro 
   1570   1.1    ichiro 	for (i=0; i < URL_TIMEOUT; i++) {
   1571   1.1    ichiro 		if (url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN)
   1572   1.1    ichiro 			break;
   1573   1.1    ichiro 	}
   1574   1.1    ichiro 
   1575   1.1    ichiro 	if (i == URL_TIMEOUT) {
   1576   1.1    ichiro 		printf("%s: MII write timed out\n",
   1577  1.38    dyoung 		       device_xname(sc->sc_dev));
   1578   1.1    ichiro 	}
   1579   1.1    ichiro 
   1580   1.1    ichiro 	url_unlock_mii(sc);
   1581   1.1    ichiro 	return;
   1582   1.1    ichiro }
   1583   1.1    ichiro #endif
   1584   1.1    ichiro 
   1585