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if_url.c revision 1.44
      1  1.44      matt /*	$NetBSD: if_url.c,v 1.44 2012/07/22 14:33:06 matt Exp $	*/
      2  1.43       mrg 
      3   1.1    ichiro /*
      4   1.1    ichiro  * Copyright (c) 2001, 2002
      5   1.1    ichiro  *     Shingo WATANABE <nabe (at) nabechan.org>.  All rights reserved.
      6   1.1    ichiro  *
      7   1.1    ichiro  * Redistribution and use in source and binary forms, with or without
      8   1.1    ichiro  * modification, are permitted provided that the following conditions
      9   1.1    ichiro  * are met:
     10   1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     11   1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     12   1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     14   1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     15   1.8   tsutsui  * 3. Neither the name of the author nor the names of any co-contributors
     16   1.1    ichiro  *    may be used to endorse or promote products derived from this software
     17   1.1    ichiro  *    without specific prior written permission.
     18   1.1    ichiro  *
     19   1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     20   1.1    ichiro  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     21   1.1    ichiro  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     22   1.1    ichiro  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     23   1.1    ichiro  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     24   1.1    ichiro  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     25   1.1    ichiro  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26   1.1    ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27   1.1    ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28   1.1    ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29   1.1    ichiro  * SUCH DAMAGE.
     30   1.1    ichiro  *
     31   1.1    ichiro  */
     32   1.1    ichiro 
     33   1.1    ichiro /*
     34   1.1    ichiro  * The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at
     35   1.1    ichiro  *   ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf
     36   1.1    ichiro  *   ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf
     37   1.1    ichiro  */
     38   1.1    ichiro 
     39   1.1    ichiro /*
     40   1.1    ichiro  * TODO:
     41   1.1    ichiro  *	Interrupt Endpoint support
     42   1.1    ichiro  *	External PHYs
     43   1.1    ichiro  *	powerhook() support?
     44   1.1    ichiro  */
     45   1.1    ichiro 
     46   1.1    ichiro #include <sys/cdefs.h>
     47  1.44      matt __KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.44 2012/07/22 14:33:06 matt Exp $");
     48   1.1    ichiro 
     49   1.1    ichiro #include "opt_inet.h"
     50   1.1    ichiro 
     51   1.1    ichiro #include <sys/param.h>
     52   1.1    ichiro #include <sys/systm.h>
     53  1.27   xtraeme #include <sys/rwlock.h>
     54   1.1    ichiro #include <sys/mbuf.h>
     55   1.1    ichiro #include <sys/kernel.h>
     56   1.1    ichiro #include <sys/socket.h>
     57   1.1    ichiro 
     58   1.1    ichiro #include <sys/device.h>
     59   1.1    ichiro #include <sys/rnd.h>
     60   1.1    ichiro 
     61   1.1    ichiro #include <net/if.h>
     62   1.1    ichiro #include <net/if_arp.h>
     63   1.1    ichiro #include <net/if_dl.h>
     64   1.1    ichiro #include <net/if_media.h>
     65   1.1    ichiro 
     66   1.1    ichiro #include <net/bpf.h>
     67   1.1    ichiro 
     68   1.1    ichiro #include <net/if_ether.h>
     69   1.1    ichiro #ifdef INET
     70   1.1    ichiro #include <netinet/in.h>
     71   1.1    ichiro #include <netinet/if_inarp.h>
     72   1.1    ichiro #endif
     73   1.1    ichiro 
     74   1.1    ichiro #include <dev/mii/mii.h>
     75   1.1    ichiro #include <dev/mii/miivar.h>
     76   1.1    ichiro #include <dev/mii/urlphyreg.h>
     77   1.1    ichiro 
     78   1.1    ichiro #include <dev/usb/usb.h>
     79   1.1    ichiro #include <dev/usb/usbdi.h>
     80   1.1    ichiro #include <dev/usb/usbdi_util.h>
     81   1.1    ichiro #include <dev/usb/usbdevs.h>
     82   1.1    ichiro 
     83   1.1    ichiro #include <dev/usb/if_urlreg.h>
     84   1.1    ichiro 
     85   1.1    ichiro 
     86   1.1    ichiro /* Function declarations */
     87  1.38    dyoung int             url_match(device_t, cfdata_t, void *);
     88  1.38    dyoung void            url_attach(device_t, device_t, void *);
     89  1.38    dyoung int             url_detach(device_t, int);
     90  1.38    dyoung int             url_activate(device_t, enum devact);
     91  1.38    dyoung extern struct cfdriver url_cd;
     92  1.38    dyoung CFATTACH_DECL_NEW(url, sizeof(struct url_softc), url_match, url_attach, url_detach, url_activate);
     93   1.1    ichiro 
     94   1.1    ichiro Static int url_openpipes(struct url_softc *);
     95   1.1    ichiro Static int url_rx_list_init(struct url_softc *);
     96   1.1    ichiro Static int url_tx_list_init(struct url_softc *);
     97   1.1    ichiro Static int url_newbuf(struct url_softc *, struct url_chain *, struct mbuf *);
     98   1.1    ichiro Static void url_start(struct ifnet *);
     99   1.1    ichiro Static int url_send(struct url_softc *, struct mbuf *, int);
    100   1.1    ichiro Static void url_txeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
    101   1.1    ichiro Static void url_rxeof(usbd_xfer_handle, usbd_private_handle, usbd_status);
    102   1.1    ichiro Static void url_tick(void *);
    103   1.1    ichiro Static void url_tick_task(void *);
    104  1.25  christos Static int url_ioctl(struct ifnet *, u_long, void *);
    105   1.1    ichiro Static void url_stop_task(struct url_softc *);
    106   1.1    ichiro Static void url_stop(struct ifnet *, int);
    107   1.1    ichiro Static void url_watchdog(struct ifnet *);
    108   1.1    ichiro Static int url_ifmedia_change(struct ifnet *);
    109   1.1    ichiro Static void url_ifmedia_status(struct ifnet *, struct ifmediareq *);
    110   1.1    ichiro Static void url_lock_mii(struct url_softc *);
    111   1.1    ichiro Static void url_unlock_mii(struct url_softc *);
    112  1.38    dyoung Static int url_int_miibus_readreg(device_t, int, int);
    113  1.38    dyoung Static void url_int_miibus_writereg(device_t, int, int, int);
    114  1.44      matt Static void url_miibus_statchg(struct ifnet *);
    115   1.1    ichiro Static int url_init(struct ifnet *);
    116   1.1    ichiro Static void url_setmulti(struct url_softc *);
    117   1.1    ichiro Static void url_reset(struct url_softc *);
    118   1.1    ichiro 
    119   1.1    ichiro Static int url_csr_read_1(struct url_softc *, int);
    120   1.1    ichiro Static int url_csr_read_2(struct url_softc *, int);
    121   1.1    ichiro Static int url_csr_write_1(struct url_softc *, int, int);
    122   1.1    ichiro Static int url_csr_write_2(struct url_softc *, int, int);
    123   1.1    ichiro Static int url_csr_write_4(struct url_softc *, int, int);
    124   1.1    ichiro Static int url_mem(struct url_softc *, int, int, void *, int);
    125   1.1    ichiro 
    126   1.1    ichiro /* Macros */
    127   1.1    ichiro #ifdef URL_DEBUG
    128  1.38    dyoung #define DPRINTF(x)	if (urldebug) printf x
    129  1.38    dyoung #define DPRINTFN(n,x)	if (urldebug >= (n)) printf x
    130   1.2    ichiro int urldebug = 0;
    131   1.1    ichiro #else
    132   1.1    ichiro #define DPRINTF(x)
    133   1.1    ichiro #define DPRINTFN(n,x)
    134   1.1    ichiro #endif
    135   1.1    ichiro 
    136   1.1    ichiro #define	URL_SETBIT(sc, reg, x)	\
    137   1.1    ichiro 	url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) | (x))
    138   1.1    ichiro 
    139   1.1    ichiro #define	URL_SETBIT2(sc, reg, x)	\
    140   1.1    ichiro 	url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) | (x))
    141   1.1    ichiro 
    142   1.1    ichiro #define	URL_CLRBIT(sc, reg, x)	\
    143   1.1    ichiro 	url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) & ~(x))
    144   1.1    ichiro 
    145   1.1    ichiro #define	URL_CLRBIT2(sc, reg, x)	\
    146   1.1    ichiro 	url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) & ~(x))
    147   1.1    ichiro 
    148   1.1    ichiro static const struct url_type {
    149   1.1    ichiro 	struct usb_devno url_dev;
    150   1.1    ichiro 	u_int16_t url_flags;
    151   1.1    ichiro #define URL_EXT_PHY	0x0001
    152   1.1    ichiro } url_devs [] = {
    153   1.1    ichiro 	/* MELCO LUA-KTX */
    154   1.1    ichiro 	{{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0},
    155  1.10   mycroft 	/* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */
    156  1.11  augustss 	{{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0},
    157  1.11  augustss 	/* Longshine LCS-8138TX */
    158  1.11  augustss 	{{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0},
    159  1.11  augustss 	/* Micronet SP128AR */
    160  1.11  augustss 	{{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0},
    161  1.13    itojun 	/* OQO model 01 */
    162  1.13    itojun 	{{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0},
    163   1.1    ichiro };
    164  1.17  christos #define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p))
    165   1.1    ichiro 
    166   1.1    ichiro 
    167   1.1    ichiro /* Probe */
    168  1.40  jakllsch int
    169  1.38    dyoung url_match(device_t parent, cfdata_t match, void *aux)
    170   1.1    ichiro {
    171  1.38    dyoung 	struct usb_attach_arg *uaa = aux;
    172   1.1    ichiro 
    173   1.1    ichiro 	return (url_lookup(uaa->vendor, uaa->product) != NULL ?
    174   1.1    ichiro 		UMATCH_VENDOR_PRODUCT : UMATCH_NONE);
    175   1.1    ichiro }
    176   1.1    ichiro /* Attach */
    177  1.40  jakllsch void
    178  1.38    dyoung url_attach(device_t parent, device_t self, void *aux)
    179   1.1    ichiro {
    180  1.38    dyoung 	struct url_softc *sc = device_private(self);
    181  1.38    dyoung 	struct usb_attach_arg *uaa = aux;
    182   1.1    ichiro 	usbd_device_handle dev = uaa->device;
    183   1.1    ichiro 	usbd_interface_handle iface;
    184   1.1    ichiro 	usbd_status err;
    185   1.1    ichiro 	usb_interface_descriptor_t *id;
    186   1.1    ichiro 	usb_endpoint_descriptor_t *ed;
    187  1.16  augustss 	char *devinfop;
    188   1.1    ichiro 	struct ifnet *ifp;
    189   1.1    ichiro 	struct mii_data *mii;
    190   1.1    ichiro 	u_char eaddr[ETHER_ADDR_LEN];
    191   1.1    ichiro 	int i, s;
    192   1.1    ichiro 
    193  1.32      cube 	sc->sc_dev = self;
    194  1.32      cube 
    195  1.34    plunky 	aprint_naive("\n");
    196  1.34    plunky 	aprint_normal("\n");
    197  1.34    plunky 
    198  1.16  augustss 	devinfop = usbd_devinfo_alloc(dev, 0);
    199  1.32      cube 	aprint_normal_dev(self, "%s\n", devinfop);
    200  1.16  augustss 	usbd_devinfo_free(devinfop);
    201   1.1    ichiro 
    202   1.1    ichiro 	/* Move the device into the configured state. */
    203   1.1    ichiro 	err = usbd_set_config_no(dev, URL_CONFIG_NO, 1);
    204   1.1    ichiro 	if (err) {
    205  1.32      cube 		aprint_error_dev(self, "setting config no failed\n");
    206   1.1    ichiro 		goto bad;
    207   1.1    ichiro 	}
    208   1.1    ichiro 
    209   1.1    ichiro 	usb_init_task(&sc->sc_tick_task, url_tick_task, sc);
    210  1.27   xtraeme 	rw_init(&sc->sc_mii_rwlock);
    211   1.1    ichiro 	usb_init_task(&sc->sc_stop_task, (void (*)(void *)) url_stop_task, sc);
    212   1.1    ichiro 
    213   1.1    ichiro 	/* get control interface */
    214   1.1    ichiro 	err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface);
    215   1.1    ichiro 	if (err) {
    216  1.32      cube 		aprint_error_dev(self, "failed to get interface, err=%s\n",
    217   1.1    ichiro 		       usbd_errstr(err));
    218   1.1    ichiro 		goto bad;
    219   1.1    ichiro 	}
    220   1.1    ichiro 
    221   1.1    ichiro 	sc->sc_udev = dev;
    222   1.1    ichiro 	sc->sc_ctl_iface = iface;
    223   1.1    ichiro 	sc->sc_flags = url_lookup(uaa->vendor, uaa->product)->url_flags;
    224   1.1    ichiro 
    225   1.1    ichiro 	/* get interface descriptor */
    226   1.1    ichiro 	id = usbd_get_interface_descriptor(sc->sc_ctl_iface);
    227   1.1    ichiro 
    228   1.1    ichiro 	/* find endpoints */
    229   1.1    ichiro 	sc->sc_bulkin_no = sc->sc_bulkout_no = sc->sc_intrin_no = -1;
    230   1.1    ichiro 	for (i = 0; i < id->bNumEndpoints; i++) {
    231   1.1    ichiro 		ed = usbd_interface2endpoint_descriptor(sc->sc_ctl_iface, i);
    232   1.1    ichiro 		if (ed == NULL) {
    233  1.32      cube 			aprint_error_dev(self,
    234  1.32      cube 			    "couldn't get endpoint %d\n", i);
    235   1.1    ichiro 			goto bad;
    236   1.1    ichiro 		}
    237   1.1    ichiro 		if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
    238   1.1    ichiro 		    UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
    239   1.1    ichiro 			sc->sc_bulkin_no = ed->bEndpointAddress; /* RX */
    240   1.1    ichiro 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
    241   1.1    ichiro 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT)
    242   1.1    ichiro 			sc->sc_bulkout_no = ed->bEndpointAddress; /* TX */
    243   1.1    ichiro 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT &&
    244   1.1    ichiro 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
    245   1.1    ichiro 			sc->sc_intrin_no = ed->bEndpointAddress; /* Status */
    246   1.1    ichiro 	}
    247   1.1    ichiro 
    248   1.1    ichiro 	if (sc->sc_bulkin_no == -1 || sc->sc_bulkout_no == -1 ||
    249   1.1    ichiro 	    sc->sc_intrin_no == -1) {
    250  1.32      cube 		aprint_error_dev(self, "missing endpoint\n");
    251   1.1    ichiro 		goto bad;
    252   1.1    ichiro 	}
    253   1.1    ichiro 
    254   1.1    ichiro 	s = splnet();
    255   1.1    ichiro 
    256   1.1    ichiro 	/* reset the adapter */
    257   1.1    ichiro 	url_reset(sc);
    258   1.1    ichiro 
    259   1.1    ichiro 	/* Get Ethernet Address */
    260   1.1    ichiro 	err = url_mem(sc, URL_CMD_READMEM, URL_IDR0, (void *)eaddr,
    261   1.1    ichiro 		      ETHER_ADDR_LEN);
    262   1.1    ichiro 	if (err) {
    263  1.32      cube 		aprint_error_dev(self, "read MAC address failed\n");
    264   1.1    ichiro 		splx(s);
    265   1.1    ichiro 		goto bad;
    266   1.1    ichiro 	}
    267   1.1    ichiro 
    268   1.1    ichiro 	/* Print Ethernet Address */
    269  1.32      cube 	aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(eaddr));
    270   1.1    ichiro 
    271  1.19       wiz 	/* initialize interface information */
    272   1.1    ichiro 	ifp = GET_IFP(sc);
    273   1.1    ichiro 	ifp->if_softc = sc;
    274   1.3  augustss 	ifp->if_mtu = ETHERMTU;
    275  1.32      cube 	strncpy(ifp->if_xname, device_xname(self), IFNAMSIZ);
    276   1.1    ichiro 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
    277   1.1    ichiro 	ifp->if_start = url_start;
    278   1.1    ichiro 	ifp->if_ioctl = url_ioctl;
    279   1.1    ichiro 	ifp->if_watchdog = url_watchdog;
    280   1.1    ichiro 	ifp->if_init = url_init;
    281   1.1    ichiro 	ifp->if_stop = url_stop;
    282   1.1    ichiro 
    283   1.1    ichiro 	IFQ_SET_READY(&ifp->if_snd);
    284   1.1    ichiro 
    285   1.1    ichiro 	/*
    286   1.1    ichiro 	 * Do ifmedia setup.
    287   1.1    ichiro 	 */
    288   1.1    ichiro 	mii = &sc->sc_mii;
    289   1.1    ichiro 	mii->mii_ifp = ifp;
    290   1.1    ichiro 	mii->mii_readreg = url_int_miibus_readreg;
    291   1.1    ichiro 	mii->mii_writereg = url_int_miibus_writereg;
    292   1.1    ichiro #if 0
    293   1.1    ichiro 	if (sc->sc_flags & URL_EXT_PHY) {
    294   1.1    ichiro 		mii->mii_readreg = url_ext_miibus_readreg;
    295   1.1    ichiro 		mii->mii_writereg = url_ext_miibus_writereg;
    296   1.1    ichiro 	}
    297   1.1    ichiro #endif
    298   1.1    ichiro 	mii->mii_statchg = url_miibus_statchg;
    299   1.1    ichiro 	mii->mii_flags = MIIF_AUTOTSLEEP;
    300  1.30    dyoung 	sc->sc_ec.ec_mii = mii;
    301   1.1    ichiro 	ifmedia_init(&mii->mii_media, 0,
    302   1.1    ichiro 		     url_ifmedia_change, url_ifmedia_status);
    303   1.1    ichiro 	mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
    304   1.1    ichiro 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
    305   1.1    ichiro 		ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
    306   1.1    ichiro 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
    307   1.1    ichiro 	} else
    308   1.1    ichiro 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
    309   1.1    ichiro 
    310   1.1    ichiro 	/* attach the interface */
    311   1.1    ichiro 	if_attach(ifp);
    312  1.38    dyoung 	ether_ifattach(ifp, eaddr);
    313   1.1    ichiro 
    314  1.32      cube 	rnd_attach_source(&sc->rnd_source, device_xname(self),
    315  1.32      cube 	    RND_TYPE_NET, 0);
    316   1.1    ichiro 
    317  1.38    dyoung 	callout_init(&sc->sc_stat_ch, 0);
    318   1.1    ichiro 	sc->sc_attached = 1;
    319   1.1    ichiro 	splx(s);
    320   1.1    ichiro 
    321  1.38    dyoung 	usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, dev, sc->sc_dev);
    322   1.1    ichiro 
    323  1.38    dyoung 	return;
    324   1.1    ichiro 
    325   1.1    ichiro  bad:
    326   1.1    ichiro 	sc->sc_dying = 1;
    327  1.38    dyoung 	return;
    328   1.1    ichiro }
    329   1.1    ichiro 
    330   1.1    ichiro /* detach */
    331  1.40  jakllsch int
    332  1.38    dyoung url_detach(device_t self, int flags)
    333   1.1    ichiro {
    334  1.38    dyoung 	struct url_softc *sc = device_private(self);
    335   1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    336   1.1    ichiro 	int s;
    337   1.1    ichiro 
    338  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    339   1.1    ichiro 
    340   1.1    ichiro 	/* Detached before attached finished */
    341   1.1    ichiro 	if (!sc->sc_attached)
    342   1.1    ichiro 		return (0);
    343   1.1    ichiro 
    344  1.38    dyoung 	callout_stop(&sc->sc_stat_ch);
    345   1.1    ichiro 
    346   1.1    ichiro 	/* Remove any pending tasks */
    347   1.1    ichiro 	usb_rem_task(sc->sc_udev, &sc->sc_tick_task);
    348   1.1    ichiro 	usb_rem_task(sc->sc_udev, &sc->sc_stop_task);
    349   1.1    ichiro 
    350   1.1    ichiro 	s = splusb();
    351   1.1    ichiro 
    352   1.1    ichiro 	if (--sc->sc_refcnt >= 0) {
    353   1.1    ichiro 		/* Wait for processes to go away */
    354  1.42       mrg 		usb_detach_waitold(sc->sc_dev);
    355   1.1    ichiro 	}
    356   1.1    ichiro 
    357   1.1    ichiro 	if (ifp->if_flags & IFF_RUNNING)
    358   1.1    ichiro 		url_stop(GET_IFP(sc), 1);
    359   1.1    ichiro 
    360   1.1    ichiro 	rnd_detach_source(&sc->rnd_source);
    361   1.1    ichiro 	mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
    362   1.1    ichiro 	ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
    363   1.1    ichiro 	ether_ifdetach(ifp);
    364   1.1    ichiro 	if_detach(ifp);
    365   1.1    ichiro 
    366   1.1    ichiro #ifdef DIAGNOSTIC
    367   1.1    ichiro 	if (sc->sc_pipe_tx != NULL)
    368  1.32      cube 		aprint_debug_dev(self, "detach has active tx endpoint.\n");
    369   1.1    ichiro 	if (sc->sc_pipe_rx != NULL)
    370  1.32      cube 		aprint_debug_dev(self, "detach has active rx endpoint.\n");
    371   1.1    ichiro 	if (sc->sc_pipe_intr != NULL)
    372  1.32      cube 		aprint_debug_dev(self, "detach has active intr endpoint.\n");
    373   1.1    ichiro #endif
    374   1.1    ichiro 
    375   1.1    ichiro 	sc->sc_attached = 0;
    376   1.1    ichiro 
    377   1.1    ichiro 	splx(s);
    378   1.1    ichiro 
    379  1.28   xtraeme 	rw_destroy(&sc->sc_mii_rwlock);
    380   1.1    ichiro 	usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev,
    381  1.38    dyoung 			   sc->sc_dev);
    382   1.1    ichiro 
    383   1.1    ichiro 	return (0);
    384   1.1    ichiro }
    385   1.1    ichiro 
    386   1.1    ichiro /* read/write memory */
    387   1.1    ichiro Static int
    388   1.1    ichiro url_mem(struct url_softc *sc, int cmd, int offset, void *buf, int len)
    389   1.1    ichiro {
    390   1.1    ichiro 	usb_device_request_t req;
    391   1.1    ichiro 	usbd_status err;
    392   1.1    ichiro 
    393   1.1    ichiro 	if (sc == NULL)
    394   1.1    ichiro 		return (0);
    395   1.1    ichiro 
    396   1.1    ichiro 	DPRINTFN(0x200,
    397  1.38    dyoung 		("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    398   1.1    ichiro 
    399   1.1    ichiro 	if (sc->sc_dying)
    400   1.1    ichiro 		return (0);
    401   1.1    ichiro 
    402   1.1    ichiro 	if (cmd == URL_CMD_READMEM)
    403   1.1    ichiro 		req.bmRequestType = UT_READ_VENDOR_DEVICE;
    404   1.1    ichiro 	else
    405   1.1    ichiro 		req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
    406   1.1    ichiro 	req.bRequest = URL_REQ_MEM;
    407   1.1    ichiro 	USETW(req.wValue, offset);
    408   1.1    ichiro 	USETW(req.wIndex, 0x0000);
    409   1.1    ichiro 	USETW(req.wLength, len);
    410   1.1    ichiro 
    411   1.1    ichiro 	sc->sc_refcnt++;
    412   1.1    ichiro 	err = usbd_do_request(sc->sc_udev, &req, buf);
    413   1.1    ichiro 	if (--sc->sc_refcnt < 0)
    414  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
    415   1.1    ichiro 	if (err) {
    416   1.1    ichiro 		DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n",
    417  1.38    dyoung 			 device_xname(sc->sc_dev),
    418   1.1    ichiro 			 cmd == URL_CMD_READMEM ? "read" : "write",
    419   1.1    ichiro 			 offset, err));
    420   1.5  augustss 	}
    421   1.1    ichiro 
    422   1.1    ichiro 	return (err);
    423   1.1    ichiro }
    424   1.1    ichiro 
    425   1.1    ichiro /* read 1byte from register */
    426   1.1    ichiro Static int
    427   1.1    ichiro url_csr_read_1(struct url_softc *sc, int reg)
    428   1.1    ichiro {
    429   1.1    ichiro 	u_int8_t val = 0;
    430   1.1    ichiro 
    431   1.1    ichiro 	DPRINTFN(0x100,
    432  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    433   1.1    ichiro 
    434   1.1    ichiro 	if (sc->sc_dying)
    435   1.1    ichiro 		return (0);
    436   1.5  augustss 
    437   1.1    ichiro 	return (url_mem(sc, URL_CMD_READMEM, reg, &val, 1) ? 0 : val);
    438   1.1    ichiro }
    439   1.1    ichiro 
    440   1.1    ichiro /* read 2bytes from register */
    441   1.1    ichiro Static int
    442   1.1    ichiro url_csr_read_2(struct url_softc *sc, int reg)
    443   1.1    ichiro {
    444   1.1    ichiro 	uWord val;
    445   1.1    ichiro 
    446   1.1    ichiro 	DPRINTFN(0x100,
    447  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    448   1.1    ichiro 
    449   1.1    ichiro 	if (sc->sc_dying)
    450   1.1    ichiro 		return (0);
    451   1.5  augustss 
    452   1.1    ichiro 	USETW(val, 0);
    453   1.1    ichiro 	return (url_mem(sc, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val));
    454   1.1    ichiro }
    455   1.1    ichiro 
    456   1.1    ichiro /* write 1byte to register */
    457   1.1    ichiro Static int
    458   1.1    ichiro url_csr_write_1(struct url_softc *sc, int reg, int aval)
    459   1.1    ichiro {
    460   1.1    ichiro 	u_int8_t val = aval;
    461   1.1    ichiro 
    462   1.1    ichiro 	DPRINTFN(0x100,
    463  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    464   1.1    ichiro 
    465   1.1    ichiro 	if (sc->sc_dying)
    466   1.1    ichiro 		return (0);
    467   1.5  augustss 
    468   1.1    ichiro 	return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0);
    469   1.1    ichiro }
    470   1.1    ichiro 
    471   1.1    ichiro /* write 2bytes to register */
    472   1.1    ichiro Static int
    473   1.1    ichiro url_csr_write_2(struct url_softc *sc, int reg, int aval)
    474   1.1    ichiro {
    475   1.1    ichiro 	uWord val;
    476   1.1    ichiro 
    477   1.1    ichiro 	DPRINTFN(0x100,
    478  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    479   1.1    ichiro 
    480   1.1    ichiro 	USETW(val, aval);
    481   1.1    ichiro 
    482   1.1    ichiro 	if (sc->sc_dying)
    483   1.1    ichiro 		return (0);
    484   1.5  augustss 
    485   1.1    ichiro 	return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0);
    486   1.1    ichiro }
    487   1.1    ichiro 
    488   1.1    ichiro /* write 4bytes to register */
    489   1.1    ichiro Static int
    490   1.1    ichiro url_csr_write_4(struct url_softc *sc, int reg, int aval)
    491   1.1    ichiro {
    492   1.1    ichiro 	uDWord val;
    493   1.1    ichiro 
    494   1.1    ichiro 	DPRINTFN(0x100,
    495  1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    496   1.1    ichiro 
    497   1.1    ichiro 	USETDW(val, aval);
    498   1.1    ichiro 
    499   1.1    ichiro 	if (sc->sc_dying)
    500   1.1    ichiro 		return (0);
    501   1.5  augustss 
    502   1.1    ichiro 	return (url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0);
    503   1.1    ichiro }
    504   1.1    ichiro 
    505   1.1    ichiro Static int
    506   1.1    ichiro url_init(struct ifnet *ifp)
    507   1.1    ichiro {
    508   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
    509   1.1    ichiro 	struct mii_data *mii = GET_MII(sc);
    510  1.29    dyoung 	const u_char *eaddr;
    511  1.30    dyoung 	int i, rc, s;
    512   1.1    ichiro 
    513  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    514   1.5  augustss 
    515   1.1    ichiro 	if (sc->sc_dying)
    516   1.1    ichiro 		return (EIO);
    517   1.1    ichiro 
    518   1.1    ichiro 	s = splnet();
    519   1.1    ichiro 
    520   1.1    ichiro 	/* Cancel pending I/O and free all TX/RX buffers */
    521   1.1    ichiro 	url_stop(ifp, 1);
    522   1.1    ichiro 
    523  1.29    dyoung 	eaddr = CLLADDR(ifp->if_sadl);
    524   1.1    ichiro 	for (i = 0; i < ETHER_ADDR_LEN; i++)
    525   1.1    ichiro 		url_csr_write_1(sc, URL_IDR0 + i, eaddr[i]);
    526   1.1    ichiro 
    527   1.1    ichiro 	/* Init transmission control register */
    528   1.1    ichiro 	URL_CLRBIT(sc, URL_TCR,
    529   1.1    ichiro 		   URL_TCR_TXRR1 | URL_TCR_TXRR0 |
    530   1.1    ichiro 		   URL_TCR_IFG1 | URL_TCR_IFG0 |
    531   1.1    ichiro 		   URL_TCR_NOCRC);
    532   1.1    ichiro 
    533   1.1    ichiro 	/* Init receive control register */
    534   1.1    ichiro 	URL_SETBIT2(sc, URL_RCR, URL_RCR_TAIL | URL_RCR_AD);
    535   1.1    ichiro 	if (ifp->if_flags & IFF_BROADCAST)
    536   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AB);
    537   1.1    ichiro 	else
    538   1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AB);
    539   1.1    ichiro 
    540   1.1    ichiro 	/* If we want promiscuous mode, accept all physical frames. */
    541   1.1    ichiro 	if (ifp->if_flags & IFF_PROMISC)
    542   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    543   1.1    ichiro 	else
    544   1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    545   1.1    ichiro 
    546   1.5  augustss 
    547   1.1    ichiro 	/* Initialize transmit ring */
    548   1.1    ichiro 	if (url_tx_list_init(sc) == ENOBUFS) {
    549  1.38    dyoung 		printf("%s: tx list init failed\n", device_xname(sc->sc_dev));
    550   1.1    ichiro 		splx(s);
    551   1.1    ichiro 		return (EIO);
    552   1.1    ichiro 	}
    553   1.1    ichiro 
    554   1.1    ichiro 	/* Initialize receive ring */
    555   1.1    ichiro 	if (url_rx_list_init(sc) == ENOBUFS) {
    556  1.38    dyoung 		printf("%s: rx list init failed\n", device_xname(sc->sc_dev));
    557   1.1    ichiro 		splx(s);
    558   1.1    ichiro 		return (EIO);
    559   1.1    ichiro 	}
    560   1.1    ichiro 
    561   1.1    ichiro 	/* Load the multicast filter */
    562   1.1    ichiro 	url_setmulti(sc);
    563   1.1    ichiro 
    564   1.1    ichiro 	/* Enable RX and TX */
    565   1.1    ichiro 	URL_SETBIT(sc, URL_CR, URL_CR_TE | URL_CR_RE);
    566   1.1    ichiro 
    567  1.30    dyoung 	if ((rc = mii_mediachg(mii)) == ENXIO)
    568  1.30    dyoung 		rc = 0;
    569  1.30    dyoung 	else if (rc != 0)
    570  1.30    dyoung 		goto out;
    571   1.1    ichiro 
    572   1.1    ichiro 	if (sc->sc_pipe_tx == NULL || sc->sc_pipe_rx == NULL) {
    573   1.1    ichiro 		if (url_openpipes(sc)) {
    574   1.1    ichiro 			splx(s);
    575   1.1    ichiro 			return (EIO);
    576   1.1    ichiro 		}
    577   1.1    ichiro 	}
    578   1.1    ichiro 
    579   1.1    ichiro 	ifp->if_flags |= IFF_RUNNING;
    580   1.1    ichiro 	ifp->if_flags &= ~IFF_OACTIVE;
    581   1.1    ichiro 
    582  1.38    dyoung 	callout_reset(&sc->sc_stat_ch, hz, url_tick, sc);
    583   1.1    ichiro 
    584  1.30    dyoung out:
    585  1.30    dyoung 	splx(s);
    586  1.30    dyoung 	return rc;
    587   1.1    ichiro }
    588   1.1    ichiro 
    589   1.1    ichiro Static void
    590   1.1    ichiro url_reset(struct url_softc *sc)
    591   1.1    ichiro {
    592   1.1    ichiro 	int i;
    593   1.5  augustss 
    594  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    595   1.1    ichiro 
    596   1.1    ichiro 	if (sc->sc_dying)
    597   1.1    ichiro 		return;
    598   1.1    ichiro 
    599   1.1    ichiro 	URL_SETBIT(sc, URL_CR, URL_CR_SOFT_RST);
    600   1.1    ichiro 
    601   1.1    ichiro 	for (i = 0; i < URL_TX_TIMEOUT; i++) {
    602   1.1    ichiro 		if (!(url_csr_read_1(sc, URL_CR) & URL_CR_SOFT_RST))
    603   1.1    ichiro 			break;
    604   1.1    ichiro 		delay(10);	/* XXX */
    605   1.1    ichiro 	}
    606   1.1    ichiro 
    607   1.1    ichiro 	delay(10000);		/* XXX */
    608   1.1    ichiro }
    609   1.1    ichiro 
    610   1.1    ichiro int
    611  1.38    dyoung url_activate(device_t self, enum devact act)
    612   1.1    ichiro {
    613  1.32      cube 	struct url_softc *sc = device_private(self);
    614   1.1    ichiro 
    615  1.38    dyoung 	DPRINTF(("%s: %s: enter, act=%d\n", device_xname(sc->sc_dev),
    616   1.4  augustss 		 __func__, act));
    617   1.1    ichiro 
    618   1.1    ichiro 	switch (act) {
    619   1.1    ichiro 	case DVACT_DEACTIVATE:
    620   1.1    ichiro 		if_deactivate(&sc->sc_ec.ec_if);
    621   1.1    ichiro 		sc->sc_dying = 1;
    622  1.35    dyoung 		return 0;
    623  1.35    dyoung 	default:
    624  1.35    dyoung 		return EOPNOTSUPP;
    625   1.1    ichiro 	}
    626   1.1    ichiro }
    627   1.1    ichiro 
    628   1.1    ichiro #define url_calchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) >> 26)
    629   1.1    ichiro 
    630   1.1    ichiro 
    631   1.1    ichiro Static void
    632   1.1    ichiro url_setmulti(struct url_softc *sc)
    633   1.1    ichiro {
    634   1.1    ichiro 	struct ifnet *ifp;
    635   1.1    ichiro 	struct ether_multi *enm;
    636   1.1    ichiro 	struct ether_multistep step;
    637   1.1    ichiro 	u_int32_t hashes[2] = { 0, 0 };
    638   1.1    ichiro 	int h = 0;
    639   1.1    ichiro 	int mcnt = 0;
    640   1.1    ichiro 
    641  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    642   1.1    ichiro 
    643   1.1    ichiro 	if (sc->sc_dying)
    644   1.1    ichiro 		return;
    645   1.1    ichiro 
    646   1.1    ichiro 	ifp = GET_IFP(sc);
    647   1.1    ichiro 
    648   1.1    ichiro 	if (ifp->if_flags & IFF_PROMISC) {
    649   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    650   1.1    ichiro 		return;
    651   1.1    ichiro 	} else if (ifp->if_flags & IFF_ALLMULTI) {
    652   1.1    ichiro 	allmulti:
    653   1.1    ichiro 		ifp->if_flags |= IFF_ALLMULTI;
    654   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM);
    655   1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAP);
    656   1.1    ichiro 		return;
    657   1.1    ichiro 	}
    658   1.1    ichiro 
    659   1.1    ichiro 	/* first, zot all the existing hash bits */
    660   1.1    ichiro 	url_csr_write_4(sc, URL_MAR0, 0);
    661   1.1    ichiro 	url_csr_write_4(sc, URL_MAR4, 0);
    662   1.1    ichiro 
    663   1.1    ichiro 	/* now program new ones */
    664   1.1    ichiro 	ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
    665   1.1    ichiro 	while (enm != NULL) {
    666   1.1    ichiro 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
    667   1.1    ichiro 			   ETHER_ADDR_LEN) != 0)
    668   1.1    ichiro 			goto allmulti;
    669   1.1    ichiro 
    670   1.1    ichiro 		h = url_calchash(enm->enm_addrlo);
    671   1.1    ichiro 		if (h < 32)
    672   1.1    ichiro 			hashes[0] |= (1 << h);
    673   1.1    ichiro 		else
    674   1.1    ichiro 			hashes[1] |= (1 << (h -32));
    675   1.1    ichiro 		mcnt++;
    676   1.1    ichiro 		ETHER_NEXT_MULTI(step, enm);
    677   1.1    ichiro 	}
    678   1.1    ichiro 
    679   1.1    ichiro 	ifp->if_flags &= ~IFF_ALLMULTI;
    680   1.1    ichiro 
    681   1.1    ichiro 	URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    682   1.1    ichiro 
    683   1.1    ichiro 	if (mcnt){
    684   1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AM);
    685   1.1    ichiro 	} else {
    686   1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AM);
    687   1.1    ichiro 	}
    688   1.1    ichiro 	url_csr_write_4(sc, URL_MAR0, hashes[0]);
    689   1.1    ichiro 	url_csr_write_4(sc, URL_MAR4, hashes[1]);
    690   1.1    ichiro }
    691   1.1    ichiro 
    692   1.1    ichiro Static int
    693   1.1    ichiro url_openpipes(struct url_softc *sc)
    694   1.1    ichiro {
    695   1.1    ichiro 	struct url_chain *c;
    696   1.1    ichiro 	usbd_status err;
    697   1.1    ichiro 	int i;
    698   1.1    ichiro 	int error = 0;
    699   1.1    ichiro 
    700   1.1    ichiro 	if (sc->sc_dying)
    701   1.1    ichiro 		return (EIO);
    702   1.5  augustss 
    703   1.1    ichiro 	sc->sc_refcnt++;
    704   1.1    ichiro 
    705   1.1    ichiro 	/* Open RX pipe */
    706   1.1    ichiro 	err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkin_no,
    707   1.1    ichiro 			     USBD_EXCLUSIVE_USE, &sc->sc_pipe_rx);
    708   1.1    ichiro 	if (err) {
    709   1.1    ichiro 		printf("%s: open rx pipe failed: %s\n",
    710  1.38    dyoung 		       device_xname(sc->sc_dev), usbd_errstr(err));
    711   1.1    ichiro 		error = EIO;
    712   1.1    ichiro 		goto done;
    713   1.1    ichiro 	}
    714   1.5  augustss 
    715   1.1    ichiro 	/* Open TX pipe */
    716   1.1    ichiro 	err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkout_no,
    717   1.1    ichiro 			     USBD_EXCLUSIVE_USE, &sc->sc_pipe_tx);
    718   1.1    ichiro 	if (err) {
    719   1.1    ichiro 		printf("%s: open tx pipe failed: %s\n",
    720  1.38    dyoung 		       device_xname(sc->sc_dev), usbd_errstr(err));
    721   1.1    ichiro 		error = EIO;
    722   1.1    ichiro 		goto done;
    723   1.1    ichiro 	}
    724   1.1    ichiro 
    725   1.1    ichiro #if 0
    726   1.1    ichiro 	/* XXX: interrupt endpoint is not yet supported */
    727   1.1    ichiro 	/* Open Interrupt pipe */
    728   1.1    ichiro 	err = usbd_open_pipe_intr(sc->sc_ctl_iface, sc->sc_intrin_no,
    729   1.1    ichiro 				  USBD_EXCLUSIVE_USE, &sc->sc_pipe_intr, sc,
    730   1.1    ichiro 				  &sc->sc_cdata.url_ibuf, URL_INTR_PKGLEN,
    731  1.24  drochner 				  url_intr, USBD_DEFAULT_INTERVAL);
    732   1.1    ichiro 	if (err) {
    733   1.1    ichiro 		printf("%s: open intr pipe failed: %s\n",
    734  1.38    dyoung 		       device_xname(sc->sc_dev), usbd_errstr(err));
    735   1.1    ichiro 		error = EIO;
    736   1.1    ichiro 		goto done;
    737   1.1    ichiro 	}
    738   1.1    ichiro #endif
    739   1.1    ichiro 
    740   1.1    ichiro 
    741   1.1    ichiro 	/* Start up the receive pipe. */
    742   1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
    743   1.1    ichiro 		c = &sc->sc_cdata.url_rx_chain[i];
    744   1.1    ichiro 		usbd_setup_xfer(c->url_xfer, sc->sc_pipe_rx,
    745   1.1    ichiro 				c, c->url_buf, URL_BUFSZ,
    746   1.1    ichiro 				USBD_SHORT_XFER_OK | USBD_NO_COPY,
    747   1.1    ichiro 				USBD_NO_TIMEOUT, url_rxeof);
    748   1.1    ichiro 		(void)usbd_transfer(c->url_xfer);
    749  1.38    dyoung 		DPRINTF(("%s: %s: start read\n", device_xname(sc->sc_dev),
    750   1.4  augustss 			 __func__));
    751   1.1    ichiro 	}
    752   1.1    ichiro 
    753   1.1    ichiro  done:
    754   1.1    ichiro 	if (--sc->sc_refcnt < 0)
    755  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
    756   1.5  augustss 
    757   1.1    ichiro 	return (error);
    758   1.1    ichiro }
    759   1.1    ichiro 
    760   1.1    ichiro Static int
    761   1.1    ichiro url_newbuf(struct url_softc *sc, struct url_chain *c, struct mbuf *m)
    762   1.1    ichiro {
    763   1.1    ichiro 	struct mbuf *m_new = NULL;
    764   1.1    ichiro 
    765  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    766   1.1    ichiro 
    767   1.1    ichiro 	if (m == NULL) {
    768   1.1    ichiro 		MGETHDR(m_new, M_DONTWAIT, MT_DATA);
    769   1.1    ichiro 		if (m_new == NULL) {
    770   1.1    ichiro 			printf("%s: no memory for rx list "
    771  1.38    dyoung 			       "-- packet dropped!\n", device_xname(sc->sc_dev));
    772   1.1    ichiro 			return (ENOBUFS);
    773   1.1    ichiro 		}
    774   1.1    ichiro 		MCLGET(m_new, M_DONTWAIT);
    775   1.1    ichiro 		if (!(m_new->m_flags & M_EXT)) {
    776   1.1    ichiro 			printf("%s: no memory for rx list "
    777  1.38    dyoung 			       "-- packet dropped!\n", device_xname(sc->sc_dev));
    778   1.1    ichiro 			m_freem(m_new);
    779   1.1    ichiro 			return (ENOBUFS);
    780   1.1    ichiro 		}
    781   1.1    ichiro 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
    782   1.1    ichiro 	} else {
    783   1.1    ichiro 		m_new = m;
    784   1.1    ichiro 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
    785   1.1    ichiro 		m_new->m_data = m_new->m_ext.ext_buf;
    786   1.1    ichiro 	}
    787   1.1    ichiro 
    788   1.1    ichiro 	m_adj(m_new, ETHER_ALIGN);
    789   1.1    ichiro 	c->url_mbuf = m_new;
    790   1.1    ichiro 
    791   1.1    ichiro 	return (0);
    792   1.1    ichiro }
    793   1.5  augustss 
    794   1.1    ichiro 
    795   1.1    ichiro Static int
    796   1.1    ichiro url_rx_list_init(struct url_softc *sc)
    797   1.1    ichiro {
    798   1.1    ichiro 	struct url_cdata *cd;
    799   1.1    ichiro 	struct url_chain *c;
    800   1.1    ichiro 	int i;
    801   1.1    ichiro 
    802  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    803   1.1    ichiro 
    804   1.1    ichiro 	cd = &sc->sc_cdata;
    805   1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
    806   1.1    ichiro 		c = &cd->url_rx_chain[i];
    807   1.1    ichiro 		c->url_sc = sc;
    808   1.1    ichiro 		c->url_idx = i;
    809   1.1    ichiro 		if (url_newbuf(sc, c, NULL) == ENOBUFS)
    810   1.1    ichiro 			return (ENOBUFS);
    811   1.1    ichiro 		if (c->url_xfer == NULL) {
    812   1.1    ichiro 			c->url_xfer = usbd_alloc_xfer(sc->sc_udev);
    813   1.1    ichiro 			if (c->url_xfer == NULL)
    814   1.1    ichiro 				return (ENOBUFS);
    815   1.1    ichiro 			c->url_buf = usbd_alloc_buffer(c->url_xfer, URL_BUFSZ);
    816   1.1    ichiro 			if (c->url_buf == NULL) {
    817   1.1    ichiro 				usbd_free_xfer(c->url_xfer);
    818   1.1    ichiro 				return (ENOBUFS);
    819   1.1    ichiro 			}
    820   1.1    ichiro 		}
    821   1.1    ichiro 	}
    822   1.5  augustss 
    823   1.1    ichiro 	return (0);
    824   1.1    ichiro }
    825   1.1    ichiro 
    826   1.1    ichiro Static int
    827   1.1    ichiro url_tx_list_init(struct url_softc *sc)
    828   1.1    ichiro {
    829   1.1    ichiro 	struct url_cdata *cd;
    830   1.1    ichiro 	struct url_chain *c;
    831   1.1    ichiro 	int i;
    832   1.1    ichiro 
    833  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    834   1.1    ichiro 
    835   1.1    ichiro 	cd = &sc->sc_cdata;
    836   1.1    ichiro 	for (i = 0; i < URL_TX_LIST_CNT; i++) {
    837   1.1    ichiro 		c = &cd->url_tx_chain[i];
    838   1.1    ichiro 		c->url_sc = sc;
    839   1.1    ichiro 		c->url_idx = i;
    840   1.1    ichiro 		c->url_mbuf = NULL;
    841   1.1    ichiro 		if (c->url_xfer == NULL) {
    842   1.1    ichiro 			c->url_xfer = usbd_alloc_xfer(sc->sc_udev);
    843   1.1    ichiro 			if (c->url_xfer == NULL)
    844   1.1    ichiro 				return (ENOBUFS);
    845   1.1    ichiro 			c->url_buf = usbd_alloc_buffer(c->url_xfer, URL_BUFSZ);
    846   1.1    ichiro 			if (c->url_buf == NULL) {
    847   1.1    ichiro 				usbd_free_xfer(c->url_xfer);
    848   1.1    ichiro 				return (ENOBUFS);
    849   1.1    ichiro 			}
    850   1.1    ichiro 		}
    851   1.1    ichiro 	}
    852   1.5  augustss 
    853   1.1    ichiro 	return (0);
    854   1.1    ichiro }
    855   1.1    ichiro 
    856   1.1    ichiro Static void
    857   1.1    ichiro url_start(struct ifnet *ifp)
    858   1.1    ichiro {
    859   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
    860   1.1    ichiro 	struct mbuf *m_head = NULL;
    861   1.5  augustss 
    862  1.38    dyoung 	DPRINTF(("%s: %s: enter, link=%d\n", device_xname(sc->sc_dev),
    863   1.4  augustss 		 __func__, sc->sc_link));
    864   1.1    ichiro 
    865   1.1    ichiro 	if (sc->sc_dying)
    866   1.1    ichiro 		return;
    867   1.1    ichiro 
    868   1.1    ichiro 	if (!sc->sc_link)
    869   1.1    ichiro 		return;
    870   1.1    ichiro 
    871   1.1    ichiro 	if (ifp->if_flags & IFF_OACTIVE)
    872   1.1    ichiro 		return;
    873   1.1    ichiro 
    874   1.1    ichiro 	IFQ_POLL(&ifp->if_snd, m_head);
    875   1.1    ichiro 	if (m_head == NULL)
    876   1.1    ichiro 		return;
    877   1.1    ichiro 
    878   1.1    ichiro 	if (url_send(sc, m_head, 0)) {
    879   1.1    ichiro 		ifp->if_flags |= IFF_OACTIVE;
    880   1.1    ichiro 		return;
    881   1.1    ichiro 	}
    882   1.1    ichiro 
    883   1.1    ichiro 	IFQ_DEQUEUE(&ifp->if_snd, m_head);
    884   1.1    ichiro 
    885  1.37     joerg 	bpf_mtap(ifp, m_head);
    886   1.1    ichiro 
    887   1.1    ichiro 	ifp->if_flags |= IFF_OACTIVE;
    888   1.1    ichiro 
    889   1.1    ichiro 	/* Set a timeout in case the chip goes out to lunch. */
    890   1.1    ichiro 	ifp->if_timer = 5;
    891   1.1    ichiro }
    892   1.1    ichiro 
    893   1.1    ichiro Static int
    894   1.1    ichiro url_send(struct url_softc *sc, struct mbuf *m, int idx)
    895   1.1    ichiro {
    896   1.1    ichiro 	int total_len;
    897   1.1    ichiro 	struct url_chain *c;
    898   1.1    ichiro 	usbd_status err;
    899   1.1    ichiro 
    900  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev),__func__));
    901   1.1    ichiro 
    902   1.1    ichiro 	c = &sc->sc_cdata.url_tx_chain[idx];
    903   1.1    ichiro 
    904   1.1    ichiro 	/* Copy the mbuf data into a contiguous buffer */
    905   1.1    ichiro 	m_copydata(m, 0, m->m_pkthdr.len, c->url_buf);
    906   1.1    ichiro 	c->url_mbuf = m;
    907   1.1    ichiro 	total_len = m->m_pkthdr.len;
    908   1.1    ichiro 
    909   1.7    bouyer 	if (total_len < URL_MIN_FRAME_LEN) {
    910   1.7    bouyer 		memset(c->url_buf + total_len, 0,
    911   1.7    bouyer 		    URL_MIN_FRAME_LEN - total_len);
    912   1.1    ichiro 		total_len = URL_MIN_FRAME_LEN;
    913   1.7    bouyer 	}
    914   1.1    ichiro 	usbd_setup_xfer(c->url_xfer, sc->sc_pipe_tx, c, c->url_buf, total_len,
    915   1.1    ichiro 			USBD_FORCE_SHORT_XFER | USBD_NO_COPY,
    916   1.1    ichiro 			URL_TX_TIMEOUT, url_txeof);
    917   1.1    ichiro 
    918   1.1    ichiro 	/* Transmit */
    919   1.1    ichiro 	sc->sc_refcnt++;
    920   1.1    ichiro 	err = usbd_transfer(c->url_xfer);
    921   1.1    ichiro 	if (--sc->sc_refcnt < 0)
    922  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
    923   1.1    ichiro 	if (err != USBD_IN_PROGRESS) {
    924  1.38    dyoung 		printf("%s: url_send error=%s\n", device_xname(sc->sc_dev),
    925   1.1    ichiro 		       usbd_errstr(err));
    926   1.1    ichiro 		/* Stop the interface */
    927  1.22     joerg 		usb_add_task(sc->sc_udev, &sc->sc_stop_task,
    928  1.22     joerg 		    USB_TASKQ_DRIVER);
    929   1.1    ichiro 		return (EIO);
    930   1.1    ichiro 	}
    931   1.1    ichiro 
    932  1.38    dyoung 	DPRINTF(("%s: %s: send %d bytes\n", device_xname(sc->sc_dev),
    933   1.4  augustss 		 __func__, total_len));
    934   1.1    ichiro 
    935   1.1    ichiro 	sc->sc_cdata.url_tx_cnt++;
    936   1.1    ichiro 
    937   1.1    ichiro 	return (0);
    938   1.1    ichiro }
    939   1.1    ichiro 
    940   1.1    ichiro Static void
    941  1.23  christos url_txeof(usbd_xfer_handle xfer, usbd_private_handle priv,
    942  1.21  christos     usbd_status status)
    943   1.1    ichiro {
    944   1.1    ichiro 	struct url_chain *c = priv;
    945   1.1    ichiro 	struct url_softc *sc = c->url_sc;
    946   1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    947   1.1    ichiro 	int s;
    948   1.1    ichiro 
    949   1.1    ichiro 	if (sc->sc_dying)
    950   1.1    ichiro 		return;
    951   1.1    ichiro 
    952   1.1    ichiro 	s = splnet();
    953   1.1    ichiro 
    954  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    955   1.1    ichiro 
    956   1.1    ichiro 	ifp->if_timer = 0;
    957   1.1    ichiro 	ifp->if_flags &= ~IFF_OACTIVE;
    958   1.1    ichiro 
    959   1.1    ichiro 	if (status != USBD_NORMAL_COMPLETION) {
    960   1.1    ichiro 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
    961   1.1    ichiro 			splx(s);
    962   1.1    ichiro 			return;
    963   1.1    ichiro 		}
    964   1.1    ichiro 		ifp->if_oerrors++;
    965  1.38    dyoung 		printf("%s: usb error on tx: %s\n", device_xname(sc->sc_dev),
    966   1.1    ichiro 		       usbd_errstr(status));
    967   1.1    ichiro 		if (status == USBD_STALLED) {
    968   1.1    ichiro 			sc->sc_refcnt++;
    969  1.18  augustss 			usbd_clear_endpoint_stall_async(sc->sc_pipe_tx);
    970   1.1    ichiro 			if (--sc->sc_refcnt < 0)
    971  1.42       mrg 				usb_detach_wakeupold(sc->sc_dev);
    972   1.1    ichiro 		}
    973   1.1    ichiro 		splx(s);
    974   1.1    ichiro 		return;
    975   1.1    ichiro 	}
    976   1.1    ichiro 
    977   1.1    ichiro 	ifp->if_opackets++;
    978   1.1    ichiro 
    979   1.6    martin 	m_freem(c->url_mbuf);
    980   1.1    ichiro 	c->url_mbuf = NULL;
    981   1.1    ichiro 
    982   1.1    ichiro 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
    983   1.1    ichiro 		url_start(ifp);
    984   1.1    ichiro 
    985   1.1    ichiro 	splx(s);
    986   1.1    ichiro }
    987   1.1    ichiro 
    988   1.1    ichiro Static void
    989   1.1    ichiro url_rxeof(usbd_xfer_handle xfer, usbd_private_handle priv, usbd_status status)
    990   1.1    ichiro {
    991   1.1    ichiro 	struct url_chain *c = priv;
    992   1.1    ichiro 	struct url_softc *sc = c->url_sc;
    993   1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    994   1.1    ichiro 	struct mbuf *m;
    995   1.1    ichiro 	u_int32_t total_len;
    996   1.1    ichiro 	url_rxhdr_t rxhdr;
    997   1.1    ichiro 	int s;
    998   1.1    ichiro 
    999  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev),__func__));
   1000   1.1    ichiro 
   1001   1.1    ichiro 	if (sc->sc_dying)
   1002   1.1    ichiro 		return;
   1003   1.1    ichiro 
   1004   1.1    ichiro 	if (status != USBD_NORMAL_COMPLETION) {
   1005   1.1    ichiro 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
   1006   1.1    ichiro 			return;
   1007   1.1    ichiro 		sc->sc_rx_errs++;
   1008   1.1    ichiro 		if (usbd_ratecheck(&sc->sc_rx_notice)) {
   1009   1.1    ichiro 			printf("%s: %u usb errors on rx: %s\n",
   1010  1.38    dyoung 			       device_xname(sc->sc_dev), sc->sc_rx_errs,
   1011   1.1    ichiro 			       usbd_errstr(status));
   1012   1.1    ichiro 			sc->sc_rx_errs = 0;
   1013   1.1    ichiro 		}
   1014   1.1    ichiro 		if (status == USBD_STALLED) {
   1015   1.1    ichiro 			sc->sc_refcnt++;
   1016  1.18  augustss 			usbd_clear_endpoint_stall_async(sc->sc_pipe_rx);
   1017   1.1    ichiro 			if (--sc->sc_refcnt < 0)
   1018  1.42       mrg 				usb_detach_wakeupold(sc->sc_dev);
   1019   1.1    ichiro 		}
   1020   1.1    ichiro 		goto done;
   1021   1.1    ichiro 	}
   1022   1.1    ichiro 
   1023   1.1    ichiro 	usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
   1024   1.1    ichiro 
   1025   1.1    ichiro 	memcpy(mtod(c->url_mbuf, char *), c->url_buf, total_len);
   1026   1.1    ichiro 
   1027   1.1    ichiro 	if (total_len <= ETHER_CRC_LEN) {
   1028   1.1    ichiro 		ifp->if_ierrors++;
   1029   1.1    ichiro 		goto done;
   1030   1.1    ichiro 	}
   1031   1.1    ichiro 
   1032   1.1    ichiro 	memcpy(&rxhdr, c->url_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr));
   1033   1.1    ichiro 
   1034   1.1    ichiro 	DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n",
   1035  1.38    dyoung 		 device_xname(sc->sc_dev),
   1036   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK,
   1037   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "",
   1038   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "",
   1039   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "",
   1040   1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : ""));
   1041   1.1    ichiro 
   1042   1.1    ichiro 	if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) {
   1043   1.1    ichiro 		ifp->if_ierrors++;
   1044   1.1    ichiro 		goto done;
   1045   1.1    ichiro 	}
   1046   1.1    ichiro 
   1047   1.1    ichiro 	ifp->if_ipackets++;
   1048   1.1    ichiro 	total_len -= ETHER_CRC_LEN;
   1049   1.1    ichiro 
   1050   1.1    ichiro 	m = c->url_mbuf;
   1051   1.1    ichiro 	m->m_pkthdr.len = m->m_len = total_len;
   1052   1.1    ichiro 	m->m_pkthdr.rcvif = ifp;
   1053   1.1    ichiro 
   1054   1.1    ichiro 	s = splnet();
   1055   1.1    ichiro 
   1056   1.1    ichiro 	if (url_newbuf(sc, c, NULL) == ENOBUFS) {
   1057   1.1    ichiro 		ifp->if_ierrors++;
   1058   1.1    ichiro 		goto done1;
   1059   1.1    ichiro 	}
   1060   1.1    ichiro 
   1061  1.37     joerg 	bpf_mtap(ifp, m);
   1062   1.1    ichiro 
   1063  1.38    dyoung 	DPRINTF(("%s: %s: deliver %d\n", device_xname(sc->sc_dev),
   1064   1.4  augustss 		 __func__, m->m_len));
   1065  1.38    dyoung 	(*(ifp)->if_input)((ifp), (m));
   1066   1.1    ichiro 
   1067   1.1    ichiro  done1:
   1068   1.1    ichiro 	splx(s);
   1069   1.1    ichiro 
   1070   1.1    ichiro  done:
   1071   1.1    ichiro 	/* Setup new transfer */
   1072   1.1    ichiro 	usbd_setup_xfer(xfer, sc->sc_pipe_rx, c, c->url_buf, URL_BUFSZ,
   1073   1.1    ichiro 			USBD_SHORT_XFER_OK | USBD_NO_COPY,
   1074   1.1    ichiro 			USBD_NO_TIMEOUT, url_rxeof);
   1075   1.1    ichiro 	sc->sc_refcnt++;
   1076   1.1    ichiro 	usbd_transfer(xfer);
   1077   1.1    ichiro 	if (--sc->sc_refcnt < 0)
   1078  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
   1079   1.1    ichiro 
   1080  1.38    dyoung 	DPRINTF(("%s: %s: start rx\n", device_xname(sc->sc_dev), __func__));
   1081   1.1    ichiro }
   1082   1.1    ichiro 
   1083   1.1    ichiro #if 0
   1084  1.33    cegger Static void url_intr(void)
   1085   1.1    ichiro {
   1086   1.1    ichiro }
   1087   1.1    ichiro #endif
   1088   1.1    ichiro 
   1089   1.1    ichiro Static int
   1090  1.25  christos url_ioctl(struct ifnet *ifp, u_long cmd, void *data)
   1091   1.1    ichiro {
   1092   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1093   1.1    ichiro 	int s, error = 0;
   1094   1.1    ichiro 
   1095  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1096   1.1    ichiro 
   1097   1.1    ichiro 	if (sc->sc_dying)
   1098   1.1    ichiro 		return (EIO);
   1099   1.1    ichiro 
   1100   1.1    ichiro 	s = splnet();
   1101   1.1    ichiro 
   1102  1.30    dyoung 	error = ether_ioctl(ifp, cmd, data);
   1103  1.30    dyoung 	if (error == ENETRESET) {
   1104  1.30    dyoung 		if (ifp->if_flags & IFF_RUNNING)
   1105  1.30    dyoung 			url_setmulti(sc);
   1106  1.30    dyoung 		error = 0;
   1107   1.1    ichiro 	}
   1108   1.1    ichiro 
   1109   1.1    ichiro 	splx(s);
   1110   1.1    ichiro 
   1111   1.1    ichiro 	return (error);
   1112   1.1    ichiro }
   1113   1.1    ichiro 
   1114   1.1    ichiro Static void
   1115   1.1    ichiro url_watchdog(struct ifnet *ifp)
   1116   1.1    ichiro {
   1117   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1118   1.1    ichiro 	struct url_chain *c;
   1119   1.1    ichiro 	usbd_status stat;
   1120   1.1    ichiro 	int s;
   1121   1.5  augustss 
   1122  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1123   1.1    ichiro 
   1124   1.1    ichiro 	ifp->if_oerrors++;
   1125  1.38    dyoung 	printf("%s: watchdog timeout\n", device_xname(sc->sc_dev));
   1126   1.1    ichiro 
   1127   1.1    ichiro 	s = splusb();
   1128   1.1    ichiro 	c = &sc->sc_cdata.url_tx_chain[0];
   1129   1.1    ichiro 	usbd_get_xfer_status(c->url_xfer, NULL, NULL, NULL, &stat);
   1130   1.1    ichiro 	url_txeof(c->url_xfer, c, stat);
   1131   1.1    ichiro 
   1132   1.1    ichiro 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1133   1.1    ichiro 		url_start(ifp);
   1134   1.1    ichiro 	splx(s);
   1135   1.1    ichiro }
   1136   1.1    ichiro 
   1137   1.1    ichiro Static void
   1138   1.1    ichiro url_stop_task(struct url_softc *sc)
   1139   1.1    ichiro {
   1140   1.1    ichiro 	url_stop(GET_IFP(sc), 1);
   1141   1.1    ichiro }
   1142   1.1    ichiro 
   1143   1.1    ichiro /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */
   1144   1.1    ichiro Static void
   1145  1.23  christos url_stop(struct ifnet *ifp, int disable)
   1146   1.1    ichiro {
   1147   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1148   1.1    ichiro 	usbd_status err;
   1149   1.1    ichiro 	int i;
   1150   1.5  augustss 
   1151  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1152   1.1    ichiro 
   1153   1.1    ichiro 	ifp->if_timer = 0;
   1154   1.1    ichiro 
   1155   1.1    ichiro 	url_reset(sc);
   1156   1.1    ichiro 
   1157  1.38    dyoung 	callout_stop(&sc->sc_stat_ch);
   1158   1.1    ichiro 
   1159   1.1    ichiro 	/* Stop transfers */
   1160   1.1    ichiro 	/* RX endpoint */
   1161   1.1    ichiro 	if (sc->sc_pipe_rx != NULL) {
   1162   1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_rx);
   1163   1.1    ichiro 		if (err)
   1164   1.1    ichiro 			printf("%s: abort rx pipe failed: %s\n",
   1165  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1166   1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_rx);
   1167   1.1    ichiro 		if (err)
   1168   1.1    ichiro 			printf("%s: close rx pipe failed: %s\n",
   1169  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1170   1.1    ichiro 		sc->sc_pipe_rx = NULL;
   1171   1.1    ichiro 	}
   1172   1.1    ichiro 
   1173   1.1    ichiro 	/* TX endpoint */
   1174   1.1    ichiro 	if (sc->sc_pipe_tx != NULL) {
   1175   1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_tx);
   1176   1.1    ichiro 		if (err)
   1177   1.1    ichiro 			printf("%s: abort tx pipe failed: %s\n",
   1178  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1179   1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_tx);
   1180   1.1    ichiro 		if (err)
   1181   1.1    ichiro 			printf("%s: close tx pipe failed: %s\n",
   1182  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1183   1.1    ichiro 		sc->sc_pipe_tx = NULL;
   1184   1.1    ichiro 	}
   1185   1.1    ichiro 
   1186   1.1    ichiro #if 0
   1187   1.1    ichiro 	/* XXX: Interrupt endpoint is not yet supported!! */
   1188   1.1    ichiro 	/* Interrupt endpoint */
   1189   1.1    ichiro 	if (sc->sc_pipe_intr != NULL) {
   1190   1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_intr);
   1191   1.1    ichiro 		if (err)
   1192   1.1    ichiro 			printf("%s: abort intr pipe failed: %s\n",
   1193  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1194   1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_intr);
   1195   1.1    ichiro 		if (err)
   1196   1.1    ichiro 			printf("%s: close intr pipe failed: %s\n",
   1197  1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1198   1.1    ichiro 		sc->sc_pipe_intr = NULL;
   1199   1.1    ichiro 	}
   1200   1.1    ichiro #endif
   1201   1.1    ichiro 
   1202   1.1    ichiro 	/* Free RX resources. */
   1203   1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
   1204   1.1    ichiro 		if (sc->sc_cdata.url_rx_chain[i].url_mbuf != NULL) {
   1205   1.1    ichiro 			m_freem(sc->sc_cdata.url_rx_chain[i].url_mbuf);
   1206   1.1    ichiro 			sc->sc_cdata.url_rx_chain[i].url_mbuf = NULL;
   1207   1.1    ichiro 		}
   1208   1.1    ichiro 		if (sc->sc_cdata.url_rx_chain[i].url_xfer != NULL) {
   1209   1.1    ichiro 			usbd_free_xfer(sc->sc_cdata.url_rx_chain[i].url_xfer);
   1210   1.1    ichiro 			sc->sc_cdata.url_rx_chain[i].url_xfer = NULL;
   1211   1.1    ichiro 		}
   1212   1.1    ichiro 	}
   1213   1.1    ichiro 
   1214   1.1    ichiro 	/* Free TX resources. */
   1215   1.1    ichiro 	for (i = 0; i < URL_TX_LIST_CNT; i++) {
   1216   1.1    ichiro 		if (sc->sc_cdata.url_tx_chain[i].url_mbuf != NULL) {
   1217   1.1    ichiro 			m_freem(sc->sc_cdata.url_tx_chain[i].url_mbuf);
   1218   1.1    ichiro 			sc->sc_cdata.url_tx_chain[i].url_mbuf = NULL;
   1219   1.1    ichiro 		}
   1220   1.1    ichiro 		if (sc->sc_cdata.url_tx_chain[i].url_xfer != NULL) {
   1221   1.1    ichiro 			usbd_free_xfer(sc->sc_cdata.url_tx_chain[i].url_xfer);
   1222   1.1    ichiro 			sc->sc_cdata.url_tx_chain[i].url_xfer = NULL;
   1223   1.1    ichiro 		}
   1224   1.1    ichiro 	}
   1225   1.1    ichiro 
   1226   1.1    ichiro 	sc->sc_link = 0;
   1227   1.1    ichiro 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1228   1.1    ichiro }
   1229   1.1    ichiro 
   1230   1.1    ichiro /* Set media options */
   1231   1.1    ichiro Static int
   1232   1.1    ichiro url_ifmedia_change(struct ifnet *ifp)
   1233   1.1    ichiro {
   1234   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1235   1.1    ichiro 	struct mii_data *mii = GET_MII(sc);
   1236  1.30    dyoung 	int rc;
   1237   1.1    ichiro 
   1238  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1239   1.1    ichiro 
   1240   1.1    ichiro 	if (sc->sc_dying)
   1241   1.1    ichiro 		return (0);
   1242   1.1    ichiro 
   1243   1.1    ichiro 	sc->sc_link = 0;
   1244  1.30    dyoung 	if ((rc = mii_mediachg(mii)) == ENXIO)
   1245  1.30    dyoung 		return 0;
   1246  1.30    dyoung 	return rc;
   1247   1.1    ichiro }
   1248   1.1    ichiro 
   1249   1.1    ichiro /* Report current media status. */
   1250   1.1    ichiro Static void
   1251   1.1    ichiro url_ifmedia_status(struct ifnet *ifp, struct ifmediareq *ifmr)
   1252   1.1    ichiro {
   1253   1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1254   1.1    ichiro 
   1255  1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1256   1.1    ichiro 
   1257   1.1    ichiro 	if (sc->sc_dying)
   1258   1.1    ichiro 		return;
   1259   1.1    ichiro 
   1260  1.30    dyoung 	ether_mediastatus(ifp, ifmr);
   1261   1.1    ichiro }
   1262   1.1    ichiro 
   1263   1.1    ichiro Static void
   1264   1.1    ichiro url_tick(void *xsc)
   1265   1.1    ichiro {
   1266   1.1    ichiro 	struct url_softc *sc = xsc;
   1267   1.1    ichiro 
   1268   1.1    ichiro 	if (sc == NULL)
   1269   1.1    ichiro 		return;
   1270   1.1    ichiro 
   1271  1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1272   1.4  augustss 			__func__));
   1273   1.1    ichiro 
   1274   1.1    ichiro 	if (sc->sc_dying)
   1275   1.1    ichiro 		return;
   1276   1.1    ichiro 
   1277   1.1    ichiro 	/* Perform periodic stuff in process context */
   1278  1.22     joerg 	usb_add_task(sc->sc_udev, &sc->sc_tick_task, USB_TASKQ_DRIVER);
   1279   1.1    ichiro }
   1280   1.1    ichiro 
   1281   1.1    ichiro Static void
   1282   1.1    ichiro url_tick_task(void *xsc)
   1283   1.1    ichiro {
   1284   1.1    ichiro 	struct url_softc *sc = xsc;
   1285   1.1    ichiro 	struct ifnet *ifp;
   1286   1.1    ichiro 	struct mii_data *mii;
   1287   1.1    ichiro 	int s;
   1288   1.1    ichiro 
   1289   1.1    ichiro 	if (sc == NULL)
   1290   1.1    ichiro 		return;
   1291   1.1    ichiro 
   1292  1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1293   1.4  augustss 			__func__));
   1294   1.1    ichiro 
   1295   1.1    ichiro 	if (sc->sc_dying)
   1296   1.1    ichiro 		return;
   1297   1.1    ichiro 
   1298   1.1    ichiro 	ifp = GET_IFP(sc);
   1299   1.1    ichiro 	mii = GET_MII(sc);
   1300   1.1    ichiro 
   1301   1.1    ichiro 	if (mii == NULL)
   1302   1.1    ichiro 		return;
   1303   1.1    ichiro 
   1304   1.1    ichiro 	s = splnet();
   1305   1.1    ichiro 
   1306   1.1    ichiro 	mii_tick(mii);
   1307   1.1    ichiro 	if (!sc->sc_link) {
   1308   1.1    ichiro 		mii_pollstat(mii);
   1309   1.1    ichiro 		if (mii->mii_media_status & IFM_ACTIVE &&
   1310   1.1    ichiro 		    IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
   1311   1.1    ichiro 			DPRINTF(("%s: %s: got link\n",
   1312  1.38    dyoung 				 device_xname(sc->sc_dev), __func__));
   1313   1.1    ichiro 			sc->sc_link++;
   1314   1.1    ichiro 			if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1315   1.1    ichiro 				   url_start(ifp);
   1316   1.1    ichiro 		}
   1317   1.1    ichiro 	}
   1318   1.1    ichiro 
   1319  1.38    dyoung 	callout_reset(&sc->sc_stat_ch, hz, url_tick, sc);
   1320   1.1    ichiro 
   1321   1.1    ichiro 	splx(s);
   1322   1.1    ichiro }
   1323   1.1    ichiro 
   1324   1.1    ichiro /* Get exclusive access to the MII registers */
   1325   1.1    ichiro Static void
   1326   1.1    ichiro url_lock_mii(struct url_softc *sc)
   1327   1.1    ichiro {
   1328  1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1329   1.4  augustss 			__func__));
   1330   1.1    ichiro 
   1331   1.1    ichiro 	sc->sc_refcnt++;
   1332  1.27   xtraeme 	rw_enter(&sc->sc_mii_rwlock, RW_WRITER);
   1333   1.1    ichiro }
   1334   1.1    ichiro 
   1335   1.1    ichiro Static void
   1336   1.1    ichiro url_unlock_mii(struct url_softc *sc)
   1337   1.1    ichiro {
   1338  1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1339   1.4  augustss 		       __func__));
   1340   1.1    ichiro 
   1341  1.27   xtraeme 	rw_exit(&sc->sc_mii_rwlock);
   1342   1.1    ichiro 	if (--sc->sc_refcnt < 0)
   1343  1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
   1344   1.1    ichiro }
   1345   1.1    ichiro 
   1346   1.1    ichiro Static int
   1347  1.38    dyoung url_int_miibus_readreg(device_t dev, int phy, int reg)
   1348   1.1    ichiro {
   1349   1.1    ichiro 	struct url_softc *sc;
   1350   1.1    ichiro 	u_int16_t val;
   1351   1.1    ichiro 
   1352   1.1    ichiro 	if (dev == NULL)
   1353   1.1    ichiro 		return (0);
   1354   1.1    ichiro 
   1355  1.38    dyoung 	sc = device_private(dev);
   1356   1.1    ichiro 
   1357   1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n",
   1358  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg));
   1359   1.1    ichiro 
   1360   1.1    ichiro 	if (sc->sc_dying) {
   1361   1.1    ichiro #ifdef DIAGNOSTIC
   1362  1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1363   1.4  augustss 		       __func__);
   1364   1.1    ichiro #endif
   1365   1.1    ichiro 		return (0);
   1366   1.1    ichiro 	}
   1367   1.1    ichiro 
   1368   1.1    ichiro 	/* XXX: one PHY only for the RTL8150 internal PHY */
   1369   1.1    ichiro 	if (phy != 0) {
   1370   1.1    ichiro 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
   1371  1.38    dyoung 			 device_xname(sc->sc_dev), __func__, phy));
   1372   1.1    ichiro 		return (0);
   1373   1.1    ichiro 	}
   1374   1.1    ichiro 
   1375   1.1    ichiro 	url_lock_mii(sc);
   1376   1.1    ichiro 
   1377   1.1    ichiro 	switch (reg) {
   1378   1.1    ichiro 	case MII_BMCR:		/* Control Register */
   1379   1.1    ichiro 		reg = URL_BMCR;
   1380   1.1    ichiro 		break;
   1381   1.1    ichiro 	case MII_BMSR:		/* Status Register */
   1382   1.1    ichiro 		reg = URL_BMSR;
   1383   1.1    ichiro 		break;
   1384   1.1    ichiro 	case MII_PHYIDR1:
   1385   1.1    ichiro 	case MII_PHYIDR2:
   1386   1.1    ichiro 		val = 0;
   1387   1.1    ichiro 		goto R_DONE;
   1388   1.1    ichiro 		break;
   1389   1.1    ichiro 	case MII_ANAR:		/* Autonegotiation advertisement */
   1390   1.1    ichiro 		reg = URL_ANAR;
   1391   1.1    ichiro 		break;
   1392   1.1    ichiro 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
   1393   1.1    ichiro 		reg = URL_ANLP;
   1394   1.1    ichiro 		break;
   1395   1.1    ichiro 	case URLPHY_MSR:	/* Media Status Register */
   1396   1.1    ichiro 		reg = URL_MSR;
   1397   1.1    ichiro 		break;
   1398   1.1    ichiro 	default:
   1399   1.1    ichiro 		printf("%s: %s: bad register %04x\n",
   1400  1.38    dyoung 		       device_xname(sc->sc_dev), __func__, reg);
   1401   1.1    ichiro 		val = 0;
   1402   1.1    ichiro 		goto R_DONE;
   1403   1.1    ichiro 		break;
   1404   1.1    ichiro 	}
   1405   1.1    ichiro 
   1406   1.1    ichiro 	if (reg == URL_MSR)
   1407   1.1    ichiro 		val = url_csr_read_1(sc, reg);
   1408   1.1    ichiro 	else
   1409   1.1    ichiro 		val = url_csr_read_2(sc, reg);
   1410   1.1    ichiro 
   1411   1.1    ichiro  R_DONE:
   1412   1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
   1413  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, val));
   1414   1.1    ichiro 
   1415   1.1    ichiro 	url_unlock_mii(sc);
   1416   1.1    ichiro 	return (val);
   1417   1.1    ichiro }
   1418   1.1    ichiro 
   1419   1.1    ichiro Static void
   1420  1.38    dyoung url_int_miibus_writereg(device_t dev, int phy, int reg, int data)
   1421   1.1    ichiro {
   1422   1.1    ichiro 	struct url_softc *sc;
   1423   1.1    ichiro 
   1424   1.1    ichiro 	if (dev == NULL)
   1425   1.1    ichiro 		return;
   1426   1.1    ichiro 
   1427  1.38    dyoung 	sc = device_private(dev);
   1428   1.1    ichiro 
   1429   1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
   1430  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, data));
   1431   1.1    ichiro 
   1432   1.1    ichiro 	if (sc->sc_dying) {
   1433   1.1    ichiro #ifdef DIAGNOSTIC
   1434  1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1435   1.4  augustss 		       __func__);
   1436   1.1    ichiro #endif
   1437   1.1    ichiro 		return;
   1438   1.1    ichiro 	}
   1439   1.1    ichiro 
   1440   1.1    ichiro 	/* XXX: one PHY only for the RTL8150 internal PHY */
   1441   1.1    ichiro 	if (phy != 0) {
   1442   1.1    ichiro 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
   1443  1.38    dyoung 			 device_xname(sc->sc_dev), __func__, phy));
   1444   1.1    ichiro 		return;
   1445   1.1    ichiro 	}
   1446   1.1    ichiro 
   1447   1.1    ichiro 	url_lock_mii(sc);
   1448   1.1    ichiro 
   1449   1.1    ichiro 	switch (reg) {
   1450   1.1    ichiro 	case MII_BMCR:		/* Control Register */
   1451   1.1    ichiro 		reg = URL_BMCR;
   1452   1.1    ichiro 		break;
   1453   1.1    ichiro 	case MII_BMSR:		/* Status Register */
   1454   1.1    ichiro 		reg = URL_BMSR;
   1455   1.1    ichiro 		break;
   1456   1.1    ichiro 	case MII_PHYIDR1:
   1457   1.1    ichiro 	case MII_PHYIDR2:
   1458   1.1    ichiro 		goto W_DONE;
   1459   1.1    ichiro 		break;
   1460   1.1    ichiro 	case MII_ANAR:		/* Autonegotiation advertisement */
   1461   1.1    ichiro 		reg = URL_ANAR;
   1462   1.1    ichiro 		break;
   1463   1.1    ichiro 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
   1464   1.1    ichiro 		reg = URL_ANLP;
   1465   1.1    ichiro 		break;
   1466   1.1    ichiro 	case URLPHY_MSR:	/* Media Status Register */
   1467   1.1    ichiro 		reg = URL_MSR;
   1468   1.1    ichiro 		break;
   1469   1.1    ichiro 	default:
   1470   1.1    ichiro 		printf("%s: %s: bad register %04x\n",
   1471  1.38    dyoung 		       device_xname(sc->sc_dev), __func__, reg);
   1472   1.1    ichiro 		goto W_DONE;
   1473   1.1    ichiro 		break;
   1474   1.1    ichiro 	}
   1475   1.1    ichiro 
   1476   1.1    ichiro 	if (reg == URL_MSR)
   1477   1.1    ichiro 		url_csr_write_1(sc, reg, data);
   1478   1.1    ichiro 	else
   1479   1.1    ichiro 		url_csr_write_2(sc, reg, data);
   1480   1.1    ichiro  W_DONE:
   1481   1.1    ichiro 
   1482   1.1    ichiro 	url_unlock_mii(sc);
   1483   1.1    ichiro 	return;
   1484   1.1    ichiro }
   1485   1.1    ichiro 
   1486   1.1    ichiro Static void
   1487  1.44      matt url_miibus_statchg(struct ifnet *ifp)
   1488   1.1    ichiro {
   1489   1.1    ichiro #ifdef URL_DEBUG
   1490  1.44      matt 	if (ifp == NULL)
   1491   1.1    ichiro 		return;
   1492   1.1    ichiro 
   1493  1.44      matt 	DPRINTF(("%s: %s: enter\n", ifp->if_xname, __func__));
   1494   1.1    ichiro #endif
   1495   1.1    ichiro 	/* Nothing to do */
   1496   1.1    ichiro }
   1497   1.1    ichiro 
   1498   1.1    ichiro #if 0
   1499   1.1    ichiro /*
   1500   1.1    ichiro  * external PHYs support, but not test.
   1501   1.1    ichiro  */
   1502   1.1    ichiro Static int
   1503  1.38    dyoung url_ext_miibus_redreg(device_t dev, int phy, int reg)
   1504   1.1    ichiro {
   1505  1.38    dyoung 	struct url_softc *sc = device_private(dev);
   1506   1.1    ichiro 	u_int16_t val;
   1507   1.1    ichiro 
   1508   1.1    ichiro 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n",
   1509  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg));
   1510   1.1    ichiro 
   1511   1.1    ichiro 	if (sc->sc_dying) {
   1512   1.1    ichiro #ifdef DIAGNOSTIC
   1513  1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1514   1.4  augustss 		       __func__);
   1515   1.1    ichiro #endif
   1516   1.1    ichiro 		return (0);
   1517   1.1    ichiro 	}
   1518   1.1    ichiro 
   1519   1.1    ichiro 	url_lock_mii(sc);
   1520   1.1    ichiro 
   1521   1.1    ichiro 	url_csr_write_1(sc, URL_PHYADD, phy & URL_PHYADD_MASK);
   1522   1.1    ichiro 	/*
   1523   1.1    ichiro 	 * RTL8150L will initiate a MII management data transaction
   1524   1.1    ichiro 	 * if PHYCNT_OWN bit is set 1 by software. After transaction,
   1525   1.1    ichiro 	 * this bit is auto cleared by TRL8150L.
   1526   1.1    ichiro 	 */
   1527   1.1    ichiro 	url_csr_write_1(sc, URL_PHYCNT,
   1528   1.1    ichiro 			(reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR);
   1529   1.1    ichiro 	for (i = 0; i < URL_TIMEOUT; i++) {
   1530   1.1    ichiro 		if ((url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0)
   1531   1.1    ichiro 			break;
   1532   1.1    ichiro 	}
   1533   1.1    ichiro 	if (i == URL_TIMEOUT) {
   1534  1.38    dyoung 		printf("%s: MII read timed out\n", device_xname(sc->sc_dev));
   1535   1.1    ichiro 	}
   1536   1.5  augustss 
   1537   1.1    ichiro 	val = url_csr_read_2(sc, URL_PHYDAT);
   1538   1.1    ichiro 
   1539   1.1    ichiro 	DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
   1540  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, val));
   1541   1.1    ichiro 
   1542   1.1    ichiro 	url_unlock_mii(sc);
   1543   1.1    ichiro 	return (val);
   1544   1.1    ichiro }
   1545   1.1    ichiro 
   1546   1.1    ichiro Static void
   1547  1.38    dyoung url_ext_miibus_writereg(device_t dev, int phy, int reg, int data)
   1548   1.1    ichiro {
   1549  1.38    dyoung 	struct url_softc *sc = device_private(dev);
   1550   1.1    ichiro 
   1551   1.1    ichiro 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
   1552  1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, data));
   1553   1.1    ichiro 
   1554   1.1    ichiro 	if (sc->sc_dying) {
   1555   1.1    ichiro #ifdef DIAGNOSTIC
   1556  1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1557   1.4  augustss 		       __func__);
   1558   1.1    ichiro #endif
   1559   1.1    ichiro 		return;
   1560   1.1    ichiro 	}
   1561   1.1    ichiro 
   1562   1.1    ichiro 	url_lock_mii(sc);
   1563   1.1    ichiro 
   1564   1.1    ichiro 	url_csr_write_2(sc, URL_PHYDAT, data);
   1565   1.1    ichiro 	url_csr_write_1(sc, URL_PHYADD, phy);
   1566   1.1    ichiro 	url_csr_write_1(sc, URL_PHYCNT, reg | URL_PHYCNT_RWCR);	/* Write */
   1567   1.1    ichiro 
   1568   1.1    ichiro 	for (i=0; i < URL_TIMEOUT; i++) {
   1569   1.1    ichiro 		if (url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN)
   1570   1.1    ichiro 			break;
   1571   1.1    ichiro 	}
   1572   1.1    ichiro 
   1573   1.1    ichiro 	if (i == URL_TIMEOUT) {
   1574   1.1    ichiro 		printf("%s: MII write timed out\n",
   1575  1.38    dyoung 		       device_xname(sc->sc_dev));
   1576   1.1    ichiro 	}
   1577   1.1    ichiro 
   1578   1.1    ichiro 	url_unlock_mii(sc);
   1579   1.1    ichiro 	return;
   1580   1.1    ichiro }
   1581   1.1    ichiro #endif
   1582   1.1    ichiro 
   1583