Home | History | Annotate | Line # | Download | only in usb
if_url.c revision 1.48.4.10
      1  1.48.4.10     skrll /*	$NetBSD: if_url.c,v 1.48.4.10 2016/07/09 20:25:15 skrll Exp $	*/
      2       1.43       mrg 
      3        1.1    ichiro /*
      4        1.1    ichiro  * Copyright (c) 2001, 2002
      5        1.1    ichiro  *     Shingo WATANABE <nabe (at) nabechan.org>.  All rights reserved.
      6        1.1    ichiro  *
      7        1.1    ichiro  * Redistribution and use in source and binary forms, with or without
      8        1.1    ichiro  * modification, are permitted provided that the following conditions
      9        1.1    ichiro  * are met:
     10        1.1    ichiro  * 1. Redistributions of source code must retain the above copyright
     11        1.1    ichiro  *    notice, this list of conditions and the following disclaimer.
     12        1.1    ichiro  * 2. Redistributions in binary form must reproduce the above copyright
     13        1.1    ichiro  *    notice, this list of conditions and the following disclaimer in the
     14        1.1    ichiro  *    documentation and/or other materials provided with the distribution.
     15        1.8   tsutsui  * 3. Neither the name of the author nor the names of any co-contributors
     16        1.1    ichiro  *    may be used to endorse or promote products derived from this software
     17        1.1    ichiro  *    without specific prior written permission.
     18        1.1    ichiro  *
     19        1.1    ichiro  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     20        1.1    ichiro  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     21        1.1    ichiro  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     22        1.1    ichiro  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     23        1.1    ichiro  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     24        1.1    ichiro  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     25        1.1    ichiro  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26        1.1    ichiro  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27        1.1    ichiro  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28        1.1    ichiro  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29        1.1    ichiro  * SUCH DAMAGE.
     30        1.1    ichiro  *
     31        1.1    ichiro  */
     32        1.1    ichiro 
     33        1.1    ichiro /*
     34        1.1    ichiro  * The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at
     35        1.1    ichiro  *   ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf
     36        1.1    ichiro  *   ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf
     37        1.1    ichiro  */
     38        1.1    ichiro 
     39        1.1    ichiro /*
     40        1.1    ichiro  * TODO:
     41        1.1    ichiro  *	Interrupt Endpoint support
     42        1.1    ichiro  *	External PHYs
     43        1.1    ichiro  *	powerhook() support?
     44        1.1    ichiro  */
     45        1.1    ichiro 
     46        1.1    ichiro #include <sys/cdefs.h>
     47  1.48.4.10     skrll __KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.48.4.10 2016/07/09 20:25:15 skrll Exp $");
     48        1.1    ichiro 
     49       1.46  christos #ifdef _KERNEL_OPT
     50        1.1    ichiro #include "opt_inet.h"
     51       1.46  christos #endif
     52        1.1    ichiro 
     53        1.1    ichiro #include <sys/param.h>
     54        1.1    ichiro #include <sys/systm.h>
     55       1.27   xtraeme #include <sys/rwlock.h>
     56        1.1    ichiro #include <sys/mbuf.h>
     57        1.1    ichiro #include <sys/kernel.h>
     58        1.1    ichiro #include <sys/socket.h>
     59        1.1    ichiro 
     60        1.1    ichiro #include <sys/device.h>
     61   1.48.4.6     skrll #include <sys/rndsource.h>
     62        1.1    ichiro 
     63        1.1    ichiro #include <net/if.h>
     64        1.1    ichiro #include <net/if_arp.h>
     65        1.1    ichiro #include <net/if_dl.h>
     66        1.1    ichiro #include <net/if_media.h>
     67        1.1    ichiro 
     68        1.1    ichiro #include <net/bpf.h>
     69        1.1    ichiro 
     70        1.1    ichiro #include <net/if_ether.h>
     71        1.1    ichiro #ifdef INET
     72        1.1    ichiro #include <netinet/in.h>
     73        1.1    ichiro #include <netinet/if_inarp.h>
     74        1.1    ichiro #endif
     75        1.1    ichiro 
     76        1.1    ichiro #include <dev/mii/mii.h>
     77        1.1    ichiro #include <dev/mii/miivar.h>
     78        1.1    ichiro #include <dev/mii/urlphyreg.h>
     79        1.1    ichiro 
     80        1.1    ichiro #include <dev/usb/usb.h>
     81        1.1    ichiro #include <dev/usb/usbdi.h>
     82        1.1    ichiro #include <dev/usb/usbdi_util.h>
     83        1.1    ichiro #include <dev/usb/usbdevs.h>
     84        1.1    ichiro 
     85        1.1    ichiro #include <dev/usb/if_urlreg.h>
     86        1.1    ichiro 
     87        1.1    ichiro 
     88        1.1    ichiro /* Function declarations */
     89  1.48.4.10     skrll int	url_match(device_t, cfdata_t, void *);
     90  1.48.4.10     skrll void	url_attach(device_t, device_t, void *);
     91  1.48.4.10     skrll int	url_detach(device_t, int);
     92  1.48.4.10     skrll int	url_activate(device_t, enum devact);
     93       1.38    dyoung extern struct cfdriver url_cd;
     94  1.48.4.10     skrll CFATTACH_DECL_NEW(url, sizeof(struct url_softc), url_match, url_attach,
     95  1.48.4.10     skrll     url_detach, url_activate);
     96        1.1    ichiro 
     97        1.1    ichiro Static int url_openpipes(struct url_softc *);
     98        1.1    ichiro Static int url_rx_list_init(struct url_softc *);
     99        1.1    ichiro Static int url_tx_list_init(struct url_softc *);
    100        1.1    ichiro Static int url_newbuf(struct url_softc *, struct url_chain *, struct mbuf *);
    101        1.1    ichiro Static void url_start(struct ifnet *);
    102        1.1    ichiro Static int url_send(struct url_softc *, struct mbuf *, int);
    103   1.48.4.4     skrll Static void url_txeof(struct usbd_xfer *, void *, usbd_status);
    104   1.48.4.4     skrll Static void url_rxeof(struct usbd_xfer *, void *, usbd_status);
    105        1.1    ichiro Static void url_tick(void *);
    106        1.1    ichiro Static void url_tick_task(void *);
    107       1.25  christos Static int url_ioctl(struct ifnet *, u_long, void *);
    108        1.1    ichiro Static void url_stop_task(struct url_softc *);
    109        1.1    ichiro Static void url_stop(struct ifnet *, int);
    110        1.1    ichiro Static void url_watchdog(struct ifnet *);
    111        1.1    ichiro Static int url_ifmedia_change(struct ifnet *);
    112        1.1    ichiro Static void url_ifmedia_status(struct ifnet *, struct ifmediareq *);
    113        1.1    ichiro Static void url_lock_mii(struct url_softc *);
    114        1.1    ichiro Static void url_unlock_mii(struct url_softc *);
    115       1.38    dyoung Static int url_int_miibus_readreg(device_t, int, int);
    116       1.38    dyoung Static void url_int_miibus_writereg(device_t, int, int, int);
    117       1.44      matt Static void url_miibus_statchg(struct ifnet *);
    118        1.1    ichiro Static int url_init(struct ifnet *);
    119        1.1    ichiro Static void url_setmulti(struct url_softc *);
    120        1.1    ichiro Static void url_reset(struct url_softc *);
    121        1.1    ichiro 
    122        1.1    ichiro Static int url_csr_read_1(struct url_softc *, int);
    123        1.1    ichiro Static int url_csr_read_2(struct url_softc *, int);
    124        1.1    ichiro Static int url_csr_write_1(struct url_softc *, int, int);
    125        1.1    ichiro Static int url_csr_write_2(struct url_softc *, int, int);
    126        1.1    ichiro Static int url_csr_write_4(struct url_softc *, int, int);
    127        1.1    ichiro Static int url_mem(struct url_softc *, int, int, void *, int);
    128        1.1    ichiro 
    129        1.1    ichiro /* Macros */
    130        1.1    ichiro #ifdef URL_DEBUG
    131       1.38    dyoung #define DPRINTF(x)	if (urldebug) printf x
    132       1.38    dyoung #define DPRINTFN(n,x)	if (urldebug >= (n)) printf x
    133        1.2    ichiro int urldebug = 0;
    134        1.1    ichiro #else
    135        1.1    ichiro #define DPRINTF(x)
    136        1.1    ichiro #define DPRINTFN(n,x)
    137        1.1    ichiro #endif
    138        1.1    ichiro 
    139        1.1    ichiro #define	URL_SETBIT(sc, reg, x)	\
    140        1.1    ichiro 	url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) | (x))
    141        1.1    ichiro 
    142        1.1    ichiro #define	URL_SETBIT2(sc, reg, x)	\
    143        1.1    ichiro 	url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) | (x))
    144        1.1    ichiro 
    145        1.1    ichiro #define	URL_CLRBIT(sc, reg, x)	\
    146        1.1    ichiro 	url_csr_write_1(sc, reg, url_csr_read_1(sc, reg) & ~(x))
    147        1.1    ichiro 
    148        1.1    ichiro #define	URL_CLRBIT2(sc, reg, x)	\
    149        1.1    ichiro 	url_csr_write_2(sc, reg, url_csr_read_2(sc, reg) & ~(x))
    150        1.1    ichiro 
    151        1.1    ichiro static const struct url_type {
    152        1.1    ichiro 	struct usb_devno url_dev;
    153   1.48.4.1     skrll 	uint16_t url_flags;
    154        1.1    ichiro #define URL_EXT_PHY	0x0001
    155        1.1    ichiro } url_devs [] = {
    156        1.1    ichiro 	/* MELCO LUA-KTX */
    157        1.1    ichiro 	{{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0},
    158       1.10   mycroft 	/* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */
    159       1.11  augustss 	{{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0},
    160       1.11  augustss 	/* Longshine LCS-8138TX */
    161       1.11  augustss 	{{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0},
    162       1.11  augustss 	/* Micronet SP128AR */
    163       1.11  augustss 	{{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0},
    164       1.13    itojun 	/* OQO model 01 */
    165       1.13    itojun 	{{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0},
    166        1.1    ichiro };
    167       1.17  christos #define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p))
    168        1.1    ichiro 
    169        1.1    ichiro 
    170        1.1    ichiro /* Probe */
    171       1.46  christos int
    172       1.38    dyoung url_match(device_t parent, cfdata_t match, void *aux)
    173        1.1    ichiro {
    174       1.38    dyoung 	struct usb_attach_arg *uaa = aux;
    175        1.1    ichiro 
    176   1.48.4.5     skrll 	return url_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ?
    177   1.48.4.3     skrll 		UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
    178        1.1    ichiro }
    179        1.1    ichiro /* Attach */
    180       1.46  christos void
    181       1.38    dyoung url_attach(device_t parent, device_t self, void *aux)
    182        1.1    ichiro {
    183       1.38    dyoung 	struct url_softc *sc = device_private(self);
    184       1.38    dyoung 	struct usb_attach_arg *uaa = aux;
    185   1.48.4.5     skrll 	struct usbd_device *dev = uaa->uaa_device;
    186   1.48.4.4     skrll 	struct usbd_interface *iface;
    187        1.1    ichiro 	usbd_status err;
    188        1.1    ichiro 	usb_interface_descriptor_t *id;
    189        1.1    ichiro 	usb_endpoint_descriptor_t *ed;
    190       1.16  augustss 	char *devinfop;
    191        1.1    ichiro 	struct ifnet *ifp;
    192        1.1    ichiro 	struct mii_data *mii;
    193        1.1    ichiro 	u_char eaddr[ETHER_ADDR_LEN];
    194        1.1    ichiro 	int i, s;
    195        1.1    ichiro 
    196       1.32      cube 	sc->sc_dev = self;
    197       1.32      cube 
    198       1.34    plunky 	aprint_naive("\n");
    199       1.34    plunky 	aprint_normal("\n");
    200       1.34    plunky 
    201       1.16  augustss 	devinfop = usbd_devinfo_alloc(dev, 0);
    202       1.32      cube 	aprint_normal_dev(self, "%s\n", devinfop);
    203       1.16  augustss 	usbd_devinfo_free(devinfop);
    204        1.1    ichiro 
    205        1.1    ichiro 	/* Move the device into the configured state. */
    206        1.1    ichiro 	err = usbd_set_config_no(dev, URL_CONFIG_NO, 1);
    207        1.1    ichiro 	if (err) {
    208       1.45     skrll 		aprint_error_dev(self, "failed to set configuration"
    209       1.45     skrll 		    ", err=%s\n", usbd_errstr(err));
    210        1.1    ichiro 		goto bad;
    211        1.1    ichiro 	}
    212        1.1    ichiro 
    213       1.47  jmcneill 	usb_init_task(&sc->sc_tick_task, url_tick_task, sc, 0);
    214       1.27   xtraeme 	rw_init(&sc->sc_mii_rwlock);
    215       1.47  jmcneill 	usb_init_task(&sc->sc_stop_task, (void (*)(void *))url_stop_task, sc, 0);
    216        1.1    ichiro 
    217        1.1    ichiro 	/* get control interface */
    218        1.1    ichiro 	err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface);
    219        1.1    ichiro 	if (err) {
    220       1.32      cube 		aprint_error_dev(self, "failed to get interface, err=%s\n",
    221        1.1    ichiro 		       usbd_errstr(err));
    222        1.1    ichiro 		goto bad;
    223        1.1    ichiro 	}
    224        1.1    ichiro 
    225        1.1    ichiro 	sc->sc_udev = dev;
    226        1.1    ichiro 	sc->sc_ctl_iface = iface;
    227   1.48.4.5     skrll 	sc->sc_flags = url_lookup(uaa->uaa_vendor, uaa->uaa_product)->url_flags;
    228        1.1    ichiro 
    229        1.1    ichiro 	/* get interface descriptor */
    230        1.1    ichiro 	id = usbd_get_interface_descriptor(sc->sc_ctl_iface);
    231        1.1    ichiro 
    232        1.1    ichiro 	/* find endpoints */
    233        1.1    ichiro 	sc->sc_bulkin_no = sc->sc_bulkout_no = sc->sc_intrin_no = -1;
    234        1.1    ichiro 	for (i = 0; i < id->bNumEndpoints; i++) {
    235        1.1    ichiro 		ed = usbd_interface2endpoint_descriptor(sc->sc_ctl_iface, i);
    236        1.1    ichiro 		if (ed == NULL) {
    237       1.32      cube 			aprint_error_dev(self,
    238       1.32      cube 			    "couldn't get endpoint %d\n", i);
    239        1.1    ichiro 			goto bad;
    240        1.1    ichiro 		}
    241        1.1    ichiro 		if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
    242        1.1    ichiro 		    UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
    243        1.1    ichiro 			sc->sc_bulkin_no = ed->bEndpointAddress; /* RX */
    244        1.1    ichiro 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK &&
    245        1.1    ichiro 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT)
    246        1.1    ichiro 			sc->sc_bulkout_no = ed->bEndpointAddress; /* TX */
    247        1.1    ichiro 		else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT &&
    248        1.1    ichiro 			 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
    249        1.1    ichiro 			sc->sc_intrin_no = ed->bEndpointAddress; /* Status */
    250        1.1    ichiro 	}
    251        1.1    ichiro 
    252        1.1    ichiro 	if (sc->sc_bulkin_no == -1 || sc->sc_bulkout_no == -1 ||
    253        1.1    ichiro 	    sc->sc_intrin_no == -1) {
    254       1.32      cube 		aprint_error_dev(self, "missing endpoint\n");
    255        1.1    ichiro 		goto bad;
    256        1.1    ichiro 	}
    257        1.1    ichiro 
    258        1.1    ichiro 	s = splnet();
    259        1.1    ichiro 
    260        1.1    ichiro 	/* reset the adapter */
    261        1.1    ichiro 	url_reset(sc);
    262        1.1    ichiro 
    263        1.1    ichiro 	/* Get Ethernet Address */
    264        1.1    ichiro 	err = url_mem(sc, URL_CMD_READMEM, URL_IDR0, (void *)eaddr,
    265        1.1    ichiro 		      ETHER_ADDR_LEN);
    266        1.1    ichiro 	if (err) {
    267       1.32      cube 		aprint_error_dev(self, "read MAC address failed\n");
    268        1.1    ichiro 		splx(s);
    269        1.1    ichiro 		goto bad;
    270        1.1    ichiro 	}
    271        1.1    ichiro 
    272        1.1    ichiro 	/* Print Ethernet Address */
    273       1.32      cube 	aprint_normal_dev(self, "Ethernet address %s\n", ether_sprintf(eaddr));
    274        1.1    ichiro 
    275       1.19       wiz 	/* initialize interface information */
    276        1.1    ichiro 	ifp = GET_IFP(sc);
    277        1.1    ichiro 	ifp->if_softc = sc;
    278        1.3  augustss 	ifp->if_mtu = ETHERMTU;
    279       1.32      cube 	strncpy(ifp->if_xname, device_xname(self), IFNAMSIZ);
    280        1.1    ichiro 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
    281        1.1    ichiro 	ifp->if_start = url_start;
    282        1.1    ichiro 	ifp->if_ioctl = url_ioctl;
    283        1.1    ichiro 	ifp->if_watchdog = url_watchdog;
    284        1.1    ichiro 	ifp->if_init = url_init;
    285        1.1    ichiro 	ifp->if_stop = url_stop;
    286        1.1    ichiro 
    287        1.1    ichiro 	IFQ_SET_READY(&ifp->if_snd);
    288        1.1    ichiro 
    289        1.1    ichiro 	/*
    290        1.1    ichiro 	 * Do ifmedia setup.
    291        1.1    ichiro 	 */
    292        1.1    ichiro 	mii = &sc->sc_mii;
    293        1.1    ichiro 	mii->mii_ifp = ifp;
    294        1.1    ichiro 	mii->mii_readreg = url_int_miibus_readreg;
    295        1.1    ichiro 	mii->mii_writereg = url_int_miibus_writereg;
    296        1.1    ichiro #if 0
    297        1.1    ichiro 	if (sc->sc_flags & URL_EXT_PHY) {
    298        1.1    ichiro 		mii->mii_readreg = url_ext_miibus_readreg;
    299        1.1    ichiro 		mii->mii_writereg = url_ext_miibus_writereg;
    300        1.1    ichiro 	}
    301        1.1    ichiro #endif
    302        1.1    ichiro 	mii->mii_statchg = url_miibus_statchg;
    303        1.1    ichiro 	mii->mii_flags = MIIF_AUTOTSLEEP;
    304       1.30    dyoung 	sc->sc_ec.ec_mii = mii;
    305        1.1    ichiro 	ifmedia_init(&mii->mii_media, 0,
    306        1.1    ichiro 		     url_ifmedia_change, url_ifmedia_status);
    307        1.1    ichiro 	mii_attach(self, mii, 0xffffffff, MII_PHY_ANY, MII_OFFSET_ANY, 0);
    308        1.1    ichiro 	if (LIST_FIRST(&mii->mii_phys) == NULL) {
    309        1.1    ichiro 		ifmedia_add(&mii->mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
    310        1.1    ichiro 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_NONE);
    311        1.1    ichiro 	} else
    312        1.1    ichiro 		ifmedia_set(&mii->mii_media, IFM_ETHER | IFM_AUTO);
    313        1.1    ichiro 
    314        1.1    ichiro 	/* attach the interface */
    315        1.1    ichiro 	if_attach(ifp);
    316       1.38    dyoung 	ether_ifattach(ifp, eaddr);
    317        1.1    ichiro 
    318       1.32      cube 	rnd_attach_source(&sc->rnd_source, device_xname(self),
    319       1.48       tls 	    RND_TYPE_NET, RND_FLAG_DEFAULT);
    320        1.1    ichiro 
    321       1.38    dyoung 	callout_init(&sc->sc_stat_ch, 0);
    322        1.1    ichiro 	sc->sc_attached = 1;
    323        1.1    ichiro 	splx(s);
    324        1.1    ichiro 
    325       1.38    dyoung 	usbd_add_drv_event(USB_EVENT_DRIVER_ATTACH, dev, sc->sc_dev);
    326        1.1    ichiro 
    327       1.38    dyoung 	return;
    328        1.1    ichiro 
    329        1.1    ichiro  bad:
    330        1.1    ichiro 	sc->sc_dying = 1;
    331       1.38    dyoung 	return;
    332        1.1    ichiro }
    333        1.1    ichiro 
    334        1.1    ichiro /* detach */
    335       1.46  christos int
    336       1.38    dyoung url_detach(device_t self, int flags)
    337        1.1    ichiro {
    338       1.38    dyoung 	struct url_softc *sc = device_private(self);
    339        1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    340        1.1    ichiro 	int s;
    341        1.1    ichiro 
    342       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    343        1.1    ichiro 
    344        1.1    ichiro 	/* Detached before attached finished */
    345        1.1    ichiro 	if (!sc->sc_attached)
    346   1.48.4.3     skrll 		return 0;
    347        1.1    ichiro 
    348       1.38    dyoung 	callout_stop(&sc->sc_stat_ch);
    349        1.1    ichiro 
    350        1.1    ichiro 	/* Remove any pending tasks */
    351        1.1    ichiro 	usb_rem_task(sc->sc_udev, &sc->sc_tick_task);
    352        1.1    ichiro 	usb_rem_task(sc->sc_udev, &sc->sc_stop_task);
    353        1.1    ichiro 
    354        1.1    ichiro 	s = splusb();
    355        1.1    ichiro 
    356        1.1    ichiro 	if (--sc->sc_refcnt >= 0) {
    357        1.1    ichiro 		/* Wait for processes to go away */
    358       1.42       mrg 		usb_detach_waitold(sc->sc_dev);
    359        1.1    ichiro 	}
    360        1.1    ichiro 
    361        1.1    ichiro 	if (ifp->if_flags & IFF_RUNNING)
    362        1.1    ichiro 		url_stop(GET_IFP(sc), 1);
    363        1.1    ichiro 
    364        1.1    ichiro 	rnd_detach_source(&sc->rnd_source);
    365        1.1    ichiro 	mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
    366        1.1    ichiro 	ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
    367        1.1    ichiro 	ether_ifdetach(ifp);
    368        1.1    ichiro 	if_detach(ifp);
    369        1.1    ichiro 
    370        1.1    ichiro #ifdef DIAGNOSTIC
    371        1.1    ichiro 	if (sc->sc_pipe_tx != NULL)
    372       1.32      cube 		aprint_debug_dev(self, "detach has active tx endpoint.\n");
    373        1.1    ichiro 	if (sc->sc_pipe_rx != NULL)
    374       1.32      cube 		aprint_debug_dev(self, "detach has active rx endpoint.\n");
    375        1.1    ichiro 	if (sc->sc_pipe_intr != NULL)
    376       1.32      cube 		aprint_debug_dev(self, "detach has active intr endpoint.\n");
    377        1.1    ichiro #endif
    378        1.1    ichiro 
    379        1.1    ichiro 	sc->sc_attached = 0;
    380        1.1    ichiro 
    381        1.1    ichiro 	splx(s);
    382        1.1    ichiro 
    383       1.28   xtraeme 	rw_destroy(&sc->sc_mii_rwlock);
    384  1.48.4.10     skrll 	usbd_add_drv_event(USB_EVENT_DRIVER_DETACH, sc->sc_udev, sc->sc_dev);
    385        1.1    ichiro 
    386   1.48.4.3     skrll 	return 0;
    387        1.1    ichiro }
    388        1.1    ichiro 
    389        1.1    ichiro /* read/write memory */
    390        1.1    ichiro Static int
    391        1.1    ichiro url_mem(struct url_softc *sc, int cmd, int offset, void *buf, int len)
    392        1.1    ichiro {
    393        1.1    ichiro 	usb_device_request_t req;
    394        1.1    ichiro 	usbd_status err;
    395        1.1    ichiro 
    396        1.1    ichiro 	if (sc == NULL)
    397   1.48.4.3     skrll 		return 0;
    398        1.1    ichiro 
    399        1.1    ichiro 	DPRINTFN(0x200,
    400       1.38    dyoung 		("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    401        1.1    ichiro 
    402        1.1    ichiro 	if (sc->sc_dying)
    403   1.48.4.3     skrll 		return 0;
    404        1.1    ichiro 
    405        1.1    ichiro 	if (cmd == URL_CMD_READMEM)
    406        1.1    ichiro 		req.bmRequestType = UT_READ_VENDOR_DEVICE;
    407        1.1    ichiro 	else
    408        1.1    ichiro 		req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
    409        1.1    ichiro 	req.bRequest = URL_REQ_MEM;
    410        1.1    ichiro 	USETW(req.wValue, offset);
    411        1.1    ichiro 	USETW(req.wIndex, 0x0000);
    412        1.1    ichiro 	USETW(req.wLength, len);
    413        1.1    ichiro 
    414        1.1    ichiro 	sc->sc_refcnt++;
    415        1.1    ichiro 	err = usbd_do_request(sc->sc_udev, &req, buf);
    416        1.1    ichiro 	if (--sc->sc_refcnt < 0)
    417       1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
    418        1.1    ichiro 	if (err) {
    419        1.1    ichiro 		DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n",
    420       1.38    dyoung 			 device_xname(sc->sc_dev),
    421        1.1    ichiro 			 cmd == URL_CMD_READMEM ? "read" : "write",
    422        1.1    ichiro 			 offset, err));
    423        1.5  augustss 	}
    424        1.1    ichiro 
    425   1.48.4.3     skrll 	return err;
    426        1.1    ichiro }
    427        1.1    ichiro 
    428        1.1    ichiro /* read 1byte from register */
    429        1.1    ichiro Static int
    430        1.1    ichiro url_csr_read_1(struct url_softc *sc, int reg)
    431        1.1    ichiro {
    432   1.48.4.1     skrll 	uint8_t val = 0;
    433        1.1    ichiro 
    434        1.1    ichiro 	DPRINTFN(0x100,
    435       1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    436        1.1    ichiro 
    437        1.1    ichiro 	if (sc->sc_dying)
    438   1.48.4.3     skrll 		return 0;
    439        1.5  augustss 
    440   1.48.4.3     skrll 	return url_mem(sc, URL_CMD_READMEM, reg, &val, 1) ? 0 : val;
    441        1.1    ichiro }
    442        1.1    ichiro 
    443        1.1    ichiro /* read 2bytes from register */
    444        1.1    ichiro Static int
    445        1.1    ichiro url_csr_read_2(struct url_softc *sc, int reg)
    446        1.1    ichiro {
    447        1.1    ichiro 	uWord val;
    448        1.1    ichiro 
    449        1.1    ichiro 	DPRINTFN(0x100,
    450       1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    451        1.1    ichiro 
    452        1.1    ichiro 	if (sc->sc_dying)
    453   1.48.4.3     skrll 		return 0;
    454        1.5  augustss 
    455        1.1    ichiro 	USETW(val, 0);
    456   1.48.4.3     skrll 	return url_mem(sc, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val);
    457        1.1    ichiro }
    458        1.1    ichiro 
    459        1.1    ichiro /* write 1byte to register */
    460        1.1    ichiro Static int
    461        1.1    ichiro url_csr_write_1(struct url_softc *sc, int reg, int aval)
    462        1.1    ichiro {
    463   1.48.4.1     skrll 	uint8_t val = aval;
    464        1.1    ichiro 
    465        1.1    ichiro 	DPRINTFN(0x100,
    466       1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    467        1.1    ichiro 
    468        1.1    ichiro 	if (sc->sc_dying)
    469   1.48.4.3     skrll 		return 0;
    470        1.5  augustss 
    471   1.48.4.3     skrll 	return url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0;
    472        1.1    ichiro }
    473        1.1    ichiro 
    474        1.1    ichiro /* write 2bytes to register */
    475        1.1    ichiro Static int
    476        1.1    ichiro url_csr_write_2(struct url_softc *sc, int reg, int aval)
    477        1.1    ichiro {
    478        1.1    ichiro 	uWord val;
    479        1.1    ichiro 
    480        1.1    ichiro 	DPRINTFN(0x100,
    481       1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    482        1.1    ichiro 
    483        1.1    ichiro 	USETW(val, aval);
    484        1.1    ichiro 
    485        1.1    ichiro 	if (sc->sc_dying)
    486   1.48.4.3     skrll 		return 0;
    487        1.5  augustss 
    488   1.48.4.3     skrll 	return url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0;
    489        1.1    ichiro }
    490        1.1    ichiro 
    491        1.1    ichiro /* write 4bytes to register */
    492        1.1    ichiro Static int
    493        1.1    ichiro url_csr_write_4(struct url_softc *sc, int reg, int aval)
    494        1.1    ichiro {
    495        1.1    ichiro 	uDWord val;
    496        1.1    ichiro 
    497        1.1    ichiro 	DPRINTFN(0x100,
    498       1.38    dyoung 		 ("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    499        1.1    ichiro 
    500        1.1    ichiro 	USETDW(val, aval);
    501        1.1    ichiro 
    502        1.1    ichiro 	if (sc->sc_dying)
    503   1.48.4.3     skrll 		return 0;
    504        1.5  augustss 
    505   1.48.4.3     skrll 	return url_mem(sc, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0;
    506        1.1    ichiro }
    507        1.1    ichiro 
    508        1.1    ichiro Static int
    509        1.1    ichiro url_init(struct ifnet *ifp)
    510        1.1    ichiro {
    511        1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
    512        1.1    ichiro 	struct mii_data *mii = GET_MII(sc);
    513       1.29    dyoung 	const u_char *eaddr;
    514       1.30    dyoung 	int i, rc, s;
    515        1.1    ichiro 
    516       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    517        1.5  augustss 
    518        1.1    ichiro 	if (sc->sc_dying)
    519   1.48.4.3     skrll 		return EIO;
    520        1.1    ichiro 
    521        1.1    ichiro 	s = splnet();
    522        1.1    ichiro 
    523        1.1    ichiro 	/* Cancel pending I/O and free all TX/RX buffers */
    524        1.1    ichiro 	url_stop(ifp, 1);
    525        1.1    ichiro 
    526       1.29    dyoung 	eaddr = CLLADDR(ifp->if_sadl);
    527        1.1    ichiro 	for (i = 0; i < ETHER_ADDR_LEN; i++)
    528        1.1    ichiro 		url_csr_write_1(sc, URL_IDR0 + i, eaddr[i]);
    529        1.1    ichiro 
    530        1.1    ichiro 	/* Init transmission control register */
    531        1.1    ichiro 	URL_CLRBIT(sc, URL_TCR,
    532        1.1    ichiro 		   URL_TCR_TXRR1 | URL_TCR_TXRR0 |
    533        1.1    ichiro 		   URL_TCR_IFG1 | URL_TCR_IFG0 |
    534        1.1    ichiro 		   URL_TCR_NOCRC);
    535        1.1    ichiro 
    536        1.1    ichiro 	/* Init receive control register */
    537        1.1    ichiro 	URL_SETBIT2(sc, URL_RCR, URL_RCR_TAIL | URL_RCR_AD);
    538        1.1    ichiro 	if (ifp->if_flags & IFF_BROADCAST)
    539        1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AB);
    540        1.1    ichiro 	else
    541        1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AB);
    542        1.1    ichiro 
    543        1.1    ichiro 	/* If we want promiscuous mode, accept all physical frames. */
    544        1.1    ichiro 	if (ifp->if_flags & IFF_PROMISC)
    545        1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    546        1.1    ichiro 	else
    547        1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    548        1.1    ichiro 
    549        1.5  augustss 
    550        1.1    ichiro 	/* Load the multicast filter */
    551        1.1    ichiro 	url_setmulti(sc);
    552        1.1    ichiro 
    553        1.1    ichiro 	/* Enable RX and TX */
    554        1.1    ichiro 	URL_SETBIT(sc, URL_CR, URL_CR_TE | URL_CR_RE);
    555        1.1    ichiro 
    556       1.30    dyoung 	if ((rc = mii_mediachg(mii)) == ENXIO)
    557       1.30    dyoung 		rc = 0;
    558       1.30    dyoung 	else if (rc != 0)
    559       1.30    dyoung 		goto out;
    560        1.1    ichiro 
    561        1.1    ichiro 	if (sc->sc_pipe_tx == NULL || sc->sc_pipe_rx == NULL) {
    562        1.1    ichiro 		if (url_openpipes(sc)) {
    563        1.1    ichiro 			splx(s);
    564   1.48.4.3     skrll 			return EIO;
    565        1.1    ichiro 		}
    566        1.1    ichiro 	}
    567   1.48.4.7     skrll 	/* Initialize transmit ring */
    568   1.48.4.7     skrll 	if (url_tx_list_init(sc)) {
    569   1.48.4.7     skrll 		printf("%s: tx list init failed\n", device_xname(sc->sc_dev));
    570   1.48.4.7     skrll 		splx(s);
    571   1.48.4.7     skrll 		return EIO;
    572   1.48.4.7     skrll 	}
    573   1.48.4.7     skrll 
    574   1.48.4.7     skrll 	/* Initialize receive ring */
    575   1.48.4.7     skrll 	if (url_rx_list_init(sc)) {
    576   1.48.4.7     skrll 		printf("%s: rx list init failed\n", device_xname(sc->sc_dev));
    577   1.48.4.7     skrll 		splx(s);
    578   1.48.4.7     skrll 		return EIO;
    579   1.48.4.7     skrll 	}
    580   1.48.4.7     skrll 	/* Start up the receive pipe. */
    581   1.48.4.7     skrll 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
    582   1.48.4.7     skrll 		struct url_chain *c = &sc->sc_cdata.url_rx_chain[i];
    583   1.48.4.7     skrll 
    584   1.48.4.7     skrll 		usbd_setup_xfer(c->url_xfer, c, c->url_buf, URL_BUFSZ,
    585   1.48.4.7     skrll 		    USBD_SHORT_XFER_OK, USBD_NO_TIMEOUT, url_rxeof);
    586   1.48.4.7     skrll 		(void)usbd_transfer(c->url_xfer);
    587   1.48.4.7     skrll 		DPRINTF(("%s: %s: start read\n", device_xname(sc->sc_dev),
    588   1.48.4.7     skrll 			 __func__));
    589   1.48.4.7     skrll 	}
    590        1.1    ichiro 
    591        1.1    ichiro 	ifp->if_flags |= IFF_RUNNING;
    592        1.1    ichiro 	ifp->if_flags &= ~IFF_OACTIVE;
    593        1.1    ichiro 
    594       1.38    dyoung 	callout_reset(&sc->sc_stat_ch, hz, url_tick, sc);
    595        1.1    ichiro 
    596       1.30    dyoung out:
    597       1.30    dyoung 	splx(s);
    598       1.30    dyoung 	return rc;
    599        1.1    ichiro }
    600        1.1    ichiro 
    601        1.1    ichiro Static void
    602        1.1    ichiro url_reset(struct url_softc *sc)
    603        1.1    ichiro {
    604        1.1    ichiro 	int i;
    605        1.5  augustss 
    606       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    607        1.1    ichiro 
    608        1.1    ichiro 	if (sc->sc_dying)
    609        1.1    ichiro 		return;
    610        1.1    ichiro 
    611        1.1    ichiro 	URL_SETBIT(sc, URL_CR, URL_CR_SOFT_RST);
    612        1.1    ichiro 
    613        1.1    ichiro 	for (i = 0; i < URL_TX_TIMEOUT; i++) {
    614        1.1    ichiro 		if (!(url_csr_read_1(sc, URL_CR) & URL_CR_SOFT_RST))
    615        1.1    ichiro 			break;
    616        1.1    ichiro 		delay(10);	/* XXX */
    617        1.1    ichiro 	}
    618        1.1    ichiro 
    619        1.1    ichiro 	delay(10000);		/* XXX */
    620        1.1    ichiro }
    621        1.1    ichiro 
    622        1.1    ichiro int
    623       1.38    dyoung url_activate(device_t self, enum devact act)
    624        1.1    ichiro {
    625       1.32      cube 	struct url_softc *sc = device_private(self);
    626        1.1    ichiro 
    627       1.38    dyoung 	DPRINTF(("%s: %s: enter, act=%d\n", device_xname(sc->sc_dev),
    628        1.4  augustss 		 __func__, act));
    629        1.1    ichiro 
    630        1.1    ichiro 	switch (act) {
    631        1.1    ichiro 	case DVACT_DEACTIVATE:
    632        1.1    ichiro 		if_deactivate(&sc->sc_ec.ec_if);
    633        1.1    ichiro 		sc->sc_dying = 1;
    634       1.35    dyoung 		return 0;
    635       1.35    dyoung 	default:
    636       1.35    dyoung 		return EOPNOTSUPP;
    637        1.1    ichiro 	}
    638        1.1    ichiro }
    639        1.1    ichiro 
    640        1.1    ichiro #define url_calchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) >> 26)
    641        1.1    ichiro 
    642        1.1    ichiro 
    643        1.1    ichiro Static void
    644        1.1    ichiro url_setmulti(struct url_softc *sc)
    645        1.1    ichiro {
    646        1.1    ichiro 	struct ifnet *ifp;
    647        1.1    ichiro 	struct ether_multi *enm;
    648        1.1    ichiro 	struct ether_multistep step;
    649   1.48.4.1     skrll 	uint32_t hashes[2] = { 0, 0 };
    650        1.1    ichiro 	int h = 0;
    651        1.1    ichiro 	int mcnt = 0;
    652        1.1    ichiro 
    653       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    654        1.1    ichiro 
    655        1.1    ichiro 	if (sc->sc_dying)
    656        1.1    ichiro 		return;
    657        1.1    ichiro 
    658        1.1    ichiro 	ifp = GET_IFP(sc);
    659        1.1    ichiro 
    660        1.1    ichiro 	if (ifp->if_flags & IFF_PROMISC) {
    661        1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    662        1.1    ichiro 		return;
    663        1.1    ichiro 	} else if (ifp->if_flags & IFF_ALLMULTI) {
    664        1.1    ichiro 	allmulti:
    665        1.1    ichiro 		ifp->if_flags |= IFF_ALLMULTI;
    666        1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AAM);
    667        1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAP);
    668        1.1    ichiro 		return;
    669        1.1    ichiro 	}
    670        1.1    ichiro 
    671        1.1    ichiro 	/* first, zot all the existing hash bits */
    672        1.1    ichiro 	url_csr_write_4(sc, URL_MAR0, 0);
    673        1.1    ichiro 	url_csr_write_4(sc, URL_MAR4, 0);
    674        1.1    ichiro 
    675        1.1    ichiro 	/* now program new ones */
    676        1.1    ichiro 	ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
    677        1.1    ichiro 	while (enm != NULL) {
    678        1.1    ichiro 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
    679        1.1    ichiro 			   ETHER_ADDR_LEN) != 0)
    680        1.1    ichiro 			goto allmulti;
    681        1.1    ichiro 
    682        1.1    ichiro 		h = url_calchash(enm->enm_addrlo);
    683        1.1    ichiro 		if (h < 32)
    684        1.1    ichiro 			hashes[0] |= (1 << h);
    685        1.1    ichiro 		else
    686        1.1    ichiro 			hashes[1] |= (1 << (h -32));
    687        1.1    ichiro 		mcnt++;
    688        1.1    ichiro 		ETHER_NEXT_MULTI(step, enm);
    689        1.1    ichiro 	}
    690        1.1    ichiro 
    691        1.1    ichiro 	ifp->if_flags &= ~IFF_ALLMULTI;
    692        1.1    ichiro 
    693        1.1    ichiro 	URL_CLRBIT2(sc, URL_RCR, URL_RCR_AAM|URL_RCR_AAP);
    694        1.1    ichiro 
    695        1.1    ichiro 	if (mcnt){
    696        1.1    ichiro 		URL_SETBIT2(sc, URL_RCR, URL_RCR_AM);
    697        1.1    ichiro 	} else {
    698        1.1    ichiro 		URL_CLRBIT2(sc, URL_RCR, URL_RCR_AM);
    699        1.1    ichiro 	}
    700        1.1    ichiro 	url_csr_write_4(sc, URL_MAR0, hashes[0]);
    701        1.1    ichiro 	url_csr_write_4(sc, URL_MAR4, hashes[1]);
    702        1.1    ichiro }
    703        1.1    ichiro 
    704        1.1    ichiro Static int
    705        1.1    ichiro url_openpipes(struct url_softc *sc)
    706        1.1    ichiro {
    707        1.1    ichiro 	usbd_status err;
    708        1.1    ichiro 	int error = 0;
    709        1.1    ichiro 
    710        1.1    ichiro 	if (sc->sc_dying)
    711   1.48.4.3     skrll 		return EIO;
    712        1.5  augustss 
    713        1.1    ichiro 	sc->sc_refcnt++;
    714        1.1    ichiro 
    715        1.1    ichiro 	/* Open RX pipe */
    716        1.1    ichiro 	err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkin_no,
    717        1.1    ichiro 			     USBD_EXCLUSIVE_USE, &sc->sc_pipe_rx);
    718        1.1    ichiro 	if (err) {
    719        1.1    ichiro 		printf("%s: open rx pipe failed: %s\n",
    720       1.38    dyoung 		       device_xname(sc->sc_dev), usbd_errstr(err));
    721        1.1    ichiro 		error = EIO;
    722        1.1    ichiro 		goto done;
    723        1.1    ichiro 	}
    724        1.5  augustss 
    725        1.1    ichiro 	/* Open TX pipe */
    726        1.1    ichiro 	err = usbd_open_pipe(sc->sc_ctl_iface, sc->sc_bulkout_no,
    727        1.1    ichiro 			     USBD_EXCLUSIVE_USE, &sc->sc_pipe_tx);
    728        1.1    ichiro 	if (err) {
    729        1.1    ichiro 		printf("%s: open tx pipe failed: %s\n",
    730       1.38    dyoung 		       device_xname(sc->sc_dev), usbd_errstr(err));
    731        1.1    ichiro 		error = EIO;
    732        1.1    ichiro 		goto done;
    733        1.1    ichiro 	}
    734        1.1    ichiro 
    735        1.1    ichiro #if 0
    736        1.1    ichiro 	/* XXX: interrupt endpoint is not yet supported */
    737        1.1    ichiro 	/* Open Interrupt pipe */
    738        1.1    ichiro 	err = usbd_open_pipe_intr(sc->sc_ctl_iface, sc->sc_intrin_no,
    739        1.1    ichiro 				  USBD_EXCLUSIVE_USE, &sc->sc_pipe_intr, sc,
    740        1.1    ichiro 				  &sc->sc_cdata.url_ibuf, URL_INTR_PKGLEN,
    741       1.24  drochner 				  url_intr, USBD_DEFAULT_INTERVAL);
    742        1.1    ichiro 	if (err) {
    743        1.1    ichiro 		printf("%s: open intr pipe failed: %s\n",
    744       1.38    dyoung 		       device_xname(sc->sc_dev), usbd_errstr(err));
    745        1.1    ichiro 		error = EIO;
    746        1.1    ichiro 		goto done;
    747        1.1    ichiro 	}
    748        1.1    ichiro #endif
    749        1.1    ichiro 
    750        1.1    ichiro  done:
    751        1.1    ichiro 	if (--sc->sc_refcnt < 0)
    752       1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
    753        1.5  augustss 
    754   1.48.4.3     skrll 	return error;
    755        1.1    ichiro }
    756        1.1    ichiro 
    757        1.1    ichiro Static int
    758        1.1    ichiro url_newbuf(struct url_softc *sc, struct url_chain *c, struct mbuf *m)
    759        1.1    ichiro {
    760        1.1    ichiro 	struct mbuf *m_new = NULL;
    761        1.1    ichiro 
    762       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    763        1.1    ichiro 
    764        1.1    ichiro 	if (m == NULL) {
    765        1.1    ichiro 		MGETHDR(m_new, M_DONTWAIT, MT_DATA);
    766        1.1    ichiro 		if (m_new == NULL) {
    767        1.1    ichiro 			printf("%s: no memory for rx list "
    768       1.38    dyoung 			       "-- packet dropped!\n", device_xname(sc->sc_dev));
    769   1.48.4.3     skrll 			return ENOBUFS;
    770        1.1    ichiro 		}
    771        1.1    ichiro 		MCLGET(m_new, M_DONTWAIT);
    772        1.1    ichiro 		if (!(m_new->m_flags & M_EXT)) {
    773        1.1    ichiro 			printf("%s: no memory for rx list "
    774       1.38    dyoung 			       "-- packet dropped!\n", device_xname(sc->sc_dev));
    775        1.1    ichiro 			m_freem(m_new);
    776   1.48.4.3     skrll 			return ENOBUFS;
    777        1.1    ichiro 		}
    778        1.1    ichiro 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
    779        1.1    ichiro 	} else {
    780        1.1    ichiro 		m_new = m;
    781        1.1    ichiro 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
    782        1.1    ichiro 		m_new->m_data = m_new->m_ext.ext_buf;
    783        1.1    ichiro 	}
    784        1.1    ichiro 
    785        1.1    ichiro 	m_adj(m_new, ETHER_ALIGN);
    786        1.1    ichiro 	c->url_mbuf = m_new;
    787        1.1    ichiro 
    788   1.48.4.3     skrll 	return 0;
    789        1.1    ichiro }
    790        1.5  augustss 
    791        1.1    ichiro 
    792        1.1    ichiro Static int
    793        1.1    ichiro url_rx_list_init(struct url_softc *sc)
    794        1.1    ichiro {
    795        1.1    ichiro 	struct url_cdata *cd;
    796        1.1    ichiro 	struct url_chain *c;
    797        1.1    ichiro 	int i;
    798        1.1    ichiro 
    799       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    800        1.1    ichiro 
    801        1.1    ichiro 	cd = &sc->sc_cdata;
    802        1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
    803        1.1    ichiro 		c = &cd->url_rx_chain[i];
    804        1.1    ichiro 		c->url_sc = sc;
    805        1.1    ichiro 		c->url_idx = i;
    806        1.1    ichiro 		if (url_newbuf(sc, c, NULL) == ENOBUFS)
    807   1.48.4.3     skrll 			return ENOBUFS;
    808        1.1    ichiro 		if (c->url_xfer == NULL) {
    809   1.48.4.7     skrll 			int error = usbd_create_xfer(sc->sc_pipe_rx, URL_BUFSZ,
    810   1.48.4.7     skrll 			    USBD_SHORT_XFER_OK, 0, &c->url_xfer);
    811   1.48.4.7     skrll 			if (error)
    812   1.48.4.7     skrll 				return error;
    813   1.48.4.7     skrll 			c->url_buf = usbd_get_buffer(c->url_xfer);
    814        1.1    ichiro 		}
    815        1.1    ichiro 	}
    816        1.5  augustss 
    817   1.48.4.3     skrll 	return 0;
    818        1.1    ichiro }
    819        1.1    ichiro 
    820        1.1    ichiro Static int
    821        1.1    ichiro url_tx_list_init(struct url_softc *sc)
    822        1.1    ichiro {
    823        1.1    ichiro 	struct url_cdata *cd;
    824        1.1    ichiro 	struct url_chain *c;
    825        1.1    ichiro 	int i;
    826        1.1    ichiro 
    827       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    828        1.1    ichiro 
    829        1.1    ichiro 	cd = &sc->sc_cdata;
    830        1.1    ichiro 	for (i = 0; i < URL_TX_LIST_CNT; i++) {
    831        1.1    ichiro 		c = &cd->url_tx_chain[i];
    832        1.1    ichiro 		c->url_sc = sc;
    833        1.1    ichiro 		c->url_idx = i;
    834        1.1    ichiro 		c->url_mbuf = NULL;
    835        1.1    ichiro 		if (c->url_xfer == NULL) {
    836   1.48.4.7     skrll 			int error = usbd_create_xfer(sc->sc_pipe_tx, URL_BUFSZ,
    837   1.48.4.7     skrll 			    USBD_FORCE_SHORT_XFER, 0, &c->url_xfer);
    838   1.48.4.7     skrll 			if (error)
    839   1.48.4.7     skrll 				return error;
    840   1.48.4.7     skrll 			c->url_buf = usbd_get_buffer(c->url_xfer);
    841        1.1    ichiro 		}
    842        1.1    ichiro 	}
    843        1.5  augustss 
    844   1.48.4.3     skrll 	return 0;
    845        1.1    ichiro }
    846        1.1    ichiro 
    847        1.1    ichiro Static void
    848        1.1    ichiro url_start(struct ifnet *ifp)
    849        1.1    ichiro {
    850        1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
    851        1.1    ichiro 	struct mbuf *m_head = NULL;
    852        1.5  augustss 
    853       1.38    dyoung 	DPRINTF(("%s: %s: enter, link=%d\n", device_xname(sc->sc_dev),
    854        1.4  augustss 		 __func__, sc->sc_link));
    855        1.1    ichiro 
    856        1.1    ichiro 	if (sc->sc_dying)
    857        1.1    ichiro 		return;
    858        1.1    ichiro 
    859        1.1    ichiro 	if (!sc->sc_link)
    860        1.1    ichiro 		return;
    861        1.1    ichiro 
    862        1.1    ichiro 	if (ifp->if_flags & IFF_OACTIVE)
    863        1.1    ichiro 		return;
    864        1.1    ichiro 
    865        1.1    ichiro 	IFQ_POLL(&ifp->if_snd, m_head);
    866        1.1    ichiro 	if (m_head == NULL)
    867        1.1    ichiro 		return;
    868        1.1    ichiro 
    869        1.1    ichiro 	if (url_send(sc, m_head, 0)) {
    870        1.1    ichiro 		ifp->if_flags |= IFF_OACTIVE;
    871        1.1    ichiro 		return;
    872        1.1    ichiro 	}
    873        1.1    ichiro 
    874        1.1    ichiro 	IFQ_DEQUEUE(&ifp->if_snd, m_head);
    875        1.1    ichiro 
    876       1.37     joerg 	bpf_mtap(ifp, m_head);
    877        1.1    ichiro 
    878        1.1    ichiro 	ifp->if_flags |= IFF_OACTIVE;
    879        1.1    ichiro 
    880        1.1    ichiro 	/* Set a timeout in case the chip goes out to lunch. */
    881        1.1    ichiro 	ifp->if_timer = 5;
    882        1.1    ichiro }
    883        1.1    ichiro 
    884        1.1    ichiro Static int
    885        1.1    ichiro url_send(struct url_softc *sc, struct mbuf *m, int idx)
    886        1.1    ichiro {
    887        1.1    ichiro 	int total_len;
    888        1.1    ichiro 	struct url_chain *c;
    889        1.1    ichiro 	usbd_status err;
    890        1.1    ichiro 
    891       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev),__func__));
    892        1.1    ichiro 
    893        1.1    ichiro 	c = &sc->sc_cdata.url_tx_chain[idx];
    894        1.1    ichiro 
    895        1.1    ichiro 	/* Copy the mbuf data into a contiguous buffer */
    896        1.1    ichiro 	m_copydata(m, 0, m->m_pkthdr.len, c->url_buf);
    897        1.1    ichiro 	c->url_mbuf = m;
    898        1.1    ichiro 	total_len = m->m_pkthdr.len;
    899        1.1    ichiro 
    900        1.7    bouyer 	if (total_len < URL_MIN_FRAME_LEN) {
    901        1.7    bouyer 		memset(c->url_buf + total_len, 0,
    902        1.7    bouyer 		    URL_MIN_FRAME_LEN - total_len);
    903        1.1    ichiro 		total_len = URL_MIN_FRAME_LEN;
    904        1.7    bouyer 	}
    905   1.48.4.7     skrll 	usbd_setup_xfer(c->url_xfer,c, c->url_buf, total_len,
    906   1.48.4.7     skrll 	    USBD_FORCE_SHORT_XFER, URL_TX_TIMEOUT, url_txeof);
    907        1.1    ichiro 
    908        1.1    ichiro 	/* Transmit */
    909        1.1    ichiro 	sc->sc_refcnt++;
    910        1.1    ichiro 	err = usbd_transfer(c->url_xfer);
    911        1.1    ichiro 	if (--sc->sc_refcnt < 0)
    912       1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
    913        1.1    ichiro 	if (err != USBD_IN_PROGRESS) {
    914       1.38    dyoung 		printf("%s: url_send error=%s\n", device_xname(sc->sc_dev),
    915        1.1    ichiro 		       usbd_errstr(err));
    916        1.1    ichiro 		/* Stop the interface */
    917       1.22     joerg 		usb_add_task(sc->sc_udev, &sc->sc_stop_task,
    918       1.22     joerg 		    USB_TASKQ_DRIVER);
    919   1.48.4.3     skrll 		return EIO;
    920        1.1    ichiro 	}
    921        1.1    ichiro 
    922       1.38    dyoung 	DPRINTF(("%s: %s: send %d bytes\n", device_xname(sc->sc_dev),
    923        1.4  augustss 		 __func__, total_len));
    924        1.1    ichiro 
    925        1.1    ichiro 	sc->sc_cdata.url_tx_cnt++;
    926        1.1    ichiro 
    927   1.48.4.3     skrll 	return 0;
    928        1.1    ichiro }
    929        1.1    ichiro 
    930        1.1    ichiro Static void
    931   1.48.4.4     skrll url_txeof(struct usbd_xfer *xfer, void *priv,
    932       1.21  christos     usbd_status status)
    933        1.1    ichiro {
    934        1.1    ichiro 	struct url_chain *c = priv;
    935        1.1    ichiro 	struct url_softc *sc = c->url_sc;
    936        1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    937        1.1    ichiro 	int s;
    938        1.1    ichiro 
    939        1.1    ichiro 	if (sc->sc_dying)
    940        1.1    ichiro 		return;
    941        1.1    ichiro 
    942        1.1    ichiro 	s = splnet();
    943        1.1    ichiro 
    944       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
    945        1.1    ichiro 
    946        1.1    ichiro 	ifp->if_timer = 0;
    947        1.1    ichiro 	ifp->if_flags &= ~IFF_OACTIVE;
    948        1.1    ichiro 
    949        1.1    ichiro 	if (status != USBD_NORMAL_COMPLETION) {
    950        1.1    ichiro 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED) {
    951        1.1    ichiro 			splx(s);
    952        1.1    ichiro 			return;
    953        1.1    ichiro 		}
    954        1.1    ichiro 		ifp->if_oerrors++;
    955       1.38    dyoung 		printf("%s: usb error on tx: %s\n", device_xname(sc->sc_dev),
    956        1.1    ichiro 		       usbd_errstr(status));
    957        1.1    ichiro 		if (status == USBD_STALLED) {
    958        1.1    ichiro 			sc->sc_refcnt++;
    959       1.18  augustss 			usbd_clear_endpoint_stall_async(sc->sc_pipe_tx);
    960        1.1    ichiro 			if (--sc->sc_refcnt < 0)
    961       1.42       mrg 				usb_detach_wakeupold(sc->sc_dev);
    962        1.1    ichiro 		}
    963        1.1    ichiro 		splx(s);
    964        1.1    ichiro 		return;
    965        1.1    ichiro 	}
    966        1.1    ichiro 
    967        1.1    ichiro 	ifp->if_opackets++;
    968        1.1    ichiro 
    969        1.6    martin 	m_freem(c->url_mbuf);
    970        1.1    ichiro 	c->url_mbuf = NULL;
    971        1.1    ichiro 
    972        1.1    ichiro 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
    973        1.1    ichiro 		url_start(ifp);
    974        1.1    ichiro 
    975        1.1    ichiro 	splx(s);
    976        1.1    ichiro }
    977        1.1    ichiro 
    978        1.1    ichiro Static void
    979   1.48.4.4     skrll url_rxeof(struct usbd_xfer *xfer, void *priv, usbd_status status)
    980        1.1    ichiro {
    981        1.1    ichiro 	struct url_chain *c = priv;
    982        1.1    ichiro 	struct url_softc *sc = c->url_sc;
    983        1.1    ichiro 	struct ifnet *ifp = GET_IFP(sc);
    984        1.1    ichiro 	struct mbuf *m;
    985   1.48.4.1     skrll 	uint32_t total_len;
    986        1.1    ichiro 	url_rxhdr_t rxhdr;
    987        1.1    ichiro 	int s;
    988        1.1    ichiro 
    989       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev),__func__));
    990        1.1    ichiro 
    991        1.1    ichiro 	if (sc->sc_dying)
    992        1.1    ichiro 		return;
    993        1.1    ichiro 
    994        1.1    ichiro 	if (status != USBD_NORMAL_COMPLETION) {
    995        1.1    ichiro 		if (status == USBD_NOT_STARTED || status == USBD_CANCELLED)
    996        1.1    ichiro 			return;
    997        1.1    ichiro 		sc->sc_rx_errs++;
    998        1.1    ichiro 		if (usbd_ratecheck(&sc->sc_rx_notice)) {
    999        1.1    ichiro 			printf("%s: %u usb errors on rx: %s\n",
   1000       1.38    dyoung 			       device_xname(sc->sc_dev), sc->sc_rx_errs,
   1001        1.1    ichiro 			       usbd_errstr(status));
   1002        1.1    ichiro 			sc->sc_rx_errs = 0;
   1003        1.1    ichiro 		}
   1004        1.1    ichiro 		if (status == USBD_STALLED) {
   1005        1.1    ichiro 			sc->sc_refcnt++;
   1006       1.18  augustss 			usbd_clear_endpoint_stall_async(sc->sc_pipe_rx);
   1007        1.1    ichiro 			if (--sc->sc_refcnt < 0)
   1008       1.42       mrg 				usb_detach_wakeupold(sc->sc_dev);
   1009        1.1    ichiro 		}
   1010        1.1    ichiro 		goto done;
   1011        1.1    ichiro 	}
   1012        1.1    ichiro 
   1013        1.1    ichiro 	usbd_get_xfer_status(xfer, NULL, NULL, &total_len, NULL);
   1014        1.1    ichiro 
   1015        1.1    ichiro 	memcpy(mtod(c->url_mbuf, char *), c->url_buf, total_len);
   1016        1.1    ichiro 
   1017        1.1    ichiro 	if (total_len <= ETHER_CRC_LEN) {
   1018        1.1    ichiro 		ifp->if_ierrors++;
   1019        1.1    ichiro 		goto done;
   1020        1.1    ichiro 	}
   1021        1.1    ichiro 
   1022        1.1    ichiro 	memcpy(&rxhdr, c->url_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr));
   1023        1.1    ichiro 
   1024        1.1    ichiro 	DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n",
   1025       1.38    dyoung 		 device_xname(sc->sc_dev),
   1026        1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK,
   1027        1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "",
   1028        1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "",
   1029        1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "",
   1030        1.1    ichiro 		 UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : ""));
   1031        1.1    ichiro 
   1032        1.1    ichiro 	if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) {
   1033        1.1    ichiro 		ifp->if_ierrors++;
   1034        1.1    ichiro 		goto done;
   1035        1.1    ichiro 	}
   1036        1.1    ichiro 
   1037        1.1    ichiro 	ifp->if_ipackets++;
   1038        1.1    ichiro 	total_len -= ETHER_CRC_LEN;
   1039        1.1    ichiro 
   1040        1.1    ichiro 	m = c->url_mbuf;
   1041        1.1    ichiro 	m->m_pkthdr.len = m->m_len = total_len;
   1042  1.48.4.10     skrll 	m_set_rcvif(m, ifp);
   1043        1.1    ichiro 
   1044        1.1    ichiro 	s = splnet();
   1045        1.1    ichiro 
   1046        1.1    ichiro 	if (url_newbuf(sc, c, NULL) == ENOBUFS) {
   1047        1.1    ichiro 		ifp->if_ierrors++;
   1048        1.1    ichiro 		goto done1;
   1049        1.1    ichiro 	}
   1050        1.1    ichiro 
   1051       1.37     joerg 	bpf_mtap(ifp, m);
   1052        1.1    ichiro 
   1053       1.38    dyoung 	DPRINTF(("%s: %s: deliver %d\n", device_xname(sc->sc_dev),
   1054        1.4  augustss 		 __func__, m->m_len));
   1055   1.48.4.9     skrll 	if_percpuq_enqueue((ifp)->if_percpuq, (m));
   1056        1.1    ichiro 
   1057        1.1    ichiro  done1:
   1058        1.1    ichiro 	splx(s);
   1059        1.1    ichiro 
   1060        1.1    ichiro  done:
   1061        1.1    ichiro 	/* Setup new transfer */
   1062   1.48.4.7     skrll 	usbd_setup_xfer(xfer, c, c->url_buf, URL_BUFSZ, USBD_SHORT_XFER_OK,
   1063   1.48.4.7     skrll 	    USBD_NO_TIMEOUT, url_rxeof);
   1064        1.1    ichiro 	sc->sc_refcnt++;
   1065        1.1    ichiro 	usbd_transfer(xfer);
   1066        1.1    ichiro 	if (--sc->sc_refcnt < 0)
   1067       1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
   1068        1.1    ichiro 
   1069       1.38    dyoung 	DPRINTF(("%s: %s: start rx\n", device_xname(sc->sc_dev), __func__));
   1070        1.1    ichiro }
   1071        1.1    ichiro 
   1072        1.1    ichiro #if 0
   1073       1.33    cegger Static void url_intr(void)
   1074        1.1    ichiro {
   1075        1.1    ichiro }
   1076        1.1    ichiro #endif
   1077        1.1    ichiro 
   1078        1.1    ichiro Static int
   1079       1.25  christos url_ioctl(struct ifnet *ifp, u_long cmd, void *data)
   1080        1.1    ichiro {
   1081        1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1082        1.1    ichiro 	int s, error = 0;
   1083        1.1    ichiro 
   1084       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1085        1.1    ichiro 
   1086        1.1    ichiro 	if (sc->sc_dying)
   1087   1.48.4.3     skrll 		return EIO;
   1088        1.1    ichiro 
   1089        1.1    ichiro 	s = splnet();
   1090        1.1    ichiro 
   1091       1.30    dyoung 	error = ether_ioctl(ifp, cmd, data);
   1092       1.30    dyoung 	if (error == ENETRESET) {
   1093       1.30    dyoung 		if (ifp->if_flags & IFF_RUNNING)
   1094       1.30    dyoung 			url_setmulti(sc);
   1095       1.30    dyoung 		error = 0;
   1096        1.1    ichiro 	}
   1097        1.1    ichiro 
   1098        1.1    ichiro 	splx(s);
   1099        1.1    ichiro 
   1100   1.48.4.3     skrll 	return error;
   1101        1.1    ichiro }
   1102        1.1    ichiro 
   1103        1.1    ichiro Static void
   1104        1.1    ichiro url_watchdog(struct ifnet *ifp)
   1105        1.1    ichiro {
   1106        1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1107        1.1    ichiro 	struct url_chain *c;
   1108        1.1    ichiro 	usbd_status stat;
   1109        1.1    ichiro 	int s;
   1110        1.5  augustss 
   1111       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1112        1.1    ichiro 
   1113        1.1    ichiro 	ifp->if_oerrors++;
   1114       1.38    dyoung 	printf("%s: watchdog timeout\n", device_xname(sc->sc_dev));
   1115        1.1    ichiro 
   1116        1.1    ichiro 	s = splusb();
   1117        1.1    ichiro 	c = &sc->sc_cdata.url_tx_chain[0];
   1118        1.1    ichiro 	usbd_get_xfer_status(c->url_xfer, NULL, NULL, NULL, &stat);
   1119        1.1    ichiro 	url_txeof(c->url_xfer, c, stat);
   1120        1.1    ichiro 
   1121        1.1    ichiro 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1122        1.1    ichiro 		url_start(ifp);
   1123        1.1    ichiro 	splx(s);
   1124        1.1    ichiro }
   1125        1.1    ichiro 
   1126        1.1    ichiro Static void
   1127        1.1    ichiro url_stop_task(struct url_softc *sc)
   1128        1.1    ichiro {
   1129        1.1    ichiro 	url_stop(GET_IFP(sc), 1);
   1130        1.1    ichiro }
   1131        1.1    ichiro 
   1132        1.1    ichiro /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */
   1133        1.1    ichiro Static void
   1134       1.23  christos url_stop(struct ifnet *ifp, int disable)
   1135        1.1    ichiro {
   1136        1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1137        1.1    ichiro 	usbd_status err;
   1138        1.1    ichiro 	int i;
   1139        1.5  augustss 
   1140       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1141        1.1    ichiro 
   1142        1.1    ichiro 	ifp->if_timer = 0;
   1143        1.1    ichiro 
   1144        1.1    ichiro 	url_reset(sc);
   1145        1.1    ichiro 
   1146       1.38    dyoung 	callout_stop(&sc->sc_stat_ch);
   1147        1.1    ichiro 
   1148        1.1    ichiro 	/* Stop transfers */
   1149        1.1    ichiro 	/* RX endpoint */
   1150        1.1    ichiro 	if (sc->sc_pipe_rx != NULL) {
   1151        1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_rx);
   1152        1.1    ichiro 		if (err)
   1153        1.1    ichiro 			printf("%s: abort rx pipe failed: %s\n",
   1154       1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1155        1.1    ichiro 	}
   1156        1.1    ichiro 
   1157        1.1    ichiro 	/* TX endpoint */
   1158        1.1    ichiro 	if (sc->sc_pipe_tx != NULL) {
   1159        1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_tx);
   1160        1.1    ichiro 		if (err)
   1161        1.1    ichiro 			printf("%s: abort tx pipe failed: %s\n",
   1162       1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1163        1.1    ichiro 	}
   1164        1.1    ichiro 
   1165        1.1    ichiro #if 0
   1166        1.1    ichiro 	/* XXX: Interrupt endpoint is not yet supported!! */
   1167        1.1    ichiro 	/* Interrupt endpoint */
   1168        1.1    ichiro 	if (sc->sc_pipe_intr != NULL) {
   1169        1.1    ichiro 		err = usbd_abort_pipe(sc->sc_pipe_intr);
   1170        1.1    ichiro 		if (err)
   1171        1.1    ichiro 			printf("%s: abort intr pipe failed: %s\n",
   1172       1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1173        1.1    ichiro 		err = usbd_close_pipe(sc->sc_pipe_intr);
   1174        1.1    ichiro 		if (err)
   1175        1.1    ichiro 			printf("%s: close intr pipe failed: %s\n",
   1176       1.38    dyoung 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1177        1.1    ichiro 		sc->sc_pipe_intr = NULL;
   1178        1.1    ichiro 	}
   1179        1.1    ichiro #endif
   1180        1.1    ichiro 
   1181        1.1    ichiro 	/* Free RX resources. */
   1182        1.1    ichiro 	for (i = 0; i < URL_RX_LIST_CNT; i++) {
   1183        1.1    ichiro 		if (sc->sc_cdata.url_rx_chain[i].url_mbuf != NULL) {
   1184        1.1    ichiro 			m_freem(sc->sc_cdata.url_rx_chain[i].url_mbuf);
   1185        1.1    ichiro 			sc->sc_cdata.url_rx_chain[i].url_mbuf = NULL;
   1186        1.1    ichiro 		}
   1187        1.1    ichiro 		if (sc->sc_cdata.url_rx_chain[i].url_xfer != NULL) {
   1188   1.48.4.7     skrll 			usbd_destroy_xfer(sc->sc_cdata.url_rx_chain[i].url_xfer);
   1189        1.1    ichiro 			sc->sc_cdata.url_rx_chain[i].url_xfer = NULL;
   1190        1.1    ichiro 		}
   1191        1.1    ichiro 	}
   1192        1.1    ichiro 
   1193        1.1    ichiro 	/* Free TX resources. */
   1194        1.1    ichiro 	for (i = 0; i < URL_TX_LIST_CNT; i++) {
   1195        1.1    ichiro 		if (sc->sc_cdata.url_tx_chain[i].url_mbuf != NULL) {
   1196        1.1    ichiro 			m_freem(sc->sc_cdata.url_tx_chain[i].url_mbuf);
   1197        1.1    ichiro 			sc->sc_cdata.url_tx_chain[i].url_mbuf = NULL;
   1198        1.1    ichiro 		}
   1199        1.1    ichiro 		if (sc->sc_cdata.url_tx_chain[i].url_xfer != NULL) {
   1200   1.48.4.7     skrll 			usbd_destroy_xfer(sc->sc_cdata.url_tx_chain[i].url_xfer);
   1201        1.1    ichiro 			sc->sc_cdata.url_tx_chain[i].url_xfer = NULL;
   1202        1.1    ichiro 		}
   1203        1.1    ichiro 	}
   1204        1.1    ichiro 
   1205   1.48.4.8     skrll 	/* Close pipes */
   1206   1.48.4.8     skrll 	/* RX endpoint */
   1207   1.48.4.8     skrll 	if (sc->sc_pipe_rx != NULL) {
   1208   1.48.4.8     skrll 		err = usbd_close_pipe(sc->sc_pipe_rx);
   1209   1.48.4.8     skrll 		if (err)
   1210   1.48.4.8     skrll 			printf("%s: close rx pipe failed: %s\n",
   1211   1.48.4.8     skrll 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1212   1.48.4.8     skrll 		sc->sc_pipe_rx = NULL;
   1213   1.48.4.8     skrll 	}
   1214   1.48.4.8     skrll 
   1215   1.48.4.8     skrll 	/* TX endpoint */
   1216   1.48.4.8     skrll 	if (sc->sc_pipe_tx != NULL) {
   1217   1.48.4.8     skrll 		err = usbd_close_pipe(sc->sc_pipe_tx);
   1218   1.48.4.8     skrll 		if (err)
   1219   1.48.4.8     skrll 			printf("%s: close tx pipe failed: %s\n",
   1220   1.48.4.8     skrll 			       device_xname(sc->sc_dev), usbd_errstr(err));
   1221   1.48.4.8     skrll 		sc->sc_pipe_tx = NULL;
   1222   1.48.4.8     skrll 	}
   1223   1.48.4.8     skrll 
   1224        1.1    ichiro 	sc->sc_link = 0;
   1225        1.1    ichiro 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1226        1.1    ichiro }
   1227        1.1    ichiro 
   1228        1.1    ichiro /* Set media options */
   1229        1.1    ichiro Static int
   1230        1.1    ichiro url_ifmedia_change(struct ifnet *ifp)
   1231        1.1    ichiro {
   1232        1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1233        1.1    ichiro 	struct mii_data *mii = GET_MII(sc);
   1234       1.30    dyoung 	int rc;
   1235        1.1    ichiro 
   1236       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1237        1.1    ichiro 
   1238        1.1    ichiro 	if (sc->sc_dying)
   1239   1.48.4.3     skrll 		return 0;
   1240        1.1    ichiro 
   1241        1.1    ichiro 	sc->sc_link = 0;
   1242       1.30    dyoung 	if ((rc = mii_mediachg(mii)) == ENXIO)
   1243       1.30    dyoung 		return 0;
   1244       1.30    dyoung 	return rc;
   1245        1.1    ichiro }
   1246        1.1    ichiro 
   1247        1.1    ichiro /* Report current media status. */
   1248        1.1    ichiro Static void
   1249        1.1    ichiro url_ifmedia_status(struct ifnet *ifp, struct ifmediareq *ifmr)
   1250        1.1    ichiro {
   1251        1.1    ichiro 	struct url_softc *sc = ifp->if_softc;
   1252        1.1    ichiro 
   1253       1.38    dyoung 	DPRINTF(("%s: %s: enter\n", device_xname(sc->sc_dev), __func__));
   1254        1.1    ichiro 
   1255        1.1    ichiro 	if (sc->sc_dying)
   1256        1.1    ichiro 		return;
   1257        1.1    ichiro 
   1258       1.30    dyoung 	ether_mediastatus(ifp, ifmr);
   1259        1.1    ichiro }
   1260        1.1    ichiro 
   1261        1.1    ichiro Static void
   1262        1.1    ichiro url_tick(void *xsc)
   1263        1.1    ichiro {
   1264        1.1    ichiro 	struct url_softc *sc = xsc;
   1265        1.1    ichiro 
   1266        1.1    ichiro 	if (sc == NULL)
   1267        1.1    ichiro 		return;
   1268        1.1    ichiro 
   1269       1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1270        1.4  augustss 			__func__));
   1271        1.1    ichiro 
   1272        1.1    ichiro 	if (sc->sc_dying)
   1273        1.1    ichiro 		return;
   1274        1.1    ichiro 
   1275        1.1    ichiro 	/* Perform periodic stuff in process context */
   1276       1.22     joerg 	usb_add_task(sc->sc_udev, &sc->sc_tick_task, USB_TASKQ_DRIVER);
   1277        1.1    ichiro }
   1278        1.1    ichiro 
   1279        1.1    ichiro Static void
   1280        1.1    ichiro url_tick_task(void *xsc)
   1281        1.1    ichiro {
   1282        1.1    ichiro 	struct url_softc *sc = xsc;
   1283        1.1    ichiro 	struct ifnet *ifp;
   1284        1.1    ichiro 	struct mii_data *mii;
   1285        1.1    ichiro 	int s;
   1286        1.1    ichiro 
   1287        1.1    ichiro 	if (sc == NULL)
   1288        1.1    ichiro 		return;
   1289        1.1    ichiro 
   1290       1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1291        1.4  augustss 			__func__));
   1292        1.1    ichiro 
   1293        1.1    ichiro 	if (sc->sc_dying)
   1294        1.1    ichiro 		return;
   1295        1.1    ichiro 
   1296        1.1    ichiro 	ifp = GET_IFP(sc);
   1297        1.1    ichiro 	mii = GET_MII(sc);
   1298        1.1    ichiro 
   1299        1.1    ichiro 	if (mii == NULL)
   1300        1.1    ichiro 		return;
   1301        1.1    ichiro 
   1302        1.1    ichiro 	s = splnet();
   1303        1.1    ichiro 
   1304        1.1    ichiro 	mii_tick(mii);
   1305        1.1    ichiro 	if (!sc->sc_link) {
   1306        1.1    ichiro 		mii_pollstat(mii);
   1307        1.1    ichiro 		if (mii->mii_media_status & IFM_ACTIVE &&
   1308        1.1    ichiro 		    IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
   1309        1.1    ichiro 			DPRINTF(("%s: %s: got link\n",
   1310       1.38    dyoung 				 device_xname(sc->sc_dev), __func__));
   1311        1.1    ichiro 			sc->sc_link++;
   1312        1.1    ichiro 			if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1313        1.1    ichiro 				   url_start(ifp);
   1314        1.1    ichiro 		}
   1315        1.1    ichiro 	}
   1316        1.1    ichiro 
   1317       1.38    dyoung 	callout_reset(&sc->sc_stat_ch, hz, url_tick, sc);
   1318        1.1    ichiro 
   1319        1.1    ichiro 	splx(s);
   1320        1.1    ichiro }
   1321        1.1    ichiro 
   1322        1.1    ichiro /* Get exclusive access to the MII registers */
   1323        1.1    ichiro Static void
   1324        1.1    ichiro url_lock_mii(struct url_softc *sc)
   1325        1.1    ichiro {
   1326       1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1327        1.4  augustss 			__func__));
   1328        1.1    ichiro 
   1329        1.1    ichiro 	sc->sc_refcnt++;
   1330       1.27   xtraeme 	rw_enter(&sc->sc_mii_rwlock, RW_WRITER);
   1331        1.1    ichiro }
   1332        1.1    ichiro 
   1333        1.1    ichiro Static void
   1334        1.1    ichiro url_unlock_mii(struct url_softc *sc)
   1335        1.1    ichiro {
   1336       1.38    dyoung 	DPRINTFN(0xff, ("%s: %s: enter\n", device_xname(sc->sc_dev),
   1337        1.4  augustss 		       __func__));
   1338        1.1    ichiro 
   1339       1.27   xtraeme 	rw_exit(&sc->sc_mii_rwlock);
   1340        1.1    ichiro 	if (--sc->sc_refcnt < 0)
   1341       1.42       mrg 		usb_detach_wakeupold(sc->sc_dev);
   1342        1.1    ichiro }
   1343        1.1    ichiro 
   1344        1.1    ichiro Static int
   1345       1.38    dyoung url_int_miibus_readreg(device_t dev, int phy, int reg)
   1346        1.1    ichiro {
   1347        1.1    ichiro 	struct url_softc *sc;
   1348   1.48.4.1     skrll 	uint16_t val;
   1349        1.1    ichiro 
   1350        1.1    ichiro 	if (dev == NULL)
   1351   1.48.4.3     skrll 		return 0;
   1352        1.1    ichiro 
   1353       1.38    dyoung 	sc = device_private(dev);
   1354        1.1    ichiro 
   1355        1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n",
   1356       1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg));
   1357        1.1    ichiro 
   1358        1.1    ichiro 	if (sc->sc_dying) {
   1359        1.1    ichiro #ifdef DIAGNOSTIC
   1360       1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1361        1.4  augustss 		       __func__);
   1362        1.1    ichiro #endif
   1363   1.48.4.3     skrll 		return 0;
   1364        1.1    ichiro 	}
   1365        1.1    ichiro 
   1366        1.1    ichiro 	/* XXX: one PHY only for the RTL8150 internal PHY */
   1367        1.1    ichiro 	if (phy != 0) {
   1368        1.1    ichiro 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
   1369       1.38    dyoung 			 device_xname(sc->sc_dev), __func__, phy));
   1370   1.48.4.3     skrll 		return 0;
   1371        1.1    ichiro 	}
   1372        1.1    ichiro 
   1373        1.1    ichiro 	url_lock_mii(sc);
   1374        1.1    ichiro 
   1375        1.1    ichiro 	switch (reg) {
   1376        1.1    ichiro 	case MII_BMCR:		/* Control Register */
   1377        1.1    ichiro 		reg = URL_BMCR;
   1378        1.1    ichiro 		break;
   1379        1.1    ichiro 	case MII_BMSR:		/* Status Register */
   1380        1.1    ichiro 		reg = URL_BMSR;
   1381        1.1    ichiro 		break;
   1382        1.1    ichiro 	case MII_PHYIDR1:
   1383        1.1    ichiro 	case MII_PHYIDR2:
   1384        1.1    ichiro 		val = 0;
   1385        1.1    ichiro 		goto R_DONE;
   1386        1.1    ichiro 		break;
   1387        1.1    ichiro 	case MII_ANAR:		/* Autonegotiation advertisement */
   1388        1.1    ichiro 		reg = URL_ANAR;
   1389        1.1    ichiro 		break;
   1390        1.1    ichiro 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
   1391        1.1    ichiro 		reg = URL_ANLP;
   1392        1.1    ichiro 		break;
   1393        1.1    ichiro 	case URLPHY_MSR:	/* Media Status Register */
   1394        1.1    ichiro 		reg = URL_MSR;
   1395        1.1    ichiro 		break;
   1396        1.1    ichiro 	default:
   1397        1.1    ichiro 		printf("%s: %s: bad register %04x\n",
   1398       1.38    dyoung 		       device_xname(sc->sc_dev), __func__, reg);
   1399        1.1    ichiro 		val = 0;
   1400        1.1    ichiro 		goto R_DONE;
   1401        1.1    ichiro 		break;
   1402        1.1    ichiro 	}
   1403        1.1    ichiro 
   1404        1.1    ichiro 	if (reg == URL_MSR)
   1405        1.1    ichiro 		val = url_csr_read_1(sc, reg);
   1406        1.1    ichiro 	else
   1407        1.1    ichiro 		val = url_csr_read_2(sc, reg);
   1408        1.1    ichiro 
   1409        1.1    ichiro  R_DONE:
   1410        1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
   1411       1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, val));
   1412        1.1    ichiro 
   1413        1.1    ichiro 	url_unlock_mii(sc);
   1414   1.48.4.3     skrll 	return val;
   1415        1.1    ichiro }
   1416        1.1    ichiro 
   1417        1.1    ichiro Static void
   1418       1.38    dyoung url_int_miibus_writereg(device_t dev, int phy, int reg, int data)
   1419        1.1    ichiro {
   1420        1.1    ichiro 	struct url_softc *sc;
   1421        1.1    ichiro 
   1422        1.1    ichiro 	if (dev == NULL)
   1423        1.1    ichiro 		return;
   1424        1.1    ichiro 
   1425       1.38    dyoung 	sc = device_private(dev);
   1426        1.1    ichiro 
   1427        1.1    ichiro 	DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
   1428       1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, data));
   1429        1.1    ichiro 
   1430        1.1    ichiro 	if (sc->sc_dying) {
   1431        1.1    ichiro #ifdef DIAGNOSTIC
   1432       1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1433        1.4  augustss 		       __func__);
   1434        1.1    ichiro #endif
   1435        1.1    ichiro 		return;
   1436        1.1    ichiro 	}
   1437        1.1    ichiro 
   1438        1.1    ichiro 	/* XXX: one PHY only for the RTL8150 internal PHY */
   1439        1.1    ichiro 	if (phy != 0) {
   1440        1.1    ichiro 		DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n",
   1441       1.38    dyoung 			 device_xname(sc->sc_dev), __func__, phy));
   1442        1.1    ichiro 		return;
   1443        1.1    ichiro 	}
   1444        1.1    ichiro 
   1445        1.1    ichiro 	url_lock_mii(sc);
   1446        1.1    ichiro 
   1447        1.1    ichiro 	switch (reg) {
   1448        1.1    ichiro 	case MII_BMCR:		/* Control Register */
   1449        1.1    ichiro 		reg = URL_BMCR;
   1450        1.1    ichiro 		break;
   1451        1.1    ichiro 	case MII_BMSR:		/* Status Register */
   1452        1.1    ichiro 		reg = URL_BMSR;
   1453        1.1    ichiro 		break;
   1454        1.1    ichiro 	case MII_PHYIDR1:
   1455        1.1    ichiro 	case MII_PHYIDR2:
   1456        1.1    ichiro 		goto W_DONE;
   1457        1.1    ichiro 		break;
   1458        1.1    ichiro 	case MII_ANAR:		/* Autonegotiation advertisement */
   1459        1.1    ichiro 		reg = URL_ANAR;
   1460        1.1    ichiro 		break;
   1461        1.1    ichiro 	case MII_ANLPAR:	/* Autonegotiation link partner abilities */
   1462        1.1    ichiro 		reg = URL_ANLP;
   1463        1.1    ichiro 		break;
   1464        1.1    ichiro 	case URLPHY_MSR:	/* Media Status Register */
   1465        1.1    ichiro 		reg = URL_MSR;
   1466        1.1    ichiro 		break;
   1467        1.1    ichiro 	default:
   1468        1.1    ichiro 		printf("%s: %s: bad register %04x\n",
   1469       1.38    dyoung 		       device_xname(sc->sc_dev), __func__, reg);
   1470        1.1    ichiro 		goto W_DONE;
   1471        1.1    ichiro 		break;
   1472        1.1    ichiro 	}
   1473        1.1    ichiro 
   1474        1.1    ichiro 	if (reg == URL_MSR)
   1475        1.1    ichiro 		url_csr_write_1(sc, reg, data);
   1476        1.1    ichiro 	else
   1477        1.1    ichiro 		url_csr_write_2(sc, reg, data);
   1478        1.1    ichiro  W_DONE:
   1479        1.1    ichiro 
   1480        1.1    ichiro 	url_unlock_mii(sc);
   1481        1.1    ichiro 	return;
   1482        1.1    ichiro }
   1483        1.1    ichiro 
   1484        1.1    ichiro Static void
   1485       1.44      matt url_miibus_statchg(struct ifnet *ifp)
   1486        1.1    ichiro {
   1487        1.1    ichiro #ifdef URL_DEBUG
   1488       1.44      matt 	if (ifp == NULL)
   1489        1.1    ichiro 		return;
   1490        1.1    ichiro 
   1491       1.44      matt 	DPRINTF(("%s: %s: enter\n", ifp->if_xname, __func__));
   1492        1.1    ichiro #endif
   1493        1.1    ichiro 	/* Nothing to do */
   1494        1.1    ichiro }
   1495        1.1    ichiro 
   1496        1.1    ichiro #if 0
   1497        1.1    ichiro /*
   1498        1.1    ichiro  * external PHYs support, but not test.
   1499        1.1    ichiro  */
   1500        1.1    ichiro Static int
   1501       1.38    dyoung url_ext_miibus_redreg(device_t dev, int phy, int reg)
   1502        1.1    ichiro {
   1503       1.38    dyoung 	struct url_softc *sc = device_private(dev);
   1504   1.48.4.1     skrll 	uint16_t val;
   1505        1.1    ichiro 
   1506        1.1    ichiro 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n",
   1507       1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg));
   1508        1.1    ichiro 
   1509        1.1    ichiro 	if (sc->sc_dying) {
   1510        1.1    ichiro #ifdef DIAGNOSTIC
   1511       1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1512        1.4  augustss 		       __func__);
   1513        1.1    ichiro #endif
   1514   1.48.4.3     skrll 		return 0;
   1515        1.1    ichiro 	}
   1516        1.1    ichiro 
   1517        1.1    ichiro 	url_lock_mii(sc);
   1518        1.1    ichiro 
   1519        1.1    ichiro 	url_csr_write_1(sc, URL_PHYADD, phy & URL_PHYADD_MASK);
   1520        1.1    ichiro 	/*
   1521        1.1    ichiro 	 * RTL8150L will initiate a MII management data transaction
   1522        1.1    ichiro 	 * if PHYCNT_OWN bit is set 1 by software. After transaction,
   1523        1.1    ichiro 	 * this bit is auto cleared by TRL8150L.
   1524        1.1    ichiro 	 */
   1525        1.1    ichiro 	url_csr_write_1(sc, URL_PHYCNT,
   1526        1.1    ichiro 			(reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR);
   1527        1.1    ichiro 	for (i = 0; i < URL_TIMEOUT; i++) {
   1528        1.1    ichiro 		if ((url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0)
   1529        1.1    ichiro 			break;
   1530        1.1    ichiro 	}
   1531        1.1    ichiro 	if (i == URL_TIMEOUT) {
   1532       1.38    dyoung 		printf("%s: MII read timed out\n", device_xname(sc->sc_dev));
   1533        1.1    ichiro 	}
   1534        1.5  augustss 
   1535        1.1    ichiro 	val = url_csr_read_2(sc, URL_PHYDAT);
   1536        1.1    ichiro 
   1537        1.1    ichiro 	DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n",
   1538       1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, val));
   1539        1.1    ichiro 
   1540        1.1    ichiro 	url_unlock_mii(sc);
   1541   1.48.4.3     skrll 	return val;
   1542        1.1    ichiro }
   1543        1.1    ichiro 
   1544        1.1    ichiro Static void
   1545       1.38    dyoung url_ext_miibus_writereg(device_t dev, int phy, int reg, int data)
   1546        1.1    ichiro {
   1547       1.38    dyoung 	struct url_softc *sc = device_private(dev);
   1548        1.1    ichiro 
   1549        1.1    ichiro 	DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n",
   1550       1.38    dyoung 		 device_xname(sc->sc_dev), __func__, phy, reg, data));
   1551        1.1    ichiro 
   1552        1.1    ichiro 	if (sc->sc_dying) {
   1553        1.1    ichiro #ifdef DIAGNOSTIC
   1554       1.38    dyoung 		printf("%s: %s: dying\n", device_xname(sc->sc_dev),
   1555        1.4  augustss 		       __func__);
   1556        1.1    ichiro #endif
   1557        1.1    ichiro 		return;
   1558        1.1    ichiro 	}
   1559        1.1    ichiro 
   1560        1.1    ichiro 	url_lock_mii(sc);
   1561        1.1    ichiro 
   1562        1.1    ichiro 	url_csr_write_2(sc, URL_PHYDAT, data);
   1563        1.1    ichiro 	url_csr_write_1(sc, URL_PHYADD, phy);
   1564        1.1    ichiro 	url_csr_write_1(sc, URL_PHYCNT, reg | URL_PHYCNT_RWCR);	/* Write */
   1565        1.1    ichiro 
   1566        1.1    ichiro 	for (i=0; i < URL_TIMEOUT; i++) {
   1567        1.1    ichiro 		if (url_csr_read_1(sc, URL_PHYCNT) & URL_PHYCNT_PHYOWN)
   1568        1.1    ichiro 			break;
   1569        1.1    ichiro 	}
   1570        1.1    ichiro 
   1571        1.1    ichiro 	if (i == URL_TIMEOUT) {
   1572        1.1    ichiro 		printf("%s: MII write timed out\n",
   1573       1.38    dyoung 		       device_xname(sc->sc_dev));
   1574        1.1    ichiro 	}
   1575        1.1    ichiro 
   1576        1.1    ichiro 	url_unlock_mii(sc);
   1577        1.1    ichiro 	return;
   1578        1.1    ichiro }
   1579        1.1    ichiro #endif
   1580