if_url.c revision 1.58.2.2
1 /* $NetBSD: if_url.c,v 1.58.2.2 2020/04/13 08:04:49 martin Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 5 * Shingo WATANABE <nabe (at) nabechan.org>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the author nor the names of any co-contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 */ 32 33 /* 34 * The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at 35 * ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf 36 * ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf 37 */ 38 39 /* 40 * TODO: 41 * Interrupt Endpoint support 42 * External PHYs 43 * powerhook() support? 44 */ 45 46 #include <sys/cdefs.h> 47 __KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.58.2.2 2020/04/13 08:04:49 martin Exp $"); 48 49 #ifdef _KERNEL_OPT 50 #include "opt_inet.h" 51 #include "opt_usb.h" 52 #endif 53 54 #include <sys/param.h> 55 56 #include <net/if_ether.h> 57 #ifdef INET 58 #include <netinet/in.h> 59 #include <netinet/if_inarp.h> 60 #endif 61 62 #include <dev/mii/urlphyreg.h> 63 64 #include <dev/usb/usbnet.h> 65 66 #include <dev/usb/if_urlreg.h> 67 68 /* Function declarations */ 69 static int url_match(device_t, cfdata_t, void *); 70 static void url_attach(device_t, device_t, void *); 71 72 CFATTACH_DECL_NEW(url, sizeof(struct usbnet), url_match, url_attach, 73 usbnet_detach, usbnet_activate); 74 75 static unsigned url_uno_tx_prepare(struct usbnet *, struct mbuf *, 76 struct usbnet_chain *); 77 static void url_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t); 78 static int url_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *); 79 static int url_uno_mii_write_reg(struct usbnet *, int, int, uint16_t); 80 static int url_uno_ioctl(struct ifnet *, u_long, void *); 81 static void url_uno_stop(struct ifnet *, int); 82 static void url_uno_mii_statchg(struct ifnet *); 83 static int url_uno_init(struct ifnet *); 84 static void url_rcvfilt_locked(struct usbnet *); 85 static void url_reset(struct usbnet *); 86 87 static int url_csr_read_1(struct usbnet *, int); 88 static int url_csr_read_2(struct usbnet *, int); 89 static int url_csr_write_1(struct usbnet *, int, int); 90 static int url_csr_write_2(struct usbnet *, int, int); 91 static int url_csr_write_4(struct usbnet *, int, int); 92 static int url_mem(struct usbnet *, int, int, void *, int); 93 94 static const struct usbnet_ops url_ops = { 95 .uno_stop = url_uno_stop, 96 .uno_ioctl = url_uno_ioctl, 97 .uno_read_reg = url_uno_mii_read_reg, 98 .uno_write_reg = url_uno_mii_write_reg, 99 .uno_statchg = url_uno_mii_statchg, 100 .uno_tx_prepare = url_uno_tx_prepare, 101 .uno_rx_loop = url_uno_rx_loop, 102 .uno_init = url_uno_init, 103 }; 104 105 /* Macros */ 106 #ifdef URL_DEBUG 107 #define DPRINTF(x) if (urldebug) printf x 108 #define DPRINTFN(n, x) if (urldebug >= (n)) printf x 109 int urldebug = 0; 110 #else 111 #define DPRINTF(x) 112 #define DPRINTFN(n, x) 113 #endif 114 115 #define URL_SETBIT(un, reg, x) \ 116 url_csr_write_1(un, reg, url_csr_read_1(un, reg) | (x)) 117 118 #define URL_SETBIT2(un, reg, x) \ 119 url_csr_write_2(un, reg, url_csr_read_2(un, reg) | (x)) 120 121 #define URL_CLRBIT(un, reg, x) \ 122 url_csr_write_1(un, reg, url_csr_read_1(un, reg) & ~(x)) 123 124 #define URL_CLRBIT2(un, reg, x) \ 125 url_csr_write_2(un, reg, url_csr_read_2(un, reg) & ~(x)) 126 127 static const struct url_type { 128 struct usb_devno url_dev; 129 uint16_t url_flags; 130 #define URL_EXT_PHY 0x0001 131 } url_devs [] = { 132 /* MELCO LUA-KTX */ 133 {{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0}, 134 /* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */ 135 {{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0}, 136 /* Longshine LCS-8138TX */ 137 {{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0}, 138 /* Micronet SP128AR */ 139 {{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0}, 140 /* OQO model 01 */ 141 {{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0}, 142 }; 143 #define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p)) 144 145 146 /* Probe */ 147 static int 148 url_match(device_t parent, cfdata_t match, void *aux) 149 { 150 struct usb_attach_arg *uaa = aux; 151 152 return url_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ? 153 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 154 } 155 /* Attach */ 156 static void 157 url_attach(device_t parent, device_t self, void *aux) 158 { 159 USBNET_MII_DECL_DEFAULT(unm); 160 struct usbnet * const un = device_private(self); 161 struct usb_attach_arg *uaa = aux; 162 struct usbd_device *dev = uaa->uaa_device; 163 struct usbd_interface *iface; 164 usbd_status err; 165 usb_interface_descriptor_t *id; 166 usb_endpoint_descriptor_t *ed; 167 char *devinfop; 168 int i; 169 170 aprint_naive("\n"); 171 aprint_normal("\n"); 172 devinfop = usbd_devinfo_alloc(dev, 0); 173 aprint_normal_dev(self, "%s\n", devinfop); 174 usbd_devinfo_free(devinfop); 175 176 un->un_dev = self; 177 un->un_udev = dev; 178 un->un_sc = un; 179 un->un_ops = &url_ops; 180 un->un_rx_xfer_flags = USBD_SHORT_XFER_OK; 181 un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER; 182 un->un_rx_list_cnt = URL_RX_LIST_CNT; 183 un->un_tx_list_cnt = URL_TX_LIST_CNT; 184 un->un_rx_bufsz = URL_BUFSZ; 185 un->un_tx_bufsz = URL_BUFSZ; 186 187 /* Move the device into the configured state. */ 188 err = usbd_set_config_no(dev, URL_CONFIG_NO, 1); 189 if (err) { 190 aprint_error_dev(self, "failed to set configuration" 191 ", err=%s\n", usbd_errstr(err)); 192 return; 193 } 194 195 /* get control interface */ 196 err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface); 197 if (err) { 198 aprint_error_dev(self, "failed to get interface, err=%s\n", 199 usbd_errstr(err)); 200 return; 201 } 202 203 un->un_iface = iface; 204 un->un_flags = url_lookup(uaa->uaa_vendor, uaa->uaa_product)->url_flags; 205 #if 0 206 if (un->un_flags & URL_EXT_PHY) { 207 un->un_read_reg_cb = url_ext_mii_read_reg; 208 un->un_write_reg_cb = url_ext_mii_write_reg; 209 } 210 #endif 211 212 /* get interface descriptor */ 213 id = usbd_get_interface_descriptor(un->un_iface); 214 215 /* find endpoints */ 216 un->un_ed[USBNET_ENDPT_RX] = un->un_ed[USBNET_ENDPT_TX] = 217 un->un_ed[USBNET_ENDPT_INTR] = 0; 218 for (i = 0; i < id->bNumEndpoints; i++) { 219 ed = usbd_interface2endpoint_descriptor(un->un_iface, i); 220 if (ed == NULL) { 221 aprint_error_dev(self, 222 "couldn't get endpoint %d\n", i); 223 return; 224 } 225 if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK && 226 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 227 un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress; 228 else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK && 229 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT) 230 un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress; 231 else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT && 232 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 233 un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress; 234 } 235 236 if (un->un_ed[USBNET_ENDPT_RX] == 0 || 237 un->un_ed[USBNET_ENDPT_TX] == 0 || 238 un->un_ed[USBNET_ENDPT_INTR] == 0) { 239 aprint_error_dev(self, "missing endpoint\n"); 240 return; 241 } 242 243 /* Set these up now for url_mem(). */ 244 usbnet_attach(un, "urldet"); 245 246 usbnet_lock_core(un); 247 usbnet_busy(un); 248 249 /* reset the adapter */ 250 url_reset(un); 251 252 /* Get Ethernet Address */ 253 err = url_mem(un, URL_CMD_READMEM, URL_IDR0, (void *)un->un_eaddr, 254 ETHER_ADDR_LEN); 255 usbnet_unbusy(un); 256 usbnet_unlock_core(un); 257 if (err) { 258 aprint_error_dev(self, "read MAC address failed\n"); 259 goto bad; 260 } 261 262 /* initialize interface information */ 263 usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST, 264 0, &unm); 265 266 return; 267 268 bad: 269 usbnet_set_dying(un, true); 270 return; 271 } 272 273 /* read/write memory */ 274 static int 275 url_mem(struct usbnet *un, int cmd, int offset, void *buf, int len) 276 { 277 usb_device_request_t req; 278 usbd_status err; 279 280 usbnet_isowned_core(un); 281 282 DPRINTFN(0x200, 283 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 284 285 if (usbnet_isdying(un)) 286 return 0; 287 288 if (cmd == URL_CMD_READMEM) 289 req.bmRequestType = UT_READ_VENDOR_DEVICE; 290 else 291 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 292 req.bRequest = URL_REQ_MEM; 293 USETW(req.wValue, offset); 294 USETW(req.wIndex, 0x0000); 295 USETW(req.wLength, len); 296 297 err = usbd_do_request(un->un_udev, &req, buf); 298 if (err) { 299 DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n", 300 device_xname(un->un_dev), 301 cmd == URL_CMD_READMEM ? "read" : "write", 302 offset, err)); 303 } 304 305 return err; 306 } 307 308 /* read 1byte from register */ 309 static int 310 url_csr_read_1(struct usbnet *un, int reg) 311 { 312 uint8_t val = 0; 313 314 DPRINTFN(0x100, 315 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 316 317 return url_mem(un, URL_CMD_READMEM, reg, &val, 1) ? 0 : val; 318 } 319 320 /* read 2bytes from register */ 321 static int 322 url_csr_read_2(struct usbnet *un, int reg) 323 { 324 uWord val; 325 326 DPRINTFN(0x100, 327 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 328 329 USETW(val, 0); 330 return url_mem(un, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val); 331 } 332 333 /* write 1byte to register */ 334 static int 335 url_csr_write_1(struct usbnet *un, int reg, int aval) 336 { 337 uint8_t val = aval; 338 339 DPRINTFN(0x100, 340 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 341 342 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0; 343 } 344 345 /* write 2bytes to register */ 346 static int 347 url_csr_write_2(struct usbnet *un, int reg, int aval) 348 { 349 uWord val; 350 351 DPRINTFN(0x100, 352 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 353 354 USETW(val, aval); 355 356 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0; 357 } 358 359 /* write 4bytes to register */ 360 static int 361 url_csr_write_4(struct usbnet *un, int reg, int aval) 362 { 363 uDWord val; 364 365 DPRINTFN(0x100, 366 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 367 368 USETDW(val, aval); 369 370 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0; 371 } 372 373 static int 374 url_init_locked(struct ifnet *ifp) 375 { 376 struct usbnet * const un = ifp->if_softc; 377 const u_char *eaddr; 378 int i; 379 380 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 381 382 usbnet_isowned_core(un); 383 384 if (usbnet_isdying(un)) 385 return EIO; 386 387 /* Cancel pending I/O and free all TX/RX buffers */ 388 usbnet_stop(un, ifp, 1); 389 390 eaddr = CLLADDR(ifp->if_sadl); 391 for (i = 0; i < ETHER_ADDR_LEN; i++) 392 url_csr_write_1(un, URL_IDR0 + i, eaddr[i]); 393 394 /* Init transmission control register */ 395 URL_CLRBIT(un, URL_TCR, 396 URL_TCR_TXRR1 | URL_TCR_TXRR0 | 397 URL_TCR_IFG1 | URL_TCR_IFG0 | 398 URL_TCR_NOCRC); 399 400 /* Init receive control register */ 401 URL_SETBIT2(un, URL_RCR, URL_RCR_TAIL | URL_RCR_AD | URL_RCR_AB); 402 403 /* Accept multicast frame or run promisc. mode */ 404 url_rcvfilt_locked(un); 405 406 /* Enable RX and TX */ 407 URL_SETBIT(un, URL_CR, URL_CR_TE | URL_CR_RE); 408 409 return usbnet_init_rx_tx(un); 410 } 411 412 static int 413 url_uno_init(struct ifnet *ifp) 414 { 415 struct usbnet * const un = ifp->if_softc; 416 417 usbnet_lock_core(un); 418 usbnet_busy(un); 419 int ret = url_init_locked(ifp); 420 usbnet_unbusy(un); 421 usbnet_unlock_core(un); 422 423 return ret; 424 } 425 426 static void 427 url_reset(struct usbnet *un) 428 { 429 int i; 430 431 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 432 433 if (usbnet_isdying(un)) 434 return; 435 436 URL_SETBIT(un, URL_CR, URL_CR_SOFT_RST); 437 438 for (i = 0; i < URL_TX_TIMEOUT; i++) { 439 if (!(url_csr_read_1(un, URL_CR) & URL_CR_SOFT_RST)) 440 break; 441 delay(10); /* XXX */ 442 } 443 444 delay(10000); /* XXX */ 445 } 446 447 static void 448 url_rcvfilt_locked(struct usbnet *un) 449 { 450 struct ifnet * const ifp = usbnet_ifp(un); 451 struct ethercom *ec = usbnet_ec(un); 452 struct ether_multi *enm; 453 struct ether_multistep step; 454 uint32_t mchash[2] = { 0, 0 }; 455 int h = 0, rcr; 456 457 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 458 459 usbnet_isowned_core(un); 460 461 if (usbnet_isdying(un)) 462 return; 463 464 rcr = url_csr_read_2(un, URL_RCR); 465 rcr &= ~(URL_RCR_AAP | URL_RCR_AAM | URL_RCR_AM); 466 467 ETHER_LOCK(ec); 468 if (ifp->if_flags & IFF_PROMISC) { 469 ec->ec_flags |= ETHER_F_ALLMULTI; 470 ETHER_UNLOCK(ec); 471 /* run promisc. mode */ 472 rcr |= URL_RCR_AAM; /* ??? */ 473 rcr |= URL_RCR_AAP; 474 goto update; 475 } 476 ec->ec_flags &= ~ETHER_F_ALLMULTI; 477 ETHER_FIRST_MULTI(step, ec, enm); 478 while (enm != NULL) { 479 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 480 ec->ec_flags |= ETHER_F_ALLMULTI; 481 ETHER_UNLOCK(ec); 482 /* accept all multicast frames */ 483 rcr |= URL_RCR_AAM; 484 goto update; 485 } 486 h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN); 487 /* 1(31) and 5(30:26) bit sampling */ 488 mchash[h >> 31] |= 1 << ((h >> 26) & 0x1f); 489 ETHER_NEXT_MULTI(step, enm); 490 } 491 ETHER_UNLOCK(ec); 492 if (h != 0) 493 rcr |= URL_RCR_AM; /* activate mcast hash filter */ 494 url_csr_write_4(un, URL_MAR0, mchash[0]); 495 url_csr_write_4(un, URL_MAR4, mchash[1]); 496 update: 497 url_csr_write_2(un, URL_RCR, rcr); 498 } 499 500 static unsigned 501 url_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c) 502 { 503 int total_len; 504 505 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__)); 506 507 KASSERT(un->un_tx_bufsz >= URL_MIN_FRAME_LEN); 508 if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz) 509 return 0; 510 511 /* Copy the mbuf data into a contiguous buffer */ 512 m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf); 513 total_len = m->m_pkthdr.len; 514 515 if (total_len < URL_MIN_FRAME_LEN) { 516 memset(c->unc_buf + total_len, 0, 517 URL_MIN_FRAME_LEN - total_len); 518 total_len = URL_MIN_FRAME_LEN; 519 } 520 521 DPRINTF(("%s: %s: send %d bytes\n", device_xname(un->un_dev), 522 __func__, total_len)); 523 524 return total_len; 525 } 526 527 static void 528 url_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len) 529 { 530 struct ifnet *ifp = usbnet_ifp(un); 531 url_rxhdr_t rxhdr; 532 533 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__)); 534 535 if (total_len <= ETHER_CRC_LEN || total_len <= sizeof(rxhdr)) { 536 if_statinc(ifp, if_ierrors); 537 return; 538 } 539 540 memcpy(&rxhdr, c->unc_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr)); 541 542 DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n", 543 device_xname(un->un_dev), 544 UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK, 545 UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "", 546 UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "", 547 UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "", 548 UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : "")); 549 550 if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) { 551 if_statinc(ifp, if_ierrors); 552 return; 553 } 554 555 total_len -= ETHER_CRC_LEN; 556 557 DPRINTF(("%s: %s: deliver %d\n", device_xname(un->un_dev), 558 __func__, total_len)); 559 usbnet_enqueue(un, c->unc_buf, total_len, 0, 0, 0); 560 } 561 562 #if 0 563 static void url_intr(void) 564 { 565 } 566 #endif 567 568 static int 569 url_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data) 570 { 571 struct usbnet * const un = ifp->if_softc; 572 573 usbnet_lock_core(un); 574 usbnet_busy(un); 575 576 switch (cmd) { 577 case SIOCADDMULTI: 578 case SIOCDELMULTI: 579 url_rcvfilt_locked(un); 580 break; 581 default: 582 break; 583 } 584 585 usbnet_unbusy(un); 586 usbnet_unlock_core(un); 587 588 return 0; 589 } 590 591 /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */ 592 static void 593 url_uno_stop(struct ifnet *ifp, int disable) 594 { 595 struct usbnet * const un = ifp->if_softc; 596 597 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 598 599 url_reset(un); 600 } 601 602 static int 603 url_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val) 604 { 605 uint16_t data; 606 usbd_status err = USBD_NORMAL_COMPLETION; 607 608 DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n", 609 device_xname(un->un_dev), __func__, phy, reg)); 610 611 /* XXX: one PHY only for the RTL8150 internal PHY */ 612 if (phy != 0) { 613 DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n", 614 device_xname(un->un_dev), __func__, phy)); 615 return EINVAL; 616 } 617 618 switch (reg) { 619 case MII_BMCR: /* Control Register */ 620 reg = URL_BMCR; 621 break; 622 case MII_BMSR: /* Status Register */ 623 reg = URL_BMSR; 624 break; 625 case MII_PHYIDR1: 626 case MII_PHYIDR2: 627 *val = 0; 628 goto R_DONE; 629 break; 630 case MII_ANAR: /* Autonegotiation advertisement */ 631 reg = URL_ANAR; 632 break; 633 case MII_ANLPAR: /* Autonegotiation link partner abilities */ 634 reg = URL_ANLP; 635 break; 636 case URLPHY_MSR: /* Media Status Register */ 637 reg = URL_MSR; 638 break; 639 default: 640 printf("%s: %s: bad register %04x\n", 641 device_xname(un->un_dev), __func__, reg); 642 return EINVAL; 643 } 644 645 if (reg == URL_MSR) 646 data = url_csr_read_1(un, reg); 647 else 648 data = url_csr_read_2(un, reg); 649 *val = data; 650 651 R_DONE: 652 DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04hx\n", 653 device_xname(un->un_dev), __func__, phy, reg, *val)); 654 655 return err; 656 } 657 658 static int 659 url_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val) 660 { 661 662 DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x val=0x%04hx\n", 663 device_xname(un->un_dev), __func__, phy, reg, val)); 664 665 /* XXX: one PHY only for the RTL8150 internal PHY */ 666 if (phy != 0) { 667 DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n", 668 device_xname(un->un_dev), __func__, phy)); 669 return EINVAL; 670 } 671 672 switch (reg) { 673 case MII_BMCR: /* Control Register */ 674 reg = URL_BMCR; 675 break; 676 case MII_BMSR: /* Status Register */ 677 reg = URL_BMSR; 678 break; 679 case MII_PHYIDR1: 680 case MII_PHYIDR2: 681 return 0; 682 case MII_ANAR: /* Autonegotiation advertisement */ 683 reg = URL_ANAR; 684 break; 685 case MII_ANLPAR: /* Autonegotiation link partner abilities */ 686 reg = URL_ANLP; 687 break; 688 case URLPHY_MSR: /* Media Status Register */ 689 reg = URL_MSR; 690 break; 691 default: 692 printf("%s: %s: bad register %04x\n", 693 device_xname(un->un_dev), __func__, reg); 694 return EINVAL; 695 } 696 697 if (reg == URL_MSR) 698 url_csr_write_1(un, reg, val); 699 else 700 url_csr_write_2(un, reg, val); 701 702 return 0; 703 } 704 705 static void 706 url_uno_mii_statchg(struct ifnet *ifp) 707 { 708 struct usbnet * const un = ifp->if_softc; 709 710 DPRINTF(("%s: %s: enter\n", ifp->if_xname, __func__)); 711 712 /* XXX */ 713 usbnet_set_link(un, true); 714 } 715 716 #if 0 717 /* 718 * external PHYs support, but not test. 719 */ 720 static usbd_status 721 url_ext_mii_read_reg(struct usbnet *un, int phy, int reg) 722 { 723 uint16_t val; 724 725 DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n", 726 device_xname(un->un_dev), __func__, phy, reg)); 727 728 url_csr_write_1(un, URL_PHYADD, phy & URL_PHYADD_MASK); 729 /* 730 * RTL8150L will initiate a MII management data transaction 731 * if PHYCNT_OWN bit is set 1 by software. After transaction, 732 * this bit is auto cleared by TRL8150L. 733 */ 734 url_csr_write_1(un, URL_PHYCNT, 735 (reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR); 736 for (i = 0; i < URL_TIMEOUT; i++) { 737 if ((url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0) 738 break; 739 } 740 if (i == URL_TIMEOUT) { 741 printf("%s: MII read timed out\n", device_xname(un->un_dev)); 742 } 743 744 val = url_csr_read_2(un, URL_PHYDAT); 745 746 DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n", 747 device_xname(un->un_dev), __func__, phy, reg, val)); 748 749 return USBD_NORMAL_COMPLETION; 750 } 751 752 static usbd_status 753 url_ext_mii_write_reg(struct usbnet *un, int phy, int reg, int data) 754 { 755 756 DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n", 757 device_xname(un->un_dev), __func__, phy, reg, data)); 758 759 url_csr_write_2(un, URL_PHYDAT, data); 760 url_csr_write_1(un, URL_PHYADD, phy); 761 url_csr_write_1(un, URL_PHYCNT, reg | URL_PHYCNT_RWCR); /* Write */ 762 763 for (i=0; i < URL_TIMEOUT; i++) { 764 if (url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) 765 break; 766 } 767 768 if (i == URL_TIMEOUT) { 769 printf("%s: MII write timed out\n", 770 device_xname(un->un_dev)); 771 return USBD_TIMEOUT; 772 } 773 774 return USBD_NORMAL_COMPLETION; 775 } 776 #endif 777 778 #ifdef _MODULE 779 #include "ioconf.c" 780 #endif 781 782 USBNET_MODULE(url) 783
Indexes created Wed Oct 01 19:09:53 GMT 2025