if_url.c revision 1.73
1 /* $NetBSD: if_url.c,v 1.73 2020/01/29 06:39:07 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 5 * Shingo WATANABE <nabe (at) nabechan.org>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the author nor the names of any co-contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 */ 32 33 /* 34 * The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at 35 * ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf 36 * ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf 37 */ 38 39 /* 40 * TODO: 41 * Interrupt Endpoint support 42 * External PHYs 43 * powerhook() support? 44 */ 45 46 #include <sys/cdefs.h> 47 __KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.73 2020/01/29 06:39:07 thorpej Exp $"); 48 49 #ifdef _KERNEL_OPT 50 #include "opt_inet.h" 51 #include "opt_usb.h" 52 #endif 53 54 #include <sys/param.h> 55 56 #include <net/if_ether.h> 57 #ifdef INET 58 #include <netinet/in.h> 59 #include <netinet/if_inarp.h> 60 #endif 61 62 #include <dev/mii/urlphyreg.h> 63 64 #include <dev/usb/usbnet.h> 65 66 #include <dev/usb/if_urlreg.h> 67 68 /* Function declarations */ 69 static int url_match(device_t, cfdata_t, void *); 70 static void url_attach(device_t, device_t, void *); 71 72 CFATTACH_DECL_NEW(url, sizeof(struct usbnet), url_match, url_attach, 73 usbnet_detach, usbnet_activate); 74 75 static unsigned url_tx_prepare(struct usbnet *, struct mbuf *, 76 struct usbnet_chain *); 77 static void url_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t); 78 static int url_int_mii_read_reg(struct usbnet *, int, int, uint16_t *); 79 static int url_int_mii_write_reg(struct usbnet *, int, int, uint16_t); 80 static int url_ioctl_cb(struct ifnet *, u_long, void *); 81 static void url_stop_cb(struct ifnet *, int); 82 static void url_mii_statchg_cb(struct ifnet *); 83 static int url_init(struct ifnet *); 84 static void url_setiff_locked(struct usbnet *); 85 static void url_setiff(struct usbnet *); 86 static void url_reset(struct usbnet *); 87 88 static int url_csr_read_1(struct usbnet *, int); 89 static int url_csr_read_2(struct usbnet *, int); 90 static int url_csr_write_1(struct usbnet *, int, int); 91 static int url_csr_write_2(struct usbnet *, int, int); 92 static int url_csr_write_4(struct usbnet *, int, int); 93 static int url_mem(struct usbnet *, int, int, void *, int); 94 95 static const struct usbnet_ops url_ops = { 96 .uno_stop = url_stop_cb, 97 .uno_ioctl = url_ioctl_cb, 98 .uno_read_reg = url_int_mii_read_reg, 99 .uno_write_reg = url_int_mii_write_reg, 100 .uno_statchg = url_mii_statchg_cb, 101 .uno_tx_prepare = url_tx_prepare, 102 .uno_rx_loop = url_rx_loop, 103 .uno_init = url_init, 104 }; 105 106 /* Macros */ 107 #ifdef URL_DEBUG 108 #define DPRINTF(x) if (urldebug) printf x 109 #define DPRINTFN(n, x) if (urldebug >= (n)) printf x 110 int urldebug = 0; 111 #else 112 #define DPRINTF(x) 113 #define DPRINTFN(n, x) 114 #endif 115 116 #define URL_SETBIT(un, reg, x) \ 117 url_csr_write_1(un, reg, url_csr_read_1(un, reg) | (x)) 118 119 #define URL_SETBIT2(un, reg, x) \ 120 url_csr_write_2(un, reg, url_csr_read_2(un, reg) | (x)) 121 122 #define URL_CLRBIT(un, reg, x) \ 123 url_csr_write_1(un, reg, url_csr_read_1(un, reg) & ~(x)) 124 125 #define URL_CLRBIT2(un, reg, x) \ 126 url_csr_write_2(un, reg, url_csr_read_2(un, reg) & ~(x)) 127 128 static const struct url_type { 129 struct usb_devno url_dev; 130 uint16_t url_flags; 131 #define URL_EXT_PHY 0x0001 132 } url_devs [] = { 133 /* MELCO LUA-KTX */ 134 {{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0}, 135 /* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */ 136 {{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0}, 137 /* Longshine LCS-8138TX */ 138 {{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0}, 139 /* Micronet SP128AR */ 140 {{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0}, 141 /* OQO model 01 */ 142 {{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0}, 143 }; 144 #define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p)) 145 146 147 /* Probe */ 148 static int 149 url_match(device_t parent, cfdata_t match, void *aux) 150 { 151 struct usb_attach_arg *uaa = aux; 152 153 return url_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ? 154 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 155 } 156 /* Attach */ 157 static void 158 url_attach(device_t parent, device_t self, void *aux) 159 { 160 USBNET_MII_DECL_DEFAULT(unm); 161 struct usbnet * const un = device_private(self); 162 struct usb_attach_arg *uaa = aux; 163 struct usbd_device *dev = uaa->uaa_device; 164 struct usbd_interface *iface; 165 usbd_status err; 166 usb_interface_descriptor_t *id; 167 usb_endpoint_descriptor_t *ed; 168 char *devinfop; 169 int i; 170 171 aprint_naive("\n"); 172 aprint_normal("\n"); 173 devinfop = usbd_devinfo_alloc(dev, 0); 174 aprint_normal_dev(self, "%s\n", devinfop); 175 usbd_devinfo_free(devinfop); 176 177 un->un_dev = self; 178 un->un_udev = dev; 179 un->un_sc = un; 180 un->un_ops = &url_ops; 181 un->un_rx_xfer_flags = USBD_SHORT_XFER_OK; 182 un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER; 183 un->un_rx_list_cnt = URL_RX_LIST_CNT; 184 un->un_tx_list_cnt = URL_TX_LIST_CNT; 185 un->un_rx_bufsz = URL_BUFSZ; 186 un->un_tx_bufsz = URL_BUFSZ; 187 188 /* Move the device into the configured state. */ 189 err = usbd_set_config_no(dev, URL_CONFIG_NO, 1); 190 if (err) { 191 aprint_error_dev(self, "failed to set configuration" 192 ", err=%s\n", usbd_errstr(err)); 193 return; 194 } 195 196 /* get control interface */ 197 err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface); 198 if (err) { 199 aprint_error_dev(self, "failed to get interface, err=%s\n", 200 usbd_errstr(err)); 201 return; 202 } 203 204 un->un_iface = iface; 205 un->un_flags = url_lookup(uaa->uaa_vendor, uaa->uaa_product)->url_flags; 206 #if 0 207 if (un->un_flags & URL_EXT_PHY) { 208 un->un_read_reg_cb = url_ext_mii_read_reg; 209 un->un_write_reg_cb = url_ext_mii_write_reg; 210 } 211 #endif 212 213 /* get interface descriptor */ 214 id = usbd_get_interface_descriptor(un->un_iface); 215 216 /* find endpoints */ 217 un->un_ed[USBNET_ENDPT_RX] = un->un_ed[USBNET_ENDPT_TX] = 218 un->un_ed[USBNET_ENDPT_INTR] = 0; 219 for (i = 0; i < id->bNumEndpoints; i++) { 220 ed = usbd_interface2endpoint_descriptor(un->un_iface, i); 221 if (ed == NULL) { 222 aprint_error_dev(self, 223 "couldn't get endpoint %d\n", i); 224 return; 225 } 226 if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK && 227 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 228 un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress; 229 else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK && 230 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT) 231 un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress; 232 else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT && 233 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 234 un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress; 235 } 236 237 if (un->un_ed[USBNET_ENDPT_RX] == 0 || 238 un->un_ed[USBNET_ENDPT_TX] == 0 || 239 un->un_ed[USBNET_ENDPT_INTR] == 0) { 240 aprint_error_dev(self, "missing endpoint\n"); 241 return; 242 } 243 244 /* Set these up now for url_mem(). */ 245 usbnet_attach(un, "urldet"); 246 247 /* reset the adapter */ 248 usbnet_lock(un); 249 url_reset(un); 250 usbnet_unlock(un); 251 252 /* Get Ethernet Address */ 253 usbnet_lock_mii(un); 254 err = url_mem(un, URL_CMD_READMEM, URL_IDR0, (void *)un->un_eaddr, 255 ETHER_ADDR_LEN); 256 usbnet_unlock_mii(un); 257 if (err) { 258 aprint_error_dev(self, "read MAC address failed\n"); 259 goto bad; 260 } 261 262 /* initialize interface information */ 263 usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST, 264 0, &unm); 265 266 return; 267 268 bad: 269 usbnet_set_dying(un, true); 270 return; 271 } 272 273 /* read/write memory */ 274 static int 275 url_mem(struct usbnet *un, int cmd, int offset, void *buf, int len) 276 { 277 usb_device_request_t req; 278 usbd_status err; 279 280 usbnet_isowned_mii(un); 281 282 DPRINTFN(0x200, 283 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 284 285 if (usbnet_isdying(un)) 286 return 0; 287 288 if (cmd == URL_CMD_READMEM) 289 req.bmRequestType = UT_READ_VENDOR_DEVICE; 290 else 291 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 292 req.bRequest = URL_REQ_MEM; 293 USETW(req.wValue, offset); 294 USETW(req.wIndex, 0x0000); 295 USETW(req.wLength, len); 296 297 err = usbd_do_request(un->un_udev, &req, buf); 298 if (err) { 299 DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n", 300 device_xname(un->un_dev), 301 cmd == URL_CMD_READMEM ? "read" : "write", 302 offset, err)); 303 } 304 305 return err; 306 } 307 308 /* read 1byte from register */ 309 static int 310 url_csr_read_1(struct usbnet *un, int reg) 311 { 312 uint8_t val = 0; 313 314 DPRINTFN(0x100, 315 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 316 317 return url_mem(un, URL_CMD_READMEM, reg, &val, 1) ? 0 : val; 318 } 319 320 /* read 2bytes from register */ 321 static int 322 url_csr_read_2(struct usbnet *un, int reg) 323 { 324 uWord val; 325 326 DPRINTFN(0x100, 327 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 328 329 USETW(val, 0); 330 return url_mem(un, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val); 331 } 332 333 /* write 1byte to register */ 334 static int 335 url_csr_write_1(struct usbnet *un, int reg, int aval) 336 { 337 uint8_t val = aval; 338 339 DPRINTFN(0x100, 340 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 341 342 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0; 343 } 344 345 /* write 2bytes to register */ 346 static int 347 url_csr_write_2(struct usbnet *un, int reg, int aval) 348 { 349 uWord val; 350 351 DPRINTFN(0x100, 352 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 353 354 USETW(val, aval); 355 356 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0; 357 } 358 359 /* write 4bytes to register */ 360 static int 361 url_csr_write_4(struct usbnet *un, int reg, int aval) 362 { 363 uDWord val; 364 365 DPRINTFN(0x100, 366 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 367 368 USETDW(val, aval); 369 370 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0; 371 } 372 373 static int 374 url_init_locked(struct ifnet *ifp) 375 { 376 struct usbnet * const un = ifp->if_softc; 377 const u_char *eaddr; 378 int i; 379 380 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 381 382 usbnet_isowned(un); 383 384 if (usbnet_isdying(un)) 385 return EIO; 386 387 /* Cancel pending I/O and free all TX/RX buffers */ 388 usbnet_stop(un, ifp, 1); 389 390 usbnet_lock_mii_un_locked(un); 391 392 eaddr = CLLADDR(ifp->if_sadl); 393 for (i = 0; i < ETHER_ADDR_LEN; i++) 394 url_csr_write_1(un, URL_IDR0 + i, eaddr[i]); 395 396 /* Init transmission control register */ 397 URL_CLRBIT(un, URL_TCR, 398 URL_TCR_TXRR1 | URL_TCR_TXRR0 | 399 URL_TCR_IFG1 | URL_TCR_IFG0 | 400 URL_TCR_NOCRC); 401 402 /* Init receive control register */ 403 URL_SETBIT2(un, URL_RCR, URL_RCR_TAIL | URL_RCR_AD); 404 if (ifp->if_flags & IFF_BROADCAST) 405 URL_SETBIT2(un, URL_RCR, URL_RCR_AB); 406 else 407 URL_CLRBIT2(un, URL_RCR, URL_RCR_AB); 408 409 /* If we want promiscuous mode, accept all physical frames. */ 410 if (ifp->if_flags & IFF_PROMISC) 411 URL_SETBIT2(un, URL_RCR, URL_RCR_AAM | URL_RCR_AAP); 412 else 413 URL_CLRBIT2(un, URL_RCR, URL_RCR_AAM | URL_RCR_AAP); 414 415 /* Load the multicast filter */ 416 url_setiff_locked(un); 417 418 /* Enable RX and TX */ 419 URL_SETBIT(un, URL_CR, URL_CR_TE | URL_CR_RE); 420 421 usbnet_unlock_mii_un_locked(un); 422 423 return usbnet_init_rx_tx(un); 424 } 425 426 static int 427 url_init(struct ifnet *ifp) 428 { 429 struct usbnet * const un = ifp->if_softc; 430 431 usbnet_lock(un); 432 int ret = url_init_locked(ifp); 433 usbnet_unlock(un); 434 435 return ret; 436 } 437 438 static void 439 url_reset(struct usbnet *un) 440 { 441 int i; 442 443 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 444 445 if (usbnet_isdying(un)) 446 return; 447 448 usbnet_lock_mii_un_locked(un); 449 URL_SETBIT(un, URL_CR, URL_CR_SOFT_RST); 450 451 for (i = 0; i < URL_TX_TIMEOUT; i++) { 452 if (!(url_csr_read_1(un, URL_CR) & URL_CR_SOFT_RST)) 453 break; 454 delay(10); /* XXX */ 455 } 456 457 delay(10000); /* XXX */ 458 usbnet_unlock_mii_un_locked(un); 459 } 460 461 #define url_calchash(addr) (ether_crc32_be((addr), ETHER_ADDR_LEN) >> 26) 462 463 static void 464 url_setiff_locked(struct usbnet *un) 465 { 466 struct ifnet * const ifp = usbnet_ifp(un); 467 struct ethercom *ec = usbnet_ec(un); 468 struct ether_multi *enm; 469 struct ether_multistep step; 470 uint32_t hashes[2] = { 0, 0 }; 471 int h = 0; 472 int mcnt = 0; 473 474 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 475 476 usbnet_isowned_mii(un); 477 478 if (usbnet_isdying(un)) 479 return; 480 481 if (ifp->if_flags & IFF_PROMISC) { 482 URL_SETBIT2(un, URL_RCR, URL_RCR_AAM | URL_RCR_AAP); 483 return; 484 } else if (ifp->if_flags & IFF_ALLMULTI) { 485 allmulti: 486 ifp->if_flags |= IFF_ALLMULTI; 487 URL_SETBIT2(un, URL_RCR, URL_RCR_AAM); 488 URL_CLRBIT2(un, URL_RCR, URL_RCR_AAP); 489 return; 490 } 491 492 /* first, zot all the existing hash bits */ 493 url_csr_write_4(un, URL_MAR0, 0); 494 url_csr_write_4(un, URL_MAR4, 0); 495 496 /* now program new ones */ 497 ETHER_LOCK(ec); 498 ETHER_FIRST_MULTI(step, ec, enm); 499 while (enm != NULL) { 500 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 501 ETHER_ADDR_LEN) != 0) { 502 ETHER_UNLOCK(ec); 503 goto allmulti; 504 } 505 506 h = url_calchash(enm->enm_addrlo); 507 if (h < 32) 508 hashes[0] |= (1 << h); 509 else 510 hashes[1] |= (1 << (h -32)); 511 mcnt++; 512 ETHER_NEXT_MULTI(step, enm); 513 } 514 ETHER_UNLOCK(ec); 515 516 ifp->if_flags &= ~IFF_ALLMULTI; 517 518 URL_CLRBIT2(un, URL_RCR, URL_RCR_AAM | URL_RCR_AAP); 519 520 if (mcnt) { 521 URL_SETBIT2(un, URL_RCR, URL_RCR_AM); 522 } else { 523 URL_CLRBIT2(un, URL_RCR, URL_RCR_AM); 524 } 525 url_csr_write_4(un, URL_MAR0, hashes[0]); 526 url_csr_write_4(un, URL_MAR4, hashes[1]); 527 } 528 529 static void 530 url_setiff(struct usbnet *un) 531 { 532 usbnet_lock(un); 533 usbnet_lock_mii_un_locked(un); 534 url_setiff_locked(un); 535 usbnet_unlock_mii_un_locked(un); 536 usbnet_unlock(un); 537 } 538 539 static unsigned 540 url_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c) 541 { 542 int total_len; 543 544 usbnet_isowned_tx(un); 545 546 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__)); 547 548 KASSERT(un->un_tx_bufsz >= URL_MIN_FRAME_LEN); 549 if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz) 550 return 0; 551 552 /* Copy the mbuf data into a contiguous buffer */ 553 m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf); 554 total_len = m->m_pkthdr.len; 555 556 if (total_len < URL_MIN_FRAME_LEN) { 557 memset(c->unc_buf + total_len, 0, 558 URL_MIN_FRAME_LEN - total_len); 559 total_len = URL_MIN_FRAME_LEN; 560 } 561 562 DPRINTF(("%s: %s: send %d bytes\n", device_xname(un->un_dev), 563 __func__, total_len)); 564 565 return total_len; 566 } 567 568 static void 569 url_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len) 570 { 571 struct ifnet *ifp = usbnet_ifp(un); 572 url_rxhdr_t rxhdr; 573 574 usbnet_isowned_rx(un); 575 576 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__)); 577 578 if (total_len <= ETHER_CRC_LEN || total_len <= sizeof(rxhdr)) { 579 if_statinc(ifp, if_ierrors); 580 return; 581 } 582 583 memcpy(&rxhdr, c->unc_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr)); 584 585 DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n", 586 device_xname(un->un_dev), 587 UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK, 588 UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "", 589 UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "", 590 UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "", 591 UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : "")); 592 593 if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) { 594 if_statinc(ifp, if_ierrors); 595 return; 596 } 597 598 total_len -= ETHER_CRC_LEN; 599 600 DPRINTF(("%s: %s: deliver %d\n", device_xname(un->un_dev), 601 __func__, total_len)); 602 usbnet_enqueue(un, c->unc_buf, total_len, 0, 0, 0); 603 } 604 605 #if 0 606 static void url_intr(void) 607 { 608 } 609 #endif 610 611 static int 612 url_ioctl_cb(struct ifnet *ifp, u_long cmd, void *data) 613 { 614 struct usbnet * const un = ifp->if_softc; 615 616 switch (cmd) { 617 case SIOCADDMULTI: 618 case SIOCDELMULTI: 619 url_setiff(un); 620 break; 621 default: 622 break; 623 } 624 625 return 0; 626 } 627 628 /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */ 629 static void 630 url_stop_cb(struct ifnet *ifp, int disable) 631 { 632 struct usbnet * const un = ifp->if_softc; 633 634 usbnet_isowned(un); 635 636 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 637 638 url_reset(un); 639 } 640 641 static int 642 url_int_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val) 643 { 644 uint16_t data; 645 usbd_status err = USBD_NORMAL_COMPLETION; 646 647 usbnet_isowned_mii(un); 648 649 DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n", 650 device_xname(un->un_dev), __func__, phy, reg)); 651 652 /* XXX: one PHY only for the RTL8150 internal PHY */ 653 if (phy != 0) { 654 DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n", 655 device_xname(un->un_dev), __func__, phy)); 656 return EINVAL; 657 } 658 659 switch (reg) { 660 case MII_BMCR: /* Control Register */ 661 reg = URL_BMCR; 662 break; 663 case MII_BMSR: /* Status Register */ 664 reg = URL_BMSR; 665 break; 666 case MII_PHYIDR1: 667 case MII_PHYIDR2: 668 *val = 0; 669 goto R_DONE; 670 break; 671 case MII_ANAR: /* Autonegotiation advertisement */ 672 reg = URL_ANAR; 673 break; 674 case MII_ANLPAR: /* Autonegotiation link partner abilities */ 675 reg = URL_ANLP; 676 break; 677 case URLPHY_MSR: /* Media Status Register */ 678 reg = URL_MSR; 679 break; 680 default: 681 printf("%s: %s: bad register %04x\n", 682 device_xname(un->un_dev), __func__, reg); 683 return EINVAL; 684 } 685 686 if (reg == URL_MSR) 687 data = url_csr_read_1(un, reg); 688 else 689 data = url_csr_read_2(un, reg); 690 *val = data; 691 692 R_DONE: 693 DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04hx\n", 694 device_xname(un->un_dev), __func__, phy, reg, *val)); 695 696 return err; 697 } 698 699 static int 700 url_int_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val) 701 { 702 usbnet_isowned_mii(un); 703 704 DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x val=0x%04hx\n", 705 device_xname(un->un_dev), __func__, phy, reg, val)); 706 707 /* XXX: one PHY only for the RTL8150 internal PHY */ 708 if (phy != 0) { 709 DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n", 710 device_xname(un->un_dev), __func__, phy)); 711 return EINVAL; 712 } 713 714 switch (reg) { 715 case MII_BMCR: /* Control Register */ 716 reg = URL_BMCR; 717 break; 718 case MII_BMSR: /* Status Register */ 719 reg = URL_BMSR; 720 break; 721 case MII_PHYIDR1: 722 case MII_PHYIDR2: 723 return 0; 724 case MII_ANAR: /* Autonegotiation advertisement */ 725 reg = URL_ANAR; 726 break; 727 case MII_ANLPAR: /* Autonegotiation link partner abilities */ 728 reg = URL_ANLP; 729 break; 730 case URLPHY_MSR: /* Media Status Register */ 731 reg = URL_MSR; 732 break; 733 default: 734 printf("%s: %s: bad register %04x\n", 735 device_xname(un->un_dev), __func__, reg); 736 return EINVAL; 737 } 738 739 if (reg == URL_MSR) 740 url_csr_write_1(un, reg, val); 741 else 742 url_csr_write_2(un, reg, val); 743 744 return 0; 745 } 746 747 static void 748 url_mii_statchg_cb(struct ifnet *ifp) 749 { 750 struct usbnet * const un = ifp->if_softc; 751 752 DPRINTF(("%s: %s: enter\n", ifp->if_xname, __func__)); 753 754 /* XXX */ 755 usbnet_set_link(un, true); 756 } 757 758 #if 0 759 /* 760 * external PHYs support, but not test. 761 */ 762 static usbd_status 763 url_ext_mii_read_reg(struct usbnet *un, int phy, int reg) 764 { 765 uint16_t val; 766 767 DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n", 768 device_xname(un->un_dev), __func__, phy, reg)); 769 770 url_csr_write_1(un, URL_PHYADD, phy & URL_PHYADD_MASK); 771 /* 772 * RTL8150L will initiate a MII management data transaction 773 * if PHYCNT_OWN bit is set 1 by software. After transaction, 774 * this bit is auto cleared by TRL8150L. 775 */ 776 url_csr_write_1(un, URL_PHYCNT, 777 (reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR); 778 for (i = 0; i < URL_TIMEOUT; i++) { 779 if ((url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0) 780 break; 781 } 782 if (i == URL_TIMEOUT) { 783 printf("%s: MII read timed out\n", device_xname(un->un_dev)); 784 } 785 786 val = url_csr_read_2(un, URL_PHYDAT); 787 788 DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n", 789 device_xname(un->un_dev), __func__, phy, reg, val)); 790 791 return USBD_NORMAL_COMPLETION; 792 } 793 794 static usbd_status 795 url_ext_mii_write_reg(struct usbnet *un, int phy, int reg, int data) 796 { 797 798 DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n", 799 device_xname(un->un_dev), __func__, phy, reg, data)); 800 801 url_csr_write_2(un, URL_PHYDAT, data); 802 url_csr_write_1(un, URL_PHYADD, phy); 803 url_csr_write_1(un, URL_PHYCNT, reg | URL_PHYCNT_RWCR); /* Write */ 804 805 for (i=0; i < URL_TIMEOUT; i++) { 806 if (url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) 807 break; 808 } 809 810 if (i == URL_TIMEOUT) { 811 printf("%s: MII write timed out\n", 812 device_xname(un->un_dev)); 813 return USBD_TIMEOUT; 814 } 815 816 return USBD_NORMAL_COMPLETION; 817 } 818 #endif 819 820 #ifdef _MODULE 821 #include "ioconf.c" 822 #endif 823 824 USBNET_MODULE(url) 825
Indexes created Tue Sep 30 11:09:46 GMT 2025