if_url.c revision 1.79
1 /* $NetBSD: if_url.c,v 1.79 2022/03/03 05:50:22 riastradh Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 5 * Shingo WATANABE <nabe (at) nabechan.org>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the author nor the names of any co-contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 */ 32 33 /* 34 * The RTL8150L(Realtek USB to fast ethernet controller) spec can be found at 35 * ftp://ftp.realtek.com.tw/lancard/data_sheet/8150/8150v14.pdf 36 * ftp://152.104.125.40/lancard/data_sheet/8150/8150v14.pdf 37 */ 38 39 /* 40 * TODO: 41 * Interrupt Endpoint support 42 * External PHYs 43 * powerhook() support? 44 */ 45 46 #include <sys/cdefs.h> 47 __KERNEL_RCSID(0, "$NetBSD: if_url.c,v 1.79 2022/03/03 05:50:22 riastradh Exp $"); 48 49 #ifdef _KERNEL_OPT 50 #include "opt_inet.h" 51 #include "opt_usb.h" 52 #endif 53 54 #include <sys/param.h> 55 56 #include <net/if_ether.h> 57 #ifdef INET 58 #include <netinet/in.h> 59 #include <netinet/if_inarp.h> 60 #endif 61 62 #include <dev/mii/urlphyreg.h> 63 64 #include <dev/usb/usbnet.h> 65 66 #include <dev/usb/if_urlreg.h> 67 68 /* Function declarations */ 69 static int url_match(device_t, cfdata_t, void *); 70 static void url_attach(device_t, device_t, void *); 71 72 CFATTACH_DECL_NEW(url, sizeof(struct usbnet), url_match, url_attach, 73 usbnet_detach, usbnet_activate); 74 75 static unsigned url_uno_tx_prepare(struct usbnet *, struct mbuf *, 76 struct usbnet_chain *); 77 static void url_uno_rx_loop(struct usbnet *, struct usbnet_chain *, uint32_t); 78 static int url_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *); 79 static int url_uno_mii_write_reg(struct usbnet *, int, int, uint16_t); 80 static int url_uno_ioctl(struct ifnet *, u_long, void *); 81 static void url_uno_stop(struct ifnet *, int); 82 static void url_uno_mii_statchg(struct ifnet *); 83 static int url_uno_init(struct ifnet *); 84 static void url_rcvfilt_locked(struct usbnet *); 85 static void url_reset(struct usbnet *); 86 87 static int url_csr_read_1(struct usbnet *, int); 88 static int url_csr_read_2(struct usbnet *, int); 89 static int url_csr_write_1(struct usbnet *, int, int); 90 static int url_csr_write_2(struct usbnet *, int, int); 91 static int url_csr_write_4(struct usbnet *, int, int); 92 static int url_mem(struct usbnet *, int, int, void *, int); 93 94 static const struct usbnet_ops url_ops = { 95 .uno_stop = url_uno_stop, 96 .uno_ioctl = url_uno_ioctl, 97 .uno_read_reg = url_uno_mii_read_reg, 98 .uno_write_reg = url_uno_mii_write_reg, 99 .uno_statchg = url_uno_mii_statchg, 100 .uno_tx_prepare = url_uno_tx_prepare, 101 .uno_rx_loop = url_uno_rx_loop, 102 .uno_init = url_uno_init, 103 }; 104 105 /* Macros */ 106 #ifdef URL_DEBUG 107 #define DPRINTF(x) if (urldebug) printf x 108 #define DPRINTFN(n, x) if (urldebug >= (n)) printf x 109 int urldebug = 0; 110 #else 111 #define DPRINTF(x) 112 #define DPRINTFN(n, x) 113 #endif 114 115 #define URL_SETBIT(un, reg, x) \ 116 url_csr_write_1(un, reg, url_csr_read_1(un, reg) | (x)) 117 118 #define URL_SETBIT2(un, reg, x) \ 119 url_csr_write_2(un, reg, url_csr_read_2(un, reg) | (x)) 120 121 #define URL_CLRBIT(un, reg, x) \ 122 url_csr_write_1(un, reg, url_csr_read_1(un, reg) & ~(x)) 123 124 #define URL_CLRBIT2(un, reg, x) \ 125 url_csr_write_2(un, reg, url_csr_read_2(un, reg) & ~(x)) 126 127 static const struct url_type { 128 struct usb_devno url_dev; 129 uint16_t url_flags; 130 #define URL_EXT_PHY 0x0001 131 } url_devs [] = { 132 /* MELCO LUA-KTX */ 133 {{ USB_VENDOR_MELCO, USB_PRODUCT_MELCO_LUAKTX }, 0}, 134 /* Realtek RTL8150L Generic (GREEN HOUSE USBKR100) */ 135 {{ USB_VENDOR_REALTEK, USB_PRODUCT_REALTEK_RTL8150L}, 0}, 136 /* Longshine LCS-8138TX */ 137 {{ USB_VENDOR_ABOCOM, USB_PRODUCT_ABOCOM_LCS8138TX}, 0}, 138 /* Micronet SP128AR */ 139 {{ USB_VENDOR_MICRONET, USB_PRODUCT_MICRONET_SP128AR}, 0}, 140 /* OQO model 01 */ 141 {{ USB_VENDOR_OQO, USB_PRODUCT_OQO_ETHER01}, 0}, 142 }; 143 #define url_lookup(v, p) ((const struct url_type *)usb_lookup(url_devs, v, p)) 144 145 146 /* Probe */ 147 static int 148 url_match(device_t parent, cfdata_t match, void *aux) 149 { 150 struct usb_attach_arg *uaa = aux; 151 152 return url_lookup(uaa->uaa_vendor, uaa->uaa_product) != NULL ? 153 UMATCH_VENDOR_PRODUCT : UMATCH_NONE; 154 } 155 /* Attach */ 156 static void 157 url_attach(device_t parent, device_t self, void *aux) 158 { 159 USBNET_MII_DECL_DEFAULT(unm); 160 struct usbnet * const un = device_private(self); 161 struct usb_attach_arg *uaa = aux; 162 struct usbd_device *dev = uaa->uaa_device; 163 struct usbd_interface *iface; 164 usbd_status err; 165 usb_interface_descriptor_t *id; 166 usb_endpoint_descriptor_t *ed; 167 char *devinfop; 168 int i; 169 170 aprint_naive("\n"); 171 aprint_normal("\n"); 172 devinfop = usbd_devinfo_alloc(dev, 0); 173 aprint_normal_dev(self, "%s\n", devinfop); 174 usbd_devinfo_free(devinfop); 175 176 un->un_dev = self; 177 un->un_udev = dev; 178 un->un_sc = un; 179 un->un_ops = &url_ops; 180 un->un_rx_xfer_flags = USBD_SHORT_XFER_OK; 181 un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER; 182 un->un_rx_list_cnt = URL_RX_LIST_CNT; 183 un->un_tx_list_cnt = URL_TX_LIST_CNT; 184 un->un_rx_bufsz = URL_BUFSZ; 185 un->un_tx_bufsz = URL_BUFSZ; 186 187 /* Move the device into the configured state. */ 188 err = usbd_set_config_no(dev, URL_CONFIG_NO, 1); 189 if (err) { 190 aprint_error_dev(self, "failed to set configuration" 191 ", err=%s\n", usbd_errstr(err)); 192 return; 193 } 194 195 /* get control interface */ 196 err = usbd_device2interface_handle(dev, URL_IFACE_INDEX, &iface); 197 if (err) { 198 aprint_error_dev(self, "failed to get interface, err=%s\n", 199 usbd_errstr(err)); 200 return; 201 } 202 203 un->un_iface = iface; 204 un->un_flags = url_lookup(uaa->uaa_vendor, uaa->uaa_product)->url_flags; 205 #if 0 206 if (un->un_flags & URL_EXT_PHY) { 207 un->un_read_reg_cb = url_ext_mii_read_reg; 208 un->un_write_reg_cb = url_ext_mii_write_reg; 209 } 210 #endif 211 212 /* get interface descriptor */ 213 id = usbd_get_interface_descriptor(un->un_iface); 214 215 /* find endpoints */ 216 un->un_ed[USBNET_ENDPT_RX] = un->un_ed[USBNET_ENDPT_TX] = 217 un->un_ed[USBNET_ENDPT_INTR] = 0; 218 for (i = 0; i < id->bNumEndpoints; i++) { 219 ed = usbd_interface2endpoint_descriptor(un->un_iface, i); 220 if (ed == NULL) { 221 aprint_error_dev(self, 222 "couldn't get endpoint %d\n", i); 223 return; 224 } 225 if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK && 226 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 227 un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress; 228 else if ((ed->bmAttributes & UE_XFERTYPE) == UE_BULK && 229 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT) 230 un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress; 231 else if ((ed->bmAttributes & UE_XFERTYPE) == UE_INTERRUPT && 232 UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 233 un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress; 234 } 235 236 if (un->un_ed[USBNET_ENDPT_RX] == 0 || 237 un->un_ed[USBNET_ENDPT_TX] == 0 || 238 un->un_ed[USBNET_ENDPT_INTR] == 0) { 239 aprint_error_dev(self, "missing endpoint\n"); 240 return; 241 } 242 243 /* Set these up now for url_mem(). */ 244 usbnet_attach(un, "urldet"); 245 246 usbnet_lock_core(un); 247 usbnet_busy(un); 248 249 /* reset the adapter */ 250 url_reset(un); 251 252 /* Get Ethernet Address */ 253 err = url_mem(un, URL_CMD_READMEM, URL_IDR0, (void *)un->un_eaddr, 254 ETHER_ADDR_LEN); 255 usbnet_unbusy(un); 256 usbnet_unlock_core(un); 257 if (err) { 258 aprint_error_dev(self, "read MAC address failed\n"); 259 return; 260 } 261 262 /* initialize interface information */ 263 usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST, 264 0, &unm); 265 } 266 267 /* read/write memory */ 268 static int 269 url_mem(struct usbnet *un, int cmd, int offset, void *buf, int len) 270 { 271 usb_device_request_t req; 272 usbd_status err; 273 274 usbnet_isowned_core(un); 275 276 DPRINTFN(0x200, 277 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 278 279 if (usbnet_isdying(un)) 280 return 0; 281 282 if (cmd == URL_CMD_READMEM) 283 req.bmRequestType = UT_READ_VENDOR_DEVICE; 284 else 285 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 286 req.bRequest = URL_REQ_MEM; 287 USETW(req.wValue, offset); 288 USETW(req.wIndex, 0x0000); 289 USETW(req.wLength, len); 290 291 err = usbd_do_request(un->un_udev, &req, buf); 292 if (err) { 293 DPRINTF(("%s: url_mem(): %s failed. off=%04x, err=%d\n", 294 device_xname(un->un_dev), 295 cmd == URL_CMD_READMEM ? "read" : "write", 296 offset, err)); 297 } 298 299 return err; 300 } 301 302 /* read 1byte from register */ 303 static int 304 url_csr_read_1(struct usbnet *un, int reg) 305 { 306 uint8_t val = 0; 307 308 DPRINTFN(0x100, 309 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 310 311 return url_mem(un, URL_CMD_READMEM, reg, &val, 1) ? 0 : val; 312 } 313 314 /* read 2bytes from register */ 315 static int 316 url_csr_read_2(struct usbnet *un, int reg) 317 { 318 uWord val; 319 320 DPRINTFN(0x100, 321 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 322 323 USETW(val, 0); 324 return url_mem(un, URL_CMD_READMEM, reg, &val, 2) ? 0 : UGETW(val); 325 } 326 327 /* write 1byte to register */ 328 static int 329 url_csr_write_1(struct usbnet *un, int reg, int aval) 330 { 331 uint8_t val = aval; 332 333 DPRINTFN(0x100, 334 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 335 336 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 1) ? -1 : 0; 337 } 338 339 /* write 2bytes to register */ 340 static int 341 url_csr_write_2(struct usbnet *un, int reg, int aval) 342 { 343 uWord val; 344 345 DPRINTFN(0x100, 346 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 347 348 USETW(val, aval); 349 350 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 2) ? -1 : 0; 351 } 352 353 /* write 4bytes to register */ 354 static int 355 url_csr_write_4(struct usbnet *un, int reg, int aval) 356 { 357 uDWord val; 358 359 DPRINTFN(0x100, 360 ("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 361 362 USETDW(val, aval); 363 364 return url_mem(un, URL_CMD_WRITEMEM, reg, &val, 4) ? -1 : 0; 365 } 366 367 static int 368 url_init_locked(struct ifnet *ifp) 369 { 370 struct usbnet * const un = ifp->if_softc; 371 const u_char *eaddr; 372 int i; 373 374 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 375 376 usbnet_isowned_core(un); 377 378 if (usbnet_isdying(un)) 379 return EIO; 380 381 /* Cancel pending I/O and free all TX/RX buffers */ 382 usbnet_stop(un, ifp, 1); 383 384 eaddr = CLLADDR(ifp->if_sadl); 385 for (i = 0; i < ETHER_ADDR_LEN; i++) 386 url_csr_write_1(un, URL_IDR0 + i, eaddr[i]); 387 388 /* Init transmission control register */ 389 URL_CLRBIT(un, URL_TCR, 390 URL_TCR_TXRR1 | URL_TCR_TXRR0 | 391 URL_TCR_IFG1 | URL_TCR_IFG0 | 392 URL_TCR_NOCRC); 393 394 /* Init receive control register */ 395 URL_SETBIT2(un, URL_RCR, URL_RCR_TAIL | URL_RCR_AD | URL_RCR_AB); 396 397 /* Accept multicast frame or run promisc. mode */ 398 url_rcvfilt_locked(un); 399 400 /* Enable RX and TX */ 401 URL_SETBIT(un, URL_CR, URL_CR_TE | URL_CR_RE); 402 403 return usbnet_init_rx_tx(un); 404 } 405 406 static int 407 url_uno_init(struct ifnet *ifp) 408 { 409 struct usbnet * const un = ifp->if_softc; 410 411 usbnet_busy(un); 412 int ret = url_init_locked(ifp); 413 usbnet_unbusy(un); 414 415 return ret; 416 } 417 418 static void 419 url_reset(struct usbnet *un) 420 { 421 int i; 422 423 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 424 425 if (usbnet_isdying(un)) 426 return; 427 428 URL_SETBIT(un, URL_CR, URL_CR_SOFT_RST); 429 430 for (i = 0; i < URL_TX_TIMEOUT; i++) { 431 if (!(url_csr_read_1(un, URL_CR) & URL_CR_SOFT_RST)) 432 break; 433 delay(10); /* XXX */ 434 } 435 436 delay(10000); /* XXX */ 437 } 438 439 static void 440 url_rcvfilt_locked(struct usbnet *un) 441 { 442 struct ifnet * const ifp = usbnet_ifp(un); 443 struct ethercom *ec = usbnet_ec(un); 444 struct ether_multi *enm; 445 struct ether_multistep step; 446 uint32_t mchash[2] = { 0, 0 }; 447 int h = 0, rcr; 448 449 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 450 451 usbnet_isowned_core(un); 452 453 if (usbnet_isdying(un)) 454 return; 455 456 rcr = url_csr_read_2(un, URL_RCR); 457 rcr &= ~(URL_RCR_AAP | URL_RCR_AAM | URL_RCR_AM); 458 459 ETHER_LOCK(ec); 460 if (ifp->if_flags & IFF_PROMISC) { 461 ec->ec_flags |= ETHER_F_ALLMULTI; 462 ETHER_UNLOCK(ec); 463 /* run promisc. mode */ 464 rcr |= URL_RCR_AAM; /* ??? */ 465 rcr |= URL_RCR_AAP; 466 goto update; 467 } 468 ec->ec_flags &= ~ETHER_F_ALLMULTI; 469 ETHER_FIRST_MULTI(step, ec, enm); 470 while (enm != NULL) { 471 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, ETHER_ADDR_LEN)) { 472 ec->ec_flags |= ETHER_F_ALLMULTI; 473 ETHER_UNLOCK(ec); 474 /* accept all multicast frames */ 475 rcr |= URL_RCR_AAM; 476 goto update; 477 } 478 h = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN); 479 /* 1(31) and 5(30:26) bit sampling */ 480 mchash[h >> 31] |= 1 << ((h >> 26) & 0x1f); 481 ETHER_NEXT_MULTI(step, enm); 482 } 483 ETHER_UNLOCK(ec); 484 if (h != 0) 485 rcr |= URL_RCR_AM; /* activate mcast hash filter */ 486 url_csr_write_4(un, URL_MAR0, mchash[0]); 487 url_csr_write_4(un, URL_MAR4, mchash[1]); 488 update: 489 url_csr_write_2(un, URL_RCR, rcr); 490 } 491 492 static unsigned 493 url_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c) 494 { 495 int total_len; 496 497 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__)); 498 499 KASSERT(un->un_tx_bufsz >= URL_MIN_FRAME_LEN); 500 if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz) 501 return 0; 502 503 /* Copy the mbuf data into a contiguous buffer */ 504 m_copydata(m, 0, m->m_pkthdr.len, c->unc_buf); 505 total_len = m->m_pkthdr.len; 506 507 if (total_len < URL_MIN_FRAME_LEN) { 508 memset(c->unc_buf + total_len, 0, 509 URL_MIN_FRAME_LEN - total_len); 510 total_len = URL_MIN_FRAME_LEN; 511 } 512 513 DPRINTF(("%s: %s: send %d bytes\n", device_xname(un->un_dev), 514 __func__, total_len)); 515 516 return total_len; 517 } 518 519 static void 520 url_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len) 521 { 522 struct ifnet *ifp = usbnet_ifp(un); 523 url_rxhdr_t rxhdr; 524 525 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev),__func__)); 526 527 if (total_len <= ETHER_CRC_LEN || total_len <= sizeof(rxhdr)) { 528 if_statinc(ifp, if_ierrors); 529 return; 530 } 531 532 memcpy(&rxhdr, c->unc_buf + total_len - ETHER_CRC_LEN, sizeof(rxhdr)); 533 534 DPRINTF(("%s: RX Status: %dbytes%s%s%s%s packets\n", 535 device_xname(un->un_dev), 536 UGETW(rxhdr) & URL_RXHDR_BYTEC_MASK, 537 UGETW(rxhdr) & URL_RXHDR_VALID_MASK ? ", Valid" : "", 538 UGETW(rxhdr) & URL_RXHDR_RUNTPKT_MASK ? ", Runt" : "", 539 UGETW(rxhdr) & URL_RXHDR_PHYPKT_MASK ? ", Physical match" : "", 540 UGETW(rxhdr) & URL_RXHDR_MCASTPKT_MASK ? ", Multicast" : "")); 541 542 if ((UGETW(rxhdr) & URL_RXHDR_VALID_MASK) == 0) { 543 if_statinc(ifp, if_ierrors); 544 return; 545 } 546 547 total_len -= ETHER_CRC_LEN; 548 549 DPRINTF(("%s: %s: deliver %d\n", device_xname(un->un_dev), 550 __func__, total_len)); 551 usbnet_enqueue(un, c->unc_buf, total_len, 0, 0, 0); 552 } 553 554 #if 0 555 static void url_intr(void) 556 { 557 } 558 #endif 559 560 static int 561 url_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data) 562 { 563 struct usbnet * const un = ifp->if_softc; 564 565 usbnet_lock_core(un); 566 usbnet_busy(un); 567 568 switch (cmd) { 569 case SIOCADDMULTI: 570 case SIOCDELMULTI: 571 url_rcvfilt_locked(un); 572 break; 573 default: 574 break; 575 } 576 577 usbnet_unbusy(un); 578 usbnet_unlock_core(un); 579 580 return 0; 581 } 582 583 /* Stop the adapter and free any mbufs allocated to the RX and TX lists. */ 584 static void 585 url_uno_stop(struct ifnet *ifp, int disable) 586 { 587 struct usbnet * const un = ifp->if_softc; 588 589 DPRINTF(("%s: %s: enter\n", device_xname(un->un_dev), __func__)); 590 591 url_reset(un); 592 } 593 594 static int 595 url_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val) 596 { 597 uint16_t data; 598 usbd_status err = USBD_NORMAL_COMPLETION; 599 600 DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x\n", 601 device_xname(un->un_dev), __func__, phy, reg)); 602 603 /* XXX: one PHY only for the RTL8150 internal PHY */ 604 if (phy != 0) { 605 DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n", 606 device_xname(un->un_dev), __func__, phy)); 607 return EINVAL; 608 } 609 610 switch (reg) { 611 case MII_BMCR: /* Control Register */ 612 reg = URL_BMCR; 613 break; 614 case MII_BMSR: /* Status Register */ 615 reg = URL_BMSR; 616 break; 617 case MII_PHYIDR1: 618 case MII_PHYIDR2: 619 *val = 0; 620 goto R_DONE; 621 break; 622 case MII_ANAR: /* Autonegotiation advertisement */ 623 reg = URL_ANAR; 624 break; 625 case MII_ANLPAR: /* Autonegotiation link partner abilities */ 626 reg = URL_ANLP; 627 break; 628 case URLPHY_MSR: /* Media Status Register */ 629 reg = URL_MSR; 630 break; 631 default: 632 printf("%s: %s: bad register %04x\n", 633 device_xname(un->un_dev), __func__, reg); 634 return EINVAL; 635 } 636 637 if (reg == URL_MSR) 638 data = url_csr_read_1(un, reg); 639 else 640 data = url_csr_read_2(un, reg); 641 *val = data; 642 643 R_DONE: 644 DPRINTFN(0xff, ("%s: %s: phy=%d reg=0x%04x => 0x%04hx\n", 645 device_xname(un->un_dev), __func__, phy, reg, *val)); 646 647 return err; 648 } 649 650 static int 651 url_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val) 652 { 653 654 DPRINTFN(0xff, ("%s: %s: enter, phy=%d reg=0x%04x val=0x%04hx\n", 655 device_xname(un->un_dev), __func__, phy, reg, val)); 656 657 /* XXX: one PHY only for the RTL8150 internal PHY */ 658 if (phy != 0) { 659 DPRINTFN(0xff, ("%s: %s: phy=%d is not supported\n", 660 device_xname(un->un_dev), __func__, phy)); 661 return EINVAL; 662 } 663 664 switch (reg) { 665 case MII_BMCR: /* Control Register */ 666 reg = URL_BMCR; 667 break; 668 case MII_BMSR: /* Status Register */ 669 reg = URL_BMSR; 670 break; 671 case MII_PHYIDR1: 672 case MII_PHYIDR2: 673 return 0; 674 case MII_ANAR: /* Autonegotiation advertisement */ 675 reg = URL_ANAR; 676 break; 677 case MII_ANLPAR: /* Autonegotiation link partner abilities */ 678 reg = URL_ANLP; 679 break; 680 case URLPHY_MSR: /* Media Status Register */ 681 reg = URL_MSR; 682 break; 683 default: 684 printf("%s: %s: bad register %04x\n", 685 device_xname(un->un_dev), __func__, reg); 686 return EINVAL; 687 } 688 689 if (reg == URL_MSR) 690 url_csr_write_1(un, reg, val); 691 else 692 url_csr_write_2(un, reg, val); 693 694 return 0; 695 } 696 697 static void 698 url_uno_mii_statchg(struct ifnet *ifp) 699 { 700 struct usbnet * const un = ifp->if_softc; 701 702 DPRINTF(("%s: %s: enter\n", ifp->if_xname, __func__)); 703 704 /* XXX */ 705 usbnet_set_link(un, true); 706 } 707 708 #if 0 709 /* 710 * external PHYs support, but not test. 711 */ 712 static usbd_status 713 url_ext_mii_read_reg(struct usbnet *un, int phy, int reg) 714 { 715 uint16_t val; 716 717 DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x\n", 718 device_xname(un->un_dev), __func__, phy, reg)); 719 720 url_csr_write_1(un, URL_PHYADD, phy & URL_PHYADD_MASK); 721 /* 722 * RTL8150L will initiate a MII management data transaction 723 * if PHYCNT_OWN bit is set 1 by software. After transaction, 724 * this bit is auto cleared by TRL8150L. 725 */ 726 url_csr_write_1(un, URL_PHYCNT, 727 (reg | URL_PHYCNT_PHYOWN) & ~URL_PHYCNT_RWCR); 728 for (i = 0; i < URL_TIMEOUT; i++) { 729 if ((url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) == 0) 730 break; 731 } 732 if (i == URL_TIMEOUT) { 733 printf("%s: MII read timed out\n", device_xname(un->un_dev)); 734 } 735 736 val = url_csr_read_2(un, URL_PHYDAT); 737 738 DPRINTF(("%s: %s: phy=%d reg=0x%04x => 0x%04x\n", 739 device_xname(un->un_dev), __func__, phy, reg, val)); 740 741 return USBD_NORMAL_COMPLETION; 742 } 743 744 static usbd_status 745 url_ext_mii_write_reg(struct usbnet *un, int phy, int reg, int data) 746 { 747 748 DPRINTF(("%s: %s: enter, phy=%d reg=0x%04x data=0x%04x\n", 749 device_xname(un->un_dev), __func__, phy, reg, data)); 750 751 url_csr_write_2(un, URL_PHYDAT, data); 752 url_csr_write_1(un, URL_PHYADD, phy); 753 url_csr_write_1(un, URL_PHYCNT, reg | URL_PHYCNT_RWCR); /* Write */ 754 755 for (i=0; i < URL_TIMEOUT; i++) { 756 if (url_csr_read_1(un, URL_PHYCNT) & URL_PHYCNT_PHYOWN) 757 break; 758 } 759 760 if (i == URL_TIMEOUT) { 761 printf("%s: MII write timed out\n", 762 device_xname(un->un_dev)); 763 return USBD_TIMEOUT; 764 } 765 766 return USBD_NORMAL_COMPLETION; 767 } 768 #endif 769 770 #ifdef _MODULE 771 #include "ioconf.c" 772 #endif 773 774 USBNET_MODULE(url) 775
Indexes created Wed Oct 01 19:09:53 GMT 2025