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motg.c revision 1.14
      1  1.14     skrll /*	$NetBSD: motg.c,v 1.14 2016/04/23 10:15:32 skrll Exp $	*/
      2   1.1    bouyer 
      3   1.1    bouyer /*
      4   1.1    bouyer  * Copyright (c) 1998, 2004, 2011, 2012, 2014 The NetBSD Foundation, Inc.
      5   1.1    bouyer  * All rights reserved.
      6   1.1    bouyer  *
      7   1.1    bouyer  * This code is derived from software contributed to The NetBSD Foundation
      8   1.1    bouyer  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9   1.1    bouyer  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca),
     10   1.1    bouyer  * Matthew R. Green (mrg (at) eterna.com.au), and Manuel Bouyer (bouyer (at) netbsd.org).
     11   1.1    bouyer  *
     12   1.1    bouyer  * Redistribution and use in source and binary forms, with or without
     13   1.1    bouyer  * modification, are permitted provided that the following conditions
     14   1.1    bouyer  * are met:
     15   1.1    bouyer  * 1. Redistributions of source code must retain the above copyright
     16   1.1    bouyer  *    notice, this list of conditions and the following disclaimer.
     17   1.1    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     18   1.1    bouyer  *    notice, this list of conditions and the following disclaimer in the
     19   1.1    bouyer  *    documentation and/or other materials provided with the distribution.
     20   1.1    bouyer  *
     21   1.1    bouyer  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22   1.1    bouyer  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23   1.1    bouyer  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24   1.1    bouyer  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25   1.1    bouyer  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26   1.1    bouyer  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27   1.1    bouyer  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28   1.1    bouyer  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29   1.1    bouyer  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30   1.1    bouyer  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31   1.1    bouyer  * POSSIBILITY OF SUCH DAMAGE.
     32   1.1    bouyer  */
     33   1.1    bouyer 
     34   1.1    bouyer 
     35   1.1    bouyer /*
     36   1.1    bouyer  * This file contains the driver for the Mentor Graphics Inventra USB
     37   1.1    bouyer  * 2.0 High Speed Dual-Role controller.
     38   1.1    bouyer  *
     39   1.1    bouyer  * NOTE: The current implementation only supports Device Side Mode!
     40   1.1    bouyer  */
     41   1.1    bouyer 
     42  1.14     skrll #include <sys/cdefs.h>
     43  1.14     skrll __KERNEL_RCSID(0, "$NetBSD: motg.c,v 1.14 2016/04/23 10:15:32 skrll Exp $");
     44  1.14     skrll 
     45  1.14     skrll #ifdef _KERNEL_OPT
     46  1.10  jmcneill #include "opt_motg.h"
     47  1.14     skrll #include "opt_usb.h"
     48  1.14     skrll #endif
     49  1.10  jmcneill 
     50  1.14     skrll #include <sys/param.h>
     51   1.1    bouyer 
     52  1.14     skrll #include <sys/bus.h>
     53  1.14     skrll #include <sys/cpu.h>
     54  1.14     skrll #include <sys/device.h>
     55   1.1    bouyer #include <sys/kernel.h>
     56   1.1    bouyer #include <sys/kmem.h>
     57   1.1    bouyer #include <sys/proc.h>
     58   1.1    bouyer #include <sys/queue.h>
     59  1.14     skrll #include <sys/select.h>
     60  1.14     skrll #include <sys/sysctl.h>
     61  1.14     skrll #include <sys/systm.h>
     62   1.1    bouyer 
     63   1.1    bouyer #include <machine/endian.h>
     64   1.1    bouyer 
     65   1.1    bouyer #include <dev/usb/usb.h>
     66   1.1    bouyer #include <dev/usb/usbdi.h>
     67   1.1    bouyer #include <dev/usb/usbdivar.h>
     68   1.1    bouyer #include <dev/usb/usb_mem.h>
     69  1.14     skrll #include <dev/usb/usbhist.h>
     70   1.1    bouyer 
     71  1.10  jmcneill #ifdef MOTG_ALLWINNER
     72  1.10  jmcneill #include <arch/arm/allwinner/awin_otgreg.h>
     73  1.10  jmcneill #else
     74   1.1    bouyer #include <dev/usb/motgreg.h>
     75  1.10  jmcneill #endif
     76  1.10  jmcneill 
     77   1.1    bouyer #include <dev/usb/motgvar.h>
     78  1.14     skrll #include <dev/usb/usbroothub.h>
     79  1.14     skrll 
     80  1.14     skrll #ifdef USB_DEBUG
     81  1.14     skrll #ifndef MOTG_DEBUG
     82  1.14     skrll #define motgdebug 0
     83  1.14     skrll #else
     84  1.14     skrll int motgdebug = 0;
     85  1.14     skrll 
     86  1.14     skrll SYSCTL_SETUP(sysctl_hw_motg_setup, "sysctl hw.motg setup")
     87  1.14     skrll {
     88  1.14     skrll 	int err;
     89  1.14     skrll 	const struct sysctlnode *rnode;
     90  1.14     skrll 	const struct sysctlnode *cnode;
     91  1.14     skrll 
     92  1.14     skrll 	err = sysctl_createv(clog, 0, NULL, &rnode,
     93  1.14     skrll 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "motg",
     94  1.14     skrll 	    SYSCTL_DESCR("motg global controls"),
     95  1.14     skrll 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
     96  1.14     skrll 
     97  1.14     skrll 	if (err)
     98  1.14     skrll 		goto fail;
     99  1.14     skrll 
    100  1.14     skrll 	/* control debugging printfs */
    101  1.14     skrll 	err = sysctl_createv(clog, 0, &rnode, &cnode,
    102  1.14     skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    103  1.14     skrll 	    "debug", SYSCTL_DESCR("Enable debugging output"),
    104  1.14     skrll 	    NULL, 0, &motgdebug, sizeof(motgdebug), CTL_CREATE, CTL_EOL);
    105  1.14     skrll 	if (err)
    106  1.14     skrll 		goto fail;
    107  1.14     skrll 
    108  1.14     skrll 	return;
    109  1.14     skrll fail:
    110  1.14     skrll 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
    111  1.14     skrll }
    112  1.14     skrll 
    113  1.14     skrll #endif /* MOTG_DEBUG */
    114  1.14     skrll #endif /* USB_DEBUG */
    115   1.1    bouyer 
    116   1.1    bouyer #define MD_ROOT 0x0002
    117   1.1    bouyer #define MD_CTRL 0x0004
    118   1.1    bouyer #define MD_BULK 0x0008
    119  1.14     skrll 
    120  1.14     skrll #define	DPRINTF(FMT,A,B,C,D)	USBHIST_LOGN(motgdebug,1,FMT,A,B,C,D)
    121  1.14     skrll #define	DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGM(motgdebug,N,FMT,A,B,C,D)
    122  1.14     skrll #define	MOTGHIST_FUNC()		USBHIST_FUNC()
    123  1.14     skrll #define	MOTGHIST_CALLED(name)	USBHIST_CALLED(motgdebug)
    124  1.14     skrll 
    125   1.1    bouyer 
    126   1.1    bouyer /* various timeouts, for various speeds */
    127   1.1    bouyer /* control NAK timeouts */
    128   1.1    bouyer #define NAK_TO_CTRL	10	/* 1024 frames, about 1s */
    129   1.1    bouyer #define NAK_TO_CTRL_HIGH 13	/* 8k microframes, about 0.8s */
    130   1.1    bouyer 
    131   1.1    bouyer /* intr/iso polling intervals */
    132   1.1    bouyer #define POLL_TO		100	/* 100 frames, about 0.1s */
    133   1.1    bouyer #define POLL_TO_HIGH	10	/* 100 microframes, about 0.12s */
    134   1.1    bouyer 
    135   1.1    bouyer /* bulk NAK timeouts */
    136   1.3    bouyer #define NAK_TO_BULK	0 /* disabled */
    137   1.3    bouyer #define NAK_TO_BULK_HIGH 0
    138   1.1    bouyer 
    139   1.1    bouyer static void 		motg_hub_change(struct motg_softc *);
    140   1.1    bouyer 
    141  1.14     skrll static usbd_status	motg_root_intr_transfer(struct usbd_xfer *);
    142  1.14     skrll static usbd_status	motg_root_intr_start(struct usbd_xfer *);
    143  1.14     skrll static void		motg_root_intr_abort(struct usbd_xfer *);
    144  1.14     skrll static void		motg_root_intr_close(struct usbd_pipe *);
    145  1.14     skrll static void		motg_root_intr_done(struct usbd_xfer *);
    146  1.14     skrll 
    147  1.14     skrll static usbd_status	motg_open(struct usbd_pipe *);
    148   1.1    bouyer static void		motg_poll(struct usbd_bus *);
    149   1.1    bouyer static void		motg_softintr(void *);
    150  1.14     skrll static struct usbd_xfer *
    151  1.14     skrll 			motg_allocx(struct usbd_bus *, unsigned int);
    152  1.14     skrll static void		motg_freex(struct usbd_bus *, struct usbd_xfer *);
    153   1.1    bouyer static void		motg_get_lock(struct usbd_bus *, kmutex_t **);
    154  1.14     skrll static int		motg_roothub_ctrl(struct usbd_bus *, usb_device_request_t *,
    155  1.14     skrll 			    void *, int);
    156  1.14     skrll 
    157  1.14     skrll static void		motg_noop(struct usbd_pipe *pipe);
    158   1.1    bouyer static usbd_status	motg_portreset(struct motg_softc*);
    159   1.1    bouyer 
    160  1.14     skrll static usbd_status	motg_device_ctrl_transfer(struct usbd_xfer *);
    161  1.14     skrll static usbd_status	motg_device_ctrl_start(struct usbd_xfer *);
    162  1.14     skrll static void		motg_device_ctrl_abort(struct usbd_xfer *);
    163  1.14     skrll static void		motg_device_ctrl_close(struct usbd_pipe *);
    164  1.14     skrll static void		motg_device_ctrl_done(struct usbd_xfer *);
    165   1.1    bouyer static usbd_status	motg_device_ctrl_start1(struct motg_softc *);
    166  1.14     skrll static void		motg_device_ctrl_read(struct usbd_xfer *);
    167   1.1    bouyer static void		motg_device_ctrl_intr_rx(struct motg_softc *);
    168   1.1    bouyer static void		motg_device_ctrl_intr_tx(struct motg_softc *);
    169   1.1    bouyer 
    170  1.14     skrll static usbd_status	motg_device_data_transfer(struct usbd_xfer *);
    171  1.14     skrll static usbd_status	motg_device_data_start(struct usbd_xfer *);
    172   1.1    bouyer static usbd_status	motg_device_data_start1(struct motg_softc *,
    173   1.1    bouyer 			    struct motg_hw_ep *);
    174  1.14     skrll static void		motg_device_data_abort(struct usbd_xfer *);
    175  1.14     skrll static void		motg_device_data_close(struct usbd_pipe *);
    176  1.14     skrll static void		motg_device_data_done(struct usbd_xfer *);
    177   1.1    bouyer static void		motg_device_intr_rx(struct motg_softc *, int);
    178   1.1    bouyer static void		motg_device_intr_tx(struct motg_softc *, int);
    179  1.14     skrll static void		motg_device_data_read(struct usbd_xfer *);
    180  1.14     skrll static void		motg_device_data_write(struct usbd_xfer *);
    181   1.1    bouyer 
    182  1.14     skrll static void		motg_waitintr(struct motg_softc *, struct usbd_xfer *);
    183  1.14     skrll static void		motg_device_clear_toggle(struct usbd_pipe *);
    184  1.14     skrll static void		motg_device_xfer_abort(struct usbd_xfer *);
    185   1.1    bouyer 
    186   1.1    bouyer #define UBARR(sc) bus_space_barrier((sc)->sc_iot, (sc)->sc_ioh, 0, (sc)->sc_size, \
    187   1.1    bouyer 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    188   1.1    bouyer #define UWRITE1(sc, r, x) \
    189   1.1    bouyer  do { UBARR(sc); bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (r), (x)); \
    190   1.1    bouyer  } while (/*CONSTCOND*/0)
    191   1.1    bouyer #define UWRITE2(sc, r, x) \
    192   1.1    bouyer  do { UBARR(sc); bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (r), (x)); \
    193   1.1    bouyer  } while (/*CONSTCOND*/0)
    194   1.1    bouyer #define UWRITE4(sc, r, x) \
    195   1.1    bouyer  do { UBARR(sc); bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (r), (x)); \
    196   1.1    bouyer  } while (/*CONSTCOND*/0)
    197   1.1    bouyer 
    198   1.1    bouyer static __inline uint32_t
    199   1.1    bouyer UREAD1(struct motg_softc *sc, bus_size_t r)
    200   1.1    bouyer {
    201   1.1    bouyer 
    202   1.1    bouyer 	UBARR(sc);
    203   1.1    bouyer 	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, r);
    204   1.1    bouyer }
    205   1.1    bouyer static __inline uint32_t
    206   1.1    bouyer UREAD2(struct motg_softc *sc, bus_size_t r)
    207   1.1    bouyer {
    208   1.1    bouyer 
    209   1.1    bouyer 	UBARR(sc);
    210   1.1    bouyer 	return bus_space_read_2(sc->sc_iot, sc->sc_ioh, r);
    211   1.1    bouyer }
    212   1.4     joerg 
    213   1.4     joerg #if 0
    214   1.1    bouyer static __inline uint32_t
    215   1.1    bouyer UREAD4(struct motg_softc *sc, bus_size_t r)
    216   1.1    bouyer {
    217   1.1    bouyer 
    218   1.1    bouyer 	UBARR(sc);
    219   1.1    bouyer 	return bus_space_read_4(sc->sc_iot, sc->sc_ioh, r);
    220   1.1    bouyer }
    221   1.4     joerg #endif
    222   1.1    bouyer 
    223   1.1    bouyer static void
    224   1.7     skrll musbotg_pull_common(struct motg_softc *sc, uint8_t on)
    225   1.1    bouyer {
    226  1.14     skrll 	uint8_t val;
    227   1.1    bouyer 
    228  1.14     skrll 	val = UREAD1(sc, MUSB2_REG_POWER);
    229  1.14     skrll 	if (on)
    230  1.14     skrll 		val |= MUSB2_MASK_SOFTC;
    231  1.14     skrll 	else
    232  1.14     skrll 		val &= ~MUSB2_MASK_SOFTC;
    233   1.1    bouyer 
    234  1.14     skrll 	UWRITE1(sc, MUSB2_REG_POWER, val);
    235   1.1    bouyer }
    236   1.1    bouyer 
    237   1.1    bouyer const struct usbd_bus_methods motg_bus_methods = {
    238  1.14     skrll 	.ubm_open =	motg_open,
    239  1.14     skrll 	.ubm_softint =	motg_softintr,
    240  1.14     skrll 	.ubm_dopoll =	motg_poll,
    241  1.14     skrll 	.ubm_allocx =	motg_allocx,
    242  1.14     skrll 	.ubm_freex =	motg_freex,
    243  1.14     skrll 	.ubm_getlock =	motg_get_lock,
    244  1.14     skrll 	.ubm_rhctrl =	motg_roothub_ctrl,
    245   1.1    bouyer };
    246   1.1    bouyer 
    247   1.1    bouyer const struct usbd_pipe_methods motg_root_intr_methods = {
    248  1.14     skrll 	.upm_transfer =	motg_root_intr_transfer,
    249  1.14     skrll 	.upm_start =	motg_root_intr_start,
    250  1.14     skrll 	.upm_abort =	motg_root_intr_abort,
    251  1.14     skrll 	.upm_close =	motg_root_intr_close,
    252  1.14     skrll 	.upm_cleartoggle =	motg_noop,
    253  1.14     skrll 	.upm_done =	motg_root_intr_done,
    254   1.1    bouyer };
    255   1.1    bouyer 
    256   1.1    bouyer const struct usbd_pipe_methods motg_device_ctrl_methods = {
    257  1.14     skrll 	.upm_transfer =	motg_device_ctrl_transfer,
    258  1.14     skrll 	.upm_start =	motg_device_ctrl_start,
    259  1.14     skrll 	.upm_abort =	motg_device_ctrl_abort,
    260  1.14     skrll 	.upm_close =	motg_device_ctrl_close,
    261  1.14     skrll 	.upm_cleartoggle =	motg_noop,
    262  1.14     skrll 	.upm_done =	motg_device_ctrl_done,
    263   1.1    bouyer };
    264   1.1    bouyer 
    265   1.1    bouyer const struct usbd_pipe_methods motg_device_data_methods = {
    266  1.14     skrll 	.upm_transfer =	motg_device_data_transfer,
    267  1.14     skrll 	.upm_start =	motg_device_data_start,
    268  1.14     skrll 	.upm_abort =	motg_device_data_abort,
    269  1.14     skrll 	.upm_close =	motg_device_data_close,
    270  1.14     skrll 	.upm_cleartoggle =	motg_device_clear_toggle,
    271  1.14     skrll 	.upm_done =	motg_device_data_done,
    272   1.1    bouyer };
    273   1.1    bouyer 
    274  1.14     skrll int
    275   1.1    bouyer motg_init(struct motg_softc *sc)
    276   1.1    bouyer {
    277   1.1    bouyer 	uint32_t nrx, ntx, val;
    278   1.1    bouyer 	int dynfifo;
    279   1.1    bouyer 	int offset, i;
    280   1.1    bouyer 
    281  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    282  1.14     skrll 
    283   1.1    bouyer 	if (sc->sc_mode == MOTG_MODE_DEVICE)
    284  1.14     skrll 		return ENOTSUP; /* not supported */
    285   1.1    bouyer 
    286   1.1    bouyer 	/* disable all interrupts */
    287   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_INTUSBE, 0);
    288   1.1    bouyer 	UWRITE2(sc, MUSB2_REG_INTTXE, 0);
    289   1.1    bouyer 	UWRITE2(sc, MUSB2_REG_INTRXE, 0);
    290   1.1    bouyer 	/* disable pullup */
    291   1.1    bouyer 
    292   1.7     skrll 	musbotg_pull_common(sc, 0);
    293   1.1    bouyer 
    294  1.10  jmcneill #ifdef MUSB2_REG_RXDBDIS
    295   1.1    bouyer 	/* disable double packet buffering XXX what's this ? */
    296   1.1    bouyer 	UWRITE2(sc, MUSB2_REG_RXDBDIS, 0xFFFF);
    297   1.1    bouyer 	UWRITE2(sc, MUSB2_REG_TXDBDIS, 0xFFFF);
    298  1.10  jmcneill #endif
    299   1.1    bouyer 
    300   1.1    bouyer 	/* enable HighSpeed and ISO Update flags */
    301   1.1    bouyer 
    302   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_POWER,
    303   1.1    bouyer 	    MUSB2_MASK_HSENAB | MUSB2_MASK_ISOUPD);
    304   1.1    bouyer 
    305   1.1    bouyer 	if (sc->sc_mode == MOTG_MODE_DEVICE) {
    306   1.1    bouyer 		/* clear Session bit, if set */
    307   1.1    bouyer 		val = UREAD1(sc, MUSB2_REG_DEVCTL);
    308   1.1    bouyer 		val &= ~MUSB2_MASK_SESS;
    309   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_DEVCTL, val);
    310   1.1    bouyer 	} else {
    311   1.1    bouyer 		/* Enter session for Host mode */
    312   1.1    bouyer 		val = UREAD1(sc, MUSB2_REG_DEVCTL);
    313   1.1    bouyer 		val |= MUSB2_MASK_SESS;
    314   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_DEVCTL, val);
    315   1.1    bouyer 	}
    316   1.1    bouyer 	delay(1000);
    317  1.14     skrll 	DPRINTF("DEVCTL 0x%x", UREAD1(sc, MUSB2_REG_DEVCTL), 0, 0, 0);
    318   1.1    bouyer 
    319   1.1    bouyer 	/* disable testmode */
    320   1.1    bouyer 
    321   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TESTMODE, 0);
    322   1.1    bouyer 
    323  1.10  jmcneill #ifdef MUSB2_REG_MISC
    324   1.7     skrll 	/* set default value */
    325   1.1    bouyer 
    326   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_MISC, 0);
    327  1.10  jmcneill #endif
    328   1.1    bouyer 
    329   1.7     skrll 	/* select endpoint index 0 */
    330   1.1    bouyer 
    331   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
    332   1.1    bouyer 
    333   1.9  jmcneill 	if (sc->sc_ep_max == 0) {
    334   1.9  jmcneill 		/* read out number of endpoints */
    335   1.9  jmcneill 		nrx = (UREAD1(sc, MUSB2_REG_EPINFO) / 16);
    336   1.1    bouyer 
    337   1.9  jmcneill 		ntx = (UREAD1(sc, MUSB2_REG_EPINFO) % 16);
    338   1.1    bouyer 
    339   1.9  jmcneill 		/* these numbers exclude the control endpoint */
    340   1.1    bouyer 
    341  1.14     skrll 		DPRINTFN(1,"RX/TX endpoints: %u/%u", nrx, ntx, 0, 0);
    342   1.1    bouyer 
    343   1.9  jmcneill 		sc->sc_ep_max = MAX(nrx, ntx);
    344   1.9  jmcneill 	} else {
    345   1.9  jmcneill 		nrx = ntx = sc->sc_ep_max;
    346   1.9  jmcneill 	}
    347   1.1    bouyer 	if (sc->sc_ep_max == 0) {
    348   1.1    bouyer 		aprint_error_dev(sc->sc_dev, " no endpoints\n");
    349  1.14     skrll 		return -1;
    350   1.1    bouyer 	}
    351   1.1    bouyer 	KASSERT(sc->sc_ep_max <= MOTG_MAX_HW_EP);
    352   1.1    bouyer 	/* read out configuration data */
    353   1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_CONFDATA);
    354   1.1    bouyer 
    355  1.14     skrll 	DPRINTF("Config Data: 0x%02x", val, 0, 0, 0);
    356   1.1    bouyer 
    357   1.1    bouyer 	dynfifo = (val & MUSB2_MASK_CD_DYNFIFOSZ) ? 1 : 0;
    358   1.1    bouyer 
    359   1.7     skrll 	if (dynfifo) {
    360   1.1    bouyer 		aprint_normal_dev(sc->sc_dev, "Dynamic FIFO sizing detected, "
    361   1.1    bouyer 		    "assuming 16Kbytes of FIFO RAM\n");
    362   1.7     skrll 	}
    363   1.7     skrll 
    364  1.14     skrll 	DPRINTF("HW version: 0x%04x\n", UREAD1(sc, MUSB2_REG_HWVERS), 0, 0, 0);
    365   1.1    bouyer 
    366   1.1    bouyer 	/* initialise endpoint profiles */
    367   1.1    bouyer 	sc->sc_in_ep[0].ep_fifo_size = 64;
    368   1.1    bouyer 	sc->sc_out_ep[0].ep_fifo_size = 0; /* not used */
    369   1.1    bouyer 	sc->sc_out_ep[0].ep_number = sc->sc_in_ep[0].ep_number = 0;
    370   1.1    bouyer 	SIMPLEQ_INIT(&sc->sc_in_ep[0].ep_pipes);
    371   1.1    bouyer 	offset = 64;
    372   1.1    bouyer 
    373   1.1    bouyer 	for (i = 1; i <= sc->sc_ep_max; i++) {
    374   1.1    bouyer 		int fiforx_size, fifotx_size, fifo_size;
    375   1.1    bouyer 
    376   1.7     skrll 		/* select endpoint */
    377   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_EPINDEX, i);
    378   1.1    bouyer 
    379  1.11  jmcneill 		if (sc->sc_ep_fifosize) {
    380  1.11  jmcneill 			fiforx_size = fifotx_size = sc->sc_ep_fifosize;
    381  1.11  jmcneill 		} else {
    382  1.11  jmcneill 			val = UREAD1(sc, MUSB2_REG_FSIZE);
    383  1.11  jmcneill 			fiforx_size = (val & MUSB2_MASK_RX_FSIZE) >> 4;
    384  1.11  jmcneill 			fifotx_size = (val & MUSB2_MASK_TX_FSIZE);
    385  1.11  jmcneill 		}
    386   1.1    bouyer 
    387  1.14     skrll 		DPRINTF("Endpoint %u FIFO size: IN=%u, OUT=%u, DYN=%d",
    388  1.14     skrll 		    i, fifotx_size, fiforx_size, dynfifo);
    389   1.1    bouyer 
    390   1.1    bouyer 		if (dynfifo) {
    391  1.12  jmcneill 			if (sc->sc_ep_fifosize) {
    392  1.12  jmcneill 				fifo_size = ffs(sc->sc_ep_fifosize) - 1;
    393   1.1    bouyer 			} else {
    394  1.12  jmcneill 				if (i < 3) {
    395  1.12  jmcneill 					fifo_size = 12;       /* 4K */
    396  1.12  jmcneill 				} else if (i < 10) {
    397  1.12  jmcneill 					fifo_size = 10;       /* 1K */
    398  1.12  jmcneill 				} else {
    399  1.12  jmcneill 					fifo_size = 7;        /* 128 bytes */
    400  1.12  jmcneill 				}
    401   1.7     skrll 			}
    402   1.1    bouyer 			if (fiforx_size && (i <= nrx)) {
    403   1.1    bouyer 				fiforx_size = fifo_size;
    404   1.1    bouyer 				if (fifo_size > 7) {
    405   1.3    bouyer #if 0
    406   1.7     skrll 					UWRITE1(sc, MUSB2_REG_RXFIFOSZ,
    407   1.1    bouyer 					    MUSB2_VAL_FIFOSZ(fifo_size) |
    408   1.1    bouyer 					    MUSB2_MASK_FIFODB);
    409   1.3    bouyer #else
    410   1.7     skrll 					UWRITE1(sc, MUSB2_REG_RXFIFOSZ,
    411   1.3    bouyer 					    MUSB2_VAL_FIFOSZ(fifo_size));
    412   1.3    bouyer #endif
    413   1.1    bouyer 				} else {
    414   1.7     skrll 					UWRITE1(sc, MUSB2_REG_RXFIFOSZ,
    415   1.3    bouyer 					    MUSB2_VAL_FIFOSZ(fifo_size));
    416   1.1    bouyer 				}
    417   1.7     skrll 				UWRITE2(sc, MUSB2_REG_RXFIFOADD,
    418   1.1    bouyer 				    offset >> 3);
    419   1.1    bouyer 				offset += (1 << fiforx_size);
    420   1.1    bouyer 			}
    421   1.1    bouyer 			if (fifotx_size && (i <= ntx)) {
    422   1.1    bouyer 				fifotx_size = fifo_size;
    423   1.1    bouyer 				if (fifo_size > 7) {
    424   1.3    bouyer #if 0
    425   1.7     skrll 					UWRITE1(sc, MUSB2_REG_TXFIFOSZ,
    426   1.7     skrll 					    MUSB2_VAL_FIFOSZ(fifo_size) |
    427   1.1    bouyer 					    MUSB2_MASK_FIFODB);
    428   1.3    bouyer #else
    429   1.7     skrll 					UWRITE1(sc, MUSB2_REG_TXFIFOSZ,
    430   1.7     skrll 					    MUSB2_VAL_FIFOSZ(fifo_size));
    431   1.3    bouyer #endif
    432   1.1    bouyer 				} else {
    433   1.7     skrll 					UWRITE1(sc, MUSB2_REG_TXFIFOSZ,
    434   1.7     skrll 					    MUSB2_VAL_FIFOSZ(fifo_size));
    435   1.7     skrll 				}
    436   1.7     skrll 
    437   1.7     skrll 				UWRITE2(sc, MUSB2_REG_TXFIFOADD,
    438   1.1    bouyer 				    offset >> 3);
    439   1.7     skrll 
    440   1.1    bouyer 				offset += (1 << fifotx_size);
    441   1.1    bouyer 			}
    442   1.1    bouyer 		}
    443   1.1    bouyer 		if (fiforx_size && (i <= nrx)) {
    444   1.1    bouyer 			sc->sc_in_ep[i].ep_fifo_size = (1 << fiforx_size);
    445   1.1    bouyer 			SIMPLEQ_INIT(&sc->sc_in_ep[i].ep_pipes);
    446   1.1    bouyer 		}
    447   1.1    bouyer 		if (fifotx_size && (i <= ntx)) {
    448   1.1    bouyer 			sc->sc_out_ep[i].ep_fifo_size = (1 << fifotx_size);
    449   1.1    bouyer 			SIMPLEQ_INIT(&sc->sc_out_ep[i].ep_pipes);
    450   1.1    bouyer 		}
    451   1.1    bouyer 		sc->sc_out_ep[i].ep_number = sc->sc_in_ep[i].ep_number = i;
    452   1.1    bouyer 	}
    453   1.1    bouyer 
    454   1.7     skrll 
    455  1.14     skrll 	DPRINTF("Dynamic FIFO size = %d bytes", offset, 0, 0, 0);
    456   1.1    bouyer 
    457   1.1    bouyer 	/* turn on default interrupts */
    458   1.1    bouyer 
    459   1.1    bouyer 	if (sc->sc_mode == MOTG_MODE_HOST) {
    460   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_INTUSBE, 0xff);
    461   1.1    bouyer 		UWRITE2(sc, MUSB2_REG_INTTXE, 0xffff);
    462   1.1    bouyer 		UWRITE2(sc, MUSB2_REG_INTRXE, 0xffff);
    463   1.1    bouyer 	} else
    464   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_INTUSBE, MUSB2_MASK_IRESET);
    465   1.1    bouyer 
    466   1.1    bouyer 	sc->sc_xferpool = pool_cache_init(sizeof(struct motg_xfer), 0, 0, 0,
    467   1.1    bouyer 	    "motgxfer", NULL, IPL_USB, NULL, NULL, NULL);
    468   1.1    bouyer 
    469   1.1    bouyer 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    470  1.13     skrll 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
    471   1.1    bouyer 
    472   1.1    bouyer 	/* Set up the bus struct. */
    473  1.14     skrll 	sc->sc_bus.ub_methods = &motg_bus_methods;
    474  1.14     skrll 	sc->sc_bus.ub_pipesize= sizeof(struct motg_pipe);
    475  1.14     skrll 	sc->sc_bus.ub_revision = USBREV_2_0;
    476  1.14     skrll 	sc->sc_bus.ub_usedma = false;
    477  1.14     skrll 	sc->sc_bus.ub_hcpriv = sc;
    478   1.1    bouyer 	snprintf(sc->sc_vendor, sizeof(sc->sc_vendor),
    479   1.1    bouyer 	    "Mentor Graphics");
    480   1.1    bouyer 	sc->sc_child = config_found(sc->sc_dev, &sc->sc_bus, usbctlprint);
    481  1.14     skrll 	return 0;
    482   1.1    bouyer }
    483   1.1    bouyer 
    484   1.1    bouyer static int
    485  1.14     skrll motg_select_ep(struct motg_softc *sc, struct usbd_pipe *pipe)
    486   1.1    bouyer {
    487  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
    488  1.14     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
    489   1.1    bouyer 	struct motg_hw_ep *ep;
    490   1.1    bouyer 	int i, size;
    491   1.1    bouyer 
    492  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    493  1.14     skrll 
    494   1.1    bouyer 	ep = (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) ?
    495   1.1    bouyer 	    sc->sc_in_ep : sc->sc_out_ep;
    496  1.14     skrll 	size = UE_GET_SIZE(UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize));
    497   1.1    bouyer 
    498   1.1    bouyer 	for (i = sc->sc_ep_max; i >= 1; i--) {
    499  1.14     skrll 		DPRINTF(UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ?
    500  1.14     skrll 		    "in_ep[%d].ep_fifo_size %d size %d ref %d" :
    501  1.14     skrll 		    "out_ep[%d].ep_fifo_size %d size %d ref %d", i,
    502  1.14     skrll 		    ep[i].ep_fifo_size, size, ep[i].refcount);
    503   1.1    bouyer 		if (ep[i].ep_fifo_size >= size) {
    504   1.1    bouyer 			/* found a suitable endpoint */
    505   1.1    bouyer 			otgpipe->hw_ep = &ep[i];
    506   1.1    bouyer 			mutex_enter(&sc->sc_lock);
    507   1.1    bouyer 			if (otgpipe->hw_ep->refcount > 0) {
    508   1.1    bouyer 				/* no luck, try next */
    509   1.1    bouyer 				mutex_exit(&sc->sc_lock);
    510   1.1    bouyer 				otgpipe->hw_ep = NULL;
    511   1.1    bouyer 			} else {
    512   1.1    bouyer 				otgpipe->hw_ep->refcount++;
    513   1.1    bouyer 				SIMPLEQ_INSERT_TAIL(&otgpipe->hw_ep->ep_pipes,
    514   1.1    bouyer 				    otgpipe, ep_pipe_list);
    515   1.1    bouyer 				mutex_exit(&sc->sc_lock);
    516   1.1    bouyer 				return 0;
    517   1.1    bouyer 			}
    518   1.1    bouyer 		}
    519   1.1    bouyer 	}
    520   1.1    bouyer 	return -1;
    521   1.1    bouyer }
    522   1.1    bouyer 
    523   1.1    bouyer /* Open a new pipe. */
    524   1.1    bouyer usbd_status
    525  1.14     skrll motg_open(struct usbd_pipe *pipe)
    526   1.1    bouyer {
    527  1.14     skrll 	struct motg_softc *sc = MOTG_PIPE2SC(pipe);
    528  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
    529  1.14     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
    530  1.14     skrll 	uint8_t rhaddr = pipe->up_dev->ud_bus->ub_rhaddr;
    531  1.14     skrll 
    532  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    533  1.14     skrll 
    534  1.14     skrll 	DPRINTF("pipe=%p, addr=%d, endpt=%d (%d)", pipe,
    535  1.14     skrll 	    pipe->up_dev->ud_addr, ed->bEndpointAddress, rhaddr);
    536   1.1    bouyer 
    537   1.1    bouyer 	if (sc->sc_dying)
    538   1.1    bouyer 		return USBD_IOERROR;
    539   1.1    bouyer 
    540   1.1    bouyer 	/* toggle state needed for bulk endpoints */
    541  1.14     skrll 	otgpipe->nexttoggle = pipe->up_endpoint->ue_toggle;
    542   1.1    bouyer 
    543  1.14     skrll 	if (pipe->up_dev->ud_addr == rhaddr) {
    544   1.1    bouyer 		switch (ed->bEndpointAddress) {
    545   1.1    bouyer 		case USB_CONTROL_ENDPOINT:
    546  1.14     skrll 			pipe->up_methods = &roothub_ctrl_methods;
    547   1.1    bouyer 			break;
    548  1.14     skrll 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
    549  1.14     skrll 			pipe->up_methods = &motg_root_intr_methods;
    550   1.1    bouyer 			break;
    551   1.1    bouyer 		default:
    552  1.14     skrll 			return USBD_INVAL;
    553   1.1    bouyer 		}
    554   1.1    bouyer 	} else {
    555   1.1    bouyer 		switch (ed->bmAttributes & UE_XFERTYPE) {
    556   1.1    bouyer 		case UE_CONTROL:
    557  1.14     skrll 			pipe->up_methods = &motg_device_ctrl_methods;
    558   1.1    bouyer 			/* always use sc_in_ep[0] for in and out */
    559   1.1    bouyer 			otgpipe->hw_ep = &sc->sc_in_ep[0];
    560   1.1    bouyer 			mutex_enter(&sc->sc_lock);
    561   1.1    bouyer 			otgpipe->hw_ep->refcount++;
    562   1.1    bouyer 			SIMPLEQ_INSERT_TAIL(&otgpipe->hw_ep->ep_pipes,
    563   1.1    bouyer 			    otgpipe, ep_pipe_list);
    564   1.1    bouyer 			mutex_exit(&sc->sc_lock);
    565   1.1    bouyer 			break;
    566   1.1    bouyer 		case UE_BULK:
    567   1.1    bouyer 		case UE_INTERRUPT:
    568   1.7     skrll 			DPRINTFN(MD_BULK,
    569  1.14     skrll 			    "type %d dir %d pipe wMaxPacketSize %d",
    570  1.14     skrll 			    UE_GET_XFERTYPE(ed->bmAttributes),
    571  1.14     skrll 			    UE_GET_DIR(pipe->up_endpoint->ue_edesc->bEndpointAddress),
    572  1.14     skrll 			    UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize), 0);
    573   1.1    bouyer 			if (motg_select_ep(sc, pipe) != 0)
    574   1.1    bouyer 				goto bad;
    575   1.1    bouyer 			KASSERT(otgpipe->hw_ep != NULL);
    576  1.14     skrll 			pipe->up_methods = &motg_device_data_methods;
    577  1.14     skrll 			otgpipe->nexttoggle = pipe->up_endpoint->ue_toggle;
    578   1.1    bouyer 			break;
    579   1.1    bouyer 		default:
    580   1.1    bouyer 			goto bad;
    581   1.1    bouyer #ifdef notyet
    582   1.1    bouyer 		case UE_ISOCHRONOUS:
    583   1.1    bouyer 			...
    584   1.1    bouyer 			break;
    585   1.1    bouyer #endif /* notyet */
    586   1.1    bouyer 		}
    587   1.1    bouyer 	}
    588  1.14     skrll 	return USBD_NORMAL_COMPLETION;
    589   1.1    bouyer 
    590   1.1    bouyer  bad:
    591  1.14     skrll 	return USBD_NOMEM;
    592   1.1    bouyer }
    593   1.1    bouyer 
    594   1.1    bouyer void
    595   1.1    bouyer motg_softintr(void *v)
    596   1.1    bouyer {
    597   1.1    bouyer 	struct usbd_bus *bus = v;
    598  1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    599   1.1    bouyer 	uint16_t rx_status, tx_status;
    600   1.1    bouyer 	uint8_t ctrl_status;
    601   1.1    bouyer 	uint32_t val;
    602   1.1    bouyer 	int i;
    603   1.1    bouyer 
    604  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    605   1.1    bouyer 
    606  1.14     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    607  1.14     skrll 
    608  1.14     skrll 	DPRINTFN(MD_ROOT | MD_CTRL, "sc %p", sc, 0 ,0 ,0);
    609   1.1    bouyer 
    610   1.1    bouyer 	mutex_spin_enter(&sc->sc_intr_lock);
    611   1.1    bouyer 	rx_status = sc->sc_intr_rx_ep;
    612   1.1    bouyer 	sc->sc_intr_rx_ep = 0;
    613   1.1    bouyer 	tx_status = sc->sc_intr_tx_ep;
    614   1.1    bouyer 	sc->sc_intr_tx_ep = 0;
    615   1.1    bouyer 	ctrl_status = sc->sc_intr_ctrl;
    616   1.1    bouyer 	sc->sc_intr_ctrl = 0;
    617   1.1    bouyer 	mutex_spin_exit(&sc->sc_intr_lock);
    618   1.1    bouyer 
    619   1.1    bouyer 	ctrl_status |= UREAD1(sc, MUSB2_REG_INTUSB);
    620   1.1    bouyer 
    621   1.1    bouyer 	if (ctrl_status & (MUSB2_MASK_IRESET |
    622   1.1    bouyer 	    MUSB2_MASK_IRESUME | MUSB2_MASK_ISUSP |
    623   1.1    bouyer 	    MUSB2_MASK_ICONN | MUSB2_MASK_IDISC)) {
    624  1.14     skrll 		DPRINTFN(MD_ROOT | MD_CTRL, "bus 0x%x", ctrl_status, 0, 0, 0);
    625   1.1    bouyer 
    626   1.1    bouyer 		if (ctrl_status & MUSB2_MASK_IRESET) {
    627   1.1    bouyer 			sc->sc_isreset = 1;
    628   1.1    bouyer 			sc->sc_port_suspended = 0;
    629   1.1    bouyer 			sc->sc_port_suspended_change = 1;
    630   1.1    bouyer 			sc->sc_connected_changed = 1;
    631   1.1    bouyer 			sc->sc_port_enabled = 1;
    632   1.1    bouyer 
    633   1.1    bouyer 			val = UREAD1(sc, MUSB2_REG_POWER);
    634   1.1    bouyer 			if (val & MUSB2_MASK_HSMODE)
    635   1.1    bouyer 				sc->sc_high_speed = 1;
    636   1.1    bouyer 			else
    637   1.1    bouyer 				sc->sc_high_speed = 0;
    638  1.14     skrll 			DPRINTFN(MD_ROOT | MD_CTRL, "speed %d", sc->sc_high_speed,
    639  1.14     skrll 			    0, 0, 0);
    640   1.1    bouyer 
    641   1.1    bouyer 			/* turn off interrupts */
    642   1.1    bouyer 			val = MUSB2_MASK_IRESET;
    643   1.1    bouyer 			val &= ~MUSB2_MASK_IRESUME;
    644   1.1    bouyer 			val |= MUSB2_MASK_ISUSP;
    645   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_INTUSBE, val);
    646   1.1    bouyer 			UWRITE2(sc, MUSB2_REG_INTTXE, 0);
    647   1.1    bouyer 			UWRITE2(sc, MUSB2_REG_INTRXE, 0);
    648   1.1    bouyer 		}
    649   1.1    bouyer 		if (ctrl_status & MUSB2_MASK_IRESUME) {
    650   1.1    bouyer 			if (sc->sc_port_suspended) {
    651   1.1    bouyer 				sc->sc_port_suspended = 0;
    652   1.1    bouyer 				sc->sc_port_suspended_change = 1;
    653   1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_INTUSBE);
    654   1.1    bouyer 				/* disable resume interrupt */
    655   1.1    bouyer 				val &= ~MUSB2_MASK_IRESUME;
    656   1.1    bouyer 				/* enable suspend interrupt */
    657   1.1    bouyer 				val |= MUSB2_MASK_ISUSP;
    658   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_INTUSBE, val);
    659   1.1    bouyer 			}
    660   1.1    bouyer 		} else if (ctrl_status & MUSB2_MASK_ISUSP) {
    661   1.1    bouyer 			if (!sc->sc_port_suspended) {
    662   1.1    bouyer 				sc->sc_port_suspended = 1;
    663   1.1    bouyer 				sc->sc_port_suspended_change = 1;
    664   1.1    bouyer 
    665   1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_INTUSBE);
    666   1.1    bouyer 				/* disable suspend interrupt */
    667   1.1    bouyer 				val &= ~MUSB2_MASK_ISUSP;
    668   1.1    bouyer 				/* enable resume interrupt */
    669   1.1    bouyer 				val |= MUSB2_MASK_IRESUME;
    670   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_INTUSBE, val);
    671   1.1    bouyer 			}
    672   1.1    bouyer 		}
    673   1.1    bouyer 		if (ctrl_status & MUSB2_MASK_ICONN) {
    674   1.1    bouyer 			sc->sc_connected = 1;
    675   1.1    bouyer 			sc->sc_connected_changed = 1;
    676   1.1    bouyer 			sc->sc_isreset = 1;
    677   1.1    bouyer 			sc->sc_port_enabled = 1;
    678   1.1    bouyer 		} else if (ctrl_status & MUSB2_MASK_IDISC) {
    679   1.1    bouyer 			sc->sc_connected = 0;
    680   1.1    bouyer 			sc->sc_connected_changed = 1;
    681   1.1    bouyer 			sc->sc_isreset = 0;
    682   1.1    bouyer 			sc->sc_port_enabled = 0;
    683   1.1    bouyer 		}
    684   1.1    bouyer 
    685   1.1    bouyer 		/* complete root HUB interrupt endpoint */
    686   1.1    bouyer 
    687   1.1    bouyer 		motg_hub_change(sc);
    688   1.1    bouyer 	}
    689   1.1    bouyer 	/*
    690   1.1    bouyer 	 * read in interrupt status and mix with the status we
    691   1.1    bouyer 	 * got from the wrapper
    692   1.1    bouyer 	 */
    693   1.1    bouyer 	rx_status |= UREAD2(sc, MUSB2_REG_INTRX);
    694   1.1    bouyer 	tx_status |= UREAD2(sc, MUSB2_REG_INTTX);
    695   1.1    bouyer 
    696  1.14     skrll 	KASSERTMSG((rx_status & 0x01) == 0, "ctrl_rx %08x", rx_status);
    697   1.1    bouyer 	if (tx_status & 0x01)
    698   1.1    bouyer 		motg_device_ctrl_intr_tx(sc);
    699   1.1    bouyer 	for (i = 1; i <= sc->sc_ep_max; i++) {
    700   1.1    bouyer 		if (rx_status & (0x01 << i))
    701   1.1    bouyer 			motg_device_intr_rx(sc, i);
    702   1.1    bouyer 		if (tx_status & (0x01 << i))
    703   1.1    bouyer 			motg_device_intr_tx(sc, i);
    704   1.1    bouyer 	}
    705   1.1    bouyer 	return;
    706   1.1    bouyer }
    707   1.1    bouyer 
    708   1.1    bouyer void
    709   1.1    bouyer motg_poll(struct usbd_bus *bus)
    710   1.1    bouyer {
    711  1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    712   1.1    bouyer 
    713   1.1    bouyer 	sc->sc_intr_poll(sc->sc_intr_poll_arg);
    714   1.1    bouyer 	mutex_enter(&sc->sc_lock);
    715   1.1    bouyer 	motg_softintr(bus);
    716   1.1    bouyer 	mutex_exit(&sc->sc_lock);
    717   1.1    bouyer }
    718   1.1    bouyer 
    719   1.1    bouyer int
    720   1.1    bouyer motg_intr(struct motg_softc *sc, uint16_t rx_ep, uint16_t tx_ep,
    721   1.2    bouyer     uint8_t ctrl)
    722   1.1    bouyer {
    723   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_intr_lock));
    724   1.1    bouyer 	sc->sc_intr_tx_ep = tx_ep;
    725   1.1    bouyer 	sc->sc_intr_rx_ep = rx_ep;
    726   1.1    bouyer 	sc->sc_intr_ctrl = ctrl;
    727   1.1    bouyer 
    728  1.14     skrll 	if (!sc->sc_bus.ub_usepolling) {
    729   1.1    bouyer 		usb_schedsoftintr(&sc->sc_bus);
    730   1.1    bouyer 	}
    731   1.1    bouyer 	return 1;
    732   1.1    bouyer }
    733   1.1    bouyer 
    734   1.2    bouyer int
    735   1.2    bouyer motg_intr_vbus(struct motg_softc *sc, int vbus)
    736   1.2    bouyer {
    737   1.2    bouyer 	uint8_t val;
    738  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    739  1.14     skrll 
    740   1.2    bouyer 	if (sc->sc_mode == MOTG_MODE_HOST && vbus == 0) {
    741  1.14     skrll 		DPRINTF("vbus down, try to re-enable", 0, 0, 0, 0);
    742   1.2    bouyer 		/* try to re-enter session for Host mode */
    743   1.2    bouyer 		val = UREAD1(sc, MUSB2_REG_DEVCTL);
    744   1.2    bouyer 		val |= MUSB2_MASK_SESS;
    745   1.2    bouyer 		UWRITE1(sc, MUSB2_REG_DEVCTL, val);
    746   1.2    bouyer 	}
    747   1.2    bouyer 	return 1;
    748   1.2    bouyer }
    749   1.2    bouyer 
    750  1.14     skrll struct usbd_xfer *
    751  1.14     skrll motg_allocx(struct usbd_bus *bus, unsigned int nframes)
    752   1.1    bouyer {
    753  1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    754  1.14     skrll 	struct usbd_xfer *xfer;
    755   1.1    bouyer 
    756   1.1    bouyer 	xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
    757   1.1    bouyer 	if (xfer != NULL) {
    758   1.1    bouyer 		memset(xfer, 0, sizeof(struct motg_xfer));
    759   1.1    bouyer #ifdef DIAGNOSTIC
    760  1.14     skrll 		xfer->ux_state = XFER_BUSY;
    761   1.1    bouyer #endif
    762   1.1    bouyer 	}
    763  1.14     skrll 	return xfer;
    764   1.1    bouyer }
    765   1.1    bouyer 
    766   1.1    bouyer void
    767  1.14     skrll motg_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
    768   1.1    bouyer {
    769  1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    770   1.1    bouyer 
    771   1.1    bouyer #ifdef DIAGNOSTIC
    772  1.14     skrll 	if (xfer->ux_state != XFER_BUSY) {
    773   1.1    bouyer 		printf("motg_freex: xfer=%p not busy, 0x%08x\n", xfer,
    774  1.14     skrll 		       xfer->ux_state);
    775   1.1    bouyer 	}
    776  1.14     skrll 	xfer->ux_state = XFER_FREE;
    777   1.1    bouyer #endif
    778   1.1    bouyer 	pool_cache_put(sc->sc_xferpool, xfer);
    779   1.1    bouyer }
    780   1.1    bouyer 
    781   1.1    bouyer static void
    782   1.1    bouyer motg_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    783   1.1    bouyer {
    784  1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    785   1.1    bouyer 
    786   1.1    bouyer 	*lock = &sc->sc_lock;
    787   1.1    bouyer }
    788   1.1    bouyer 
    789   1.1    bouyer /*
    790  1.14     skrll  * Routines to emulate the root hub.
    791   1.1    bouyer  */
    792  1.14     skrll Static int
    793  1.14     skrll motg_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
    794  1.14     skrll     void *buf, int buflen)
    795  1.14     skrll {
    796  1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    797  1.14     skrll 	int status, change, totlen = 0;
    798  1.14     skrll 	uint16_t len, value, index;
    799   1.1    bouyer 	usb_port_status_t ps;
    800   1.1    bouyer 	usbd_status err;
    801   1.1    bouyer 	uint32_t val;
    802   1.1    bouyer 
    803  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    804  1.14     skrll 
    805   1.1    bouyer 	if (sc->sc_dying)
    806  1.14     skrll 		return -1;
    807   1.1    bouyer 
    808  1.14     skrll 	DPRINTFN(MD_ROOT, "type=0x%02x request=%02x", req->bmRequestType,
    809  1.14     skrll 	    req->bRequest, 0, 0);
    810   1.1    bouyer 
    811   1.1    bouyer 	len = UGETW(req->wLength);
    812   1.1    bouyer 	value = UGETW(req->wValue);
    813   1.1    bouyer 	index = UGETW(req->wIndex);
    814   1.1    bouyer 
    815   1.1    bouyer #define C(x,y) ((x) | ((y) << 8))
    816  1.14     skrll 	switch (C(req->bRequest, req->bmRequestType)) {
    817  1.14     skrll 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
    818  1.14     skrll 		DPRINTFN(MD_ROOT, "wValue=0x%04x", value, 0, 0, 0);
    819  1.14     skrll 		switch (value) {
    820  1.14     skrll 		case C(0, UDESC_DEVICE): {
    821  1.14     skrll 			usb_device_descriptor_t devd;
    822  1.14     skrll 
    823  1.14     skrll 			totlen = min(buflen, sizeof(devd));
    824  1.14     skrll 			memcpy(&devd, buf, totlen);
    825  1.14     skrll 			USETW(devd.idVendor, sc->sc_id_vendor);
    826  1.14     skrll 			memcpy(buf, &devd, totlen);
    827  1.14     skrll 			break;
    828   1.1    bouyer 		}
    829  1.14     skrll 		case C(1, UDESC_STRING):
    830  1.14     skrll #define sd ((usb_string_descriptor_t *)buf)
    831  1.14     skrll 			/* Vendor */
    832  1.14     skrll 			totlen = usb_makestrdesc(sd, len, sc->sc_vendor);
    833   1.1    bouyer 			break;
    834  1.14     skrll 		case C(2, UDESC_STRING):
    835  1.14     skrll 			/* Product */
    836  1.14     skrll 			totlen = usb_makestrdesc(sd, len, "MOTG root hub");
    837   1.1    bouyer 			break;
    838   1.1    bouyer #undef sd
    839   1.1    bouyer 		default:
    840  1.14     skrll 			/* default from usbroothub */
    841  1.14     skrll 			return buflen;
    842   1.1    bouyer 		}
    843   1.1    bouyer 		break;
    844   1.1    bouyer 	/* Hub requests */
    845   1.1    bouyer 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
    846   1.1    bouyer 		break;
    847   1.1    bouyer 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
    848   1.1    bouyer 		DPRINTFN(MD_ROOT,
    849  1.14     skrll 		    "UR_CLEAR_PORT_FEATURE port=%d feature=%d", index, value,
    850  1.14     skrll 		    0, 0);
    851   1.1    bouyer 		if (index != 1) {
    852  1.14     skrll 			return -1;
    853   1.1    bouyer 		}
    854  1.14     skrll 		switch (value) {
    855   1.1    bouyer 		case UHF_PORT_ENABLE:
    856   1.1    bouyer 			sc->sc_port_enabled = 0;
    857   1.1    bouyer 			break;
    858   1.1    bouyer 		case UHF_PORT_SUSPEND:
    859   1.1    bouyer 			if (sc->sc_port_suspended != 0) {
    860   1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_POWER);
    861   1.1    bouyer 				val &= ~MUSB2_MASK_SUSPMODE;
    862   1.1    bouyer 				val |= MUSB2_MASK_RESUME;
    863   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_POWER, val);
    864   1.1    bouyer 				/* wait 20 milliseconds */
    865   1.1    bouyer 				usb_delay_ms(&sc->sc_bus, 20);
    866   1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_POWER);
    867   1.1    bouyer 				val &= ~MUSB2_MASK_RESUME;
    868   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_POWER, val);
    869   1.1    bouyer 				sc->sc_port_suspended = 0;
    870   1.1    bouyer 				sc->sc_port_suspended_change = 1;
    871   1.1    bouyer 			}
    872   1.1    bouyer 			break;
    873   1.1    bouyer 		case UHF_PORT_RESET:
    874   1.1    bouyer 			break;
    875   1.1    bouyer 		case UHF_C_PORT_CONNECTION:
    876   1.1    bouyer 			break;
    877   1.1    bouyer 		case UHF_C_PORT_ENABLE:
    878   1.1    bouyer 			break;
    879   1.1    bouyer 		case UHF_C_PORT_OVER_CURRENT:
    880   1.1    bouyer 			break;
    881   1.1    bouyer 		case UHF_C_PORT_RESET:
    882   1.1    bouyer 			sc->sc_isreset = 0;
    883  1.14     skrll 			break;
    884   1.1    bouyer 		case UHF_PORT_POWER:
    885   1.1    bouyer 			/* XXX todo */
    886   1.1    bouyer 			break;
    887   1.1    bouyer 		case UHF_PORT_CONNECTION:
    888   1.1    bouyer 		case UHF_PORT_OVER_CURRENT:
    889   1.1    bouyer 		case UHF_PORT_LOW_SPEED:
    890   1.1    bouyer 		case UHF_C_PORT_SUSPEND:
    891   1.1    bouyer 		default:
    892  1.14     skrll 			return -1;
    893   1.1    bouyer 		}
    894   1.1    bouyer 		break;
    895   1.1    bouyer 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
    896  1.14     skrll 		return -1;
    897   1.1    bouyer 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
    898   1.1    bouyer 		if (len == 0)
    899   1.1    bouyer 			break;
    900   1.1    bouyer 		if ((value & 0xff) != 0) {
    901  1.14     skrll 			return -1;
    902   1.1    bouyer 		}
    903  1.14     skrll 		totlen = buflen;
    904   1.1    bouyer 		break;
    905   1.1    bouyer 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
    906   1.1    bouyer 		if (len != 4) {
    907  1.14     skrll 			return -1;
    908   1.1    bouyer 		}
    909   1.1    bouyer 		memset(buf, 0, len);
    910   1.1    bouyer 		totlen = len;
    911   1.1    bouyer 		break;
    912   1.1    bouyer 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
    913   1.1    bouyer 		if (index != 1) {
    914  1.14     skrll 			return -1;
    915   1.1    bouyer 		}
    916   1.1    bouyer 		if (len != 4) {
    917  1.14     skrll 			return -1;
    918   1.1    bouyer 		}
    919   1.1    bouyer 		status = change = 0;
    920   1.1    bouyer 		if (sc->sc_connected)
    921   1.1    bouyer 			status |= UPS_CURRENT_CONNECT_STATUS;
    922   1.1    bouyer 		if (sc->sc_connected_changed) {
    923   1.1    bouyer 			change |= UPS_C_CONNECT_STATUS;
    924   1.1    bouyer 			sc->sc_connected_changed = 0;
    925   1.1    bouyer 		}
    926   1.1    bouyer 		if (sc->sc_port_enabled)
    927   1.1    bouyer 			status |= UPS_PORT_ENABLED;
    928   1.1    bouyer 		if (sc->sc_port_enabled_changed) {
    929   1.1    bouyer 			change |= UPS_C_PORT_ENABLED;
    930   1.1    bouyer 			sc->sc_port_enabled_changed = 0;
    931   1.1    bouyer 		}
    932   1.1    bouyer 		if (sc->sc_port_suspended)
    933   1.1    bouyer 			status |= UPS_SUSPEND;
    934   1.1    bouyer 		if (sc->sc_high_speed)
    935   1.1    bouyer 			status |= UPS_HIGH_SPEED;
    936   1.1    bouyer 		status |= UPS_PORT_POWER; /* XXX */
    937   1.1    bouyer 		if (sc->sc_isreset)
    938   1.1    bouyer 			change |= UPS_C_PORT_RESET;
    939   1.1    bouyer 		USETW(ps.wPortStatus, status);
    940   1.1    bouyer 		USETW(ps.wPortChange, change);
    941  1.14     skrll 		totlen = min(len, sizeof(ps));
    942  1.14     skrll 		memcpy(buf, &ps, totlen);
    943   1.1    bouyer 		break;
    944   1.1    bouyer 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
    945  1.14     skrll 		return -1;
    946   1.1    bouyer 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
    947   1.1    bouyer 		break;
    948   1.1    bouyer 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
    949   1.1    bouyer 		if (index != 1) {
    950  1.14     skrll 			return -1;
    951   1.1    bouyer 		}
    952   1.1    bouyer 		switch(value) {
    953   1.1    bouyer 		case UHF_PORT_ENABLE:
    954   1.1    bouyer 			sc->sc_port_enabled = 1;
    955   1.1    bouyer 			break;
    956   1.1    bouyer 		case UHF_PORT_SUSPEND:
    957   1.1    bouyer 			if (sc->sc_port_suspended == 0) {
    958   1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_POWER);
    959   1.1    bouyer 				val |= MUSB2_MASK_SUSPMODE;
    960   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_POWER, val);
    961   1.1    bouyer 				/* wait 20 milliseconds */
    962   1.1    bouyer 				usb_delay_ms(&sc->sc_bus, 20);
    963   1.1    bouyer 				sc->sc_port_suspended = 1;
    964   1.1    bouyer 				sc->sc_port_suspended_change = 1;
    965   1.1    bouyer 			}
    966   1.1    bouyer 			break;
    967   1.1    bouyer 		case UHF_PORT_RESET:
    968   1.1    bouyer 			err = motg_portreset(sc);
    969  1.14     skrll 			if (err != USBD_NORMAL_COMPLETION)
    970  1.14     skrll 				return -1;
    971  1.14     skrll 			return 0;
    972   1.1    bouyer 		case UHF_PORT_POWER:
    973   1.1    bouyer 			/* XXX todo */
    974  1.14     skrll 			return 0;
    975   1.1    bouyer 		case UHF_C_PORT_CONNECTION:
    976   1.1    bouyer 		case UHF_C_PORT_ENABLE:
    977   1.1    bouyer 		case UHF_C_PORT_OVER_CURRENT:
    978   1.1    bouyer 		case UHF_PORT_CONNECTION:
    979   1.1    bouyer 		case UHF_PORT_OVER_CURRENT:
    980   1.1    bouyer 		case UHF_PORT_LOW_SPEED:
    981   1.1    bouyer 		case UHF_C_PORT_SUSPEND:
    982   1.1    bouyer 		case UHF_C_PORT_RESET:
    983   1.1    bouyer 		default:
    984  1.14     skrll 			return -1;
    985   1.1    bouyer 		}
    986   1.1    bouyer 		break;
    987   1.1    bouyer 	default:
    988  1.14     skrll 		/* default from usbroothub */
    989  1.14     skrll 		return buflen;
    990   1.1    bouyer 	}
    991   1.1    bouyer 
    992  1.14     skrll 	return totlen;
    993   1.1    bouyer }
    994   1.1    bouyer 
    995   1.1    bouyer /* Abort a root interrupt request. */
    996   1.1    bouyer void
    997  1.14     skrll motg_root_intr_abort(struct usbd_xfer *xfer)
    998   1.1    bouyer {
    999  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1000   1.1    bouyer 
   1001   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1002  1.14     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   1003   1.1    bouyer 
   1004   1.1    bouyer 	sc->sc_intr_xfer = NULL;
   1005   1.1    bouyer 
   1006  1.14     skrll 	xfer->ux_status = USBD_CANCELLED;
   1007   1.1    bouyer 	usb_transfer_complete(xfer);
   1008   1.1    bouyer }
   1009   1.1    bouyer 
   1010   1.1    bouyer usbd_status
   1011  1.14     skrll motg_root_intr_transfer(struct usbd_xfer *xfer)
   1012   1.1    bouyer {
   1013  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1014   1.1    bouyer 	usbd_status err;
   1015   1.1    bouyer 
   1016   1.1    bouyer 	/* Insert last in queue. */
   1017   1.1    bouyer 	mutex_enter(&sc->sc_lock);
   1018   1.1    bouyer 	err = usb_insert_transfer(xfer);
   1019   1.1    bouyer 	mutex_exit(&sc->sc_lock);
   1020   1.1    bouyer 	if (err)
   1021  1.14     skrll 		return err;
   1022   1.1    bouyer 
   1023   1.1    bouyer 	/*
   1024   1.1    bouyer 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1025   1.1    bouyer 	 * start first
   1026   1.1    bouyer 	 */
   1027  1.14     skrll 	return motg_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   1028   1.1    bouyer }
   1029   1.1    bouyer 
   1030   1.1    bouyer /* Start a transfer on the root interrupt pipe */
   1031   1.1    bouyer usbd_status
   1032  1.14     skrll motg_root_intr_start(struct usbd_xfer *xfer)
   1033   1.1    bouyer {
   1034  1.14     skrll 	struct usbd_pipe *pipe = xfer->ux_pipe;
   1035  1.14     skrll 	struct motg_softc *sc = MOTG_PIPE2SC(pipe);
   1036  1.14     skrll 
   1037  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1038   1.1    bouyer 
   1039  1.14     skrll 	DPRINTFN(MD_ROOT, "xfer=%p len=%d flags=%d", xfer, xfer->ux_length,
   1040  1.14     skrll 	    xfer->ux_flags, 0);
   1041   1.1    bouyer 
   1042   1.1    bouyer 	if (sc->sc_dying)
   1043  1.14     skrll 		return USBD_IOERROR;
   1044   1.1    bouyer 
   1045   1.1    bouyer 	sc->sc_intr_xfer = xfer;
   1046  1.14     skrll 	return USBD_IN_PROGRESS;
   1047   1.1    bouyer }
   1048   1.1    bouyer 
   1049   1.1    bouyer /* Close the root interrupt pipe. */
   1050   1.1    bouyer void
   1051  1.14     skrll motg_root_intr_close(struct usbd_pipe *pipe)
   1052   1.1    bouyer {
   1053  1.14     skrll 	struct motg_softc *sc = MOTG_PIPE2SC(pipe);
   1054  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1055   1.1    bouyer 
   1056   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1057   1.1    bouyer 
   1058   1.1    bouyer 	sc->sc_intr_xfer = NULL;
   1059   1.1    bouyer }
   1060   1.1    bouyer 
   1061   1.1    bouyer void
   1062  1.14     skrll motg_root_intr_done(struct usbd_xfer *xfer)
   1063   1.1    bouyer {
   1064   1.1    bouyer }
   1065   1.1    bouyer 
   1066   1.1    bouyer void
   1067  1.14     skrll motg_noop(struct usbd_pipe *pipe)
   1068   1.1    bouyer {
   1069   1.1    bouyer }
   1070   1.1    bouyer 
   1071   1.1    bouyer static usbd_status
   1072   1.1    bouyer motg_portreset(struct motg_softc *sc)
   1073   1.1    bouyer {
   1074   1.1    bouyer 	uint32_t val;
   1075  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1076   1.1    bouyer 
   1077   1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_POWER);
   1078   1.1    bouyer 	val |= MUSB2_MASK_RESET;
   1079   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_POWER, val);
   1080   1.1    bouyer 	/* Wait for 20 msec */
   1081   1.1    bouyer 	usb_delay_ms(&sc->sc_bus, 20);
   1082   1.1    bouyer 
   1083   1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_POWER);
   1084   1.1    bouyer 	val &= ~MUSB2_MASK_RESET;
   1085   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_POWER, val);
   1086   1.1    bouyer 
   1087   1.1    bouyer 	/* determine line speed */
   1088   1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_POWER);
   1089   1.1    bouyer 	if (val & MUSB2_MASK_HSMODE)
   1090   1.1    bouyer 		sc->sc_high_speed = 1;
   1091   1.1    bouyer 	else
   1092   1.1    bouyer 		sc->sc_high_speed = 0;
   1093  1.14     skrll 	DPRINTFN(MD_ROOT | MD_CTRL, "speed %d", sc->sc_high_speed, 0, 0, 0);
   1094   1.1    bouyer 
   1095   1.1    bouyer 	sc->sc_isreset = 1;
   1096   1.1    bouyer 	sc->sc_port_enabled = 1;
   1097  1.14     skrll 	return USBD_NORMAL_COMPLETION;
   1098   1.1    bouyer }
   1099   1.1    bouyer 
   1100   1.1    bouyer /*
   1101   1.1    bouyer  * This routine is executed when an interrupt on the root hub is detected
   1102   1.1    bouyer  */
   1103   1.1    bouyer static void
   1104   1.1    bouyer motg_hub_change(struct motg_softc *sc)
   1105   1.1    bouyer {
   1106  1.14     skrll 	struct usbd_xfer *xfer = sc->sc_intr_xfer;
   1107  1.14     skrll 	struct usbd_pipe *pipe;
   1108   1.1    bouyer 	u_char *p;
   1109   1.1    bouyer 
   1110  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1111   1.1    bouyer 
   1112   1.1    bouyer 	if (xfer == NULL)
   1113   1.1    bouyer 		return; /* the interrupt pipe is not open */
   1114   1.1    bouyer 
   1115  1.14     skrll 	pipe = xfer->ux_pipe;
   1116  1.14     skrll 	if (pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL)
   1117   1.1    bouyer 		return;	/* device has detached */
   1118   1.1    bouyer 
   1119  1.14     skrll 	p = xfer->ux_buf;
   1120   1.1    bouyer 	p[0] = 1<<1;
   1121  1.14     skrll 	xfer->ux_actlen = 1;
   1122  1.14     skrll 	xfer->ux_status = USBD_NORMAL_COMPLETION;
   1123   1.1    bouyer 	usb_transfer_complete(xfer);
   1124   1.1    bouyer }
   1125   1.1    bouyer 
   1126   1.1    bouyer static uint8_t
   1127  1.14     skrll motg_speed(uint8_t speed)
   1128   1.1    bouyer {
   1129   1.1    bouyer 	switch(speed) {
   1130   1.1    bouyer 	case USB_SPEED_LOW:
   1131   1.1    bouyer 		return MUSB2_MASK_TI_SPEED_LO;
   1132   1.1    bouyer 	case USB_SPEED_FULL:
   1133   1.1    bouyer 		return MUSB2_MASK_TI_SPEED_FS;
   1134   1.1    bouyer 	case USB_SPEED_HIGH:
   1135   1.1    bouyer 		return MUSB2_MASK_TI_SPEED_HS;
   1136   1.1    bouyer 	default:
   1137   1.1    bouyer 		panic("motg: unknown speed %d", speed);
   1138   1.1    bouyer 		/* NOTREACHED */
   1139   1.1    bouyer 	}
   1140   1.1    bouyer }
   1141   1.1    bouyer 
   1142   1.1    bouyer static uint8_t
   1143  1.14     skrll motg_type(uint8_t type)
   1144   1.1    bouyer {
   1145   1.1    bouyer 	switch(type) {
   1146   1.1    bouyer 	case UE_CONTROL:
   1147   1.1    bouyer 		return MUSB2_MASK_TI_PROTO_CTRL;
   1148   1.1    bouyer 	case UE_ISOCHRONOUS:
   1149   1.1    bouyer 		return MUSB2_MASK_TI_PROTO_ISOC;
   1150   1.1    bouyer 	case UE_BULK:
   1151   1.1    bouyer 		return MUSB2_MASK_TI_PROTO_BULK;
   1152   1.1    bouyer 	case UE_INTERRUPT:
   1153   1.1    bouyer 		return MUSB2_MASK_TI_PROTO_INTR;
   1154   1.1    bouyer 	default:
   1155   1.1    bouyer 		panic("motg: unknown type %d", type);
   1156   1.1    bouyer 		/* NOTREACHED */
   1157   1.1    bouyer 	}
   1158   1.1    bouyer }
   1159   1.1    bouyer 
   1160   1.1    bouyer static void
   1161  1.14     skrll motg_setup_endpoint_tx(struct usbd_xfer *xfer)
   1162   1.1    bouyer {
   1163  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1164  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1165  1.14     skrll 	struct usbd_device *dev = otgpipe->pipe.up_dev;
   1166   1.1    bouyer 	int epnumber = otgpipe->hw_ep->ep_number;
   1167   1.1    bouyer 
   1168  1.14     skrll 	UWRITE1(sc, MUSB2_REG_TXFADDR(epnumber), dev->ud_addr);
   1169  1.14     skrll 	if (dev->ud_myhsport) {
   1170   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXHADDR(epnumber),
   1171  1.14     skrll 		    dev->ud_myhsport->up_parent->ud_addr);
   1172   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXHUBPORT(epnumber),
   1173  1.14     skrll 		    dev->ud_myhsport->up_portno);
   1174   1.1    bouyer 	} else {
   1175   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXHADDR(epnumber), 0);
   1176   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXHUBPORT(epnumber), 0);
   1177   1.1    bouyer 	}
   1178   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXTI,
   1179  1.14     skrll 	    motg_speed(dev->ud_speed) |
   1180  1.14     skrll 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) |
   1181  1.14     skrll 	    motg_type(UE_GET_XFERTYPE(xfer->ux_pipe->up_endpoint->ue_edesc->bmAttributes))
   1182   1.1    bouyer 	    );
   1183   1.1    bouyer 	if (epnumber == 0) {
   1184   1.1    bouyer 		if (sc->sc_high_speed) {
   1185   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXNAKLIMIT,
   1186   1.1    bouyer 			    NAK_TO_CTRL_HIGH);
   1187   1.1    bouyer 		} else {
   1188   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, NAK_TO_CTRL);
   1189   1.1    bouyer 		}
   1190   1.1    bouyer 	} else {
   1191  1.14     skrll 		if ((xfer->ux_pipe->up_endpoint->ue_edesc->bmAttributes & UE_XFERTYPE)
   1192   1.1    bouyer 		    == UE_BULK) {
   1193   1.1    bouyer 			if (sc->sc_high_speed) {
   1194   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT,
   1195   1.1    bouyer 				    NAK_TO_BULK_HIGH);
   1196   1.1    bouyer 			} else {
   1197   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, NAK_TO_BULK);
   1198   1.1    bouyer 			}
   1199   1.1    bouyer 		} else {
   1200   1.1    bouyer 			if (sc->sc_high_speed) {
   1201   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, POLL_TO_HIGH);
   1202   1.1    bouyer 			} else {
   1203   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, POLL_TO);
   1204   1.1    bouyer 			}
   1205   1.1    bouyer 		}
   1206   1.1    bouyer 	}
   1207   1.1    bouyer }
   1208   1.1    bouyer 
   1209   1.1    bouyer static void
   1210  1.14     skrll motg_setup_endpoint_rx(struct usbd_xfer *xfer)
   1211   1.1    bouyer {
   1212  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1213  1.14     skrll 	struct usbd_device *dev = xfer->ux_pipe->up_dev;
   1214  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1215   1.1    bouyer 	int epnumber = otgpipe->hw_ep->ep_number;
   1216   1.1    bouyer 
   1217  1.14     skrll 	UWRITE1(sc, MUSB2_REG_RXFADDR(epnumber), dev->ud_addr);
   1218  1.14     skrll 	if (dev->ud_myhsport) {
   1219   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXHADDR(epnumber),
   1220  1.14     skrll 		    dev->ud_myhsport->up_parent->ud_addr);
   1221   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXHUBPORT(epnumber),
   1222  1.14     skrll 		    dev->ud_myhsport->up_portno);
   1223   1.1    bouyer 	} else {
   1224   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXHADDR(epnumber), 0);
   1225   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXHUBPORT(epnumber), 0);
   1226   1.1    bouyer 	}
   1227   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_RXTI,
   1228  1.14     skrll 	    motg_speed(dev->ud_speed) |
   1229  1.14     skrll 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) |
   1230  1.14     skrll 	    motg_type(UE_GET_XFERTYPE(xfer->ux_pipe->up_endpoint->ue_edesc->bmAttributes))
   1231   1.1    bouyer 	    );
   1232   1.1    bouyer 	if (epnumber == 0) {
   1233   1.1    bouyer 		if (sc->sc_high_speed) {
   1234   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXNAKLIMIT,
   1235   1.1    bouyer 			    NAK_TO_CTRL_HIGH);
   1236   1.1    bouyer 		} else {
   1237   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, NAK_TO_CTRL);
   1238   1.1    bouyer 		}
   1239   1.1    bouyer 	} else {
   1240  1.14     skrll 		if ((xfer->ux_pipe->up_endpoint->ue_edesc->bmAttributes & UE_XFERTYPE)
   1241   1.1    bouyer 		    == UE_BULK) {
   1242   1.1    bouyer 			if (sc->sc_high_speed) {
   1243   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT,
   1244   1.1    bouyer 				    NAK_TO_BULK_HIGH);
   1245   1.1    bouyer 			} else {
   1246   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, NAK_TO_BULK);
   1247   1.1    bouyer 			}
   1248   1.1    bouyer 		} else {
   1249   1.1    bouyer 			if (sc->sc_high_speed) {
   1250   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, POLL_TO_HIGH);
   1251   1.1    bouyer 			} else {
   1252   1.1    bouyer 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, POLL_TO);
   1253   1.1    bouyer 			}
   1254   1.1    bouyer 		}
   1255   1.1    bouyer 	}
   1256   1.1    bouyer }
   1257   1.1    bouyer 
   1258   1.1    bouyer static usbd_status
   1259  1.14     skrll motg_device_ctrl_transfer(struct usbd_xfer *xfer)
   1260   1.1    bouyer {
   1261  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1262   1.1    bouyer 	usbd_status err;
   1263   1.1    bouyer 
   1264   1.1    bouyer 	/* Insert last in queue. */
   1265   1.1    bouyer 	mutex_enter(&sc->sc_lock);
   1266   1.1    bouyer 	err = usb_insert_transfer(xfer);
   1267  1.14     skrll 	xfer->ux_status = USBD_NOT_STARTED;
   1268   1.1    bouyer 	mutex_exit(&sc->sc_lock);
   1269   1.1    bouyer 	if (err)
   1270  1.14     skrll 		return err;
   1271   1.1    bouyer 
   1272   1.1    bouyer 	/*
   1273   1.1    bouyer 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1274   1.1    bouyer 	 * so start it first.
   1275   1.1    bouyer 	 */
   1276  1.14     skrll 	return motg_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   1277   1.1    bouyer }
   1278   1.1    bouyer 
   1279   1.1    bouyer static usbd_status
   1280  1.14     skrll motg_device_ctrl_start(struct usbd_xfer *xfer)
   1281   1.1    bouyer {
   1282  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1283   1.1    bouyer 	usbd_status err;
   1284   1.1    bouyer 	mutex_enter(&sc->sc_lock);
   1285   1.1    bouyer 	err = motg_device_ctrl_start1(sc);
   1286   1.1    bouyer 	mutex_exit(&sc->sc_lock);
   1287   1.1    bouyer 	if (err != USBD_IN_PROGRESS)
   1288   1.1    bouyer 		return err;
   1289  1.14     skrll 	if (sc->sc_bus.ub_usepolling)
   1290   1.1    bouyer 		motg_waitintr(sc, xfer);
   1291   1.1    bouyer 	return USBD_IN_PROGRESS;
   1292   1.1    bouyer }
   1293   1.1    bouyer 
   1294   1.1    bouyer static usbd_status
   1295   1.1    bouyer motg_device_ctrl_start1(struct motg_softc *sc)
   1296   1.1    bouyer {
   1297   1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_in_ep[0];
   1298  1.14     skrll 	struct usbd_xfer *xfer = NULL;
   1299   1.1    bouyer 	struct motg_pipe *otgpipe;
   1300   1.1    bouyer 	usbd_status err = 0;
   1301   1.1    bouyer 
   1302  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1303  1.14     skrll 
   1304   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1305   1.1    bouyer 	if (sc->sc_dying)
   1306  1.14     skrll 		return USBD_IOERROR;
   1307   1.1    bouyer 
   1308   1.1    bouyer 	if (!sc->sc_connected)
   1309  1.14     skrll 		return USBD_IOERROR;
   1310   1.1    bouyer 
   1311   1.1    bouyer 	if (ep->xfer != NULL) {
   1312   1.1    bouyer 		err = USBD_IN_PROGRESS;
   1313   1.1    bouyer 		goto end;
   1314   1.1    bouyer 	}
   1315   1.1    bouyer 	/* locate the first pipe with work to do */
   1316   1.1    bouyer 	SIMPLEQ_FOREACH(otgpipe, &ep->ep_pipes, ep_pipe_list) {
   1317  1.14     skrll 		xfer = SIMPLEQ_FIRST(&otgpipe->pipe.up_queue);
   1318  1.14     skrll 		DPRINTFN(MD_CTRL, "pipe %p xfer %p status %d",
   1319  1.14     skrll 		    otgpipe, xfer, (xfer != NULL) ? xfer->ux_status : 0, 0);
   1320   1.7     skrll 
   1321   1.1    bouyer 		if (xfer != NULL) {
   1322   1.1    bouyer 			/* move this pipe to the end of the list */
   1323   1.1    bouyer 			SIMPLEQ_REMOVE(&ep->ep_pipes, otgpipe,
   1324   1.1    bouyer 			    motg_pipe, ep_pipe_list);
   1325   1.1    bouyer 			SIMPLEQ_INSERT_TAIL(&ep->ep_pipes,
   1326   1.1    bouyer 			    otgpipe, ep_pipe_list);
   1327   1.1    bouyer 			break;
   1328   1.1    bouyer 		}
   1329   1.1    bouyer 	}
   1330   1.1    bouyer 	if (xfer == NULL) {
   1331   1.1    bouyer 		err = USBD_NOT_STARTED;
   1332   1.1    bouyer 		goto end;
   1333   1.1    bouyer 	}
   1334  1.14     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   1335  1.14     skrll 	KASSERT(otgpipe == MOTG_PIPE2MPIPE(xfer->ux_pipe));
   1336   1.1    bouyer 	KASSERT(otgpipe->hw_ep == ep);
   1337  1.14     skrll 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   1338  1.14     skrll 	// KASSERT(xfer->ux_actlen == 0);
   1339  1.14     skrll 	xfer->ux_actlen = 0;
   1340   1.1    bouyer 
   1341   1.1    bouyer 	ep->xfer = xfer;
   1342  1.14     skrll 	ep->datalen = xfer->ux_length;
   1343   1.1    bouyer 	if (ep->datalen > 0)
   1344  1.14     skrll 		ep->data = xfer->ux_buf;
   1345   1.1    bouyer 	else
   1346   1.1    bouyer 		ep->data = NULL;
   1347  1.14     skrll 	if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) &&
   1348   1.1    bouyer 	    (ep->datalen % 64) == 0)
   1349   1.1    bouyer 		ep->need_short_xfer = 1;
   1350   1.1    bouyer 	else
   1351   1.1    bouyer 		ep->need_short_xfer = 0;
   1352   1.1    bouyer 	/* now we need send this request */
   1353   1.7     skrll 	DPRINTFN(MD_CTRL,
   1354  1.14     skrll 	    "xfer %p send data %p len %d short %d",
   1355  1.14     skrll 	    xfer, ep->data, ep->datalen, ep->need_short_xfer);
   1356  1.14     skrll 	DPRINTFN(MD_CTRL,
   1357  1.14     skrll 	    "xfer %p ... speed %d to %d", xfer->ux_pipe->up_dev->ud_speed,
   1358  1.14     skrll 	    xfer->ux_pipe->up_dev->ud_addr, 0, 0);
   1359   1.1    bouyer 	KASSERT(ep->phase == IDLE);
   1360   1.1    bouyer 	ep->phase = SETUP;
   1361   1.1    bouyer 	/* select endpoint 0 */
   1362   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
   1363   1.1    bouyer 	/* fifo should be empty at this point */
   1364   1.1    bouyer 	KASSERT((UREAD1(sc, MUSB2_REG_TXCSRL) & MUSB2_MASK_CSR0L_TXPKTRDY) == 0);
   1365   1.1    bouyer 	/* send data */
   1366  1.14     skrll 	// KASSERT(((vaddr_t)(&xfer->ux_request) & 3) == 0);
   1367  1.14     skrll 	KASSERT(sizeof(xfer->ux_request) == 8);
   1368   1.1    bouyer 	bus_space_write_multi_1(sc->sc_iot, sc->sc_ioh, MUSB2_REG_EPFIFO(0),
   1369  1.14     skrll 	    (void *)&xfer->ux_request, sizeof(xfer->ux_request));
   1370   1.1    bouyer 
   1371   1.1    bouyer 	motg_setup_endpoint_tx(xfer);
   1372   1.1    bouyer 	/* start transaction */
   1373   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL,
   1374   1.1    bouyer 	    MUSB2_MASK_CSR0L_TXPKTRDY | MUSB2_MASK_CSR0L_SETUPPKT);
   1375   1.1    bouyer 
   1376   1.1    bouyer end:
   1377   1.1    bouyer 	if (err)
   1378  1.14     skrll 		return err;
   1379   1.1    bouyer 
   1380  1.14     skrll 	return USBD_IN_PROGRESS;
   1381   1.1    bouyer }
   1382   1.1    bouyer 
   1383   1.1    bouyer static void
   1384  1.14     skrll motg_device_ctrl_read(struct usbd_xfer *xfer)
   1385   1.1    bouyer {
   1386  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1387  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1388   1.1    bouyer 	/* assume endpoint already selected */
   1389   1.1    bouyer 	motg_setup_endpoint_rx(xfer);
   1390   1.1    bouyer 	/* start transaction */
   1391   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL, MUSB2_MASK_CSR0L_REQPKT);
   1392   1.1    bouyer 	otgpipe->hw_ep->phase = DATA_IN;
   1393   1.1    bouyer }
   1394   1.1    bouyer 
   1395   1.1    bouyer static void
   1396   1.1    bouyer motg_device_ctrl_intr_rx(struct motg_softc *sc)
   1397   1.1    bouyer {
   1398   1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_in_ep[0];
   1399  1.14     skrll 	struct usbd_xfer *xfer = ep->xfer;
   1400   1.1    bouyer 	uint8_t csr;
   1401   1.1    bouyer 	int datalen, max_datalen;
   1402   1.1    bouyer 	char *data;
   1403   1.1    bouyer 	bool got_short;
   1404   1.3    bouyer 	usbd_status new_status = USBD_IN_PROGRESS;
   1405   1.1    bouyer 
   1406  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1407  1.14     skrll 
   1408   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1409   1.1    bouyer 
   1410  1.14     skrll 	KASSERT(ep->phase == DATA_IN || ep->phase != STATUS_IN);
   1411  1.14     skrll 	/* select endpoint 0 */
   1412   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
   1413   1.1    bouyer 
   1414   1.1    bouyer 	/* read out FIFO status */
   1415   1.1    bouyer 	csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   1416  1.14     skrll 	DPRINTFN(MD_CTRL, "phase %d csr 0x%x xfer %p status %d",
   1417  1.14     skrll 	    ep->phase, csr, xfer, (xfer != NULL) ? xfer->ux_status : 0);
   1418   1.1    bouyer 
   1419   1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_NAKTIMO) {
   1420   1.1    bouyer 		csr &= ~MUSB2_MASK_CSR0L_REQPKT;
   1421   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   1422   1.1    bouyer 
   1423   1.1    bouyer 		csr &= ~MUSB2_MASK_CSR0L_NAKTIMO;
   1424   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   1425   1.3    bouyer 		new_status = USBD_TIMEOUT; /* XXX */
   1426   1.1    bouyer 		goto complete;
   1427   1.1    bouyer 	}
   1428   1.1    bouyer 	if (csr & (MUSB2_MASK_CSR0L_RXSTALL | MUSB2_MASK_CSR0L_ERROR)) {
   1429   1.3    bouyer 		if (csr & MUSB2_MASK_CSR0L_RXSTALL)
   1430   1.3    bouyer 			new_status = USBD_STALLED;
   1431   1.3    bouyer 		else
   1432   1.3    bouyer 			new_status = USBD_IOERROR;
   1433   1.1    bouyer 		/* clear status */
   1434   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1435   1.1    bouyer 		goto complete;
   1436   1.1    bouyer 	}
   1437   1.1    bouyer 	if ((csr & MUSB2_MASK_CSR0L_RXPKTRDY) == 0)
   1438   1.1    bouyer 		return; /* no data yet */
   1439   1.1    bouyer 
   1440  1.14     skrll 	if (xfer == NULL || xfer->ux_status != USBD_IN_PROGRESS)
   1441   1.1    bouyer 		goto complete;
   1442   1.1    bouyer 
   1443   1.1    bouyer 	if (ep->phase == STATUS_IN) {
   1444   1.3    bouyer 		new_status = USBD_NORMAL_COMPLETION;
   1445   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1446   1.1    bouyer 		goto complete;
   1447   1.1    bouyer 	}
   1448   1.1    bouyer 	datalen = UREAD2(sc, MUSB2_REG_RXCOUNT);
   1449  1.14     skrll 	DPRINTFN(MD_CTRL, "phase %d datalen %d", ep->phase, datalen, 0, 0);
   1450  1.14     skrll 	KASSERT(UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize) > 0);
   1451  1.14     skrll 	max_datalen = min(UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize),
   1452   1.1    bouyer 	    ep->datalen);
   1453   1.1    bouyer 	if (datalen > max_datalen) {
   1454   1.3    bouyer 		new_status = USBD_IOERROR;
   1455   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1456   1.1    bouyer 		goto complete;
   1457   1.1    bouyer 	}
   1458   1.1    bouyer 	got_short = (datalen < max_datalen);
   1459   1.1    bouyer 	if (datalen > 0) {
   1460   1.1    bouyer 		KASSERT(ep->phase == DATA_IN);
   1461   1.1    bouyer 		data = ep->data;
   1462   1.1    bouyer 		ep->data += datalen;
   1463   1.1    bouyer 		ep->datalen -= datalen;
   1464  1.14     skrll 		xfer->ux_actlen += datalen;
   1465   1.1    bouyer 		if (((vaddr_t)data & 0x3) == 0 &&
   1466   1.1    bouyer 		    (datalen >> 2) > 0) {
   1467  1.14     skrll 			DPRINTFN(MD_CTRL, "r4 data %p len %d", data, datalen,
   1468  1.14     skrll 			    0, 0);
   1469   1.1    bouyer 			bus_space_read_multi_4(sc->sc_iot, sc->sc_ioh,
   1470   1.1    bouyer 			    MUSB2_REG_EPFIFO(0), (void *)data, datalen >> 2);
   1471   1.1    bouyer 			data += (datalen & ~0x3);
   1472   1.1    bouyer 			datalen -= (datalen & ~0x3);
   1473   1.1    bouyer 		}
   1474  1.14     skrll 		DPRINTFN(MD_CTRL, "r1 data %p len %d", data, datalen, 0, 0);
   1475   1.1    bouyer 		if (datalen) {
   1476   1.1    bouyer 			bus_space_read_multi_1(sc->sc_iot, sc->sc_ioh,
   1477   1.1    bouyer 			    MUSB2_REG_EPFIFO(0), data, datalen);
   1478   1.1    bouyer 		}
   1479   1.1    bouyer 	}
   1480   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL, csr & ~MUSB2_MASK_CSR0L_RXPKTRDY);
   1481   1.1    bouyer 	KASSERT(ep->phase == DATA_IN);
   1482   1.1    bouyer 	if (got_short || (ep->datalen == 0)) {
   1483   1.1    bouyer 		if (ep->need_short_xfer == 0) {
   1484   1.1    bouyer 			ep->phase = STATUS_OUT;
   1485   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRH,
   1486   1.1    bouyer 			    UREAD1(sc, MUSB2_REG_TXCSRH) |
   1487   1.1    bouyer 			    MUSB2_MASK_CSR0H_PING_DIS);
   1488   1.1    bouyer 			motg_setup_endpoint_tx(xfer);
   1489   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRL,
   1490   1.1    bouyer 			    MUSB2_MASK_CSR0L_STATUSPKT |
   1491   1.1    bouyer 			    MUSB2_MASK_CSR0L_TXPKTRDY);
   1492   1.1    bouyer 			return;
   1493   1.1    bouyer 		}
   1494   1.1    bouyer 		ep->need_short_xfer = 0;
   1495   1.1    bouyer 	}
   1496   1.1    bouyer 	motg_device_ctrl_read(xfer);
   1497   1.1    bouyer 	return;
   1498   1.1    bouyer complete:
   1499   1.1    bouyer 	ep->phase = IDLE;
   1500   1.1    bouyer 	ep->xfer = NULL;
   1501  1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS) {
   1502   1.3    bouyer 		KASSERT(new_status != USBD_IN_PROGRESS);
   1503  1.14     skrll 		xfer->ux_status = new_status;
   1504   1.1    bouyer 		usb_transfer_complete(xfer);
   1505   1.3    bouyer 	}
   1506   1.1    bouyer 	motg_device_ctrl_start1(sc);
   1507   1.1    bouyer }
   1508   1.1    bouyer 
   1509   1.1    bouyer static void
   1510   1.1    bouyer motg_device_ctrl_intr_tx(struct motg_softc *sc)
   1511   1.1    bouyer {
   1512   1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_in_ep[0];
   1513  1.14     skrll 	struct usbd_xfer *xfer = ep->xfer;
   1514   1.1    bouyer 	uint8_t csr;
   1515   1.1    bouyer 	int datalen;
   1516   1.1    bouyer 	char *data;
   1517   1.3    bouyer 	usbd_status new_status = USBD_IN_PROGRESS;
   1518   1.1    bouyer 
   1519  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1520  1.14     skrll 
   1521   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1522   1.1    bouyer 	if (ep->phase == DATA_IN || ep->phase == STATUS_IN) {
   1523   1.1    bouyer 		motg_device_ctrl_intr_rx(sc);
   1524   1.1    bouyer 		return;
   1525   1.1    bouyer 	}
   1526   1.1    bouyer 
   1527  1.14     skrll 	KASSERT(ep->phase == SETUP || ep->phase == DATA_OUT ||
   1528  1.14     skrll 	    ep->phase == STATUS_OUT);
   1529  1.14     skrll 
   1530  1.14     skrll 	/* select endpoint 0 */
   1531   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
   1532   1.1    bouyer 
   1533   1.1    bouyer 	csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   1534  1.14     skrll 	DPRINTFN(MD_CTRL, "phase %d csr 0x%x xfer %p status %d",
   1535  1.14     skrll 	    ep->phase, csr, xfer, (xfer != NULL) ? xfer->ux_status : 0);
   1536   1.1    bouyer 
   1537   1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_RXSTALL) {
   1538   1.1    bouyer 		/* command not accepted */
   1539   1.3    bouyer 		new_status = USBD_STALLED;
   1540   1.1    bouyer 		/* clear status */
   1541   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1542   1.1    bouyer 		goto complete;
   1543   1.1    bouyer 	}
   1544   1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_NAKTIMO) {
   1545   1.3    bouyer 		new_status = USBD_TIMEOUT; /* XXX */
   1546   1.1    bouyer 		/* flush fifo */
   1547   1.1    bouyer 		while (csr & MUSB2_MASK_CSR0L_TXFIFONEMPTY) {
   1548   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRH,
   1549   1.7     skrll 			    UREAD1(sc, MUSB2_REG_TXCSRH) |
   1550   1.1    bouyer 				MUSB2_MASK_CSR0H_FFLUSH);
   1551   1.1    bouyer 			csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   1552   1.1    bouyer 		}
   1553   1.1    bouyer 		csr &= ~MUSB2_MASK_CSR0L_NAKTIMO;
   1554   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   1555   1.1    bouyer 		goto complete;
   1556   1.1    bouyer 	}
   1557   1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_ERROR) {
   1558   1.3    bouyer 		new_status = USBD_IOERROR;
   1559   1.1    bouyer 		/* clear status */
   1560   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1561   1.1    bouyer 		goto complete;
   1562   1.1    bouyer 	}
   1563   1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_TXFIFONEMPTY) {
   1564   1.1    bouyer 		/* data still not sent */
   1565   1.1    bouyer 		return;
   1566   1.1    bouyer 	}
   1567   1.1    bouyer 	if (xfer == NULL)
   1568   1.1    bouyer 		goto complete;
   1569   1.1    bouyer 	if (ep->phase == STATUS_OUT) {
   1570   1.1    bouyer 		/*
   1571   1.1    bouyer 		 * we have sent status and got no error;
   1572   1.1    bouyer 		 * declare transfer complete
   1573   1.1    bouyer 		 */
   1574  1.14     skrll 		DPRINTFN(MD_CTRL, "xfer %p status %d complete", xfer,
   1575  1.14     skrll 		    xfer->ux_status, 0, 0);
   1576   1.3    bouyer 		new_status = USBD_NORMAL_COMPLETION;
   1577   1.1    bouyer 		goto complete;
   1578   1.1    bouyer 	}
   1579   1.1    bouyer 	if (ep->datalen == 0) {
   1580   1.1    bouyer 		if (ep->need_short_xfer) {
   1581   1.1    bouyer 			ep->need_short_xfer = 0;
   1582   1.1    bouyer 			/* one more data phase */
   1583  1.14     skrll 			if (xfer->ux_request.bmRequestType & UT_READ) {
   1584  1.14     skrll 				DPRINTFN(MD_CTRL, "xfer %p to DATA_IN", xfer,
   1585  1.14     skrll 				    0, 0, 0);
   1586   1.1    bouyer 				motg_device_ctrl_read(xfer);
   1587   1.1    bouyer 				return;
   1588   1.1    bouyer 			} /*  else fall back to DATA_OUT */
   1589   1.1    bouyer 		} else {
   1590  1.14     skrll 			DPRINTFN(MD_CTRL, "xfer %p to STATUS_IN, csrh 0x%x",
   1591  1.14     skrll 			    xfer, UREAD1(sc, MUSB2_REG_TXCSRH), 0, 0);
   1592   1.1    bouyer 			ep->phase = STATUS_IN;
   1593   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_RXCSRH,
   1594   1.1    bouyer 			    UREAD1(sc, MUSB2_REG_RXCSRH) |
   1595   1.1    bouyer 			    MUSB2_MASK_CSR0H_PING_DIS);
   1596   1.1    bouyer 			motg_setup_endpoint_rx(xfer);
   1597   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRL,
   1598   1.1    bouyer 			    MUSB2_MASK_CSR0L_STATUSPKT |
   1599   1.1    bouyer 			    MUSB2_MASK_CSR0L_REQPKT);
   1600   1.1    bouyer 			return;
   1601   1.1    bouyer 		}
   1602   1.1    bouyer 	}
   1603  1.14     skrll 	if (xfer->ux_request.bmRequestType & UT_READ) {
   1604   1.1    bouyer 		motg_device_ctrl_read(xfer);
   1605   1.1    bouyer 		return;
   1606   1.1    bouyer 	}
   1607   1.1    bouyer 	/* setup a dataout phase */
   1608   1.1    bouyer 	datalen = min(ep->datalen,
   1609  1.14     skrll 	    UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize));
   1610   1.1    bouyer 	ep->phase = DATA_OUT;
   1611  1.14     skrll 	DPRINTFN(MD_CTRL, "xfer %p to DATA_OUT, csrh 0x%x", xfer,
   1612  1.14     skrll 	    UREAD1(sc, MUSB2_REG_TXCSRH), 0, 0);
   1613   1.1    bouyer 	if (datalen) {
   1614   1.1    bouyer 		data = ep->data;
   1615   1.1    bouyer 		ep->data += datalen;
   1616   1.1    bouyer 		ep->datalen -= datalen;
   1617  1.14     skrll 		xfer->ux_actlen += datalen;
   1618   1.1    bouyer 		if (((vaddr_t)data & 0x3) == 0 &&
   1619   1.1    bouyer 		    (datalen >> 2) > 0) {
   1620   1.1    bouyer 			bus_space_write_multi_4(sc->sc_iot, sc->sc_ioh,
   1621   1.1    bouyer 			    MUSB2_REG_EPFIFO(0), (void *)data, datalen >> 2);
   1622   1.1    bouyer 			data += (datalen & ~0x3);
   1623   1.1    bouyer 			datalen -= (datalen & ~0x3);
   1624   1.1    bouyer 		}
   1625   1.1    bouyer 		if (datalen) {
   1626   1.1    bouyer 			bus_space_write_multi_1(sc->sc_iot, sc->sc_ioh,
   1627   1.1    bouyer 			    MUSB2_REG_EPFIFO(0), data, datalen);
   1628   1.1    bouyer 		}
   1629   1.1    bouyer 	}
   1630   1.1    bouyer 	/* send data */
   1631   1.1    bouyer 	motg_setup_endpoint_tx(xfer);
   1632   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL, MUSB2_MASK_CSR0L_TXPKTRDY);
   1633   1.1    bouyer 	return;
   1634   1.1    bouyer 
   1635   1.1    bouyer complete:
   1636   1.1    bouyer 	ep->phase = IDLE;
   1637   1.1    bouyer 	ep->xfer = NULL;
   1638  1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS) {
   1639   1.3    bouyer 		KASSERT(new_status != USBD_IN_PROGRESS);
   1640  1.14     skrll 		xfer->ux_status = new_status;
   1641   1.1    bouyer 		usb_transfer_complete(xfer);
   1642   1.3    bouyer 	}
   1643   1.1    bouyer 	motg_device_ctrl_start1(sc);
   1644   1.1    bouyer }
   1645   1.1    bouyer 
   1646   1.1    bouyer /* Abort a device control request. */
   1647   1.1    bouyer void
   1648  1.14     skrll motg_device_ctrl_abort(struct usbd_xfer *xfer)
   1649   1.1    bouyer {
   1650  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1651  1.14     skrll 
   1652   1.3    bouyer 	motg_device_xfer_abort(xfer);
   1653   1.1    bouyer }
   1654   1.1    bouyer 
   1655   1.1    bouyer /* Close a device control pipe */
   1656   1.1    bouyer void
   1657  1.14     skrll motg_device_ctrl_close(struct usbd_pipe *pipe)
   1658   1.1    bouyer {
   1659  1.14     skrll 	struct motg_softc *sc __diagused = MOTG_PIPE2SC(pipe);
   1660  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
   1661   1.1    bouyer 	struct motg_pipe *otgpipeiter;
   1662   1.1    bouyer 
   1663  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1664  1.14     skrll 
   1665   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1666   1.1    bouyer 	KASSERT(otgpipe->hw_ep->xfer == NULL ||
   1667  1.14     skrll 	    otgpipe->hw_ep->xfer->ux_pipe != pipe);
   1668   1.1    bouyer 
   1669   1.1    bouyer 	SIMPLEQ_FOREACH(otgpipeiter, &otgpipe->hw_ep->ep_pipes, ep_pipe_list) {
   1670   1.1    bouyer 		if (otgpipeiter == otgpipe) {
   1671   1.1    bouyer 			/* remove from list */
   1672   1.1    bouyer 			SIMPLEQ_REMOVE(&otgpipe->hw_ep->ep_pipes, otgpipe,
   1673   1.1    bouyer 			    motg_pipe, ep_pipe_list);
   1674   1.1    bouyer 			otgpipe->hw_ep->refcount--;
   1675   1.1    bouyer 			/* we're done */
   1676   1.1    bouyer 			return;
   1677   1.1    bouyer 		}
   1678   1.1    bouyer 	}
   1679   1.1    bouyer 	panic("motg_device_ctrl_close: not found");
   1680   1.1    bouyer }
   1681   1.1    bouyer 
   1682   1.1    bouyer void
   1683  1.14     skrll motg_device_ctrl_done(struct usbd_xfer *xfer)
   1684   1.1    bouyer {
   1685  1.14     skrll 	struct motg_pipe *otgpipe __diagused = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1686  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1687  1.14     skrll 
   1688   1.1    bouyer 	KASSERT(otgpipe->hw_ep->xfer != xfer);
   1689   1.1    bouyer }
   1690   1.1    bouyer 
   1691   1.1    bouyer static usbd_status
   1692  1.14     skrll motg_device_data_transfer(struct usbd_xfer *xfer)
   1693   1.1    bouyer {
   1694  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1695   1.1    bouyer 	usbd_status err;
   1696   1.1    bouyer 
   1697  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1698  1.14     skrll 
   1699   1.1    bouyer 	/* Insert last in queue. */
   1700   1.1    bouyer 	mutex_enter(&sc->sc_lock);
   1701  1.14     skrll 	DPRINTF("xfer %p status %d", xfer, xfer->ux_status, 0, 0);
   1702   1.1    bouyer 	err = usb_insert_transfer(xfer);
   1703  1.14     skrll 	xfer->ux_status = USBD_NOT_STARTED;
   1704   1.1    bouyer 	mutex_exit(&sc->sc_lock);
   1705   1.1    bouyer 	if (err)
   1706  1.14     skrll 		return err;
   1707   1.1    bouyer 
   1708   1.1    bouyer 	/*
   1709   1.1    bouyer 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1710   1.1    bouyer 	 * so start it first.
   1711   1.1    bouyer 	 */
   1712  1.14     skrll 	return motg_device_data_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   1713   1.1    bouyer }
   1714   1.1    bouyer 
   1715   1.1    bouyer static usbd_status
   1716  1.14     skrll motg_device_data_start(struct usbd_xfer *xfer)
   1717   1.1    bouyer {
   1718  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1719  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1720   1.1    bouyer 	usbd_status err;
   1721  1.14     skrll 
   1722  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1723  1.14     skrll 
   1724   1.1    bouyer 	mutex_enter(&sc->sc_lock);
   1725  1.14     skrll 	DPRINTF("xfer %p status %d", xfer, xfer->ux_status, 0, 0);
   1726   1.1    bouyer 	err = motg_device_data_start1(sc, otgpipe->hw_ep);
   1727   1.1    bouyer 	mutex_exit(&sc->sc_lock);
   1728   1.1    bouyer 	if (err != USBD_IN_PROGRESS)
   1729   1.1    bouyer 		return err;
   1730  1.14     skrll 	if (sc->sc_bus.ub_usepolling)
   1731   1.1    bouyer 		motg_waitintr(sc, xfer);
   1732   1.1    bouyer 	return USBD_IN_PROGRESS;
   1733   1.1    bouyer }
   1734   1.1    bouyer 
   1735   1.1    bouyer static usbd_status
   1736   1.1    bouyer motg_device_data_start1(struct motg_softc *sc, struct motg_hw_ep *ep)
   1737   1.1    bouyer {
   1738  1.14     skrll 	struct usbd_xfer *xfer = NULL;
   1739   1.1    bouyer 	struct motg_pipe *otgpipe;
   1740   1.1    bouyer 	usbd_status err = 0;
   1741   1.8     skrll 	uint32_t val __diagused;
   1742   1.1    bouyer 
   1743  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1744  1.14     skrll 
   1745   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1746   1.1    bouyer 	if (sc->sc_dying)
   1747  1.14     skrll 		return USBD_IOERROR;
   1748   1.1    bouyer 
   1749   1.1    bouyer 	if (!sc->sc_connected)
   1750  1.14     skrll 		return USBD_IOERROR;
   1751   1.1    bouyer 
   1752   1.1    bouyer 	if (ep->xfer != NULL) {
   1753   1.1    bouyer 		err = USBD_IN_PROGRESS;
   1754   1.1    bouyer 		goto end;
   1755   1.1    bouyer 	}
   1756   1.1    bouyer 	/* locate the first pipe with work to do */
   1757   1.1    bouyer 	SIMPLEQ_FOREACH(otgpipe, &ep->ep_pipes, ep_pipe_list) {
   1758  1.14     skrll 		xfer = SIMPLEQ_FIRST(&otgpipe->pipe.up_queue);
   1759  1.14     skrll 		DPRINTFN(MD_BULK, "pipe %p xfer %p status %d", otgpipe, xfer,
   1760  1.14     skrll 		    (xfer != NULL) ? xfer->ux_status : 0, 0);
   1761   1.1    bouyer 		if (xfer != NULL) {
   1762   1.1    bouyer 			/* move this pipe to the end of the list */
   1763   1.1    bouyer 			SIMPLEQ_REMOVE(&ep->ep_pipes, otgpipe,
   1764   1.1    bouyer 			    motg_pipe, ep_pipe_list);
   1765   1.1    bouyer 			SIMPLEQ_INSERT_TAIL(&ep->ep_pipes,
   1766   1.1    bouyer 			    otgpipe, ep_pipe_list);
   1767   1.1    bouyer 			break;
   1768   1.1    bouyer 		}
   1769   1.1    bouyer 	}
   1770   1.1    bouyer 	if (xfer == NULL) {
   1771   1.1    bouyer 		err = USBD_NOT_STARTED;
   1772   1.1    bouyer 		goto end;
   1773   1.1    bouyer 	}
   1774  1.14     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   1775  1.14     skrll 	KASSERT(otgpipe == MOTG_PIPE2MPIPE(xfer->ux_pipe));
   1776   1.1    bouyer 	KASSERT(otgpipe->hw_ep == ep);
   1777  1.14     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   1778  1.14     skrll 	// KASSERT(xfer->ux_actlen == 0);
   1779  1.14     skrll 	xfer->ux_actlen = 0;
   1780   1.1    bouyer 
   1781   1.1    bouyer 	ep->xfer = xfer;
   1782  1.14     skrll 	ep->datalen = xfer->ux_length;
   1783   1.1    bouyer 	KASSERT(ep->datalen > 0);
   1784  1.14     skrll 	ep->data = xfer->ux_buf;
   1785  1.14     skrll 	if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) &&
   1786   1.1    bouyer 	    (ep->datalen % 64) == 0)
   1787   1.1    bouyer 		ep->need_short_xfer = 1;
   1788   1.1    bouyer 	else
   1789   1.1    bouyer 		ep->need_short_xfer = 0;
   1790   1.1    bouyer 	/* now we need send this request */
   1791   1.7     skrll 	DPRINTFN(MD_BULK,
   1792  1.14     skrll 	    UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN ?
   1793  1.14     skrll 	    "xfer %p in  data %p len %d short %d" :
   1794  1.14     skrll 	    "xfer %p out data %p len %d short %d",
   1795  1.14     skrll 	    xfer, ep->data, ep->datalen, ep->need_short_xfer);
   1796  1.14     skrll 	DPRINTFN(MD_BULK, "... speed %d to %d", xfer->ux_pipe->up_dev->ud_speed,
   1797  1.14     skrll 	    xfer->ux_pipe->up_dev->ud_addr, 0, 0);
   1798   1.1    bouyer 	KASSERT(ep->phase == IDLE);
   1799   1.1    bouyer 	/* select endpoint */
   1800   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, ep->ep_number);
   1801  1.14     skrll 	if (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress)
   1802   1.1    bouyer 	    == UE_DIR_IN) {
   1803   1.1    bouyer 		val = UREAD1(sc, MUSB2_REG_RXCSRL);
   1804   1.1    bouyer 		KASSERT((val & MUSB2_MASK_CSRL_RXPKTRDY) == 0);
   1805   1.1    bouyer 		motg_device_data_read(xfer);
   1806   1.1    bouyer 	} else {
   1807   1.1    bouyer 		ep->phase = DATA_OUT;
   1808   1.1    bouyer 		val = UREAD1(sc, MUSB2_REG_TXCSRL);
   1809   1.1    bouyer 		KASSERT((val & MUSB2_MASK_CSRL_TXPKTRDY) == 0);
   1810   1.1    bouyer 		motg_device_data_write(xfer);
   1811   1.1    bouyer 	}
   1812   1.1    bouyer end:
   1813   1.1    bouyer 	if (err)
   1814  1.14     skrll 		return err;
   1815   1.1    bouyer 
   1816  1.14     skrll 	return USBD_IN_PROGRESS;
   1817   1.1    bouyer }
   1818   1.1    bouyer 
   1819   1.1    bouyer static void
   1820  1.14     skrll motg_device_data_read(struct usbd_xfer *xfer)
   1821   1.1    bouyer {
   1822  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1823  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1824   1.1    bouyer 	uint32_t val;
   1825   1.1    bouyer 
   1826  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1827  1.14     skrll 
   1828   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1829   1.1    bouyer 	/* assume endpoint already selected */
   1830   1.1    bouyer 	motg_setup_endpoint_rx(xfer);
   1831   1.1    bouyer 	/* Max packet size */
   1832   1.1    bouyer 	UWRITE2(sc, MUSB2_REG_RXMAXP,
   1833  1.14     skrll 	    UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize));
   1834   1.1    bouyer 	/* Data Toggle */
   1835   1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_RXCSRH);
   1836   1.1    bouyer 	val |= MUSB2_MASK_CSRH_RXDT_WREN;
   1837   1.1    bouyer 	if (otgpipe->nexttoggle)
   1838   1.1    bouyer 		val |= MUSB2_MASK_CSRH_RXDT_VAL;
   1839   1.1    bouyer 	else
   1840   1.1    bouyer 		val &= ~MUSB2_MASK_CSRH_RXDT_VAL;
   1841   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_RXCSRH, val);
   1842   1.1    bouyer 
   1843  1.14     skrll 	DPRINTFN(MD_BULK, "%p to DATA_IN on ep %d, csrh 0x%x",
   1844  1.14     skrll 	    xfer, otgpipe->hw_ep->ep_number, UREAD1(sc, MUSB2_REG_RXCSRH), 0);
   1845   1.1    bouyer 	/* start transaction */
   1846   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_RXCSRL, MUSB2_MASK_CSRL_RXREQPKT);
   1847   1.1    bouyer 	otgpipe->hw_ep->phase = DATA_IN;
   1848   1.1    bouyer }
   1849   1.1    bouyer 
   1850   1.1    bouyer static void
   1851  1.14     skrll motg_device_data_write(struct usbd_xfer *xfer)
   1852   1.1    bouyer {
   1853  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1854  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1855   1.1    bouyer 	struct motg_hw_ep *ep = otgpipe->hw_ep;
   1856   1.1    bouyer 	int datalen;
   1857   1.1    bouyer 	char *data;
   1858   1.1    bouyer 	uint32_t val;
   1859   1.1    bouyer 
   1860  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1861  1.14     skrll 
   1862   1.1    bouyer 	KASSERT(xfer!=NULL);
   1863   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1864   1.1    bouyer 
   1865   1.1    bouyer 	datalen = min(ep->datalen,
   1866  1.14     skrll 	    UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize));
   1867   1.1    bouyer 	ep->phase = DATA_OUT;
   1868  1.14     skrll 	DPRINTFN(MD_BULK, "%p to DATA_OUT on ep %d, len %d csrh 0x%x",
   1869  1.14     skrll 	    xfer, ep->ep_number, datalen, UREAD1(sc, MUSB2_REG_TXCSRH));
   1870   1.1    bouyer 
   1871   1.1    bouyer 	/* assume endpoint already selected */
   1872   1.1    bouyer 	/* write data to fifo */
   1873   1.1    bouyer 	data = ep->data;
   1874   1.1    bouyer 	ep->data += datalen;
   1875   1.1    bouyer 	ep->datalen -= datalen;
   1876  1.14     skrll 	xfer->ux_actlen += datalen;
   1877   1.1    bouyer 	if (((vaddr_t)data & 0x3) == 0 &&
   1878   1.1    bouyer 	    (datalen >> 2) > 0) {
   1879   1.1    bouyer 		bus_space_write_multi_4(sc->sc_iot, sc->sc_ioh,
   1880   1.1    bouyer 		    MUSB2_REG_EPFIFO(ep->ep_number),
   1881   1.1    bouyer 		    (void *)data, datalen >> 2);
   1882   1.1    bouyer 		data += (datalen & ~0x3);
   1883   1.1    bouyer 		datalen -= (datalen & ~0x3);
   1884   1.1    bouyer 	}
   1885   1.1    bouyer 	if (datalen) {
   1886   1.1    bouyer 		bus_space_write_multi_1(sc->sc_iot, sc->sc_ioh,
   1887   1.1    bouyer 		    MUSB2_REG_EPFIFO(ep->ep_number), data, datalen);
   1888   1.1    bouyer 	}
   1889   1.1    bouyer 
   1890   1.1    bouyer 	motg_setup_endpoint_tx(xfer);
   1891   1.1    bouyer 	/* Max packet size */
   1892   1.1    bouyer 	UWRITE2(sc, MUSB2_REG_TXMAXP,
   1893  1.14     skrll 	    UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize));
   1894   1.1    bouyer 	/* Data Toggle */
   1895   1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_TXCSRH);
   1896   1.1    bouyer 	val |= MUSB2_MASK_CSRH_TXDT_WREN;
   1897   1.1    bouyer 	if (otgpipe->nexttoggle)
   1898   1.1    bouyer 		val |= MUSB2_MASK_CSRH_TXDT_VAL;
   1899   1.1    bouyer 	else
   1900   1.1    bouyer 		val &= ~MUSB2_MASK_CSRH_TXDT_VAL;
   1901   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRH, val);
   1902   1.1    bouyer 
   1903   1.1    bouyer 	/* start transaction */
   1904   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL, MUSB2_MASK_CSRL_TXPKTRDY);
   1905   1.1    bouyer }
   1906   1.1    bouyer 
   1907   1.1    bouyer static void
   1908   1.1    bouyer motg_device_intr_rx(struct motg_softc *sc, int epnumber)
   1909   1.1    bouyer {
   1910   1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_in_ep[epnumber];
   1911  1.14     skrll 	struct usbd_xfer *xfer = ep->xfer;
   1912   1.1    bouyer 	uint8_t csr;
   1913   1.1    bouyer 	int datalen, max_datalen;
   1914   1.1    bouyer 	char *data;
   1915   1.1    bouyer 	bool got_short;
   1916   1.3    bouyer 	usbd_status new_status = USBD_IN_PROGRESS;
   1917   1.1    bouyer 
   1918  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1919  1.14     skrll 
   1920   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1921   1.1    bouyer 	KASSERT(ep->ep_number == epnumber);
   1922   1.1    bouyer 
   1923  1.14     skrll 	DPRINTFN(MD_BULK, "on ep %d", epnumber, 0, 0, 0);
   1924  1.14     skrll 	/* select endpoint */
   1925   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, epnumber);
   1926   1.1    bouyer 
   1927   1.1    bouyer 	/* read out FIFO status */
   1928   1.1    bouyer 	csr = UREAD1(sc, MUSB2_REG_RXCSRL);
   1929  1.14     skrll 	DPRINTFN(MD_BULK, "phase %d csr 0x%x", ep->phase, csr ,0 ,0);
   1930   1.1    bouyer 
   1931   1.1    bouyer 	if ((csr & (MUSB2_MASK_CSRL_RXNAKTO | MUSB2_MASK_CSRL_RXSTALL |
   1932   1.1    bouyer 	    MUSB2_MASK_CSRL_RXERROR | MUSB2_MASK_CSRL_RXPKTRDY)) == 0)
   1933   1.1    bouyer 		return;
   1934   1.1    bouyer 
   1935  1.14     skrll 	KASSERTMSG(ep->phase == DATA_IN, "phase %d", ep->phase);
   1936   1.1    bouyer 	if (csr & MUSB2_MASK_CSRL_RXNAKTO) {
   1937   1.1    bouyer 		csr &= ~MUSB2_MASK_CSRL_RXREQPKT;
   1938   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, csr);
   1939   1.1    bouyer 
   1940   1.1    bouyer 		csr &= ~MUSB2_MASK_CSRL_RXNAKTO;
   1941   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, csr);
   1942   1.3    bouyer 		new_status = USBD_TIMEOUT; /* XXX */
   1943   1.1    bouyer 		goto complete;
   1944   1.1    bouyer 	}
   1945   1.1    bouyer 	if (csr & (MUSB2_MASK_CSRL_RXSTALL | MUSB2_MASK_CSRL_RXERROR)) {
   1946   1.7     skrll 		if (csr & MUSB2_MASK_CSRL_RXSTALL)
   1947   1.3    bouyer 			new_status = USBD_STALLED;
   1948   1.3    bouyer 		else
   1949   1.3    bouyer 			new_status = USBD_IOERROR;
   1950   1.1    bouyer 		/* clear status */
   1951   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   1952   1.1    bouyer 		goto complete;
   1953   1.1    bouyer 	}
   1954   1.1    bouyer 	KASSERT(csr & MUSB2_MASK_CSRL_RXPKTRDY);
   1955   1.1    bouyer 
   1956  1.14     skrll 	if (xfer == NULL || xfer->ux_status != USBD_IN_PROGRESS) {
   1957   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   1958   1.1    bouyer 		goto complete;
   1959   1.1    bouyer 	}
   1960   1.1    bouyer 
   1961  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1962   1.1    bouyer 	otgpipe->nexttoggle = otgpipe->nexttoggle ^ 1;
   1963   1.1    bouyer 
   1964   1.1    bouyer 	datalen = UREAD2(sc, MUSB2_REG_RXCOUNT);
   1965  1.14     skrll 	DPRINTFN(MD_BULK, "phase %d datalen %d", ep->phase, datalen ,0 ,0);
   1966  1.14     skrll 	KASSERT(UE_GET_SIZE(UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize)) > 0);
   1967   1.1    bouyer 	max_datalen = min(
   1968  1.14     skrll 	    UE_GET_SIZE(UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize)),
   1969   1.1    bouyer 	    ep->datalen);
   1970   1.1    bouyer 	if (datalen > max_datalen) {
   1971   1.3    bouyer 		new_status = USBD_IOERROR;
   1972   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   1973   1.1    bouyer 		goto complete;
   1974   1.1    bouyer 	}
   1975   1.1    bouyer 	got_short = (datalen < max_datalen);
   1976   1.1    bouyer 	if (datalen > 0) {
   1977   1.1    bouyer 		KASSERT(ep->phase == DATA_IN);
   1978   1.1    bouyer 		data = ep->data;
   1979   1.1    bouyer 		ep->data += datalen;
   1980   1.1    bouyer 		ep->datalen -= datalen;
   1981  1.14     skrll 		xfer->ux_actlen += datalen;
   1982   1.1    bouyer 		if (((vaddr_t)data & 0x3) == 0 &&
   1983   1.1    bouyer 		    (datalen >> 2) > 0) {
   1984  1.14     skrll 			DPRINTFN(MD_BULK, "r4 data %p len %d", data, datalen,
   1985  1.14     skrll 			    0, 0);
   1986   1.1    bouyer 			bus_space_read_multi_4(sc->sc_iot, sc->sc_ioh,
   1987   1.1    bouyer 			    MUSB2_REG_EPFIFO(ep->ep_number),
   1988   1.1    bouyer 			    (void *)data, datalen >> 2);
   1989   1.1    bouyer 			data += (datalen & ~0x3);
   1990   1.1    bouyer 			datalen -= (datalen & ~0x3);
   1991   1.1    bouyer 		}
   1992  1.14     skrll 		DPRINTFN(MD_BULK, "r1 data %p len %d", data, datalen ,0 ,0);
   1993   1.1    bouyer 		if (datalen) {
   1994   1.1    bouyer 			bus_space_read_multi_1(sc->sc_iot, sc->sc_ioh,
   1995   1.1    bouyer 			    MUSB2_REG_EPFIFO(ep->ep_number), data, datalen);
   1996   1.1    bouyer 		}
   1997   1.1    bouyer 	}
   1998   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   1999   1.1    bouyer 	KASSERT(ep->phase == DATA_IN);
   2000   1.1    bouyer 	if (got_short || (ep->datalen == 0)) {
   2001   1.1    bouyer 		if (ep->need_short_xfer == 0) {
   2002   1.3    bouyer 			new_status = USBD_NORMAL_COMPLETION;
   2003   1.1    bouyer 			goto complete;
   2004   1.1    bouyer 		}
   2005   1.1    bouyer 		ep->need_short_xfer = 0;
   2006   1.1    bouyer 	}
   2007   1.1    bouyer 	motg_device_data_read(xfer);
   2008   1.1    bouyer 	return;
   2009   1.1    bouyer complete:
   2010  1.14     skrll 	DPRINTFN(MD_BULK, "xfer %p complete, status %d", xfer,
   2011  1.14     skrll 	    (xfer != NULL) ? xfer->ux_status : 0, 0, 0);
   2012   1.1    bouyer 	ep->phase = IDLE;
   2013   1.1    bouyer 	ep->xfer = NULL;
   2014  1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS) {
   2015   1.3    bouyer 		KASSERT(new_status != USBD_IN_PROGRESS);
   2016  1.14     skrll 		xfer->ux_status = new_status;
   2017   1.1    bouyer 		usb_transfer_complete(xfer);
   2018   1.3    bouyer 	}
   2019   1.1    bouyer 	motg_device_data_start1(sc, ep);
   2020   1.1    bouyer }
   2021   1.1    bouyer 
   2022   1.1    bouyer static void
   2023   1.1    bouyer motg_device_intr_tx(struct motg_softc *sc, int epnumber)
   2024   1.1    bouyer {
   2025   1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_out_ep[epnumber];
   2026  1.14     skrll 	struct usbd_xfer *xfer = ep->xfer;
   2027   1.1    bouyer 	uint8_t csr;
   2028   1.1    bouyer 	struct motg_pipe *otgpipe;
   2029   1.3    bouyer 	usbd_status new_status = USBD_IN_PROGRESS;
   2030   1.1    bouyer 
   2031  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2032  1.14     skrll 
   2033   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   2034   1.1    bouyer 	KASSERT(ep->ep_number == epnumber);
   2035   1.1    bouyer 
   2036  1.14     skrll 	DPRINTFN(MD_BULK, " on ep %d", epnumber, 0, 0, 0);
   2037  1.14     skrll 	/* select endpoint */
   2038   1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, epnumber);
   2039   1.1    bouyer 
   2040   1.1    bouyer 	csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   2041  1.14     skrll 	DPRINTFN(MD_BULK, "phase %d csr 0x%x", ep->phase, csr, 0, 0);
   2042   1.1    bouyer 
   2043   1.1    bouyer 	if (csr & (MUSB2_MASK_CSRL_TXSTALLED|MUSB2_MASK_CSRL_TXERROR)) {
   2044   1.1    bouyer 		/* command not accepted */
   2045   1.7     skrll 		if (csr & MUSB2_MASK_CSRL_TXSTALLED)
   2046   1.3    bouyer 			new_status = USBD_STALLED;
   2047   1.3    bouyer 		else
   2048   1.3    bouyer 			new_status = USBD_IOERROR;
   2049   1.1    bouyer 		/* clear status */
   2050   1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   2051   1.1    bouyer 		goto complete;
   2052   1.1    bouyer 	}
   2053   1.1    bouyer 	if (csr & MUSB2_MASK_CSRL_TXNAKTO) {
   2054   1.3    bouyer 		new_status = USBD_TIMEOUT; /* XXX */
   2055   1.3    bouyer 		csr &= ~MUSB2_MASK_CSRL_TXNAKTO;
   2056   1.3    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   2057   1.1    bouyer 		/* flush fifo */
   2058   1.1    bouyer 		while (csr & MUSB2_MASK_CSRL_TXFIFONEMPTY) {
   2059   1.1    bouyer 			csr |= MUSB2_MASK_CSRL_TXFFLUSH;
   2060   1.3    bouyer 			csr &= ~MUSB2_MASK_CSRL_TXNAKTO;
   2061   1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   2062   1.3    bouyer 			delay(1000);
   2063   1.1    bouyer 			csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   2064  1.14     skrll 			DPRINTFN(MD_BULK, "TX fifo flush ep %d CSR 0x%x",
   2065  1.14     skrll 			    epnumber, csr, 0, 0);
   2066   1.1    bouyer 		}
   2067   1.1    bouyer 		goto complete;
   2068   1.1    bouyer 	}
   2069   1.1    bouyer 	if (csr & (MUSB2_MASK_CSRL_TXFIFONEMPTY|MUSB2_MASK_CSRL_TXPKTRDY)) {
   2070   1.1    bouyer 		/* data still not sent */
   2071   1.1    bouyer 		return;
   2072   1.1    bouyer 	}
   2073  1.14     skrll 	if (xfer == NULL || xfer->ux_status != USBD_IN_PROGRESS)
   2074   1.1    bouyer 		goto complete;
   2075  1.14     skrll 	KASSERT(ep->phase == DATA_OUT);
   2076   1.7     skrll 
   2077  1.14     skrll 	otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   2078   1.1    bouyer 	otgpipe->nexttoggle = otgpipe->nexttoggle ^ 1;
   2079   1.1    bouyer 
   2080   1.1    bouyer 	if (ep->datalen == 0) {
   2081   1.1    bouyer 		if (ep->need_short_xfer) {
   2082   1.1    bouyer 			ep->need_short_xfer = 0;
   2083   1.1    bouyer 			/* one more data phase */
   2084   1.1    bouyer 		} else {
   2085   1.3    bouyer 			new_status = USBD_NORMAL_COMPLETION;
   2086   1.1    bouyer 			goto complete;
   2087   1.1    bouyer 		}
   2088   1.1    bouyer 	}
   2089   1.1    bouyer 	motg_device_data_write(xfer);
   2090   1.1    bouyer 	return;
   2091   1.1    bouyer 
   2092   1.1    bouyer complete:
   2093  1.14     skrll 	DPRINTFN(MD_BULK, "xfer %p complete, status %d", xfer,
   2094  1.14     skrll 	    (xfer != NULL) ? xfer->ux_status : 0, 0, 0);
   2095   1.1    bouyer #ifdef DIAGNOSTIC
   2096  1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS && ep->phase != DATA_OUT)
   2097   1.1    bouyer 		panic("motg_device_intr_tx: bad phase %d", ep->phase);
   2098   1.1    bouyer #endif
   2099   1.1    bouyer 	ep->phase = IDLE;
   2100   1.1    bouyer 	ep->xfer = NULL;
   2101  1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS) {
   2102   1.3    bouyer 		KASSERT(new_status != USBD_IN_PROGRESS);
   2103  1.14     skrll 		xfer->ux_status = new_status;
   2104   1.1    bouyer 		usb_transfer_complete(xfer);
   2105   1.3    bouyer 	}
   2106   1.1    bouyer 	motg_device_data_start1(sc, ep);
   2107   1.1    bouyer }
   2108   1.1    bouyer 
   2109   1.1    bouyer /* Abort a device control request. */
   2110   1.1    bouyer void
   2111  1.14     skrll motg_device_data_abort(struct usbd_xfer *xfer)
   2112   1.1    bouyer {
   2113  1.14     skrll 	struct motg_softc __diagused *sc = MOTG_XFER2SC(xfer);
   2114   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   2115   1.1    bouyer 
   2116  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2117  1.14     skrll 
   2118   1.3    bouyer 	motg_device_xfer_abort(xfer);
   2119   1.1    bouyer }
   2120   1.1    bouyer 
   2121   1.1    bouyer /* Close a device control pipe */
   2122   1.1    bouyer void
   2123  1.14     skrll motg_device_data_close(struct usbd_pipe *pipe)
   2124   1.1    bouyer {
   2125  1.14     skrll 	struct motg_softc *sc __diagused = MOTG_PIPE2SC(pipe);
   2126  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
   2127   1.1    bouyer 	struct motg_pipe *otgpipeiter;
   2128   1.1    bouyer 
   2129  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2130  1.14     skrll 
   2131   1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   2132   1.1    bouyer 	KASSERT(otgpipe->hw_ep->xfer == NULL ||
   2133  1.14     skrll 	    otgpipe->hw_ep->xfer->ux_pipe != pipe);
   2134   1.1    bouyer 
   2135  1.14     skrll 	pipe->up_endpoint->ue_toggle = otgpipe->nexttoggle;
   2136   1.1    bouyer 	SIMPLEQ_FOREACH(otgpipeiter, &otgpipe->hw_ep->ep_pipes, ep_pipe_list) {
   2137   1.1    bouyer 		if (otgpipeiter == otgpipe) {
   2138   1.1    bouyer 			/* remove from list */
   2139   1.1    bouyer 			SIMPLEQ_REMOVE(&otgpipe->hw_ep->ep_pipes, otgpipe,
   2140   1.1    bouyer 			    motg_pipe, ep_pipe_list);
   2141   1.1    bouyer 			otgpipe->hw_ep->refcount--;
   2142   1.1    bouyer 			/* we're done */
   2143   1.1    bouyer 			return;
   2144   1.1    bouyer 		}
   2145   1.1    bouyer 	}
   2146   1.1    bouyer 	panic("motg_device_data_close: not found");
   2147   1.1    bouyer }
   2148   1.1    bouyer 
   2149   1.1    bouyer void
   2150  1.14     skrll motg_device_data_done(struct usbd_xfer *xfer)
   2151   1.1    bouyer {
   2152  1.14     skrll 	struct motg_pipe *otgpipe __diagused = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   2153  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2154  1.14     skrll 
   2155   1.1    bouyer 	KASSERT(otgpipe->hw_ep->xfer != xfer);
   2156   1.1    bouyer }
   2157   1.1    bouyer 
   2158   1.1    bouyer /*
   2159   1.1    bouyer  * Wait here until controller claims to have an interrupt.
   2160   1.1    bouyer  * Then call motg_intr and return.  Use timeout to avoid waiting
   2161   1.1    bouyer  * too long.
   2162   1.1    bouyer  * Only used during boot when interrupts are not enabled yet.
   2163   1.1    bouyer  */
   2164   1.1    bouyer void
   2165  1.14     skrll motg_waitintr(struct motg_softc *sc, struct usbd_xfer *xfer)
   2166   1.1    bouyer {
   2167  1.14     skrll 	int timo = xfer->ux_timeout;
   2168  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2169   1.1    bouyer 
   2170   1.1    bouyer 	mutex_enter(&sc->sc_lock);
   2171   1.1    bouyer 
   2172  1.14     skrll 	DPRINTF("timeout = %dms", timo, 0, 0, 0);
   2173   1.1    bouyer 
   2174   1.1    bouyer 	for (; timo >= 0; timo--) {
   2175   1.1    bouyer 		mutex_exit(&sc->sc_lock);
   2176   1.1    bouyer 		usb_delay_ms(&sc->sc_bus, 1);
   2177   1.1    bouyer 		mutex_spin_enter(&sc->sc_intr_lock);
   2178   1.1    bouyer 		motg_poll(&sc->sc_bus);
   2179   1.1    bouyer 		mutex_spin_exit(&sc->sc_intr_lock);
   2180   1.1    bouyer 		mutex_enter(&sc->sc_lock);
   2181  1.14     skrll 		if (xfer->ux_status != USBD_IN_PROGRESS)
   2182   1.1    bouyer 			goto done;
   2183   1.1    bouyer 	}
   2184   1.1    bouyer 
   2185   1.1    bouyer 	/* Timeout */
   2186  1.14     skrll 	DPRINTF("timeout", 0, 0, 0, 0);
   2187   1.1    bouyer 	panic("motg_waitintr: timeout");
   2188   1.1    bouyer 	/* XXX handle timeout ! */
   2189   1.1    bouyer 
   2190   1.1    bouyer done:
   2191   1.1    bouyer 	mutex_exit(&sc->sc_lock);
   2192   1.1    bouyer }
   2193   1.1    bouyer 
   2194   1.1    bouyer void
   2195  1.14     skrll motg_device_clear_toggle(struct usbd_pipe *pipe)
   2196   1.1    bouyer {
   2197  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
   2198   1.1    bouyer 	otgpipe->nexttoggle = 0;
   2199   1.1    bouyer }
   2200   1.3    bouyer 
   2201   1.3    bouyer /* Abort a device control request. */
   2202   1.3    bouyer static void
   2203  1.14     skrll motg_device_xfer_abort(struct usbd_xfer *xfer)
   2204   1.3    bouyer {
   2205   1.3    bouyer 	int wake;
   2206   1.3    bouyer 	uint8_t csr;
   2207  1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   2208  1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   2209   1.3    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   2210   1.3    bouyer 
   2211  1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2212  1.14     skrll 
   2213  1.14     skrll 	if (xfer->ux_hcflags & UXFER_ABORTING) {
   2214  1.14     skrll 		DPRINTF("already aborting", 0, 0, 0, 0);
   2215  1.14     skrll 		xfer->ux_hcflags |= UXFER_ABORTWAIT;
   2216  1.14     skrll 		while (xfer->ux_hcflags & UXFER_ABORTING)
   2217  1.14     skrll 			cv_wait(&xfer->ux_hccv, &sc->sc_lock);
   2218   1.3    bouyer 		return;
   2219   1.3    bouyer 	}
   2220  1.14     skrll 	xfer->ux_hcflags |= UXFER_ABORTING;
   2221   1.3    bouyer 	if (otgpipe->hw_ep->xfer == xfer) {
   2222  1.14     skrll 		KASSERT(xfer->ux_status == USBD_IN_PROGRESS);
   2223   1.3    bouyer 		otgpipe->hw_ep->xfer = NULL;
   2224   1.3    bouyer 		if (otgpipe->hw_ep->ep_number > 0) {
   2225   1.7     skrll 			/* select endpoint */
   2226   1.3    bouyer 			UWRITE1(sc, MUSB2_REG_EPINDEX,
   2227   1.3    bouyer 			    otgpipe->hw_ep->ep_number);
   2228   1.3    bouyer 			if (otgpipe->hw_ep->phase == DATA_OUT) {
   2229   1.3    bouyer 				csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   2230   1.3    bouyer 				while (csr & MUSB2_MASK_CSRL_TXFIFONEMPTY) {
   2231   1.3    bouyer 					csr |= MUSB2_MASK_CSRL_TXFFLUSH;
   2232   1.3    bouyer 					UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   2233   1.3    bouyer 					csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   2234   1.3    bouyer 				}
   2235   1.3    bouyer 				UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   2236   1.3    bouyer 			} else if (otgpipe->hw_ep->phase == DATA_IN) {
   2237   1.3    bouyer 				csr = UREAD1(sc, MUSB2_REG_RXCSRL);
   2238   1.3    bouyer 				while (csr & MUSB2_MASK_CSRL_RXPKTRDY) {
   2239   1.3    bouyer 					csr |= MUSB2_MASK_CSRL_RXFFLUSH;
   2240   1.3    bouyer 					UWRITE1(sc, MUSB2_REG_RXCSRL, csr);
   2241   1.3    bouyer 					csr = UREAD1(sc, MUSB2_REG_RXCSRL);
   2242   1.3    bouyer 				}
   2243   1.3    bouyer 				UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   2244   1.3    bouyer 			}
   2245   1.3    bouyer 			otgpipe->hw_ep->phase = IDLE;
   2246   1.3    bouyer 		}
   2247   1.3    bouyer 	}
   2248  1.14     skrll 	xfer->ux_status = USBD_CANCELLED; /* make software ignore it */
   2249  1.14     skrll 	wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
   2250  1.14     skrll 	xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2251   1.3    bouyer 	usb_transfer_complete(xfer);
   2252   1.3    bouyer 	if (wake)
   2253  1.14     skrll 		cv_broadcast(&xfer->ux_hccv);
   2254   1.3    bouyer }
   2255