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motg.c revision 1.19.2.1
      1  1.19.2.1  pgoyette /*	$NetBSD: motg.c,v 1.19.2.1 2018/04/16 02:00:02 pgoyette Exp $	*/
      2       1.1    bouyer 
      3       1.1    bouyer /*
      4       1.1    bouyer  * Copyright (c) 1998, 2004, 2011, 2012, 2014 The NetBSD Foundation, Inc.
      5       1.1    bouyer  * All rights reserved.
      6       1.1    bouyer  *
      7       1.1    bouyer  * This code is derived from software contributed to The NetBSD Foundation
      8       1.1    bouyer  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9       1.1    bouyer  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca),
     10       1.1    bouyer  * Matthew R. Green (mrg (at) eterna.com.au), and Manuel Bouyer (bouyer (at) netbsd.org).
     11       1.1    bouyer  *
     12       1.1    bouyer  * Redistribution and use in source and binary forms, with or without
     13       1.1    bouyer  * modification, are permitted provided that the following conditions
     14       1.1    bouyer  * are met:
     15       1.1    bouyer  * 1. Redistributions of source code must retain the above copyright
     16       1.1    bouyer  *    notice, this list of conditions and the following disclaimer.
     17       1.1    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     18       1.1    bouyer  *    notice, this list of conditions and the following disclaimer in the
     19       1.1    bouyer  *    documentation and/or other materials provided with the distribution.
     20       1.1    bouyer  *
     21       1.1    bouyer  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22       1.1    bouyer  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23       1.1    bouyer  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24       1.1    bouyer  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25       1.1    bouyer  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26       1.1    bouyer  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27       1.1    bouyer  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28       1.1    bouyer  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29       1.1    bouyer  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30       1.1    bouyer  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31       1.1    bouyer  * POSSIBILITY OF SUCH DAMAGE.
     32       1.1    bouyer  */
     33       1.1    bouyer 
     34       1.1    bouyer 
     35       1.1    bouyer /*
     36       1.1    bouyer  * This file contains the driver for the Mentor Graphics Inventra USB
     37       1.1    bouyer  * 2.0 High Speed Dual-Role controller.
     38       1.1    bouyer  *
     39       1.1    bouyer  * NOTE: The current implementation only supports Device Side Mode!
     40       1.1    bouyer  */
     41       1.1    bouyer 
     42      1.14     skrll #include <sys/cdefs.h>
     43  1.19.2.1  pgoyette __KERNEL_RCSID(0, "$NetBSD: motg.c,v 1.19.2.1 2018/04/16 02:00:02 pgoyette Exp $");
     44      1.14     skrll 
     45      1.14     skrll #ifdef _KERNEL_OPT
     46      1.14     skrll #include "opt_usb.h"
     47      1.14     skrll #endif
     48      1.10  jmcneill 
     49      1.14     skrll #include <sys/param.h>
     50       1.1    bouyer 
     51      1.14     skrll #include <sys/bus.h>
     52      1.14     skrll #include <sys/cpu.h>
     53      1.14     skrll #include <sys/device.h>
     54       1.1    bouyer #include <sys/kernel.h>
     55       1.1    bouyer #include <sys/kmem.h>
     56       1.1    bouyer #include <sys/proc.h>
     57       1.1    bouyer #include <sys/queue.h>
     58      1.14     skrll #include <sys/select.h>
     59      1.14     skrll #include <sys/sysctl.h>
     60      1.14     skrll #include <sys/systm.h>
     61       1.1    bouyer 
     62       1.1    bouyer #include <machine/endian.h>
     63       1.1    bouyer 
     64       1.1    bouyer #include <dev/usb/usb.h>
     65       1.1    bouyer #include <dev/usb/usbdi.h>
     66       1.1    bouyer #include <dev/usb/usbdivar.h>
     67       1.1    bouyer #include <dev/usb/usb_mem.h>
     68      1.14     skrll #include <dev/usb/usbhist.h>
     69       1.1    bouyer 
     70       1.1    bouyer #include <dev/usb/motgreg.h>
     71       1.1    bouyer #include <dev/usb/motgvar.h>
     72      1.14     skrll #include <dev/usb/usbroothub.h>
     73      1.14     skrll 
     74      1.14     skrll #ifdef USB_DEBUG
     75      1.14     skrll #ifndef MOTG_DEBUG
     76      1.14     skrll #define motgdebug 0
     77      1.14     skrll #else
     78      1.14     skrll int motgdebug = 0;
     79      1.14     skrll 
     80      1.14     skrll SYSCTL_SETUP(sysctl_hw_motg_setup, "sysctl hw.motg setup")
     81      1.14     skrll {
     82      1.14     skrll 	int err;
     83      1.14     skrll 	const struct sysctlnode *rnode;
     84      1.14     skrll 	const struct sysctlnode *cnode;
     85      1.14     skrll 
     86      1.14     skrll 	err = sysctl_createv(clog, 0, NULL, &rnode,
     87      1.14     skrll 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "motg",
     88      1.14     skrll 	    SYSCTL_DESCR("motg global controls"),
     89      1.14     skrll 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
     90      1.14     skrll 
     91      1.14     skrll 	if (err)
     92      1.14     skrll 		goto fail;
     93      1.14     skrll 
     94      1.14     skrll 	/* control debugging printfs */
     95      1.14     skrll 	err = sysctl_createv(clog, 0, &rnode, &cnode,
     96      1.14     skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
     97      1.14     skrll 	    "debug", SYSCTL_DESCR("Enable debugging output"),
     98      1.14     skrll 	    NULL, 0, &motgdebug, sizeof(motgdebug), CTL_CREATE, CTL_EOL);
     99      1.14     skrll 	if (err)
    100      1.14     skrll 		goto fail;
    101      1.14     skrll 
    102      1.14     skrll 	return;
    103      1.14     skrll fail:
    104      1.14     skrll 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
    105      1.14     skrll }
    106      1.14     skrll 
    107      1.14     skrll #endif /* MOTG_DEBUG */
    108      1.14     skrll #endif /* USB_DEBUG */
    109       1.1    bouyer 
    110       1.1    bouyer #define MD_ROOT 0x0002
    111       1.1    bouyer #define MD_CTRL 0x0004
    112       1.1    bouyer #define MD_BULK 0x0008
    113      1.14     skrll 
    114      1.14     skrll #define	DPRINTF(FMT,A,B,C,D)	USBHIST_LOGN(motgdebug,1,FMT,A,B,C,D)
    115      1.14     skrll #define	DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGM(motgdebug,N,FMT,A,B,C,D)
    116      1.14     skrll #define	MOTGHIST_FUNC()		USBHIST_FUNC()
    117      1.14     skrll #define	MOTGHIST_CALLED(name)	USBHIST_CALLED(motgdebug)
    118      1.14     skrll 
    119       1.1    bouyer 
    120       1.1    bouyer /* various timeouts, for various speeds */
    121       1.1    bouyer /* control NAK timeouts */
    122       1.1    bouyer #define NAK_TO_CTRL	10	/* 1024 frames, about 1s */
    123       1.1    bouyer #define NAK_TO_CTRL_HIGH 13	/* 8k microframes, about 0.8s */
    124       1.1    bouyer 
    125       1.1    bouyer /* intr/iso polling intervals */
    126       1.1    bouyer #define POLL_TO		100	/* 100 frames, about 0.1s */
    127       1.1    bouyer #define POLL_TO_HIGH	10	/* 100 microframes, about 0.12s */
    128       1.1    bouyer 
    129       1.1    bouyer /* bulk NAK timeouts */
    130       1.3    bouyer #define NAK_TO_BULK	0 /* disabled */
    131       1.3    bouyer #define NAK_TO_BULK_HIGH 0
    132       1.1    bouyer 
    133       1.1    bouyer static void 		motg_hub_change(struct motg_softc *);
    134       1.1    bouyer 
    135      1.14     skrll static usbd_status	motg_root_intr_transfer(struct usbd_xfer *);
    136      1.14     skrll static usbd_status	motg_root_intr_start(struct usbd_xfer *);
    137      1.14     skrll static void		motg_root_intr_abort(struct usbd_xfer *);
    138      1.14     skrll static void		motg_root_intr_close(struct usbd_pipe *);
    139      1.14     skrll static void		motg_root_intr_done(struct usbd_xfer *);
    140      1.14     skrll 
    141      1.14     skrll static usbd_status	motg_open(struct usbd_pipe *);
    142       1.1    bouyer static void		motg_poll(struct usbd_bus *);
    143       1.1    bouyer static void		motg_softintr(void *);
    144      1.14     skrll static struct usbd_xfer *
    145      1.14     skrll 			motg_allocx(struct usbd_bus *, unsigned int);
    146      1.14     skrll static void		motg_freex(struct usbd_bus *, struct usbd_xfer *);
    147       1.1    bouyer static void		motg_get_lock(struct usbd_bus *, kmutex_t **);
    148      1.14     skrll static int		motg_roothub_ctrl(struct usbd_bus *, usb_device_request_t *,
    149      1.14     skrll 			    void *, int);
    150      1.14     skrll 
    151      1.14     skrll static void		motg_noop(struct usbd_pipe *pipe);
    152       1.1    bouyer static usbd_status	motg_portreset(struct motg_softc*);
    153       1.1    bouyer 
    154      1.14     skrll static usbd_status	motg_device_ctrl_transfer(struct usbd_xfer *);
    155      1.14     skrll static usbd_status	motg_device_ctrl_start(struct usbd_xfer *);
    156      1.14     skrll static void		motg_device_ctrl_abort(struct usbd_xfer *);
    157      1.14     skrll static void		motg_device_ctrl_close(struct usbd_pipe *);
    158      1.14     skrll static void		motg_device_ctrl_done(struct usbd_xfer *);
    159       1.1    bouyer static usbd_status	motg_device_ctrl_start1(struct motg_softc *);
    160      1.14     skrll static void		motg_device_ctrl_read(struct usbd_xfer *);
    161       1.1    bouyer static void		motg_device_ctrl_intr_rx(struct motg_softc *);
    162       1.1    bouyer static void		motg_device_ctrl_intr_tx(struct motg_softc *);
    163       1.1    bouyer 
    164      1.14     skrll static usbd_status	motg_device_data_transfer(struct usbd_xfer *);
    165      1.14     skrll static usbd_status	motg_device_data_start(struct usbd_xfer *);
    166       1.1    bouyer static usbd_status	motg_device_data_start1(struct motg_softc *,
    167       1.1    bouyer 			    struct motg_hw_ep *);
    168      1.14     skrll static void		motg_device_data_abort(struct usbd_xfer *);
    169      1.14     skrll static void		motg_device_data_close(struct usbd_pipe *);
    170      1.14     skrll static void		motg_device_data_done(struct usbd_xfer *);
    171       1.1    bouyer static void		motg_device_intr_rx(struct motg_softc *, int);
    172       1.1    bouyer static void		motg_device_intr_tx(struct motg_softc *, int);
    173      1.14     skrll static void		motg_device_data_read(struct usbd_xfer *);
    174      1.14     skrll static void		motg_device_data_write(struct usbd_xfer *);
    175       1.1    bouyer 
    176      1.14     skrll static void		motg_device_clear_toggle(struct usbd_pipe *);
    177      1.14     skrll static void		motg_device_xfer_abort(struct usbd_xfer *);
    178       1.1    bouyer 
    179       1.1    bouyer #define UBARR(sc) bus_space_barrier((sc)->sc_iot, (sc)->sc_ioh, 0, (sc)->sc_size, \
    180       1.1    bouyer 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    181       1.1    bouyer #define UWRITE1(sc, r, x) \
    182       1.1    bouyer  do { UBARR(sc); bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (r), (x)); \
    183       1.1    bouyer  } while (/*CONSTCOND*/0)
    184       1.1    bouyer #define UWRITE2(sc, r, x) \
    185       1.1    bouyer  do { UBARR(sc); bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (r), (x)); \
    186       1.1    bouyer  } while (/*CONSTCOND*/0)
    187       1.1    bouyer #define UWRITE4(sc, r, x) \
    188       1.1    bouyer  do { UBARR(sc); bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (r), (x)); \
    189       1.1    bouyer  } while (/*CONSTCOND*/0)
    190       1.1    bouyer 
    191       1.1    bouyer static __inline uint32_t
    192       1.1    bouyer UREAD1(struct motg_softc *sc, bus_size_t r)
    193       1.1    bouyer {
    194       1.1    bouyer 
    195       1.1    bouyer 	UBARR(sc);
    196       1.1    bouyer 	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, r);
    197       1.1    bouyer }
    198       1.1    bouyer static __inline uint32_t
    199       1.1    bouyer UREAD2(struct motg_softc *sc, bus_size_t r)
    200       1.1    bouyer {
    201       1.1    bouyer 
    202       1.1    bouyer 	UBARR(sc);
    203       1.1    bouyer 	return bus_space_read_2(sc->sc_iot, sc->sc_ioh, r);
    204       1.1    bouyer }
    205       1.4     joerg 
    206       1.4     joerg #if 0
    207       1.1    bouyer static __inline uint32_t
    208       1.1    bouyer UREAD4(struct motg_softc *sc, bus_size_t r)
    209       1.1    bouyer {
    210       1.1    bouyer 
    211       1.1    bouyer 	UBARR(sc);
    212       1.1    bouyer 	return bus_space_read_4(sc->sc_iot, sc->sc_ioh, r);
    213       1.1    bouyer }
    214       1.4     joerg #endif
    215       1.1    bouyer 
    216       1.1    bouyer static void
    217       1.7     skrll musbotg_pull_common(struct motg_softc *sc, uint8_t on)
    218       1.1    bouyer {
    219      1.14     skrll 	uint8_t val;
    220       1.1    bouyer 
    221      1.14     skrll 	val = UREAD1(sc, MUSB2_REG_POWER);
    222      1.14     skrll 	if (on)
    223      1.14     skrll 		val |= MUSB2_MASK_SOFTC;
    224      1.14     skrll 	else
    225      1.14     skrll 		val &= ~MUSB2_MASK_SOFTC;
    226       1.1    bouyer 
    227      1.14     skrll 	UWRITE1(sc, MUSB2_REG_POWER, val);
    228       1.1    bouyer }
    229       1.1    bouyer 
    230       1.1    bouyer const struct usbd_bus_methods motg_bus_methods = {
    231      1.14     skrll 	.ubm_open =	motg_open,
    232      1.14     skrll 	.ubm_softint =	motg_softintr,
    233      1.14     skrll 	.ubm_dopoll =	motg_poll,
    234      1.14     skrll 	.ubm_allocx =	motg_allocx,
    235      1.14     skrll 	.ubm_freex =	motg_freex,
    236      1.14     skrll 	.ubm_getlock =	motg_get_lock,
    237      1.14     skrll 	.ubm_rhctrl =	motg_roothub_ctrl,
    238       1.1    bouyer };
    239       1.1    bouyer 
    240       1.1    bouyer const struct usbd_pipe_methods motg_root_intr_methods = {
    241      1.14     skrll 	.upm_transfer =	motg_root_intr_transfer,
    242      1.14     skrll 	.upm_start =	motg_root_intr_start,
    243      1.14     skrll 	.upm_abort =	motg_root_intr_abort,
    244      1.14     skrll 	.upm_close =	motg_root_intr_close,
    245      1.14     skrll 	.upm_cleartoggle =	motg_noop,
    246      1.14     skrll 	.upm_done =	motg_root_intr_done,
    247       1.1    bouyer };
    248       1.1    bouyer 
    249       1.1    bouyer const struct usbd_pipe_methods motg_device_ctrl_methods = {
    250      1.14     skrll 	.upm_transfer =	motg_device_ctrl_transfer,
    251      1.14     skrll 	.upm_start =	motg_device_ctrl_start,
    252      1.14     skrll 	.upm_abort =	motg_device_ctrl_abort,
    253      1.14     skrll 	.upm_close =	motg_device_ctrl_close,
    254      1.14     skrll 	.upm_cleartoggle =	motg_noop,
    255      1.14     skrll 	.upm_done =	motg_device_ctrl_done,
    256       1.1    bouyer };
    257       1.1    bouyer 
    258       1.1    bouyer const struct usbd_pipe_methods motg_device_data_methods = {
    259      1.14     skrll 	.upm_transfer =	motg_device_data_transfer,
    260      1.14     skrll 	.upm_start =	motg_device_data_start,
    261      1.14     skrll 	.upm_abort =	motg_device_data_abort,
    262      1.14     skrll 	.upm_close =	motg_device_data_close,
    263      1.14     skrll 	.upm_cleartoggle =	motg_device_clear_toggle,
    264      1.14     skrll 	.upm_done =	motg_device_data_done,
    265       1.1    bouyer };
    266       1.1    bouyer 
    267      1.14     skrll int
    268       1.1    bouyer motg_init(struct motg_softc *sc)
    269       1.1    bouyer {
    270       1.1    bouyer 	uint32_t nrx, ntx, val;
    271       1.1    bouyer 	int dynfifo;
    272       1.1    bouyer 	int offset, i;
    273       1.1    bouyer 
    274      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    275      1.14     skrll 
    276       1.1    bouyer 	if (sc->sc_mode == MOTG_MODE_DEVICE)
    277      1.14     skrll 		return ENOTSUP; /* not supported */
    278       1.1    bouyer 
    279       1.1    bouyer 	/* disable all interrupts */
    280       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_INTUSBE, 0);
    281       1.1    bouyer 	UWRITE2(sc, MUSB2_REG_INTTXE, 0);
    282       1.1    bouyer 	UWRITE2(sc, MUSB2_REG_INTRXE, 0);
    283       1.1    bouyer 	/* disable pullup */
    284       1.1    bouyer 
    285       1.7     skrll 	musbotg_pull_common(sc, 0);
    286       1.1    bouyer 
    287      1.10  jmcneill #ifdef MUSB2_REG_RXDBDIS
    288       1.1    bouyer 	/* disable double packet buffering XXX what's this ? */
    289       1.1    bouyer 	UWRITE2(sc, MUSB2_REG_RXDBDIS, 0xFFFF);
    290       1.1    bouyer 	UWRITE2(sc, MUSB2_REG_TXDBDIS, 0xFFFF);
    291      1.10  jmcneill #endif
    292       1.1    bouyer 
    293       1.1    bouyer 	/* enable HighSpeed and ISO Update flags */
    294       1.1    bouyer 
    295       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_POWER,
    296       1.1    bouyer 	    MUSB2_MASK_HSENAB | MUSB2_MASK_ISOUPD);
    297       1.1    bouyer 
    298       1.1    bouyer 	if (sc->sc_mode == MOTG_MODE_DEVICE) {
    299       1.1    bouyer 		/* clear Session bit, if set */
    300       1.1    bouyer 		val = UREAD1(sc, MUSB2_REG_DEVCTL);
    301       1.1    bouyer 		val &= ~MUSB2_MASK_SESS;
    302       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_DEVCTL, val);
    303       1.1    bouyer 	} else {
    304       1.1    bouyer 		/* Enter session for Host mode */
    305       1.1    bouyer 		val = UREAD1(sc, MUSB2_REG_DEVCTL);
    306       1.1    bouyer 		val |= MUSB2_MASK_SESS;
    307       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_DEVCTL, val);
    308       1.1    bouyer 	}
    309       1.1    bouyer 	delay(1000);
    310      1.18  pgoyette 	DPRINTF("DEVCTL 0x%jx", UREAD1(sc, MUSB2_REG_DEVCTL), 0, 0, 0);
    311       1.1    bouyer 
    312       1.1    bouyer 	/* disable testmode */
    313       1.1    bouyer 
    314       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TESTMODE, 0);
    315       1.1    bouyer 
    316      1.10  jmcneill #ifdef MUSB2_REG_MISC
    317       1.7     skrll 	/* set default value */
    318       1.1    bouyer 
    319       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_MISC, 0);
    320      1.10  jmcneill #endif
    321       1.1    bouyer 
    322       1.7     skrll 	/* select endpoint index 0 */
    323       1.1    bouyer 
    324       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
    325       1.1    bouyer 
    326       1.9  jmcneill 	if (sc->sc_ep_max == 0) {
    327       1.9  jmcneill 		/* read out number of endpoints */
    328       1.9  jmcneill 		nrx = (UREAD1(sc, MUSB2_REG_EPINFO) / 16);
    329       1.1    bouyer 
    330       1.9  jmcneill 		ntx = (UREAD1(sc, MUSB2_REG_EPINFO) % 16);
    331       1.1    bouyer 
    332       1.9  jmcneill 		/* these numbers exclude the control endpoint */
    333       1.1    bouyer 
    334      1.18  pgoyette 		DPRINTFN(1,"RX/TX endpoints: %ju/%ju", nrx, ntx, 0, 0);
    335       1.1    bouyer 
    336       1.9  jmcneill 		sc->sc_ep_max = MAX(nrx, ntx);
    337       1.9  jmcneill 	} else {
    338       1.9  jmcneill 		nrx = ntx = sc->sc_ep_max;
    339       1.9  jmcneill 	}
    340       1.1    bouyer 	if (sc->sc_ep_max == 0) {
    341       1.1    bouyer 		aprint_error_dev(sc->sc_dev, " no endpoints\n");
    342      1.14     skrll 		return -1;
    343       1.1    bouyer 	}
    344       1.1    bouyer 	KASSERT(sc->sc_ep_max <= MOTG_MAX_HW_EP);
    345       1.1    bouyer 	/* read out configuration data */
    346       1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_CONFDATA);
    347       1.1    bouyer 
    348      1.18  pgoyette 	DPRINTF("Config Data: 0x%02jx", val, 0, 0, 0);
    349       1.1    bouyer 
    350       1.1    bouyer 	dynfifo = (val & MUSB2_MASK_CD_DYNFIFOSZ) ? 1 : 0;
    351       1.1    bouyer 
    352       1.7     skrll 	if (dynfifo) {
    353       1.1    bouyer 		aprint_normal_dev(sc->sc_dev, "Dynamic FIFO sizing detected, "
    354       1.1    bouyer 		    "assuming 16Kbytes of FIFO RAM\n");
    355       1.7     skrll 	}
    356       1.7     skrll 
    357      1.18  pgoyette 	DPRINTF("HW version: 0x%04jx\n", UREAD1(sc, MUSB2_REG_HWVERS), 0, 0, 0);
    358       1.1    bouyer 
    359       1.1    bouyer 	/* initialise endpoint profiles */
    360       1.1    bouyer 	sc->sc_in_ep[0].ep_fifo_size = 64;
    361       1.1    bouyer 	sc->sc_out_ep[0].ep_fifo_size = 0; /* not used */
    362       1.1    bouyer 	sc->sc_out_ep[0].ep_number = sc->sc_in_ep[0].ep_number = 0;
    363       1.1    bouyer 	SIMPLEQ_INIT(&sc->sc_in_ep[0].ep_pipes);
    364       1.1    bouyer 	offset = 64;
    365       1.1    bouyer 
    366       1.1    bouyer 	for (i = 1; i <= sc->sc_ep_max; i++) {
    367       1.1    bouyer 		int fiforx_size, fifotx_size, fifo_size;
    368       1.1    bouyer 
    369       1.7     skrll 		/* select endpoint */
    370       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_EPINDEX, i);
    371       1.1    bouyer 
    372      1.11  jmcneill 		if (sc->sc_ep_fifosize) {
    373      1.11  jmcneill 			fiforx_size = fifotx_size = sc->sc_ep_fifosize;
    374      1.11  jmcneill 		} else {
    375      1.11  jmcneill 			val = UREAD1(sc, MUSB2_REG_FSIZE);
    376      1.11  jmcneill 			fiforx_size = (val & MUSB2_MASK_RX_FSIZE) >> 4;
    377      1.11  jmcneill 			fifotx_size = (val & MUSB2_MASK_TX_FSIZE);
    378      1.11  jmcneill 		}
    379       1.1    bouyer 
    380      1.18  pgoyette 		DPRINTF("Endpoint %ju FIFO size: IN=%ju, OUT=%ju, DYN=%jd",
    381      1.14     skrll 		    i, fifotx_size, fiforx_size, dynfifo);
    382       1.1    bouyer 
    383       1.1    bouyer 		if (dynfifo) {
    384      1.12  jmcneill 			if (sc->sc_ep_fifosize) {
    385      1.12  jmcneill 				fifo_size = ffs(sc->sc_ep_fifosize) - 1;
    386       1.1    bouyer 			} else {
    387      1.12  jmcneill 				if (i < 3) {
    388      1.12  jmcneill 					fifo_size = 12;       /* 4K */
    389      1.12  jmcneill 				} else if (i < 10) {
    390      1.12  jmcneill 					fifo_size = 10;       /* 1K */
    391      1.12  jmcneill 				} else {
    392      1.12  jmcneill 					fifo_size = 7;        /* 128 bytes */
    393      1.12  jmcneill 				}
    394       1.7     skrll 			}
    395       1.1    bouyer 			if (fiforx_size && (i <= nrx)) {
    396       1.1    bouyer 				fiforx_size = fifo_size;
    397       1.1    bouyer 				if (fifo_size > 7) {
    398       1.3    bouyer #if 0
    399       1.7     skrll 					UWRITE1(sc, MUSB2_REG_RXFIFOSZ,
    400       1.1    bouyer 					    MUSB2_VAL_FIFOSZ(fifo_size) |
    401       1.1    bouyer 					    MUSB2_MASK_FIFODB);
    402       1.3    bouyer #else
    403       1.7     skrll 					UWRITE1(sc, MUSB2_REG_RXFIFOSZ,
    404       1.3    bouyer 					    MUSB2_VAL_FIFOSZ(fifo_size));
    405       1.3    bouyer #endif
    406       1.1    bouyer 				} else {
    407       1.7     skrll 					UWRITE1(sc, MUSB2_REG_RXFIFOSZ,
    408       1.3    bouyer 					    MUSB2_VAL_FIFOSZ(fifo_size));
    409       1.1    bouyer 				}
    410       1.7     skrll 				UWRITE2(sc, MUSB2_REG_RXFIFOADD,
    411       1.1    bouyer 				    offset >> 3);
    412       1.1    bouyer 				offset += (1 << fiforx_size);
    413       1.1    bouyer 			}
    414       1.1    bouyer 			if (fifotx_size && (i <= ntx)) {
    415       1.1    bouyer 				fifotx_size = fifo_size;
    416       1.1    bouyer 				if (fifo_size > 7) {
    417       1.3    bouyer #if 0
    418       1.7     skrll 					UWRITE1(sc, MUSB2_REG_TXFIFOSZ,
    419       1.7     skrll 					    MUSB2_VAL_FIFOSZ(fifo_size) |
    420       1.1    bouyer 					    MUSB2_MASK_FIFODB);
    421       1.3    bouyer #else
    422       1.7     skrll 					UWRITE1(sc, MUSB2_REG_TXFIFOSZ,
    423       1.7     skrll 					    MUSB2_VAL_FIFOSZ(fifo_size));
    424       1.3    bouyer #endif
    425       1.1    bouyer 				} else {
    426       1.7     skrll 					UWRITE1(sc, MUSB2_REG_TXFIFOSZ,
    427       1.7     skrll 					    MUSB2_VAL_FIFOSZ(fifo_size));
    428       1.7     skrll 				}
    429       1.7     skrll 
    430       1.7     skrll 				UWRITE2(sc, MUSB2_REG_TXFIFOADD,
    431       1.1    bouyer 				    offset >> 3);
    432       1.7     skrll 
    433       1.1    bouyer 				offset += (1 << fifotx_size);
    434       1.1    bouyer 			}
    435       1.1    bouyer 		}
    436       1.1    bouyer 		if (fiforx_size && (i <= nrx)) {
    437       1.1    bouyer 			sc->sc_in_ep[i].ep_fifo_size = (1 << fiforx_size);
    438       1.1    bouyer 			SIMPLEQ_INIT(&sc->sc_in_ep[i].ep_pipes);
    439       1.1    bouyer 		}
    440       1.1    bouyer 		if (fifotx_size && (i <= ntx)) {
    441       1.1    bouyer 			sc->sc_out_ep[i].ep_fifo_size = (1 << fifotx_size);
    442       1.1    bouyer 			SIMPLEQ_INIT(&sc->sc_out_ep[i].ep_pipes);
    443       1.1    bouyer 		}
    444       1.1    bouyer 		sc->sc_out_ep[i].ep_number = sc->sc_in_ep[i].ep_number = i;
    445       1.1    bouyer 	}
    446       1.1    bouyer 
    447       1.7     skrll 
    448      1.18  pgoyette 	DPRINTF("Dynamic FIFO size = %jd bytes", offset, 0, 0, 0);
    449       1.1    bouyer 
    450       1.1    bouyer 	/* turn on default interrupts */
    451       1.1    bouyer 
    452       1.1    bouyer 	if (sc->sc_mode == MOTG_MODE_HOST) {
    453       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_INTUSBE, 0xff);
    454       1.1    bouyer 		UWRITE2(sc, MUSB2_REG_INTTXE, 0xffff);
    455       1.1    bouyer 		UWRITE2(sc, MUSB2_REG_INTRXE, 0xffff);
    456       1.1    bouyer 	} else
    457       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_INTUSBE, MUSB2_MASK_IRESET);
    458       1.1    bouyer 
    459       1.1    bouyer 	sc->sc_xferpool = pool_cache_init(sizeof(struct motg_xfer), 0, 0, 0,
    460       1.1    bouyer 	    "motgxfer", NULL, IPL_USB, NULL, NULL, NULL);
    461       1.1    bouyer 
    462       1.1    bouyer 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    463      1.13     skrll 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
    464       1.1    bouyer 
    465       1.1    bouyer 	/* Set up the bus struct. */
    466      1.14     skrll 	sc->sc_bus.ub_methods = &motg_bus_methods;
    467      1.14     skrll 	sc->sc_bus.ub_pipesize= sizeof(struct motg_pipe);
    468      1.14     skrll 	sc->sc_bus.ub_revision = USBREV_2_0;
    469      1.14     skrll 	sc->sc_bus.ub_usedma = false;
    470      1.14     skrll 	sc->sc_bus.ub_hcpriv = sc;
    471       1.1    bouyer 	sc->sc_child = config_found(sc->sc_dev, &sc->sc_bus, usbctlprint);
    472      1.14     skrll 	return 0;
    473       1.1    bouyer }
    474       1.1    bouyer 
    475       1.1    bouyer static int
    476      1.14     skrll motg_select_ep(struct motg_softc *sc, struct usbd_pipe *pipe)
    477       1.1    bouyer {
    478      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
    479      1.14     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
    480       1.1    bouyer 	struct motg_hw_ep *ep;
    481       1.1    bouyer 	int i, size;
    482       1.1    bouyer 
    483      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    484      1.14     skrll 
    485       1.1    bouyer 	ep = (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) ?
    486       1.1    bouyer 	    sc->sc_in_ep : sc->sc_out_ep;
    487      1.14     skrll 	size = UE_GET_SIZE(UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize));
    488       1.1    bouyer 
    489       1.1    bouyer 	for (i = sc->sc_ep_max; i >= 1; i--) {
    490      1.14     skrll 		DPRINTF(UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ?
    491      1.18  pgoyette 		    "in_ep[%jd].ep_fifo_size %jd size %jd ref %jd" :
    492      1.18  pgoyette 		    "out_ep[%jd].ep_fifo_size %jd size %jd ref %jd", i,
    493      1.14     skrll 		    ep[i].ep_fifo_size, size, ep[i].refcount);
    494       1.1    bouyer 		if (ep[i].ep_fifo_size >= size) {
    495       1.1    bouyer 			/* found a suitable endpoint */
    496       1.1    bouyer 			otgpipe->hw_ep = &ep[i];
    497       1.1    bouyer 			mutex_enter(&sc->sc_lock);
    498       1.1    bouyer 			if (otgpipe->hw_ep->refcount > 0) {
    499       1.1    bouyer 				/* no luck, try next */
    500       1.1    bouyer 				mutex_exit(&sc->sc_lock);
    501       1.1    bouyer 				otgpipe->hw_ep = NULL;
    502       1.1    bouyer 			} else {
    503       1.1    bouyer 				otgpipe->hw_ep->refcount++;
    504       1.1    bouyer 				SIMPLEQ_INSERT_TAIL(&otgpipe->hw_ep->ep_pipes,
    505       1.1    bouyer 				    otgpipe, ep_pipe_list);
    506       1.1    bouyer 				mutex_exit(&sc->sc_lock);
    507       1.1    bouyer 				return 0;
    508       1.1    bouyer 			}
    509       1.1    bouyer 		}
    510       1.1    bouyer 	}
    511       1.1    bouyer 	return -1;
    512       1.1    bouyer }
    513       1.1    bouyer 
    514       1.1    bouyer /* Open a new pipe. */
    515       1.1    bouyer usbd_status
    516      1.14     skrll motg_open(struct usbd_pipe *pipe)
    517       1.1    bouyer {
    518      1.14     skrll 	struct motg_softc *sc = MOTG_PIPE2SC(pipe);
    519      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
    520      1.14     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
    521      1.14     skrll 	uint8_t rhaddr = pipe->up_dev->ud_bus->ub_rhaddr;
    522      1.14     skrll 
    523      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    524      1.14     skrll 
    525      1.18  pgoyette 	DPRINTF("pipe=%#jx, addr=%jd, endpt=%jd (%jd)", (uintptr_t)pipe,
    526      1.14     skrll 	    pipe->up_dev->ud_addr, ed->bEndpointAddress, rhaddr);
    527       1.1    bouyer 
    528       1.1    bouyer 	if (sc->sc_dying)
    529       1.1    bouyer 		return USBD_IOERROR;
    530       1.1    bouyer 
    531       1.1    bouyer 	/* toggle state needed for bulk endpoints */
    532      1.14     skrll 	otgpipe->nexttoggle = pipe->up_endpoint->ue_toggle;
    533       1.1    bouyer 
    534      1.14     skrll 	if (pipe->up_dev->ud_addr == rhaddr) {
    535       1.1    bouyer 		switch (ed->bEndpointAddress) {
    536       1.1    bouyer 		case USB_CONTROL_ENDPOINT:
    537      1.14     skrll 			pipe->up_methods = &roothub_ctrl_methods;
    538       1.1    bouyer 			break;
    539      1.14     skrll 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
    540      1.14     skrll 			pipe->up_methods = &motg_root_intr_methods;
    541       1.1    bouyer 			break;
    542       1.1    bouyer 		default:
    543      1.14     skrll 			return USBD_INVAL;
    544       1.1    bouyer 		}
    545       1.1    bouyer 	} else {
    546       1.1    bouyer 		switch (ed->bmAttributes & UE_XFERTYPE) {
    547       1.1    bouyer 		case UE_CONTROL:
    548      1.14     skrll 			pipe->up_methods = &motg_device_ctrl_methods;
    549       1.1    bouyer 			/* always use sc_in_ep[0] for in and out */
    550       1.1    bouyer 			otgpipe->hw_ep = &sc->sc_in_ep[0];
    551       1.1    bouyer 			mutex_enter(&sc->sc_lock);
    552       1.1    bouyer 			otgpipe->hw_ep->refcount++;
    553       1.1    bouyer 			SIMPLEQ_INSERT_TAIL(&otgpipe->hw_ep->ep_pipes,
    554       1.1    bouyer 			    otgpipe, ep_pipe_list);
    555       1.1    bouyer 			mutex_exit(&sc->sc_lock);
    556       1.1    bouyer 			break;
    557       1.1    bouyer 		case UE_BULK:
    558       1.1    bouyer 		case UE_INTERRUPT:
    559       1.7     skrll 			DPRINTFN(MD_BULK,
    560      1.18  pgoyette 			    "type %jd dir %jd pipe wMaxPacketSize %jd",
    561      1.14     skrll 			    UE_GET_XFERTYPE(ed->bmAttributes),
    562      1.14     skrll 			    UE_GET_DIR(pipe->up_endpoint->ue_edesc->bEndpointAddress),
    563      1.14     skrll 			    UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize), 0);
    564       1.1    bouyer 			if (motg_select_ep(sc, pipe) != 0)
    565       1.1    bouyer 				goto bad;
    566       1.1    bouyer 			KASSERT(otgpipe->hw_ep != NULL);
    567      1.14     skrll 			pipe->up_methods = &motg_device_data_methods;
    568      1.14     skrll 			otgpipe->nexttoggle = pipe->up_endpoint->ue_toggle;
    569       1.1    bouyer 			break;
    570       1.1    bouyer 		default:
    571       1.1    bouyer 			goto bad;
    572       1.1    bouyer #ifdef notyet
    573       1.1    bouyer 		case UE_ISOCHRONOUS:
    574       1.1    bouyer 			...
    575       1.1    bouyer 			break;
    576       1.1    bouyer #endif /* notyet */
    577       1.1    bouyer 		}
    578       1.1    bouyer 	}
    579      1.14     skrll 	return USBD_NORMAL_COMPLETION;
    580       1.1    bouyer 
    581       1.1    bouyer  bad:
    582      1.14     skrll 	return USBD_NOMEM;
    583       1.1    bouyer }
    584       1.1    bouyer 
    585       1.1    bouyer void
    586       1.1    bouyer motg_softintr(void *v)
    587       1.1    bouyer {
    588       1.1    bouyer 	struct usbd_bus *bus = v;
    589      1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    590       1.1    bouyer 	uint16_t rx_status, tx_status;
    591       1.1    bouyer 	uint8_t ctrl_status;
    592       1.1    bouyer 	uint32_t val;
    593       1.1    bouyer 	int i;
    594       1.1    bouyer 
    595      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    596       1.1    bouyer 
    597      1.14     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    598      1.14     skrll 
    599      1.18  pgoyette 	DPRINTFN(MD_ROOT | MD_CTRL, "sc %#jx", (uintptr_t)sc, 0 ,0 ,0);
    600       1.1    bouyer 
    601       1.1    bouyer 	mutex_spin_enter(&sc->sc_intr_lock);
    602       1.1    bouyer 	rx_status = sc->sc_intr_rx_ep;
    603       1.1    bouyer 	sc->sc_intr_rx_ep = 0;
    604       1.1    bouyer 	tx_status = sc->sc_intr_tx_ep;
    605       1.1    bouyer 	sc->sc_intr_tx_ep = 0;
    606       1.1    bouyer 	ctrl_status = sc->sc_intr_ctrl;
    607       1.1    bouyer 	sc->sc_intr_ctrl = 0;
    608       1.1    bouyer 	mutex_spin_exit(&sc->sc_intr_lock);
    609       1.1    bouyer 
    610       1.1    bouyer 	ctrl_status |= UREAD1(sc, MUSB2_REG_INTUSB);
    611       1.1    bouyer 
    612       1.1    bouyer 	if (ctrl_status & (MUSB2_MASK_IRESET |
    613       1.1    bouyer 	    MUSB2_MASK_IRESUME | MUSB2_MASK_ISUSP |
    614       1.1    bouyer 	    MUSB2_MASK_ICONN | MUSB2_MASK_IDISC)) {
    615      1.18  pgoyette 		DPRINTFN(MD_ROOT | MD_CTRL, "bus 0x%jx", ctrl_status, 0, 0, 0);
    616       1.1    bouyer 
    617       1.1    bouyer 		if (ctrl_status & MUSB2_MASK_IRESET) {
    618       1.1    bouyer 			sc->sc_isreset = 1;
    619       1.1    bouyer 			sc->sc_port_suspended = 0;
    620       1.1    bouyer 			sc->sc_port_suspended_change = 1;
    621       1.1    bouyer 			sc->sc_connected_changed = 1;
    622       1.1    bouyer 			sc->sc_port_enabled = 1;
    623       1.1    bouyer 
    624       1.1    bouyer 			val = UREAD1(sc, MUSB2_REG_POWER);
    625       1.1    bouyer 			if (val & MUSB2_MASK_HSMODE)
    626       1.1    bouyer 				sc->sc_high_speed = 1;
    627       1.1    bouyer 			else
    628       1.1    bouyer 				sc->sc_high_speed = 0;
    629      1.18  pgoyette 			DPRINTFN(MD_ROOT | MD_CTRL, "speed %jd", sc->sc_high_speed,
    630      1.14     skrll 			    0, 0, 0);
    631       1.1    bouyer 
    632       1.1    bouyer 			/* turn off interrupts */
    633       1.1    bouyer 			val = MUSB2_MASK_IRESET;
    634       1.1    bouyer 			val &= ~MUSB2_MASK_IRESUME;
    635       1.1    bouyer 			val |= MUSB2_MASK_ISUSP;
    636       1.1    bouyer 			UWRITE1(sc, MUSB2_REG_INTUSBE, val);
    637       1.1    bouyer 			UWRITE2(sc, MUSB2_REG_INTTXE, 0);
    638       1.1    bouyer 			UWRITE2(sc, MUSB2_REG_INTRXE, 0);
    639       1.1    bouyer 		}
    640       1.1    bouyer 		if (ctrl_status & MUSB2_MASK_IRESUME) {
    641       1.1    bouyer 			if (sc->sc_port_suspended) {
    642       1.1    bouyer 				sc->sc_port_suspended = 0;
    643       1.1    bouyer 				sc->sc_port_suspended_change = 1;
    644       1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_INTUSBE);
    645       1.1    bouyer 				/* disable resume interrupt */
    646       1.1    bouyer 				val &= ~MUSB2_MASK_IRESUME;
    647       1.1    bouyer 				/* enable suspend interrupt */
    648       1.1    bouyer 				val |= MUSB2_MASK_ISUSP;
    649       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_INTUSBE, val);
    650       1.1    bouyer 			}
    651       1.1    bouyer 		} else if (ctrl_status & MUSB2_MASK_ISUSP) {
    652       1.1    bouyer 			if (!sc->sc_port_suspended) {
    653       1.1    bouyer 				sc->sc_port_suspended = 1;
    654       1.1    bouyer 				sc->sc_port_suspended_change = 1;
    655       1.1    bouyer 
    656       1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_INTUSBE);
    657       1.1    bouyer 				/* disable suspend interrupt */
    658       1.1    bouyer 				val &= ~MUSB2_MASK_ISUSP;
    659       1.1    bouyer 				/* enable resume interrupt */
    660       1.1    bouyer 				val |= MUSB2_MASK_IRESUME;
    661       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_INTUSBE, val);
    662       1.1    bouyer 			}
    663       1.1    bouyer 		}
    664       1.1    bouyer 		if (ctrl_status & MUSB2_MASK_ICONN) {
    665       1.1    bouyer 			sc->sc_connected = 1;
    666       1.1    bouyer 			sc->sc_connected_changed = 1;
    667       1.1    bouyer 			sc->sc_isreset = 1;
    668       1.1    bouyer 			sc->sc_port_enabled = 1;
    669       1.1    bouyer 		} else if (ctrl_status & MUSB2_MASK_IDISC) {
    670       1.1    bouyer 			sc->sc_connected = 0;
    671       1.1    bouyer 			sc->sc_connected_changed = 1;
    672       1.1    bouyer 			sc->sc_isreset = 0;
    673       1.1    bouyer 			sc->sc_port_enabled = 0;
    674       1.1    bouyer 		}
    675       1.1    bouyer 
    676       1.1    bouyer 		/* complete root HUB interrupt endpoint */
    677       1.1    bouyer 
    678       1.1    bouyer 		motg_hub_change(sc);
    679       1.1    bouyer 	}
    680       1.1    bouyer 	/*
    681       1.1    bouyer 	 * read in interrupt status and mix with the status we
    682       1.1    bouyer 	 * got from the wrapper
    683       1.1    bouyer 	 */
    684       1.1    bouyer 	rx_status |= UREAD2(sc, MUSB2_REG_INTRX);
    685       1.1    bouyer 	tx_status |= UREAD2(sc, MUSB2_REG_INTTX);
    686       1.1    bouyer 
    687      1.14     skrll 	KASSERTMSG((rx_status & 0x01) == 0, "ctrl_rx %08x", rx_status);
    688       1.1    bouyer 	if (tx_status & 0x01)
    689       1.1    bouyer 		motg_device_ctrl_intr_tx(sc);
    690       1.1    bouyer 	for (i = 1; i <= sc->sc_ep_max; i++) {
    691       1.1    bouyer 		if (rx_status & (0x01 << i))
    692       1.1    bouyer 			motg_device_intr_rx(sc, i);
    693       1.1    bouyer 		if (tx_status & (0x01 << i))
    694       1.1    bouyer 			motg_device_intr_tx(sc, i);
    695       1.1    bouyer 	}
    696       1.1    bouyer 	return;
    697       1.1    bouyer }
    698       1.1    bouyer 
    699       1.1    bouyer void
    700       1.1    bouyer motg_poll(struct usbd_bus *bus)
    701       1.1    bouyer {
    702      1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    703       1.1    bouyer 
    704       1.1    bouyer 	sc->sc_intr_poll(sc->sc_intr_poll_arg);
    705       1.1    bouyer 	mutex_enter(&sc->sc_lock);
    706       1.1    bouyer 	motg_softintr(bus);
    707       1.1    bouyer 	mutex_exit(&sc->sc_lock);
    708       1.1    bouyer }
    709       1.1    bouyer 
    710       1.1    bouyer int
    711       1.1    bouyer motg_intr(struct motg_softc *sc, uint16_t rx_ep, uint16_t tx_ep,
    712       1.2    bouyer     uint8_t ctrl)
    713       1.1    bouyer {
    714       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_intr_lock));
    715       1.1    bouyer 	sc->sc_intr_tx_ep = tx_ep;
    716       1.1    bouyer 	sc->sc_intr_rx_ep = rx_ep;
    717       1.1    bouyer 	sc->sc_intr_ctrl = ctrl;
    718       1.1    bouyer 
    719      1.14     skrll 	if (!sc->sc_bus.ub_usepolling) {
    720       1.1    bouyer 		usb_schedsoftintr(&sc->sc_bus);
    721       1.1    bouyer 	}
    722       1.1    bouyer 	return 1;
    723       1.1    bouyer }
    724       1.1    bouyer 
    725       1.2    bouyer int
    726       1.2    bouyer motg_intr_vbus(struct motg_softc *sc, int vbus)
    727       1.2    bouyer {
    728       1.2    bouyer 	uint8_t val;
    729      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    730      1.14     skrll 
    731       1.2    bouyer 	if (sc->sc_mode == MOTG_MODE_HOST && vbus == 0) {
    732      1.14     skrll 		DPRINTF("vbus down, try to re-enable", 0, 0, 0, 0);
    733       1.2    bouyer 		/* try to re-enter session for Host mode */
    734       1.2    bouyer 		val = UREAD1(sc, MUSB2_REG_DEVCTL);
    735       1.2    bouyer 		val |= MUSB2_MASK_SESS;
    736       1.2    bouyer 		UWRITE1(sc, MUSB2_REG_DEVCTL, val);
    737       1.2    bouyer 	}
    738       1.2    bouyer 	return 1;
    739       1.2    bouyer }
    740       1.2    bouyer 
    741      1.14     skrll struct usbd_xfer *
    742      1.14     skrll motg_allocx(struct usbd_bus *bus, unsigned int nframes)
    743       1.1    bouyer {
    744      1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    745      1.14     skrll 	struct usbd_xfer *xfer;
    746       1.1    bouyer 
    747      1.19     skrll 	xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK);
    748       1.1    bouyer 	if (xfer != NULL) {
    749       1.1    bouyer 		memset(xfer, 0, sizeof(struct motg_xfer));
    750       1.1    bouyer #ifdef DIAGNOSTIC
    751      1.14     skrll 		xfer->ux_state = XFER_BUSY;
    752       1.1    bouyer #endif
    753       1.1    bouyer 	}
    754      1.14     skrll 	return xfer;
    755       1.1    bouyer }
    756       1.1    bouyer 
    757       1.1    bouyer void
    758      1.14     skrll motg_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
    759       1.1    bouyer {
    760      1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    761       1.1    bouyer 
    762       1.1    bouyer #ifdef DIAGNOSTIC
    763      1.14     skrll 	if (xfer->ux_state != XFER_BUSY) {
    764       1.1    bouyer 		printf("motg_freex: xfer=%p not busy, 0x%08x\n", xfer,
    765      1.14     skrll 		       xfer->ux_state);
    766       1.1    bouyer 	}
    767      1.14     skrll 	xfer->ux_state = XFER_FREE;
    768       1.1    bouyer #endif
    769       1.1    bouyer 	pool_cache_put(sc->sc_xferpool, xfer);
    770       1.1    bouyer }
    771       1.1    bouyer 
    772       1.1    bouyer static void
    773       1.1    bouyer motg_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    774       1.1    bouyer {
    775      1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    776       1.1    bouyer 
    777       1.1    bouyer 	*lock = &sc->sc_lock;
    778       1.1    bouyer }
    779       1.1    bouyer 
    780       1.1    bouyer /*
    781      1.14     skrll  * Routines to emulate the root hub.
    782       1.1    bouyer  */
    783      1.14     skrll Static int
    784      1.14     skrll motg_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
    785      1.14     skrll     void *buf, int buflen)
    786      1.14     skrll {
    787      1.14     skrll 	struct motg_softc *sc = MOTG_BUS2SC(bus);
    788      1.14     skrll 	int status, change, totlen = 0;
    789      1.14     skrll 	uint16_t len, value, index;
    790       1.1    bouyer 	usb_port_status_t ps;
    791       1.1    bouyer 	usbd_status err;
    792       1.1    bouyer 	uint32_t val;
    793       1.1    bouyer 
    794      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
    795      1.14     skrll 
    796       1.1    bouyer 	if (sc->sc_dying)
    797      1.14     skrll 		return -1;
    798       1.1    bouyer 
    799      1.18  pgoyette 	DPRINTFN(MD_ROOT, "type=0x%02jx request=%02jx", req->bmRequestType,
    800      1.14     skrll 	    req->bRequest, 0, 0);
    801       1.1    bouyer 
    802       1.1    bouyer 	len = UGETW(req->wLength);
    803       1.1    bouyer 	value = UGETW(req->wValue);
    804       1.1    bouyer 	index = UGETW(req->wIndex);
    805       1.1    bouyer 
    806       1.1    bouyer #define C(x,y) ((x) | ((y) << 8))
    807      1.14     skrll 	switch (C(req->bRequest, req->bmRequestType)) {
    808      1.14     skrll 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
    809      1.18  pgoyette 		DPRINTFN(MD_ROOT, "wValue=0x%04jx", value, 0, 0, 0);
    810      1.14     skrll 		switch (value) {
    811      1.14     skrll #define sd ((usb_string_descriptor_t *)buf)
    812      1.14     skrll 		case C(2, UDESC_STRING):
    813      1.14     skrll 			/* Product */
    814      1.14     skrll 			totlen = usb_makestrdesc(sd, len, "MOTG root hub");
    815       1.1    bouyer 			break;
    816       1.1    bouyer #undef sd
    817       1.1    bouyer 		default:
    818      1.14     skrll 			/* default from usbroothub */
    819      1.14     skrll 			return buflen;
    820       1.1    bouyer 		}
    821       1.1    bouyer 		break;
    822       1.1    bouyer 	/* Hub requests */
    823       1.1    bouyer 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
    824       1.1    bouyer 		break;
    825       1.1    bouyer 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
    826       1.1    bouyer 		DPRINTFN(MD_ROOT,
    827      1.18  pgoyette 		    "UR_CLEAR_PORT_FEATURE port=%jd feature=%jd", index, value,
    828      1.14     skrll 		    0, 0);
    829       1.1    bouyer 		if (index != 1) {
    830      1.14     skrll 			return -1;
    831       1.1    bouyer 		}
    832      1.14     skrll 		switch (value) {
    833       1.1    bouyer 		case UHF_PORT_ENABLE:
    834       1.1    bouyer 			sc->sc_port_enabled = 0;
    835       1.1    bouyer 			break;
    836       1.1    bouyer 		case UHF_PORT_SUSPEND:
    837       1.1    bouyer 			if (sc->sc_port_suspended != 0) {
    838       1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_POWER);
    839       1.1    bouyer 				val &= ~MUSB2_MASK_SUSPMODE;
    840       1.1    bouyer 				val |= MUSB2_MASK_RESUME;
    841       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_POWER, val);
    842       1.1    bouyer 				/* wait 20 milliseconds */
    843       1.1    bouyer 				usb_delay_ms(&sc->sc_bus, 20);
    844       1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_POWER);
    845       1.1    bouyer 				val &= ~MUSB2_MASK_RESUME;
    846       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_POWER, val);
    847       1.1    bouyer 				sc->sc_port_suspended = 0;
    848       1.1    bouyer 				sc->sc_port_suspended_change = 1;
    849       1.1    bouyer 			}
    850       1.1    bouyer 			break;
    851       1.1    bouyer 		case UHF_PORT_RESET:
    852       1.1    bouyer 			break;
    853       1.1    bouyer 		case UHF_C_PORT_CONNECTION:
    854       1.1    bouyer 			break;
    855       1.1    bouyer 		case UHF_C_PORT_ENABLE:
    856       1.1    bouyer 			break;
    857       1.1    bouyer 		case UHF_C_PORT_OVER_CURRENT:
    858       1.1    bouyer 			break;
    859       1.1    bouyer 		case UHF_C_PORT_RESET:
    860       1.1    bouyer 			sc->sc_isreset = 0;
    861      1.14     skrll 			break;
    862       1.1    bouyer 		case UHF_PORT_POWER:
    863       1.1    bouyer 			/* XXX todo */
    864       1.1    bouyer 			break;
    865       1.1    bouyer 		case UHF_PORT_CONNECTION:
    866       1.1    bouyer 		case UHF_PORT_OVER_CURRENT:
    867       1.1    bouyer 		case UHF_PORT_LOW_SPEED:
    868       1.1    bouyer 		case UHF_C_PORT_SUSPEND:
    869       1.1    bouyer 		default:
    870      1.14     skrll 			return -1;
    871       1.1    bouyer 		}
    872       1.1    bouyer 		break;
    873       1.1    bouyer 	case C(UR_GET_BUS_STATE, UT_READ_CLASS_OTHER):
    874      1.14     skrll 		return -1;
    875       1.1    bouyer 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
    876       1.1    bouyer 		if (len == 0)
    877       1.1    bouyer 			break;
    878       1.1    bouyer 		if ((value & 0xff) != 0) {
    879      1.14     skrll 			return -1;
    880       1.1    bouyer 		}
    881      1.14     skrll 		totlen = buflen;
    882       1.1    bouyer 		break;
    883       1.1    bouyer 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
    884       1.1    bouyer 		if (len != 4) {
    885      1.14     skrll 			return -1;
    886       1.1    bouyer 		}
    887       1.1    bouyer 		memset(buf, 0, len);
    888       1.1    bouyer 		totlen = len;
    889       1.1    bouyer 		break;
    890       1.1    bouyer 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
    891       1.1    bouyer 		if (index != 1) {
    892      1.14     skrll 			return -1;
    893       1.1    bouyer 		}
    894       1.1    bouyer 		if (len != 4) {
    895      1.14     skrll 			return -1;
    896       1.1    bouyer 		}
    897       1.1    bouyer 		status = change = 0;
    898       1.1    bouyer 		if (sc->sc_connected)
    899       1.1    bouyer 			status |= UPS_CURRENT_CONNECT_STATUS;
    900       1.1    bouyer 		if (sc->sc_connected_changed) {
    901       1.1    bouyer 			change |= UPS_C_CONNECT_STATUS;
    902       1.1    bouyer 			sc->sc_connected_changed = 0;
    903       1.1    bouyer 		}
    904       1.1    bouyer 		if (sc->sc_port_enabled)
    905       1.1    bouyer 			status |= UPS_PORT_ENABLED;
    906       1.1    bouyer 		if (sc->sc_port_enabled_changed) {
    907       1.1    bouyer 			change |= UPS_C_PORT_ENABLED;
    908       1.1    bouyer 			sc->sc_port_enabled_changed = 0;
    909       1.1    bouyer 		}
    910       1.1    bouyer 		if (sc->sc_port_suspended)
    911       1.1    bouyer 			status |= UPS_SUSPEND;
    912       1.1    bouyer 		if (sc->sc_high_speed)
    913       1.1    bouyer 			status |= UPS_HIGH_SPEED;
    914       1.1    bouyer 		status |= UPS_PORT_POWER; /* XXX */
    915       1.1    bouyer 		if (sc->sc_isreset)
    916       1.1    bouyer 			change |= UPS_C_PORT_RESET;
    917       1.1    bouyer 		USETW(ps.wPortStatus, status);
    918       1.1    bouyer 		USETW(ps.wPortChange, change);
    919      1.14     skrll 		totlen = min(len, sizeof(ps));
    920      1.14     skrll 		memcpy(buf, &ps, totlen);
    921       1.1    bouyer 		break;
    922       1.1    bouyer 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
    923      1.14     skrll 		return -1;
    924       1.1    bouyer 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
    925       1.1    bouyer 		break;
    926       1.1    bouyer 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
    927       1.1    bouyer 		if (index != 1) {
    928      1.14     skrll 			return -1;
    929       1.1    bouyer 		}
    930       1.1    bouyer 		switch(value) {
    931       1.1    bouyer 		case UHF_PORT_ENABLE:
    932       1.1    bouyer 			sc->sc_port_enabled = 1;
    933       1.1    bouyer 			break;
    934       1.1    bouyer 		case UHF_PORT_SUSPEND:
    935       1.1    bouyer 			if (sc->sc_port_suspended == 0) {
    936       1.1    bouyer 				val = UREAD1(sc, MUSB2_REG_POWER);
    937       1.1    bouyer 				val |= MUSB2_MASK_SUSPMODE;
    938       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_POWER, val);
    939       1.1    bouyer 				/* wait 20 milliseconds */
    940       1.1    bouyer 				usb_delay_ms(&sc->sc_bus, 20);
    941       1.1    bouyer 				sc->sc_port_suspended = 1;
    942       1.1    bouyer 				sc->sc_port_suspended_change = 1;
    943       1.1    bouyer 			}
    944       1.1    bouyer 			break;
    945       1.1    bouyer 		case UHF_PORT_RESET:
    946       1.1    bouyer 			err = motg_portreset(sc);
    947      1.14     skrll 			if (err != USBD_NORMAL_COMPLETION)
    948      1.14     skrll 				return -1;
    949      1.14     skrll 			return 0;
    950       1.1    bouyer 		case UHF_PORT_POWER:
    951       1.1    bouyer 			/* XXX todo */
    952      1.14     skrll 			return 0;
    953       1.1    bouyer 		case UHF_C_PORT_CONNECTION:
    954       1.1    bouyer 		case UHF_C_PORT_ENABLE:
    955       1.1    bouyer 		case UHF_C_PORT_OVER_CURRENT:
    956       1.1    bouyer 		case UHF_PORT_CONNECTION:
    957       1.1    bouyer 		case UHF_PORT_OVER_CURRENT:
    958       1.1    bouyer 		case UHF_PORT_LOW_SPEED:
    959       1.1    bouyer 		case UHF_C_PORT_SUSPEND:
    960       1.1    bouyer 		case UHF_C_PORT_RESET:
    961       1.1    bouyer 		default:
    962      1.14     skrll 			return -1;
    963       1.1    bouyer 		}
    964       1.1    bouyer 		break;
    965       1.1    bouyer 	default:
    966      1.14     skrll 		/* default from usbroothub */
    967      1.14     skrll 		return buflen;
    968       1.1    bouyer 	}
    969       1.1    bouyer 
    970      1.14     skrll 	return totlen;
    971       1.1    bouyer }
    972       1.1    bouyer 
    973       1.1    bouyer /* Abort a root interrupt request. */
    974       1.1    bouyer void
    975      1.14     skrll motg_root_intr_abort(struct usbd_xfer *xfer)
    976       1.1    bouyer {
    977      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
    978       1.1    bouyer 
    979       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
    980      1.14     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
    981       1.1    bouyer 
    982       1.1    bouyer 	sc->sc_intr_xfer = NULL;
    983       1.1    bouyer 
    984      1.14     skrll 	xfer->ux_status = USBD_CANCELLED;
    985       1.1    bouyer 	usb_transfer_complete(xfer);
    986       1.1    bouyer }
    987       1.1    bouyer 
    988       1.1    bouyer usbd_status
    989      1.14     skrll motg_root_intr_transfer(struct usbd_xfer *xfer)
    990       1.1    bouyer {
    991      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
    992       1.1    bouyer 	usbd_status err;
    993       1.1    bouyer 
    994       1.1    bouyer 	/* Insert last in queue. */
    995       1.1    bouyer 	mutex_enter(&sc->sc_lock);
    996       1.1    bouyer 	err = usb_insert_transfer(xfer);
    997       1.1    bouyer 	mutex_exit(&sc->sc_lock);
    998       1.1    bouyer 	if (err)
    999      1.14     skrll 		return err;
   1000       1.1    bouyer 
   1001       1.1    bouyer 	/*
   1002       1.1    bouyer 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1003       1.1    bouyer 	 * start first
   1004       1.1    bouyer 	 */
   1005      1.14     skrll 	return motg_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   1006       1.1    bouyer }
   1007       1.1    bouyer 
   1008       1.1    bouyer /* Start a transfer on the root interrupt pipe */
   1009       1.1    bouyer usbd_status
   1010      1.14     skrll motg_root_intr_start(struct usbd_xfer *xfer)
   1011       1.1    bouyer {
   1012      1.14     skrll 	struct usbd_pipe *pipe = xfer->ux_pipe;
   1013      1.14     skrll 	struct motg_softc *sc = MOTG_PIPE2SC(pipe);
   1014      1.14     skrll 
   1015      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1016       1.1    bouyer 
   1017      1.18  pgoyette 	DPRINTFN(MD_ROOT, "xfer=%#jx len=%jd flags=%jd", (uintptr_t)xfer,
   1018      1.18  pgoyette 	    xfer->ux_length, xfer->ux_flags, 0);
   1019       1.1    bouyer 
   1020       1.1    bouyer 	if (sc->sc_dying)
   1021      1.14     skrll 		return USBD_IOERROR;
   1022       1.1    bouyer 
   1023       1.1    bouyer 	sc->sc_intr_xfer = xfer;
   1024      1.14     skrll 	return USBD_IN_PROGRESS;
   1025       1.1    bouyer }
   1026       1.1    bouyer 
   1027       1.1    bouyer /* Close the root interrupt pipe. */
   1028       1.1    bouyer void
   1029      1.14     skrll motg_root_intr_close(struct usbd_pipe *pipe)
   1030       1.1    bouyer {
   1031      1.14     skrll 	struct motg_softc *sc = MOTG_PIPE2SC(pipe);
   1032      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1033       1.1    bouyer 
   1034       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1035       1.1    bouyer 
   1036       1.1    bouyer 	sc->sc_intr_xfer = NULL;
   1037       1.1    bouyer }
   1038       1.1    bouyer 
   1039       1.1    bouyer void
   1040      1.14     skrll motg_root_intr_done(struct usbd_xfer *xfer)
   1041       1.1    bouyer {
   1042       1.1    bouyer }
   1043       1.1    bouyer 
   1044       1.1    bouyer void
   1045      1.14     skrll motg_noop(struct usbd_pipe *pipe)
   1046       1.1    bouyer {
   1047       1.1    bouyer }
   1048       1.1    bouyer 
   1049       1.1    bouyer static usbd_status
   1050       1.1    bouyer motg_portreset(struct motg_softc *sc)
   1051       1.1    bouyer {
   1052       1.1    bouyer 	uint32_t val;
   1053      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1054       1.1    bouyer 
   1055       1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_POWER);
   1056       1.1    bouyer 	val |= MUSB2_MASK_RESET;
   1057       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_POWER, val);
   1058       1.1    bouyer 	/* Wait for 20 msec */
   1059       1.1    bouyer 	usb_delay_ms(&sc->sc_bus, 20);
   1060       1.1    bouyer 
   1061       1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_POWER);
   1062       1.1    bouyer 	val &= ~MUSB2_MASK_RESET;
   1063       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_POWER, val);
   1064       1.1    bouyer 
   1065       1.1    bouyer 	/* determine line speed */
   1066       1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_POWER);
   1067       1.1    bouyer 	if (val & MUSB2_MASK_HSMODE)
   1068       1.1    bouyer 		sc->sc_high_speed = 1;
   1069       1.1    bouyer 	else
   1070       1.1    bouyer 		sc->sc_high_speed = 0;
   1071      1.18  pgoyette 	DPRINTFN(MD_ROOT | MD_CTRL, "speed %jd", sc->sc_high_speed, 0, 0, 0);
   1072       1.1    bouyer 
   1073       1.1    bouyer 	sc->sc_isreset = 1;
   1074       1.1    bouyer 	sc->sc_port_enabled = 1;
   1075      1.14     skrll 	return USBD_NORMAL_COMPLETION;
   1076       1.1    bouyer }
   1077       1.1    bouyer 
   1078       1.1    bouyer /*
   1079       1.1    bouyer  * This routine is executed when an interrupt on the root hub is detected
   1080       1.1    bouyer  */
   1081       1.1    bouyer static void
   1082       1.1    bouyer motg_hub_change(struct motg_softc *sc)
   1083       1.1    bouyer {
   1084      1.14     skrll 	struct usbd_xfer *xfer = sc->sc_intr_xfer;
   1085      1.14     skrll 	struct usbd_pipe *pipe;
   1086       1.1    bouyer 	u_char *p;
   1087       1.1    bouyer 
   1088      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1089       1.1    bouyer 
   1090       1.1    bouyer 	if (xfer == NULL)
   1091       1.1    bouyer 		return; /* the interrupt pipe is not open */
   1092       1.1    bouyer 
   1093      1.14     skrll 	pipe = xfer->ux_pipe;
   1094      1.14     skrll 	if (pipe->up_dev == NULL || pipe->up_dev->ud_bus == NULL)
   1095       1.1    bouyer 		return;	/* device has detached */
   1096       1.1    bouyer 
   1097      1.14     skrll 	p = xfer->ux_buf;
   1098       1.1    bouyer 	p[0] = 1<<1;
   1099      1.14     skrll 	xfer->ux_actlen = 1;
   1100      1.14     skrll 	xfer->ux_status = USBD_NORMAL_COMPLETION;
   1101       1.1    bouyer 	usb_transfer_complete(xfer);
   1102       1.1    bouyer }
   1103       1.1    bouyer 
   1104       1.1    bouyer static uint8_t
   1105      1.14     skrll motg_speed(uint8_t speed)
   1106       1.1    bouyer {
   1107       1.1    bouyer 	switch(speed) {
   1108       1.1    bouyer 	case USB_SPEED_LOW:
   1109       1.1    bouyer 		return MUSB2_MASK_TI_SPEED_LO;
   1110       1.1    bouyer 	case USB_SPEED_FULL:
   1111       1.1    bouyer 		return MUSB2_MASK_TI_SPEED_FS;
   1112       1.1    bouyer 	case USB_SPEED_HIGH:
   1113       1.1    bouyer 		return MUSB2_MASK_TI_SPEED_HS;
   1114       1.1    bouyer 	default:
   1115       1.1    bouyer 		panic("motg: unknown speed %d", speed);
   1116       1.1    bouyer 		/* NOTREACHED */
   1117       1.1    bouyer 	}
   1118       1.1    bouyer }
   1119       1.1    bouyer 
   1120       1.1    bouyer static uint8_t
   1121      1.14     skrll motg_type(uint8_t type)
   1122       1.1    bouyer {
   1123       1.1    bouyer 	switch(type) {
   1124       1.1    bouyer 	case UE_CONTROL:
   1125       1.1    bouyer 		return MUSB2_MASK_TI_PROTO_CTRL;
   1126       1.1    bouyer 	case UE_ISOCHRONOUS:
   1127       1.1    bouyer 		return MUSB2_MASK_TI_PROTO_ISOC;
   1128       1.1    bouyer 	case UE_BULK:
   1129       1.1    bouyer 		return MUSB2_MASK_TI_PROTO_BULK;
   1130       1.1    bouyer 	case UE_INTERRUPT:
   1131       1.1    bouyer 		return MUSB2_MASK_TI_PROTO_INTR;
   1132       1.1    bouyer 	default:
   1133       1.1    bouyer 		panic("motg: unknown type %d", type);
   1134       1.1    bouyer 		/* NOTREACHED */
   1135       1.1    bouyer 	}
   1136       1.1    bouyer }
   1137       1.1    bouyer 
   1138       1.1    bouyer static void
   1139      1.14     skrll motg_setup_endpoint_tx(struct usbd_xfer *xfer)
   1140       1.1    bouyer {
   1141      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1142      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1143      1.14     skrll 	struct usbd_device *dev = otgpipe->pipe.up_dev;
   1144       1.1    bouyer 	int epnumber = otgpipe->hw_ep->ep_number;
   1145       1.1    bouyer 
   1146      1.14     skrll 	UWRITE1(sc, MUSB2_REG_TXFADDR(epnumber), dev->ud_addr);
   1147      1.14     skrll 	if (dev->ud_myhsport) {
   1148       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXHADDR(epnumber),
   1149      1.14     skrll 		    dev->ud_myhsport->up_parent->ud_addr);
   1150       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXHUBPORT(epnumber),
   1151      1.14     skrll 		    dev->ud_myhsport->up_portno);
   1152       1.1    bouyer 	} else {
   1153       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXHADDR(epnumber), 0);
   1154       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXHUBPORT(epnumber), 0);
   1155       1.1    bouyer 	}
   1156       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXTI,
   1157      1.14     skrll 	    motg_speed(dev->ud_speed) |
   1158      1.14     skrll 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) |
   1159      1.14     skrll 	    motg_type(UE_GET_XFERTYPE(xfer->ux_pipe->up_endpoint->ue_edesc->bmAttributes))
   1160       1.1    bouyer 	    );
   1161       1.1    bouyer 	if (epnumber == 0) {
   1162       1.1    bouyer 		if (sc->sc_high_speed) {
   1163       1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXNAKLIMIT,
   1164       1.1    bouyer 			    NAK_TO_CTRL_HIGH);
   1165       1.1    bouyer 		} else {
   1166       1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, NAK_TO_CTRL);
   1167       1.1    bouyer 		}
   1168       1.1    bouyer 	} else {
   1169      1.14     skrll 		if ((xfer->ux_pipe->up_endpoint->ue_edesc->bmAttributes & UE_XFERTYPE)
   1170       1.1    bouyer 		    == UE_BULK) {
   1171       1.1    bouyer 			if (sc->sc_high_speed) {
   1172       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT,
   1173       1.1    bouyer 				    NAK_TO_BULK_HIGH);
   1174       1.1    bouyer 			} else {
   1175       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, NAK_TO_BULK);
   1176       1.1    bouyer 			}
   1177       1.1    bouyer 		} else {
   1178       1.1    bouyer 			if (sc->sc_high_speed) {
   1179       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, POLL_TO_HIGH);
   1180       1.1    bouyer 			} else {
   1181       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_TXNAKLIMIT, POLL_TO);
   1182       1.1    bouyer 			}
   1183       1.1    bouyer 		}
   1184       1.1    bouyer 	}
   1185       1.1    bouyer }
   1186       1.1    bouyer 
   1187       1.1    bouyer static void
   1188      1.14     skrll motg_setup_endpoint_rx(struct usbd_xfer *xfer)
   1189       1.1    bouyer {
   1190      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1191      1.14     skrll 	struct usbd_device *dev = xfer->ux_pipe->up_dev;
   1192      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1193       1.1    bouyer 	int epnumber = otgpipe->hw_ep->ep_number;
   1194       1.1    bouyer 
   1195      1.14     skrll 	UWRITE1(sc, MUSB2_REG_RXFADDR(epnumber), dev->ud_addr);
   1196      1.14     skrll 	if (dev->ud_myhsport) {
   1197       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXHADDR(epnumber),
   1198      1.14     skrll 		    dev->ud_myhsport->up_parent->ud_addr);
   1199       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXHUBPORT(epnumber),
   1200      1.14     skrll 		    dev->ud_myhsport->up_portno);
   1201       1.1    bouyer 	} else {
   1202       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXHADDR(epnumber), 0);
   1203       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXHUBPORT(epnumber), 0);
   1204       1.1    bouyer 	}
   1205       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_RXTI,
   1206      1.14     skrll 	    motg_speed(dev->ud_speed) |
   1207      1.14     skrll 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) |
   1208      1.14     skrll 	    motg_type(UE_GET_XFERTYPE(xfer->ux_pipe->up_endpoint->ue_edesc->bmAttributes))
   1209       1.1    bouyer 	    );
   1210       1.1    bouyer 	if (epnumber == 0) {
   1211       1.1    bouyer 		if (sc->sc_high_speed) {
   1212      1.17  jakllsch 			UWRITE1(sc, MUSB2_REG_RXNAKLIMIT,
   1213       1.1    bouyer 			    NAK_TO_CTRL_HIGH);
   1214       1.1    bouyer 		} else {
   1215      1.17  jakllsch 			UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, NAK_TO_CTRL);
   1216       1.1    bouyer 		}
   1217       1.1    bouyer 	} else {
   1218      1.14     skrll 		if ((xfer->ux_pipe->up_endpoint->ue_edesc->bmAttributes & UE_XFERTYPE)
   1219       1.1    bouyer 		    == UE_BULK) {
   1220       1.1    bouyer 			if (sc->sc_high_speed) {
   1221       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT,
   1222       1.1    bouyer 				    NAK_TO_BULK_HIGH);
   1223       1.1    bouyer 			} else {
   1224       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, NAK_TO_BULK);
   1225       1.1    bouyer 			}
   1226       1.1    bouyer 		} else {
   1227       1.1    bouyer 			if (sc->sc_high_speed) {
   1228       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, POLL_TO_HIGH);
   1229       1.1    bouyer 			} else {
   1230       1.1    bouyer 				UWRITE1(sc, MUSB2_REG_RXNAKLIMIT, POLL_TO);
   1231       1.1    bouyer 			}
   1232       1.1    bouyer 		}
   1233       1.1    bouyer 	}
   1234       1.1    bouyer }
   1235       1.1    bouyer 
   1236       1.1    bouyer static usbd_status
   1237      1.14     skrll motg_device_ctrl_transfer(struct usbd_xfer *xfer)
   1238       1.1    bouyer {
   1239      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1240       1.1    bouyer 	usbd_status err;
   1241       1.1    bouyer 
   1242       1.1    bouyer 	/* Insert last in queue. */
   1243       1.1    bouyer 	mutex_enter(&sc->sc_lock);
   1244       1.1    bouyer 	err = usb_insert_transfer(xfer);
   1245      1.14     skrll 	xfer->ux_status = USBD_NOT_STARTED;
   1246       1.1    bouyer 	mutex_exit(&sc->sc_lock);
   1247       1.1    bouyer 	if (err)
   1248      1.14     skrll 		return err;
   1249       1.1    bouyer 
   1250       1.1    bouyer 	/*
   1251       1.1    bouyer 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1252       1.1    bouyer 	 * so start it first.
   1253       1.1    bouyer 	 */
   1254      1.14     skrll 	return motg_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   1255       1.1    bouyer }
   1256       1.1    bouyer 
   1257       1.1    bouyer static usbd_status
   1258      1.14     skrll motg_device_ctrl_start(struct usbd_xfer *xfer)
   1259       1.1    bouyer {
   1260      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1261       1.1    bouyer 	usbd_status err;
   1262       1.1    bouyer 	mutex_enter(&sc->sc_lock);
   1263       1.1    bouyer 	err = motg_device_ctrl_start1(sc);
   1264       1.1    bouyer 	mutex_exit(&sc->sc_lock);
   1265       1.1    bouyer 	if (err != USBD_IN_PROGRESS)
   1266       1.1    bouyer 		return err;
   1267       1.1    bouyer 	return USBD_IN_PROGRESS;
   1268       1.1    bouyer }
   1269       1.1    bouyer 
   1270       1.1    bouyer static usbd_status
   1271       1.1    bouyer motg_device_ctrl_start1(struct motg_softc *sc)
   1272       1.1    bouyer {
   1273       1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_in_ep[0];
   1274      1.14     skrll 	struct usbd_xfer *xfer = NULL;
   1275       1.1    bouyer 	struct motg_pipe *otgpipe;
   1276       1.1    bouyer 	usbd_status err = 0;
   1277       1.1    bouyer 
   1278      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1279      1.14     skrll 
   1280       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1281       1.1    bouyer 	if (sc->sc_dying)
   1282      1.14     skrll 		return USBD_IOERROR;
   1283       1.1    bouyer 
   1284       1.1    bouyer 	if (!sc->sc_connected)
   1285      1.14     skrll 		return USBD_IOERROR;
   1286       1.1    bouyer 
   1287       1.1    bouyer 	if (ep->xfer != NULL) {
   1288       1.1    bouyer 		err = USBD_IN_PROGRESS;
   1289       1.1    bouyer 		goto end;
   1290       1.1    bouyer 	}
   1291       1.1    bouyer 	/* locate the first pipe with work to do */
   1292       1.1    bouyer 	SIMPLEQ_FOREACH(otgpipe, &ep->ep_pipes, ep_pipe_list) {
   1293      1.14     skrll 		xfer = SIMPLEQ_FIRST(&otgpipe->pipe.up_queue);
   1294      1.18  pgoyette 		DPRINTFN(MD_CTRL, "pipe %#jx xfer %#jx status %jd",
   1295      1.18  pgoyette 		    (uintptr_t)otgpipe, (uintptr_t)xfer,
   1296      1.18  pgoyette 		    (xfer != NULL) ? xfer->ux_status : 0, 0);
   1297       1.7     skrll 
   1298       1.1    bouyer 		if (xfer != NULL) {
   1299       1.1    bouyer 			/* move this pipe to the end of the list */
   1300       1.1    bouyer 			SIMPLEQ_REMOVE(&ep->ep_pipes, otgpipe,
   1301       1.1    bouyer 			    motg_pipe, ep_pipe_list);
   1302       1.1    bouyer 			SIMPLEQ_INSERT_TAIL(&ep->ep_pipes,
   1303       1.1    bouyer 			    otgpipe, ep_pipe_list);
   1304       1.1    bouyer 			break;
   1305       1.1    bouyer 		}
   1306       1.1    bouyer 	}
   1307       1.1    bouyer 	if (xfer == NULL) {
   1308       1.1    bouyer 		err = USBD_NOT_STARTED;
   1309       1.1    bouyer 		goto end;
   1310       1.1    bouyer 	}
   1311      1.14     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   1312      1.14     skrll 	KASSERT(otgpipe == MOTG_PIPE2MPIPE(xfer->ux_pipe));
   1313       1.1    bouyer 	KASSERT(otgpipe->hw_ep == ep);
   1314      1.14     skrll 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   1315      1.14     skrll 	// KASSERT(xfer->ux_actlen == 0);
   1316      1.14     skrll 	xfer->ux_actlen = 0;
   1317       1.1    bouyer 
   1318       1.1    bouyer 	ep->xfer = xfer;
   1319      1.14     skrll 	ep->datalen = xfer->ux_length;
   1320       1.1    bouyer 	if (ep->datalen > 0)
   1321      1.14     skrll 		ep->data = xfer->ux_buf;
   1322       1.1    bouyer 	else
   1323       1.1    bouyer 		ep->data = NULL;
   1324      1.14     skrll 	if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) &&
   1325       1.1    bouyer 	    (ep->datalen % 64) == 0)
   1326       1.1    bouyer 		ep->need_short_xfer = 1;
   1327       1.1    bouyer 	else
   1328       1.1    bouyer 		ep->need_short_xfer = 0;
   1329       1.1    bouyer 	/* now we need send this request */
   1330       1.7     skrll 	DPRINTFN(MD_CTRL,
   1331      1.18  pgoyette 	    "xfer %#jx send data %#jx len %jd short %jd",
   1332      1.18  pgoyette 	    (uintptr_t)xfer, (uintptr_t)ep->data, ep->datalen,
   1333      1.18  pgoyette 	    ep->need_short_xfer);
   1334      1.14     skrll 	DPRINTFN(MD_CTRL,
   1335      1.18  pgoyette 	    "xfer %#jx ... speed %jd to %jd", (uintptr_t)xfer,
   1336      1.18  pgoyette 	    xfer->ux_pipe->up_dev->ud_speed,
   1337      1.18  pgoyette 	    xfer->ux_pipe->up_dev->ud_addr, 0);
   1338       1.1    bouyer 	KASSERT(ep->phase == IDLE);
   1339       1.1    bouyer 	ep->phase = SETUP;
   1340       1.1    bouyer 	/* select endpoint 0 */
   1341       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
   1342       1.1    bouyer 	/* fifo should be empty at this point */
   1343       1.1    bouyer 	KASSERT((UREAD1(sc, MUSB2_REG_TXCSRL) & MUSB2_MASK_CSR0L_TXPKTRDY) == 0);
   1344       1.1    bouyer 	/* send data */
   1345      1.14     skrll 	// KASSERT(((vaddr_t)(&xfer->ux_request) & 3) == 0);
   1346      1.14     skrll 	KASSERT(sizeof(xfer->ux_request) == 8);
   1347       1.1    bouyer 	bus_space_write_multi_1(sc->sc_iot, sc->sc_ioh, MUSB2_REG_EPFIFO(0),
   1348      1.14     skrll 	    (void *)&xfer->ux_request, sizeof(xfer->ux_request));
   1349       1.1    bouyer 
   1350       1.1    bouyer 	motg_setup_endpoint_tx(xfer);
   1351       1.1    bouyer 	/* start transaction */
   1352       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL,
   1353       1.1    bouyer 	    MUSB2_MASK_CSR0L_TXPKTRDY | MUSB2_MASK_CSR0L_SETUPPKT);
   1354       1.1    bouyer 
   1355       1.1    bouyer end:
   1356       1.1    bouyer 	if (err)
   1357      1.14     skrll 		return err;
   1358       1.1    bouyer 
   1359      1.14     skrll 	return USBD_IN_PROGRESS;
   1360       1.1    bouyer }
   1361       1.1    bouyer 
   1362       1.1    bouyer static void
   1363      1.14     skrll motg_device_ctrl_read(struct usbd_xfer *xfer)
   1364       1.1    bouyer {
   1365      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1366      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1367       1.1    bouyer 	/* assume endpoint already selected */
   1368       1.1    bouyer 	motg_setup_endpoint_rx(xfer);
   1369       1.1    bouyer 	/* start transaction */
   1370       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL, MUSB2_MASK_CSR0L_REQPKT);
   1371       1.1    bouyer 	otgpipe->hw_ep->phase = DATA_IN;
   1372       1.1    bouyer }
   1373       1.1    bouyer 
   1374       1.1    bouyer static void
   1375       1.1    bouyer motg_device_ctrl_intr_rx(struct motg_softc *sc)
   1376       1.1    bouyer {
   1377       1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_in_ep[0];
   1378      1.14     skrll 	struct usbd_xfer *xfer = ep->xfer;
   1379       1.1    bouyer 	uint8_t csr;
   1380       1.1    bouyer 	int datalen, max_datalen;
   1381       1.1    bouyer 	char *data;
   1382       1.1    bouyer 	bool got_short;
   1383       1.3    bouyer 	usbd_status new_status = USBD_IN_PROGRESS;
   1384       1.1    bouyer 
   1385      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1386      1.14     skrll 
   1387       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1388       1.1    bouyer 
   1389      1.15     skrll 	KASSERT(ep->phase == DATA_IN || ep->phase == STATUS_IN);
   1390      1.14     skrll 	/* select endpoint 0 */
   1391       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
   1392       1.1    bouyer 
   1393       1.1    bouyer 	/* read out FIFO status */
   1394       1.1    bouyer 	csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   1395      1.18  pgoyette 	DPRINTFN(MD_CTRL, "phase %jd csr 0x%jx xfer %#jx status %jd",
   1396      1.18  pgoyette 	    ep->phase, csr, (uintptr_t)xfer,
   1397      1.18  pgoyette 	    (xfer != NULL) ? xfer->ux_status : 0);
   1398       1.1    bouyer 
   1399       1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_NAKTIMO) {
   1400       1.1    bouyer 		csr &= ~MUSB2_MASK_CSR0L_REQPKT;
   1401       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   1402       1.1    bouyer 
   1403       1.1    bouyer 		csr &= ~MUSB2_MASK_CSR0L_NAKTIMO;
   1404       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   1405       1.3    bouyer 		new_status = USBD_TIMEOUT; /* XXX */
   1406       1.1    bouyer 		goto complete;
   1407       1.1    bouyer 	}
   1408       1.1    bouyer 	if (csr & (MUSB2_MASK_CSR0L_RXSTALL | MUSB2_MASK_CSR0L_ERROR)) {
   1409       1.3    bouyer 		if (csr & MUSB2_MASK_CSR0L_RXSTALL)
   1410       1.3    bouyer 			new_status = USBD_STALLED;
   1411       1.3    bouyer 		else
   1412       1.3    bouyer 			new_status = USBD_IOERROR;
   1413       1.1    bouyer 		/* clear status */
   1414       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1415       1.1    bouyer 		goto complete;
   1416       1.1    bouyer 	}
   1417       1.1    bouyer 	if ((csr & MUSB2_MASK_CSR0L_RXPKTRDY) == 0)
   1418       1.1    bouyer 		return; /* no data yet */
   1419       1.1    bouyer 
   1420      1.14     skrll 	if (xfer == NULL || xfer->ux_status != USBD_IN_PROGRESS)
   1421       1.1    bouyer 		goto complete;
   1422       1.1    bouyer 
   1423       1.1    bouyer 	if (ep->phase == STATUS_IN) {
   1424       1.3    bouyer 		new_status = USBD_NORMAL_COMPLETION;
   1425       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1426       1.1    bouyer 		goto complete;
   1427       1.1    bouyer 	}
   1428       1.1    bouyer 	datalen = UREAD2(sc, MUSB2_REG_RXCOUNT);
   1429      1.18  pgoyette 	DPRINTFN(MD_CTRL, "phase %jd datalen %jd", ep->phase, datalen, 0, 0);
   1430      1.14     skrll 	KASSERT(UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize) > 0);
   1431      1.14     skrll 	max_datalen = min(UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize),
   1432       1.1    bouyer 	    ep->datalen);
   1433       1.1    bouyer 	if (datalen > max_datalen) {
   1434       1.3    bouyer 		new_status = USBD_IOERROR;
   1435       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1436       1.1    bouyer 		goto complete;
   1437       1.1    bouyer 	}
   1438       1.1    bouyer 	got_short = (datalen < max_datalen);
   1439       1.1    bouyer 	if (datalen > 0) {
   1440       1.1    bouyer 		KASSERT(ep->phase == DATA_IN);
   1441       1.1    bouyer 		data = ep->data;
   1442       1.1    bouyer 		ep->data += datalen;
   1443       1.1    bouyer 		ep->datalen -= datalen;
   1444      1.14     skrll 		xfer->ux_actlen += datalen;
   1445       1.1    bouyer 		if (((vaddr_t)data & 0x3) == 0 &&
   1446       1.1    bouyer 		    (datalen >> 2) > 0) {
   1447      1.18  pgoyette 			DPRINTFN(MD_CTRL, "r4 data %#jx len %jd",
   1448      1.18  pgoyette 			    (uintptr_t)data, datalen, 0, 0);
   1449       1.1    bouyer 			bus_space_read_multi_4(sc->sc_iot, sc->sc_ioh,
   1450       1.1    bouyer 			    MUSB2_REG_EPFIFO(0), (void *)data, datalen >> 2);
   1451       1.1    bouyer 			data += (datalen & ~0x3);
   1452       1.1    bouyer 			datalen -= (datalen & ~0x3);
   1453       1.1    bouyer 		}
   1454      1.18  pgoyette 		DPRINTFN(MD_CTRL, "r1 data %#jx len %jd", (uintptr_t)data,
   1455      1.18  pgoyette 		    datalen, 0, 0);
   1456       1.1    bouyer 		if (datalen) {
   1457       1.1    bouyer 			bus_space_read_multi_1(sc->sc_iot, sc->sc_ioh,
   1458       1.1    bouyer 			    MUSB2_REG_EPFIFO(0), data, datalen);
   1459       1.1    bouyer 		}
   1460       1.1    bouyer 	}
   1461       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL, csr & ~MUSB2_MASK_CSR0L_RXPKTRDY);
   1462       1.1    bouyer 	KASSERT(ep->phase == DATA_IN);
   1463       1.1    bouyer 	if (got_short || (ep->datalen == 0)) {
   1464       1.1    bouyer 		if (ep->need_short_xfer == 0) {
   1465       1.1    bouyer 			ep->phase = STATUS_OUT;
   1466       1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRH,
   1467       1.1    bouyer 			    UREAD1(sc, MUSB2_REG_TXCSRH) |
   1468       1.1    bouyer 			    MUSB2_MASK_CSR0H_PING_DIS);
   1469       1.1    bouyer 			motg_setup_endpoint_tx(xfer);
   1470       1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRL,
   1471       1.1    bouyer 			    MUSB2_MASK_CSR0L_STATUSPKT |
   1472       1.1    bouyer 			    MUSB2_MASK_CSR0L_TXPKTRDY);
   1473       1.1    bouyer 			return;
   1474       1.1    bouyer 		}
   1475       1.1    bouyer 		ep->need_short_xfer = 0;
   1476       1.1    bouyer 	}
   1477       1.1    bouyer 	motg_device_ctrl_read(xfer);
   1478       1.1    bouyer 	return;
   1479       1.1    bouyer complete:
   1480       1.1    bouyer 	ep->phase = IDLE;
   1481       1.1    bouyer 	ep->xfer = NULL;
   1482      1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS) {
   1483       1.3    bouyer 		KASSERT(new_status != USBD_IN_PROGRESS);
   1484      1.14     skrll 		xfer->ux_status = new_status;
   1485       1.1    bouyer 		usb_transfer_complete(xfer);
   1486       1.3    bouyer 	}
   1487       1.1    bouyer 	motg_device_ctrl_start1(sc);
   1488       1.1    bouyer }
   1489       1.1    bouyer 
   1490       1.1    bouyer static void
   1491       1.1    bouyer motg_device_ctrl_intr_tx(struct motg_softc *sc)
   1492       1.1    bouyer {
   1493       1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_in_ep[0];
   1494      1.14     skrll 	struct usbd_xfer *xfer = ep->xfer;
   1495       1.1    bouyer 	uint8_t csr;
   1496       1.1    bouyer 	int datalen;
   1497       1.1    bouyer 	char *data;
   1498       1.3    bouyer 	usbd_status new_status = USBD_IN_PROGRESS;
   1499       1.1    bouyer 
   1500      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1501      1.14     skrll 
   1502       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1503       1.1    bouyer 	if (ep->phase == DATA_IN || ep->phase == STATUS_IN) {
   1504       1.1    bouyer 		motg_device_ctrl_intr_rx(sc);
   1505       1.1    bouyer 		return;
   1506       1.1    bouyer 	}
   1507       1.1    bouyer 
   1508      1.14     skrll 	KASSERT(ep->phase == SETUP || ep->phase == DATA_OUT ||
   1509      1.14     skrll 	    ep->phase == STATUS_OUT);
   1510      1.14     skrll 
   1511      1.14     skrll 	/* select endpoint 0 */
   1512       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, 0);
   1513       1.1    bouyer 
   1514       1.1    bouyer 	csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   1515      1.18  pgoyette 	DPRINTFN(MD_CTRL, "phase %jd csr 0x%jx xfer %#jx status %jd",
   1516      1.18  pgoyette 	    ep->phase, csr, (uintptr_t)xfer,
   1517      1.18  pgoyette 	    (xfer != NULL) ? xfer->ux_status : 0);
   1518       1.1    bouyer 
   1519       1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_RXSTALL) {
   1520       1.1    bouyer 		/* command not accepted */
   1521       1.3    bouyer 		new_status = USBD_STALLED;
   1522       1.1    bouyer 		/* clear status */
   1523       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1524       1.1    bouyer 		goto complete;
   1525       1.1    bouyer 	}
   1526       1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_NAKTIMO) {
   1527       1.3    bouyer 		new_status = USBD_TIMEOUT; /* XXX */
   1528       1.1    bouyer 		/* flush fifo */
   1529       1.1    bouyer 		while (csr & MUSB2_MASK_CSR0L_TXFIFONEMPTY) {
   1530       1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRH,
   1531       1.7     skrll 			    UREAD1(sc, MUSB2_REG_TXCSRH) |
   1532       1.1    bouyer 				MUSB2_MASK_CSR0H_FFLUSH);
   1533       1.1    bouyer 			csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   1534       1.1    bouyer 		}
   1535       1.1    bouyer 		csr &= ~MUSB2_MASK_CSR0L_NAKTIMO;
   1536       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   1537       1.1    bouyer 		goto complete;
   1538       1.1    bouyer 	}
   1539       1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_ERROR) {
   1540       1.3    bouyer 		new_status = USBD_IOERROR;
   1541       1.1    bouyer 		/* clear status */
   1542       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   1543       1.1    bouyer 		goto complete;
   1544       1.1    bouyer 	}
   1545       1.1    bouyer 	if (csr & MUSB2_MASK_CSR0L_TXFIFONEMPTY) {
   1546       1.1    bouyer 		/* data still not sent */
   1547       1.1    bouyer 		return;
   1548       1.1    bouyer 	}
   1549       1.1    bouyer 	if (xfer == NULL)
   1550       1.1    bouyer 		goto complete;
   1551       1.1    bouyer 	if (ep->phase == STATUS_OUT) {
   1552       1.1    bouyer 		/*
   1553       1.1    bouyer 		 * we have sent status and got no error;
   1554       1.1    bouyer 		 * declare transfer complete
   1555       1.1    bouyer 		 */
   1556      1.18  pgoyette 		DPRINTFN(MD_CTRL, "xfer %#jx status %jd complete",
   1557      1.18  pgoyette 		    (uintptr_t)xfer, xfer->ux_status, 0, 0);
   1558       1.3    bouyer 		new_status = USBD_NORMAL_COMPLETION;
   1559       1.1    bouyer 		goto complete;
   1560       1.1    bouyer 	}
   1561       1.1    bouyer 	if (ep->datalen == 0) {
   1562       1.1    bouyer 		if (ep->need_short_xfer) {
   1563       1.1    bouyer 			ep->need_short_xfer = 0;
   1564       1.1    bouyer 			/* one more data phase */
   1565      1.14     skrll 			if (xfer->ux_request.bmRequestType & UT_READ) {
   1566      1.18  pgoyette 				DPRINTFN(MD_CTRL, "xfer %#jx to DATA_IN",
   1567      1.18  pgoyette 				    (uintptr_t)xfer, 0, 0, 0);
   1568       1.1    bouyer 				motg_device_ctrl_read(xfer);
   1569       1.1    bouyer 				return;
   1570       1.1    bouyer 			} /*  else fall back to DATA_OUT */
   1571       1.1    bouyer 		} else {
   1572      1.18  pgoyette 			DPRINTFN(MD_CTRL, "xfer %#jx to STATUS_IN, csrh 0x%jx",
   1573      1.18  pgoyette 			    (uintptr_t)xfer, UREAD1(sc, MUSB2_REG_TXCSRH),
   1574      1.18  pgoyette 			    0, 0);
   1575       1.1    bouyer 			ep->phase = STATUS_IN;
   1576       1.1    bouyer 			UWRITE1(sc, MUSB2_REG_RXCSRH,
   1577       1.1    bouyer 			    UREAD1(sc, MUSB2_REG_RXCSRH) |
   1578       1.1    bouyer 			    MUSB2_MASK_CSR0H_PING_DIS);
   1579       1.1    bouyer 			motg_setup_endpoint_rx(xfer);
   1580       1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRL,
   1581       1.1    bouyer 			    MUSB2_MASK_CSR0L_STATUSPKT |
   1582       1.1    bouyer 			    MUSB2_MASK_CSR0L_REQPKT);
   1583       1.1    bouyer 			return;
   1584       1.1    bouyer 		}
   1585       1.1    bouyer 	}
   1586      1.14     skrll 	if (xfer->ux_request.bmRequestType & UT_READ) {
   1587       1.1    bouyer 		motg_device_ctrl_read(xfer);
   1588       1.1    bouyer 		return;
   1589       1.1    bouyer 	}
   1590       1.1    bouyer 	/* setup a dataout phase */
   1591       1.1    bouyer 	datalen = min(ep->datalen,
   1592      1.14     skrll 	    UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize));
   1593       1.1    bouyer 	ep->phase = DATA_OUT;
   1594      1.18  pgoyette 	DPRINTFN(MD_CTRL, "xfer %#jx to DATA_OUT, csrh 0x%jx", (uintptr_t)xfer,
   1595      1.14     skrll 	    UREAD1(sc, MUSB2_REG_TXCSRH), 0, 0);
   1596       1.1    bouyer 	if (datalen) {
   1597       1.1    bouyer 		data = ep->data;
   1598       1.1    bouyer 		ep->data += datalen;
   1599       1.1    bouyer 		ep->datalen -= datalen;
   1600      1.14     skrll 		xfer->ux_actlen += datalen;
   1601       1.1    bouyer 		if (((vaddr_t)data & 0x3) == 0 &&
   1602       1.1    bouyer 		    (datalen >> 2) > 0) {
   1603       1.1    bouyer 			bus_space_write_multi_4(sc->sc_iot, sc->sc_ioh,
   1604       1.1    bouyer 			    MUSB2_REG_EPFIFO(0), (void *)data, datalen >> 2);
   1605       1.1    bouyer 			data += (datalen & ~0x3);
   1606       1.1    bouyer 			datalen -= (datalen & ~0x3);
   1607       1.1    bouyer 		}
   1608       1.1    bouyer 		if (datalen) {
   1609       1.1    bouyer 			bus_space_write_multi_1(sc->sc_iot, sc->sc_ioh,
   1610       1.1    bouyer 			    MUSB2_REG_EPFIFO(0), data, datalen);
   1611       1.1    bouyer 		}
   1612       1.1    bouyer 	}
   1613       1.1    bouyer 	/* send data */
   1614       1.1    bouyer 	motg_setup_endpoint_tx(xfer);
   1615       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL, MUSB2_MASK_CSR0L_TXPKTRDY);
   1616       1.1    bouyer 	return;
   1617       1.1    bouyer 
   1618       1.1    bouyer complete:
   1619       1.1    bouyer 	ep->phase = IDLE;
   1620       1.1    bouyer 	ep->xfer = NULL;
   1621      1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS) {
   1622       1.3    bouyer 		KASSERT(new_status != USBD_IN_PROGRESS);
   1623      1.14     skrll 		xfer->ux_status = new_status;
   1624       1.1    bouyer 		usb_transfer_complete(xfer);
   1625       1.3    bouyer 	}
   1626       1.1    bouyer 	motg_device_ctrl_start1(sc);
   1627       1.1    bouyer }
   1628       1.1    bouyer 
   1629       1.1    bouyer /* Abort a device control request. */
   1630       1.1    bouyer void
   1631      1.14     skrll motg_device_ctrl_abort(struct usbd_xfer *xfer)
   1632       1.1    bouyer {
   1633      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1634      1.14     skrll 
   1635       1.3    bouyer 	motg_device_xfer_abort(xfer);
   1636       1.1    bouyer }
   1637       1.1    bouyer 
   1638       1.1    bouyer /* Close a device control pipe */
   1639       1.1    bouyer void
   1640      1.14     skrll motg_device_ctrl_close(struct usbd_pipe *pipe)
   1641       1.1    bouyer {
   1642      1.14     skrll 	struct motg_softc *sc __diagused = MOTG_PIPE2SC(pipe);
   1643      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
   1644       1.1    bouyer 	struct motg_pipe *otgpipeiter;
   1645       1.1    bouyer 
   1646      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1647      1.14     skrll 
   1648       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1649       1.1    bouyer 	KASSERT(otgpipe->hw_ep->xfer == NULL ||
   1650      1.14     skrll 	    otgpipe->hw_ep->xfer->ux_pipe != pipe);
   1651       1.1    bouyer 
   1652       1.1    bouyer 	SIMPLEQ_FOREACH(otgpipeiter, &otgpipe->hw_ep->ep_pipes, ep_pipe_list) {
   1653       1.1    bouyer 		if (otgpipeiter == otgpipe) {
   1654       1.1    bouyer 			/* remove from list */
   1655       1.1    bouyer 			SIMPLEQ_REMOVE(&otgpipe->hw_ep->ep_pipes, otgpipe,
   1656       1.1    bouyer 			    motg_pipe, ep_pipe_list);
   1657       1.1    bouyer 			otgpipe->hw_ep->refcount--;
   1658       1.1    bouyer 			/* we're done */
   1659       1.1    bouyer 			return;
   1660       1.1    bouyer 		}
   1661       1.1    bouyer 	}
   1662       1.1    bouyer 	panic("motg_device_ctrl_close: not found");
   1663       1.1    bouyer }
   1664       1.1    bouyer 
   1665       1.1    bouyer void
   1666      1.14     skrll motg_device_ctrl_done(struct usbd_xfer *xfer)
   1667       1.1    bouyer {
   1668      1.14     skrll 	struct motg_pipe *otgpipe __diagused = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1669      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1670      1.14     skrll 
   1671       1.1    bouyer 	KASSERT(otgpipe->hw_ep->xfer != xfer);
   1672       1.1    bouyer }
   1673       1.1    bouyer 
   1674       1.1    bouyer static usbd_status
   1675      1.14     skrll motg_device_data_transfer(struct usbd_xfer *xfer)
   1676       1.1    bouyer {
   1677      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1678       1.1    bouyer 	usbd_status err;
   1679       1.1    bouyer 
   1680      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1681      1.14     skrll 
   1682       1.1    bouyer 	/* Insert last in queue. */
   1683       1.1    bouyer 	mutex_enter(&sc->sc_lock);
   1684      1.18  pgoyette 	DPRINTF("xfer %#jx status %jd", (uintptr_t)xfer, xfer->ux_status, 0, 0);
   1685       1.1    bouyer 	err = usb_insert_transfer(xfer);
   1686      1.14     skrll 	xfer->ux_status = USBD_NOT_STARTED;
   1687       1.1    bouyer 	mutex_exit(&sc->sc_lock);
   1688       1.1    bouyer 	if (err)
   1689      1.14     skrll 		return err;
   1690       1.1    bouyer 
   1691       1.1    bouyer 	/*
   1692       1.1    bouyer 	 * Pipe isn't running (otherwise err would be USBD_INPROG),
   1693       1.1    bouyer 	 * so start it first.
   1694       1.1    bouyer 	 */
   1695      1.14     skrll 	return motg_device_data_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   1696       1.1    bouyer }
   1697       1.1    bouyer 
   1698       1.1    bouyer static usbd_status
   1699      1.14     skrll motg_device_data_start(struct usbd_xfer *xfer)
   1700       1.1    bouyer {
   1701      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1702      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1703       1.1    bouyer 	usbd_status err;
   1704      1.14     skrll 
   1705      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1706      1.14     skrll 
   1707       1.1    bouyer 	mutex_enter(&sc->sc_lock);
   1708      1.18  pgoyette 	DPRINTF("xfer %#jx status %jd", (uintptr_t)xfer, xfer->ux_status, 0, 0);
   1709       1.1    bouyer 	err = motg_device_data_start1(sc, otgpipe->hw_ep);
   1710       1.1    bouyer 	mutex_exit(&sc->sc_lock);
   1711       1.1    bouyer 	if (err != USBD_IN_PROGRESS)
   1712       1.1    bouyer 		return err;
   1713       1.1    bouyer 	return USBD_IN_PROGRESS;
   1714       1.1    bouyer }
   1715       1.1    bouyer 
   1716       1.1    bouyer static usbd_status
   1717       1.1    bouyer motg_device_data_start1(struct motg_softc *sc, struct motg_hw_ep *ep)
   1718       1.1    bouyer {
   1719      1.14     skrll 	struct usbd_xfer *xfer = NULL;
   1720       1.1    bouyer 	struct motg_pipe *otgpipe;
   1721       1.1    bouyer 	usbd_status err = 0;
   1722       1.8     skrll 	uint32_t val __diagused;
   1723       1.1    bouyer 
   1724      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1725      1.14     skrll 
   1726       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1727       1.1    bouyer 	if (sc->sc_dying)
   1728      1.14     skrll 		return USBD_IOERROR;
   1729       1.1    bouyer 
   1730       1.1    bouyer 	if (!sc->sc_connected)
   1731      1.14     skrll 		return USBD_IOERROR;
   1732       1.1    bouyer 
   1733       1.1    bouyer 	if (ep->xfer != NULL) {
   1734       1.1    bouyer 		err = USBD_IN_PROGRESS;
   1735       1.1    bouyer 		goto end;
   1736       1.1    bouyer 	}
   1737       1.1    bouyer 	/* locate the first pipe with work to do */
   1738       1.1    bouyer 	SIMPLEQ_FOREACH(otgpipe, &ep->ep_pipes, ep_pipe_list) {
   1739      1.14     skrll 		xfer = SIMPLEQ_FIRST(&otgpipe->pipe.up_queue);
   1740      1.18  pgoyette 		DPRINTFN(MD_BULK, "pipe %#jx xfer %#jx status %jd",
   1741      1.18  pgoyette 		    (uintptr_t)otgpipe, (uintptr_t)xfer,
   1742      1.14     skrll 		    (xfer != NULL) ? xfer->ux_status : 0, 0);
   1743       1.1    bouyer 		if (xfer != NULL) {
   1744       1.1    bouyer 			/* move this pipe to the end of the list */
   1745       1.1    bouyer 			SIMPLEQ_REMOVE(&ep->ep_pipes, otgpipe,
   1746       1.1    bouyer 			    motg_pipe, ep_pipe_list);
   1747       1.1    bouyer 			SIMPLEQ_INSERT_TAIL(&ep->ep_pipes,
   1748       1.1    bouyer 			    otgpipe, ep_pipe_list);
   1749       1.1    bouyer 			break;
   1750       1.1    bouyer 		}
   1751       1.1    bouyer 	}
   1752       1.1    bouyer 	if (xfer == NULL) {
   1753       1.1    bouyer 		err = USBD_NOT_STARTED;
   1754       1.1    bouyer 		goto end;
   1755       1.1    bouyer 	}
   1756      1.14     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   1757      1.14     skrll 	KASSERT(otgpipe == MOTG_PIPE2MPIPE(xfer->ux_pipe));
   1758       1.1    bouyer 	KASSERT(otgpipe->hw_ep == ep);
   1759      1.14     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   1760      1.14     skrll 	// KASSERT(xfer->ux_actlen == 0);
   1761      1.14     skrll 	xfer->ux_actlen = 0;
   1762       1.1    bouyer 
   1763       1.1    bouyer 	ep->xfer = xfer;
   1764      1.14     skrll 	ep->datalen = xfer->ux_length;
   1765       1.1    bouyer 	KASSERT(ep->datalen > 0);
   1766      1.14     skrll 	ep->data = xfer->ux_buf;
   1767      1.14     skrll 	if ((xfer->ux_flags & USBD_FORCE_SHORT_XFER) &&
   1768       1.1    bouyer 	    (ep->datalen % 64) == 0)
   1769       1.1    bouyer 		ep->need_short_xfer = 1;
   1770       1.1    bouyer 	else
   1771       1.1    bouyer 		ep->need_short_xfer = 0;
   1772       1.1    bouyer 	/* now we need send this request */
   1773       1.7     skrll 	DPRINTFN(MD_BULK,
   1774      1.14     skrll 	    UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN ?
   1775      1.18  pgoyette 	    "xfer %#jx in  data %#jx len %jd short %jd" :
   1776      1.18  pgoyette 	    "xfer %#jx out data %#jx len %jd short %jd",
   1777      1.18  pgoyette 	    (uintptr_t)xfer, (uintptr_t)ep->data, ep->datalen,
   1778      1.18  pgoyette 	    ep->need_short_xfer);
   1779      1.18  pgoyette 	DPRINTFN(MD_BULK, "... speed %jd to %jd",
   1780      1.18  pgoyette 	    xfer->ux_pipe->up_dev->ud_speed,
   1781      1.14     skrll 	    xfer->ux_pipe->up_dev->ud_addr, 0, 0);
   1782       1.1    bouyer 	KASSERT(ep->phase == IDLE);
   1783       1.1    bouyer 	/* select endpoint */
   1784       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, ep->ep_number);
   1785      1.14     skrll 	if (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress)
   1786       1.1    bouyer 	    == UE_DIR_IN) {
   1787       1.1    bouyer 		val = UREAD1(sc, MUSB2_REG_RXCSRL);
   1788       1.1    bouyer 		KASSERT((val & MUSB2_MASK_CSRL_RXPKTRDY) == 0);
   1789       1.1    bouyer 		motg_device_data_read(xfer);
   1790       1.1    bouyer 	} else {
   1791       1.1    bouyer 		ep->phase = DATA_OUT;
   1792       1.1    bouyer 		val = UREAD1(sc, MUSB2_REG_TXCSRL);
   1793       1.1    bouyer 		KASSERT((val & MUSB2_MASK_CSRL_TXPKTRDY) == 0);
   1794       1.1    bouyer 		motg_device_data_write(xfer);
   1795       1.1    bouyer 	}
   1796       1.1    bouyer end:
   1797       1.1    bouyer 	if (err)
   1798      1.14     skrll 		return err;
   1799       1.1    bouyer 
   1800      1.14     skrll 	return USBD_IN_PROGRESS;
   1801       1.1    bouyer }
   1802       1.1    bouyer 
   1803       1.1    bouyer static void
   1804      1.14     skrll motg_device_data_read(struct usbd_xfer *xfer)
   1805       1.1    bouyer {
   1806      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1807      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1808       1.1    bouyer 	uint32_t val;
   1809       1.1    bouyer 
   1810      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1811      1.14     skrll 
   1812       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1813       1.1    bouyer 	/* assume endpoint already selected */
   1814       1.1    bouyer 	motg_setup_endpoint_rx(xfer);
   1815       1.1    bouyer 	/* Max packet size */
   1816       1.1    bouyer 	UWRITE2(sc, MUSB2_REG_RXMAXP,
   1817      1.14     skrll 	    UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize));
   1818       1.1    bouyer 	/* Data Toggle */
   1819       1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_RXCSRH);
   1820       1.1    bouyer 	val |= MUSB2_MASK_CSRH_RXDT_WREN;
   1821       1.1    bouyer 	if (otgpipe->nexttoggle)
   1822       1.1    bouyer 		val |= MUSB2_MASK_CSRH_RXDT_VAL;
   1823       1.1    bouyer 	else
   1824       1.1    bouyer 		val &= ~MUSB2_MASK_CSRH_RXDT_VAL;
   1825       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_RXCSRH, val);
   1826       1.1    bouyer 
   1827      1.18  pgoyette 	DPRINTFN(MD_BULK, "%#jx to DATA_IN on ep %jd, csrh 0x%jx",
   1828      1.18  pgoyette 	    (uintptr_t)xfer, otgpipe->hw_ep->ep_number,
   1829      1.18  pgoyette 	    UREAD1(sc, MUSB2_REG_RXCSRH), 0);
   1830       1.1    bouyer 	/* start transaction */
   1831       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_RXCSRL, MUSB2_MASK_CSRL_RXREQPKT);
   1832       1.1    bouyer 	otgpipe->hw_ep->phase = DATA_IN;
   1833       1.1    bouyer }
   1834       1.1    bouyer 
   1835       1.1    bouyer static void
   1836      1.14     skrll motg_device_data_write(struct usbd_xfer *xfer)
   1837       1.1    bouyer {
   1838      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   1839      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1840       1.1    bouyer 	struct motg_hw_ep *ep = otgpipe->hw_ep;
   1841       1.1    bouyer 	int datalen;
   1842       1.1    bouyer 	char *data;
   1843       1.1    bouyer 	uint32_t val;
   1844       1.1    bouyer 
   1845      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1846      1.14     skrll 
   1847       1.1    bouyer 	KASSERT(xfer!=NULL);
   1848       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1849       1.1    bouyer 
   1850       1.1    bouyer 	datalen = min(ep->datalen,
   1851      1.14     skrll 	    UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize));
   1852       1.1    bouyer 	ep->phase = DATA_OUT;
   1853      1.18  pgoyette 	DPRINTFN(MD_BULK, "%#jx to DATA_OUT on ep %jd, len %jd csrh 0x%jx",
   1854      1.18  pgoyette 	    (uintptr_t)xfer, ep->ep_number, datalen,
   1855      1.18  pgoyette 	    UREAD1(sc, MUSB2_REG_TXCSRH));
   1856       1.1    bouyer 
   1857       1.1    bouyer 	/* assume endpoint already selected */
   1858       1.1    bouyer 	/* write data to fifo */
   1859       1.1    bouyer 	data = ep->data;
   1860       1.1    bouyer 	ep->data += datalen;
   1861       1.1    bouyer 	ep->datalen -= datalen;
   1862      1.14     skrll 	xfer->ux_actlen += datalen;
   1863       1.1    bouyer 	if (((vaddr_t)data & 0x3) == 0 &&
   1864       1.1    bouyer 	    (datalen >> 2) > 0) {
   1865       1.1    bouyer 		bus_space_write_multi_4(sc->sc_iot, sc->sc_ioh,
   1866       1.1    bouyer 		    MUSB2_REG_EPFIFO(ep->ep_number),
   1867       1.1    bouyer 		    (void *)data, datalen >> 2);
   1868       1.1    bouyer 		data += (datalen & ~0x3);
   1869       1.1    bouyer 		datalen -= (datalen & ~0x3);
   1870       1.1    bouyer 	}
   1871       1.1    bouyer 	if (datalen) {
   1872       1.1    bouyer 		bus_space_write_multi_1(sc->sc_iot, sc->sc_ioh,
   1873       1.1    bouyer 		    MUSB2_REG_EPFIFO(ep->ep_number), data, datalen);
   1874       1.1    bouyer 	}
   1875       1.1    bouyer 
   1876       1.1    bouyer 	motg_setup_endpoint_tx(xfer);
   1877       1.1    bouyer 	/* Max packet size */
   1878       1.1    bouyer 	UWRITE2(sc, MUSB2_REG_TXMAXP,
   1879      1.14     skrll 	    UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize));
   1880       1.1    bouyer 	/* Data Toggle */
   1881       1.1    bouyer 	val = UREAD1(sc, MUSB2_REG_TXCSRH);
   1882       1.1    bouyer 	val |= MUSB2_MASK_CSRH_TXDT_WREN;
   1883       1.1    bouyer 	if (otgpipe->nexttoggle)
   1884       1.1    bouyer 		val |= MUSB2_MASK_CSRH_TXDT_VAL;
   1885       1.1    bouyer 	else
   1886       1.1    bouyer 		val &= ~MUSB2_MASK_CSRH_TXDT_VAL;
   1887       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRH, val);
   1888       1.1    bouyer 
   1889       1.1    bouyer 	/* start transaction */
   1890       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_TXCSRL, MUSB2_MASK_CSRL_TXPKTRDY);
   1891       1.1    bouyer }
   1892       1.1    bouyer 
   1893       1.1    bouyer static void
   1894       1.1    bouyer motg_device_intr_rx(struct motg_softc *sc, int epnumber)
   1895       1.1    bouyer {
   1896       1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_in_ep[epnumber];
   1897      1.14     skrll 	struct usbd_xfer *xfer = ep->xfer;
   1898       1.1    bouyer 	uint8_t csr;
   1899       1.1    bouyer 	int datalen, max_datalen;
   1900       1.1    bouyer 	char *data;
   1901       1.1    bouyer 	bool got_short;
   1902       1.3    bouyer 	usbd_status new_status = USBD_IN_PROGRESS;
   1903       1.1    bouyer 
   1904      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   1905      1.14     skrll 
   1906       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   1907       1.1    bouyer 	KASSERT(ep->ep_number == epnumber);
   1908       1.1    bouyer 
   1909      1.18  pgoyette 	DPRINTFN(MD_BULK, "on ep %jd", epnumber, 0, 0, 0);
   1910      1.14     skrll 	/* select endpoint */
   1911       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, epnumber);
   1912       1.1    bouyer 
   1913       1.1    bouyer 	/* read out FIFO status */
   1914       1.1    bouyer 	csr = UREAD1(sc, MUSB2_REG_RXCSRL);
   1915      1.18  pgoyette 	DPRINTFN(MD_BULK, "phase %jd csr 0x%jx", ep->phase, csr ,0 ,0);
   1916       1.1    bouyer 
   1917       1.1    bouyer 	if ((csr & (MUSB2_MASK_CSRL_RXNAKTO | MUSB2_MASK_CSRL_RXSTALL |
   1918       1.1    bouyer 	    MUSB2_MASK_CSRL_RXERROR | MUSB2_MASK_CSRL_RXPKTRDY)) == 0)
   1919       1.1    bouyer 		return;
   1920       1.1    bouyer 
   1921      1.14     skrll 	KASSERTMSG(ep->phase == DATA_IN, "phase %d", ep->phase);
   1922       1.1    bouyer 	if (csr & MUSB2_MASK_CSRL_RXNAKTO) {
   1923       1.1    bouyer 		csr &= ~MUSB2_MASK_CSRL_RXREQPKT;
   1924       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, csr);
   1925       1.1    bouyer 
   1926       1.1    bouyer 		csr &= ~MUSB2_MASK_CSRL_RXNAKTO;
   1927       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, csr);
   1928       1.3    bouyer 		new_status = USBD_TIMEOUT; /* XXX */
   1929       1.1    bouyer 		goto complete;
   1930       1.1    bouyer 	}
   1931       1.1    bouyer 	if (csr & (MUSB2_MASK_CSRL_RXSTALL | MUSB2_MASK_CSRL_RXERROR)) {
   1932       1.7     skrll 		if (csr & MUSB2_MASK_CSRL_RXSTALL)
   1933       1.3    bouyer 			new_status = USBD_STALLED;
   1934       1.3    bouyer 		else
   1935       1.3    bouyer 			new_status = USBD_IOERROR;
   1936       1.1    bouyer 		/* clear status */
   1937       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   1938       1.1    bouyer 		goto complete;
   1939       1.1    bouyer 	}
   1940       1.1    bouyer 	KASSERT(csr & MUSB2_MASK_CSRL_RXPKTRDY);
   1941       1.1    bouyer 
   1942      1.14     skrll 	if (xfer == NULL || xfer->ux_status != USBD_IN_PROGRESS) {
   1943       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   1944       1.1    bouyer 		goto complete;
   1945       1.1    bouyer 	}
   1946       1.1    bouyer 
   1947      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   1948       1.1    bouyer 	otgpipe->nexttoggle = otgpipe->nexttoggle ^ 1;
   1949       1.1    bouyer 
   1950       1.1    bouyer 	datalen = UREAD2(sc, MUSB2_REG_RXCOUNT);
   1951      1.18  pgoyette 	DPRINTFN(MD_BULK, "phase %jd datalen %jd", ep->phase, datalen ,0 ,0);
   1952      1.14     skrll 	KASSERT(UE_GET_SIZE(UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize)) > 0);
   1953       1.1    bouyer 	max_datalen = min(
   1954      1.14     skrll 	    UE_GET_SIZE(UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize)),
   1955       1.1    bouyer 	    ep->datalen);
   1956       1.1    bouyer 	if (datalen > max_datalen) {
   1957       1.3    bouyer 		new_status = USBD_IOERROR;
   1958       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   1959       1.1    bouyer 		goto complete;
   1960       1.1    bouyer 	}
   1961       1.1    bouyer 	got_short = (datalen < max_datalen);
   1962       1.1    bouyer 	if (datalen > 0) {
   1963       1.1    bouyer 		KASSERT(ep->phase == DATA_IN);
   1964       1.1    bouyer 		data = ep->data;
   1965       1.1    bouyer 		ep->data += datalen;
   1966       1.1    bouyer 		ep->datalen -= datalen;
   1967      1.14     skrll 		xfer->ux_actlen += datalen;
   1968       1.1    bouyer 		if (((vaddr_t)data & 0x3) == 0 &&
   1969       1.1    bouyer 		    (datalen >> 2) > 0) {
   1970      1.18  pgoyette 			DPRINTFN(MD_BULK, "r4 data %#jx len %jd",
   1971      1.18  pgoyette 			    (uintptr_t)data, datalen, 0, 0);
   1972       1.1    bouyer 			bus_space_read_multi_4(sc->sc_iot, sc->sc_ioh,
   1973       1.1    bouyer 			    MUSB2_REG_EPFIFO(ep->ep_number),
   1974       1.1    bouyer 			    (void *)data, datalen >> 2);
   1975       1.1    bouyer 			data += (datalen & ~0x3);
   1976       1.1    bouyer 			datalen -= (datalen & ~0x3);
   1977       1.1    bouyer 		}
   1978      1.18  pgoyette 		DPRINTFN(MD_BULK, "r1 data %#jx len %jd", (uintptr_t)data,
   1979      1.18  pgoyette 		    datalen ,0 ,0);
   1980       1.1    bouyer 		if (datalen) {
   1981       1.1    bouyer 			bus_space_read_multi_1(sc->sc_iot, sc->sc_ioh,
   1982       1.1    bouyer 			    MUSB2_REG_EPFIFO(ep->ep_number), data, datalen);
   1983       1.1    bouyer 		}
   1984       1.1    bouyer 	}
   1985       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   1986       1.1    bouyer 	KASSERT(ep->phase == DATA_IN);
   1987       1.1    bouyer 	if (got_short || (ep->datalen == 0)) {
   1988       1.1    bouyer 		if (ep->need_short_xfer == 0) {
   1989       1.3    bouyer 			new_status = USBD_NORMAL_COMPLETION;
   1990       1.1    bouyer 			goto complete;
   1991       1.1    bouyer 		}
   1992       1.1    bouyer 		ep->need_short_xfer = 0;
   1993       1.1    bouyer 	}
   1994       1.1    bouyer 	motg_device_data_read(xfer);
   1995       1.1    bouyer 	return;
   1996       1.1    bouyer complete:
   1997      1.18  pgoyette 	DPRINTFN(MD_BULK, "xfer %#jx complete, status %jd", (uintptr_t)xfer,
   1998      1.14     skrll 	    (xfer != NULL) ? xfer->ux_status : 0, 0, 0);
   1999       1.1    bouyer 	ep->phase = IDLE;
   2000       1.1    bouyer 	ep->xfer = NULL;
   2001      1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS) {
   2002       1.3    bouyer 		KASSERT(new_status != USBD_IN_PROGRESS);
   2003      1.14     skrll 		xfer->ux_status = new_status;
   2004       1.1    bouyer 		usb_transfer_complete(xfer);
   2005       1.3    bouyer 	}
   2006       1.1    bouyer 	motg_device_data_start1(sc, ep);
   2007       1.1    bouyer }
   2008       1.1    bouyer 
   2009       1.1    bouyer static void
   2010       1.1    bouyer motg_device_intr_tx(struct motg_softc *sc, int epnumber)
   2011       1.1    bouyer {
   2012       1.1    bouyer 	struct motg_hw_ep *ep = &sc->sc_out_ep[epnumber];
   2013      1.14     skrll 	struct usbd_xfer *xfer = ep->xfer;
   2014       1.1    bouyer 	uint8_t csr;
   2015       1.1    bouyer 	struct motg_pipe *otgpipe;
   2016       1.3    bouyer 	usbd_status new_status = USBD_IN_PROGRESS;
   2017       1.1    bouyer 
   2018      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2019      1.14     skrll 
   2020       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   2021       1.1    bouyer 	KASSERT(ep->ep_number == epnumber);
   2022       1.1    bouyer 
   2023      1.18  pgoyette 	DPRINTFN(MD_BULK, " on ep %jd", epnumber, 0, 0, 0);
   2024      1.14     skrll 	/* select endpoint */
   2025       1.1    bouyer 	UWRITE1(sc, MUSB2_REG_EPINDEX, epnumber);
   2026       1.1    bouyer 
   2027       1.1    bouyer 	csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   2028      1.18  pgoyette 	DPRINTFN(MD_BULK, "phase %jd csr 0x%jx", ep->phase, csr, 0, 0);
   2029       1.1    bouyer 
   2030       1.1    bouyer 	if (csr & (MUSB2_MASK_CSRL_TXSTALLED|MUSB2_MASK_CSRL_TXERROR)) {
   2031       1.1    bouyer 		/* command not accepted */
   2032       1.7     skrll 		if (csr & MUSB2_MASK_CSRL_TXSTALLED)
   2033       1.3    bouyer 			new_status = USBD_STALLED;
   2034       1.3    bouyer 		else
   2035       1.3    bouyer 			new_status = USBD_IOERROR;
   2036       1.1    bouyer 		/* clear status */
   2037       1.1    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   2038       1.1    bouyer 		goto complete;
   2039       1.1    bouyer 	}
   2040       1.1    bouyer 	if (csr & MUSB2_MASK_CSRL_TXNAKTO) {
   2041       1.3    bouyer 		new_status = USBD_TIMEOUT; /* XXX */
   2042       1.3    bouyer 		csr &= ~MUSB2_MASK_CSRL_TXNAKTO;
   2043       1.3    bouyer 		UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   2044       1.1    bouyer 		/* flush fifo */
   2045       1.1    bouyer 		while (csr & MUSB2_MASK_CSRL_TXFIFONEMPTY) {
   2046       1.1    bouyer 			csr |= MUSB2_MASK_CSRL_TXFFLUSH;
   2047       1.3    bouyer 			csr &= ~MUSB2_MASK_CSRL_TXNAKTO;
   2048       1.1    bouyer 			UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   2049       1.3    bouyer 			delay(1000);
   2050       1.1    bouyer 			csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   2051      1.18  pgoyette 			DPRINTFN(MD_BULK, "TX fifo flush ep %jd CSR 0x%jx",
   2052      1.14     skrll 			    epnumber, csr, 0, 0);
   2053       1.1    bouyer 		}
   2054       1.1    bouyer 		goto complete;
   2055       1.1    bouyer 	}
   2056       1.1    bouyer 	if (csr & (MUSB2_MASK_CSRL_TXFIFONEMPTY|MUSB2_MASK_CSRL_TXPKTRDY)) {
   2057       1.1    bouyer 		/* data still not sent */
   2058       1.1    bouyer 		return;
   2059       1.1    bouyer 	}
   2060      1.14     skrll 	if (xfer == NULL || xfer->ux_status != USBD_IN_PROGRESS)
   2061       1.1    bouyer 		goto complete;
   2062      1.14     skrll 	KASSERT(ep->phase == DATA_OUT);
   2063       1.7     skrll 
   2064      1.14     skrll 	otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   2065       1.1    bouyer 	otgpipe->nexttoggle = otgpipe->nexttoggle ^ 1;
   2066       1.1    bouyer 
   2067       1.1    bouyer 	if (ep->datalen == 0) {
   2068       1.1    bouyer 		if (ep->need_short_xfer) {
   2069       1.1    bouyer 			ep->need_short_xfer = 0;
   2070       1.1    bouyer 			/* one more data phase */
   2071       1.1    bouyer 		} else {
   2072       1.3    bouyer 			new_status = USBD_NORMAL_COMPLETION;
   2073       1.1    bouyer 			goto complete;
   2074       1.1    bouyer 		}
   2075       1.1    bouyer 	}
   2076       1.1    bouyer 	motg_device_data_write(xfer);
   2077       1.1    bouyer 	return;
   2078       1.1    bouyer 
   2079       1.1    bouyer complete:
   2080      1.18  pgoyette 	DPRINTFN(MD_BULK, "xfer %#jx complete, status %jd", (uintptr_t)xfer,
   2081      1.14     skrll 	    (xfer != NULL) ? xfer->ux_status : 0, 0, 0);
   2082       1.1    bouyer #ifdef DIAGNOSTIC
   2083      1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS && ep->phase != DATA_OUT)
   2084       1.1    bouyer 		panic("motg_device_intr_tx: bad phase %d", ep->phase);
   2085       1.1    bouyer #endif
   2086       1.1    bouyer 	ep->phase = IDLE;
   2087       1.1    bouyer 	ep->xfer = NULL;
   2088      1.14     skrll 	if (xfer && xfer->ux_status == USBD_IN_PROGRESS) {
   2089       1.3    bouyer 		KASSERT(new_status != USBD_IN_PROGRESS);
   2090      1.14     skrll 		xfer->ux_status = new_status;
   2091       1.1    bouyer 		usb_transfer_complete(xfer);
   2092       1.3    bouyer 	}
   2093       1.1    bouyer 	motg_device_data_start1(sc, ep);
   2094       1.1    bouyer }
   2095       1.1    bouyer 
   2096       1.1    bouyer /* Abort a device control request. */
   2097       1.1    bouyer void
   2098      1.14     skrll motg_device_data_abort(struct usbd_xfer *xfer)
   2099       1.1    bouyer {
   2100      1.14     skrll 	struct motg_softc __diagused *sc = MOTG_XFER2SC(xfer);
   2101       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   2102       1.1    bouyer 
   2103      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2104      1.14     skrll 
   2105       1.3    bouyer 	motg_device_xfer_abort(xfer);
   2106       1.1    bouyer }
   2107       1.1    bouyer 
   2108       1.1    bouyer /* Close a device control pipe */
   2109       1.1    bouyer void
   2110      1.14     skrll motg_device_data_close(struct usbd_pipe *pipe)
   2111       1.1    bouyer {
   2112      1.14     skrll 	struct motg_softc *sc __diagused = MOTG_PIPE2SC(pipe);
   2113      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
   2114       1.1    bouyer 	struct motg_pipe *otgpipeiter;
   2115       1.1    bouyer 
   2116      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2117      1.14     skrll 
   2118       1.1    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   2119       1.1    bouyer 	KASSERT(otgpipe->hw_ep->xfer == NULL ||
   2120      1.14     skrll 	    otgpipe->hw_ep->xfer->ux_pipe != pipe);
   2121       1.1    bouyer 
   2122      1.14     skrll 	pipe->up_endpoint->ue_toggle = otgpipe->nexttoggle;
   2123       1.1    bouyer 	SIMPLEQ_FOREACH(otgpipeiter, &otgpipe->hw_ep->ep_pipes, ep_pipe_list) {
   2124       1.1    bouyer 		if (otgpipeiter == otgpipe) {
   2125       1.1    bouyer 			/* remove from list */
   2126       1.1    bouyer 			SIMPLEQ_REMOVE(&otgpipe->hw_ep->ep_pipes, otgpipe,
   2127       1.1    bouyer 			    motg_pipe, ep_pipe_list);
   2128       1.1    bouyer 			otgpipe->hw_ep->refcount--;
   2129       1.1    bouyer 			/* we're done */
   2130       1.1    bouyer 			return;
   2131       1.1    bouyer 		}
   2132       1.1    bouyer 	}
   2133       1.1    bouyer 	panic("motg_device_data_close: not found");
   2134       1.1    bouyer }
   2135       1.1    bouyer 
   2136       1.1    bouyer void
   2137      1.14     skrll motg_device_data_done(struct usbd_xfer *xfer)
   2138       1.1    bouyer {
   2139      1.14     skrll 	struct motg_pipe *otgpipe __diagused = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   2140      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2141      1.14     skrll 
   2142       1.1    bouyer 	KASSERT(otgpipe->hw_ep->xfer != xfer);
   2143       1.1    bouyer }
   2144       1.1    bouyer 
   2145       1.1    bouyer void
   2146      1.14     skrll motg_device_clear_toggle(struct usbd_pipe *pipe)
   2147       1.1    bouyer {
   2148      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(pipe);
   2149       1.1    bouyer 	otgpipe->nexttoggle = 0;
   2150       1.1    bouyer }
   2151       1.3    bouyer 
   2152       1.3    bouyer /* Abort a device control request. */
   2153       1.3    bouyer static void
   2154      1.14     skrll motg_device_xfer_abort(struct usbd_xfer *xfer)
   2155       1.3    bouyer {
   2156       1.3    bouyer 	int wake;
   2157       1.3    bouyer 	uint8_t csr;
   2158      1.14     skrll 	struct motg_softc *sc = MOTG_XFER2SC(xfer);
   2159      1.14     skrll 	struct motg_pipe *otgpipe = MOTG_PIPE2MPIPE(xfer->ux_pipe);
   2160       1.3    bouyer 	KASSERT(mutex_owned(&sc->sc_lock));
   2161       1.3    bouyer 
   2162      1.14     skrll 	MOTGHIST_FUNC(); MOTGHIST_CALLED();
   2163      1.14     skrll 
   2164      1.14     skrll 	if (xfer->ux_hcflags & UXFER_ABORTING) {
   2165      1.14     skrll 		DPRINTF("already aborting", 0, 0, 0, 0);
   2166      1.14     skrll 		xfer->ux_hcflags |= UXFER_ABORTWAIT;
   2167      1.14     skrll 		while (xfer->ux_hcflags & UXFER_ABORTING)
   2168      1.14     skrll 			cv_wait(&xfer->ux_hccv, &sc->sc_lock);
   2169       1.3    bouyer 		return;
   2170       1.3    bouyer 	}
   2171      1.14     skrll 	xfer->ux_hcflags |= UXFER_ABORTING;
   2172       1.3    bouyer 	if (otgpipe->hw_ep->xfer == xfer) {
   2173      1.14     skrll 		KASSERT(xfer->ux_status == USBD_IN_PROGRESS);
   2174       1.3    bouyer 		otgpipe->hw_ep->xfer = NULL;
   2175       1.3    bouyer 		if (otgpipe->hw_ep->ep_number > 0) {
   2176       1.7     skrll 			/* select endpoint */
   2177       1.3    bouyer 			UWRITE1(sc, MUSB2_REG_EPINDEX,
   2178       1.3    bouyer 			    otgpipe->hw_ep->ep_number);
   2179       1.3    bouyer 			if (otgpipe->hw_ep->phase == DATA_OUT) {
   2180       1.3    bouyer 				csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   2181       1.3    bouyer 				while (csr & MUSB2_MASK_CSRL_TXFIFONEMPTY) {
   2182       1.3    bouyer 					csr |= MUSB2_MASK_CSRL_TXFFLUSH;
   2183       1.3    bouyer 					UWRITE1(sc, MUSB2_REG_TXCSRL, csr);
   2184       1.3    bouyer 					csr = UREAD1(sc, MUSB2_REG_TXCSRL);
   2185       1.3    bouyer 				}
   2186       1.3    bouyer 				UWRITE1(sc, MUSB2_REG_TXCSRL, 0);
   2187       1.3    bouyer 			} else if (otgpipe->hw_ep->phase == DATA_IN) {
   2188       1.3    bouyer 				csr = UREAD1(sc, MUSB2_REG_RXCSRL);
   2189       1.3    bouyer 				while (csr & MUSB2_MASK_CSRL_RXPKTRDY) {
   2190       1.3    bouyer 					csr |= MUSB2_MASK_CSRL_RXFFLUSH;
   2191       1.3    bouyer 					UWRITE1(sc, MUSB2_REG_RXCSRL, csr);
   2192       1.3    bouyer 					csr = UREAD1(sc, MUSB2_REG_RXCSRL);
   2193       1.3    bouyer 				}
   2194       1.3    bouyer 				UWRITE1(sc, MUSB2_REG_RXCSRL, 0);
   2195       1.3    bouyer 			}
   2196       1.3    bouyer 			otgpipe->hw_ep->phase = IDLE;
   2197       1.3    bouyer 		}
   2198       1.3    bouyer 	}
   2199      1.14     skrll 	xfer->ux_status = USBD_CANCELLED; /* make software ignore it */
   2200      1.14     skrll 	wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
   2201      1.14     skrll 	xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2202       1.3    bouyer 	usb_transfer_complete(xfer);
   2203       1.3    bouyer 	if (wake)
   2204      1.14     skrll 		cv_broadcast(&xfer->ux_hccv);
   2205       1.3    bouyer }
   2206