ohci.c revision 1.101.2.8 1 1.101.2.8 nathanw /* $NetBSD: ohci.c,v 1.101.2.8 2002/06/20 03:46:51 nathanw Exp $ */
2 1.55 augustss /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Open Host Controller driver.
43 1.1 augustss *
44 1.96 augustss * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
45 1.96 augustss * USB spec: http://www.usb.org/developers/data/usbspec.zip
46 1.1 augustss */
47 1.1 augustss
48 1.101.2.4 nathanw #include <sys/cdefs.h>
49 1.101.2.8 nathanw __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.101.2.8 2002/06/20 03:46:51 nathanw Exp $");
50 1.101.2.4 nathanw
51 1.1 augustss #include <sys/param.h>
52 1.1 augustss #include <sys/systm.h>
53 1.1 augustss #include <sys/malloc.h>
54 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
55 1.55 augustss #include <sys/kernel.h>
56 1.1 augustss #include <sys/device.h>
57 1.55 augustss #include <sys/select.h>
58 1.15 augustss #elif defined(__FreeBSD__)
59 1.15 augustss #include <sys/module.h>
60 1.15 augustss #include <sys/bus.h>
61 1.52 augustss #include <machine/bus_pio.h>
62 1.52 augustss #include <machine/bus_memio.h>
63 1.55 augustss #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
64 1.55 augustss #include <machine/cpu.h>
65 1.55 augustss #endif
66 1.15 augustss #endif
67 1.1 augustss #include <sys/proc.h>
68 1.1 augustss #include <sys/queue.h>
69 1.1 augustss
70 1.4 augustss #include <machine/bus.h>
71 1.16 augustss #include <machine/endian.h>
72 1.4 augustss
73 1.1 augustss #include <dev/usb/usb.h>
74 1.1 augustss #include <dev/usb/usbdi.h>
75 1.1 augustss #include <dev/usb/usbdivar.h>
76 1.38 augustss #include <dev/usb/usb_mem.h>
77 1.1 augustss #include <dev/usb/usb_quirks.h>
78 1.1 augustss
79 1.1 augustss #include <dev/usb/ohcireg.h>
80 1.1 augustss #include <dev/usb/ohcivar.h>
81 1.1 augustss
82 1.15 augustss #if defined(__FreeBSD__)
83 1.15 augustss #include <machine/clock.h>
84 1.55 augustss
85 1.15 augustss #define delay(d) DELAY(d)
86 1.15 augustss #endif
87 1.1 augustss
88 1.36 augustss #if defined(__OpenBSD__)
89 1.36 augustss struct cfdriver ohci_cd = {
90 1.36 augustss NULL, "ohci", DV_DULL
91 1.36 augustss };
92 1.36 augustss #endif
93 1.36 augustss
94 1.52 augustss #ifdef OHCI_DEBUG
95 1.52 augustss #define DPRINTF(x) if (ohcidebug) logprintf x
96 1.52 augustss #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
97 1.52 augustss int ohcidebug = 0;
98 1.92 tv #ifndef __NetBSD__
99 1.92 tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
100 1.92 tv #endif
101 1.52 augustss #else
102 1.52 augustss #define DPRINTF(x)
103 1.52 augustss #define DPRINTFN(n,x)
104 1.52 augustss #endif
105 1.52 augustss
106 1.16 augustss /*
107 1.16 augustss * The OHCI controller is little endian, so on big endian machines
108 1.16 augustss * the data strored in memory needs to be swapped.
109 1.16 augustss */
110 1.84 augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
111 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
112 1.76 tsutsui #define htole32(x) (bswap32(x))
113 1.76 tsutsui #define le32toh(x) (bswap32(x))
114 1.16 augustss #else
115 1.76 tsutsui #define htole32(x) (x)
116 1.76 tsutsui #define le32toh(x) (x)
117 1.76 tsutsui #endif
118 1.16 augustss #endif
119 1.16 augustss
120 1.1 augustss struct ohci_pipe;
121 1.1 augustss
122 1.91 augustss Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
123 1.91 augustss Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
124 1.1 augustss
125 1.91 augustss Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
126 1.91 augustss Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
127 1.1 augustss
128 1.91 augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
129 1.91 augustss Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
130 1.60 augustss
131 1.53 augustss #if 0
132 1.91 augustss Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
133 1.91 augustss ohci_soft_td_t *);
134 1.53 augustss #endif
135 1.91 augustss Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
136 1.77 augustss ohci_softc_t *, int, int, usbd_xfer_handle,
137 1.91 augustss ohci_soft_td_t *, ohci_soft_td_t **);
138 1.53 augustss
139 1.91 augustss Static void ohci_shutdown(void *v);
140 1.91 augustss Static void ohci_power(int, void *);
141 1.91 augustss Static usbd_status ohci_open(usbd_pipe_handle);
142 1.91 augustss Static void ohci_poll(struct usbd_bus *);
143 1.99 augustss Static void ohci_softintr(void *);
144 1.91 augustss Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
145 1.91 augustss Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
146 1.91 augustss Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
147 1.91 augustss
148 1.91 augustss Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
149 1.91 augustss Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
150 1.91 augustss Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
151 1.91 augustss Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
152 1.91 augustss Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
153 1.91 augustss Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
154 1.91 augustss Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
155 1.91 augustss Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
156 1.91 augustss Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
157 1.91 augustss
158 1.91 augustss Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
159 1.91 augustss Static void ohci_device_isoc_enter(usbd_xfer_handle);
160 1.91 augustss
161 1.91 augustss Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
162 1.91 augustss Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
163 1.91 augustss
164 1.91 augustss Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
165 1.91 augustss Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
166 1.91 augustss
167 1.91 augustss Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
168 1.91 augustss Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
169 1.91 augustss Static void ohci_root_ctrl_abort(usbd_xfer_handle);
170 1.91 augustss Static void ohci_root_ctrl_close(usbd_pipe_handle);
171 1.91 augustss Static void ohci_root_ctrl_done(usbd_xfer_handle);
172 1.91 augustss
173 1.91 augustss Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
174 1.91 augustss Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
175 1.91 augustss Static void ohci_root_intr_abort(usbd_xfer_handle);
176 1.91 augustss Static void ohci_root_intr_close(usbd_pipe_handle);
177 1.91 augustss Static void ohci_root_intr_done(usbd_xfer_handle);
178 1.91 augustss
179 1.91 augustss Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
180 1.91 augustss Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
181 1.91 augustss Static void ohci_device_ctrl_abort(usbd_xfer_handle);
182 1.91 augustss Static void ohci_device_ctrl_close(usbd_pipe_handle);
183 1.91 augustss Static void ohci_device_ctrl_done(usbd_xfer_handle);
184 1.91 augustss
185 1.91 augustss Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
186 1.91 augustss Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
187 1.91 augustss Static void ohci_device_bulk_abort(usbd_xfer_handle);
188 1.91 augustss Static void ohci_device_bulk_close(usbd_pipe_handle);
189 1.91 augustss Static void ohci_device_bulk_done(usbd_xfer_handle);
190 1.91 augustss
191 1.91 augustss Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
192 1.91 augustss Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
193 1.91 augustss Static void ohci_device_intr_abort(usbd_xfer_handle);
194 1.91 augustss Static void ohci_device_intr_close(usbd_pipe_handle);
195 1.91 augustss Static void ohci_device_intr_done(usbd_xfer_handle);
196 1.91 augustss
197 1.91 augustss Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
198 1.91 augustss Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
199 1.91 augustss Static void ohci_device_isoc_abort(usbd_xfer_handle);
200 1.91 augustss Static void ohci_device_isoc_close(usbd_pipe_handle);
201 1.91 augustss Static void ohci_device_isoc_done(usbd_xfer_handle);
202 1.91 augustss
203 1.101.2.6 nathanw Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
204 1.91 augustss struct ohci_pipe *pipe, int ival);
205 1.91 augustss
206 1.101.2.6 nathanw Static int ohci_str(usb_string_descriptor_t *, int, const char *);
207 1.91 augustss
208 1.91 augustss Static void ohci_timeout(void *);
209 1.101.2.5 nathanw Static void ohci_timeout_task(void *);
210 1.91 augustss Static void ohci_rhsc_able(ohci_softc_t *, int);
211 1.101.2.3 nathanw Static void ohci_rhsc_enable(void *);
212 1.91 augustss
213 1.91 augustss Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
214 1.91 augustss Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
215 1.53 augustss
216 1.91 augustss Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
217 1.91 augustss Static void ohci_noop(usbd_pipe_handle pipe);
218 1.37 augustss
219 1.52 augustss #ifdef OHCI_DEBUG
220 1.91 augustss Static void ohci_dumpregs(ohci_softc_t *);
221 1.91 augustss Static void ohci_dump_tds(ohci_soft_td_t *);
222 1.91 augustss Static void ohci_dump_td(ohci_soft_td_t *);
223 1.91 augustss Static void ohci_dump_ed(ohci_soft_ed_t *);
224 1.91 augustss Static void ohci_dump_itd(ohci_soft_itd_t *);
225 1.91 augustss Static void ohci_dump_itds(ohci_soft_itd_t *);
226 1.1 augustss #endif
227 1.1 augustss
228 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
229 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
230 1.88 augustss #define OWRITE1(sc, r, x) \
231 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
232 1.88 augustss #define OWRITE2(sc, r, x) \
233 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
234 1.88 augustss #define OWRITE4(sc, r, x) \
235 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
236 1.88 augustss #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
237 1.88 augustss #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
238 1.88 augustss #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
239 1.1 augustss
240 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
241 1.101.2.6 nathanw Static u_int8_t revbits[OHCI_NO_INTRS] =
242 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
243 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
244 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
245 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
246 1.1 augustss
247 1.1 augustss struct ohci_pipe {
248 1.1 augustss struct usbd_pipe pipe;
249 1.1 augustss ohci_soft_ed_t *sed;
250 1.60 augustss union {
251 1.60 augustss ohci_soft_td_t *td;
252 1.60 augustss ohci_soft_itd_t *itd;
253 1.60 augustss } tail;
254 1.1 augustss /* Info needed for different pipe kinds. */
255 1.1 augustss union {
256 1.1 augustss /* Control pipe */
257 1.1 augustss struct {
258 1.4 augustss usb_dma_t reqdma;
259 1.1 augustss u_int length;
260 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
261 1.1 augustss } ctl;
262 1.1 augustss /* Interrupt pipe */
263 1.1 augustss struct {
264 1.1 augustss int nslots;
265 1.1 augustss int pos;
266 1.1 augustss } intr;
267 1.3 augustss /* Bulk pipe */
268 1.3 augustss struct {
269 1.3 augustss u_int length;
270 1.32 augustss int isread;
271 1.3 augustss } bulk;
272 1.43 augustss /* Iso pipe */
273 1.43 augustss struct iso {
274 1.60 augustss int next, inuse;
275 1.43 augustss } iso;
276 1.1 augustss } u;
277 1.1 augustss };
278 1.1 augustss
279 1.1 augustss #define OHCI_INTR_ENDPT 1
280 1.1 augustss
281 1.82 augustss Static struct usbd_bus_methods ohci_bus_methods = {
282 1.42 augustss ohci_open,
283 1.73 augustss ohci_softintr,
284 1.42 augustss ohci_poll,
285 1.42 augustss ohci_allocm,
286 1.42 augustss ohci_freem,
287 1.62 augustss ohci_allocx,
288 1.62 augustss ohci_freex,
289 1.42 augustss };
290 1.42 augustss
291 1.101.2.6 nathanw Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
292 1.1 augustss ohci_root_ctrl_transfer,
293 1.17 augustss ohci_root_ctrl_start,
294 1.1 augustss ohci_root_ctrl_abort,
295 1.1 augustss ohci_root_ctrl_close,
296 1.37 augustss ohci_noop,
297 1.65 augustss ohci_root_ctrl_done,
298 1.1 augustss };
299 1.1 augustss
300 1.101.2.6 nathanw Static struct usbd_pipe_methods ohci_root_intr_methods = {
301 1.1 augustss ohci_root_intr_transfer,
302 1.17 augustss ohci_root_intr_start,
303 1.1 augustss ohci_root_intr_abort,
304 1.1 augustss ohci_root_intr_close,
305 1.37 augustss ohci_noop,
306 1.38 augustss ohci_root_intr_done,
307 1.1 augustss };
308 1.1 augustss
309 1.101.2.6 nathanw Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
310 1.1 augustss ohci_device_ctrl_transfer,
311 1.17 augustss ohci_device_ctrl_start,
312 1.1 augustss ohci_device_ctrl_abort,
313 1.1 augustss ohci_device_ctrl_close,
314 1.37 augustss ohci_noop,
315 1.38 augustss ohci_device_ctrl_done,
316 1.1 augustss };
317 1.1 augustss
318 1.101.2.6 nathanw Static struct usbd_pipe_methods ohci_device_intr_methods = {
319 1.1 augustss ohci_device_intr_transfer,
320 1.17 augustss ohci_device_intr_start,
321 1.1 augustss ohci_device_intr_abort,
322 1.1 augustss ohci_device_intr_close,
323 1.37 augustss ohci_device_clear_toggle,
324 1.38 augustss ohci_device_intr_done,
325 1.1 augustss };
326 1.1 augustss
327 1.101.2.6 nathanw Static struct usbd_pipe_methods ohci_device_bulk_methods = {
328 1.3 augustss ohci_device_bulk_transfer,
329 1.17 augustss ohci_device_bulk_start,
330 1.3 augustss ohci_device_bulk_abort,
331 1.3 augustss ohci_device_bulk_close,
332 1.37 augustss ohci_device_clear_toggle,
333 1.38 augustss ohci_device_bulk_done,
334 1.3 augustss };
335 1.3 augustss
336 1.82 augustss Static struct usbd_pipe_methods ohci_device_isoc_methods = {
337 1.43 augustss ohci_device_isoc_transfer,
338 1.43 augustss ohci_device_isoc_start,
339 1.43 augustss ohci_device_isoc_abort,
340 1.43 augustss ohci_device_isoc_close,
341 1.43 augustss ohci_noop,
342 1.43 augustss ohci_device_isoc_done,
343 1.43 augustss };
344 1.43 augustss
345 1.55 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
346 1.47 augustss int
347 1.91 augustss ohci_activate(device_ptr_t self, enum devact act)
348 1.47 augustss {
349 1.49 augustss struct ohci_softc *sc = (struct ohci_softc *)self;
350 1.47 augustss int rv = 0;
351 1.47 augustss
352 1.47 augustss switch (act) {
353 1.47 augustss case DVACT_ACTIVATE:
354 1.47 augustss return (EOPNOTSUPP);
355 1.47 augustss break;
356 1.47 augustss
357 1.47 augustss case DVACT_DEACTIVATE:
358 1.49 augustss if (sc->sc_child != NULL)
359 1.49 augustss rv = config_deactivate(sc->sc_child);
360 1.83 augustss sc->sc_dying = 1;
361 1.47 augustss break;
362 1.47 augustss }
363 1.47 augustss return (rv);
364 1.47 augustss }
365 1.47 augustss
366 1.47 augustss int
367 1.91 augustss ohci_detach(struct ohci_softc *sc, int flags)
368 1.47 augustss {
369 1.47 augustss int rv = 0;
370 1.47 augustss
371 1.47 augustss if (sc->sc_child != NULL)
372 1.47 augustss rv = config_detach(sc->sc_child, flags);
373 1.101.2.6 nathanw
374 1.47 augustss if (rv != 0)
375 1.47 augustss return (rv);
376 1.47 augustss
377 1.101.2.3 nathanw usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
378 1.101.2.3 nathanw
379 1.71 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
380 1.47 augustss powerhook_disestablish(sc->sc_powerhook);
381 1.59 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
382 1.71 augustss #endif
383 1.59 augustss
384 1.101.2.5 nathanw usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
385 1.101.2.5 nathanw
386 1.47 augustss /* free data structures XXX */
387 1.47 augustss
388 1.47 augustss return (rv);
389 1.47 augustss }
390 1.55 augustss #endif
391 1.47 augustss
392 1.1 augustss ohci_soft_ed_t *
393 1.91 augustss ohci_alloc_sed(ohci_softc_t *sc)
394 1.1 augustss {
395 1.1 augustss ohci_soft_ed_t *sed;
396 1.53 augustss usbd_status err;
397 1.1 augustss int i, offs;
398 1.4 augustss usb_dma_t dma;
399 1.1 augustss
400 1.53 augustss if (sc->sc_freeeds == NULL) {
401 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
402 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
403 1.53 augustss OHCI_ED_ALIGN, &dma);
404 1.53 augustss if (err)
405 1.39 augustss return (0);
406 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
407 1.39 augustss offs = i * OHCI_SED_SIZE;
408 1.101.2.8 nathanw sed = KERNADDR(&dma, offs);
409 1.101.2.8 nathanw sed->physaddr = DMAADDR(&dma, offs);
410 1.1 augustss sed->next = sc->sc_freeeds;
411 1.1 augustss sc->sc_freeeds = sed;
412 1.1 augustss }
413 1.1 augustss }
414 1.1 augustss sed = sc->sc_freeeds;
415 1.1 augustss sc->sc_freeeds = sed->next;
416 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
417 1.1 augustss sed->next = 0;
418 1.39 augustss return (sed);
419 1.1 augustss }
420 1.1 augustss
421 1.1 augustss void
422 1.91 augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
423 1.1 augustss {
424 1.1 augustss sed->next = sc->sc_freeeds;
425 1.1 augustss sc->sc_freeeds = sed;
426 1.1 augustss }
427 1.1 augustss
428 1.1 augustss ohci_soft_td_t *
429 1.91 augustss ohci_alloc_std(ohci_softc_t *sc)
430 1.1 augustss {
431 1.1 augustss ohci_soft_td_t *std;
432 1.53 augustss usbd_status err;
433 1.1 augustss int i, offs;
434 1.4 augustss usb_dma_t dma;
435 1.69 augustss int s;
436 1.1 augustss
437 1.53 augustss if (sc->sc_freetds == NULL) {
438 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
439 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
440 1.53 augustss OHCI_TD_ALIGN, &dma);
441 1.53 augustss if (err)
442 1.83 augustss return (NULL);
443 1.69 augustss s = splusb();
444 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
445 1.39 augustss offs = i * OHCI_STD_SIZE;
446 1.101.2.8 nathanw std = KERNADDR(&dma, offs);
447 1.101.2.8 nathanw std->physaddr = DMAADDR(&dma, offs);
448 1.1 augustss std->nexttd = sc->sc_freetds;
449 1.1 augustss sc->sc_freetds = std;
450 1.1 augustss }
451 1.69 augustss splx(s);
452 1.1 augustss }
453 1.69 augustss
454 1.69 augustss s = splusb();
455 1.1 augustss std = sc->sc_freetds;
456 1.1 augustss sc->sc_freetds = std->nexttd;
457 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
458 1.83 augustss std->nexttd = NULL;
459 1.83 augustss std->xfer = NULL;
460 1.69 augustss ohci_hash_add_td(sc, std);
461 1.69 augustss splx(s);
462 1.69 augustss
463 1.1 augustss return (std);
464 1.1 augustss }
465 1.1 augustss
466 1.1 augustss void
467 1.91 augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
468 1.1 augustss {
469 1.69 augustss int s;
470 1.69 augustss
471 1.69 augustss s = splusb();
472 1.69 augustss ohci_hash_rem_td(sc, std);
473 1.1 augustss std->nexttd = sc->sc_freetds;
474 1.1 augustss sc->sc_freetds = std;
475 1.69 augustss splx(s);
476 1.1 augustss }
477 1.1 augustss
478 1.1 augustss usbd_status
479 1.91 augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
480 1.91 augustss int alen, int rd, usbd_xfer_handle xfer,
481 1.91 augustss ohci_soft_td_t *sp, ohci_soft_td_t **ep)
482 1.48 augustss {
483 1.48 augustss ohci_soft_td_t *next, *cur;
484 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
485 1.77 augustss u_int32_t tdflags;
486 1.75 augustss int len, curlen;
487 1.77 augustss usb_dma_t *dma = &xfer->dmabuf;
488 1.77 augustss u_int16_t flags = xfer->flags;
489 1.48 augustss
490 1.75 augustss DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
491 1.75 augustss
492 1.75 augustss len = alen;
493 1.48 augustss cur = sp;
494 1.101.2.8 nathanw dataphys = DMAADDR(dma, 0);
495 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
496 1.77 augustss tdflags = htole32(
497 1.101.2.6 nathanw (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
498 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
499 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
500 1.61 augustss
501 1.48 augustss for (;;) {
502 1.48 augustss next = ohci_alloc_std(sc);
503 1.75 augustss if (next == NULL)
504 1.61 augustss goto nomem;
505 1.48 augustss
506 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
507 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
508 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
509 1.48 augustss /* we can handle it in this TD */
510 1.48 augustss curlen = len;
511 1.48 augustss } else {
512 1.48 augustss /* must use multiple TDs, fill as much as possible. */
513 1.101.2.6 nathanw curlen = 2 * OHCI_PAGE_SIZE -
514 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
515 1.78 augustss /* the length must be a multiple of the max size */
516 1.78 augustss curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
517 1.78 augustss #ifdef DIAGNOSTIC
518 1.78 augustss if (curlen == 0)
519 1.78 augustss panic("ohci_alloc_std: curlen == 0\n");
520 1.78 augustss #endif
521 1.48 augustss }
522 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
523 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
524 1.48 augustss dataphys, dataphysend,
525 1.48 augustss len, curlen));
526 1.48 augustss len -= curlen;
527 1.48 augustss
528 1.77 augustss cur->td.td_flags = tdflags;
529 1.76 tsutsui cur->td.td_cbp = htole32(dataphys);
530 1.48 augustss cur->nexttd = next;
531 1.76 tsutsui cur->td.td_nexttd = htole32(next->physaddr);
532 1.76 tsutsui cur->td.td_be = htole32(dataphys + curlen - 1);
533 1.48 augustss cur->len = curlen;
534 1.48 augustss cur->flags = OHCI_ADD_LEN;
535 1.77 augustss cur->xfer = xfer;
536 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
537 1.48 augustss dataphys, dataphys + curlen - 1));
538 1.48 augustss if (len == 0)
539 1.48 augustss break;
540 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
541 1.48 augustss dataphys += curlen;
542 1.48 augustss cur = next;
543 1.48 augustss }
544 1.61 augustss if ((flags & USBD_FORCE_SHORT_XFER) &&
545 1.75 augustss alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
546 1.61 augustss /* Force a 0 length transfer at the end. */
547 1.75 augustss
548 1.75 augustss cur = next;
549 1.61 augustss next = ohci_alloc_std(sc);
550 1.75 augustss if (next == NULL)
551 1.61 augustss goto nomem;
552 1.61 augustss
553 1.77 augustss cur->td.td_flags = tdflags;
554 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
555 1.61 augustss cur->nexttd = next;
556 1.76 tsutsui cur->td.td_nexttd = htole32(next->physaddr);
557 1.75 augustss cur->td.td_be = ~0;
558 1.61 augustss cur->len = 0;
559 1.61 augustss cur->flags = 0;
560 1.77 augustss cur->xfer = xfer;
561 1.61 augustss DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
562 1.61 augustss }
563 1.77 augustss *ep = cur;
564 1.48 augustss
565 1.48 augustss return (USBD_NORMAL_COMPLETION);
566 1.61 augustss
567 1.61 augustss nomem:
568 1.61 augustss /* XXX free chain */
569 1.61 augustss return (USBD_NOMEM);
570 1.48 augustss }
571 1.48 augustss
572 1.53 augustss #if 0
573 1.82 augustss Static void
574 1.101.2.6 nathanw ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
575 1.91 augustss ohci_soft_td_t *stdend)
576 1.48 augustss {
577 1.48 augustss ohci_soft_td_t *p;
578 1.48 augustss
579 1.48 augustss for (; std != stdend; std = p) {
580 1.48 augustss p = std->nexttd;
581 1.48 augustss ohci_free_std(sc, std);
582 1.48 augustss }
583 1.48 augustss }
584 1.53 augustss #endif
585 1.48 augustss
586 1.60 augustss ohci_soft_itd_t *
587 1.91 augustss ohci_alloc_sitd(ohci_softc_t *sc)
588 1.60 augustss {
589 1.60 augustss ohci_soft_itd_t *sitd;
590 1.60 augustss usbd_status err;
591 1.83 augustss int i, s, offs;
592 1.60 augustss usb_dma_t dma;
593 1.60 augustss
594 1.60 augustss if (sc->sc_freeitds == NULL) {
595 1.60 augustss DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
596 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
597 1.83 augustss OHCI_ITD_ALIGN, &dma);
598 1.60 augustss if (err)
599 1.83 augustss return (NULL);
600 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
601 1.83 augustss offs = i * OHCI_SITD_SIZE;
602 1.101.2.8 nathanw sitd = KERNADDR(&dma, offs);
603 1.101.2.8 nathanw sitd->physaddr = DMAADDR(&dma, offs);
604 1.60 augustss sitd->nextitd = sc->sc_freeitds;
605 1.60 augustss sc->sc_freeitds = sitd;
606 1.60 augustss }
607 1.60 augustss }
608 1.83 augustss
609 1.83 augustss s = splusb();
610 1.60 augustss sitd = sc->sc_freeitds;
611 1.60 augustss sc->sc_freeitds = sitd->nextitd;
612 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
613 1.83 augustss sitd->nextitd = NULL;
614 1.83 augustss sitd->xfer = NULL;
615 1.83 augustss ohci_hash_add_itd(sc, sitd);
616 1.83 augustss splx(s);
617 1.83 augustss
618 1.83 augustss #ifdef DIAGNOSTIC
619 1.83 augustss sitd->isdone = 0;
620 1.83 augustss #endif
621 1.83 augustss
622 1.60 augustss return (sitd);
623 1.60 augustss }
624 1.60 augustss
625 1.60 augustss void
626 1.91 augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
627 1.60 augustss {
628 1.83 augustss int s;
629 1.83 augustss
630 1.83 augustss DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
631 1.83 augustss
632 1.83 augustss #ifdef DIAGNOSTIC
633 1.83 augustss if (!sitd->isdone) {
634 1.83 augustss panic("ohci_free_sitd: sitd=%p not done\n", sitd);
635 1.83 augustss return;
636 1.83 augustss }
637 1.83 augustss #endif
638 1.83 augustss
639 1.83 augustss s = splusb();
640 1.83 augustss ohci_hash_rem_itd(sc, sitd);
641 1.60 augustss sitd->nextitd = sc->sc_freeitds;
642 1.60 augustss sc->sc_freeitds = sitd;
643 1.83 augustss splx(s);
644 1.60 augustss }
645 1.60 augustss
646 1.48 augustss usbd_status
647 1.91 augustss ohci_init(ohci_softc_t *sc)
648 1.1 augustss {
649 1.1 augustss ohci_soft_ed_t *sed, *psed;
650 1.53 augustss usbd_status err;
651 1.1 augustss int i;
652 1.68 augustss u_int32_t s, ctl, ival, hcr, fm, per, rev, desca;
653 1.16 augustss
654 1.1 augustss DPRINTF(("ohci_init: start\n"));
655 1.36 augustss #if defined(__OpenBSD__)
656 1.55 augustss printf(",");
657 1.36 augustss #else
658 1.55 augustss printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
659 1.36 augustss #endif
660 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
661 1.55 augustss printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
662 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
663 1.55 augustss
664 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
665 1.101.2.6 nathanw printf("%s: unsupported OHCI revision\n",
666 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
667 1.56 augustss sc->sc_bus.usbrev = USBREV_UNKNOWN;
668 1.1 augustss return (USBD_INVAL);
669 1.1 augustss }
670 1.56 augustss sc->sc_bus.usbrev = USBREV_1_0;
671 1.1 augustss
672 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
673 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
674 1.83 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
675 1.83 augustss LIST_INIT(&sc->sc_hash_itds[i]);
676 1.1 augustss
677 1.62 augustss SIMPLEQ_INIT(&sc->sc_free_xfers);
678 1.62 augustss
679 1.73 augustss /* XXX determine alignment by R/W */
680 1.1 augustss /* Allocate the HCCA area. */
681 1.101.2.6 nathanw err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
682 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
683 1.53 augustss if (err)
684 1.53 augustss return (err);
685 1.101.2.8 nathanw sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
686 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
687 1.1 augustss
688 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
689 1.1 augustss
690 1.60 augustss /* Allocate dummy ED that starts the control list. */
691 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
692 1.53 augustss if (sc->sc_ctrl_head == NULL) {
693 1.53 augustss err = USBD_NOMEM;
694 1.1 augustss goto bad1;
695 1.1 augustss }
696 1.76 tsutsui sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
697 1.34 augustss
698 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
699 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
700 1.53 augustss if (sc->sc_bulk_head == NULL) {
701 1.53 augustss err = USBD_NOMEM;
702 1.1 augustss goto bad2;
703 1.1 augustss }
704 1.76 tsutsui sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
705 1.1 augustss
706 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
707 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
708 1.60 augustss if (sc->sc_isoc_head == NULL) {
709 1.60 augustss err = USBD_NOMEM;
710 1.60 augustss goto bad3;
711 1.60 augustss }
712 1.76 tsutsui sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
713 1.60 augustss
714 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
715 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
716 1.1 augustss sed = ohci_alloc_sed(sc);
717 1.53 augustss if (sed == NULL) {
718 1.1 augustss while (--i >= 0)
719 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
720 1.53 augustss err = USBD_NOMEM;
721 1.60 augustss goto bad4;
722 1.1 augustss }
723 1.1 augustss /* All ED fields are set to 0. */
724 1.1 augustss sc->sc_eds[i] = sed;
725 1.76 tsutsui sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
726 1.60 augustss if (i != 0)
727 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
728 1.60 augustss else
729 1.60 augustss psed= sc->sc_isoc_head;
730 1.60 augustss sed->next = psed;
731 1.76 tsutsui sed->ed.ed_nexted = htole32(psed->physaddr);
732 1.1 augustss }
733 1.101.2.6 nathanw /*
734 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
735 1.1 augustss * the tree set up properly to spread the interrupts.
736 1.1 augustss */
737 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
738 1.101.2.6 nathanw sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
739 1.76 tsutsui htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
740 1.1 augustss
741 1.73 augustss #ifdef OHCI_DEBUG
742 1.73 augustss if (ohcidebug > 15) {
743 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
744 1.73 augustss printf("ed#%d ", i);
745 1.73 augustss ohci_dump_ed(sc->sc_eds[i]);
746 1.73 augustss }
747 1.73 augustss printf("iso ");
748 1.73 augustss ohci_dump_ed(sc->sc_isoc_head);
749 1.73 augustss }
750 1.73 augustss #endif
751 1.73 augustss
752 1.1 augustss /* Determine in what context we are running. */
753 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
754 1.1 augustss if (ctl & OHCI_IR) {
755 1.1 augustss /* SMM active, request change */
756 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
757 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
758 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
759 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
760 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
761 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
762 1.1 augustss }
763 1.1 augustss if ((ctl & OHCI_IR) == 0) {
764 1.15 augustss printf("%s: SMM does not respond, resetting\n",
765 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
766 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
767 1.1 augustss goto reset;
768 1.1 augustss }
769 1.101.2.2 nathanw #if 0
770 1.101.2.2 nathanw /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
771 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
772 1.1 augustss /* BIOS started controller. */
773 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
774 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
775 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
776 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
777 1.1 augustss }
778 1.101.2.2 nathanw #endif
779 1.1 augustss } else {
780 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
781 1.1 augustss reset:
782 1.1 augustss /* Controller was cold started. */
783 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
784 1.1 augustss }
785 1.1 augustss
786 1.16 augustss /*
787 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
788 1.25 augustss * without it some controllers do not start.
789 1.16 augustss */
790 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
791 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
792 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
793 1.16 augustss
794 1.1 augustss /* We now own the host controller and the bus has been reset. */
795 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
796 1.1 augustss
797 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
798 1.1 augustss /* Nominal time for a reset is 10 us. */
799 1.1 augustss for (i = 0; i < 10; i++) {
800 1.1 augustss delay(10);
801 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
802 1.1 augustss if (!hcr)
803 1.1 augustss break;
804 1.1 augustss }
805 1.1 augustss if (hcr) {
806 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
807 1.53 augustss err = USBD_IOERROR;
808 1.60 augustss goto bad5;
809 1.1 augustss }
810 1.52 augustss #ifdef OHCI_DEBUG
811 1.1 augustss if (ohcidebug > 15)
812 1.1 augustss ohci_dumpregs(sc);
813 1.1 augustss #endif
814 1.1 augustss
815 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
816 1.1 augustss
817 1.1 augustss /* Set up HC registers. */
818 1.101.2.8 nathanw OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
819 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
820 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
821 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
822 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
823 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
824 1.55 augustss /* switch on desired functional features */
825 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
826 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
827 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
828 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
829 1.1 augustss /* And finally start it! */
830 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
831 1.1 augustss
832 1.1 augustss /*
833 1.1 augustss * The controller is now OPERATIONAL. Set a some final
834 1.1 augustss * registers that should be set earlier, but that the
835 1.1 augustss * controller ignores when in the SUSPEND state.
836 1.1 augustss */
837 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
838 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
839 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
840 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
841 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
842 1.1 augustss
843 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
844 1.68 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
845 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
846 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
847 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
848 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
849 1.1 augustss
850 1.85 augustss /*
851 1.85 augustss * The AMD756 requires a delay before re-reading the register,
852 1.85 augustss * otherwise it will occasionally report 0 ports.
853 1.85 augustss */
854 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
855 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
856 1.1 augustss
857 1.52 augustss #ifdef OHCI_DEBUG
858 1.1 augustss if (ohcidebug > 5)
859 1.1 augustss ohci_dumpregs(sc);
860 1.1 augustss #endif
861 1.101.2.6 nathanw
862 1.1 augustss /* Set up the bus struct. */
863 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
864 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
865 1.1 augustss
866 1.71 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
867 1.101 minoura sc->sc_control = sc->sc_intre = 0;
868 1.47 augustss sc->sc_powerhook = powerhook_establish(ohci_power, sc);
869 1.59 augustss sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
870 1.71 augustss #endif
871 1.59 augustss
872 1.101.2.3 nathanw usb_callout_init(sc->sc_tmo_rhsc);
873 1.101.2.3 nathanw
874 1.1 augustss return (USBD_NORMAL_COMPLETION);
875 1.1 augustss
876 1.60 augustss bad5:
877 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
878 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
879 1.60 augustss bad4:
880 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
881 1.1 augustss bad3:
882 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
883 1.1 augustss bad2:
884 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
885 1.1 augustss bad1:
886 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
887 1.53 augustss return (err);
888 1.1 augustss }
889 1.1 augustss
890 1.42 augustss usbd_status
891 1.91 augustss ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
892 1.42 augustss {
893 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
894 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
895 1.52 augustss #endif
896 1.42 augustss
897 1.44 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
898 1.42 augustss }
899 1.42 augustss
900 1.42 augustss void
901 1.91 augustss ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
902 1.42 augustss {
903 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
904 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
905 1.52 augustss #endif
906 1.42 augustss
907 1.44 augustss usb_freemem(&sc->sc_bus, dma);
908 1.62 augustss }
909 1.62 augustss
910 1.62 augustss usbd_xfer_handle
911 1.91 augustss ohci_allocx(struct usbd_bus *bus)
912 1.62 augustss {
913 1.62 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
914 1.62 augustss usbd_xfer_handle xfer;
915 1.62 augustss
916 1.62 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
917 1.101.2.5 nathanw if (xfer != NULL) {
918 1.101.2.8 nathanw SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
919 1.101.2.5 nathanw #ifdef DIAGNOSTIC
920 1.101.2.5 nathanw if (xfer->busy_free != XFER_FREE) {
921 1.101.2.5 nathanw printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
922 1.101.2.5 nathanw xfer->busy_free);
923 1.101.2.5 nathanw }
924 1.101.2.5 nathanw #endif
925 1.101.2.5 nathanw } else {
926 1.101.2.5 nathanw xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
927 1.101.2.5 nathanw }
928 1.101.2.5 nathanw if (xfer != NULL) {
929 1.101.2.5 nathanw memset(xfer, 0, sizeof (struct ohci_xfer));
930 1.101.2.5 nathanw #ifdef DIAGNOSTIC
931 1.101.2.5 nathanw xfer->busy_free = XFER_BUSY;
932 1.101.2.5 nathanw #endif
933 1.101.2.5 nathanw }
934 1.62 augustss return (xfer);
935 1.62 augustss }
936 1.62 augustss
937 1.62 augustss void
938 1.91 augustss ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
939 1.62 augustss {
940 1.62 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
941 1.62 augustss
942 1.101.2.5 nathanw #ifdef DIAGNOSTIC
943 1.101.2.5 nathanw if (xfer->busy_free != XFER_BUSY) {
944 1.101.2.5 nathanw printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
945 1.101.2.5 nathanw xfer->busy_free);
946 1.101.2.5 nathanw return;
947 1.101.2.5 nathanw }
948 1.101.2.5 nathanw xfer->busy_free = XFER_FREE;
949 1.101.2.5 nathanw #endif
950 1.62 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
951 1.42 augustss }
952 1.42 augustss
953 1.59 augustss /*
954 1.59 augustss * Shut down the controller when the system is going down.
955 1.59 augustss */
956 1.59 augustss void
957 1.91 augustss ohci_shutdown(void *v)
958 1.59 augustss {
959 1.59 augustss ohci_softc_t *sc = v;
960 1.59 augustss
961 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
962 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
963 1.59 augustss }
964 1.59 augustss
965 1.59 augustss /*
966 1.59 augustss * Handle suspend/resume.
967 1.59 augustss *
968 1.59 augustss * We need to switch to polling mode here, because this routine is
969 1.59 augustss * called from an intterupt context. This is all right since we
970 1.59 augustss * are almost suspended anyway.
971 1.59 augustss */
972 1.33 augustss void
973 1.91 augustss ohci_power(int why, void *v)
974 1.33 augustss {
975 1.33 augustss ohci_softc_t *sc = v;
976 1.97 augustss u_int32_t ctl;
977 1.95 augustss int s;
978 1.33 augustss
979 1.95 augustss #ifdef OHCI_DEBUG
980 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
981 1.33 augustss ohci_dumpregs(sc);
982 1.33 augustss #endif
983 1.95 augustss
984 1.98 augustss s = splhardusb();
985 1.95 augustss switch (why) {
986 1.95 augustss case PWR_SUSPEND:
987 1.95 augustss case PWR_STANDBY:
988 1.97 augustss sc->sc_bus.use_polling++;
989 1.101 minoura ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
990 1.101 minoura if (sc->sc_control == 0) {
991 1.101 minoura /*
992 1.101 minoura * Preserve register values, in case that APM BIOS
993 1.101 minoura * does not recover them.
994 1.101 minoura */
995 1.101 minoura sc->sc_control = ctl;
996 1.101 minoura sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
997 1.101 minoura }
998 1.101 minoura ctl |= OHCI_HCFS_SUSPEND;
999 1.97 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
1000 1.97 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1001 1.97 augustss sc->sc_bus.use_polling--;
1002 1.95 augustss break;
1003 1.95 augustss case PWR_RESUME:
1004 1.97 augustss sc->sc_bus.use_polling++;
1005 1.101 minoura /* Some broken BIOSes do not recover these values */
1006 1.101.2.8 nathanw OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1007 1.101 minoura OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
1008 1.101 minoura OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
1009 1.101 minoura if (sc->sc_intre)
1010 1.101 minoura OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1011 1.101 minoura sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1012 1.101 minoura if (sc->sc_control)
1013 1.101 minoura ctl = sc->sc_control;
1014 1.101 minoura else
1015 1.101 minoura ctl = OREAD4(sc, OHCI_CONTROL);
1016 1.101 minoura ctl |= OHCI_HCFS_RESUME;
1017 1.97 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
1018 1.97 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1019 1.97 augustss ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1020 1.97 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
1021 1.97 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1022 1.101 minoura sc->sc_control = sc->sc_intre = 0;
1023 1.97 augustss sc->sc_bus.use_polling--;
1024 1.95 augustss break;
1025 1.95 augustss case PWR_SOFTSUSPEND:
1026 1.95 augustss case PWR_SOFTSTANDBY:
1027 1.95 augustss case PWR_SOFTRESUME:
1028 1.95 augustss break;
1029 1.95 augustss }
1030 1.95 augustss splx(s);
1031 1.33 augustss }
1032 1.33 augustss
1033 1.52 augustss #ifdef OHCI_DEBUG
1034 1.1 augustss void
1035 1.91 augustss ohci_dumpregs(ohci_softc_t *sc)
1036 1.1 augustss {
1037 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1038 1.41 augustss OREAD4(sc, OHCI_REVISION),
1039 1.41 augustss OREAD4(sc, OHCI_CONTROL),
1040 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1041 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1042 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
1043 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1044 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1045 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1046 1.41 augustss OREAD4(sc, OHCI_HCCA),
1047 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1048 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1049 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1050 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1051 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1052 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1053 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1054 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1055 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1056 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
1057 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1058 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1059 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1060 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
1061 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1062 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1063 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1064 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
1065 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
1066 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1067 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1068 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1069 1.76 tsutsui le32toh(sc->sc_hcca->hcca_frame_number),
1070 1.76 tsutsui le32toh(sc->sc_hcca->hcca_done_head)));
1071 1.1 augustss }
1072 1.1 augustss #endif
1073 1.1 augustss
1074 1.91 augustss Static int ohci_intr1(ohci_softc_t *);
1075 1.53 augustss
1076 1.1 augustss int
1077 1.91 augustss ohci_intr(void *p)
1078 1.1 augustss {
1079 1.1 augustss ohci_softc_t *sc = p;
1080 1.53 augustss
1081 1.101.2.5 nathanw if (sc == NULL || sc->sc_dying)
1082 1.101.2.5 nathanw return (0);
1083 1.101.2.5 nathanw
1084 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
1085 1.57 augustss if (sc->sc_bus.use_polling) {
1086 1.57 augustss #ifdef DIAGNOSTIC
1087 1.57 augustss printf("ohci_intr: ignored interrupt while polling\n");
1088 1.57 augustss #endif
1089 1.53 augustss return (0);
1090 1.57 augustss }
1091 1.53 augustss
1092 1.101.2.6 nathanw return (ohci_intr1(sc));
1093 1.53 augustss }
1094 1.53 augustss
1095 1.82 augustss Static int
1096 1.91 augustss ohci_intr1(ohci_softc_t *sc)
1097 1.53 augustss {
1098 1.1 augustss u_int32_t intrs, eintrs;
1099 1.1 augustss ohci_physaddr_t done;
1100 1.1 augustss
1101 1.101.2.4 nathanw DPRINTFN(14,("ohci_intr1: enter\n"));
1102 1.101.2.4 nathanw
1103 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1104 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1105 1.15 augustss #ifdef DIAGNOSTIC
1106 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1107 1.15 augustss #endif
1108 1.15 augustss return (0);
1109 1.15 augustss }
1110 1.15 augustss
1111 1.27 augustss intrs = 0;
1112 1.76 tsutsui done = le32toh(sc->sc_hcca->hcca_done_head);
1113 1.1 augustss if (done != 0) {
1114 1.26 augustss if (done & ~OHCI_DONE_INTRS)
1115 1.26 augustss intrs = OHCI_WDH;
1116 1.1 augustss if (done & OHCI_DONE_INTRS)
1117 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1118 1.101.2.8 nathanw sc->sc_hcca->hcca_done_head = 0;
1119 1.1 augustss } else
1120 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1121 1.55 augustss
1122 1.1 augustss if (!intrs)
1123 1.1 augustss return (0);
1124 1.55 augustss
1125 1.1 augustss intrs &= ~OHCI_MIE;
1126 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1127 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1128 1.1 augustss if (!eintrs)
1129 1.1 augustss return (0);
1130 1.1 augustss
1131 1.45 augustss sc->sc_bus.intr_context++;
1132 1.44 augustss sc->sc_bus.no_intrs++;
1133 1.101.2.6 nathanw DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1134 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1135 1.1 augustss (u_int)eintrs));
1136 1.1 augustss
1137 1.1 augustss if (eintrs & OHCI_SO) {
1138 1.100 augustss sc->sc_overrun_cnt++;
1139 1.100 augustss if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1140 1.100 augustss printf("%s: %u scheduling overruns\n",
1141 1.100 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1142 1.100 augustss sc->sc_overrun_cnt = 0;
1143 1.100 augustss }
1144 1.1 augustss /* XXX do what */
1145 1.101.2.4 nathanw eintrs &= ~OHCI_SO;
1146 1.1 augustss }
1147 1.1 augustss if (eintrs & OHCI_WDH) {
1148 1.83 augustss ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1149 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1150 1.101.2.4 nathanw eintrs &= ~OHCI_WDH;
1151 1.1 augustss }
1152 1.1 augustss if (eintrs & OHCI_RD) {
1153 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1154 1.1 augustss /* XXX process resume detect */
1155 1.1 augustss }
1156 1.1 augustss if (eintrs & OHCI_UE) {
1157 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1158 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
1159 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1160 1.1 augustss /* XXX what else */
1161 1.1 augustss }
1162 1.1 augustss if (eintrs & OHCI_RHSC) {
1163 1.53 augustss ohci_rhsc(sc, sc->sc_intrxfer);
1164 1.101.2.6 nathanw /*
1165 1.1 augustss * Disable RHSC interrupt for now, because it will be
1166 1.1 augustss * on until the port has been reset.
1167 1.1 augustss */
1168 1.1 augustss ohci_rhsc_able(sc, 0);
1169 1.101.2.3 nathanw /* Do not allow RHSC interrupts > 1 per second */
1170 1.101.2.3 nathanw usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1171 1.101.2.4 nathanw eintrs &= ~OHCI_RHSC;
1172 1.1 augustss }
1173 1.1 augustss
1174 1.45 augustss sc->sc_bus.intr_context--;
1175 1.44 augustss
1176 1.101.2.4 nathanw if (eintrs != 0) {
1177 1.101.2.4 nathanw /* Block unprocessed interrupts. XXX */
1178 1.101.2.4 nathanw OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1179 1.101.2.4 nathanw sc->sc_eintrs &= ~eintrs;
1180 1.101.2.4 nathanw printf("%s: blocking intrs 0x%x\n",
1181 1.101.2.4 nathanw USBDEVNAME(sc->sc_bus.bdev), eintrs);
1182 1.101.2.4 nathanw }
1183 1.1 augustss
1184 1.1 augustss return (1);
1185 1.1 augustss }
1186 1.1 augustss
1187 1.1 augustss void
1188 1.91 augustss ohci_rhsc_able(ohci_softc_t *sc, int on)
1189 1.1 augustss {
1190 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1191 1.1 augustss if (on) {
1192 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
1193 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1194 1.1 augustss } else {
1195 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
1196 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1197 1.1 augustss }
1198 1.101.2.3 nathanw }
1199 1.101.2.3 nathanw
1200 1.101.2.3 nathanw void
1201 1.101.2.3 nathanw ohci_rhsc_enable(void *v_sc)
1202 1.101.2.3 nathanw {
1203 1.101.2.3 nathanw ohci_softc_t *sc = v_sc;
1204 1.101.2.3 nathanw
1205 1.101.2.3 nathanw ohci_rhsc_able(sc, 1);
1206 1.1 augustss }
1207 1.1 augustss
1208 1.52 augustss #ifdef OHCI_DEBUG
1209 1.13 augustss char *ohci_cc_strs[] = {
1210 1.13 augustss "NO_ERROR",
1211 1.13 augustss "CRC",
1212 1.13 augustss "BIT_STUFFING",
1213 1.13 augustss "DATA_TOGGLE_MISMATCH",
1214 1.13 augustss "STALL",
1215 1.13 augustss "DEVICE_NOT_RESPONDING",
1216 1.13 augustss "PID_CHECK_FAILURE",
1217 1.13 augustss "UNEXPECTED_PID",
1218 1.13 augustss "DATA_OVERRUN",
1219 1.13 augustss "DATA_UNDERRUN",
1220 1.13 augustss "BUFFER_OVERRUN",
1221 1.13 augustss "BUFFER_UNDERRUN",
1222 1.67 augustss "reserved",
1223 1.67 augustss "reserved",
1224 1.67 augustss "NOT_ACCESSED",
1225 1.13 augustss "NOT_ACCESSED",
1226 1.13 augustss };
1227 1.13 augustss #endif
1228 1.13 augustss
1229 1.1 augustss void
1230 1.91 augustss ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1231 1.83 augustss {
1232 1.83 augustss ohci_soft_itd_t *sitd, *sidone, **ip;
1233 1.83 augustss ohci_soft_td_t *std, *sdone, **p;
1234 1.83 augustss
1235 1.83 augustss /* Reverse the done list. */
1236 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1237 1.83 augustss std = ohci_hash_find_td(sc, done);
1238 1.83 augustss if (std != NULL) {
1239 1.83 augustss std->dnext = sdone;
1240 1.83 augustss done = le32toh(std->td.td_nexttd);
1241 1.83 augustss sdone = std;
1242 1.83 augustss DPRINTFN(10,("add TD %p\n", std));
1243 1.83 augustss continue;
1244 1.83 augustss }
1245 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1246 1.83 augustss if (sitd != NULL) {
1247 1.83 augustss sitd->dnext = sidone;
1248 1.83 augustss done = le32toh(sitd->itd.itd_nextitd);
1249 1.83 augustss sidone = sitd;
1250 1.83 augustss DPRINTFN(5,("add ITD %p\n", sitd));
1251 1.83 augustss continue;
1252 1.83 augustss }
1253 1.83 augustss panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done);
1254 1.83 augustss }
1255 1.83 augustss
1256 1.83 augustss /* sdone & sidone now hold the done lists. */
1257 1.83 augustss /* Put them on the already processed lists. */
1258 1.83 augustss for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1259 1.83 augustss ;
1260 1.83 augustss *p = sdone;
1261 1.83 augustss for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1262 1.83 augustss ;
1263 1.83 augustss *ip = sidone;
1264 1.83 augustss }
1265 1.83 augustss
1266 1.83 augustss void
1267 1.99 augustss ohci_softintr(void *v)
1268 1.72 augustss {
1269 1.99 augustss ohci_softc_t *sc = v;
1270 1.83 augustss ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1271 1.83 augustss ohci_soft_td_t *std, *sdone, *stdnext;
1272 1.53 augustss usbd_xfer_handle xfer;
1273 1.72 augustss int len, cc, s;
1274 1.72 augustss
1275 1.101.2.4 nathanw DPRINTFN(10,("ohci_softintr: enter\n:"));
1276 1.101.2.4 nathanw
1277 1.72 augustss sc->sc_bus.intr_context++;
1278 1.72 augustss
1279 1.72 augustss s = splhardusb();
1280 1.83 augustss sdone = sc->sc_sdone;
1281 1.83 augustss sc->sc_sdone = NULL;
1282 1.83 augustss sidone = sc->sc_sidone;
1283 1.83 augustss sc->sc_sidone = NULL;
1284 1.72 augustss splx(s);
1285 1.1 augustss
1286 1.101.2.4 nathanw DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1287 1.1 augustss
1288 1.52 augustss #ifdef OHCI_DEBUG
1289 1.1 augustss if (ohcidebug > 10) {
1290 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1291 1.1 augustss ohci_dump_tds(sdone);
1292 1.1 augustss }
1293 1.1 augustss #endif
1294 1.1 augustss
1295 1.48 augustss for (std = sdone; std; std = stdnext) {
1296 1.53 augustss xfer = std->xfer;
1297 1.48 augustss stdnext = std->dnext;
1298 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1299 1.69 augustss std, xfer, xfer ? xfer->hcpriv : 0));
1300 1.71 augustss if (xfer == NULL) {
1301 1.101.2.5 nathanw /*
1302 1.101.2.5 nathanw * xfer == NULL: There seems to be no xfer associated
1303 1.71 augustss * with this TD. It is tailp that happened to end up on
1304 1.71 augustss * the done queue.
1305 1.101.2.5 nathanw * Shouldn't happen, but some chips are broken(?).
1306 1.71 augustss */
1307 1.71 augustss continue;
1308 1.71 augustss }
1309 1.53 augustss if (xfer->status == USBD_CANCELLED ||
1310 1.53 augustss xfer->status == USBD_TIMEOUT) {
1311 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1312 1.53 augustss xfer));
1313 1.38 augustss /* Handled by abort routine. */
1314 1.83 augustss continue;
1315 1.83 augustss }
1316 1.83 augustss usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1317 1.83 augustss cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1318 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1319 1.34 augustss len = std->len;
1320 1.39 augustss if (std->td.td_cbp != 0)
1321 1.76 tsutsui len -= le32toh(std->td.td_be) -
1322 1.76 tsutsui le32toh(std->td.td_cbp) + 1;
1323 1.75 augustss DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n",
1324 1.75 augustss len, std->flags));
1325 1.48 augustss if (std->flags & OHCI_ADD_LEN)
1326 1.53 augustss xfer->actlen += len;
1327 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1328 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1329 1.53 augustss usb_transfer_complete(xfer);
1330 1.21 augustss }
1331 1.48 augustss ohci_free_std(sc, std);
1332 1.1 augustss } else {
1333 1.48 augustss /*
1334 1.48 augustss * Endpoint is halted. First unlink all the TDs
1335 1.48 augustss * belonging to the failed transfer, and then restart
1336 1.48 augustss * the endpoint.
1337 1.48 augustss */
1338 1.1 augustss ohci_soft_td_t *p, *n;
1339 1.101.2.6 nathanw struct ohci_pipe *opipe =
1340 1.53 augustss (struct ohci_pipe *)xfer->pipe;
1341 1.48 augustss
1342 1.71 augustss DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1343 1.76 tsutsui OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1344 1.76 tsutsui ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1345 1.48 augustss
1346 1.48 augustss /* remove TDs */
1347 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1348 1.1 augustss n = p->nexttd;
1349 1.1 augustss ohci_free_std(sc, p);
1350 1.1 augustss }
1351 1.48 augustss
1352 1.16 augustss /* clear halt */
1353 1.76 tsutsui opipe->sed->ed.ed_headp = htole32(p->physaddr);
1354 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1355 1.48 augustss
1356 1.1 augustss if (cc == OHCI_CC_STALL)
1357 1.53 augustss xfer->status = USBD_STALLED;
1358 1.1 augustss else
1359 1.53 augustss xfer->status = USBD_IOERROR;
1360 1.53 augustss usb_transfer_complete(xfer);
1361 1.1 augustss }
1362 1.1 augustss }
1363 1.72 augustss
1364 1.83 augustss #ifdef OHCI_DEBUG
1365 1.83 augustss if (ohcidebug > 10) {
1366 1.101.2.4 nathanw DPRINTF(("ohci_softintr: ITD done:\n"));
1367 1.83 augustss ohci_dump_itds(sidone);
1368 1.83 augustss }
1369 1.83 augustss #endif
1370 1.83 augustss
1371 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1372 1.83 augustss xfer = sitd->xfer;
1373 1.83 augustss sitdnext = sitd->dnext;
1374 1.83 augustss DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1375 1.83 augustss sitd, xfer, xfer ? xfer->hcpriv : 0));
1376 1.83 augustss if (xfer == NULL)
1377 1.83 augustss continue;
1378 1.83 augustss if (xfer->status == USBD_CANCELLED ||
1379 1.83 augustss xfer->status == USBD_TIMEOUT) {
1380 1.83 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1381 1.83 augustss xfer));
1382 1.83 augustss /* Handled by abort routine. */
1383 1.83 augustss continue;
1384 1.83 augustss }
1385 1.83 augustss #ifdef DIAGNOSTIC
1386 1.83 augustss if (sitd->isdone)
1387 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1388 1.83 augustss sitd->isdone = 1;
1389 1.83 augustss #endif
1390 1.83 augustss cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1391 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1392 1.83 augustss /* XXX compute length for input */
1393 1.101.2.6 nathanw struct ohci_pipe *opipe =
1394 1.83 augustss (struct ohci_pipe *)xfer->pipe;
1395 1.83 augustss if (sitd->flags & OHCI_CALL_DONE) {
1396 1.83 augustss opipe->u.iso.inuse -= xfer->nframes;
1397 1.94 augustss /* XXX update frlengths with actual length */
1398 1.83 augustss /* XXX xfer->actlen = actlen; */
1399 1.83 augustss xfer->status = USBD_NORMAL_COMPLETION;
1400 1.83 augustss usb_transfer_complete(xfer);
1401 1.83 augustss }
1402 1.83 augustss } else {
1403 1.83 augustss /* XXX Do more */
1404 1.83 augustss xfer->status = USBD_IOERROR;
1405 1.83 augustss usb_transfer_complete(xfer);
1406 1.83 augustss }
1407 1.83 augustss }
1408 1.83 augustss
1409 1.101.2.5 nathanw if (sc->sc_softwake) {
1410 1.101.2.5 nathanw sc->sc_softwake = 0;
1411 1.101.2.5 nathanw wakeup(&sc->sc_softwake);
1412 1.101.2.5 nathanw }
1413 1.101.2.5 nathanw
1414 1.72 augustss sc->sc_bus.intr_context--;
1415 1.101.2.4 nathanw DPRINTFN(10,("ohci_softintr: done:\n"));
1416 1.1 augustss }
1417 1.1 augustss
1418 1.1 augustss void
1419 1.91 augustss ohci_device_ctrl_done(usbd_xfer_handle xfer)
1420 1.1 augustss {
1421 1.53 augustss DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer));
1422 1.1 augustss
1423 1.38 augustss #ifdef DIAGNOSTIC
1424 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1425 1.8 augustss panic("ohci_ctrl_done: not a request\n");
1426 1.1 augustss }
1427 1.38 augustss #endif
1428 1.55 augustss xfer->hcpriv = NULL;
1429 1.1 augustss }
1430 1.1 augustss
1431 1.1 augustss void
1432 1.91 augustss ohci_device_intr_done(usbd_xfer_handle xfer)
1433 1.1 augustss {
1434 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1435 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1436 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1437 1.48 augustss ohci_soft_td_t *data, *tail;
1438 1.1 augustss
1439 1.1 augustss
1440 1.101.2.6 nathanw DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n",
1441 1.53 augustss xfer, xfer->actlen));
1442 1.1 augustss
1443 1.55 augustss xfer->hcpriv = NULL;
1444 1.38 augustss
1445 1.53 augustss if (xfer->pipe->repeat) {
1446 1.60 augustss data = opipe->tail.td;
1447 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1448 1.53 augustss if (tail == NULL) {
1449 1.53 augustss xfer->status = USBD_NOMEM;
1450 1.1 augustss return;
1451 1.1 augustss }
1452 1.55 augustss tail->xfer = NULL;
1453 1.101.2.6 nathanw
1454 1.76 tsutsui data->td.td_flags = htole32(
1455 1.101.2.6 nathanw OHCI_TD_IN | OHCI_TD_NOCC |
1456 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1457 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1458 1.76 tsutsui data->td.td_flags |= htole32(OHCI_TD_R);
1459 1.101.2.8 nathanw data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
1460 1.48 augustss data->nexttd = tail;
1461 1.76 tsutsui data->td.td_nexttd = htole32(tail->physaddr);
1462 1.76 tsutsui data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1463 1.76 tsutsui xfer->length - 1);
1464 1.53 augustss data->len = xfer->length;
1465 1.53 augustss data->xfer = xfer;
1466 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1467 1.53 augustss xfer->hcpriv = data;
1468 1.53 augustss xfer->actlen = 0;
1469 1.1 augustss
1470 1.76 tsutsui sed->ed.ed_tailp = htole32(tail->physaddr);
1471 1.60 augustss opipe->tail.td = tail;
1472 1.1 augustss }
1473 1.1 augustss }
1474 1.1 augustss
1475 1.1 augustss void
1476 1.91 augustss ohci_device_bulk_done(usbd_xfer_handle xfer)
1477 1.3 augustss {
1478 1.101.2.6 nathanw DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n",
1479 1.53 augustss xfer, xfer->actlen));
1480 1.3 augustss
1481 1.53 augustss xfer->hcpriv = NULL;
1482 1.3 augustss }
1483 1.3 augustss
1484 1.3 augustss void
1485 1.91 augustss ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1486 1.1 augustss {
1487 1.1 augustss usbd_pipe_handle pipe;
1488 1.1 augustss struct ohci_pipe *opipe;
1489 1.1 augustss u_char *p;
1490 1.1 augustss int i, m;
1491 1.1 augustss int hstatus;
1492 1.1 augustss
1493 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1494 1.101.2.6 nathanw DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1495 1.53 augustss sc, xfer, hstatus));
1496 1.1 augustss
1497 1.53 augustss if (xfer == NULL) {
1498 1.1 augustss /* Just ignore the change. */
1499 1.1 augustss return;
1500 1.1 augustss }
1501 1.1 augustss
1502 1.53 augustss pipe = xfer->pipe;
1503 1.1 augustss opipe = (struct ohci_pipe *)pipe;
1504 1.1 augustss
1505 1.101.2.8 nathanw p = KERNADDR(&xfer->dmabuf, 0);
1506 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1507 1.53 augustss memset(p, 0, xfer->length);
1508 1.1 augustss for (i = 1; i <= m; i++) {
1509 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1510 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1511 1.1 augustss p[i/8] |= 1 << (i%8);
1512 1.1 augustss }
1513 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1514 1.53 augustss xfer->actlen = xfer->length;
1515 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1516 1.1 augustss
1517 1.53 augustss usb_transfer_complete(xfer);
1518 1.38 augustss }
1519 1.38 augustss
1520 1.38 augustss void
1521 1.91 augustss ohci_root_intr_done(usbd_xfer_handle xfer)
1522 1.65 augustss {
1523 1.65 augustss xfer->hcpriv = NULL;
1524 1.65 augustss }
1525 1.65 augustss
1526 1.65 augustss void
1527 1.91 augustss ohci_root_ctrl_done(usbd_xfer_handle xfer)
1528 1.38 augustss {
1529 1.53 augustss xfer->hcpriv = NULL;
1530 1.1 augustss }
1531 1.1 augustss
1532 1.1 augustss /*
1533 1.1 augustss * Wait here until controller claims to have an interrupt.
1534 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1535 1.1 augustss * too long.
1536 1.1 augustss */
1537 1.1 augustss void
1538 1.91 augustss ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1539 1.1 augustss {
1540 1.53 augustss int timo = xfer->timeout;
1541 1.1 augustss int usecs;
1542 1.1 augustss u_int32_t intrs;
1543 1.1 augustss
1544 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1545 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1546 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1547 1.101.2.5 nathanw if (sc->sc_dying)
1548 1.101.2.5 nathanw break;
1549 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1550 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1551 1.52 augustss #ifdef OHCI_DEBUG
1552 1.1 augustss if (ohcidebug > 15)
1553 1.1 augustss ohci_dumpregs(sc);
1554 1.1 augustss #endif
1555 1.1 augustss if (intrs) {
1556 1.53 augustss ohci_intr1(sc);
1557 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1558 1.1 augustss return;
1559 1.1 augustss }
1560 1.1 augustss }
1561 1.15 augustss
1562 1.15 augustss /* Timeout */
1563 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1564 1.53 augustss xfer->status = USBD_TIMEOUT;
1565 1.53 augustss usb_transfer_complete(xfer);
1566 1.15 augustss /* XXX should free TD */
1567 1.5 augustss }
1568 1.5 augustss
1569 1.5 augustss void
1570 1.91 augustss ohci_poll(struct usbd_bus *bus)
1571 1.5 augustss {
1572 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1573 1.101.2.4 nathanw #ifdef OHCI_DEBUG
1574 1.101.2.4 nathanw static int last;
1575 1.101.2.4 nathanw int new;
1576 1.101.2.4 nathanw new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1577 1.101.2.4 nathanw if (new != last) {
1578 1.101.2.4 nathanw DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1579 1.101.2.4 nathanw last = new;
1580 1.101.2.4 nathanw }
1581 1.101.2.4 nathanw #endif
1582 1.5 augustss
1583 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1584 1.53 augustss ohci_intr1(sc);
1585 1.1 augustss }
1586 1.1 augustss
1587 1.1 augustss usbd_status
1588 1.91 augustss ohci_device_request(usbd_xfer_handle xfer)
1589 1.1 augustss {
1590 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1591 1.53 augustss usb_device_request_t *req = &xfer->request;
1592 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1593 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1594 1.1 augustss int addr = dev->address;
1595 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1596 1.1 augustss ohci_soft_ed_t *sed;
1597 1.1 augustss int isread;
1598 1.1 augustss int len;
1599 1.53 augustss usbd_status err;
1600 1.1 augustss int s;
1601 1.1 augustss
1602 1.1 augustss isread = req->bmRequestType & UT_READ;
1603 1.1 augustss len = UGETW(req->wLength);
1604 1.1 augustss
1605 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1606 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1607 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1608 1.101.2.6 nathanw UGETW(req->wIndex), len, addr,
1609 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1610 1.1 augustss
1611 1.60 augustss setup = opipe->tail.td;
1612 1.1 augustss stat = ohci_alloc_std(sc);
1613 1.53 augustss if (stat == NULL) {
1614 1.53 augustss err = USBD_NOMEM;
1615 1.1 augustss goto bad1;
1616 1.1 augustss }
1617 1.1 augustss tail = ohci_alloc_std(sc);
1618 1.53 augustss if (tail == NULL) {
1619 1.53 augustss err = USBD_NOMEM;
1620 1.1 augustss goto bad2;
1621 1.1 augustss }
1622 1.55 augustss tail->xfer = NULL;
1623 1.1 augustss
1624 1.1 augustss sed = opipe->sed;
1625 1.1 augustss opipe->u.ctl.length = len;
1626 1.1 augustss
1627 1.10 augustss /* Update device address and length since they may have changed. */
1628 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1629 1.77 augustss /* XXXX Should not touch ED here! */
1630 1.76 tsutsui sed->ed.ed_flags = htole32(
1631 1.76 tsutsui (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1632 1.16 augustss OHCI_ED_SET_FA(addr) |
1633 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1634 1.1 augustss
1635 1.77 augustss next = stat;
1636 1.77 augustss
1637 1.1 augustss /* Set up data transaction */
1638 1.1 augustss if (len != 0) {
1639 1.77 augustss ohci_soft_td_t *std = stat;
1640 1.77 augustss
1641 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1642 1.77 augustss std, &stat);
1643 1.77 augustss stat = stat->nexttd; /* point at free TD */
1644 1.77 augustss if (err)
1645 1.1 augustss goto bad3;
1646 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1647 1.77 augustss std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1648 1.77 augustss std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1649 1.34 augustss }
1650 1.1 augustss
1651 1.101.2.8 nathanw memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1652 1.1 augustss
1653 1.76 tsutsui setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1654 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1655 1.101.2.8 nathanw setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1656 1.1 augustss setup->nexttd = next;
1657 1.76 tsutsui setup->td.td_nexttd = htole32(next->physaddr);
1658 1.76 tsutsui setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1659 1.77 augustss setup->len = 0;
1660 1.53 augustss setup->xfer = xfer;
1661 1.34 augustss setup->flags = 0;
1662 1.53 augustss xfer->hcpriv = setup;
1663 1.1 augustss
1664 1.76 tsutsui stat->td.td_flags = htole32(
1665 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1666 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1667 1.39 augustss stat->td.td_cbp = 0;
1668 1.1 augustss stat->nexttd = tail;
1669 1.76 tsutsui stat->td.td_nexttd = htole32(tail->physaddr);
1670 1.39 augustss stat->td.td_be = 0;
1671 1.77 augustss stat->flags = OHCI_CALL_DONE;
1672 1.1 augustss stat->len = 0;
1673 1.53 augustss stat->xfer = xfer;
1674 1.1 augustss
1675 1.52 augustss #ifdef OHCI_DEBUG
1676 1.1 augustss if (ohcidebug > 5) {
1677 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1678 1.1 augustss ohci_dump_ed(sed);
1679 1.1 augustss ohci_dump_tds(setup);
1680 1.1 augustss }
1681 1.1 augustss #endif
1682 1.1 augustss
1683 1.1 augustss /* Insert ED in schedule */
1684 1.1 augustss s = splusb();
1685 1.76 tsutsui sed->ed.ed_tailp = htole32(tail->physaddr);
1686 1.60 augustss opipe->tail.td = tail;
1687 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1688 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1689 1.81 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1690 1.80 augustss ohci_timeout, xfer);
1691 1.15 augustss }
1692 1.1 augustss splx(s);
1693 1.1 augustss
1694 1.101.2.5 nathanw #ifdef OHCI_DEBUG
1695 1.101.2.5 nathanw if (ohcidebug > 20) {
1696 1.77 augustss delay(10000);
1697 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1698 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1699 1.101.2.5 nathanw ohci_dumpregs(sc);
1700 1.101.2.5 nathanw printf("ctrl head:\n");
1701 1.101.2.5 nathanw ohci_dump_ed(sc->sc_ctrl_head);
1702 1.101.2.5 nathanw printf("sed:\n");
1703 1.1 augustss ohci_dump_ed(sed);
1704 1.1 augustss ohci_dump_tds(setup);
1705 1.1 augustss }
1706 1.1 augustss #endif
1707 1.1 augustss
1708 1.1 augustss return (USBD_NORMAL_COMPLETION);
1709 1.1 augustss
1710 1.1 augustss bad3:
1711 1.1 augustss ohci_free_std(sc, tail);
1712 1.1 augustss bad2:
1713 1.1 augustss ohci_free_std(sc, stat);
1714 1.1 augustss bad1:
1715 1.53 augustss return (err);
1716 1.1 augustss }
1717 1.1 augustss
1718 1.1 augustss /*
1719 1.1 augustss * Add an ED to the schedule. Called at splusb().
1720 1.1 augustss */
1721 1.1 augustss void
1722 1.91 augustss ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1723 1.1 augustss {
1724 1.101.2.5 nathanw DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1725 1.101.2.5 nathanw
1726 1.46 augustss SPLUSBCHECK;
1727 1.1 augustss sed->next = head->next;
1728 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1729 1.1 augustss head->next = sed;
1730 1.76 tsutsui head->ed.ed_nexted = htole32(sed->physaddr);
1731 1.1 augustss }
1732 1.1 augustss
1733 1.1 augustss /*
1734 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1735 1.3 augustss */
1736 1.3 augustss void
1737 1.91 augustss ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1738 1.3 augustss {
1739 1.101.2.6 nathanw ohci_soft_ed_t *p;
1740 1.3 augustss
1741 1.46 augustss SPLUSBCHECK;
1742 1.46 augustss
1743 1.3 augustss /* XXX */
1744 1.55 augustss for (p = head; p == NULL && p->next != sed; p = p->next)
1745 1.3 augustss ;
1746 1.55 augustss if (p == NULL)
1747 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1748 1.3 augustss p->next = sed->next;
1749 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1750 1.3 augustss }
1751 1.3 augustss
1752 1.3 augustss /*
1753 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1754 1.1 augustss * the host controller. This queue is the processed by software.
1755 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1756 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1757 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1758 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1759 1.1 augustss * hash value.
1760 1.1 augustss */
1761 1.1 augustss
1762 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1763 1.1 augustss /* Called at splusb() */
1764 1.1 augustss void
1765 1.91 augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1766 1.1 augustss {
1767 1.1 augustss int h = HASH(std->physaddr);
1768 1.1 augustss
1769 1.46 augustss SPLUSBCHECK;
1770 1.46 augustss
1771 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1772 1.1 augustss }
1773 1.1 augustss
1774 1.1 augustss /* Called at splusb() */
1775 1.1 augustss void
1776 1.91 augustss ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1777 1.1 augustss {
1778 1.46 augustss SPLUSBCHECK;
1779 1.46 augustss
1780 1.1 augustss LIST_REMOVE(std, hnext);
1781 1.1 augustss }
1782 1.1 augustss
1783 1.1 augustss ohci_soft_td_t *
1784 1.91 augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1785 1.1 augustss {
1786 1.1 augustss int h = HASH(a);
1787 1.1 augustss ohci_soft_td_t *std;
1788 1.1 augustss
1789 1.101.2.6 nathanw for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1790 1.53 augustss std != NULL;
1791 1.1 augustss std = LIST_NEXT(std, hnext))
1792 1.1 augustss if (std->physaddr == a)
1793 1.1 augustss return (std);
1794 1.83 augustss return (NULL);
1795 1.83 augustss }
1796 1.83 augustss
1797 1.83 augustss /* Called at splusb() */
1798 1.83 augustss void
1799 1.91 augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1800 1.83 augustss {
1801 1.83 augustss int h = HASH(sitd->physaddr);
1802 1.83 augustss
1803 1.83 augustss SPLUSBCHECK;
1804 1.83 augustss
1805 1.101.2.6 nathanw DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1806 1.83 augustss sitd, (u_long)sitd->physaddr));
1807 1.83 augustss
1808 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1809 1.83 augustss }
1810 1.83 augustss
1811 1.83 augustss /* Called at splusb() */
1812 1.83 augustss void
1813 1.91 augustss ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1814 1.83 augustss {
1815 1.83 augustss SPLUSBCHECK;
1816 1.83 augustss
1817 1.101.2.6 nathanw DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1818 1.83 augustss sitd, (u_long)sitd->physaddr));
1819 1.83 augustss
1820 1.83 augustss LIST_REMOVE(sitd, hnext);
1821 1.83 augustss }
1822 1.83 augustss
1823 1.83 augustss ohci_soft_itd_t *
1824 1.91 augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1825 1.83 augustss {
1826 1.83 augustss int h = HASH(a);
1827 1.83 augustss ohci_soft_itd_t *sitd;
1828 1.83 augustss
1829 1.101.2.6 nathanw for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1830 1.83 augustss sitd != NULL;
1831 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1832 1.83 augustss if (sitd->physaddr == a)
1833 1.83 augustss return (sitd);
1834 1.83 augustss return (NULL);
1835 1.1 augustss }
1836 1.1 augustss
1837 1.1 augustss void
1838 1.91 augustss ohci_timeout(void *addr)
1839 1.1 augustss {
1840 1.101.2.5 nathanw struct ohci_xfer *oxfer = addr;
1841 1.101.2.5 nathanw struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1842 1.101.2.5 nathanw ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1843 1.101.2.5 nathanw
1844 1.101.2.5 nathanw DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1845 1.101.2.5 nathanw
1846 1.101.2.5 nathanw if (sc->sc_dying) {
1847 1.101.2.5 nathanw ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1848 1.101.2.5 nathanw return;
1849 1.101.2.5 nathanw }
1850 1.101.2.5 nathanw
1851 1.101.2.5 nathanw /* Execute the abort in a process context. */
1852 1.101.2.5 nathanw usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1853 1.101.2.5 nathanw usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task);
1854 1.101.2.5 nathanw }
1855 1.101.2.5 nathanw
1856 1.101.2.5 nathanw void
1857 1.101.2.5 nathanw ohci_timeout_task(void *addr)
1858 1.101.2.5 nathanw {
1859 1.53 augustss usbd_xfer_handle xfer = addr;
1860 1.48 augustss int s;
1861 1.1 augustss
1862 1.101.2.5 nathanw DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1863 1.45 augustss
1864 1.48 augustss s = splusb();
1865 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
1866 1.48 augustss splx(s);
1867 1.1 augustss }
1868 1.1 augustss
1869 1.52 augustss #ifdef OHCI_DEBUG
1870 1.1 augustss void
1871 1.91 augustss ohci_dump_tds(ohci_soft_td_t *std)
1872 1.1 augustss {
1873 1.1 augustss for (; std; std = std->nexttd)
1874 1.1 augustss ohci_dump_td(std);
1875 1.1 augustss }
1876 1.1 augustss
1877 1.1 augustss void
1878 1.91 augustss ohci_dump_td(ohci_soft_td_t *std)
1879 1.1 augustss {
1880 1.92 tv char sbuf[128];
1881 1.92 tv
1882 1.101.2.5 nathanw bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags),
1883 1.92 tv "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1884 1.92 tv sbuf, sizeof(sbuf));
1885 1.92 tv
1886 1.101.2.4 nathanw printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1887 1.101.2.6 nathanw "nexttd=0x%08lx be=0x%08lx\n",
1888 1.101.2.4 nathanw std, (u_long)std->physaddr, sbuf,
1889 1.101.2.4 nathanw OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
1890 1.101.2.4 nathanw OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
1891 1.101.2.4 nathanw OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1892 1.101.2.4 nathanw (u_long)le32toh(std->td.td_cbp),
1893 1.101.2.4 nathanw (u_long)le32toh(std->td.td_nexttd),
1894 1.101.2.4 nathanw (u_long)le32toh(std->td.td_be));
1895 1.1 augustss }
1896 1.1 augustss
1897 1.1 augustss void
1898 1.91 augustss ohci_dump_itd(ohci_soft_itd_t *sitd)
1899 1.83 augustss {
1900 1.83 augustss int i;
1901 1.83 augustss
1902 1.101.2.4 nathanw printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1903 1.101.2.6 nathanw "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1904 1.101.2.4 nathanw sitd, (u_long)sitd->physaddr,
1905 1.101.2.4 nathanw OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
1906 1.101.2.4 nathanw OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
1907 1.101.2.4 nathanw OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
1908 1.101.2.4 nathanw OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
1909 1.101.2.4 nathanw (u_long)le32toh(sitd->itd.itd_bp0),
1910 1.101.2.4 nathanw (u_long)le32toh(sitd->itd.itd_nextitd),
1911 1.101.2.4 nathanw (u_long)le32toh(sitd->itd.itd_be));
1912 1.83 augustss for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1913 1.101.2.4 nathanw printf("offs[%d]=0x%04x ", i,
1914 1.101.2.4 nathanw (u_int)le16toh(sitd->itd.itd_offset[i]));
1915 1.101.2.4 nathanw printf("\n");
1916 1.83 augustss }
1917 1.83 augustss
1918 1.83 augustss void
1919 1.91 augustss ohci_dump_itds(ohci_soft_itd_t *sitd)
1920 1.83 augustss {
1921 1.83 augustss for (; sitd; sitd = sitd->nextitd)
1922 1.83 augustss ohci_dump_itd(sitd);
1923 1.83 augustss }
1924 1.83 augustss
1925 1.83 augustss void
1926 1.91 augustss ohci_dump_ed(ohci_soft_ed_t *sed)
1927 1.1 augustss {
1928 1.92 tv char sbuf[128], sbuf2[128];
1929 1.92 tv
1930 1.101.2.5 nathanw bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags),
1931 1.92 tv "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1932 1.92 tv sbuf, sizeof(sbuf));
1933 1.101.2.5 nathanw bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp),
1934 1.92 tv "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
1935 1.92 tv
1936 1.101.2.4 nathanw printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
1937 1.92 tv "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
1938 1.101.2.6 nathanw sed, (u_long)sed->physaddr,
1939 1.76 tsutsui OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
1940 1.76 tsutsui OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
1941 1.92 tv OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
1942 1.92 tv (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
1943 1.76 tsutsui (u_long)le32toh(sed->ed.ed_headp),
1944 1.101.2.4 nathanw (u_long)le32toh(sed->ed.ed_nexted));
1945 1.1 augustss }
1946 1.1 augustss #endif
1947 1.1 augustss
1948 1.1 augustss usbd_status
1949 1.91 augustss ohci_open(usbd_pipe_handle pipe)
1950 1.1 augustss {
1951 1.1 augustss usbd_device_handle dev = pipe->device;
1952 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1953 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1954 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1955 1.1 augustss u_int8_t addr = dev->address;
1956 1.60 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1957 1.1 augustss ohci_soft_ed_t *sed;
1958 1.1 augustss ohci_soft_td_t *std;
1959 1.60 augustss ohci_soft_itd_t *sitd;
1960 1.60 augustss ohci_physaddr_t tdphys;
1961 1.60 augustss u_int32_t fmt;
1962 1.53 augustss usbd_status err;
1963 1.1 augustss int s;
1964 1.64 augustss int ival;
1965 1.1 augustss
1966 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1967 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1968 1.81 augustss
1969 1.101.2.5 nathanw if (sc->sc_dying)
1970 1.101.2.5 nathanw return (USBD_IOERROR);
1971 1.101.2.5 nathanw
1972 1.90 thorpej std = NULL;
1973 1.90 thorpej sed = NULL;
1974 1.90 thorpej
1975 1.1 augustss if (addr == sc->sc_addr) {
1976 1.1 augustss switch (ed->bEndpointAddress) {
1977 1.1 augustss case USB_CONTROL_ENDPOINT:
1978 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1979 1.1 augustss break;
1980 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
1981 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1982 1.1 augustss break;
1983 1.1 augustss default:
1984 1.1 augustss return (USBD_INVAL);
1985 1.1 augustss }
1986 1.1 augustss } else {
1987 1.1 augustss sed = ohci_alloc_sed(sc);
1988 1.53 augustss if (sed == NULL)
1989 1.1 augustss goto bad0;
1990 1.1 augustss opipe->sed = sed;
1991 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
1992 1.60 augustss sitd = ohci_alloc_sitd(sc);
1993 1.60 augustss if (sitd == NULL) {
1994 1.60 augustss ohci_free_sitd(sc, sitd);
1995 1.60 augustss goto bad1;
1996 1.60 augustss }
1997 1.60 augustss opipe->tail.itd = sitd;
1998 1.76 tsutsui tdphys = sitd->physaddr;
1999 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
2000 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2001 1.83 augustss fmt |= OHCI_ED_DIR_IN;
2002 1.83 augustss else
2003 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
2004 1.60 augustss } else {
2005 1.60 augustss std = ohci_alloc_std(sc);
2006 1.60 augustss if (std == NULL) {
2007 1.60 augustss ohci_free_std(sc, std);
2008 1.60 augustss goto bad1;
2009 1.60 augustss }
2010 1.60 augustss opipe->tail.td = std;
2011 1.76 tsutsui tdphys = std->physaddr;
2012 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2013 1.60 augustss }
2014 1.76 tsutsui sed->ed.ed_flags = htole32(
2015 1.101.2.6 nathanw OHCI_ED_SET_FA(addr) |
2016 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
2017 1.101.2.5 nathanw (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2018 1.101.2.5 nathanw fmt |
2019 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2020 1.76 tsutsui sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
2021 1.1 augustss
2022 1.60 augustss switch (xfertype) {
2023 1.1 augustss case UE_CONTROL:
2024 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
2025 1.101.2.6 nathanw err = usb_allocmem(&sc->sc_bus,
2026 1.101.2.6 nathanw sizeof(usb_device_request_t),
2027 1.53 augustss 0, &opipe->u.ctl.reqdma);
2028 1.53 augustss if (err)
2029 1.1 augustss goto bad;
2030 1.1 augustss s = splusb();
2031 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
2032 1.1 augustss splx(s);
2033 1.1 augustss break;
2034 1.1 augustss case UE_INTERRUPT:
2035 1.1 augustss pipe->methods = &ohci_device_intr_methods;
2036 1.64 augustss ival = pipe->interval;
2037 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
2038 1.64 augustss ival = ed->bInterval;
2039 1.64 augustss return (ohci_device_setintr(sc, opipe, ival));
2040 1.1 augustss case UE_ISOCHRONOUS:
2041 1.60 augustss pipe->methods = &ohci_device_isoc_methods;
2042 1.60 augustss return (ohci_setup_isoc(pipe));
2043 1.1 augustss case UE_BULK:
2044 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
2045 1.3 augustss s = splusb();
2046 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
2047 1.3 augustss splx(s);
2048 1.3 augustss break;
2049 1.1 augustss }
2050 1.1 augustss }
2051 1.1 augustss return (USBD_NORMAL_COMPLETION);
2052 1.1 augustss
2053 1.1 augustss bad:
2054 1.90 thorpej if (std != NULL)
2055 1.90 thorpej ohci_free_std(sc, std);
2056 1.1 augustss bad1:
2057 1.90 thorpej if (sed != NULL)
2058 1.90 thorpej ohci_free_sed(sc, sed);
2059 1.1 augustss bad0:
2060 1.1 augustss return (USBD_NOMEM);
2061 1.101.2.6 nathanw
2062 1.1 augustss }
2063 1.1 augustss
2064 1.1 augustss /*
2065 1.34 augustss * Close a reqular pipe.
2066 1.34 augustss * Assumes that there are no pending transactions.
2067 1.34 augustss */
2068 1.34 augustss void
2069 1.91 augustss ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2070 1.34 augustss {
2071 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2072 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2073 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
2074 1.34 augustss int s;
2075 1.34 augustss
2076 1.34 augustss s = splusb();
2077 1.34 augustss #ifdef DIAGNOSTIC
2078 1.76 tsutsui sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2079 1.101.2.6 nathanw if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2080 1.76 tsutsui (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2081 1.34 augustss ohci_soft_td_t *std;
2082 1.101.2.4 nathanw std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp));
2083 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2084 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
2085 1.76 tsutsui (int)le32toh(sed->ed.ed_headp),
2086 1.76 tsutsui (int)le32toh(sed->ed.ed_tailp),
2087 1.34 augustss pipe, std);
2088 1.101.2.4 nathanw #ifdef USB_DEBUG
2089 1.101.2.4 nathanw usbd_dump_pipe(&opipe->pipe);
2090 1.101.2.4 nathanw #endif
2091 1.101.2.4 nathanw #ifdef OHCI_DEBUG
2092 1.101.2.4 nathanw ohci_dump_ed(sed);
2093 1.101.2.4 nathanw if (std)
2094 1.101.2.4 nathanw ohci_dump_td(std);
2095 1.101.2.4 nathanw #endif
2096 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
2097 1.101.2.6 nathanw if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2098 1.76 tsutsui (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2099 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
2100 1.34 augustss }
2101 1.34 augustss #endif
2102 1.34 augustss ohci_rem_ed(sed, head);
2103 1.34 augustss splx(s);
2104 1.34 augustss ohci_free_sed(sc, opipe->sed);
2105 1.34 augustss }
2106 1.34 augustss
2107 1.101.2.6 nathanw /*
2108 1.34 augustss * Abort a device request.
2109 1.34 augustss * If this routine is called at splusb() it guarantees that the request
2110 1.34 augustss * will be removed from the hardware scheduling and that the callback
2111 1.34 augustss * for it will be called with USBD_CANCELLED status.
2112 1.34 augustss * It's impossible to guarantee that the requested transfer will not
2113 1.34 augustss * have happened since the hardware runs concurrently.
2114 1.34 augustss * If the transaction has already happened we rely on the ordinary
2115 1.34 augustss * interrupt processing to process it.
2116 1.34 augustss */
2117 1.34 augustss void
2118 1.91 augustss ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2119 1.34 augustss {
2120 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2121 1.101.2.4 nathanw ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2122 1.101.2.4 nathanw ohci_soft_ed_t *sed = opipe->sed;
2123 1.101.2.4 nathanw ohci_soft_td_t *p, *n;
2124 1.101.2.4 nathanw ohci_physaddr_t headp;
2125 1.101.2.4 nathanw int s, hit;
2126 1.34 augustss
2127 1.101.2.4 nathanw DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2128 1.34 augustss
2129 1.101.2.5 nathanw if (sc->sc_dying) {
2130 1.101.2.5 nathanw /* If we're dying, just do the software part. */
2131 1.101.2.5 nathanw s = splusb();
2132 1.101.2.5 nathanw xfer->status = status; /* make software ignore it */
2133 1.101.2.7 nathanw usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2134 1.101.2.5 nathanw usb_transfer_complete(xfer);
2135 1.101.2.5 nathanw splx(s);
2136 1.101.2.5 nathanw }
2137 1.101.2.5 nathanw
2138 1.101.2.4 nathanw if (xfer->device->bus->intr_context || !curproc)
2139 1.101.2.4 nathanw panic("ohci_abort_xfer: not in process context\n");
2140 1.34 augustss
2141 1.101.2.4 nathanw /*
2142 1.101.2.4 nathanw * Step 1: Make interrupt routine and hardware ignore xfer.
2143 1.101.2.4 nathanw */
2144 1.101.2.4 nathanw s = splusb();
2145 1.101.2.4 nathanw xfer->status = status; /* make software ignore it */
2146 1.81 augustss usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2147 1.101.2.4 nathanw splx(s);
2148 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2149 1.76 tsutsui sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2150 1.34 augustss
2151 1.101.2.6 nathanw /*
2152 1.101.2.4 nathanw * Step 2: Wait until we know hardware has finished any possible
2153 1.101.2.4 nathanw * use of the xfer. Also make sure the soft interrupt routine
2154 1.101.2.4 nathanw * has run.
2155 1.101.2.4 nathanw */
2156 1.101.2.5 nathanw usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2157 1.101.2.5 nathanw s = splusb();
2158 1.101.2.5 nathanw sc->sc_softwake = 1;
2159 1.101.2.5 nathanw usb_schedsoftintr(&sc->sc_bus);
2160 1.101.2.5 nathanw tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2161 1.101.2.5 nathanw splx(s);
2162 1.101.2.5 nathanw
2163 1.101.2.6 nathanw /*
2164 1.101.2.4 nathanw * Step 3: Remove any vestiges of the xfer from the hardware.
2165 1.101.2.4 nathanw * The complication here is that the hardware may have executed
2166 1.101.2.4 nathanw * beyond the xfer we're trying to abort. So as we're scanning
2167 1.101.2.4 nathanw * the TDs of this xfer we check if the hardware points to
2168 1.101.2.4 nathanw * any of them.
2169 1.101.2.4 nathanw */
2170 1.101.2.4 nathanw s = splusb(); /* XXX why? */
2171 1.53 augustss p = xfer->hcpriv;
2172 1.34 augustss #ifdef DIAGNOSTIC
2173 1.55 augustss if (p == NULL) {
2174 1.101.2.1 nathanw splx(s);
2175 1.101.2.4 nathanw printf("ohci_abort_xfer: hcpriv is NULL\n");
2176 1.38 augustss return;
2177 1.38 augustss }
2178 1.34 augustss #endif
2179 1.101.2.4 nathanw #ifdef OHCI_DEBUG
2180 1.101.2.4 nathanw if (ohcidebug > 1) {
2181 1.101.2.4 nathanw DPRINTF(("ohci_abort_xfer: sed=\n"));
2182 1.101.2.4 nathanw ohci_dump_ed(sed);
2183 1.101.2.4 nathanw ohci_dump_tds(p);
2184 1.101.2.4 nathanw }
2185 1.101.2.4 nathanw #endif
2186 1.101.2.4 nathanw headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK;
2187 1.101.2.4 nathanw hit = 0;
2188 1.53 augustss for (; p->xfer == xfer; p = n) {
2189 1.101.2.4 nathanw hit |= headp == p->physaddr;
2190 1.38 augustss n = p->nexttd;
2191 1.38 augustss ohci_free_std(sc, p);
2192 1.34 augustss }
2193 1.101.2.4 nathanw /* Zap headp register if hardware pointed inside the xfer. */
2194 1.101.2.4 nathanw if (hit) {
2195 1.101.2.4 nathanw DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n",
2196 1.101.2.4 nathanw (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2197 1.101.2.4 nathanw sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2198 1.101.2.4 nathanw } else {
2199 1.101.2.4 nathanw DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2200 1.101.2.4 nathanw }
2201 1.34 augustss
2202 1.101.2.4 nathanw /*
2203 1.101.2.4 nathanw * Step 4: Turn on hardware again.
2204 1.101.2.4 nathanw */
2205 1.76 tsutsui sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2206 1.38 augustss
2207 1.101.2.4 nathanw /*
2208 1.101.2.4 nathanw * Step 5: Execute callback.
2209 1.101.2.4 nathanw */
2210 1.53 augustss usb_transfer_complete(xfer);
2211 1.38 augustss
2212 1.34 augustss splx(s);
2213 1.34 augustss }
2214 1.34 augustss
2215 1.34 augustss /*
2216 1.1 augustss * Data structures and routines to emulate the root hub.
2217 1.1 augustss */
2218 1.82 augustss Static usb_device_descriptor_t ohci_devd = {
2219 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2220 1.1 augustss UDESC_DEVICE, /* type */
2221 1.1 augustss {0x00, 0x01}, /* USB version */
2222 1.74 augustss UDCLASS_HUB, /* class */
2223 1.74 augustss UDSUBCLASS_HUB, /* subclass */
2224 1.101.2.5 nathanw UDPROTO_FSHUB,
2225 1.1 augustss 64, /* max packet */
2226 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2227 1.1 augustss 1,2,0, /* string indicies */
2228 1.1 augustss 1 /* # of configurations */
2229 1.1 augustss };
2230 1.1 augustss
2231 1.82 augustss Static usb_config_descriptor_t ohci_confd = {
2232 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2233 1.1 augustss UDESC_CONFIG,
2234 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2235 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2236 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2237 1.1 augustss 1,
2238 1.1 augustss 1,
2239 1.1 augustss 0,
2240 1.1 augustss UC_SELF_POWERED,
2241 1.1 augustss 0 /* max power */
2242 1.1 augustss };
2243 1.1 augustss
2244 1.82 augustss Static usb_interface_descriptor_t ohci_ifcd = {
2245 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2246 1.1 augustss UDESC_INTERFACE,
2247 1.1 augustss 0,
2248 1.1 augustss 0,
2249 1.1 augustss 1,
2250 1.74 augustss UICLASS_HUB,
2251 1.74 augustss UISUBCLASS_HUB,
2252 1.101.2.5 nathanw UIPROTO_FSHUB,
2253 1.1 augustss 0
2254 1.1 augustss };
2255 1.1 augustss
2256 1.82 augustss Static usb_endpoint_descriptor_t ohci_endpd = {
2257 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2258 1.1 augustss UDESC_ENDPOINT,
2259 1.40 augustss UE_DIR_IN | OHCI_INTR_ENDPT,
2260 1.1 augustss UE_INTERRUPT,
2261 1.1 augustss {8, 0}, /* max packet */
2262 1.1 augustss 255
2263 1.1 augustss };
2264 1.1 augustss
2265 1.82 augustss Static usb_hub_descriptor_t ohci_hubd = {
2266 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2267 1.1 augustss UDESC_HUB,
2268 1.1 augustss 0,
2269 1.1 augustss {0,0},
2270 1.1 augustss 0,
2271 1.1 augustss 0,
2272 1.1 augustss {0},
2273 1.1 augustss };
2274 1.1 augustss
2275 1.82 augustss Static int
2276 1.101.2.6 nathanw ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2277 1.1 augustss {
2278 1.1 augustss int i;
2279 1.1 augustss
2280 1.1 augustss if (l == 0)
2281 1.1 augustss return (0);
2282 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2283 1.1 augustss if (l == 1)
2284 1.1 augustss return (1);
2285 1.1 augustss p->bDescriptorType = UDESC_STRING;
2286 1.1 augustss l -= 2;
2287 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2288 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2289 1.1 augustss return (2*i+2);
2290 1.1 augustss }
2291 1.1 augustss
2292 1.1 augustss /*
2293 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2294 1.1 augustss */
2295 1.82 augustss Static usbd_status
2296 1.91 augustss ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2297 1.1 augustss {
2298 1.53 augustss usbd_status err;
2299 1.17 augustss
2300 1.46 augustss /* Insert last in queue. */
2301 1.53 augustss err = usb_insert_transfer(xfer);
2302 1.53 augustss if (err)
2303 1.53 augustss return (err);
2304 1.46 augustss
2305 1.46 augustss /* Pipe isn't running, start first */
2306 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2307 1.17 augustss }
2308 1.17 augustss
2309 1.82 augustss Static usbd_status
2310 1.91 augustss ohci_root_ctrl_start(usbd_xfer_handle xfer)
2311 1.17 augustss {
2312 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2313 1.1 augustss usb_device_request_t *req;
2314 1.52 augustss void *buf = NULL;
2315 1.1 augustss int port, i;
2316 1.46 augustss int s, len, value, index, l, totlen = 0;
2317 1.1 augustss usb_port_status_t ps;
2318 1.1 augustss usb_hub_descriptor_t hubd;
2319 1.53 augustss usbd_status err;
2320 1.1 augustss u_int32_t v;
2321 1.1 augustss
2322 1.83 augustss if (sc->sc_dying)
2323 1.83 augustss return (USBD_IOERROR);
2324 1.83 augustss
2325 1.42 augustss #ifdef DIAGNOSTIC
2326 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
2327 1.1 augustss /* XXX panic */
2328 1.1 augustss return (USBD_INVAL);
2329 1.42 augustss #endif
2330 1.53 augustss req = &xfer->request;
2331 1.1 augustss
2332 1.101.2.6 nathanw DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2333 1.1 augustss req->bmRequestType, req->bRequest));
2334 1.1 augustss
2335 1.1 augustss len = UGETW(req->wLength);
2336 1.1 augustss value = UGETW(req->wValue);
2337 1.1 augustss index = UGETW(req->wIndex);
2338 1.43 augustss
2339 1.43 augustss if (len != 0)
2340 1.101.2.8 nathanw buf = KERNADDR(&xfer->dmabuf, 0);
2341 1.43 augustss
2342 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2343 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2344 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2345 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2346 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2347 1.101.2.6 nathanw /*
2348 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2349 1.1 augustss * for the integrated root hub.
2350 1.1 augustss */
2351 1.1 augustss break;
2352 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2353 1.1 augustss if (len > 0) {
2354 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2355 1.1 augustss totlen = 1;
2356 1.1 augustss }
2357 1.1 augustss break;
2358 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2359 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2360 1.1 augustss switch(value >> 8) {
2361 1.1 augustss case UDESC_DEVICE:
2362 1.1 augustss if ((value & 0xff) != 0) {
2363 1.53 augustss err = USBD_IOERROR;
2364 1.1 augustss goto ret;
2365 1.1 augustss }
2366 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2367 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2368 1.1 augustss memcpy(buf, &ohci_devd, l);
2369 1.1 augustss break;
2370 1.1 augustss case UDESC_CONFIG:
2371 1.1 augustss if ((value & 0xff) != 0) {
2372 1.53 augustss err = USBD_IOERROR;
2373 1.1 augustss goto ret;
2374 1.1 augustss }
2375 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2376 1.1 augustss memcpy(buf, &ohci_confd, l);
2377 1.1 augustss buf = (char *)buf + l;
2378 1.1 augustss len -= l;
2379 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2380 1.1 augustss totlen += l;
2381 1.1 augustss memcpy(buf, &ohci_ifcd, l);
2382 1.1 augustss buf = (char *)buf + l;
2383 1.1 augustss len -= l;
2384 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2385 1.1 augustss totlen += l;
2386 1.1 augustss memcpy(buf, &ohci_endpd, l);
2387 1.1 augustss break;
2388 1.1 augustss case UDESC_STRING:
2389 1.1 augustss if (len == 0)
2390 1.1 augustss break;
2391 1.1 augustss *(u_int8_t *)buf = 0;
2392 1.1 augustss totlen = 1;
2393 1.1 augustss switch (value & 0xff) {
2394 1.1 augustss case 1: /* Vendor */
2395 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
2396 1.1 augustss break;
2397 1.1 augustss case 2: /* Product */
2398 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
2399 1.1 augustss break;
2400 1.1 augustss }
2401 1.1 augustss break;
2402 1.1 augustss default:
2403 1.53 augustss err = USBD_IOERROR;
2404 1.1 augustss goto ret;
2405 1.1 augustss }
2406 1.1 augustss break;
2407 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2408 1.1 augustss if (len > 0) {
2409 1.1 augustss *(u_int8_t *)buf = 0;
2410 1.1 augustss totlen = 1;
2411 1.1 augustss }
2412 1.1 augustss break;
2413 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2414 1.1 augustss if (len > 1) {
2415 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2416 1.1 augustss totlen = 2;
2417 1.1 augustss }
2418 1.1 augustss break;
2419 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2420 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2421 1.1 augustss if (len > 1) {
2422 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2423 1.1 augustss totlen = 2;
2424 1.1 augustss }
2425 1.1 augustss break;
2426 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2427 1.1 augustss if (value >= USB_MAX_DEVICES) {
2428 1.53 augustss err = USBD_IOERROR;
2429 1.1 augustss goto ret;
2430 1.1 augustss }
2431 1.1 augustss sc->sc_addr = value;
2432 1.1 augustss break;
2433 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2434 1.1 augustss if (value != 0 && value != 1) {
2435 1.53 augustss err = USBD_IOERROR;
2436 1.1 augustss goto ret;
2437 1.1 augustss }
2438 1.1 augustss sc->sc_conf = value;
2439 1.1 augustss break;
2440 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2441 1.1 augustss break;
2442 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2443 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2444 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2445 1.53 augustss err = USBD_IOERROR;
2446 1.1 augustss goto ret;
2447 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2448 1.1 augustss break;
2449 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2450 1.1 augustss break;
2451 1.1 augustss /* Hub requests */
2452 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2453 1.1 augustss break;
2454 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2455 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2456 1.14 augustss "port=%d feature=%d\n",
2457 1.1 augustss index, value));
2458 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2459 1.53 augustss err = USBD_IOERROR;
2460 1.1 augustss goto ret;
2461 1.1 augustss }
2462 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2463 1.1 augustss switch(value) {
2464 1.1 augustss case UHF_PORT_ENABLE:
2465 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2466 1.1 augustss break;
2467 1.1 augustss case UHF_PORT_SUSPEND:
2468 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2469 1.1 augustss break;
2470 1.1 augustss case UHF_PORT_POWER:
2471 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2472 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2473 1.1 augustss break;
2474 1.1 augustss case UHF_C_PORT_CONNECTION:
2475 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2476 1.1 augustss break;
2477 1.1 augustss case UHF_C_PORT_ENABLE:
2478 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2479 1.1 augustss break;
2480 1.1 augustss case UHF_C_PORT_SUSPEND:
2481 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2482 1.1 augustss break;
2483 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2484 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2485 1.1 augustss break;
2486 1.1 augustss case UHF_C_PORT_RESET:
2487 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2488 1.1 augustss break;
2489 1.1 augustss default:
2490 1.53 augustss err = USBD_IOERROR;
2491 1.1 augustss goto ret;
2492 1.1 augustss }
2493 1.1 augustss switch(value) {
2494 1.1 augustss case UHF_C_PORT_CONNECTION:
2495 1.1 augustss case UHF_C_PORT_ENABLE:
2496 1.1 augustss case UHF_C_PORT_SUSPEND:
2497 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2498 1.1 augustss case UHF_C_PORT_RESET:
2499 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2500 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2501 1.1 augustss ohci_rhsc_able(sc, 1);
2502 1.1 augustss break;
2503 1.1 augustss default:
2504 1.1 augustss break;
2505 1.1 augustss }
2506 1.1 augustss break;
2507 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2508 1.1 augustss if (value != 0) {
2509 1.53 augustss err = USBD_IOERROR;
2510 1.1 augustss goto ret;
2511 1.1 augustss }
2512 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2513 1.1 augustss hubd = ohci_hubd;
2514 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2515 1.15 augustss USETW(hubd.wHubCharacteristics,
2516 1.101.2.6 nathanw (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2517 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2518 1.1 augustss /* XXX overcurrent */
2519 1.1 augustss );
2520 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2521 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2522 1.101.2.6 nathanw for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2523 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
2524 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2525 1.1 augustss l = min(len, hubd.bDescLength);
2526 1.1 augustss totlen = l;
2527 1.1 augustss memcpy(buf, &hubd, l);
2528 1.1 augustss break;
2529 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2530 1.1 augustss if (len != 4) {
2531 1.53 augustss err = USBD_IOERROR;
2532 1.1 augustss goto ret;
2533 1.1 augustss }
2534 1.1 augustss memset(buf, 0, len); /* ? XXX */
2535 1.1 augustss totlen = len;
2536 1.1 augustss break;
2537 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2538 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2539 1.1 augustss index));
2540 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2541 1.53 augustss err = USBD_IOERROR;
2542 1.1 augustss goto ret;
2543 1.1 augustss }
2544 1.1 augustss if (len != 4) {
2545 1.53 augustss err = USBD_IOERROR;
2546 1.1 augustss goto ret;
2547 1.1 augustss }
2548 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2549 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2550 1.1 augustss v));
2551 1.1 augustss USETW(ps.wPortStatus, v);
2552 1.1 augustss USETW(ps.wPortChange, v >> 16);
2553 1.1 augustss l = min(len, sizeof ps);
2554 1.1 augustss memcpy(buf, &ps, l);
2555 1.1 augustss totlen = l;
2556 1.1 augustss break;
2557 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2558 1.53 augustss err = USBD_IOERROR;
2559 1.1 augustss goto ret;
2560 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2561 1.1 augustss break;
2562 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2563 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2564 1.53 augustss err = USBD_IOERROR;
2565 1.1 augustss goto ret;
2566 1.1 augustss }
2567 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2568 1.1 augustss switch(value) {
2569 1.1 augustss case UHF_PORT_ENABLE:
2570 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2571 1.1 augustss break;
2572 1.1 augustss case UHF_PORT_SUSPEND:
2573 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2574 1.1 augustss break;
2575 1.1 augustss case UHF_PORT_RESET:
2576 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2577 1.14 augustss index));
2578 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2579 1.101.2.5 nathanw for (i = 0; i < 5; i++) {
2580 1.101.2.5 nathanw usb_delay_ms(&sc->sc_bus,
2581 1.101.2.5 nathanw USB_PORT_ROOT_RESET_DELAY);
2582 1.101.2.5 nathanw if (sc->sc_dying) {
2583 1.101.2.5 nathanw err = USBD_IOERROR;
2584 1.101.2.5 nathanw goto ret;
2585 1.101.2.5 nathanw }
2586 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2587 1.1 augustss break;
2588 1.1 augustss }
2589 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2590 1.1 augustss index, OREAD4(sc, port)));
2591 1.1 augustss break;
2592 1.1 augustss case UHF_PORT_POWER:
2593 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2594 1.14 augustss "%d\n", index));
2595 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2596 1.1 augustss break;
2597 1.1 augustss default:
2598 1.53 augustss err = USBD_IOERROR;
2599 1.1 augustss goto ret;
2600 1.1 augustss }
2601 1.1 augustss break;
2602 1.1 augustss default:
2603 1.53 augustss err = USBD_IOERROR;
2604 1.1 augustss goto ret;
2605 1.1 augustss }
2606 1.53 augustss xfer->actlen = totlen;
2607 1.53 augustss err = USBD_NORMAL_COMPLETION;
2608 1.1 augustss ret:
2609 1.53 augustss xfer->status = err;
2610 1.46 augustss s = splusb();
2611 1.53 augustss usb_transfer_complete(xfer);
2612 1.46 augustss splx(s);
2613 1.1 augustss return (USBD_IN_PROGRESS);
2614 1.1 augustss }
2615 1.1 augustss
2616 1.1 augustss /* Abort a root control request. */
2617 1.82 augustss Static void
2618 1.91 augustss ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2619 1.1 augustss {
2620 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2621 1.1 augustss }
2622 1.1 augustss
2623 1.1 augustss /* Close the root pipe. */
2624 1.82 augustss Static void
2625 1.91 augustss ohci_root_ctrl_close(usbd_pipe_handle pipe)
2626 1.1 augustss {
2627 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2628 1.34 augustss /* Nothing to do. */
2629 1.1 augustss }
2630 1.1 augustss
2631 1.82 augustss Static usbd_status
2632 1.91 augustss ohci_root_intr_transfer(usbd_xfer_handle xfer)
2633 1.1 augustss {
2634 1.53 augustss usbd_status err;
2635 1.17 augustss
2636 1.46 augustss /* Insert last in queue. */
2637 1.53 augustss err = usb_insert_transfer(xfer);
2638 1.53 augustss if (err)
2639 1.53 augustss return (err);
2640 1.46 augustss
2641 1.46 augustss /* Pipe isn't running, start first */
2642 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2643 1.17 augustss }
2644 1.17 augustss
2645 1.82 augustss Static usbd_status
2646 1.91 augustss ohci_root_intr_start(usbd_xfer_handle xfer)
2647 1.17 augustss {
2648 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2649 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2650 1.1 augustss
2651 1.83 augustss if (sc->sc_dying)
2652 1.83 augustss return (USBD_IOERROR);
2653 1.83 augustss
2654 1.53 augustss sc->sc_intrxfer = xfer;
2655 1.1 augustss
2656 1.1 augustss return (USBD_IN_PROGRESS);
2657 1.1 augustss }
2658 1.1 augustss
2659 1.3 augustss /* Abort a root interrupt request. */
2660 1.82 augustss Static void
2661 1.91 augustss ohci_root_intr_abort(usbd_xfer_handle xfer)
2662 1.1 augustss {
2663 1.53 augustss int s;
2664 1.53 augustss
2665 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2666 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2667 1.53 augustss xfer->pipe->intrxfer = NULL;
2668 1.51 augustss }
2669 1.53 augustss xfer->status = USBD_CANCELLED;
2670 1.53 augustss s = splusb();
2671 1.53 augustss usb_transfer_complete(xfer);
2672 1.53 augustss splx(s);
2673 1.1 augustss }
2674 1.1 augustss
2675 1.1 augustss /* Close the root pipe. */
2676 1.82 augustss Static void
2677 1.91 augustss ohci_root_intr_close(usbd_pipe_handle pipe)
2678 1.1 augustss {
2679 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2680 1.101.2.6 nathanw
2681 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2682 1.34 augustss
2683 1.53 augustss sc->sc_intrxfer = NULL;
2684 1.1 augustss }
2685 1.1 augustss
2686 1.1 augustss /************************/
2687 1.1 augustss
2688 1.82 augustss Static usbd_status
2689 1.91 augustss ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2690 1.1 augustss {
2691 1.53 augustss usbd_status err;
2692 1.17 augustss
2693 1.46 augustss /* Insert last in queue. */
2694 1.53 augustss err = usb_insert_transfer(xfer);
2695 1.53 augustss if (err)
2696 1.53 augustss return (err);
2697 1.46 augustss
2698 1.46 augustss /* Pipe isn't running, start first */
2699 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2700 1.17 augustss }
2701 1.17 augustss
2702 1.82 augustss Static usbd_status
2703 1.91 augustss ohci_device_ctrl_start(usbd_xfer_handle xfer)
2704 1.17 augustss {
2705 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2706 1.53 augustss usbd_status err;
2707 1.1 augustss
2708 1.83 augustss if (sc->sc_dying)
2709 1.83 augustss return (USBD_IOERROR);
2710 1.83 augustss
2711 1.42 augustss #ifdef DIAGNOSTIC
2712 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2713 1.1 augustss /* XXX panic */
2714 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2715 1.1 augustss return (USBD_INVAL);
2716 1.1 augustss }
2717 1.42 augustss #endif
2718 1.1 augustss
2719 1.53 augustss err = ohci_device_request(xfer);
2720 1.53 augustss if (err)
2721 1.53 augustss return (err);
2722 1.1 augustss
2723 1.6 augustss if (sc->sc_bus.use_polling)
2724 1.53 augustss ohci_waitintr(sc, xfer);
2725 1.1 augustss return (USBD_IN_PROGRESS);
2726 1.1 augustss }
2727 1.1 augustss
2728 1.1 augustss /* Abort a device control request. */
2729 1.82 augustss Static void
2730 1.91 augustss ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2731 1.1 augustss {
2732 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2733 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2734 1.1 augustss }
2735 1.1 augustss
2736 1.1 augustss /* Close a device control pipe. */
2737 1.82 augustss Static void
2738 1.91 augustss ohci_device_ctrl_close(usbd_pipe_handle pipe)
2739 1.1 augustss {
2740 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2741 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2742 1.1 augustss
2743 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2744 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2745 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2746 1.3 augustss }
2747 1.3 augustss
2748 1.3 augustss /************************/
2749 1.37 augustss
2750 1.82 augustss Static void
2751 1.91 augustss ohci_device_clear_toggle(usbd_pipe_handle pipe)
2752 1.37 augustss {
2753 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2754 1.37 augustss
2755 1.76 tsutsui opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2756 1.37 augustss }
2757 1.37 augustss
2758 1.82 augustss Static void
2759 1.91 augustss ohci_noop(usbd_pipe_handle pipe)
2760 1.37 augustss {
2761 1.37 augustss }
2762 1.3 augustss
2763 1.82 augustss Static usbd_status
2764 1.91 augustss ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2765 1.3 augustss {
2766 1.53 augustss usbd_status err;
2767 1.17 augustss
2768 1.46 augustss /* Insert last in queue. */
2769 1.53 augustss err = usb_insert_transfer(xfer);
2770 1.53 augustss if (err)
2771 1.53 augustss return (err);
2772 1.46 augustss
2773 1.46 augustss /* Pipe isn't running, start first */
2774 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2775 1.17 augustss }
2776 1.17 augustss
2777 1.82 augustss Static usbd_status
2778 1.91 augustss ohci_device_bulk_start(usbd_xfer_handle xfer)
2779 1.17 augustss {
2780 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2781 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2782 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2783 1.3 augustss int addr = dev->address;
2784 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2785 1.3 augustss ohci_soft_ed_t *sed;
2786 1.40 augustss int s, len, isread, endpt;
2787 1.53 augustss usbd_status err;
2788 1.3 augustss
2789 1.83 augustss if (sc->sc_dying)
2790 1.83 augustss return (USBD_IOERROR);
2791 1.83 augustss
2792 1.34 augustss #ifdef DIAGNOSTIC
2793 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
2794 1.3 augustss /* XXX panic */
2795 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2796 1.3 augustss return (USBD_INVAL);
2797 1.3 augustss }
2798 1.34 augustss #endif
2799 1.3 augustss
2800 1.53 augustss len = xfer->length;
2801 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2802 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2803 1.3 augustss sed = opipe->sed;
2804 1.3 augustss
2805 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2806 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2807 1.40 augustss endpt));
2808 1.34 augustss
2809 1.32 augustss opipe->u.bulk.isread = isread;
2810 1.3 augustss opipe->u.bulk.length = len;
2811 1.3 augustss
2812 1.3 augustss /* Update device address */
2813 1.76 tsutsui sed->ed.ed_flags = htole32(
2814 1.76 tsutsui (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2815 1.16 augustss OHCI_ED_SET_FA(addr));
2816 1.3 augustss
2817 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2818 1.60 augustss data = opipe->tail.td;
2819 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2820 1.77 augustss data, &tail);
2821 1.77 augustss /* We want interrupt at the end of the transfer. */
2822 1.77 augustss tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2823 1.77 augustss tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2824 1.77 augustss tail->flags |= OHCI_CALL_DONE;
2825 1.77 augustss tail = tail->nexttd; /* point at sentinel */
2826 1.53 augustss if (err)
2827 1.53 augustss return (err);
2828 1.48 augustss
2829 1.53 augustss tail->xfer = NULL;
2830 1.53 augustss xfer->hcpriv = data;
2831 1.3 augustss
2832 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2833 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2834 1.76 tsutsui (int)le32toh(sed->ed.ed_flags),
2835 1.76 tsutsui (int)le32toh(data->td.td_flags),
2836 1.76 tsutsui (int)le32toh(data->td.td_cbp),
2837 1.76 tsutsui (int)le32toh(data->td.td_be)));
2838 1.34 augustss
2839 1.52 augustss #ifdef OHCI_DEBUG
2840 1.75 augustss if (ohcidebug > 5) {
2841 1.34 augustss ohci_dump_ed(sed);
2842 1.48 augustss ohci_dump_tds(data);
2843 1.34 augustss }
2844 1.34 augustss #endif
2845 1.34 augustss
2846 1.3 augustss /* Insert ED in schedule */
2847 1.3 augustss s = splusb();
2848 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2849 1.53 augustss tdp->xfer = xfer;
2850 1.48 augustss }
2851 1.76 tsutsui sed->ed.ed_tailp = htole32(tail->physaddr);
2852 1.60 augustss opipe->tail.td = tail;
2853 1.76 tsutsui sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2854 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2855 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2856 1.81 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2857 1.80 augustss ohci_timeout, xfer);
2858 1.15 augustss }
2859 1.34 augustss
2860 1.52 augustss #if 0
2861 1.52 augustss /* This goes wrong if we are too slow. */
2862 1.75 augustss if (ohcidebug > 10) {
2863 1.75 augustss delay(10000);
2864 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2865 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2866 1.34 augustss ohci_dump_ed(sed);
2867 1.48 augustss ohci_dump_tds(data);
2868 1.34 augustss }
2869 1.34 augustss #endif
2870 1.34 augustss
2871 1.3 augustss splx(s);
2872 1.3 augustss
2873 1.3 augustss return (USBD_IN_PROGRESS);
2874 1.3 augustss }
2875 1.3 augustss
2876 1.82 augustss Static void
2877 1.91 augustss ohci_device_bulk_abort(usbd_xfer_handle xfer)
2878 1.3 augustss {
2879 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2880 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2881 1.3 augustss }
2882 1.3 augustss
2883 1.101.2.6 nathanw /*
2884 1.34 augustss * Close a device bulk pipe.
2885 1.34 augustss */
2886 1.82 augustss Static void
2887 1.91 augustss ohci_device_bulk_close(usbd_pipe_handle pipe)
2888 1.3 augustss {
2889 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2890 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2891 1.3 augustss
2892 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2893 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2894 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2895 1.1 augustss }
2896 1.1 augustss
2897 1.1 augustss /************************/
2898 1.1 augustss
2899 1.82 augustss Static usbd_status
2900 1.91 augustss ohci_device_intr_transfer(usbd_xfer_handle xfer)
2901 1.17 augustss {
2902 1.53 augustss usbd_status err;
2903 1.17 augustss
2904 1.46 augustss /* Insert last in queue. */
2905 1.53 augustss err = usb_insert_transfer(xfer);
2906 1.53 augustss if (err)
2907 1.53 augustss return (err);
2908 1.46 augustss
2909 1.46 augustss /* Pipe isn't running, start first */
2910 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2911 1.17 augustss }
2912 1.17 augustss
2913 1.82 augustss Static usbd_status
2914 1.91 augustss ohci_device_intr_start(usbd_xfer_handle xfer)
2915 1.1 augustss {
2916 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2917 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2918 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2919 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2920 1.48 augustss ohci_soft_td_t *data, *tail;
2921 1.1 augustss int len;
2922 1.1 augustss int s;
2923 1.1 augustss
2924 1.83 augustss if (sc->sc_dying)
2925 1.83 augustss return (USBD_IOERROR);
2926 1.83 augustss
2927 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2928 1.14 augustss "flags=%d priv=%p\n",
2929 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
2930 1.1 augustss
2931 1.42 augustss #ifdef DIAGNOSTIC
2932 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
2933 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2934 1.42 augustss #endif
2935 1.1 augustss
2936 1.53 augustss len = xfer->length;
2937 1.1 augustss
2938 1.60 augustss data = opipe->tail.td;
2939 1.1 augustss tail = ohci_alloc_std(sc);
2940 1.55 augustss if (tail == NULL)
2941 1.43 augustss return (USBD_NOMEM);
2942 1.53 augustss tail->xfer = NULL;
2943 1.1 augustss
2944 1.76 tsutsui data->td.td_flags = htole32(
2945 1.101.2.6 nathanw OHCI_TD_IN | OHCI_TD_NOCC |
2946 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2947 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
2948 1.76 tsutsui data->td.td_flags |= htole32(OHCI_TD_R);
2949 1.101.2.8 nathanw data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf, 0));
2950 1.48 augustss data->nexttd = tail;
2951 1.76 tsutsui data->td.td_nexttd = htole32(tail->physaddr);
2952 1.76 tsutsui data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
2953 1.48 augustss data->len = len;
2954 1.53 augustss data->xfer = xfer;
2955 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2956 1.53 augustss xfer->hcpriv = data;
2957 1.1 augustss
2958 1.52 augustss #ifdef OHCI_DEBUG
2959 1.1 augustss if (ohcidebug > 5) {
2960 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2961 1.1 augustss ohci_dump_ed(sed);
2962 1.48 augustss ohci_dump_tds(data);
2963 1.1 augustss }
2964 1.1 augustss #endif
2965 1.1 augustss
2966 1.1 augustss /* Insert ED in schedule */
2967 1.1 augustss s = splusb();
2968 1.76 tsutsui sed->ed.ed_tailp = htole32(tail->physaddr);
2969 1.60 augustss opipe->tail.td = tail;
2970 1.76 tsutsui sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2971 1.1 augustss
2972 1.52 augustss #if 0
2973 1.52 augustss /*
2974 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
2975 1.52 augustss * because false references are followed due to the fact that the
2976 1.52 augustss * TD is gone.
2977 1.52 augustss */
2978 1.1 augustss if (ohcidebug > 5) {
2979 1.55 augustss usb_delay_ms(&sc->sc_bus, 5);
2980 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2981 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2982 1.1 augustss ohci_dump_ed(sed);
2983 1.48 augustss ohci_dump_tds(data);
2984 1.1 augustss }
2985 1.1 augustss #endif
2986 1.26 augustss splx(s);
2987 1.1 augustss
2988 1.1 augustss return (USBD_IN_PROGRESS);
2989 1.1 augustss }
2990 1.1 augustss
2991 1.1 augustss /* Abort a device control request. */
2992 1.82 augustss Static void
2993 1.91 augustss ohci_device_intr_abort(usbd_xfer_handle xfer)
2994 1.1 augustss {
2995 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2996 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2997 1.55 augustss xfer->pipe->intrxfer = NULL;
2998 1.1 augustss }
2999 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3000 1.1 augustss }
3001 1.1 augustss
3002 1.1 augustss /* Close a device interrupt pipe. */
3003 1.82 augustss Static void
3004 1.91 augustss ohci_device_intr_close(usbd_pipe_handle pipe)
3005 1.1 augustss {
3006 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3007 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3008 1.1 augustss int nslots = opipe->u.intr.nslots;
3009 1.1 augustss int pos = opipe->u.intr.pos;
3010 1.1 augustss int j;
3011 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
3012 1.1 augustss int s;
3013 1.1 augustss
3014 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3015 1.1 augustss pipe, nslots, pos));
3016 1.1 augustss s = splusb();
3017 1.76 tsutsui sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
3018 1.101.2.6 nathanw if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3019 1.76 tsutsui (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
3020 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
3021 1.1 augustss
3022 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3023 1.1 augustss ;
3024 1.53 augustss #ifdef DIAGNOSTIC
3025 1.53 augustss if (p == NULL)
3026 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
3027 1.53 augustss #endif
3028 1.1 augustss p->next = sed->next;
3029 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
3030 1.1 augustss splx(s);
3031 1.1 augustss
3032 1.1 augustss for (j = 0; j < nslots; j++)
3033 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3034 1.1 augustss
3035 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3036 1.1 augustss ohci_free_sed(sc, opipe->sed);
3037 1.1 augustss }
3038 1.1 augustss
3039 1.82 augustss Static usbd_status
3040 1.91 augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3041 1.1 augustss {
3042 1.1 augustss int i, j, s, best;
3043 1.1 augustss u_int npoll, slow, shigh, nslots;
3044 1.1 augustss u_int bestbw, bw;
3045 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
3046 1.1 augustss
3047 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3048 1.1 augustss if (ival == 0) {
3049 1.1 augustss printf("ohci_setintr: 0 interval\n");
3050 1.1 augustss return (USBD_INVAL);
3051 1.1 augustss }
3052 1.1 augustss
3053 1.1 augustss npoll = OHCI_NO_INTRS;
3054 1.1 augustss while (npoll > ival)
3055 1.1 augustss npoll /= 2;
3056 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3057 1.1 augustss
3058 1.1 augustss /*
3059 1.1 augustss * We now know which level in the tree the ED must go into.
3060 1.1 augustss * Figure out which slot has most bandwidth left over.
3061 1.1 augustss * Slots to examine:
3062 1.1 augustss * npoll
3063 1.1 augustss * 1 0
3064 1.1 augustss * 2 1 2
3065 1.1 augustss * 4 3 4 5 6
3066 1.1 augustss * 8 7 8 9 10 11 12 13 14
3067 1.1 augustss * N (N-1) .. (N-1+N-1)
3068 1.1 augustss */
3069 1.1 augustss slow = npoll-1;
3070 1.1 augustss shigh = slow + npoll;
3071 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
3072 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3073 1.1 augustss bw = 0;
3074 1.1 augustss for (j = 0; j < nslots; j++)
3075 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3076 1.1 augustss if (bw < bestbw) {
3077 1.1 augustss best = i;
3078 1.1 augustss bestbw = bw;
3079 1.1 augustss }
3080 1.1 augustss }
3081 1.101.2.6 nathanw DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3082 1.1 augustss best, slow, shigh, bestbw));
3083 1.1 augustss
3084 1.1 augustss s = splusb();
3085 1.1 augustss hsed = sc->sc_eds[best];
3086 1.1 augustss sed->next = hsed->next;
3087 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
3088 1.1 augustss hsed->next = sed;
3089 1.76 tsutsui hsed->ed.ed_nexted = htole32(sed->physaddr);
3090 1.1 augustss splx(s);
3091 1.1 augustss
3092 1.1 augustss for (j = 0; j < nslots; j++)
3093 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3094 1.1 augustss opipe->u.intr.nslots = nslots;
3095 1.1 augustss opipe->u.intr.pos = best;
3096 1.1 augustss
3097 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3098 1.1 augustss return (USBD_NORMAL_COMPLETION);
3099 1.60 augustss }
3100 1.60 augustss
3101 1.60 augustss /***********************/
3102 1.60 augustss
3103 1.60 augustss usbd_status
3104 1.91 augustss ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3105 1.60 augustss {
3106 1.60 augustss usbd_status err;
3107 1.60 augustss
3108 1.60 augustss DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3109 1.60 augustss
3110 1.60 augustss /* Put it on our queue, */
3111 1.60 augustss err = usb_insert_transfer(xfer);
3112 1.60 augustss
3113 1.60 augustss /* bail out on error, */
3114 1.60 augustss if (err && err != USBD_IN_PROGRESS)
3115 1.60 augustss return (err);
3116 1.60 augustss
3117 1.60 augustss /* XXX should check inuse here */
3118 1.60 augustss
3119 1.60 augustss /* insert into schedule, */
3120 1.60 augustss ohci_device_isoc_enter(xfer);
3121 1.60 augustss
3122 1.83 augustss /* and start if the pipe wasn't running */
3123 1.60 augustss if (!err)
3124 1.60 augustss ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3125 1.60 augustss
3126 1.60 augustss return (err);
3127 1.60 augustss }
3128 1.60 augustss
3129 1.60 augustss void
3130 1.91 augustss ohci_device_isoc_enter(usbd_xfer_handle xfer)
3131 1.60 augustss {
3132 1.61 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3133 1.61 augustss usbd_device_handle dev = opipe->pipe.device;
3134 1.61 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3135 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
3136 1.61 augustss struct iso *iso = &opipe->u.iso;
3137 1.101.2.6 nathanw ohci_soft_itd_t *sitd, *nsitd;
3138 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
3139 1.61 augustss int i, ncur, nframes;
3140 1.61 augustss int s;
3141 1.61 augustss
3142 1.83 augustss DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3143 1.83 augustss "nframes=%d\n",
3144 1.83 augustss iso->inuse, iso->next, xfer, xfer->nframes));
3145 1.83 augustss
3146 1.83 augustss if (sc->sc_dying)
3147 1.83 augustss return;
3148 1.83 augustss
3149 1.83 augustss if (iso->next == -1) {
3150 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
3151 1.83 augustss iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3152 1.101.2.6 nathanw DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3153 1.83 augustss iso->next));
3154 1.83 augustss }
3155 1.83 augustss
3156 1.61 augustss sitd = opipe->tail.itd;
3157 1.101.2.8 nathanw buf = DMAADDR(&xfer->dmabuf, 0);
3158 1.83 augustss bp0 = OHCI_PAGE(buf);
3159 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
3160 1.61 augustss nframes = xfer->nframes;
3161 1.83 augustss xfer->hcpriv = sitd;
3162 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
3163 1.83 augustss noffs = offs + xfer->frlengths[i];
3164 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3165 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3166 1.101.2.6 nathanw
3167 1.83 augustss /* Allocate next ITD */
3168 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3169 1.61 augustss if (nsitd == NULL) {
3170 1.61 augustss /* XXX what now? */
3171 1.83 augustss printf("%s: isoc TD alloc failed\n",
3172 1.83 augustss USBDEVNAME(sc->sc_bus.bdev));
3173 1.61 augustss return;
3174 1.61 augustss }
3175 1.83 augustss
3176 1.83 augustss /* Fill current ITD */
3177 1.76 tsutsui sitd->itd.itd_flags = htole32(
3178 1.101.2.6 nathanw OHCI_ITD_NOCC |
3179 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3180 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
3181 1.83 augustss OHCI_ITD_SET_FC(ncur));
3182 1.83 augustss sitd->itd.itd_bp0 = htole32(bp0);
3183 1.83 augustss sitd->nextitd = nsitd;
3184 1.83 augustss sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3185 1.83 augustss sitd->itd.itd_be = htole32(bp0 + offs - 1);
3186 1.83 augustss sitd->xfer = xfer;
3187 1.83 augustss sitd->flags = 0;
3188 1.83 augustss
3189 1.61 augustss sitd = nsitd;
3190 1.101.2.6 nathanw iso->next = iso->next + ncur;
3191 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
3192 1.61 augustss ncur = 0;
3193 1.61 augustss }
3194 1.83 augustss sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3195 1.83 augustss offs = noffs;
3196 1.61 augustss }
3197 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3198 1.61 augustss if (nsitd == NULL) {
3199 1.61 augustss /* XXX what now? */
3200 1.101.2.6 nathanw printf("%s: isoc TD alloc failed\n",
3201 1.83 augustss USBDEVNAME(sc->sc_bus.bdev));
3202 1.61 augustss return;
3203 1.61 augustss }
3204 1.83 augustss /* Fixup last used ITD */
3205 1.83 augustss sitd->itd.itd_flags = htole32(
3206 1.101.2.6 nathanw OHCI_ITD_NOCC |
3207 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3208 1.61 augustss OHCI_ITD_SET_DI(0) |
3209 1.61 augustss OHCI_ITD_SET_FC(ncur));
3210 1.83 augustss sitd->itd.itd_bp0 = htole32(bp0);
3211 1.83 augustss sitd->nextitd = nsitd;
3212 1.83 augustss sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3213 1.83 augustss sitd->itd.itd_be = htole32(bp0 + offs - 1);
3214 1.83 augustss sitd->xfer = xfer;
3215 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3216 1.83 augustss
3217 1.61 augustss iso->next = iso->next + ncur;
3218 1.83 augustss iso->inuse += nframes;
3219 1.83 augustss
3220 1.83 augustss xfer->actlen = offs; /* XXX pretend we did it all */
3221 1.83 augustss
3222 1.83 augustss xfer->status = USBD_IN_PROGRESS;
3223 1.83 augustss
3224 1.83 augustss #ifdef OHCI_DEBUG
3225 1.83 augustss if (ohcidebug > 5) {
3226 1.83 augustss DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3227 1.83 augustss le32toh(sc->sc_hcca->hcca_frame_number)));
3228 1.83 augustss ohci_dump_itds(xfer->hcpriv);
3229 1.83 augustss ohci_dump_ed(sed);
3230 1.83 augustss }
3231 1.83 augustss #endif
3232 1.61 augustss
3233 1.83 augustss s = splusb();
3234 1.61 augustss opipe->tail.itd = nsitd;
3235 1.76 tsutsui sed->ed.ed_tailp = htole32(nsitd->physaddr);
3236 1.61 augustss splx(s);
3237 1.83 augustss
3238 1.83 augustss #ifdef OHCI_DEBUG
3239 1.83 augustss if (ohcidebug > 5) {
3240 1.83 augustss delay(150000);
3241 1.83 augustss DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3242 1.83 augustss le32toh(sc->sc_hcca->hcca_frame_number)));
3243 1.83 augustss ohci_dump_itds(xfer->hcpriv);
3244 1.83 augustss ohci_dump_ed(sed);
3245 1.83 augustss }
3246 1.83 augustss #endif
3247 1.60 augustss }
3248 1.60 augustss
3249 1.60 augustss usbd_status
3250 1.91 augustss ohci_device_isoc_start(usbd_xfer_handle xfer)
3251 1.60 augustss {
3252 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3253 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3254 1.83 augustss
3255 1.83 augustss DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3256 1.83 augustss
3257 1.83 augustss if (sc->sc_dying)
3258 1.83 augustss return (USBD_IOERROR);
3259 1.83 augustss
3260 1.83 augustss #ifdef DIAGNOSTIC
3261 1.83 augustss if (xfer->status != USBD_IN_PROGRESS)
3262 1.101.2.7 nathanw printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3263 1.83 augustss #endif
3264 1.83 augustss
3265 1.83 augustss /* XXX anything to do? */
3266 1.83 augustss
3267 1.83 augustss return (USBD_IN_PROGRESS);
3268 1.60 augustss }
3269 1.60 augustss
3270 1.60 augustss void
3271 1.91 augustss ohci_device_isoc_abort(usbd_xfer_handle xfer)
3272 1.60 augustss {
3273 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3274 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3275 1.83 augustss ohci_soft_ed_t *sed;
3276 1.83 augustss ohci_soft_itd_t *sitd;
3277 1.83 augustss int s;
3278 1.83 augustss
3279 1.83 augustss s = splusb();
3280 1.83 augustss
3281 1.83 augustss DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3282 1.83 augustss
3283 1.83 augustss /* Transfer is already done. */
3284 1.101.2.6 nathanw if (xfer->status != USBD_NOT_STARTED &&
3285 1.83 augustss xfer->status != USBD_IN_PROGRESS) {
3286 1.83 augustss splx(s);
3287 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3288 1.83 augustss return;
3289 1.83 augustss }
3290 1.83 augustss
3291 1.83 augustss /* Give xfer the requested abort code. */
3292 1.83 augustss xfer->status = USBD_CANCELLED;
3293 1.83 augustss
3294 1.83 augustss sed = opipe->sed;
3295 1.83 augustss sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3296 1.83 augustss
3297 1.83 augustss sitd = xfer->hcpriv;
3298 1.83 augustss #ifdef DIAGNOSTIC
3299 1.83 augustss if (sitd == NULL) {
3300 1.101.2.1 nathanw splx(s);
3301 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3302 1.83 augustss return;
3303 1.83 augustss }
3304 1.83 augustss #endif
3305 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3306 1.83 augustss #ifdef DIAGNOSTIC
3307 1.83 augustss DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3308 1.83 augustss sitd->isdone = 1;
3309 1.83 augustss #endif
3310 1.83 augustss }
3311 1.83 augustss
3312 1.83 augustss splx(s);
3313 1.83 augustss
3314 1.83 augustss usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3315 1.83 augustss
3316 1.83 augustss s = splusb();
3317 1.83 augustss
3318 1.83 augustss /* Run callback. */
3319 1.83 augustss usb_transfer_complete(xfer);
3320 1.83 augustss
3321 1.83 augustss sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */
3322 1.83 augustss sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3323 1.83 augustss
3324 1.83 augustss splx(s);
3325 1.60 augustss }
3326 1.60 augustss
3327 1.60 augustss void
3328 1.91 augustss ohci_device_isoc_done(usbd_xfer_handle xfer)
3329 1.60 augustss {
3330 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3331 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3332 1.101.2.6 nathanw ohci_soft_itd_t *sitd, *nsitd;
3333 1.83 augustss
3334 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3335 1.83 augustss
3336 1.83 augustss for (sitd = xfer->hcpriv;
3337 1.83 augustss !(sitd->flags & OHCI_CALL_DONE);
3338 1.83 augustss sitd = nsitd) {
3339 1.83 augustss nsitd = sitd->nextitd;
3340 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd));
3341 1.83 augustss ohci_free_sitd(sc, sitd);
3342 1.83 augustss }
3343 1.83 augustss ohci_free_sitd(sc, sitd);
3344 1.83 augustss xfer->hcpriv = NULL;
3345 1.60 augustss }
3346 1.60 augustss
3347 1.60 augustss usbd_status
3348 1.91 augustss ohci_setup_isoc(usbd_pipe_handle pipe)
3349 1.60 augustss {
3350 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3351 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3352 1.60 augustss struct iso *iso = &opipe->u.iso;
3353 1.83 augustss int s;
3354 1.60 augustss
3355 1.60 augustss iso->next = -1;
3356 1.60 augustss iso->inuse = 0;
3357 1.60 augustss
3358 1.83 augustss s = splusb();
3359 1.83 augustss ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3360 1.83 augustss splx(s);
3361 1.83 augustss
3362 1.60 augustss return (USBD_NORMAL_COMPLETION);
3363 1.60 augustss }
3364 1.60 augustss
3365 1.60 augustss void
3366 1.91 augustss ohci_device_isoc_close(usbd_pipe_handle pipe)
3367 1.60 augustss {
3368 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3369 1.60 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3370 1.83 augustss int s;
3371 1.60 augustss
3372 1.60 augustss DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3373 1.83 augustss
3374 1.83 augustss s = splusb();
3375 1.83 augustss ohci_rem_ed(opipe->sed, sc->sc_isoc_head);
3376 1.83 augustss splx(s);
3377 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3378 1.83 augustss #ifdef DIAGNOSTIC
3379 1.83 augustss opipe->tail.itd->isdone = 1;
3380 1.83 augustss #endif
3381 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3382 1.1 augustss }
3383