ohci.c revision 1.13 1 1.13 augustss /* $NetBSD: ohci.c,v 1.13 1998/12/08 14:34:08 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Open Host Controller driver.
42 1.1 augustss *
43 1.1 augustss * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
44 1.1 augustss * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
45 1.1 augustss */
46 1.1 augustss
47 1.1 augustss #include <sys/param.h>
48 1.1 augustss #include <sys/systm.h>
49 1.1 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.1 augustss #include <sys/device.h>
52 1.1 augustss #include <sys/proc.h>
53 1.1 augustss #include <sys/queue.h>
54 1.1 augustss #include <sys/select.h>
55 1.1 augustss
56 1.4 augustss #include <machine/bus.h>
57 1.4 augustss
58 1.1 augustss #include <dev/usb/usb.h>
59 1.1 augustss #include <dev/usb/usbdi.h>
60 1.1 augustss #include <dev/usb/usbdivar.h>
61 1.1 augustss #include <dev/usb/usb_quirks.h>
62 1.4 augustss #include <dev/usb/usb_mem.h>
63 1.1 augustss
64 1.1 augustss #include <dev/usb/ohcireg.h>
65 1.1 augustss #include <dev/usb/ohcivar.h>
66 1.1 augustss
67 1.1 augustss int ohcidebug = 0;
68 1.1 augustss
69 1.1 augustss struct ohci_pipe;
70 1.1 augustss
71 1.1 augustss ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
72 1.1 augustss void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
73 1.1 augustss
74 1.1 augustss ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
75 1.1 augustss void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
76 1.1 augustss
77 1.1 augustss usbd_status ohci_open __P((usbd_pipe_handle));
78 1.5 augustss void ohci_poll __P((struct usbd_bus *));
79 1.1 augustss void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
80 1.1 augustss void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
81 1.1 augustss void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
82 1.1 augustss void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle));
83 1.1 augustss void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle));
84 1.3 augustss void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle));
85 1.1 augustss
86 1.1 augustss usbd_status ohci_device_request __P((usbd_request_handle reqh));
87 1.3 augustss void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
88 1.3 augustss void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
89 1.1 augustss void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
90 1.1 augustss void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
91 1.1 augustss ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
92 1.1 augustss
93 1.1 augustss usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
94 1.1 augustss void ohci_root_ctrl_abort __P((usbd_request_handle));
95 1.1 augustss void ohci_root_ctrl_close __P((usbd_pipe_handle));
96 1.1 augustss
97 1.1 augustss usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
98 1.1 augustss void ohci_root_intr_abort __P((usbd_request_handle));
99 1.1 augustss void ohci_root_intr_close __P((usbd_pipe_handle));
100 1.1 augustss
101 1.1 augustss usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
102 1.1 augustss void ohci_device_ctrl_abort __P((usbd_request_handle));
103 1.1 augustss void ohci_device_ctrl_close __P((usbd_pipe_handle));
104 1.1 augustss
105 1.3 augustss usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
106 1.3 augustss void ohci_device_bulk_abort __P((usbd_request_handle));
107 1.3 augustss void ohci_device_bulk_close __P((usbd_pipe_handle));
108 1.3 augustss
109 1.1 augustss usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
110 1.1 augustss void ohci_device_intr_abort __P((usbd_request_handle));
111 1.1 augustss void ohci_device_intr_close __P((usbd_pipe_handle));
112 1.1 augustss usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
113 1.1 augustss struct ohci_pipe *pipe, int ival));
114 1.1 augustss
115 1.1 augustss int ohci_str __P((usb_string_descriptor_t *, int, char *));
116 1.1 augustss
117 1.1 augustss void ohci_timeout __P((void *));
118 1.1 augustss void ohci_rhsc_able __P((ohci_softc_t *, int));
119 1.1 augustss
120 1.1 augustss #ifdef USB_DEBUG
121 1.1 augustss ohci_softc_t *thesc;
122 1.1 augustss void ohci_dumpregs __P((ohci_softc_t *));
123 1.1 augustss void ohci_dump_tds __P((ohci_soft_td_t *));
124 1.1 augustss void ohci_dump_td __P((ohci_soft_td_t *));
125 1.1 augustss void ohci_dump_ed __P((ohci_soft_ed_t *));
126 1.1 augustss #endif
127 1.1 augustss
128 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
129 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
130 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
131 1.1 augustss
132 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
133 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
134 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
135 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
136 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
137 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
138 1.1 augustss
139 1.1 augustss struct ohci_pipe {
140 1.1 augustss struct usbd_pipe pipe;
141 1.1 augustss ohci_soft_ed_t *sed;
142 1.1 augustss ohci_soft_td_t *tail;
143 1.1 augustss /* Info needed for different pipe kinds. */
144 1.1 augustss union {
145 1.1 augustss /* Control pipe */
146 1.1 augustss struct {
147 1.4 augustss usb_dma_t datadma;
148 1.4 augustss usb_dma_t reqdma;
149 1.1 augustss u_int length;
150 1.1 augustss ohci_soft_td_t *setup, *xfer, *stat;
151 1.1 augustss } ctl;
152 1.1 augustss /* Interrupt pipe */
153 1.1 augustss struct {
154 1.4 augustss usb_dma_t datadma;
155 1.1 augustss int nslots;
156 1.1 augustss int pos;
157 1.1 augustss } intr;
158 1.3 augustss /* Bulk pipe */
159 1.3 augustss struct {
160 1.4 augustss usb_dma_t datadma;
161 1.3 augustss u_int length;
162 1.3 augustss } bulk;
163 1.1 augustss } u;
164 1.1 augustss };
165 1.1 augustss
166 1.1 augustss #define OHCI_INTR_ENDPT 1
167 1.1 augustss
168 1.1 augustss struct usbd_methods ohci_root_ctrl_methods = {
169 1.1 augustss ohci_root_ctrl_transfer,
170 1.1 augustss ohci_root_ctrl_abort,
171 1.1 augustss ohci_root_ctrl_close,
172 1.7 augustss 0,
173 1.1 augustss };
174 1.1 augustss
175 1.1 augustss struct usbd_methods ohci_root_intr_methods = {
176 1.1 augustss ohci_root_intr_transfer,
177 1.1 augustss ohci_root_intr_abort,
178 1.1 augustss ohci_root_intr_close,
179 1.7 augustss 0,
180 1.1 augustss };
181 1.1 augustss
182 1.1 augustss struct usbd_methods ohci_device_ctrl_methods = {
183 1.1 augustss ohci_device_ctrl_transfer,
184 1.1 augustss ohci_device_ctrl_abort,
185 1.1 augustss ohci_device_ctrl_close,
186 1.7 augustss 0,
187 1.1 augustss };
188 1.1 augustss
189 1.1 augustss struct usbd_methods ohci_device_intr_methods = {
190 1.1 augustss ohci_device_intr_transfer,
191 1.1 augustss ohci_device_intr_abort,
192 1.1 augustss ohci_device_intr_close,
193 1.1 augustss };
194 1.1 augustss
195 1.3 augustss struct usbd_methods ohci_device_bulk_methods = {
196 1.3 augustss ohci_device_bulk_transfer,
197 1.3 augustss ohci_device_bulk_abort,
198 1.3 augustss ohci_device_bulk_close,
199 1.7 augustss 0,
200 1.3 augustss };
201 1.3 augustss
202 1.1 augustss ohci_soft_ed_t *
203 1.1 augustss ohci_alloc_sed(sc)
204 1.1 augustss ohci_softc_t *sc;
205 1.1 augustss {
206 1.1 augustss ohci_soft_ed_t *sed;
207 1.1 augustss usbd_status r;
208 1.1 augustss int i, offs;
209 1.4 augustss usb_dma_t dma;
210 1.1 augustss
211 1.1 augustss if (!sc->sc_freeeds) {
212 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
213 1.1 augustss sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
214 1.1 augustss M_USBDEV, M_NOWAIT);
215 1.1 augustss if (!sed)
216 1.1 augustss return 0;
217 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
218 1.4 augustss OHCI_ED_ALIGN, &dma);
219 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
220 1.1 augustss free(sed, M_USBDEV);
221 1.1 augustss return 0;
222 1.1 augustss }
223 1.1 augustss for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
224 1.1 augustss offs = i * OHCI_ED_SIZE;
225 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
226 1.1 augustss sed->ed = (ohci_ed_t *)
227 1.1 augustss ((char *)KERNADDR(&dma) + offs);
228 1.1 augustss sed->next = sc->sc_freeeds;
229 1.1 augustss sc->sc_freeeds = sed;
230 1.1 augustss }
231 1.1 augustss }
232 1.1 augustss sed = sc->sc_freeeds;
233 1.1 augustss sc->sc_freeeds = sed->next;
234 1.1 augustss memset(sed->ed, 0, OHCI_ED_SIZE);
235 1.1 augustss sed->next = 0;
236 1.1 augustss return sed;
237 1.1 augustss }
238 1.1 augustss
239 1.1 augustss void
240 1.1 augustss ohci_free_sed(sc, sed)
241 1.1 augustss ohci_softc_t *sc;
242 1.1 augustss ohci_soft_ed_t *sed;
243 1.1 augustss {
244 1.1 augustss sed->next = sc->sc_freeeds;
245 1.1 augustss sc->sc_freeeds = sed;
246 1.1 augustss }
247 1.1 augustss
248 1.1 augustss ohci_soft_td_t *
249 1.1 augustss ohci_alloc_std(sc)
250 1.1 augustss ohci_softc_t *sc;
251 1.1 augustss {
252 1.1 augustss ohci_soft_td_t *std;
253 1.1 augustss usbd_status r;
254 1.1 augustss int i, offs;
255 1.4 augustss usb_dma_t dma;
256 1.1 augustss
257 1.1 augustss if (!sc->sc_freetds) {
258 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
259 1.1 augustss std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
260 1.1 augustss M_USBDEV, M_NOWAIT);
261 1.1 augustss if (!std)
262 1.1 augustss return 0;
263 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
264 1.4 augustss OHCI_TD_ALIGN, &dma);
265 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
266 1.1 augustss free(std, M_USBDEV);
267 1.1 augustss return 0;
268 1.1 augustss }
269 1.1 augustss for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
270 1.1 augustss offs = i * OHCI_TD_SIZE;
271 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
272 1.1 augustss std->td = (ohci_td_t *)
273 1.1 augustss ((char *)KERNADDR(&dma) + offs);
274 1.1 augustss std->nexttd = sc->sc_freetds;
275 1.1 augustss sc->sc_freetds = std;
276 1.1 augustss }
277 1.1 augustss }
278 1.1 augustss std = sc->sc_freetds;
279 1.1 augustss sc->sc_freetds = std->nexttd;
280 1.1 augustss memset(std->td, 0, OHCI_TD_SIZE);
281 1.1 augustss std->nexttd = 0;
282 1.1 augustss return (std);
283 1.1 augustss }
284 1.1 augustss
285 1.1 augustss void
286 1.1 augustss ohci_free_std(sc, std)
287 1.1 augustss ohci_softc_t *sc;
288 1.1 augustss ohci_soft_td_t *std;
289 1.1 augustss {
290 1.1 augustss std->nexttd = sc->sc_freetds;
291 1.1 augustss sc->sc_freetds = std;
292 1.1 augustss }
293 1.1 augustss
294 1.1 augustss usbd_status
295 1.1 augustss ohci_init(sc)
296 1.1 augustss ohci_softc_t *sc;
297 1.1 augustss {
298 1.1 augustss ohci_soft_ed_t *sed, *psed;
299 1.1 augustss usbd_status r;
300 1.1 augustss int rev;
301 1.1 augustss int i;
302 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
303 1.1 augustss
304 1.1 augustss DPRINTF(("ohci_init: start\n"));
305 1.1 augustss rev = OREAD4(sc, OHCI_REVISION);
306 1.1 augustss printf("%s: OHCI version %d.%d%s\n", sc->sc_bus.bdev.dv_xname,
307 1.1 augustss OHCI_REV_HI(rev), OHCI_REV_LO(rev),
308 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
309 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
310 1.1 augustss printf("%s: unsupported OHCI revision\n",
311 1.1 augustss sc->sc_bus.bdev.dv_xname);
312 1.1 augustss return (USBD_INVAL);
313 1.1 augustss }
314 1.1 augustss
315 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
316 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
317 1.1 augustss
318 1.1 augustss /* Allocate the HCCA area. */
319 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
320 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
321 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
322 1.1 augustss return (r);
323 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
324 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
325 1.1 augustss
326 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
327 1.1 augustss
328 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
329 1.1 augustss if (!sc->sc_ctrl_head) {
330 1.1 augustss r = USBD_NOMEM;
331 1.1 augustss goto bad1;
332 1.1 augustss }
333 1.1 augustss sc->sc_ctrl_head->ed->ed_flags |= OHCI_ED_SKIP;
334 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
335 1.1 augustss if (!sc->sc_bulk_head) {
336 1.1 augustss r = USBD_NOMEM;
337 1.1 augustss goto bad2;
338 1.1 augustss }
339 1.1 augustss sc->sc_bulk_head->ed->ed_flags |= OHCI_ED_SKIP;
340 1.1 augustss
341 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
342 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
343 1.1 augustss sed = ohci_alloc_sed(sc);
344 1.1 augustss if (!sed) {
345 1.1 augustss while (--i >= 0)
346 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
347 1.1 augustss r = USBD_NOMEM;
348 1.1 augustss goto bad3;
349 1.1 augustss }
350 1.1 augustss /* All ED fields are set to 0. */
351 1.1 augustss sc->sc_eds[i] = sed;
352 1.1 augustss sed->ed->ed_flags |= OHCI_ED_SKIP;
353 1.1 augustss if (i != 0) {
354 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
355 1.1 augustss sed->next = psed;
356 1.1 augustss sed->ed->ed_nexted = psed->physaddr;
357 1.1 augustss }
358 1.1 augustss }
359 1.1 augustss /*
360 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
361 1.1 augustss * the tree set up properly to spread the interrupts.
362 1.1 augustss */
363 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
364 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
365 1.1 augustss sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr;
366 1.1 augustss
367 1.1 augustss /* Determine in what context we are running. */
368 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
369 1.1 augustss if (ctl & OHCI_IR) {
370 1.1 augustss /* SMM active, request change */
371 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
372 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
373 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
374 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
375 1.1 augustss delay(1000);
376 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
377 1.1 augustss }
378 1.1 augustss if ((ctl & OHCI_IR) == 0) {
379 1.1 augustss printf("%s: SMM does not respond, resetting\n",
380 1.1 augustss sc->sc_bus.bdev.dv_xname);
381 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
382 1.1 augustss goto reset;
383 1.1 augustss }
384 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
385 1.1 augustss /* BIOS started controller. */
386 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
387 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
388 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
389 1.1 augustss delay(USB_RESUME_DELAY * 1000);
390 1.1 augustss }
391 1.1 augustss } else {
392 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
393 1.1 augustss reset:
394 1.1 augustss /* Controller was cold started. */
395 1.1 augustss delay(USB_RESET_DELAY * 1000);
396 1.1 augustss }
397 1.1 augustss
398 1.1 augustss /* We now own the host controller and the bus has been reset. */
399 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
400 1.1 augustss
401 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
402 1.1 augustss /* Nominal time for a reset is 10 us. */
403 1.1 augustss for (i = 0; i < 10; i++) {
404 1.1 augustss delay(10);
405 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
406 1.1 augustss if (!hcr)
407 1.1 augustss break;
408 1.1 augustss }
409 1.1 augustss if (hcr) {
410 1.1 augustss printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname);
411 1.1 augustss r = USBD_IOERROR;
412 1.1 augustss goto bad3;
413 1.1 augustss }
414 1.1 augustss #ifdef USB_DEBUG
415 1.1 augustss thesc = sc;
416 1.1 augustss if (ohcidebug > 15)
417 1.1 augustss ohci_dumpregs(sc);
418 1.1 augustss #endif
419 1.1 augustss
420 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
421 1.1 augustss
422 1.1 augustss /* Set up HC registers. */
423 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
424 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
425 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
426 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
427 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
428 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
429 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
430 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
431 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
432 1.1 augustss /* And finally start it! */
433 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
434 1.1 augustss
435 1.1 augustss /*
436 1.1 augustss * The controller is now OPERATIONAL. Set a some final
437 1.1 augustss * registers that should be set earlier, but that the
438 1.1 augustss * controller ignores when in the SUSPEND state.
439 1.1 augustss */
440 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
441 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
442 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
443 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
444 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
445 1.1 augustss
446 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
447 1.1 augustss
448 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
449 1.1 augustss printf("%s: %d downstream port%s\n",
450 1.1 augustss sc->sc_bus.bdev.dv_xname, sc->sc_noport,
451 1.1 augustss sc->sc_noport != 1 ? "s" : "");
452 1.1 augustss
453 1.1 augustss #ifdef USB_DEBUG
454 1.1 augustss if (ohcidebug > 5)
455 1.1 augustss ohci_dumpregs(sc);
456 1.1 augustss #endif
457 1.1 augustss
458 1.1 augustss /* Set up the bus struct. */
459 1.1 augustss sc->sc_bus.open_pipe = ohci_open;
460 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
461 1.5 augustss sc->sc_bus.do_poll = ohci_poll;
462 1.1 augustss
463 1.1 augustss return (USBD_NORMAL_COMPLETION);
464 1.1 augustss
465 1.1 augustss bad3:
466 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
467 1.1 augustss bad2:
468 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
469 1.1 augustss bad1:
470 1.4 augustss usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
471 1.1 augustss return (r);
472 1.1 augustss }
473 1.1 augustss
474 1.1 augustss #ifdef USB_DEBUG
475 1.1 augustss void ohcidump(void);
476 1.1 augustss void ohcidump(void) { ohci_dumpregs(thesc); }
477 1.1 augustss
478 1.1 augustss void
479 1.1 augustss ohci_dumpregs(sc)
480 1.1 augustss ohci_softc_t *sc;
481 1.1 augustss {
482 1.1 augustss printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
483 1.1 augustss OREAD4(sc, OHCI_REVISION),
484 1.1 augustss OREAD4(sc, OHCI_CONTROL),
485 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
486 1.1 augustss printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
487 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
488 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
489 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE));
490 1.1 augustss printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
491 1.1 augustss OREAD4(sc, OHCI_HCCA),
492 1.1 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
493 1.1 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED));
494 1.1 augustss printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
495 1.1 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
496 1.1 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
497 1.1 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED));
498 1.1 augustss printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
499 1.1 augustss OREAD4(sc, OHCI_DONE_HEAD),
500 1.1 augustss OREAD4(sc, OHCI_FM_INTERVAL),
501 1.1 augustss OREAD4(sc, OHCI_FM_REMAINING));
502 1.1 augustss printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
503 1.1 augustss OREAD4(sc, OHCI_FM_NUMBER),
504 1.1 augustss OREAD4(sc, OHCI_PERIODIC_START),
505 1.1 augustss OREAD4(sc, OHCI_LS_THRESHOLD));
506 1.1 augustss printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
507 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
508 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
509 1.1 augustss OREAD4(sc, OHCI_RH_STATUS));
510 1.1 augustss printf(" port1=0x%08x port2=0x%08x\n",
511 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
512 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
513 1.1 augustss printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
514 1.1 augustss sc->sc_hcca->hcca_frame_number,
515 1.1 augustss sc->sc_hcca->hcca_done_head);
516 1.1 augustss }
517 1.1 augustss #endif
518 1.1 augustss
519 1.1 augustss int
520 1.1 augustss ohci_intr(p)
521 1.1 augustss void *p;
522 1.1 augustss {
523 1.1 augustss ohci_softc_t *sc = p;
524 1.1 augustss u_int32_t intrs, eintrs;
525 1.1 augustss ohci_physaddr_t done;
526 1.1 augustss
527 1.1 augustss done = sc->sc_hcca->hcca_done_head;
528 1.1 augustss if (done != 0) {
529 1.1 augustss intrs = OHCI_WDH;
530 1.1 augustss if (done & OHCI_DONE_INTRS)
531 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
532 1.1 augustss } else
533 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
534 1.1 augustss if (!intrs)
535 1.1 augustss return (0);
536 1.1 augustss intrs &= ~OHCI_MIE;
537 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
538 1.1 augustss eintrs = intrs & sc->sc_eintrs;
539 1.1 augustss if (!eintrs)
540 1.1 augustss return (0);
541 1.1 augustss
542 1.1 augustss sc->sc_intrs++;
543 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
544 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
545 1.1 augustss (u_int)eintrs));
546 1.1 augustss
547 1.1 augustss if (eintrs & OHCI_SO) {
548 1.1 augustss printf("%s: scheduling overrun\n", sc->sc_bus.bdev.dv_xname);
549 1.1 augustss /* XXX do what */
550 1.1 augustss intrs &= ~OHCI_SO;
551 1.1 augustss }
552 1.1 augustss if (eintrs & OHCI_WDH) {
553 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
554 1.1 augustss sc->sc_hcca->hcca_done_head = 0;
555 1.1 augustss intrs &= ~OHCI_WDH;
556 1.1 augustss }
557 1.1 augustss if (eintrs & OHCI_RD) {
558 1.1 augustss /* XXX process resume detect */
559 1.1 augustss }
560 1.1 augustss if (eintrs & OHCI_UE) {
561 1.1 augustss printf("%s: unrecoverable error, controller halted\n",
562 1.1 augustss sc->sc_bus.bdev.dv_xname);
563 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
564 1.1 augustss /* XXX what else */
565 1.1 augustss }
566 1.1 augustss if (eintrs & OHCI_RHSC) {
567 1.1 augustss ohci_rhsc(sc, sc->sc_intrreqh);
568 1.1 augustss intrs &= ~OHCI_RHSC;
569 1.1 augustss
570 1.1 augustss /*
571 1.1 augustss * Disable RHSC interrupt for now, because it will be
572 1.1 augustss * on until the port has been reset.
573 1.1 augustss */
574 1.1 augustss ohci_rhsc_able(sc, 0);
575 1.1 augustss }
576 1.1 augustss
577 1.1 augustss /* Block unprocessed interrupts. XXX */
578 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
579 1.1 augustss sc->sc_eintrs &= ~intrs;
580 1.1 augustss
581 1.1 augustss return (1);
582 1.1 augustss }
583 1.1 augustss
584 1.1 augustss void
585 1.1 augustss ohci_rhsc_able(sc, on)
586 1.1 augustss ohci_softc_t *sc;
587 1.1 augustss int on;
588 1.1 augustss {
589 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
590 1.1 augustss if (on) {
591 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
592 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
593 1.1 augustss } else {
594 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
595 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
596 1.1 augustss }
597 1.1 augustss }
598 1.1 augustss
599 1.13 augustss #ifdef USB_DEBUG
600 1.13 augustss char *ohci_cc_strs[] = {
601 1.13 augustss "NO_ERROR",
602 1.13 augustss "CRC",
603 1.13 augustss "BIT_STUFFING",
604 1.13 augustss "DATA_TOGGLE_MISMATCH",
605 1.13 augustss "STALL",
606 1.13 augustss "DEVICE_NOT_RESPONDING",
607 1.13 augustss "PID_CHECK_FAILURE",
608 1.13 augustss "UNEXPECTED_PID",
609 1.13 augustss "DATA_OVERRUN",
610 1.13 augustss "DATA_UNDERRUN",
611 1.13 augustss "BUFFER_OVERRUN",
612 1.13 augustss "BUFFER_UNDERRUN",
613 1.13 augustss "NOT_ACCESSED",
614 1.13 augustss };
615 1.13 augustss #endif
616 1.13 augustss
617 1.1 augustss void
618 1.1 augustss ohci_process_done(sc, done)
619 1.1 augustss ohci_softc_t *sc;
620 1.1 augustss ohci_physaddr_t done;
621 1.1 augustss {
622 1.1 augustss ohci_soft_td_t *std, *sdone;
623 1.1 augustss usbd_request_handle reqh;
624 1.1 augustss int len, cc;
625 1.1 augustss
626 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
627 1.1 augustss
628 1.1 augustss /* Reverse the done list. */
629 1.1 augustss for (sdone = 0; done; done = std->td->td_nexttd) {
630 1.1 augustss std = ohci_hash_find_td(sc, done);
631 1.1 augustss std->dnext = sdone;
632 1.1 augustss sdone = std;
633 1.1 augustss }
634 1.1 augustss
635 1.1 augustss #ifdef USB_DEBUG
636 1.1 augustss if (ohcidebug > 10) {
637 1.1 augustss printf("ohci_process_done: TD done:\n");
638 1.1 augustss ohci_dump_tds(sdone);
639 1.1 augustss }
640 1.1 augustss #endif
641 1.1 augustss
642 1.1 augustss for (std = sdone; std; std = std->dnext) {
643 1.1 augustss reqh = std->reqh;
644 1.1 augustss DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh));
645 1.1 augustss cc = OHCI_TD_GET_CC(std->td->td_flags);
646 1.1 augustss if (cc == OHCI_CC_NO_ERROR) {
647 1.1 augustss if (std->td->td_cbp == 0)
648 1.1 augustss len = std->len;
649 1.1 augustss else
650 1.1 augustss len = std->td->td_be - std->td->td_cbp + 1;
651 1.1 augustss reqh->actlen += len;
652 1.1 augustss if (reqh->hcpriv == std) {
653 1.1 augustss switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
654 1.1 augustss case UE_CONTROL:
655 1.1 augustss ohci_ctrl_done(sc, reqh);
656 1.1 augustss break;
657 1.1 augustss case UE_INTERRUPT:
658 1.1 augustss ohci_intr_done(sc, reqh);
659 1.1 augustss break;
660 1.1 augustss case UE_BULK:
661 1.3 augustss ohci_bulk_done(sc, reqh);
662 1.1 augustss break;
663 1.1 augustss case UE_ISOCHRONOUS:
664 1.1 augustss printf("ohci_process_done: ISO done?\n");
665 1.1 augustss break;
666 1.1 augustss }
667 1.1 augustss /* And finally execute callback. */
668 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
669 1.1 augustss reqh->xfercb(reqh);
670 1.1 augustss }
671 1.1 augustss } else {
672 1.1 augustss ohci_soft_td_t *p, *n;
673 1.1 augustss struct ohci_pipe *opipe =
674 1.1 augustss (struct ohci_pipe *)reqh->pipe;
675 1.13 augustss DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
676 1.13 augustss OHCI_TD_GET_CC(std->td->td_flags),
677 1.13 augustss ohci_cc_strs[OHCI_TD_GET_CC(std->td->td_flags)]));
678 1.1 augustss /*
679 1.1 augustss * Endpoint is halted. First unlink all the TDs
680 1.1 augustss * belonging to the failed transfer, and then restart
681 1.1 augustss * the endpoint.
682 1.1 augustss */
683 1.1 augustss for (p = std->nexttd; p->reqh == reqh; p = n) {
684 1.1 augustss n = p->nexttd;
685 1.1 augustss ohci_hash_rem_td(sc, p);
686 1.1 augustss ohci_free_std(sc, p);
687 1.1 augustss }
688 1.1 augustss opipe->sed->ed->ed_headp = p->physaddr;/* clear halt */
689 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
690 1.1 augustss
691 1.1 augustss if (cc == OHCI_CC_STALL)
692 1.1 augustss reqh->status = USBD_STALLED;
693 1.1 augustss else
694 1.1 augustss reqh->status = USBD_IOERROR;
695 1.1 augustss reqh->xfercb(reqh);
696 1.1 augustss }
697 1.1 augustss ohci_hash_rem_td(sc, std);
698 1.1 augustss ohci_free_std(sc, std);
699 1.1 augustss }
700 1.1 augustss }
701 1.1 augustss
702 1.1 augustss void
703 1.1 augustss ohci_ctrl_done(sc, reqh)
704 1.1 augustss ohci_softc_t *sc;
705 1.1 augustss usbd_request_handle reqh;
706 1.1 augustss {
707 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
708 1.1 augustss u_int len = opipe->u.ctl.length;
709 1.4 augustss usb_dma_t *dma;
710 1.1 augustss
711 1.1 augustss DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
712 1.1 augustss
713 1.1 augustss if (!reqh->isreq) {
714 1.8 augustss panic("ohci_ctrl_done: not a request\n");
715 1.1 augustss return;
716 1.1 augustss }
717 1.1 augustss
718 1.1 augustss if (len != 0) {
719 1.1 augustss dma = &opipe->u.ctl.datadma;
720 1.1 augustss if (reqh->request.bmRequestType & UT_READ)
721 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), len);
722 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
723 1.1 augustss }
724 1.12 augustss untimeout(ohci_timeout, reqh);
725 1.1 augustss }
726 1.1 augustss
727 1.1 augustss void
728 1.1 augustss ohci_intr_done(sc, reqh)
729 1.1 augustss ohci_softc_t *sc;
730 1.1 augustss usbd_request_handle reqh;
731 1.1 augustss {
732 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
733 1.4 augustss usb_dma_t *dma;
734 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
735 1.1 augustss ohci_soft_td_t *xfer, *tail;
736 1.1 augustss
737 1.1 augustss
738 1.1 augustss DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
739 1.1 augustss reqh, reqh->actlen));
740 1.1 augustss
741 1.1 augustss dma = &opipe->u.intr.datadma;
742 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
743 1.1 augustss
744 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
745 1.1 augustss xfer = opipe->tail;
746 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
747 1.1 augustss if (!tail) {
748 1.1 augustss reqh->status = USBD_NOMEM;
749 1.1 augustss return;
750 1.1 augustss }
751 1.1 augustss tail->reqh = 0;
752 1.1 augustss
753 1.1 augustss xfer->td->td_flags = OHCI_TD_IN | OHCI_TD_NOCC |
754 1.1 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY;
755 1.1 augustss xfer->td->td_cbp = DMAADDR(dma);
756 1.1 augustss xfer->nexttd = tail;
757 1.1 augustss xfer->td->td_nexttd = tail->physaddr;
758 1.1 augustss xfer->td->td_be = xfer->td->td_cbp + reqh->length - 1;
759 1.1 augustss xfer->len = reqh->length;
760 1.1 augustss xfer->reqh = reqh;
761 1.1 augustss
762 1.1 augustss reqh->actlen = 0;
763 1.1 augustss reqh->hcpriv = xfer;
764 1.1 augustss
765 1.1 augustss ohci_hash_add_td(sc, xfer);
766 1.1 augustss sed->ed->ed_tailp = tail->physaddr;
767 1.1 augustss opipe->tail = tail;
768 1.1 augustss } else {
769 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
770 1.1 augustss }
771 1.1 augustss }
772 1.1 augustss
773 1.1 augustss void
774 1.3 augustss ohci_bulk_done(sc, reqh)
775 1.3 augustss ohci_softc_t *sc;
776 1.3 augustss usbd_request_handle reqh;
777 1.3 augustss {
778 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
779 1.4 augustss usb_dma_t *dma;
780 1.3 augustss
781 1.3 augustss
782 1.3 augustss DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
783 1.3 augustss reqh, reqh->actlen));
784 1.3 augustss
785 1.3 augustss dma = &opipe->u.bulk.datadma;
786 1.3 augustss if (reqh->request.bmRequestType & UT_READ)
787 1.3 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
788 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
789 1.12 augustss untimeout(ohci_timeout, reqh);
790 1.3 augustss }
791 1.3 augustss
792 1.3 augustss void
793 1.1 augustss ohci_rhsc(sc, reqh)
794 1.1 augustss ohci_softc_t *sc;
795 1.1 augustss usbd_request_handle reqh;
796 1.1 augustss {
797 1.1 augustss usbd_pipe_handle pipe;
798 1.1 augustss struct ohci_pipe *opipe;
799 1.1 augustss u_char *p;
800 1.1 augustss int i, m;
801 1.1 augustss int hstatus;
802 1.1 augustss
803 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
804 1.1 augustss DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
805 1.1 augustss sc, reqh, hstatus));
806 1.1 augustss
807 1.1 augustss if (reqh == 0) {
808 1.1 augustss /* Just ignore the change. */
809 1.1 augustss return;
810 1.1 augustss }
811 1.1 augustss
812 1.1 augustss pipe = reqh->pipe;
813 1.1 augustss opipe = (struct ohci_pipe *)pipe;
814 1.1 augustss
815 1.1 augustss p = KERNADDR(&opipe->u.intr.datadma);
816 1.1 augustss m = min(sc->sc_noport, reqh->length * 8 - 1);
817 1.1 augustss memset(p, 0, reqh->length);
818 1.1 augustss for (i = 1; i <= m; i++) {
819 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
820 1.1 augustss p[i/8] |= 1 << (i%8);
821 1.1 augustss }
822 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
823 1.1 augustss reqh->actlen = reqh->length;
824 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
825 1.1 augustss reqh->xfercb(reqh);
826 1.1 augustss
827 1.1 augustss if (reqh->pipe->intrreqh != reqh) {
828 1.1 augustss sc->sc_intrreqh = 0;
829 1.4 augustss usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
830 1.1 augustss }
831 1.1 augustss }
832 1.1 augustss
833 1.1 augustss /*
834 1.1 augustss * Wait here until controller claims to have an interrupt.
835 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
836 1.1 augustss * too long.
837 1.1 augustss */
838 1.1 augustss void
839 1.1 augustss ohci_waitintr(sc, reqh)
840 1.1 augustss ohci_softc_t *sc;
841 1.1 augustss usbd_request_handle reqh;
842 1.1 augustss {
843 1.1 augustss int timo = reqh->timeout;
844 1.1 augustss int usecs;
845 1.1 augustss u_int32_t intrs;
846 1.1 augustss
847 1.1 augustss reqh->status = USBD_IN_PROGRESS;
848 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
849 1.1 augustss delay(1000);
850 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
851 1.1 augustss DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs));
852 1.1 augustss #ifdef USB_DEBUG
853 1.1 augustss if (ohcidebug > 15)
854 1.1 augustss ohci_dumpregs(sc);
855 1.1 augustss #endif
856 1.1 augustss if (intrs) {
857 1.1 augustss ohci_intr(sc);
858 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
859 1.1 augustss return;
860 1.1 augustss }
861 1.1 augustss }
862 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
863 1.1 augustss reqh->status = USBD_TIMEOUT;
864 1.1 augustss reqh->xfercb(reqh);
865 1.5 augustss }
866 1.5 augustss
867 1.5 augustss void
868 1.5 augustss ohci_poll(bus)
869 1.5 augustss struct usbd_bus *bus;
870 1.5 augustss {
871 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
872 1.5 augustss
873 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
874 1.5 augustss ohci_intr(sc);
875 1.1 augustss }
876 1.1 augustss
877 1.1 augustss usbd_status
878 1.1 augustss ohci_device_request(reqh)
879 1.1 augustss usbd_request_handle reqh;
880 1.1 augustss {
881 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
882 1.1 augustss usb_device_request_t *req = &reqh->request;
883 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
884 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
885 1.1 augustss int addr = dev->address;
886 1.1 augustss ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
887 1.1 augustss ohci_soft_ed_t *sed;
888 1.4 augustss usb_dma_t *dmap;
889 1.1 augustss int isread;
890 1.1 augustss int len;
891 1.1 augustss usbd_status r;
892 1.1 augustss int s;
893 1.1 augustss
894 1.1 augustss isread = req->bmRequestType & UT_READ;
895 1.1 augustss len = UGETW(req->wLength);
896 1.1 augustss
897 1.1 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
898 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
899 1.1 augustss UGETW(req->wIndex), len, addr,
900 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
901 1.1 augustss
902 1.1 augustss setup = opipe->tail;
903 1.1 augustss stat = ohci_alloc_std(sc);
904 1.1 augustss if (!stat) {
905 1.1 augustss r = USBD_NOMEM;
906 1.1 augustss goto bad1;
907 1.1 augustss }
908 1.1 augustss tail = ohci_alloc_std(sc);
909 1.1 augustss if (!tail) {
910 1.1 augustss r = USBD_NOMEM;
911 1.1 augustss goto bad2;
912 1.1 augustss }
913 1.1 augustss tail->reqh = 0;
914 1.1 augustss
915 1.1 augustss sed = opipe->sed;
916 1.1 augustss dmap = &opipe->u.ctl.datadma;
917 1.1 augustss opipe->u.ctl.length = len;
918 1.1 augustss
919 1.10 augustss /* Update device address and length since they may have changed. */
920 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
921 1.1 augustss sed->ed->ed_flags =
922 1.10 augustss (sed->ed->ed_flags & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
923 1.10 augustss OHCI_ED_SET_FA(addr) |
924 1.10 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize));
925 1.1 augustss
926 1.1 augustss /* Set up data transaction */
927 1.1 augustss if (len != 0) {
928 1.1 augustss xfer = ohci_alloc_std(sc);
929 1.1 augustss if (!xfer) {
930 1.1 augustss r = USBD_NOMEM;
931 1.1 augustss goto bad3;
932 1.1 augustss }
933 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
934 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
935 1.1 augustss goto bad4;
936 1.1 augustss xfer->td->td_flags =
937 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
938 1.1 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR;
939 1.1 augustss xfer->td->td_cbp = DMAADDR(dmap);
940 1.1 augustss xfer->nexttd = stat;
941 1.1 augustss xfer->td->td_nexttd = stat->physaddr;
942 1.1 augustss xfer->td->td_be = xfer->td->td_cbp + len - 1;
943 1.1 augustss xfer->len = len;
944 1.1 augustss xfer->reqh = reqh;
945 1.1 augustss
946 1.1 augustss next = xfer;
947 1.1 augustss } else
948 1.1 augustss next = stat;
949 1.1 augustss
950 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
951 1.1 augustss if (!isread && len != 0)
952 1.1 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
953 1.1 augustss
954 1.1 augustss setup->td->td_flags = OHCI_TD_SETUP | OHCI_TD_NOCC |
955 1.1 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR;
956 1.1 augustss setup->td->td_cbp = DMAADDR(&opipe->u.ctl.reqdma);
957 1.1 augustss setup->nexttd = next;
958 1.1 augustss setup->td->td_nexttd = next->physaddr;
959 1.1 augustss setup->td->td_be = setup->td->td_cbp + sizeof *req - 1;
960 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
961 1.1 augustss setup->reqh = reqh;
962 1.1 augustss
963 1.1 augustss stat->td->td_flags =
964 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
965 1.1 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1);
966 1.1 augustss stat->td->td_cbp = 0;
967 1.1 augustss stat->nexttd = tail;
968 1.1 augustss stat->td->td_nexttd = tail->physaddr;
969 1.1 augustss stat->td->td_be = 0;
970 1.1 augustss stat->len = 0;
971 1.1 augustss stat->reqh = reqh;
972 1.1 augustss
973 1.1 augustss reqh->actlen = 0;
974 1.1 augustss reqh->hcpriv = stat;
975 1.1 augustss
976 1.1 augustss #if USB_DEBUG
977 1.1 augustss if (ohcidebug > 5) {
978 1.1 augustss printf("ohci_device_request:\n");
979 1.1 augustss ohci_dump_ed(sed);
980 1.1 augustss ohci_dump_tds(setup);
981 1.1 augustss }
982 1.1 augustss #endif
983 1.1 augustss
984 1.1 augustss /* Insert ED in schedule */
985 1.1 augustss s = splusb();
986 1.1 augustss ohci_hash_add_td(sc, setup);
987 1.1 augustss if (len != 0)
988 1.1 augustss ohci_hash_add_td(sc, xfer);
989 1.1 augustss ohci_hash_add_td(sc, stat);
990 1.1 augustss sed->ed->ed_tailp = tail->physaddr;
991 1.1 augustss opipe->tail = tail;
992 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
993 1.6 augustss if (reqh->timeout && !sc->sc_bus.use_polling)
994 1.1 augustss timeout(ohci_timeout, reqh, MS_TO_TICKS(reqh->timeout));
995 1.1 augustss splx(s);
996 1.1 augustss
997 1.1 augustss #if USB_DEBUG
998 1.1 augustss if (ohcidebug > 5) {
999 1.1 augustss delay(5000);
1000 1.1 augustss printf("ohci_device_request: status=%x\n",
1001 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
1002 1.1 augustss ohci_dump_ed(sed);
1003 1.1 augustss ohci_dump_tds(setup);
1004 1.1 augustss }
1005 1.1 augustss #endif
1006 1.1 augustss
1007 1.1 augustss return (USBD_NORMAL_COMPLETION);
1008 1.1 augustss
1009 1.1 augustss bad4:
1010 1.1 augustss ohci_free_std(sc, xfer);
1011 1.1 augustss bad3:
1012 1.1 augustss ohci_free_std(sc, tail);
1013 1.1 augustss bad2:
1014 1.1 augustss ohci_free_std(sc, stat);
1015 1.1 augustss bad1:
1016 1.1 augustss return (r);
1017 1.1 augustss }
1018 1.1 augustss
1019 1.1 augustss /*
1020 1.1 augustss * Add an ED to the schedule. Called at splusb().
1021 1.1 augustss */
1022 1.1 augustss void
1023 1.3 augustss ohci_add_ed(sed, head)
1024 1.1 augustss ohci_soft_ed_t *sed;
1025 1.1 augustss ohci_soft_ed_t *head;
1026 1.1 augustss {
1027 1.1 augustss sed->next = head->next;
1028 1.1 augustss sed->ed->ed_nexted = head->ed->ed_nexted;
1029 1.1 augustss head->next = sed;
1030 1.1 augustss head->ed->ed_nexted = sed->physaddr;
1031 1.1 augustss }
1032 1.1 augustss
1033 1.1 augustss /*
1034 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1035 1.3 augustss */
1036 1.3 augustss void
1037 1.3 augustss ohci_rem_ed(sed, head)
1038 1.3 augustss ohci_soft_ed_t *sed;
1039 1.3 augustss ohci_soft_ed_t *head;
1040 1.3 augustss {
1041 1.3 augustss ohci_soft_ed_t *p;
1042 1.3 augustss
1043 1.3 augustss /* XXX */
1044 1.3 augustss for (p = head; p && p->next != sed; p = p->next)
1045 1.3 augustss ;
1046 1.3 augustss if (!p)
1047 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1048 1.3 augustss p->next = sed->next;
1049 1.3 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
1050 1.3 augustss }
1051 1.3 augustss
1052 1.3 augustss /*
1053 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1054 1.1 augustss * the host controller. This queue is the processed by software.
1055 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1056 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1057 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1058 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1059 1.1 augustss * hash value.
1060 1.1 augustss */
1061 1.1 augustss
1062 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1063 1.1 augustss /* Called at splusb() */
1064 1.1 augustss void
1065 1.1 augustss ohci_hash_add_td(sc, std)
1066 1.1 augustss ohci_softc_t *sc;
1067 1.1 augustss ohci_soft_td_t *std;
1068 1.1 augustss {
1069 1.1 augustss int h = HASH(std->physaddr);
1070 1.1 augustss
1071 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1072 1.1 augustss }
1073 1.1 augustss
1074 1.1 augustss /* Called at splusb() */
1075 1.1 augustss void
1076 1.1 augustss ohci_hash_rem_td(sc, std)
1077 1.1 augustss ohci_softc_t *sc;
1078 1.1 augustss ohci_soft_td_t *std;
1079 1.1 augustss {
1080 1.1 augustss LIST_REMOVE(std, hnext);
1081 1.1 augustss }
1082 1.1 augustss
1083 1.1 augustss ohci_soft_td_t *
1084 1.1 augustss ohci_hash_find_td(sc, a)
1085 1.1 augustss ohci_softc_t *sc;
1086 1.1 augustss ohci_physaddr_t a;
1087 1.1 augustss {
1088 1.1 augustss int h = HASH(a);
1089 1.1 augustss ohci_soft_td_t *std;
1090 1.1 augustss
1091 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1092 1.1 augustss std != 0;
1093 1.1 augustss std = LIST_NEXT(std, hnext))
1094 1.1 augustss if (std->physaddr == a)
1095 1.1 augustss return (std);
1096 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1097 1.1 augustss }
1098 1.1 augustss
1099 1.1 augustss void
1100 1.1 augustss ohci_timeout(addr)
1101 1.1 augustss void *addr;
1102 1.1 augustss {
1103 1.1 augustss #if 0
1104 1.1 augustss usbd_request_handle *reqh = addr;
1105 1.1 augustss int s;
1106 1.1 augustss
1107 1.1 augustss DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1108 1.1 augustss s = splusb();
1109 1.1 augustss /* XXX need to inactivate TD before calling interrupt routine */
1110 1.1 augustss ohci_XXX_done(reqh);
1111 1.1 augustss splx(s);
1112 1.1 augustss #endif
1113 1.1 augustss }
1114 1.1 augustss
1115 1.1 augustss #ifdef USB_DEBUG
1116 1.1 augustss void
1117 1.1 augustss ohci_dump_tds(std)
1118 1.1 augustss ohci_soft_td_t *std;
1119 1.1 augustss {
1120 1.1 augustss for (; std; std = std->nexttd)
1121 1.1 augustss ohci_dump_td(std);
1122 1.1 augustss }
1123 1.1 augustss
1124 1.1 augustss void
1125 1.1 augustss ohci_dump_td(std)
1126 1.1 augustss ohci_soft_td_t *std;
1127 1.1 augustss {
1128 1.1 augustss printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx nexttd=0x%08lx be=0x%08lx\n",
1129 1.1 augustss std, (u_long)std->physaddr,
1130 1.1 augustss (u_long)std->td->td_flags,
1131 1.1 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1132 1.1 augustss OHCI_TD_GET_DI(std->td->td_flags),
1133 1.1 augustss OHCI_TD_GET_EC(std->td->td_flags),
1134 1.1 augustss OHCI_TD_GET_CC(std->td->td_flags),
1135 1.1 augustss (u_long)std->td->td_cbp,
1136 1.1 augustss (u_long)std->td->td_nexttd, (u_long)std->td->td_be);
1137 1.1 augustss }
1138 1.1 augustss
1139 1.1 augustss void
1140 1.1 augustss ohci_dump_ed(sed)
1141 1.1 augustss ohci_soft_ed_t *sed;
1142 1.1 augustss {
1143 1.1 augustss printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx headp=%b nexted=0x%08lx\n",
1144 1.1 augustss sed, (u_long)sed->physaddr,
1145 1.1 augustss OHCI_ED_GET_FA(sed->ed->ed_flags),
1146 1.1 augustss OHCI_ED_GET_EN(sed->ed->ed_flags),
1147 1.1 augustss OHCI_ED_GET_MAXP(sed->ed->ed_flags),
1148 1.1 augustss (u_long)sed->ed->ed_flags,
1149 1.1 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO",
1150 1.1 augustss (u_long)sed->ed->ed_tailp,
1151 1.1 augustss (u_long)sed->ed->ed_headp, "\20\1HALT\2CARRY",
1152 1.1 augustss (u_long)sed->ed->ed_nexted);
1153 1.1 augustss }
1154 1.1 augustss #endif
1155 1.1 augustss
1156 1.1 augustss usbd_status
1157 1.1 augustss ohci_open(pipe)
1158 1.1 augustss usbd_pipe_handle pipe;
1159 1.1 augustss {
1160 1.1 augustss usbd_device_handle dev = pipe->device;
1161 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1162 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1163 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1164 1.1 augustss u_int8_t addr = dev->address;
1165 1.1 augustss ohci_soft_ed_t *sed;
1166 1.1 augustss ohci_soft_td_t *std;
1167 1.1 augustss usbd_status r;
1168 1.1 augustss int s;
1169 1.1 augustss
1170 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1171 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1172 1.1 augustss if (addr == sc->sc_addr) {
1173 1.1 augustss switch (ed->bEndpointAddress) {
1174 1.1 augustss case USB_CONTROL_ENDPOINT:
1175 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1176 1.1 augustss break;
1177 1.1 augustss case UE_IN | OHCI_INTR_ENDPT:
1178 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1179 1.1 augustss break;
1180 1.1 augustss default:
1181 1.1 augustss return (USBD_INVAL);
1182 1.1 augustss }
1183 1.1 augustss } else {
1184 1.1 augustss sed = ohci_alloc_sed(sc);
1185 1.1 augustss if (sed == 0)
1186 1.1 augustss goto bad0;
1187 1.1 augustss std = ohci_alloc_std(sc);
1188 1.1 augustss if (std == 0)
1189 1.1 augustss goto bad1;
1190 1.1 augustss opipe->sed = sed;
1191 1.1 augustss opipe->tail = std;
1192 1.1 augustss sed->ed->ed_flags =
1193 1.1 augustss OHCI_ED_SET_FA(addr) |
1194 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1195 1.1 augustss OHCI_ED_DIR_TD |
1196 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1197 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1198 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1199 1.9 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize));
1200 1.1 augustss sed->ed->ed_headp = sed->ed->ed_tailp = std->physaddr;
1201 1.1 augustss
1202 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1203 1.1 augustss case UE_CONTROL:
1204 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1205 1.4 augustss r = usb_allocmem(sc->sc_dmatag,
1206 1.4 augustss sizeof(usb_device_request_t),
1207 1.4 augustss 0, &opipe->u.ctl.reqdma);
1208 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1209 1.1 augustss goto bad;
1210 1.1 augustss s = splusb();
1211 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1212 1.1 augustss splx(s);
1213 1.1 augustss break;
1214 1.1 augustss case UE_INTERRUPT:
1215 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1216 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1217 1.1 augustss case UE_ISOCHRONOUS:
1218 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1219 1.1 augustss return (USBD_XXX);
1220 1.1 augustss case UE_BULK:
1221 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1222 1.3 augustss s = splusb();
1223 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1224 1.3 augustss splx(s);
1225 1.3 augustss break;
1226 1.1 augustss }
1227 1.1 augustss }
1228 1.1 augustss return (USBD_NORMAL_COMPLETION);
1229 1.1 augustss
1230 1.1 augustss bad:
1231 1.1 augustss ohci_free_std(sc, std);
1232 1.1 augustss bad1:
1233 1.1 augustss ohci_free_sed(sc, sed);
1234 1.1 augustss bad0:
1235 1.1 augustss return (USBD_NOMEM);
1236 1.1 augustss
1237 1.1 augustss }
1238 1.1 augustss
1239 1.1 augustss /*
1240 1.1 augustss * Data structures and routines to emulate the root hub.
1241 1.1 augustss */
1242 1.1 augustss usb_device_descriptor_t ohci_devd = {
1243 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1244 1.1 augustss UDESC_DEVICE, /* type */
1245 1.1 augustss {0x00, 0x01}, /* USB version */
1246 1.1 augustss UCLASS_HUB, /* class */
1247 1.1 augustss USUBCLASS_HUB, /* subclass */
1248 1.1 augustss 0, /* protocol */
1249 1.1 augustss 64, /* max packet */
1250 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1251 1.1 augustss 1,2,0, /* string indicies */
1252 1.1 augustss 1 /* # of configurations */
1253 1.1 augustss };
1254 1.1 augustss
1255 1.1 augustss usb_config_descriptor_t ohci_confd = {
1256 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1257 1.1 augustss UDESC_CONFIG,
1258 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1259 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1260 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1261 1.1 augustss 1,
1262 1.1 augustss 1,
1263 1.1 augustss 0,
1264 1.1 augustss UC_SELF_POWERED,
1265 1.1 augustss 0 /* max power */
1266 1.1 augustss };
1267 1.1 augustss
1268 1.1 augustss usb_interface_descriptor_t ohci_ifcd = {
1269 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1270 1.1 augustss UDESC_INTERFACE,
1271 1.1 augustss 0,
1272 1.1 augustss 0,
1273 1.1 augustss 1,
1274 1.1 augustss UCLASS_HUB,
1275 1.1 augustss USUBCLASS_HUB,
1276 1.1 augustss 0,
1277 1.1 augustss 0
1278 1.1 augustss };
1279 1.1 augustss
1280 1.1 augustss usb_endpoint_descriptor_t ohci_endpd = {
1281 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1282 1.1 augustss UDESC_ENDPOINT,
1283 1.1 augustss UE_IN | OHCI_INTR_ENDPT,
1284 1.1 augustss UE_INTERRUPT,
1285 1.1 augustss {8, 0}, /* max packet */
1286 1.1 augustss 255
1287 1.1 augustss };
1288 1.1 augustss
1289 1.1 augustss usb_hub_descriptor_t ohci_hubd = {
1290 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1291 1.1 augustss UDESC_HUB,
1292 1.1 augustss 0,
1293 1.1 augustss {0,0},
1294 1.1 augustss 0,
1295 1.1 augustss 0,
1296 1.1 augustss {0},
1297 1.1 augustss {0},
1298 1.1 augustss };
1299 1.1 augustss
1300 1.1 augustss int
1301 1.1 augustss ohci_str(p, l, s)
1302 1.1 augustss usb_string_descriptor_t *p;
1303 1.1 augustss int l;
1304 1.1 augustss char *s;
1305 1.1 augustss {
1306 1.1 augustss int i;
1307 1.1 augustss
1308 1.1 augustss if (l == 0)
1309 1.1 augustss return (0);
1310 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1311 1.1 augustss if (l == 1)
1312 1.1 augustss return (1);
1313 1.1 augustss p->bDescriptorType = UDESC_STRING;
1314 1.1 augustss l -= 2;
1315 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1316 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1317 1.1 augustss return (2*i+2);
1318 1.1 augustss }
1319 1.1 augustss
1320 1.1 augustss /*
1321 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1322 1.1 augustss */
1323 1.1 augustss usbd_status
1324 1.1 augustss ohci_root_ctrl_transfer(reqh)
1325 1.1 augustss usbd_request_handle reqh;
1326 1.1 augustss {
1327 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1328 1.1 augustss usb_device_request_t *req;
1329 1.1 augustss void *buf;
1330 1.1 augustss int port, i;
1331 1.1 augustss int len, value, index, l, totlen = 0;
1332 1.1 augustss usb_port_status_t ps;
1333 1.1 augustss usb_hub_descriptor_t hubd;
1334 1.1 augustss usbd_status r;
1335 1.1 augustss u_int32_t v;
1336 1.1 augustss
1337 1.1 augustss if (!reqh->isreq)
1338 1.1 augustss /* XXX panic */
1339 1.1 augustss return (USBD_INVAL);
1340 1.1 augustss req = &reqh->request;
1341 1.1 augustss buf = reqh->buffer;
1342 1.1 augustss
1343 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1344 1.1 augustss req->bmRequestType, req->bRequest));
1345 1.1 augustss
1346 1.1 augustss len = UGETW(req->wLength);
1347 1.1 augustss value = UGETW(req->wValue);
1348 1.1 augustss index = UGETW(req->wIndex);
1349 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1350 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1351 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1352 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1353 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1354 1.1 augustss /*
1355 1.1 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_STALL are no-ops
1356 1.1 augustss * for the integrated root hub.
1357 1.1 augustss */
1358 1.1 augustss break;
1359 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1360 1.1 augustss if (len > 0) {
1361 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1362 1.1 augustss totlen = 1;
1363 1.1 augustss }
1364 1.1 augustss break;
1365 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1366 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1367 1.1 augustss switch(value >> 8) {
1368 1.1 augustss case UDESC_DEVICE:
1369 1.1 augustss if ((value & 0xff) != 0) {
1370 1.1 augustss r = USBD_IOERROR;
1371 1.1 augustss goto ret;
1372 1.1 augustss }
1373 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1374 1.1 augustss memcpy(buf, &ohci_devd, l);
1375 1.1 augustss break;
1376 1.1 augustss case UDESC_CONFIG:
1377 1.1 augustss if ((value & 0xff) != 0) {
1378 1.1 augustss r = USBD_IOERROR;
1379 1.1 augustss goto ret;
1380 1.1 augustss }
1381 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1382 1.1 augustss memcpy(buf, &ohci_confd, l);
1383 1.1 augustss buf = (char *)buf + l;
1384 1.1 augustss len -= l;
1385 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1386 1.1 augustss totlen += l;
1387 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1388 1.1 augustss buf = (char *)buf + l;
1389 1.1 augustss len -= l;
1390 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1391 1.1 augustss totlen += l;
1392 1.1 augustss memcpy(buf, &ohci_endpd, l);
1393 1.1 augustss break;
1394 1.1 augustss case UDESC_STRING:
1395 1.1 augustss if (len == 0)
1396 1.1 augustss break;
1397 1.1 augustss *(u_int8_t *)buf = 0;
1398 1.1 augustss totlen = 1;
1399 1.1 augustss switch (value & 0xff) {
1400 1.1 augustss case 1: /* Vendor */
1401 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1402 1.1 augustss break;
1403 1.1 augustss case 2: /* Product */
1404 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1405 1.1 augustss break;
1406 1.1 augustss }
1407 1.1 augustss break;
1408 1.1 augustss default:
1409 1.1 augustss r = USBD_IOERROR;
1410 1.1 augustss goto ret;
1411 1.1 augustss }
1412 1.1 augustss break;
1413 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1414 1.1 augustss if (len > 0) {
1415 1.1 augustss *(u_int8_t *)buf = 0;
1416 1.1 augustss totlen = 1;
1417 1.1 augustss }
1418 1.1 augustss break;
1419 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1420 1.1 augustss if (len > 1) {
1421 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1422 1.1 augustss totlen = 2;
1423 1.1 augustss }
1424 1.1 augustss break;
1425 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1426 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1427 1.1 augustss if (len > 1) {
1428 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1429 1.1 augustss totlen = 2;
1430 1.1 augustss }
1431 1.1 augustss break;
1432 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1433 1.1 augustss if (value >= USB_MAX_DEVICES) {
1434 1.1 augustss r = USBD_IOERROR;
1435 1.1 augustss goto ret;
1436 1.1 augustss }
1437 1.1 augustss sc->sc_addr = value;
1438 1.1 augustss break;
1439 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1440 1.1 augustss if (value != 0 && value != 1) {
1441 1.1 augustss r = USBD_IOERROR;
1442 1.1 augustss goto ret;
1443 1.1 augustss }
1444 1.1 augustss sc->sc_conf = value;
1445 1.1 augustss break;
1446 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1447 1.1 augustss break;
1448 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1449 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1450 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1451 1.1 augustss r = USBD_IOERROR;
1452 1.1 augustss goto ret;
1453 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1454 1.1 augustss break;
1455 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1456 1.1 augustss break;
1457 1.1 augustss /* Hub requests */
1458 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1459 1.1 augustss break;
1460 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1461 1.1 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE port=%d feature=%d\n",
1462 1.1 augustss index, value));
1463 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1464 1.1 augustss r = USBD_IOERROR;
1465 1.1 augustss goto ret;
1466 1.1 augustss }
1467 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1468 1.1 augustss switch(value) {
1469 1.1 augustss case UHF_PORT_ENABLE:
1470 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1471 1.1 augustss break;
1472 1.1 augustss case UHF_PORT_SUSPEND:
1473 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1474 1.1 augustss break;
1475 1.1 augustss case UHF_PORT_POWER:
1476 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1477 1.1 augustss break;
1478 1.1 augustss case UHF_C_PORT_CONNECTION:
1479 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1480 1.1 augustss break;
1481 1.1 augustss case UHF_C_PORT_ENABLE:
1482 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1483 1.1 augustss break;
1484 1.1 augustss case UHF_C_PORT_SUSPEND:
1485 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1486 1.1 augustss break;
1487 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1488 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1489 1.1 augustss break;
1490 1.1 augustss case UHF_C_PORT_RESET:
1491 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1492 1.1 augustss break;
1493 1.1 augustss default:
1494 1.1 augustss r = USBD_IOERROR;
1495 1.1 augustss goto ret;
1496 1.1 augustss }
1497 1.1 augustss switch(value) {
1498 1.1 augustss case UHF_C_PORT_CONNECTION:
1499 1.1 augustss case UHF_C_PORT_ENABLE:
1500 1.1 augustss case UHF_C_PORT_SUSPEND:
1501 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1502 1.1 augustss case UHF_C_PORT_RESET:
1503 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1504 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1505 1.1 augustss ohci_rhsc_able(sc, 1);
1506 1.1 augustss break;
1507 1.1 augustss default:
1508 1.1 augustss break;
1509 1.1 augustss }
1510 1.1 augustss break;
1511 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1512 1.1 augustss if (value != 0) {
1513 1.1 augustss r = USBD_IOERROR;
1514 1.1 augustss goto ret;
1515 1.1 augustss }
1516 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1517 1.1 augustss hubd = ohci_hubd;
1518 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1519 1.1 augustss USETW(hubd.bHubCharacteristics,
1520 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1521 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1522 1.1 augustss /* XXX overcurrent */
1523 1.1 augustss );
1524 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1525 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1526 1.1 augustss if (sc->sc_noport < 8) {
1527 1.1 augustss hubd.DeviceRemovable[0] = (u_int8_t)v;
1528 1.1 augustss hubd.PortPowerCtrlMask[0] = (u_int8_t)(v >> 16);
1529 1.1 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE;
1530 1.1 augustss } else {
1531 1.1 augustss hubd.DeviceRemovable[0] = (u_int8_t)v;
1532 1.1 augustss hubd.DeviceRemovable[1] = (u_int8_t)(v>>8);
1533 1.1 augustss hubd.PortPowerCtrlMask[1] = (u_int8_t)(v >> 16);
1534 1.1 augustss hubd.PortPowerCtrlMask[2] = (u_int8_t)(v >> 24);
1535 1.1 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + 2;
1536 1.1 augustss }
1537 1.1 augustss l = min(len, hubd.bDescLength);
1538 1.1 augustss totlen = l;
1539 1.1 augustss memcpy(buf, &hubd, l);
1540 1.1 augustss break;
1541 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1542 1.1 augustss if (len != 4) {
1543 1.1 augustss r = USBD_IOERROR;
1544 1.1 augustss goto ret;
1545 1.1 augustss }
1546 1.1 augustss memset(buf, 0, len); /* ? XXX */
1547 1.1 augustss totlen = len;
1548 1.1 augustss break;
1549 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1550 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1551 1.1 augustss index));
1552 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1553 1.1 augustss r = USBD_IOERROR;
1554 1.1 augustss goto ret;
1555 1.1 augustss }
1556 1.1 augustss if (len != 4) {
1557 1.1 augustss r = USBD_IOERROR;
1558 1.1 augustss goto ret;
1559 1.1 augustss }
1560 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1561 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1562 1.1 augustss v));
1563 1.1 augustss USETW(ps.wPortStatus, v);
1564 1.1 augustss USETW(ps.wPortChange, v >> 16);
1565 1.1 augustss l = min(len, sizeof ps);
1566 1.1 augustss memcpy(buf, &ps, l);
1567 1.1 augustss totlen = l;
1568 1.1 augustss break;
1569 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1570 1.1 augustss r = USBD_IOERROR;
1571 1.1 augustss goto ret;
1572 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1573 1.1 augustss break;
1574 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1575 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1576 1.1 augustss r = USBD_IOERROR;
1577 1.1 augustss goto ret;
1578 1.1 augustss }
1579 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1580 1.1 augustss switch(value) {
1581 1.1 augustss case UHF_PORT_ENABLE:
1582 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
1583 1.1 augustss break;
1584 1.1 augustss case UHF_PORT_SUSPEND:
1585 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
1586 1.1 augustss break;
1587 1.1 augustss case UHF_PORT_RESET:
1588 1.1 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", index));
1589 1.1 augustss OWRITE4(sc, port, UPS_RESET);
1590 1.1 augustss for (i = 0; i < 10; i++) {
1591 1.6 augustss usbd_delay_ms(&sc->sc_bus, 10);
1592 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
1593 1.1 augustss break;
1594 1.1 augustss }
1595 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1596 1.1 augustss index, OREAD4(sc, port)));
1597 1.1 augustss break;
1598 1.1 augustss case UHF_PORT_POWER:
1599 1.1 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power %d\n", index));
1600 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
1601 1.1 augustss break;
1602 1.1 augustss default:
1603 1.1 augustss r = USBD_IOERROR;
1604 1.1 augustss goto ret;
1605 1.1 augustss }
1606 1.1 augustss break;
1607 1.1 augustss default:
1608 1.1 augustss r = USBD_IOERROR;
1609 1.1 augustss goto ret;
1610 1.1 augustss }
1611 1.1 augustss reqh->actlen = totlen;
1612 1.1 augustss r = USBD_NORMAL_COMPLETION;
1613 1.1 augustss ret:
1614 1.1 augustss reqh->status = r;
1615 1.1 augustss reqh->xfercb(reqh);
1616 1.1 augustss return (USBD_IN_PROGRESS);
1617 1.1 augustss }
1618 1.1 augustss
1619 1.1 augustss /* Abort a root control request. */
1620 1.1 augustss void
1621 1.1 augustss ohci_root_ctrl_abort(reqh)
1622 1.1 augustss usbd_request_handle reqh;
1623 1.1 augustss {
1624 1.9 augustss /* Nothing to do, all transfers are synchronous. */
1625 1.1 augustss }
1626 1.1 augustss
1627 1.1 augustss /* Close the root pipe. */
1628 1.1 augustss void
1629 1.1 augustss ohci_root_ctrl_close(pipe)
1630 1.1 augustss usbd_pipe_handle pipe;
1631 1.1 augustss {
1632 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
1633 1.1 augustss }
1634 1.1 augustss
1635 1.1 augustss usbd_status
1636 1.1 augustss ohci_root_intr_transfer(reqh)
1637 1.1 augustss usbd_request_handle reqh;
1638 1.1 augustss {
1639 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
1640 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1641 1.1 augustss struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
1642 1.4 augustss usb_dma_t *dmap;
1643 1.1 augustss usbd_status r;
1644 1.1 augustss int len;
1645 1.1 augustss
1646 1.1 augustss len = reqh->length;
1647 1.1 augustss dmap = &upipe->u.intr.datadma;
1648 1.1 augustss if (len == 0)
1649 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
1650 1.1 augustss
1651 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1652 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1653 1.1 augustss return (r);
1654 1.1 augustss sc->sc_intrreqh = reqh;
1655 1.1 augustss
1656 1.1 augustss return (USBD_IN_PROGRESS);
1657 1.1 augustss }
1658 1.1 augustss
1659 1.3 augustss /* Abort a root interrupt request. */
1660 1.1 augustss void
1661 1.1 augustss ohci_root_intr_abort(reqh)
1662 1.1 augustss usbd_request_handle reqh;
1663 1.1 augustss {
1664 1.3 augustss /* No need to abort. */
1665 1.1 augustss }
1666 1.1 augustss
1667 1.1 augustss /* Close the root pipe. */
1668 1.1 augustss void
1669 1.1 augustss ohci_root_intr_close(pipe)
1670 1.1 augustss usbd_pipe_handle pipe;
1671 1.1 augustss {
1672 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1673 1.1 augustss sc->sc_intrreqh = 0;
1674 1.1 augustss
1675 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
1676 1.1 augustss }
1677 1.1 augustss
1678 1.1 augustss /************************/
1679 1.1 augustss
1680 1.1 augustss usbd_status
1681 1.1 augustss ohci_device_ctrl_transfer(reqh)
1682 1.1 augustss usbd_request_handle reqh;
1683 1.1 augustss {
1684 1.6 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1685 1.1 augustss usbd_status r;
1686 1.1 augustss
1687 1.1 augustss if (!reqh->isreq) {
1688 1.1 augustss /* XXX panic */
1689 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
1690 1.1 augustss return (USBD_INVAL);
1691 1.1 augustss }
1692 1.1 augustss
1693 1.1 augustss r = ohci_device_request(reqh);
1694 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1695 1.1 augustss return (r);
1696 1.1 augustss
1697 1.6 augustss if (sc->sc_bus.use_polling)
1698 1.6 augustss ohci_waitintr(sc, reqh);
1699 1.1 augustss return (USBD_IN_PROGRESS);
1700 1.1 augustss }
1701 1.1 augustss
1702 1.1 augustss /* Abort a device control request. */
1703 1.1 augustss void
1704 1.1 augustss ohci_device_ctrl_abort(reqh)
1705 1.1 augustss usbd_request_handle reqh;
1706 1.1 augustss {
1707 1.3 augustss /* XXX inactivate */
1708 1.6 augustss usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is finished */
1709 1.3 augustss /* XXX call done */
1710 1.1 augustss }
1711 1.1 augustss
1712 1.1 augustss /* Close a device control pipe. */
1713 1.1 augustss void
1714 1.1 augustss ohci_device_ctrl_close(pipe)
1715 1.1 augustss usbd_pipe_handle pipe;
1716 1.1 augustss {
1717 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1718 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1719 1.3 augustss ohci_soft_ed_t *sed = opipe->sed;
1720 1.1 augustss int s;
1721 1.1 augustss
1722 1.1 augustss s = splusb();
1723 1.1 augustss sed->ed->ed_flags |= OHCI_ED_SKIP;
1724 1.1 augustss if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp)
1725 1.6 augustss usbd_delay_ms(&sc->sc_bus, 2);
1726 1.3 augustss ohci_rem_ed(sed, sc->sc_ctrl_head);
1727 1.3 augustss splx(s);
1728 1.3 augustss ohci_free_std(sc, opipe->tail);
1729 1.3 augustss ohci_free_sed(sc, opipe->sed);
1730 1.3 augustss /* XXX free other resources */
1731 1.3 augustss }
1732 1.3 augustss
1733 1.3 augustss /************************/
1734 1.3 augustss
1735 1.3 augustss usbd_status
1736 1.3 augustss ohci_device_bulk_transfer(reqh)
1737 1.3 augustss usbd_request_handle reqh;
1738 1.3 augustss {
1739 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1740 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
1741 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1742 1.3 augustss int addr = dev->address;
1743 1.3 augustss ohci_soft_td_t *xfer, *tail;
1744 1.3 augustss ohci_soft_ed_t *sed;
1745 1.4 augustss usb_dma_t *dmap;
1746 1.3 augustss usbd_status r;
1747 1.3 augustss int s, len, isread;
1748 1.3 augustss
1749 1.3 augustss if (reqh->isreq) {
1750 1.3 augustss /* XXX panic */
1751 1.3 augustss printf("ohci_device_bulk_transfer: a request\n");
1752 1.3 augustss return (USBD_INVAL);
1753 1.3 augustss }
1754 1.3 augustss
1755 1.3 augustss len = reqh->length;
1756 1.3 augustss dmap = &opipe->u.bulk.datadma;
1757 1.3 augustss isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1758 1.3 augustss sed = opipe->sed;
1759 1.3 augustss
1760 1.3 augustss opipe->u.bulk.length = len;
1761 1.3 augustss
1762 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1763 1.3 augustss if (r != USBD_NORMAL_COMPLETION)
1764 1.3 augustss goto ret1;
1765 1.3 augustss
1766 1.3 augustss tail = ohci_alloc_std(sc);
1767 1.3 augustss if (!tail) {
1768 1.3 augustss r = USBD_NOMEM;
1769 1.3 augustss goto ret2;
1770 1.3 augustss }
1771 1.3 augustss tail->reqh = 0;
1772 1.3 augustss
1773 1.3 augustss /* Update device address */
1774 1.3 augustss sed->ed->ed_flags =
1775 1.3 augustss (sed->ed->ed_flags & ~OHCI_ED_ADDRMASK) |
1776 1.3 augustss OHCI_ED_SET_FA(addr);
1777 1.3 augustss
1778 1.3 augustss /* Set up data transaction */
1779 1.3 augustss xfer = opipe->tail;
1780 1.3 augustss xfer->td->td_flags =
1781 1.3 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1782 1.3 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY;
1783 1.3 augustss xfer->td->td_cbp = DMAADDR(dmap);
1784 1.3 augustss xfer->nexttd = tail;
1785 1.3 augustss xfer->td->td_nexttd = tail->physaddr;
1786 1.3 augustss xfer->td->td_be = xfer->td->td_cbp + len - 1;
1787 1.3 augustss xfer->len = len;
1788 1.3 augustss xfer->reqh = reqh;
1789 1.3 augustss
1790 1.3 augustss reqh->actlen = 0;
1791 1.3 augustss reqh->hcpriv = xfer;
1792 1.3 augustss
1793 1.3 augustss if (!isread)
1794 1.3 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1795 1.3 augustss
1796 1.3 augustss /* Insert ED in schedule */
1797 1.3 augustss s = splusb();
1798 1.3 augustss ohci_hash_add_td(sc, xfer);
1799 1.3 augustss sed->ed->ed_tailp = tail->physaddr;
1800 1.3 augustss opipe->tail = tail;
1801 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1802 1.6 augustss if (reqh->timeout && !sc->sc_bus.use_polling)
1803 1.3 augustss timeout(ohci_timeout, reqh, MS_TO_TICKS(reqh->timeout));
1804 1.3 augustss splx(s);
1805 1.3 augustss
1806 1.3 augustss return (USBD_IN_PROGRESS);
1807 1.3 augustss
1808 1.3 augustss ret2:
1809 1.4 augustss usb_freemem(sc->sc_dmatag, dmap);
1810 1.3 augustss ret1:
1811 1.3 augustss return (r);
1812 1.3 augustss }
1813 1.3 augustss
1814 1.3 augustss /* Abort a device bulk request. */
1815 1.3 augustss void
1816 1.3 augustss ohci_device_bulk_abort(reqh)
1817 1.3 augustss usbd_request_handle reqh;
1818 1.3 augustss {
1819 1.3 augustss #if 0
1820 1.3 augustss sed->ed->ed_flags |= OHCI_ED_SKIP;
1821 1.3 augustss if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp)
1822 1.6 augustss usbd_delay_ms(reqh->pipe->device->bus, 2);
1823 1.3 augustss #endif
1824 1.3 augustss /* XXX inactivate */
1825 1.6 augustss usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is finished */
1826 1.3 augustss /* XXX call done */
1827 1.3 augustss }
1828 1.3 augustss
1829 1.3 augustss /* Close a device bulk pipe. */
1830 1.3 augustss void
1831 1.3 augustss ohci_device_bulk_close(pipe)
1832 1.3 augustss usbd_pipe_handle pipe;
1833 1.3 augustss {
1834 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1835 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
1836 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1837 1.3 augustss int s;
1838 1.3 augustss
1839 1.3 augustss s = splusb();
1840 1.3 augustss ohci_rem_ed(opipe->sed, sc->sc_bulk_head);
1841 1.1 augustss splx(s);
1842 1.1 augustss ohci_free_std(sc, opipe->tail);
1843 1.1 augustss ohci_free_sed(sc, opipe->sed);
1844 1.1 augustss /* XXX free other resources */
1845 1.1 augustss }
1846 1.1 augustss
1847 1.1 augustss /************************/
1848 1.1 augustss
1849 1.1 augustss usbd_status
1850 1.1 augustss ohci_device_intr_transfer(reqh)
1851 1.1 augustss usbd_request_handle reqh;
1852 1.1 augustss {
1853 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1854 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1855 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1856 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1857 1.1 augustss ohci_soft_td_t *xfer, *tail;
1858 1.4 augustss usb_dma_t *dmap;
1859 1.1 augustss usbd_status r;
1860 1.1 augustss int len;
1861 1.1 augustss int s;
1862 1.1 augustss
1863 1.1 augustss DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d flags=%d priv=%p\n",
1864 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
1865 1.1 augustss
1866 1.1 augustss if (reqh->isreq)
1867 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
1868 1.1 augustss
1869 1.1 augustss len = reqh->length;
1870 1.1 augustss dmap = &opipe->u.intr.datadma;
1871 1.1 augustss if (len == 0)
1872 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
1873 1.1 augustss
1874 1.1 augustss xfer = opipe->tail;
1875 1.1 augustss tail = ohci_alloc_std(sc);
1876 1.1 augustss if (!tail) {
1877 1.1 augustss r = USBD_NOMEM;
1878 1.1 augustss goto ret1;
1879 1.1 augustss }
1880 1.1 augustss tail->reqh = 0;
1881 1.1 augustss
1882 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1883 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1884 1.1 augustss goto ret2;
1885 1.1 augustss
1886 1.1 augustss xfer->td->td_flags = OHCI_TD_IN | OHCI_TD_NOCC |
1887 1.1 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY;
1888 1.1 augustss xfer->td->td_cbp = DMAADDR(dmap);
1889 1.1 augustss xfer->nexttd = tail;
1890 1.1 augustss xfer->td->td_nexttd = tail->physaddr;
1891 1.1 augustss xfer->td->td_be = xfer->td->td_cbp + len - 1;
1892 1.1 augustss xfer->len = len;
1893 1.1 augustss xfer->reqh = reqh;
1894 1.1 augustss
1895 1.1 augustss reqh->actlen = 0;
1896 1.1 augustss reqh->hcpriv = xfer;
1897 1.1 augustss
1898 1.1 augustss #if USB_DEBUG
1899 1.1 augustss if (ohcidebug > 5) {
1900 1.1 augustss printf("ohci_device_intr_transfer:\n");
1901 1.1 augustss ohci_dump_ed(sed);
1902 1.1 augustss ohci_dump_tds(xfer);
1903 1.1 augustss }
1904 1.1 augustss #endif
1905 1.1 augustss
1906 1.1 augustss /* Insert ED in schedule */
1907 1.1 augustss s = splusb();
1908 1.1 augustss ohci_hash_add_td(sc, xfer);
1909 1.1 augustss sed->ed->ed_tailp = tail->physaddr;
1910 1.1 augustss opipe->tail = tail;
1911 1.1 augustss #if 0
1912 1.6 augustss if (reqh->timeout && !sc->sc_bus.use_polling)
1913 1.1 augustss timeout(ohci_timeout, reqh, MS_TO_TICKS(reqh->timeout));
1914 1.1 augustss #endif
1915 1.1 augustss sed->ed->ed_flags &= ~OHCI_ED_SKIP;
1916 1.1 augustss splx(s);
1917 1.1 augustss
1918 1.1 augustss #ifdef USB_DEBUG
1919 1.1 augustss if (ohcidebug > 5) {
1920 1.1 augustss delay(5000);
1921 1.1 augustss printf("ohci_device_intr_transfer: status=%x\n",
1922 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
1923 1.1 augustss ohci_dump_ed(sed);
1924 1.1 augustss ohci_dump_tds(xfer);
1925 1.1 augustss }
1926 1.1 augustss #endif
1927 1.1 augustss
1928 1.1 augustss return (USBD_IN_PROGRESS);
1929 1.1 augustss
1930 1.1 augustss ret2:
1931 1.1 augustss ohci_free_std(sc, xfer);
1932 1.1 augustss ret1:
1933 1.1 augustss return (r);
1934 1.1 augustss }
1935 1.1 augustss
1936 1.1 augustss /* Abort a device control request. */
1937 1.1 augustss void
1938 1.1 augustss ohci_device_intr_abort(reqh)
1939 1.1 augustss usbd_request_handle reqh;
1940 1.1 augustss {
1941 1.3 augustss /* XXX inactivate */
1942 1.6 augustss usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is finished */
1943 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
1944 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
1945 1.1 augustss reqh->pipe->intrreqh = 0;
1946 1.1 augustss ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh);
1947 1.1 augustss }
1948 1.1 augustss }
1949 1.1 augustss
1950 1.1 augustss /* Close a device interrupt pipe. */
1951 1.1 augustss void
1952 1.1 augustss ohci_device_intr_close(pipe)
1953 1.1 augustss usbd_pipe_handle pipe;
1954 1.1 augustss {
1955 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1956 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1957 1.1 augustss int nslots = opipe->u.intr.nslots;
1958 1.1 augustss int pos = opipe->u.intr.pos;
1959 1.1 augustss int j;
1960 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
1961 1.1 augustss int s;
1962 1.1 augustss
1963 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
1964 1.1 augustss pipe, nslots, pos));
1965 1.1 augustss s = splusb();
1966 1.1 augustss sed->ed->ed_flags |= OHCI_ED_SKIP;
1967 1.1 augustss if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp)
1968 1.6 augustss usbd_delay_ms(&sc->sc_bus, 2);
1969 1.1 augustss
1970 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
1971 1.1 augustss ;
1972 1.1 augustss if (!p)
1973 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
1974 1.1 augustss p->next = sed->next;
1975 1.1 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
1976 1.1 augustss splx(s);
1977 1.1 augustss
1978 1.1 augustss for (j = 0; j < nslots; j++)
1979 1.1 augustss --sc->sc_bws[pos * nslots + j];
1980 1.1 augustss
1981 1.1 augustss ohci_free_std(sc, opipe->tail);
1982 1.1 augustss ohci_free_sed(sc, opipe->sed);
1983 1.1 augustss /* XXX free other resources */
1984 1.1 augustss }
1985 1.1 augustss
1986 1.1 augustss usbd_status
1987 1.1 augustss ohci_device_setintr(sc, opipe, ival)
1988 1.1 augustss ohci_softc_t *sc;
1989 1.1 augustss struct ohci_pipe *opipe;
1990 1.1 augustss int ival;
1991 1.1 augustss {
1992 1.1 augustss int i, j, s, best;
1993 1.1 augustss u_int npoll, slow, shigh, nslots;
1994 1.1 augustss u_int bestbw, bw;
1995 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
1996 1.1 augustss
1997 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
1998 1.1 augustss if (ival == 0) {
1999 1.1 augustss printf("ohci_setintr: 0 interval\n");
2000 1.1 augustss return (USBD_INVAL);
2001 1.1 augustss }
2002 1.1 augustss
2003 1.1 augustss npoll = OHCI_NO_INTRS;
2004 1.1 augustss while (npoll > ival)
2005 1.1 augustss npoll /= 2;
2006 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2007 1.1 augustss
2008 1.1 augustss /*
2009 1.1 augustss * We now know which level in the tree the ED must go into.
2010 1.1 augustss * Figure out which slot has most bandwidth left over.
2011 1.1 augustss * Slots to examine:
2012 1.1 augustss * npoll
2013 1.1 augustss * 1 0
2014 1.1 augustss * 2 1 2
2015 1.1 augustss * 4 3 4 5 6
2016 1.1 augustss * 8 7 8 9 10 11 12 13 14
2017 1.1 augustss * N (N-1) .. (N-1+N-1)
2018 1.1 augustss */
2019 1.1 augustss slow = npoll-1;
2020 1.1 augustss shigh = slow + npoll;
2021 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2022 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2023 1.1 augustss bw = 0;
2024 1.1 augustss for (j = 0; j < nslots; j++)
2025 1.1 augustss bw += sc->sc_bws[i * nslots + j];
2026 1.1 augustss if (bw < bestbw) {
2027 1.1 augustss best = i;
2028 1.1 augustss bestbw = bw;
2029 1.1 augustss }
2030 1.1 augustss }
2031 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2032 1.1 augustss best, slow, shigh, bestbw));
2033 1.1 augustss
2034 1.1 augustss s = splusb();
2035 1.1 augustss hsed = sc->sc_eds[best];
2036 1.1 augustss sed->next = hsed->next;
2037 1.1 augustss sed->ed->ed_nexted = hsed->ed->ed_nexted;
2038 1.1 augustss hsed->next = sed;
2039 1.1 augustss hsed->ed->ed_nexted = sed->physaddr;
2040 1.1 augustss splx(s);
2041 1.1 augustss
2042 1.1 augustss for (j = 0; j < nslots; j++)
2043 1.1 augustss ++sc->sc_bws[best * nslots + j];
2044 1.1 augustss opipe->u.intr.nslots = nslots;
2045 1.1 augustss opipe->u.intr.pos = best;
2046 1.1 augustss
2047 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2048 1.1 augustss return (USBD_NORMAL_COMPLETION);
2049 1.1 augustss }
2050 1.1 augustss
2051