ohci.c revision 1.17 1 1.17 augustss /* $NetBSD: ohci.c,v 1.17 1998/12/28 20:13:59 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Open Host Controller driver.
42 1.1 augustss *
43 1.1 augustss * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
44 1.1 augustss * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
45 1.1 augustss */
46 1.1 augustss
47 1.1 augustss #include <sys/param.h>
48 1.1 augustss #include <sys/systm.h>
49 1.1 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.15 augustss #if defined(__NetBSD__)
52 1.1 augustss #include <sys/device.h>
53 1.15 augustss #elif defined(__FreeBSD__)
54 1.15 augustss #include <sys/module.h>
55 1.15 augustss #include <sys/bus.h>
56 1.15 augustss #endif
57 1.1 augustss #include <sys/proc.h>
58 1.1 augustss #include <sys/queue.h>
59 1.1 augustss #include <sys/select.h>
60 1.1 augustss
61 1.4 augustss #include <machine/bus.h>
62 1.16 augustss #include <machine/endian.h>
63 1.4 augustss
64 1.1 augustss #include <dev/usb/usb.h>
65 1.1 augustss #include <dev/usb/usbdi.h>
66 1.1 augustss #include <dev/usb/usbdivar.h>
67 1.1 augustss #include <dev/usb/usb_quirks.h>
68 1.4 augustss #include <dev/usb/usb_mem.h>
69 1.1 augustss
70 1.1 augustss #include <dev/usb/ohcireg.h>
71 1.1 augustss #include <dev/usb/ohcivar.h>
72 1.1 augustss
73 1.15 augustss #if defined(__FreeBSD__)
74 1.15 augustss #include <machine/clock.h>
75 1.15 augustss #include "dev/usb/queue.addendum.h"
76 1.15 augustss
77 1.15 augustss #define delay(d) DELAY(d)
78 1.15 augustss
79 1.15 augustss #endif
80 1.1 augustss
81 1.16 augustss /*
82 1.16 augustss * The OHCI controller is little endian, so on big endian machines
83 1.16 augustss * the data strored in memory needs to be swapped.
84 1.16 augustss */
85 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
86 1.16 augustss #define LE(x) (bswap32(x))
87 1.16 augustss #else
88 1.16 augustss #define LE(x) (x)
89 1.16 augustss #endif
90 1.16 augustss
91 1.1 augustss struct ohci_pipe;
92 1.1 augustss
93 1.1 augustss ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
94 1.1 augustss void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
95 1.1 augustss
96 1.1 augustss ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
97 1.1 augustss void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
98 1.1 augustss
99 1.1 augustss usbd_status ohci_open __P((usbd_pipe_handle));
100 1.5 augustss void ohci_poll __P((struct usbd_bus *));
101 1.1 augustss void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
102 1.1 augustss void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
103 1.1 augustss void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
104 1.15 augustss void ohci_ii_done __P((ohci_softc_t *, usbd_request_handle));
105 1.1 augustss void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle));
106 1.1 augustss void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle));
107 1.3 augustss void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle));
108 1.1 augustss
109 1.1 augustss usbd_status ohci_device_request __P((usbd_request_handle reqh));
110 1.3 augustss void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
111 1.3 augustss void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
112 1.1 augustss void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
113 1.1 augustss void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
114 1.1 augustss ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
115 1.1 augustss
116 1.1 augustss usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
117 1.17 augustss usbd_status ohci_root_ctrl_start __P((usbd_request_handle));
118 1.1 augustss void ohci_root_ctrl_abort __P((usbd_request_handle));
119 1.1 augustss void ohci_root_ctrl_close __P((usbd_pipe_handle));
120 1.1 augustss
121 1.1 augustss usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
122 1.17 augustss usbd_status ohci_root_intr_start __P((usbd_request_handle));
123 1.1 augustss void ohci_root_intr_abort __P((usbd_request_handle));
124 1.1 augustss void ohci_root_intr_close __P((usbd_pipe_handle));
125 1.1 augustss
126 1.1 augustss usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
127 1.17 augustss usbd_status ohci_device_ctrl_start __P((usbd_request_handle));
128 1.1 augustss void ohci_device_ctrl_abort __P((usbd_request_handle));
129 1.1 augustss void ohci_device_ctrl_close __P((usbd_pipe_handle));
130 1.1 augustss
131 1.3 augustss usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
132 1.17 augustss usbd_status ohci_device_bulk_start __P((usbd_request_handle));
133 1.3 augustss void ohci_device_bulk_abort __P((usbd_request_handle));
134 1.3 augustss void ohci_device_bulk_close __P((usbd_pipe_handle));
135 1.3 augustss
136 1.1 augustss usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
137 1.17 augustss usbd_status ohci_device_intr_start __P((usbd_request_handle));
138 1.1 augustss void ohci_device_intr_abort __P((usbd_request_handle));
139 1.1 augustss void ohci_device_intr_close __P((usbd_pipe_handle));
140 1.1 augustss usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
141 1.1 augustss struct ohci_pipe *pipe, int ival));
142 1.1 augustss
143 1.1 augustss int ohci_str __P((usb_string_descriptor_t *, int, char *));
144 1.1 augustss
145 1.1 augustss void ohci_timeout __P((void *));
146 1.1 augustss void ohci_rhsc_able __P((ohci_softc_t *, int));
147 1.1 augustss
148 1.1 augustss #ifdef USB_DEBUG
149 1.1 augustss ohci_softc_t *thesc;
150 1.1 augustss void ohci_dumpregs __P((ohci_softc_t *));
151 1.1 augustss void ohci_dump_tds __P((ohci_soft_td_t *));
152 1.1 augustss void ohci_dump_td __P((ohci_soft_td_t *));
153 1.1 augustss void ohci_dump_ed __P((ohci_soft_ed_t *));
154 1.1 augustss #endif
155 1.1 augustss
156 1.15 augustss #if defined(__NetBSD__)
157 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
158 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
159 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
160 1.15 augustss #elif defined(__FreeBSD__)
161 1.15 augustss #define OWRITE4(sc, r, x) outl((sc)->sc_iobase + (r), (x))
162 1.15 augustss #define OREAD4(sc, r) inl((sc)->sc_iobase + (r))
163 1.15 augustss #define OREAD2(sc, r) inw((sc)->sc_iobase + (r))
164 1.15 augustss #endif
165 1.1 augustss
166 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
167 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
168 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
169 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
170 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
171 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
172 1.1 augustss
173 1.1 augustss struct ohci_pipe {
174 1.1 augustss struct usbd_pipe pipe;
175 1.1 augustss ohci_soft_ed_t *sed;
176 1.1 augustss ohci_soft_td_t *tail;
177 1.1 augustss /* Info needed for different pipe kinds. */
178 1.1 augustss union {
179 1.1 augustss /* Control pipe */
180 1.1 augustss struct {
181 1.4 augustss usb_dma_t datadma;
182 1.4 augustss usb_dma_t reqdma;
183 1.1 augustss u_int length;
184 1.1 augustss ohci_soft_td_t *setup, *xfer, *stat;
185 1.1 augustss } ctl;
186 1.1 augustss /* Interrupt pipe */
187 1.1 augustss struct {
188 1.4 augustss usb_dma_t datadma;
189 1.1 augustss int nslots;
190 1.1 augustss int pos;
191 1.1 augustss } intr;
192 1.3 augustss /* Bulk pipe */
193 1.3 augustss struct {
194 1.4 augustss usb_dma_t datadma;
195 1.3 augustss u_int length;
196 1.3 augustss } bulk;
197 1.1 augustss } u;
198 1.1 augustss };
199 1.1 augustss
200 1.1 augustss #define OHCI_INTR_ENDPT 1
201 1.1 augustss
202 1.1 augustss struct usbd_methods ohci_root_ctrl_methods = {
203 1.1 augustss ohci_root_ctrl_transfer,
204 1.17 augustss ohci_root_ctrl_start,
205 1.1 augustss ohci_root_ctrl_abort,
206 1.1 augustss ohci_root_ctrl_close,
207 1.7 augustss 0,
208 1.1 augustss };
209 1.1 augustss
210 1.1 augustss struct usbd_methods ohci_root_intr_methods = {
211 1.1 augustss ohci_root_intr_transfer,
212 1.17 augustss ohci_root_intr_start,
213 1.1 augustss ohci_root_intr_abort,
214 1.1 augustss ohci_root_intr_close,
215 1.7 augustss 0,
216 1.1 augustss };
217 1.1 augustss
218 1.1 augustss struct usbd_methods ohci_device_ctrl_methods = {
219 1.1 augustss ohci_device_ctrl_transfer,
220 1.17 augustss ohci_device_ctrl_start,
221 1.1 augustss ohci_device_ctrl_abort,
222 1.1 augustss ohci_device_ctrl_close,
223 1.7 augustss 0,
224 1.1 augustss };
225 1.1 augustss
226 1.1 augustss struct usbd_methods ohci_device_intr_methods = {
227 1.1 augustss ohci_device_intr_transfer,
228 1.17 augustss ohci_device_intr_start,
229 1.1 augustss ohci_device_intr_abort,
230 1.1 augustss ohci_device_intr_close,
231 1.1 augustss };
232 1.1 augustss
233 1.3 augustss struct usbd_methods ohci_device_bulk_methods = {
234 1.3 augustss ohci_device_bulk_transfer,
235 1.17 augustss ohci_device_bulk_start,
236 1.3 augustss ohci_device_bulk_abort,
237 1.3 augustss ohci_device_bulk_close,
238 1.7 augustss 0,
239 1.3 augustss };
240 1.3 augustss
241 1.1 augustss ohci_soft_ed_t *
242 1.1 augustss ohci_alloc_sed(sc)
243 1.1 augustss ohci_softc_t *sc;
244 1.1 augustss {
245 1.1 augustss ohci_soft_ed_t *sed;
246 1.1 augustss usbd_status r;
247 1.1 augustss int i, offs;
248 1.4 augustss usb_dma_t dma;
249 1.1 augustss
250 1.1 augustss if (!sc->sc_freeeds) {
251 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
252 1.1 augustss sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
253 1.1 augustss M_USBDEV, M_NOWAIT);
254 1.1 augustss if (!sed)
255 1.1 augustss return 0;
256 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
257 1.4 augustss OHCI_ED_ALIGN, &dma);
258 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
259 1.1 augustss free(sed, M_USBDEV);
260 1.1 augustss return 0;
261 1.1 augustss }
262 1.1 augustss for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
263 1.1 augustss offs = i * OHCI_ED_SIZE;
264 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
265 1.1 augustss sed->ed = (ohci_ed_t *)
266 1.1 augustss ((char *)KERNADDR(&dma) + offs);
267 1.1 augustss sed->next = sc->sc_freeeds;
268 1.1 augustss sc->sc_freeeds = sed;
269 1.1 augustss }
270 1.1 augustss }
271 1.1 augustss sed = sc->sc_freeeds;
272 1.1 augustss sc->sc_freeeds = sed->next;
273 1.1 augustss memset(sed->ed, 0, OHCI_ED_SIZE);
274 1.1 augustss sed->next = 0;
275 1.1 augustss return sed;
276 1.1 augustss }
277 1.1 augustss
278 1.1 augustss void
279 1.1 augustss ohci_free_sed(sc, sed)
280 1.1 augustss ohci_softc_t *sc;
281 1.1 augustss ohci_soft_ed_t *sed;
282 1.1 augustss {
283 1.1 augustss sed->next = sc->sc_freeeds;
284 1.1 augustss sc->sc_freeeds = sed;
285 1.1 augustss }
286 1.1 augustss
287 1.1 augustss ohci_soft_td_t *
288 1.1 augustss ohci_alloc_std(sc)
289 1.1 augustss ohci_softc_t *sc;
290 1.1 augustss {
291 1.1 augustss ohci_soft_td_t *std;
292 1.1 augustss usbd_status r;
293 1.1 augustss int i, offs;
294 1.4 augustss usb_dma_t dma;
295 1.1 augustss
296 1.1 augustss if (!sc->sc_freetds) {
297 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
298 1.1 augustss std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
299 1.1 augustss M_USBDEV, M_NOWAIT);
300 1.1 augustss if (!std)
301 1.1 augustss return 0;
302 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
303 1.4 augustss OHCI_TD_ALIGN, &dma);
304 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
305 1.1 augustss free(std, M_USBDEV);
306 1.1 augustss return 0;
307 1.1 augustss }
308 1.1 augustss for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
309 1.1 augustss offs = i * OHCI_TD_SIZE;
310 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
311 1.1 augustss std->td = (ohci_td_t *)
312 1.1 augustss ((char *)KERNADDR(&dma) + offs);
313 1.1 augustss std->nexttd = sc->sc_freetds;
314 1.1 augustss sc->sc_freetds = std;
315 1.1 augustss }
316 1.1 augustss }
317 1.1 augustss std = sc->sc_freetds;
318 1.1 augustss sc->sc_freetds = std->nexttd;
319 1.1 augustss memset(std->td, 0, OHCI_TD_SIZE);
320 1.1 augustss std->nexttd = 0;
321 1.1 augustss return (std);
322 1.1 augustss }
323 1.1 augustss
324 1.1 augustss void
325 1.1 augustss ohci_free_std(sc, std)
326 1.1 augustss ohci_softc_t *sc;
327 1.1 augustss ohci_soft_td_t *std;
328 1.1 augustss {
329 1.1 augustss std->nexttd = sc->sc_freetds;
330 1.1 augustss sc->sc_freetds = std;
331 1.1 augustss }
332 1.1 augustss
333 1.1 augustss usbd_status
334 1.1 augustss ohci_init(sc)
335 1.1 augustss ohci_softc_t *sc;
336 1.1 augustss {
337 1.1 augustss ohci_soft_ed_t *sed, *psed;
338 1.1 augustss usbd_status r;
339 1.1 augustss int rev;
340 1.1 augustss int i;
341 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
342 1.1 augustss
343 1.16 augustss #ifdef macppc
344 1.16 augustss /* XXX without reset, keyboard and mouse are never attached */
345 1.16 augustss printf("%s: resetting\n", sc->sc_bus.bdev.dv_xname);
346 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
347 1.16 augustss delay(USB_RESET_DELAY * 10000);
348 1.16 augustss #endif
349 1.16 augustss
350 1.1 augustss DPRINTF(("ohci_init: start\n"));
351 1.1 augustss rev = OREAD4(sc, OHCI_REVISION);
352 1.15 augustss printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
353 1.1 augustss OHCI_REV_HI(rev), OHCI_REV_LO(rev),
354 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
355 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
356 1.1 augustss printf("%s: unsupported OHCI revision\n",
357 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
358 1.1 augustss return (USBD_INVAL);
359 1.1 augustss }
360 1.1 augustss
361 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
362 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
363 1.1 augustss
364 1.1 augustss /* Allocate the HCCA area. */
365 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
366 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
367 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
368 1.1 augustss return (r);
369 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
370 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
371 1.1 augustss
372 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
373 1.1 augustss
374 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
375 1.1 augustss if (!sc->sc_ctrl_head) {
376 1.1 augustss r = USBD_NOMEM;
377 1.1 augustss goto bad1;
378 1.1 augustss }
379 1.16 augustss sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
380 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
381 1.1 augustss if (!sc->sc_bulk_head) {
382 1.1 augustss r = USBD_NOMEM;
383 1.1 augustss goto bad2;
384 1.1 augustss }
385 1.16 augustss sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
386 1.1 augustss
387 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
388 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
389 1.1 augustss sed = ohci_alloc_sed(sc);
390 1.1 augustss if (!sed) {
391 1.1 augustss while (--i >= 0)
392 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
393 1.1 augustss r = USBD_NOMEM;
394 1.1 augustss goto bad3;
395 1.1 augustss }
396 1.1 augustss /* All ED fields are set to 0. */
397 1.1 augustss sc->sc_eds[i] = sed;
398 1.16 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
399 1.1 augustss if (i != 0) {
400 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
401 1.1 augustss sed->next = psed;
402 1.16 augustss sed->ed->ed_nexted = LE(psed->physaddr);
403 1.1 augustss }
404 1.1 augustss }
405 1.1 augustss /*
406 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
407 1.1 augustss * the tree set up properly to spread the interrupts.
408 1.1 augustss */
409 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
410 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
411 1.16 augustss LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
412 1.1 augustss
413 1.1 augustss /* Determine in what context we are running. */
414 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
415 1.1 augustss if (ctl & OHCI_IR) {
416 1.1 augustss /* SMM active, request change */
417 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
418 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
419 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
420 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
421 1.1 augustss delay(1000);
422 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
423 1.1 augustss }
424 1.1 augustss if ((ctl & OHCI_IR) == 0) {
425 1.15 augustss printf("%s: SMM does not respond, resetting\n",
426 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
427 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
428 1.1 augustss goto reset;
429 1.1 augustss }
430 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
431 1.1 augustss /* BIOS started controller. */
432 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
433 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
434 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
435 1.1 augustss delay(USB_RESUME_DELAY * 1000);
436 1.1 augustss }
437 1.1 augustss } else {
438 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
439 1.1 augustss reset:
440 1.1 augustss /* Controller was cold started. */
441 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
442 1.1 augustss }
443 1.1 augustss
444 1.16 augustss /*
445 1.16 augustss * This reset should be necessary according to the OHCI spec, but
446 1.16 augustss * without it some controller don't start.
447 1.16 augustss */
448 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
449 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
450 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
451 1.16 augustss
452 1.1 augustss /* We now own the host controller and the bus has been reset. */
453 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
454 1.1 augustss
455 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
456 1.1 augustss /* Nominal time for a reset is 10 us. */
457 1.1 augustss for (i = 0; i < 10; i++) {
458 1.1 augustss delay(10);
459 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
460 1.1 augustss if (!hcr)
461 1.1 augustss break;
462 1.1 augustss }
463 1.1 augustss if (hcr) {
464 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
465 1.1 augustss r = USBD_IOERROR;
466 1.1 augustss goto bad3;
467 1.1 augustss }
468 1.1 augustss #ifdef USB_DEBUG
469 1.1 augustss thesc = sc;
470 1.1 augustss if (ohcidebug > 15)
471 1.1 augustss ohci_dumpregs(sc);
472 1.1 augustss #endif
473 1.1 augustss
474 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
475 1.1 augustss
476 1.1 augustss /* Set up HC registers. */
477 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
478 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
479 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
480 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
481 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
482 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
483 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
484 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
485 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
486 1.1 augustss /* And finally start it! */
487 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
488 1.1 augustss
489 1.1 augustss /*
490 1.1 augustss * The controller is now OPERATIONAL. Set a some final
491 1.1 augustss * registers that should be set earlier, but that the
492 1.1 augustss * controller ignores when in the SUSPEND state.
493 1.1 augustss */
494 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
495 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
496 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
497 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
498 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
499 1.1 augustss
500 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
501 1.1 augustss
502 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
503 1.1 augustss
504 1.1 augustss #ifdef USB_DEBUG
505 1.1 augustss if (ohcidebug > 5)
506 1.1 augustss ohci_dumpregs(sc);
507 1.1 augustss #endif
508 1.1 augustss
509 1.1 augustss /* Set up the bus struct. */
510 1.1 augustss sc->sc_bus.open_pipe = ohci_open;
511 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
512 1.5 augustss sc->sc_bus.do_poll = ohci_poll;
513 1.1 augustss
514 1.1 augustss return (USBD_NORMAL_COMPLETION);
515 1.1 augustss
516 1.1 augustss bad3:
517 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
518 1.1 augustss bad2:
519 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
520 1.1 augustss bad1:
521 1.4 augustss usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
522 1.1 augustss return (r);
523 1.1 augustss }
524 1.1 augustss
525 1.1 augustss #ifdef USB_DEBUG
526 1.1 augustss void ohcidump(void);
527 1.1 augustss void ohcidump(void) { ohci_dumpregs(thesc); }
528 1.1 augustss
529 1.1 augustss void
530 1.1 augustss ohci_dumpregs(sc)
531 1.1 augustss ohci_softc_t *sc;
532 1.1 augustss {
533 1.1 augustss printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
534 1.1 augustss OREAD4(sc, OHCI_REVISION),
535 1.1 augustss OREAD4(sc, OHCI_CONTROL),
536 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
537 1.1 augustss printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
538 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
539 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
540 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE));
541 1.1 augustss printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
542 1.1 augustss OREAD4(sc, OHCI_HCCA),
543 1.1 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
544 1.1 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED));
545 1.1 augustss printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
546 1.1 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
547 1.1 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
548 1.1 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED));
549 1.1 augustss printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
550 1.1 augustss OREAD4(sc, OHCI_DONE_HEAD),
551 1.1 augustss OREAD4(sc, OHCI_FM_INTERVAL),
552 1.1 augustss OREAD4(sc, OHCI_FM_REMAINING));
553 1.1 augustss printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
554 1.1 augustss OREAD4(sc, OHCI_FM_NUMBER),
555 1.1 augustss OREAD4(sc, OHCI_PERIODIC_START),
556 1.1 augustss OREAD4(sc, OHCI_LS_THRESHOLD));
557 1.1 augustss printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
558 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
559 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
560 1.1 augustss OREAD4(sc, OHCI_RH_STATUS));
561 1.1 augustss printf(" port1=0x%08x port2=0x%08x\n",
562 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
563 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
564 1.1 augustss printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
565 1.16 augustss LE(sc->sc_hcca->hcca_frame_number),
566 1.16 augustss LE(sc->sc_hcca->hcca_done_head));
567 1.1 augustss }
568 1.1 augustss #endif
569 1.1 augustss
570 1.1 augustss int
571 1.1 augustss ohci_intr(p)
572 1.1 augustss void *p;
573 1.1 augustss {
574 1.1 augustss ohci_softc_t *sc = p;
575 1.1 augustss u_int32_t intrs, eintrs;
576 1.1 augustss ohci_physaddr_t done;
577 1.1 augustss
578 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
579 1.15 augustss if (sc->sc_hcca == NULL) {
580 1.15 augustss #ifdef DIAGNOSTIC
581 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
582 1.15 augustss #endif
583 1.15 augustss return (0);
584 1.15 augustss }
585 1.15 augustss
586 1.16 augustss done = LE(sc->sc_hcca->hcca_done_head);
587 1.1 augustss if (done != 0) {
588 1.1 augustss intrs = OHCI_WDH;
589 1.1 augustss if (done & OHCI_DONE_INTRS)
590 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
591 1.1 augustss } else
592 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
593 1.1 augustss if (!intrs)
594 1.1 augustss return (0);
595 1.1 augustss intrs &= ~OHCI_MIE;
596 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
597 1.1 augustss eintrs = intrs & sc->sc_eintrs;
598 1.1 augustss if (!eintrs)
599 1.1 augustss return (0);
600 1.1 augustss
601 1.1 augustss sc->sc_intrs++;
602 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
603 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
604 1.1 augustss (u_int)eintrs));
605 1.1 augustss
606 1.1 augustss if (eintrs & OHCI_SO) {
607 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
608 1.1 augustss /* XXX do what */
609 1.1 augustss intrs &= ~OHCI_SO;
610 1.1 augustss }
611 1.1 augustss if (eintrs & OHCI_WDH) {
612 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
613 1.1 augustss sc->sc_hcca->hcca_done_head = 0;
614 1.1 augustss intrs &= ~OHCI_WDH;
615 1.1 augustss }
616 1.1 augustss if (eintrs & OHCI_RD) {
617 1.1 augustss /* XXX process resume detect */
618 1.1 augustss }
619 1.1 augustss if (eintrs & OHCI_UE) {
620 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
621 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
622 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
623 1.1 augustss /* XXX what else */
624 1.1 augustss }
625 1.1 augustss if (eintrs & OHCI_RHSC) {
626 1.1 augustss ohci_rhsc(sc, sc->sc_intrreqh);
627 1.1 augustss intrs &= ~OHCI_RHSC;
628 1.1 augustss
629 1.1 augustss /*
630 1.1 augustss * Disable RHSC interrupt for now, because it will be
631 1.1 augustss * on until the port has been reset.
632 1.1 augustss */
633 1.1 augustss ohci_rhsc_able(sc, 0);
634 1.1 augustss }
635 1.1 augustss
636 1.1 augustss /* Block unprocessed interrupts. XXX */
637 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
638 1.1 augustss sc->sc_eintrs &= ~intrs;
639 1.1 augustss
640 1.1 augustss return (1);
641 1.1 augustss }
642 1.1 augustss
643 1.1 augustss void
644 1.1 augustss ohci_rhsc_able(sc, on)
645 1.1 augustss ohci_softc_t *sc;
646 1.1 augustss int on;
647 1.1 augustss {
648 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
649 1.1 augustss if (on) {
650 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
651 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
652 1.1 augustss } else {
653 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
654 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
655 1.1 augustss }
656 1.1 augustss }
657 1.1 augustss
658 1.13 augustss #ifdef USB_DEBUG
659 1.13 augustss char *ohci_cc_strs[] = {
660 1.13 augustss "NO_ERROR",
661 1.13 augustss "CRC",
662 1.13 augustss "BIT_STUFFING",
663 1.13 augustss "DATA_TOGGLE_MISMATCH",
664 1.13 augustss "STALL",
665 1.13 augustss "DEVICE_NOT_RESPONDING",
666 1.13 augustss "PID_CHECK_FAILURE",
667 1.13 augustss "UNEXPECTED_PID",
668 1.13 augustss "DATA_OVERRUN",
669 1.13 augustss "DATA_UNDERRUN",
670 1.13 augustss "BUFFER_OVERRUN",
671 1.13 augustss "BUFFER_UNDERRUN",
672 1.13 augustss "NOT_ACCESSED",
673 1.13 augustss };
674 1.13 augustss #endif
675 1.13 augustss
676 1.1 augustss void
677 1.1 augustss ohci_process_done(sc, done)
678 1.1 augustss ohci_softc_t *sc;
679 1.1 augustss ohci_physaddr_t done;
680 1.1 augustss {
681 1.1 augustss ohci_soft_td_t *std, *sdone;
682 1.1 augustss usbd_request_handle reqh;
683 1.1 augustss int len, cc;
684 1.1 augustss
685 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
686 1.1 augustss
687 1.1 augustss /* Reverse the done list. */
688 1.16 augustss for (sdone = 0; done; done = LE(std->td->td_nexttd)) {
689 1.1 augustss std = ohci_hash_find_td(sc, done);
690 1.1 augustss std->dnext = sdone;
691 1.1 augustss sdone = std;
692 1.1 augustss }
693 1.1 augustss
694 1.1 augustss #ifdef USB_DEBUG
695 1.1 augustss if (ohcidebug > 10) {
696 1.1 augustss printf("ohci_process_done: TD done:\n");
697 1.1 augustss ohci_dump_tds(sdone);
698 1.1 augustss }
699 1.1 augustss #endif
700 1.1 augustss
701 1.1 augustss for (std = sdone; std; std = std->dnext) {
702 1.1 augustss reqh = std->reqh;
703 1.1 augustss DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh));
704 1.16 augustss cc = OHCI_TD_GET_CC(LE(std->td->td_flags));
705 1.1 augustss if (cc == OHCI_CC_NO_ERROR) {
706 1.1 augustss if (std->td->td_cbp == 0)
707 1.1 augustss len = std->len;
708 1.1 augustss else
709 1.16 augustss len = LE(std->td->td_be) -
710 1.16 augustss LE(std->td->td_cbp) + 1;
711 1.1 augustss reqh->actlen += len;
712 1.15 augustss reqh->status = USBD_NORMAL_COMPLETION;
713 1.15 augustss /*
714 1.15 augustss * Only do a callback on the last stage of a transfer.
715 1.15 augustss * Others have hcpriv = 0.
716 1.15 augustss */
717 1.15 augustss if (reqh->hcpriv == std)
718 1.15 augustss ohci_ii_done(sc, reqh);
719 1.1 augustss } else {
720 1.1 augustss ohci_soft_td_t *p, *n;
721 1.1 augustss struct ohci_pipe *opipe =
722 1.1 augustss (struct ohci_pipe *)reqh->pipe;
723 1.13 augustss DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
724 1.16 augustss OHCI_TD_GET_CC(LE(std->td->td_flags)),
725 1.16 augustss ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))]));
726 1.1 augustss /*
727 1.1 augustss * Endpoint is halted. First unlink all the TDs
728 1.1 augustss * belonging to the failed transfer, and then restart
729 1.1 augustss * the endpoint.
730 1.1 augustss */
731 1.1 augustss for (p = std->nexttd; p->reqh == reqh; p = n) {
732 1.1 augustss n = p->nexttd;
733 1.1 augustss ohci_hash_rem_td(sc, p);
734 1.1 augustss ohci_free_std(sc, p);
735 1.1 augustss }
736 1.16 augustss /* clear halt */
737 1.16 augustss opipe->sed->ed->ed_headp = LE(p->physaddr);
738 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
739 1.1 augustss
740 1.1 augustss if (cc == OHCI_CC_STALL)
741 1.1 augustss reqh->status = USBD_STALLED;
742 1.1 augustss else
743 1.1 augustss reqh->status = USBD_IOERROR;
744 1.15 augustss ohci_ii_done(sc, reqh);
745 1.1 augustss }
746 1.1 augustss ohci_hash_rem_td(sc, std);
747 1.1 augustss ohci_free_std(sc, std);
748 1.1 augustss }
749 1.1 augustss }
750 1.1 augustss
751 1.1 augustss void
752 1.15 augustss ohci_ii_done(sc, reqh)
753 1.15 augustss ohci_softc_t *sc;
754 1.15 augustss usbd_request_handle reqh;
755 1.15 augustss {
756 1.15 augustss switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
757 1.15 augustss case UE_CONTROL:
758 1.15 augustss ohci_ctrl_done(sc, reqh);
759 1.17 augustss usb_start_next(reqh->pipe);
760 1.15 augustss break;
761 1.15 augustss case UE_INTERRUPT:
762 1.15 augustss ohci_intr_done(sc, reqh);
763 1.15 augustss break;
764 1.15 augustss case UE_BULK:
765 1.15 augustss ohci_bulk_done(sc, reqh);
766 1.17 augustss usb_start_next(reqh->pipe);
767 1.15 augustss break;
768 1.15 augustss case UE_ISOCHRONOUS:
769 1.15 augustss printf("ohci_process_done: ISO done?\n");
770 1.17 augustss usb_start_next(reqh->pipe);
771 1.15 augustss break;
772 1.15 augustss }
773 1.15 augustss
774 1.15 augustss /* And finally execute callback. */
775 1.15 augustss reqh->xfercb(reqh);
776 1.15 augustss }
777 1.15 augustss
778 1.15 augustss void
779 1.1 augustss ohci_ctrl_done(sc, reqh)
780 1.1 augustss ohci_softc_t *sc;
781 1.1 augustss usbd_request_handle reqh;
782 1.1 augustss {
783 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
784 1.1 augustss u_int len = opipe->u.ctl.length;
785 1.4 augustss usb_dma_t *dma;
786 1.1 augustss
787 1.1 augustss DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
788 1.1 augustss
789 1.1 augustss if (!reqh->isreq) {
790 1.8 augustss panic("ohci_ctrl_done: not a request\n");
791 1.1 augustss return;
792 1.1 augustss }
793 1.1 augustss
794 1.1 augustss if (len != 0) {
795 1.1 augustss dma = &opipe->u.ctl.datadma;
796 1.1 augustss if (reqh->request.bmRequestType & UT_READ)
797 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), len);
798 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
799 1.1 augustss }
800 1.15 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
801 1.1 augustss }
802 1.1 augustss
803 1.1 augustss void
804 1.1 augustss ohci_intr_done(sc, reqh)
805 1.1 augustss ohci_softc_t *sc;
806 1.1 augustss usbd_request_handle reqh;
807 1.1 augustss {
808 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
809 1.4 augustss usb_dma_t *dma;
810 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
811 1.1 augustss ohci_soft_td_t *xfer, *tail;
812 1.1 augustss
813 1.1 augustss
814 1.1 augustss DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
815 1.1 augustss reqh, reqh->actlen));
816 1.1 augustss
817 1.1 augustss dma = &opipe->u.intr.datadma;
818 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
819 1.1 augustss
820 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
821 1.1 augustss xfer = opipe->tail;
822 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
823 1.1 augustss if (!tail) {
824 1.1 augustss reqh->status = USBD_NOMEM;
825 1.1 augustss return;
826 1.1 augustss }
827 1.1 augustss tail->reqh = 0;
828 1.1 augustss
829 1.16 augustss xfer->td->td_flags = LE(
830 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
831 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
832 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dma));
833 1.1 augustss xfer->nexttd = tail;
834 1.16 augustss xfer->td->td_nexttd = LE(tail->physaddr);
835 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1);
836 1.1 augustss xfer->len = reqh->length;
837 1.1 augustss xfer->reqh = reqh;
838 1.1 augustss
839 1.1 augustss reqh->actlen = 0;
840 1.1 augustss reqh->hcpriv = xfer;
841 1.1 augustss
842 1.1 augustss ohci_hash_add_td(sc, xfer);
843 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
844 1.1 augustss opipe->tail = tail;
845 1.1 augustss } else {
846 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
847 1.17 augustss usb_start_next(reqh->pipe);
848 1.1 augustss }
849 1.1 augustss }
850 1.1 augustss
851 1.1 augustss void
852 1.3 augustss ohci_bulk_done(sc, reqh)
853 1.3 augustss ohci_softc_t *sc;
854 1.3 augustss usbd_request_handle reqh;
855 1.3 augustss {
856 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
857 1.4 augustss usb_dma_t *dma;
858 1.3 augustss
859 1.3 augustss
860 1.3 augustss DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
861 1.3 augustss reqh, reqh->actlen));
862 1.3 augustss
863 1.3 augustss dma = &opipe->u.bulk.datadma;
864 1.3 augustss if (reqh->request.bmRequestType & UT_READ)
865 1.3 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
866 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
867 1.15 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
868 1.3 augustss }
869 1.3 augustss
870 1.3 augustss void
871 1.1 augustss ohci_rhsc(sc, reqh)
872 1.1 augustss ohci_softc_t *sc;
873 1.1 augustss usbd_request_handle reqh;
874 1.1 augustss {
875 1.1 augustss usbd_pipe_handle pipe;
876 1.1 augustss struct ohci_pipe *opipe;
877 1.1 augustss u_char *p;
878 1.1 augustss int i, m;
879 1.1 augustss int hstatus;
880 1.1 augustss
881 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
882 1.1 augustss DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
883 1.1 augustss sc, reqh, hstatus));
884 1.1 augustss
885 1.1 augustss if (reqh == 0) {
886 1.1 augustss /* Just ignore the change. */
887 1.1 augustss return;
888 1.1 augustss }
889 1.1 augustss
890 1.1 augustss pipe = reqh->pipe;
891 1.1 augustss opipe = (struct ohci_pipe *)pipe;
892 1.1 augustss
893 1.1 augustss p = KERNADDR(&opipe->u.intr.datadma);
894 1.1 augustss m = min(sc->sc_noport, reqh->length * 8 - 1);
895 1.1 augustss memset(p, 0, reqh->length);
896 1.1 augustss for (i = 1; i <= m; i++) {
897 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
898 1.1 augustss p[i/8] |= 1 << (i%8);
899 1.1 augustss }
900 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
901 1.1 augustss reqh->actlen = reqh->length;
902 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
903 1.1 augustss reqh->xfercb(reqh);
904 1.1 augustss
905 1.1 augustss if (reqh->pipe->intrreqh != reqh) {
906 1.1 augustss sc->sc_intrreqh = 0;
907 1.4 augustss usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
908 1.17 augustss usb_start_next(reqh->pipe);
909 1.1 augustss }
910 1.1 augustss }
911 1.1 augustss
912 1.1 augustss /*
913 1.1 augustss * Wait here until controller claims to have an interrupt.
914 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
915 1.1 augustss * too long.
916 1.1 augustss */
917 1.1 augustss void
918 1.1 augustss ohci_waitintr(sc, reqh)
919 1.1 augustss ohci_softc_t *sc;
920 1.1 augustss usbd_request_handle reqh;
921 1.1 augustss {
922 1.1 augustss int timo = reqh->timeout;
923 1.1 augustss int usecs;
924 1.1 augustss u_int32_t intrs;
925 1.1 augustss
926 1.1 augustss reqh->status = USBD_IN_PROGRESS;
927 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
928 1.15 augustss usbd_delay_ms(&sc->sc_bus, 1);
929 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
930 1.1 augustss DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs));
931 1.1 augustss #ifdef USB_DEBUG
932 1.1 augustss if (ohcidebug > 15)
933 1.1 augustss ohci_dumpregs(sc);
934 1.1 augustss #endif
935 1.1 augustss if (intrs) {
936 1.1 augustss ohci_intr(sc);
937 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
938 1.1 augustss return;
939 1.1 augustss }
940 1.1 augustss }
941 1.15 augustss
942 1.15 augustss /* Timeout */
943 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
944 1.1 augustss reqh->status = USBD_TIMEOUT;
945 1.15 augustss ohci_ii_done(sc, reqh);
946 1.15 augustss /* XXX should free TD */
947 1.5 augustss }
948 1.5 augustss
949 1.5 augustss void
950 1.5 augustss ohci_poll(bus)
951 1.5 augustss struct usbd_bus *bus;
952 1.5 augustss {
953 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
954 1.5 augustss
955 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
956 1.5 augustss ohci_intr(sc);
957 1.1 augustss }
958 1.1 augustss
959 1.1 augustss usbd_status
960 1.1 augustss ohci_device_request(reqh)
961 1.1 augustss usbd_request_handle reqh;
962 1.1 augustss {
963 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
964 1.1 augustss usb_device_request_t *req = &reqh->request;
965 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
966 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
967 1.1 augustss int addr = dev->address;
968 1.1 augustss ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
969 1.1 augustss ohci_soft_ed_t *sed;
970 1.4 augustss usb_dma_t *dmap;
971 1.1 augustss int isread;
972 1.1 augustss int len;
973 1.1 augustss usbd_status r;
974 1.1 augustss int s;
975 1.1 augustss
976 1.1 augustss isread = req->bmRequestType & UT_READ;
977 1.1 augustss len = UGETW(req->wLength);
978 1.1 augustss
979 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
980 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
981 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
982 1.1 augustss UGETW(req->wIndex), len, addr,
983 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
984 1.1 augustss
985 1.1 augustss setup = opipe->tail;
986 1.1 augustss stat = ohci_alloc_std(sc);
987 1.1 augustss if (!stat) {
988 1.1 augustss r = USBD_NOMEM;
989 1.1 augustss goto bad1;
990 1.1 augustss }
991 1.1 augustss tail = ohci_alloc_std(sc);
992 1.1 augustss if (!tail) {
993 1.1 augustss r = USBD_NOMEM;
994 1.1 augustss goto bad2;
995 1.1 augustss }
996 1.1 augustss tail->reqh = 0;
997 1.1 augustss
998 1.1 augustss sed = opipe->sed;
999 1.1 augustss dmap = &opipe->u.ctl.datadma;
1000 1.1 augustss opipe->u.ctl.length = len;
1001 1.1 augustss
1002 1.10 augustss /* Update device address and length since they may have changed. */
1003 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1004 1.16 augustss sed->ed->ed_flags = LE(
1005 1.16 augustss (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1006 1.16 augustss OHCI_ED_SET_FA(addr) |
1007 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1008 1.1 augustss
1009 1.1 augustss /* Set up data transaction */
1010 1.1 augustss if (len != 0) {
1011 1.1 augustss xfer = ohci_alloc_std(sc);
1012 1.1 augustss if (!xfer) {
1013 1.1 augustss r = USBD_NOMEM;
1014 1.1 augustss goto bad3;
1015 1.1 augustss }
1016 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1017 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1018 1.1 augustss goto bad4;
1019 1.16 augustss xfer->td->td_flags = LE(
1020 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1021 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR);
1022 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dmap));
1023 1.1 augustss xfer->nexttd = stat;
1024 1.16 augustss xfer->td->td_nexttd = LE(stat->physaddr);
1025 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
1026 1.1 augustss xfer->len = len;
1027 1.1 augustss xfer->reqh = reqh;
1028 1.1 augustss
1029 1.1 augustss next = xfer;
1030 1.1 augustss } else
1031 1.1 augustss next = stat;
1032 1.1 augustss
1033 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1034 1.1 augustss if (!isread && len != 0)
1035 1.1 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1036 1.1 augustss
1037 1.16 augustss setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1038 1.16 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1039 1.16 augustss setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1040 1.1 augustss setup->nexttd = next;
1041 1.16 augustss setup->td->td_nexttd = LE(next->physaddr);
1042 1.16 augustss setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1);
1043 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
1044 1.1 augustss setup->reqh = reqh;
1045 1.1 augustss
1046 1.16 augustss stat->td->td_flags = LE(
1047 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1048 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1049 1.1 augustss stat->td->td_cbp = 0;
1050 1.1 augustss stat->nexttd = tail;
1051 1.16 augustss stat->td->td_nexttd = LE(tail->physaddr);
1052 1.1 augustss stat->td->td_be = 0;
1053 1.1 augustss stat->len = 0;
1054 1.1 augustss stat->reqh = reqh;
1055 1.1 augustss
1056 1.1 augustss reqh->actlen = 0;
1057 1.1 augustss reqh->hcpriv = stat;
1058 1.1 augustss
1059 1.1 augustss #if USB_DEBUG
1060 1.1 augustss if (ohcidebug > 5) {
1061 1.1 augustss printf("ohci_device_request:\n");
1062 1.1 augustss ohci_dump_ed(sed);
1063 1.1 augustss ohci_dump_tds(setup);
1064 1.1 augustss }
1065 1.1 augustss #endif
1066 1.1 augustss
1067 1.1 augustss /* Insert ED in schedule */
1068 1.1 augustss s = splusb();
1069 1.1 augustss ohci_hash_add_td(sc, setup);
1070 1.1 augustss if (len != 0)
1071 1.1 augustss ohci_hash_add_td(sc, xfer);
1072 1.1 augustss ohci_hash_add_td(sc, stat);
1073 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
1074 1.1 augustss opipe->tail = tail;
1075 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1076 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1077 1.15 augustss usb_timeout(ohci_timeout, reqh,
1078 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1079 1.15 augustss }
1080 1.1 augustss splx(s);
1081 1.1 augustss
1082 1.1 augustss #if USB_DEBUG
1083 1.1 augustss if (ohcidebug > 5) {
1084 1.1 augustss delay(5000);
1085 1.1 augustss printf("ohci_device_request: status=%x\n",
1086 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
1087 1.1 augustss ohci_dump_ed(sed);
1088 1.1 augustss ohci_dump_tds(setup);
1089 1.1 augustss }
1090 1.1 augustss #endif
1091 1.1 augustss
1092 1.1 augustss return (USBD_NORMAL_COMPLETION);
1093 1.1 augustss
1094 1.1 augustss bad4:
1095 1.1 augustss ohci_free_std(sc, xfer);
1096 1.1 augustss bad3:
1097 1.1 augustss ohci_free_std(sc, tail);
1098 1.1 augustss bad2:
1099 1.1 augustss ohci_free_std(sc, stat);
1100 1.1 augustss bad1:
1101 1.1 augustss return (r);
1102 1.1 augustss }
1103 1.1 augustss
1104 1.1 augustss /*
1105 1.1 augustss * Add an ED to the schedule. Called at splusb().
1106 1.1 augustss */
1107 1.1 augustss void
1108 1.3 augustss ohci_add_ed(sed, head)
1109 1.1 augustss ohci_soft_ed_t *sed;
1110 1.1 augustss ohci_soft_ed_t *head;
1111 1.1 augustss {
1112 1.1 augustss sed->next = head->next;
1113 1.1 augustss sed->ed->ed_nexted = head->ed->ed_nexted;
1114 1.1 augustss head->next = sed;
1115 1.16 augustss head->ed->ed_nexted = LE(sed->physaddr);
1116 1.1 augustss }
1117 1.1 augustss
1118 1.1 augustss /*
1119 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1120 1.3 augustss */
1121 1.3 augustss void
1122 1.3 augustss ohci_rem_ed(sed, head)
1123 1.3 augustss ohci_soft_ed_t *sed;
1124 1.3 augustss ohci_soft_ed_t *head;
1125 1.3 augustss {
1126 1.3 augustss ohci_soft_ed_t *p;
1127 1.3 augustss
1128 1.3 augustss /* XXX */
1129 1.3 augustss for (p = head; p && p->next != sed; p = p->next)
1130 1.3 augustss ;
1131 1.3 augustss if (!p)
1132 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1133 1.3 augustss p->next = sed->next;
1134 1.3 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
1135 1.3 augustss }
1136 1.3 augustss
1137 1.3 augustss /*
1138 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1139 1.1 augustss * the host controller. This queue is the processed by software.
1140 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1141 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1142 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1143 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1144 1.1 augustss * hash value.
1145 1.1 augustss */
1146 1.1 augustss
1147 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1148 1.1 augustss /* Called at splusb() */
1149 1.1 augustss void
1150 1.1 augustss ohci_hash_add_td(sc, std)
1151 1.1 augustss ohci_softc_t *sc;
1152 1.1 augustss ohci_soft_td_t *std;
1153 1.1 augustss {
1154 1.1 augustss int h = HASH(std->physaddr);
1155 1.1 augustss
1156 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1157 1.1 augustss }
1158 1.1 augustss
1159 1.1 augustss /* Called at splusb() */
1160 1.1 augustss void
1161 1.1 augustss ohci_hash_rem_td(sc, std)
1162 1.1 augustss ohci_softc_t *sc;
1163 1.1 augustss ohci_soft_td_t *std;
1164 1.1 augustss {
1165 1.1 augustss LIST_REMOVE(std, hnext);
1166 1.1 augustss }
1167 1.1 augustss
1168 1.1 augustss ohci_soft_td_t *
1169 1.1 augustss ohci_hash_find_td(sc, a)
1170 1.1 augustss ohci_softc_t *sc;
1171 1.1 augustss ohci_physaddr_t a;
1172 1.1 augustss {
1173 1.1 augustss int h = HASH(a);
1174 1.1 augustss ohci_soft_td_t *std;
1175 1.1 augustss
1176 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1177 1.1 augustss std != 0;
1178 1.1 augustss std = LIST_NEXT(std, hnext))
1179 1.1 augustss if (std->physaddr == a)
1180 1.1 augustss return (std);
1181 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1182 1.1 augustss }
1183 1.1 augustss
1184 1.1 augustss void
1185 1.1 augustss ohci_timeout(addr)
1186 1.1 augustss void *addr;
1187 1.1 augustss {
1188 1.1 augustss #if 0
1189 1.1 augustss usbd_request_handle *reqh = addr;
1190 1.1 augustss int s;
1191 1.1 augustss
1192 1.1 augustss DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1193 1.1 augustss s = splusb();
1194 1.1 augustss /* XXX need to inactivate TD before calling interrupt routine */
1195 1.1 augustss ohci_XXX_done(reqh);
1196 1.1 augustss splx(s);
1197 1.1 augustss #endif
1198 1.1 augustss }
1199 1.1 augustss
1200 1.1 augustss #ifdef USB_DEBUG
1201 1.1 augustss void
1202 1.1 augustss ohci_dump_tds(std)
1203 1.1 augustss ohci_soft_td_t *std;
1204 1.1 augustss {
1205 1.1 augustss for (; std; std = std->nexttd)
1206 1.1 augustss ohci_dump_td(std);
1207 1.1 augustss }
1208 1.1 augustss
1209 1.1 augustss void
1210 1.1 augustss ohci_dump_td(std)
1211 1.1 augustss ohci_soft_td_t *std;
1212 1.1 augustss {
1213 1.14 augustss printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1214 1.14 augustss "nexttd=0x%08lx be=0x%08lx\n",
1215 1.1 augustss std, (u_long)std->physaddr,
1216 1.16 augustss (u_long)LE(std->td->td_flags),
1217 1.1 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1218 1.16 augustss OHCI_TD_GET_DI(LE(std->td->td_flags)),
1219 1.16 augustss OHCI_TD_GET_EC(LE(std->td->td_flags)),
1220 1.16 augustss OHCI_TD_GET_CC(LE(std->td->td_flags)),
1221 1.16 augustss (u_long)LE(std->td->td_cbp),
1222 1.16 augustss (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be));
1223 1.1 augustss }
1224 1.1 augustss
1225 1.1 augustss void
1226 1.1 augustss ohci_dump_ed(sed)
1227 1.1 augustss ohci_soft_ed_t *sed;
1228 1.1 augustss {
1229 1.14 augustss printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1230 1.14 augustss "headp=%b nexted=0x%08lx\n",
1231 1.1 augustss sed, (u_long)sed->physaddr,
1232 1.16 augustss OHCI_ED_GET_FA(LE(sed->ed->ed_flags)),
1233 1.16 augustss OHCI_ED_GET_EN(LE(sed->ed->ed_flags)),
1234 1.16 augustss OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)),
1235 1.16 augustss (u_long)LE(sed->ed->ed_flags),
1236 1.1 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO",
1237 1.16 augustss (u_long)LE(sed->ed->ed_tailp),
1238 1.16 augustss (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY",
1239 1.16 augustss (u_long)LE(sed->ed->ed_nexted));
1240 1.1 augustss }
1241 1.1 augustss #endif
1242 1.1 augustss
1243 1.1 augustss usbd_status
1244 1.1 augustss ohci_open(pipe)
1245 1.1 augustss usbd_pipe_handle pipe;
1246 1.1 augustss {
1247 1.1 augustss usbd_device_handle dev = pipe->device;
1248 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1249 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1250 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1251 1.1 augustss u_int8_t addr = dev->address;
1252 1.1 augustss ohci_soft_ed_t *sed;
1253 1.1 augustss ohci_soft_td_t *std;
1254 1.1 augustss usbd_status r;
1255 1.1 augustss int s;
1256 1.1 augustss
1257 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1258 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1259 1.1 augustss if (addr == sc->sc_addr) {
1260 1.1 augustss switch (ed->bEndpointAddress) {
1261 1.1 augustss case USB_CONTROL_ENDPOINT:
1262 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1263 1.1 augustss break;
1264 1.1 augustss case UE_IN | OHCI_INTR_ENDPT:
1265 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1266 1.1 augustss break;
1267 1.1 augustss default:
1268 1.1 augustss return (USBD_INVAL);
1269 1.1 augustss }
1270 1.1 augustss } else {
1271 1.1 augustss sed = ohci_alloc_sed(sc);
1272 1.1 augustss if (sed == 0)
1273 1.1 augustss goto bad0;
1274 1.1 augustss std = ohci_alloc_std(sc);
1275 1.1 augustss if (std == 0)
1276 1.1 augustss goto bad1;
1277 1.1 augustss opipe->sed = sed;
1278 1.1 augustss opipe->tail = std;
1279 1.16 augustss sed->ed->ed_flags = LE(
1280 1.1 augustss OHCI_ED_SET_FA(addr) |
1281 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1282 1.1 augustss OHCI_ED_DIR_TD |
1283 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1284 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1285 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1286 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1287 1.16 augustss sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr);
1288 1.1 augustss
1289 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1290 1.1 augustss case UE_CONTROL:
1291 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1292 1.4 augustss r = usb_allocmem(sc->sc_dmatag,
1293 1.4 augustss sizeof(usb_device_request_t),
1294 1.4 augustss 0, &opipe->u.ctl.reqdma);
1295 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1296 1.1 augustss goto bad;
1297 1.1 augustss s = splusb();
1298 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1299 1.1 augustss splx(s);
1300 1.1 augustss break;
1301 1.1 augustss case UE_INTERRUPT:
1302 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1303 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1304 1.1 augustss case UE_ISOCHRONOUS:
1305 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1306 1.1 augustss return (USBD_XXX);
1307 1.1 augustss case UE_BULK:
1308 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1309 1.3 augustss s = splusb();
1310 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1311 1.3 augustss splx(s);
1312 1.3 augustss break;
1313 1.1 augustss }
1314 1.1 augustss }
1315 1.1 augustss return (USBD_NORMAL_COMPLETION);
1316 1.1 augustss
1317 1.1 augustss bad:
1318 1.1 augustss ohci_free_std(sc, std);
1319 1.1 augustss bad1:
1320 1.1 augustss ohci_free_sed(sc, sed);
1321 1.1 augustss bad0:
1322 1.1 augustss return (USBD_NOMEM);
1323 1.1 augustss
1324 1.1 augustss }
1325 1.1 augustss
1326 1.1 augustss /*
1327 1.1 augustss * Data structures and routines to emulate the root hub.
1328 1.1 augustss */
1329 1.1 augustss usb_device_descriptor_t ohci_devd = {
1330 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1331 1.1 augustss UDESC_DEVICE, /* type */
1332 1.1 augustss {0x00, 0x01}, /* USB version */
1333 1.1 augustss UCLASS_HUB, /* class */
1334 1.1 augustss USUBCLASS_HUB, /* subclass */
1335 1.1 augustss 0, /* protocol */
1336 1.1 augustss 64, /* max packet */
1337 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1338 1.1 augustss 1,2,0, /* string indicies */
1339 1.1 augustss 1 /* # of configurations */
1340 1.1 augustss };
1341 1.1 augustss
1342 1.1 augustss usb_config_descriptor_t ohci_confd = {
1343 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1344 1.1 augustss UDESC_CONFIG,
1345 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1346 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1347 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1348 1.1 augustss 1,
1349 1.1 augustss 1,
1350 1.1 augustss 0,
1351 1.1 augustss UC_SELF_POWERED,
1352 1.1 augustss 0 /* max power */
1353 1.1 augustss };
1354 1.1 augustss
1355 1.1 augustss usb_interface_descriptor_t ohci_ifcd = {
1356 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1357 1.1 augustss UDESC_INTERFACE,
1358 1.1 augustss 0,
1359 1.1 augustss 0,
1360 1.1 augustss 1,
1361 1.1 augustss UCLASS_HUB,
1362 1.1 augustss USUBCLASS_HUB,
1363 1.1 augustss 0,
1364 1.1 augustss 0
1365 1.1 augustss };
1366 1.1 augustss
1367 1.1 augustss usb_endpoint_descriptor_t ohci_endpd = {
1368 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1369 1.1 augustss UDESC_ENDPOINT,
1370 1.1 augustss UE_IN | OHCI_INTR_ENDPT,
1371 1.1 augustss UE_INTERRUPT,
1372 1.1 augustss {8, 0}, /* max packet */
1373 1.1 augustss 255
1374 1.1 augustss };
1375 1.1 augustss
1376 1.1 augustss usb_hub_descriptor_t ohci_hubd = {
1377 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1378 1.1 augustss UDESC_HUB,
1379 1.1 augustss 0,
1380 1.1 augustss {0,0},
1381 1.1 augustss 0,
1382 1.1 augustss 0,
1383 1.1 augustss {0},
1384 1.1 augustss };
1385 1.1 augustss
1386 1.1 augustss int
1387 1.1 augustss ohci_str(p, l, s)
1388 1.1 augustss usb_string_descriptor_t *p;
1389 1.1 augustss int l;
1390 1.1 augustss char *s;
1391 1.1 augustss {
1392 1.1 augustss int i;
1393 1.1 augustss
1394 1.1 augustss if (l == 0)
1395 1.1 augustss return (0);
1396 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1397 1.1 augustss if (l == 1)
1398 1.1 augustss return (1);
1399 1.1 augustss p->bDescriptorType = UDESC_STRING;
1400 1.1 augustss l -= 2;
1401 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1402 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1403 1.1 augustss return (2*i+2);
1404 1.1 augustss }
1405 1.1 augustss
1406 1.1 augustss /*
1407 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1408 1.1 augustss */
1409 1.1 augustss usbd_status
1410 1.1 augustss ohci_root_ctrl_transfer(reqh)
1411 1.1 augustss usbd_request_handle reqh;
1412 1.1 augustss {
1413 1.17 augustss int s;
1414 1.17 augustss usbd_status r;
1415 1.17 augustss
1416 1.17 augustss s = splusb();
1417 1.17 augustss r = usb_insert_transfer(reqh);
1418 1.17 augustss splx(s);
1419 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1420 1.17 augustss return (r);
1421 1.17 augustss else
1422 1.17 augustss return (ohci_root_ctrl_start(reqh));
1423 1.17 augustss }
1424 1.17 augustss
1425 1.17 augustss usbd_status
1426 1.17 augustss ohci_root_ctrl_start(reqh)
1427 1.17 augustss usbd_request_handle reqh;
1428 1.17 augustss {
1429 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1430 1.1 augustss usb_device_request_t *req;
1431 1.1 augustss void *buf;
1432 1.1 augustss int port, i;
1433 1.1 augustss int len, value, index, l, totlen = 0;
1434 1.1 augustss usb_port_status_t ps;
1435 1.1 augustss usb_hub_descriptor_t hubd;
1436 1.1 augustss usbd_status r;
1437 1.1 augustss u_int32_t v;
1438 1.1 augustss
1439 1.1 augustss if (!reqh->isreq)
1440 1.1 augustss /* XXX panic */
1441 1.1 augustss return (USBD_INVAL);
1442 1.1 augustss req = &reqh->request;
1443 1.1 augustss buf = reqh->buffer;
1444 1.1 augustss
1445 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1446 1.1 augustss req->bmRequestType, req->bRequest));
1447 1.1 augustss
1448 1.1 augustss len = UGETW(req->wLength);
1449 1.1 augustss value = UGETW(req->wValue);
1450 1.1 augustss index = UGETW(req->wIndex);
1451 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1452 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1453 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1454 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1455 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1456 1.1 augustss /*
1457 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1458 1.1 augustss * for the integrated root hub.
1459 1.1 augustss */
1460 1.1 augustss break;
1461 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1462 1.1 augustss if (len > 0) {
1463 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1464 1.1 augustss totlen = 1;
1465 1.1 augustss }
1466 1.1 augustss break;
1467 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1468 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1469 1.1 augustss switch(value >> 8) {
1470 1.1 augustss case UDESC_DEVICE:
1471 1.1 augustss if ((value & 0xff) != 0) {
1472 1.1 augustss r = USBD_IOERROR;
1473 1.1 augustss goto ret;
1474 1.1 augustss }
1475 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1476 1.1 augustss memcpy(buf, &ohci_devd, l);
1477 1.1 augustss break;
1478 1.1 augustss case UDESC_CONFIG:
1479 1.1 augustss if ((value & 0xff) != 0) {
1480 1.1 augustss r = USBD_IOERROR;
1481 1.1 augustss goto ret;
1482 1.1 augustss }
1483 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1484 1.1 augustss memcpy(buf, &ohci_confd, l);
1485 1.1 augustss buf = (char *)buf + l;
1486 1.1 augustss len -= l;
1487 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1488 1.1 augustss totlen += l;
1489 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1490 1.1 augustss buf = (char *)buf + l;
1491 1.1 augustss len -= l;
1492 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1493 1.1 augustss totlen += l;
1494 1.1 augustss memcpy(buf, &ohci_endpd, l);
1495 1.1 augustss break;
1496 1.1 augustss case UDESC_STRING:
1497 1.1 augustss if (len == 0)
1498 1.1 augustss break;
1499 1.1 augustss *(u_int8_t *)buf = 0;
1500 1.1 augustss totlen = 1;
1501 1.1 augustss switch (value & 0xff) {
1502 1.1 augustss case 1: /* Vendor */
1503 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1504 1.1 augustss break;
1505 1.1 augustss case 2: /* Product */
1506 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1507 1.1 augustss break;
1508 1.1 augustss }
1509 1.1 augustss break;
1510 1.1 augustss default:
1511 1.1 augustss r = USBD_IOERROR;
1512 1.1 augustss goto ret;
1513 1.1 augustss }
1514 1.1 augustss break;
1515 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1516 1.1 augustss if (len > 0) {
1517 1.1 augustss *(u_int8_t *)buf = 0;
1518 1.1 augustss totlen = 1;
1519 1.1 augustss }
1520 1.1 augustss break;
1521 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1522 1.1 augustss if (len > 1) {
1523 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1524 1.1 augustss totlen = 2;
1525 1.1 augustss }
1526 1.1 augustss break;
1527 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1528 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1529 1.1 augustss if (len > 1) {
1530 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1531 1.1 augustss totlen = 2;
1532 1.1 augustss }
1533 1.1 augustss break;
1534 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1535 1.1 augustss if (value >= USB_MAX_DEVICES) {
1536 1.1 augustss r = USBD_IOERROR;
1537 1.1 augustss goto ret;
1538 1.1 augustss }
1539 1.1 augustss sc->sc_addr = value;
1540 1.1 augustss break;
1541 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1542 1.1 augustss if (value != 0 && value != 1) {
1543 1.1 augustss r = USBD_IOERROR;
1544 1.1 augustss goto ret;
1545 1.1 augustss }
1546 1.1 augustss sc->sc_conf = value;
1547 1.1 augustss break;
1548 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1549 1.1 augustss break;
1550 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1551 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1552 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1553 1.1 augustss r = USBD_IOERROR;
1554 1.1 augustss goto ret;
1555 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1556 1.1 augustss break;
1557 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1558 1.1 augustss break;
1559 1.1 augustss /* Hub requests */
1560 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1561 1.1 augustss break;
1562 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1563 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1564 1.14 augustss "port=%d feature=%d\n",
1565 1.1 augustss index, value));
1566 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1567 1.1 augustss r = USBD_IOERROR;
1568 1.1 augustss goto ret;
1569 1.1 augustss }
1570 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1571 1.1 augustss switch(value) {
1572 1.1 augustss case UHF_PORT_ENABLE:
1573 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1574 1.1 augustss break;
1575 1.1 augustss case UHF_PORT_SUSPEND:
1576 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1577 1.1 augustss break;
1578 1.1 augustss case UHF_PORT_POWER:
1579 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1580 1.1 augustss break;
1581 1.1 augustss case UHF_C_PORT_CONNECTION:
1582 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1583 1.1 augustss break;
1584 1.1 augustss case UHF_C_PORT_ENABLE:
1585 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1586 1.1 augustss break;
1587 1.1 augustss case UHF_C_PORT_SUSPEND:
1588 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1589 1.1 augustss break;
1590 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1591 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1592 1.1 augustss break;
1593 1.1 augustss case UHF_C_PORT_RESET:
1594 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1595 1.1 augustss break;
1596 1.1 augustss default:
1597 1.1 augustss r = USBD_IOERROR;
1598 1.1 augustss goto ret;
1599 1.1 augustss }
1600 1.1 augustss switch(value) {
1601 1.1 augustss case UHF_C_PORT_CONNECTION:
1602 1.1 augustss case UHF_C_PORT_ENABLE:
1603 1.1 augustss case UHF_C_PORT_SUSPEND:
1604 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1605 1.1 augustss case UHF_C_PORT_RESET:
1606 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1607 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1608 1.1 augustss ohci_rhsc_able(sc, 1);
1609 1.1 augustss break;
1610 1.1 augustss default:
1611 1.1 augustss break;
1612 1.1 augustss }
1613 1.1 augustss break;
1614 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1615 1.1 augustss if (value != 0) {
1616 1.1 augustss r = USBD_IOERROR;
1617 1.1 augustss goto ret;
1618 1.1 augustss }
1619 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1620 1.1 augustss hubd = ohci_hubd;
1621 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1622 1.15 augustss USETW(hubd.wHubCharacteristics,
1623 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1624 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1625 1.1 augustss /* XXX overcurrent */
1626 1.1 augustss );
1627 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1628 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1629 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1630 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
1631 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1632 1.1 augustss l = min(len, hubd.bDescLength);
1633 1.1 augustss totlen = l;
1634 1.1 augustss memcpy(buf, &hubd, l);
1635 1.1 augustss break;
1636 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1637 1.1 augustss if (len != 4) {
1638 1.1 augustss r = USBD_IOERROR;
1639 1.1 augustss goto ret;
1640 1.1 augustss }
1641 1.1 augustss memset(buf, 0, len); /* ? XXX */
1642 1.1 augustss totlen = len;
1643 1.1 augustss break;
1644 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1645 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1646 1.1 augustss index));
1647 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1648 1.1 augustss r = USBD_IOERROR;
1649 1.1 augustss goto ret;
1650 1.1 augustss }
1651 1.1 augustss if (len != 4) {
1652 1.1 augustss r = USBD_IOERROR;
1653 1.1 augustss goto ret;
1654 1.1 augustss }
1655 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1656 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1657 1.1 augustss v));
1658 1.1 augustss USETW(ps.wPortStatus, v);
1659 1.1 augustss USETW(ps.wPortChange, v >> 16);
1660 1.1 augustss l = min(len, sizeof ps);
1661 1.1 augustss memcpy(buf, &ps, l);
1662 1.1 augustss totlen = l;
1663 1.1 augustss break;
1664 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1665 1.1 augustss r = USBD_IOERROR;
1666 1.1 augustss goto ret;
1667 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1668 1.1 augustss break;
1669 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1670 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1671 1.1 augustss r = USBD_IOERROR;
1672 1.1 augustss goto ret;
1673 1.1 augustss }
1674 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1675 1.1 augustss switch(value) {
1676 1.1 augustss case UHF_PORT_ENABLE:
1677 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
1678 1.1 augustss break;
1679 1.1 augustss case UHF_PORT_SUSPEND:
1680 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
1681 1.1 augustss break;
1682 1.1 augustss case UHF_PORT_RESET:
1683 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
1684 1.14 augustss index));
1685 1.1 augustss OWRITE4(sc, port, UPS_RESET);
1686 1.1 augustss for (i = 0; i < 10; i++) {
1687 1.6 augustss usbd_delay_ms(&sc->sc_bus, 10);
1688 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
1689 1.1 augustss break;
1690 1.1 augustss }
1691 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1692 1.1 augustss index, OREAD4(sc, port)));
1693 1.1 augustss break;
1694 1.1 augustss case UHF_PORT_POWER:
1695 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
1696 1.14 augustss "%d\n", index));
1697 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
1698 1.1 augustss break;
1699 1.1 augustss default:
1700 1.1 augustss r = USBD_IOERROR;
1701 1.1 augustss goto ret;
1702 1.1 augustss }
1703 1.1 augustss break;
1704 1.1 augustss default:
1705 1.1 augustss r = USBD_IOERROR;
1706 1.1 augustss goto ret;
1707 1.1 augustss }
1708 1.1 augustss reqh->actlen = totlen;
1709 1.1 augustss r = USBD_NORMAL_COMPLETION;
1710 1.1 augustss ret:
1711 1.1 augustss reqh->status = r;
1712 1.1 augustss reqh->xfercb(reqh);
1713 1.17 augustss usb_start_next(reqh->pipe);
1714 1.1 augustss return (USBD_IN_PROGRESS);
1715 1.1 augustss }
1716 1.1 augustss
1717 1.1 augustss /* Abort a root control request. */
1718 1.1 augustss void
1719 1.1 augustss ohci_root_ctrl_abort(reqh)
1720 1.1 augustss usbd_request_handle reqh;
1721 1.1 augustss {
1722 1.9 augustss /* Nothing to do, all transfers are synchronous. */
1723 1.1 augustss }
1724 1.1 augustss
1725 1.1 augustss /* Close the root pipe. */
1726 1.1 augustss void
1727 1.1 augustss ohci_root_ctrl_close(pipe)
1728 1.1 augustss usbd_pipe_handle pipe;
1729 1.1 augustss {
1730 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
1731 1.1 augustss }
1732 1.1 augustss
1733 1.1 augustss usbd_status
1734 1.1 augustss ohci_root_intr_transfer(reqh)
1735 1.1 augustss usbd_request_handle reqh;
1736 1.1 augustss {
1737 1.17 augustss int s;
1738 1.17 augustss usbd_status r;
1739 1.17 augustss
1740 1.17 augustss s = splusb();
1741 1.17 augustss r = usb_insert_transfer(reqh);
1742 1.17 augustss splx(s);
1743 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1744 1.17 augustss return (r);
1745 1.17 augustss else
1746 1.17 augustss return (ohci_root_intr_start(reqh));
1747 1.17 augustss }
1748 1.17 augustss
1749 1.17 augustss usbd_status
1750 1.17 augustss ohci_root_intr_start(reqh)
1751 1.17 augustss usbd_request_handle reqh;
1752 1.17 augustss {
1753 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
1754 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1755 1.1 augustss struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
1756 1.4 augustss usb_dma_t *dmap;
1757 1.1 augustss usbd_status r;
1758 1.1 augustss int len;
1759 1.1 augustss
1760 1.1 augustss len = reqh->length;
1761 1.1 augustss dmap = &upipe->u.intr.datadma;
1762 1.1 augustss if (len == 0)
1763 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
1764 1.1 augustss
1765 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1766 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1767 1.1 augustss return (r);
1768 1.1 augustss sc->sc_intrreqh = reqh;
1769 1.1 augustss
1770 1.1 augustss return (USBD_IN_PROGRESS);
1771 1.1 augustss }
1772 1.1 augustss
1773 1.3 augustss /* Abort a root interrupt request. */
1774 1.1 augustss void
1775 1.1 augustss ohci_root_intr_abort(reqh)
1776 1.1 augustss usbd_request_handle reqh;
1777 1.1 augustss {
1778 1.3 augustss /* No need to abort. */
1779 1.1 augustss }
1780 1.1 augustss
1781 1.1 augustss /* Close the root pipe. */
1782 1.1 augustss void
1783 1.1 augustss ohci_root_intr_close(pipe)
1784 1.1 augustss usbd_pipe_handle pipe;
1785 1.1 augustss {
1786 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1787 1.1 augustss sc->sc_intrreqh = 0;
1788 1.1 augustss
1789 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
1790 1.1 augustss }
1791 1.1 augustss
1792 1.1 augustss /************************/
1793 1.1 augustss
1794 1.1 augustss usbd_status
1795 1.1 augustss ohci_device_ctrl_transfer(reqh)
1796 1.1 augustss usbd_request_handle reqh;
1797 1.1 augustss {
1798 1.17 augustss int s;
1799 1.17 augustss usbd_status r;
1800 1.17 augustss
1801 1.17 augustss s = splusb();
1802 1.17 augustss r = usb_insert_transfer(reqh);
1803 1.17 augustss splx(s);
1804 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1805 1.17 augustss return (r);
1806 1.17 augustss else
1807 1.17 augustss return (ohci_device_ctrl_start(reqh));
1808 1.17 augustss }
1809 1.17 augustss
1810 1.17 augustss usbd_status
1811 1.17 augustss ohci_device_ctrl_start(reqh)
1812 1.17 augustss usbd_request_handle reqh;
1813 1.17 augustss {
1814 1.6 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1815 1.1 augustss usbd_status r;
1816 1.1 augustss
1817 1.1 augustss if (!reqh->isreq) {
1818 1.1 augustss /* XXX panic */
1819 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
1820 1.1 augustss return (USBD_INVAL);
1821 1.1 augustss }
1822 1.1 augustss
1823 1.1 augustss r = ohci_device_request(reqh);
1824 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1825 1.1 augustss return (r);
1826 1.1 augustss
1827 1.6 augustss if (sc->sc_bus.use_polling)
1828 1.6 augustss ohci_waitintr(sc, reqh);
1829 1.1 augustss return (USBD_IN_PROGRESS);
1830 1.1 augustss }
1831 1.1 augustss
1832 1.1 augustss /* Abort a device control request. */
1833 1.1 augustss void
1834 1.1 augustss ohci_device_ctrl_abort(reqh)
1835 1.1 augustss usbd_request_handle reqh;
1836 1.1 augustss {
1837 1.3 augustss /* XXX inactivate */
1838 1.14 augustss usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is donw */
1839 1.3 augustss /* XXX call done */
1840 1.1 augustss }
1841 1.1 augustss
1842 1.1 augustss /* Close a device control pipe. */
1843 1.1 augustss void
1844 1.1 augustss ohci_device_ctrl_close(pipe)
1845 1.1 augustss usbd_pipe_handle pipe;
1846 1.1 augustss {
1847 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1848 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1849 1.3 augustss ohci_soft_ed_t *sed = opipe->sed;
1850 1.1 augustss int s;
1851 1.1 augustss
1852 1.1 augustss s = splusb();
1853 1.16 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
1854 1.16 augustss if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp))
1855 1.6 augustss usbd_delay_ms(&sc->sc_bus, 2);
1856 1.3 augustss ohci_rem_ed(sed, sc->sc_ctrl_head);
1857 1.3 augustss splx(s);
1858 1.3 augustss ohci_free_std(sc, opipe->tail);
1859 1.3 augustss ohci_free_sed(sc, opipe->sed);
1860 1.3 augustss /* XXX free other resources */
1861 1.3 augustss }
1862 1.3 augustss
1863 1.3 augustss /************************/
1864 1.3 augustss
1865 1.3 augustss usbd_status
1866 1.3 augustss ohci_device_bulk_transfer(reqh)
1867 1.3 augustss usbd_request_handle reqh;
1868 1.3 augustss {
1869 1.17 augustss int s;
1870 1.17 augustss usbd_status r;
1871 1.17 augustss
1872 1.17 augustss s = splusb();
1873 1.17 augustss r = usb_insert_transfer(reqh);
1874 1.17 augustss splx(s);
1875 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1876 1.17 augustss return (r);
1877 1.17 augustss else
1878 1.17 augustss return (ohci_device_bulk_start(reqh));
1879 1.17 augustss }
1880 1.17 augustss
1881 1.17 augustss usbd_status
1882 1.17 augustss ohci_device_bulk_start(reqh)
1883 1.17 augustss usbd_request_handle reqh;
1884 1.17 augustss {
1885 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1886 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
1887 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1888 1.3 augustss int addr = dev->address;
1889 1.3 augustss ohci_soft_td_t *xfer, *tail;
1890 1.3 augustss ohci_soft_ed_t *sed;
1891 1.4 augustss usb_dma_t *dmap;
1892 1.3 augustss usbd_status r;
1893 1.3 augustss int s, len, isread;
1894 1.3 augustss
1895 1.3 augustss if (reqh->isreq) {
1896 1.3 augustss /* XXX panic */
1897 1.3 augustss printf("ohci_device_bulk_transfer: a request\n");
1898 1.3 augustss return (USBD_INVAL);
1899 1.3 augustss }
1900 1.3 augustss
1901 1.3 augustss len = reqh->length;
1902 1.3 augustss dmap = &opipe->u.bulk.datadma;
1903 1.3 augustss isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1904 1.3 augustss sed = opipe->sed;
1905 1.3 augustss
1906 1.3 augustss opipe->u.bulk.length = len;
1907 1.3 augustss
1908 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1909 1.3 augustss if (r != USBD_NORMAL_COMPLETION)
1910 1.3 augustss goto ret1;
1911 1.3 augustss
1912 1.3 augustss tail = ohci_alloc_std(sc);
1913 1.3 augustss if (!tail) {
1914 1.3 augustss r = USBD_NOMEM;
1915 1.3 augustss goto ret2;
1916 1.3 augustss }
1917 1.3 augustss tail->reqh = 0;
1918 1.3 augustss
1919 1.3 augustss /* Update device address */
1920 1.16 augustss sed->ed->ed_flags = LE(
1921 1.16 augustss (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) |
1922 1.16 augustss OHCI_ED_SET_FA(addr));
1923 1.3 augustss
1924 1.3 augustss /* Set up data transaction */
1925 1.3 augustss xfer = opipe->tail;
1926 1.16 augustss xfer->td->td_flags = LE(
1927 1.3 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1928 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1929 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dmap));
1930 1.3 augustss xfer->nexttd = tail;
1931 1.16 augustss xfer->td->td_nexttd = LE(tail->physaddr);
1932 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
1933 1.3 augustss xfer->len = len;
1934 1.3 augustss xfer->reqh = reqh;
1935 1.3 augustss
1936 1.3 augustss reqh->actlen = 0;
1937 1.3 augustss reqh->hcpriv = xfer;
1938 1.3 augustss
1939 1.3 augustss if (!isread)
1940 1.3 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1941 1.3 augustss
1942 1.3 augustss /* Insert ED in schedule */
1943 1.3 augustss s = splusb();
1944 1.3 augustss ohci_hash_add_td(sc, xfer);
1945 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
1946 1.3 augustss opipe->tail = tail;
1947 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1948 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1949 1.15 augustss usb_timeout(ohci_timeout, reqh,
1950 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1951 1.15 augustss }
1952 1.3 augustss splx(s);
1953 1.3 augustss
1954 1.3 augustss return (USBD_IN_PROGRESS);
1955 1.3 augustss
1956 1.3 augustss ret2:
1957 1.4 augustss usb_freemem(sc->sc_dmatag, dmap);
1958 1.3 augustss ret1:
1959 1.3 augustss return (r);
1960 1.3 augustss }
1961 1.3 augustss
1962 1.3 augustss /* Abort a device bulk request. */
1963 1.3 augustss void
1964 1.3 augustss ohci_device_bulk_abort(reqh)
1965 1.3 augustss usbd_request_handle reqh;
1966 1.3 augustss {
1967 1.3 augustss #if 0
1968 1.16 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
1969 1.16 augustss if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp))
1970 1.6 augustss usbd_delay_ms(reqh->pipe->device->bus, 2);
1971 1.3 augustss #endif
1972 1.3 augustss /* XXX inactivate */
1973 1.14 augustss usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
1974 1.3 augustss /* XXX call done */
1975 1.3 augustss }
1976 1.3 augustss
1977 1.3 augustss /* Close a device bulk pipe. */
1978 1.3 augustss void
1979 1.3 augustss ohci_device_bulk_close(pipe)
1980 1.3 augustss usbd_pipe_handle pipe;
1981 1.3 augustss {
1982 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1983 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
1984 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1985 1.3 augustss int s;
1986 1.3 augustss
1987 1.3 augustss s = splusb();
1988 1.3 augustss ohci_rem_ed(opipe->sed, sc->sc_bulk_head);
1989 1.1 augustss splx(s);
1990 1.1 augustss ohci_free_std(sc, opipe->tail);
1991 1.1 augustss ohci_free_sed(sc, opipe->sed);
1992 1.1 augustss /* XXX free other resources */
1993 1.1 augustss }
1994 1.1 augustss
1995 1.1 augustss /************************/
1996 1.1 augustss
1997 1.1 augustss usbd_status
1998 1.1 augustss ohci_device_intr_transfer(reqh)
1999 1.17 augustss usbd_request_handle reqh;
2000 1.17 augustss {
2001 1.17 augustss int s;
2002 1.17 augustss usbd_status r;
2003 1.17 augustss
2004 1.17 augustss s = splusb();
2005 1.17 augustss r = usb_insert_transfer(reqh);
2006 1.17 augustss splx(s);
2007 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2008 1.17 augustss return (r);
2009 1.17 augustss else
2010 1.17 augustss return (ohci_device_intr_start(reqh));
2011 1.17 augustss }
2012 1.17 augustss
2013 1.17 augustss usbd_status
2014 1.17 augustss ohci_device_intr_start(reqh)
2015 1.1 augustss usbd_request_handle reqh;
2016 1.1 augustss {
2017 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2018 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2019 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2020 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2021 1.1 augustss ohci_soft_td_t *xfer, *tail;
2022 1.4 augustss usb_dma_t *dmap;
2023 1.1 augustss usbd_status r;
2024 1.1 augustss int len;
2025 1.1 augustss int s;
2026 1.1 augustss
2027 1.14 augustss DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d "
2028 1.14 augustss "flags=%d priv=%p\n",
2029 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
2030 1.1 augustss
2031 1.1 augustss if (reqh->isreq)
2032 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2033 1.1 augustss
2034 1.1 augustss len = reqh->length;
2035 1.1 augustss dmap = &opipe->u.intr.datadma;
2036 1.1 augustss if (len == 0)
2037 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
2038 1.1 augustss
2039 1.1 augustss xfer = opipe->tail;
2040 1.1 augustss tail = ohci_alloc_std(sc);
2041 1.1 augustss if (!tail) {
2042 1.1 augustss r = USBD_NOMEM;
2043 1.1 augustss goto ret1;
2044 1.1 augustss }
2045 1.1 augustss tail->reqh = 0;
2046 1.1 augustss
2047 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2048 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
2049 1.1 augustss goto ret2;
2050 1.1 augustss
2051 1.16 augustss xfer->td->td_flags = LE(
2052 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2053 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2054 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dmap));
2055 1.1 augustss xfer->nexttd = tail;
2056 1.16 augustss xfer->td->td_nexttd = LE(tail->physaddr);
2057 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
2058 1.1 augustss xfer->len = len;
2059 1.1 augustss xfer->reqh = reqh;
2060 1.1 augustss
2061 1.1 augustss reqh->actlen = 0;
2062 1.1 augustss reqh->hcpriv = xfer;
2063 1.1 augustss
2064 1.1 augustss #if USB_DEBUG
2065 1.1 augustss if (ohcidebug > 5) {
2066 1.1 augustss printf("ohci_device_intr_transfer:\n");
2067 1.1 augustss ohci_dump_ed(sed);
2068 1.1 augustss ohci_dump_tds(xfer);
2069 1.1 augustss }
2070 1.1 augustss #endif
2071 1.1 augustss
2072 1.1 augustss /* Insert ED in schedule */
2073 1.1 augustss s = splusb();
2074 1.1 augustss ohci_hash_add_td(sc, xfer);
2075 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
2076 1.1 augustss opipe->tail = tail;
2077 1.1 augustss #if 0
2078 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
2079 1.15 augustss usb_timeout(ohci_timeout, reqh,
2080 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2081 1.15 augustss }
2082 1.1 augustss #endif
2083 1.16 augustss sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
2084 1.1 augustss splx(s);
2085 1.1 augustss
2086 1.1 augustss #ifdef USB_DEBUG
2087 1.1 augustss if (ohcidebug > 5) {
2088 1.1 augustss delay(5000);
2089 1.1 augustss printf("ohci_device_intr_transfer: status=%x\n",
2090 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
2091 1.1 augustss ohci_dump_ed(sed);
2092 1.1 augustss ohci_dump_tds(xfer);
2093 1.1 augustss }
2094 1.1 augustss #endif
2095 1.1 augustss
2096 1.1 augustss return (USBD_IN_PROGRESS);
2097 1.1 augustss
2098 1.1 augustss ret2:
2099 1.1 augustss ohci_free_std(sc, xfer);
2100 1.1 augustss ret1:
2101 1.1 augustss return (r);
2102 1.1 augustss }
2103 1.1 augustss
2104 1.1 augustss /* Abort a device control request. */
2105 1.1 augustss void
2106 1.1 augustss ohci_device_intr_abort(reqh)
2107 1.1 augustss usbd_request_handle reqh;
2108 1.1 augustss {
2109 1.3 augustss /* XXX inactivate */
2110 1.14 augustss usbd_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
2111 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
2112 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2113 1.1 augustss reqh->pipe->intrreqh = 0;
2114 1.1 augustss ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh);
2115 1.1 augustss }
2116 1.1 augustss }
2117 1.1 augustss
2118 1.1 augustss /* Close a device interrupt pipe. */
2119 1.1 augustss void
2120 1.1 augustss ohci_device_intr_close(pipe)
2121 1.1 augustss usbd_pipe_handle pipe;
2122 1.1 augustss {
2123 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2124 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2125 1.1 augustss int nslots = opipe->u.intr.nslots;
2126 1.1 augustss int pos = opipe->u.intr.pos;
2127 1.1 augustss int j;
2128 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2129 1.1 augustss int s;
2130 1.1 augustss
2131 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2132 1.1 augustss pipe, nslots, pos));
2133 1.1 augustss s = splusb();
2134 1.16 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
2135 1.16 augustss if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != sed->ed->ed_headp)
2136 1.6 augustss usbd_delay_ms(&sc->sc_bus, 2);
2137 1.1 augustss
2138 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2139 1.1 augustss ;
2140 1.1 augustss if (!p)
2141 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2142 1.1 augustss p->next = sed->next;
2143 1.1 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
2144 1.1 augustss splx(s);
2145 1.1 augustss
2146 1.1 augustss for (j = 0; j < nslots; j++)
2147 1.1 augustss --sc->sc_bws[pos * nslots + j];
2148 1.1 augustss
2149 1.1 augustss ohci_free_std(sc, opipe->tail);
2150 1.1 augustss ohci_free_sed(sc, opipe->sed);
2151 1.1 augustss /* XXX free other resources */
2152 1.1 augustss }
2153 1.1 augustss
2154 1.1 augustss usbd_status
2155 1.1 augustss ohci_device_setintr(sc, opipe, ival)
2156 1.1 augustss ohci_softc_t *sc;
2157 1.1 augustss struct ohci_pipe *opipe;
2158 1.1 augustss int ival;
2159 1.1 augustss {
2160 1.1 augustss int i, j, s, best;
2161 1.1 augustss u_int npoll, slow, shigh, nslots;
2162 1.1 augustss u_int bestbw, bw;
2163 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2164 1.1 augustss
2165 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2166 1.1 augustss if (ival == 0) {
2167 1.1 augustss printf("ohci_setintr: 0 interval\n");
2168 1.1 augustss return (USBD_INVAL);
2169 1.1 augustss }
2170 1.1 augustss
2171 1.1 augustss npoll = OHCI_NO_INTRS;
2172 1.1 augustss while (npoll > ival)
2173 1.1 augustss npoll /= 2;
2174 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2175 1.1 augustss
2176 1.1 augustss /*
2177 1.1 augustss * We now know which level in the tree the ED must go into.
2178 1.1 augustss * Figure out which slot has most bandwidth left over.
2179 1.1 augustss * Slots to examine:
2180 1.1 augustss * npoll
2181 1.1 augustss * 1 0
2182 1.1 augustss * 2 1 2
2183 1.1 augustss * 4 3 4 5 6
2184 1.1 augustss * 8 7 8 9 10 11 12 13 14
2185 1.1 augustss * N (N-1) .. (N-1+N-1)
2186 1.1 augustss */
2187 1.1 augustss slow = npoll-1;
2188 1.1 augustss shigh = slow + npoll;
2189 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2190 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2191 1.1 augustss bw = 0;
2192 1.1 augustss for (j = 0; j < nslots; j++)
2193 1.1 augustss bw += sc->sc_bws[i * nslots + j];
2194 1.1 augustss if (bw < bestbw) {
2195 1.1 augustss best = i;
2196 1.1 augustss bestbw = bw;
2197 1.1 augustss }
2198 1.1 augustss }
2199 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2200 1.1 augustss best, slow, shigh, bestbw));
2201 1.1 augustss
2202 1.1 augustss s = splusb();
2203 1.1 augustss hsed = sc->sc_eds[best];
2204 1.1 augustss sed->next = hsed->next;
2205 1.1 augustss sed->ed->ed_nexted = hsed->ed->ed_nexted;
2206 1.1 augustss hsed->next = sed;
2207 1.16 augustss hsed->ed->ed_nexted = LE(sed->physaddr);
2208 1.1 augustss splx(s);
2209 1.1 augustss
2210 1.1 augustss for (j = 0; j < nslots; j++)
2211 1.1 augustss ++sc->sc_bws[best * nslots + j];
2212 1.1 augustss opipe->u.intr.nslots = nslots;
2213 1.1 augustss opipe->u.intr.pos = best;
2214 1.1 augustss
2215 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2216 1.1 augustss return (USBD_NORMAL_COMPLETION);
2217 1.1 augustss }
2218 1.1 augustss
2219