ohci.c revision 1.179.2.1.2.1 1 1.179.2.1.2.1 skrll /* $NetBSD: ohci.c,v 1.179.2.1.2.1 2008/09/04 08:46:45 skrll Exp $ */
2 1.55 augustss /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.157 mycroft * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.157 mycroft * This code is derived from software contributed to The NetBSD Foundation
12 1.157 mycroft * by Charles M. Hannum.
13 1.1 augustss *
14 1.1 augustss * Redistribution and use in source and binary forms, with or without
15 1.1 augustss * modification, are permitted provided that the following conditions
16 1.1 augustss * are met:
17 1.1 augustss * 1. Redistributions of source code must retain the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer.
19 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 augustss * notice, this list of conditions and the following disclaimer in the
21 1.1 augustss * documentation and/or other materials provided with the distribution.
22 1.1 augustss * 3. All advertising materials mentioning features or use of this software
23 1.1 augustss * must display the following acknowledgement:
24 1.1 augustss * This product includes software developed by the NetBSD
25 1.1 augustss * Foundation, Inc. and its contributors.
26 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
27 1.1 augustss * contributors may be used to endorse or promote products derived
28 1.1 augustss * from this software without specific prior written permission.
29 1.1 augustss *
30 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
31 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
34 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
37 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
38 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
41 1.1 augustss */
42 1.1 augustss
43 1.1 augustss /*
44 1.1 augustss * USB Open Host Controller driver.
45 1.1 augustss *
46 1.96 augustss * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
47 1.138 ichiro * USB spec: http://www.usb.org/developers/docs/usbspec.zip
48 1.1 augustss */
49 1.108 lukem
50 1.108 lukem #include <sys/cdefs.h>
51 1.179.2.1.2.1 skrll __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.179.2.1.2.1 2008/09/04 08:46:45 skrll Exp $");
52 1.1 augustss
53 1.1 augustss #include <sys/param.h>
54 1.1 augustss #include <sys/systm.h>
55 1.1 augustss #include <sys/malloc.h>
56 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
57 1.55 augustss #include <sys/kernel.h>
58 1.1 augustss #include <sys/device.h>
59 1.55 augustss #include <sys/select.h>
60 1.153 fvdl #include <uvm/uvm_extern.h>
61 1.15 augustss #elif defined(__FreeBSD__)
62 1.15 augustss #include <sys/module.h>
63 1.15 augustss #include <sys/bus.h>
64 1.52 augustss #include <machine/bus_pio.h>
65 1.52 augustss #include <machine/bus_memio.h>
66 1.55 augustss #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
67 1.55 augustss #include <machine/cpu.h>
68 1.55 augustss #endif
69 1.15 augustss #endif
70 1.1 augustss #include <sys/proc.h>
71 1.1 augustss #include <sys/queue.h>
72 1.1 augustss
73 1.4 augustss #include <machine/bus.h>
74 1.16 augustss #include <machine/endian.h>
75 1.4 augustss
76 1.1 augustss #include <dev/usb/usb.h>
77 1.1 augustss #include <dev/usb/usbdi.h>
78 1.1 augustss #include <dev/usb/usbdivar.h>
79 1.38 augustss #include <dev/usb/usb_mem.h>
80 1.1 augustss #include <dev/usb/usb_quirks.h>
81 1.1 augustss
82 1.1 augustss #include <dev/usb/ohcireg.h>
83 1.1 augustss #include <dev/usb/ohcivar.h>
84 1.1 augustss
85 1.15 augustss #if defined(__FreeBSD__)
86 1.15 augustss #include <machine/clock.h>
87 1.55 augustss
88 1.15 augustss #define delay(d) DELAY(d)
89 1.15 augustss #endif
90 1.1 augustss
91 1.36 augustss #if defined(__OpenBSD__)
92 1.36 augustss struct cfdriver ohci_cd = {
93 1.36 augustss NULL, "ohci", DV_DULL
94 1.36 augustss };
95 1.36 augustss #endif
96 1.36 augustss
97 1.52 augustss #ifdef OHCI_DEBUG
98 1.52 augustss #define DPRINTF(x) if (ohcidebug) logprintf x
99 1.52 augustss #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
100 1.52 augustss int ohcidebug = 0;
101 1.92 tv #ifndef __NetBSD__
102 1.92 tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
103 1.92 tv #endif
104 1.52 augustss #else
105 1.52 augustss #define DPRINTF(x)
106 1.52 augustss #define DPRINTFN(n,x)
107 1.52 augustss #endif
108 1.52 augustss
109 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
110 1.169 tron #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
111 1.16 augustss #else
112 1.169 tron #define SWAP_ENDIAN OHCI_BIG_ENDIAN
113 1.16 augustss #endif
114 1.16 augustss
115 1.169 tron #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
116 1.169 tron #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
117 1.169 tron #define HTOO16(val) O16TOH(val)
118 1.169 tron #define HTOO32(val) O32TOH(val)
119 1.168 augustss
120 1.1 augustss struct ohci_pipe;
121 1.1 augustss
122 1.91 augustss Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
123 1.91 augustss Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
124 1.1 augustss
125 1.91 augustss Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
126 1.91 augustss Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
127 1.1 augustss
128 1.91 augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
129 1.91 augustss Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
130 1.60 augustss
131 1.53 augustss #if 0
132 1.91 augustss Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
133 1.91 augustss ohci_soft_td_t *);
134 1.53 augustss #endif
135 1.91 augustss Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
136 1.77 augustss ohci_softc_t *, int, int, usbd_xfer_handle,
137 1.91 augustss ohci_soft_td_t *, ohci_soft_td_t **);
138 1.53 augustss
139 1.91 augustss Static void ohci_shutdown(void *v);
140 1.91 augustss Static void ohci_power(int, void *);
141 1.91 augustss Static usbd_status ohci_open(usbd_pipe_handle);
142 1.91 augustss Static void ohci_poll(struct usbd_bus *);
143 1.99 augustss Static void ohci_softintr(void *);
144 1.91 augustss Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
145 1.91 augustss Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
146 1.91 augustss
147 1.91 augustss Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
148 1.168 augustss Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
149 1.168 augustss ohci_soft_ed_t *);
150 1.168 augustss
151 1.91 augustss Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
152 1.91 augustss Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
153 1.91 augustss Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
154 1.91 augustss Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
155 1.91 augustss Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
156 1.91 augustss Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
157 1.91 augustss Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
158 1.91 augustss
159 1.91 augustss Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
160 1.91 augustss Static void ohci_device_isoc_enter(usbd_xfer_handle);
161 1.91 augustss
162 1.91 augustss Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
163 1.91 augustss Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
164 1.91 augustss
165 1.91 augustss Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
166 1.91 augustss Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
167 1.91 augustss
168 1.91 augustss Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
169 1.91 augustss Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
170 1.91 augustss Static void ohci_root_ctrl_abort(usbd_xfer_handle);
171 1.91 augustss Static void ohci_root_ctrl_close(usbd_pipe_handle);
172 1.91 augustss Static void ohci_root_ctrl_done(usbd_xfer_handle);
173 1.91 augustss
174 1.91 augustss Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
175 1.91 augustss Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
176 1.91 augustss Static void ohci_root_intr_abort(usbd_xfer_handle);
177 1.91 augustss Static void ohci_root_intr_close(usbd_pipe_handle);
178 1.91 augustss Static void ohci_root_intr_done(usbd_xfer_handle);
179 1.91 augustss
180 1.91 augustss Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
181 1.91 augustss Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
182 1.91 augustss Static void ohci_device_ctrl_abort(usbd_xfer_handle);
183 1.91 augustss Static void ohci_device_ctrl_close(usbd_pipe_handle);
184 1.91 augustss Static void ohci_device_ctrl_done(usbd_xfer_handle);
185 1.91 augustss
186 1.91 augustss Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
187 1.91 augustss Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
188 1.91 augustss Static void ohci_device_bulk_abort(usbd_xfer_handle);
189 1.91 augustss Static void ohci_device_bulk_close(usbd_pipe_handle);
190 1.91 augustss Static void ohci_device_bulk_done(usbd_xfer_handle);
191 1.91 augustss
192 1.91 augustss Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
193 1.91 augustss Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
194 1.91 augustss Static void ohci_device_intr_abort(usbd_xfer_handle);
195 1.91 augustss Static void ohci_device_intr_close(usbd_pipe_handle);
196 1.91 augustss Static void ohci_device_intr_done(usbd_xfer_handle);
197 1.91 augustss
198 1.91 augustss Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
199 1.91 augustss Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
200 1.91 augustss Static void ohci_device_isoc_abort(usbd_xfer_handle);
201 1.91 augustss Static void ohci_device_isoc_close(usbd_pipe_handle);
202 1.91 augustss Static void ohci_device_isoc_done(usbd_xfer_handle);
203 1.91 augustss
204 1.120 augustss Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
205 1.91 augustss struct ohci_pipe *pipe, int ival);
206 1.91 augustss
207 1.120 augustss Static int ohci_str(usb_string_descriptor_t *, int, const char *);
208 1.91 augustss
209 1.91 augustss Static void ohci_timeout(void *);
210 1.114 augustss Static void ohci_timeout_task(void *);
211 1.104 augustss Static void ohci_rhsc_enable(void *);
212 1.91 augustss
213 1.91 augustss Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
214 1.91 augustss Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
215 1.53 augustss
216 1.91 augustss Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
217 1.91 augustss Static void ohci_noop(usbd_pipe_handle pipe);
218 1.37 augustss
219 1.52 augustss #ifdef OHCI_DEBUG
220 1.91 augustss Static void ohci_dumpregs(ohci_softc_t *);
221 1.168 augustss Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
222 1.168 augustss Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
223 1.168 augustss Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
224 1.168 augustss Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
225 1.168 augustss Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
226 1.1 augustss #endif
227 1.1 augustss
228 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
229 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
230 1.88 augustss #define OWRITE1(sc, r, x) \
231 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
232 1.88 augustss #define OWRITE2(sc, r, x) \
233 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
234 1.88 augustss #define OWRITE4(sc, r, x) \
235 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
236 1.174 mrg static __inline uint8_t
237 1.174 mrg OREAD1(ohci_softc_t *sc, bus_size_t r)
238 1.174 mrg {
239 1.174 mrg
240 1.174 mrg OBARR(sc);
241 1.174 mrg return bus_space_read_1(sc->iot, sc->ioh, r);
242 1.174 mrg }
243 1.174 mrg
244 1.174 mrg static __inline uint16_t
245 1.174 mrg OREAD2(ohci_softc_t *sc, bus_size_t r)
246 1.174 mrg {
247 1.174 mrg
248 1.174 mrg OBARR(sc);
249 1.174 mrg return bus_space_read_2(sc->iot, sc->ioh, r);
250 1.174 mrg }
251 1.174 mrg
252 1.174 mrg static __inline uint32_t
253 1.174 mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
254 1.174 mrg {
255 1.174 mrg
256 1.174 mrg OBARR(sc);
257 1.174 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
258 1.174 mrg }
259 1.1 augustss
260 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
261 1.120 augustss Static u_int8_t revbits[OHCI_NO_INTRS] =
262 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
263 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
264 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
265 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
266 1.1 augustss
267 1.1 augustss struct ohci_pipe {
268 1.1 augustss struct usbd_pipe pipe;
269 1.1 augustss ohci_soft_ed_t *sed;
270 1.60 augustss union {
271 1.60 augustss ohci_soft_td_t *td;
272 1.60 augustss ohci_soft_itd_t *itd;
273 1.60 augustss } tail;
274 1.1 augustss /* Info needed for different pipe kinds. */
275 1.1 augustss union {
276 1.1 augustss /* Control pipe */
277 1.1 augustss struct {
278 1.4 augustss usb_dma_t reqdma;
279 1.1 augustss u_int length;
280 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
281 1.1 augustss } ctl;
282 1.1 augustss /* Interrupt pipe */
283 1.1 augustss struct {
284 1.1 augustss int nslots;
285 1.1 augustss int pos;
286 1.1 augustss } intr;
287 1.3 augustss /* Bulk pipe */
288 1.3 augustss struct {
289 1.3 augustss u_int length;
290 1.32 augustss int isread;
291 1.3 augustss } bulk;
292 1.43 augustss /* Iso pipe */
293 1.43 augustss struct iso {
294 1.60 augustss int next, inuse;
295 1.43 augustss } iso;
296 1.1 augustss } u;
297 1.1 augustss };
298 1.1 augustss
299 1.1 augustss #define OHCI_INTR_ENDPT 1
300 1.1 augustss
301 1.82 augustss Static struct usbd_bus_methods ohci_bus_methods = {
302 1.42 augustss ohci_open,
303 1.73 augustss ohci_softintr,
304 1.42 augustss ohci_poll,
305 1.42 augustss ohci_allocm,
306 1.42 augustss ohci_freem,
307 1.62 augustss ohci_allocx,
308 1.62 augustss ohci_freex,
309 1.42 augustss };
310 1.42 augustss
311 1.120 augustss Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
312 1.1 augustss ohci_root_ctrl_transfer,
313 1.17 augustss ohci_root_ctrl_start,
314 1.1 augustss ohci_root_ctrl_abort,
315 1.1 augustss ohci_root_ctrl_close,
316 1.37 augustss ohci_noop,
317 1.65 augustss ohci_root_ctrl_done,
318 1.1 augustss };
319 1.1 augustss
320 1.120 augustss Static struct usbd_pipe_methods ohci_root_intr_methods = {
321 1.1 augustss ohci_root_intr_transfer,
322 1.17 augustss ohci_root_intr_start,
323 1.1 augustss ohci_root_intr_abort,
324 1.1 augustss ohci_root_intr_close,
325 1.37 augustss ohci_noop,
326 1.38 augustss ohci_root_intr_done,
327 1.1 augustss };
328 1.1 augustss
329 1.120 augustss Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
330 1.1 augustss ohci_device_ctrl_transfer,
331 1.17 augustss ohci_device_ctrl_start,
332 1.1 augustss ohci_device_ctrl_abort,
333 1.1 augustss ohci_device_ctrl_close,
334 1.37 augustss ohci_noop,
335 1.38 augustss ohci_device_ctrl_done,
336 1.1 augustss };
337 1.1 augustss
338 1.120 augustss Static struct usbd_pipe_methods ohci_device_intr_methods = {
339 1.1 augustss ohci_device_intr_transfer,
340 1.17 augustss ohci_device_intr_start,
341 1.1 augustss ohci_device_intr_abort,
342 1.1 augustss ohci_device_intr_close,
343 1.37 augustss ohci_device_clear_toggle,
344 1.38 augustss ohci_device_intr_done,
345 1.1 augustss };
346 1.1 augustss
347 1.120 augustss Static struct usbd_pipe_methods ohci_device_bulk_methods = {
348 1.3 augustss ohci_device_bulk_transfer,
349 1.17 augustss ohci_device_bulk_start,
350 1.3 augustss ohci_device_bulk_abort,
351 1.3 augustss ohci_device_bulk_close,
352 1.37 augustss ohci_device_clear_toggle,
353 1.38 augustss ohci_device_bulk_done,
354 1.3 augustss };
355 1.3 augustss
356 1.82 augustss Static struct usbd_pipe_methods ohci_device_isoc_methods = {
357 1.43 augustss ohci_device_isoc_transfer,
358 1.43 augustss ohci_device_isoc_start,
359 1.43 augustss ohci_device_isoc_abort,
360 1.43 augustss ohci_device_isoc_close,
361 1.43 augustss ohci_noop,
362 1.43 augustss ohci_device_isoc_done,
363 1.43 augustss };
364 1.43 augustss
365 1.55 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
366 1.47 augustss int
367 1.91 augustss ohci_activate(device_ptr_t self, enum devact act)
368 1.47 augustss {
369 1.49 augustss struct ohci_softc *sc = (struct ohci_softc *)self;
370 1.47 augustss int rv = 0;
371 1.47 augustss
372 1.47 augustss switch (act) {
373 1.47 augustss case DVACT_ACTIVATE:
374 1.47 augustss return (EOPNOTSUPP);
375 1.47 augustss
376 1.47 augustss case DVACT_DEACTIVATE:
377 1.49 augustss if (sc->sc_child != NULL)
378 1.49 augustss rv = config_deactivate(sc->sc_child);
379 1.83 augustss sc->sc_dying = 1;
380 1.47 augustss break;
381 1.47 augustss }
382 1.47 augustss return (rv);
383 1.47 augustss }
384 1.47 augustss
385 1.47 augustss int
386 1.91 augustss ohci_detach(struct ohci_softc *sc, int flags)
387 1.47 augustss {
388 1.47 augustss int rv = 0;
389 1.47 augustss
390 1.47 augustss if (sc->sc_child != NULL)
391 1.47 augustss rv = config_detach(sc->sc_child, flags);
392 1.120 augustss
393 1.47 augustss if (rv != 0)
394 1.47 augustss return (rv);
395 1.47 augustss
396 1.104 augustss usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
397 1.104 augustss
398 1.71 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
399 1.47 augustss powerhook_disestablish(sc->sc_powerhook);
400 1.59 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
401 1.71 augustss #endif
402 1.59 augustss
403 1.116 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
404 1.116 augustss
405 1.47 augustss /* free data structures XXX */
406 1.47 augustss
407 1.47 augustss return (rv);
408 1.47 augustss }
409 1.55 augustss #endif
410 1.47 augustss
411 1.1 augustss ohci_soft_ed_t *
412 1.91 augustss ohci_alloc_sed(ohci_softc_t *sc)
413 1.1 augustss {
414 1.1 augustss ohci_soft_ed_t *sed;
415 1.53 augustss usbd_status err;
416 1.1 augustss int i, offs;
417 1.4 augustss usb_dma_t dma;
418 1.1 augustss
419 1.53 augustss if (sc->sc_freeeds == NULL) {
420 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
421 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
422 1.53 augustss OHCI_ED_ALIGN, &dma);
423 1.53 augustss if (err)
424 1.39 augustss return (0);
425 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
426 1.39 augustss offs = i * OHCI_SED_SIZE;
427 1.123 augustss sed = KERNADDR(&dma, offs);
428 1.125 augustss sed->physaddr = DMAADDR(&dma, offs);
429 1.179.2.1.2.1 skrll sed->dma = dma;
430 1.179.2.1.2.1 skrll sed->offs = offs;
431 1.1 augustss sed->next = sc->sc_freeeds;
432 1.1 augustss sc->sc_freeeds = sed;
433 1.1 augustss }
434 1.1 augustss }
435 1.1 augustss sed = sc->sc_freeeds;
436 1.1 augustss sc->sc_freeeds = sed->next;
437 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
438 1.1 augustss sed->next = 0;
439 1.39 augustss return (sed);
440 1.1 augustss }
441 1.1 augustss
442 1.1 augustss void
443 1.91 augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
444 1.1 augustss {
445 1.1 augustss sed->next = sc->sc_freeeds;
446 1.1 augustss sc->sc_freeeds = sed;
447 1.1 augustss }
448 1.1 augustss
449 1.1 augustss ohci_soft_td_t *
450 1.91 augustss ohci_alloc_std(ohci_softc_t *sc)
451 1.1 augustss {
452 1.1 augustss ohci_soft_td_t *std;
453 1.53 augustss usbd_status err;
454 1.1 augustss int i, offs;
455 1.4 augustss usb_dma_t dma;
456 1.69 augustss int s;
457 1.1 augustss
458 1.53 augustss if (sc->sc_freetds == NULL) {
459 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
460 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
461 1.53 augustss OHCI_TD_ALIGN, &dma);
462 1.53 augustss if (err)
463 1.83 augustss return (NULL);
464 1.69 augustss s = splusb();
465 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
466 1.39 augustss offs = i * OHCI_STD_SIZE;
467 1.123 augustss std = KERNADDR(&dma, offs);
468 1.125 augustss std->physaddr = DMAADDR(&dma, offs);
469 1.179.2.1.2.1 skrll std->dma = dma;
470 1.179.2.1.2.1 skrll std->offs = offs;
471 1.1 augustss std->nexttd = sc->sc_freetds;
472 1.1 augustss sc->sc_freetds = std;
473 1.1 augustss }
474 1.69 augustss splx(s);
475 1.1 augustss }
476 1.69 augustss
477 1.69 augustss s = splusb();
478 1.1 augustss std = sc->sc_freetds;
479 1.1 augustss sc->sc_freetds = std->nexttd;
480 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
481 1.83 augustss std->nexttd = NULL;
482 1.83 augustss std->xfer = NULL;
483 1.69 augustss ohci_hash_add_td(sc, std);
484 1.69 augustss splx(s);
485 1.69 augustss
486 1.1 augustss return (std);
487 1.1 augustss }
488 1.1 augustss
489 1.1 augustss void
490 1.91 augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
491 1.1 augustss {
492 1.69 augustss int s;
493 1.69 augustss
494 1.69 augustss s = splusb();
495 1.69 augustss ohci_hash_rem_td(sc, std);
496 1.1 augustss std->nexttd = sc->sc_freetds;
497 1.1 augustss sc->sc_freetds = std;
498 1.69 augustss splx(s);
499 1.1 augustss }
500 1.1 augustss
501 1.1 augustss usbd_status
502 1.91 augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
503 1.91 augustss int alen, int rd, usbd_xfer_handle xfer,
504 1.91 augustss ohci_soft_td_t *sp, ohci_soft_td_t **ep)
505 1.48 augustss {
506 1.48 augustss ohci_soft_td_t *next, *cur;
507 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
508 1.77 augustss u_int32_t tdflags;
509 1.75 augustss int len, curlen;
510 1.77 augustss usb_dma_t *dma = &xfer->dmabuf;
511 1.77 augustss u_int16_t flags = xfer->flags;
512 1.48 augustss
513 1.75 augustss DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
514 1.75 augustss
515 1.75 augustss len = alen;
516 1.48 augustss cur = sp;
517 1.125 augustss dataphys = DMAADDR(dma, 0);
518 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
519 1.179.2.1.2.1 skrll usb_syncmem(dma, 0, len,
520 1.179.2.1.2.1 skrll rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
521 1.168 augustss tdflags = HTOO32(
522 1.120 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
523 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
524 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
525 1.61 augustss
526 1.48 augustss for (;;) {
527 1.48 augustss next = ohci_alloc_std(sc);
528 1.75 augustss if (next == NULL)
529 1.61 augustss goto nomem;
530 1.48 augustss
531 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
532 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
533 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
534 1.48 augustss /* we can handle it in this TD */
535 1.48 augustss curlen = len;
536 1.48 augustss } else {
537 1.48 augustss /* must use multiple TDs, fill as much as possible. */
538 1.120 augustss curlen = 2 * OHCI_PAGE_SIZE -
539 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
540 1.78 augustss /* the length must be a multiple of the max size */
541 1.78 augustss curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
542 1.78 augustss #ifdef DIAGNOSTIC
543 1.78 augustss if (curlen == 0)
544 1.128 provos panic("ohci_alloc_std: curlen == 0");
545 1.78 augustss #endif
546 1.48 augustss }
547 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
548 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
549 1.48 augustss dataphys, dataphysend,
550 1.48 augustss len, curlen));
551 1.48 augustss len -= curlen;
552 1.48 augustss
553 1.77 augustss cur->td.td_flags = tdflags;
554 1.168 augustss cur->td.td_cbp = HTOO32(dataphys);
555 1.48 augustss cur->nexttd = next;
556 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
557 1.168 augustss cur->td.td_be = HTOO32(dataphys + curlen - 1);
558 1.48 augustss cur->len = curlen;
559 1.48 augustss cur->flags = OHCI_ADD_LEN;
560 1.77 augustss cur->xfer = xfer;
561 1.179.2.1.2.1 skrll usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
562 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
563 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
564 1.48 augustss dataphys, dataphys + curlen - 1));
565 1.48 augustss if (len == 0)
566 1.48 augustss break;
567 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
568 1.48 augustss dataphys += curlen;
569 1.48 augustss cur = next;
570 1.48 augustss }
571 1.164 augustss if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
572 1.75 augustss alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
573 1.61 augustss /* Force a 0 length transfer at the end. */
574 1.75 augustss
575 1.75 augustss cur = next;
576 1.61 augustss next = ohci_alloc_std(sc);
577 1.75 augustss if (next == NULL)
578 1.61 augustss goto nomem;
579 1.61 augustss
580 1.77 augustss cur->td.td_flags = tdflags;
581 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
582 1.61 augustss cur->nexttd = next;
583 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
584 1.75 augustss cur->td.td_be = ~0;
585 1.61 augustss cur->len = 0;
586 1.61 augustss cur->flags = 0;
587 1.77 augustss cur->xfer = xfer;
588 1.179.2.1.2.1 skrll usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
589 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
590 1.61 augustss DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
591 1.61 augustss }
592 1.77 augustss *ep = cur;
593 1.48 augustss
594 1.48 augustss return (USBD_NORMAL_COMPLETION);
595 1.61 augustss
596 1.61 augustss nomem:
597 1.61 augustss /* XXX free chain */
598 1.61 augustss return (USBD_NOMEM);
599 1.48 augustss }
600 1.48 augustss
601 1.53 augustss #if 0
602 1.82 augustss Static void
603 1.120 augustss ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
604 1.91 augustss ohci_soft_td_t *stdend)
605 1.48 augustss {
606 1.48 augustss ohci_soft_td_t *p;
607 1.48 augustss
608 1.48 augustss for (; std != stdend; std = p) {
609 1.48 augustss p = std->nexttd;
610 1.48 augustss ohci_free_std(sc, std);
611 1.48 augustss }
612 1.48 augustss }
613 1.53 augustss #endif
614 1.48 augustss
615 1.60 augustss ohci_soft_itd_t *
616 1.91 augustss ohci_alloc_sitd(ohci_softc_t *sc)
617 1.60 augustss {
618 1.60 augustss ohci_soft_itd_t *sitd;
619 1.60 augustss usbd_status err;
620 1.83 augustss int i, s, offs;
621 1.60 augustss usb_dma_t dma;
622 1.60 augustss
623 1.60 augustss if (sc->sc_freeitds == NULL) {
624 1.60 augustss DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
625 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
626 1.83 augustss OHCI_ITD_ALIGN, &dma);
627 1.60 augustss if (err)
628 1.83 augustss return (NULL);
629 1.129 augustss s = splusb();
630 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
631 1.83 augustss offs = i * OHCI_SITD_SIZE;
632 1.123 augustss sitd = KERNADDR(&dma, offs);
633 1.125 augustss sitd->physaddr = DMAADDR(&dma, offs);
634 1.179.2.1.2.1 skrll sitd->dma = dma;
635 1.179.2.1.2.1 skrll sitd->offs = offs;
636 1.60 augustss sitd->nextitd = sc->sc_freeitds;
637 1.60 augustss sc->sc_freeitds = sitd;
638 1.60 augustss }
639 1.129 augustss splx(s);
640 1.60 augustss }
641 1.83 augustss
642 1.83 augustss s = splusb();
643 1.60 augustss sitd = sc->sc_freeitds;
644 1.60 augustss sc->sc_freeitds = sitd->nextitd;
645 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
646 1.83 augustss sitd->nextitd = NULL;
647 1.83 augustss sitd->xfer = NULL;
648 1.83 augustss ohci_hash_add_itd(sc, sitd);
649 1.83 augustss splx(s);
650 1.83 augustss
651 1.83 augustss #ifdef DIAGNOSTIC
652 1.83 augustss sitd->isdone = 0;
653 1.83 augustss #endif
654 1.83 augustss
655 1.60 augustss return (sitd);
656 1.60 augustss }
657 1.60 augustss
658 1.60 augustss void
659 1.91 augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
660 1.60 augustss {
661 1.83 augustss int s;
662 1.83 augustss
663 1.83 augustss DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
664 1.83 augustss
665 1.83 augustss #ifdef DIAGNOSTIC
666 1.83 augustss if (!sitd->isdone) {
667 1.128 provos panic("ohci_free_sitd: sitd=%p not done", sitd);
668 1.83 augustss return;
669 1.83 augustss }
670 1.134 toshii /* Warn double free */
671 1.134 toshii sitd->isdone = 0;
672 1.83 augustss #endif
673 1.83 augustss
674 1.83 augustss s = splusb();
675 1.83 augustss ohci_hash_rem_itd(sc, sitd);
676 1.60 augustss sitd->nextitd = sc->sc_freeitds;
677 1.60 augustss sc->sc_freeitds = sitd;
678 1.83 augustss splx(s);
679 1.60 augustss }
680 1.60 augustss
681 1.48 augustss usbd_status
682 1.91 augustss ohci_init(ohci_softc_t *sc)
683 1.1 augustss {
684 1.1 augustss ohci_soft_ed_t *sed, *psed;
685 1.53 augustss usbd_status err;
686 1.1 augustss int i;
687 1.161 augustss u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
688 1.16 augustss
689 1.1 augustss DPRINTF(("ohci_init: start\n"));
690 1.36 augustss #if defined(__OpenBSD__)
691 1.55 augustss printf(",");
692 1.36 augustss #else
693 1.55 augustss printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
694 1.36 augustss #endif
695 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
696 1.55 augustss printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
697 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
698 1.55 augustss
699 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
700 1.120 augustss printf("%s: unsupported OHCI revision\n",
701 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
702 1.56 augustss sc->sc_bus.usbrev = USBREV_UNKNOWN;
703 1.1 augustss return (USBD_INVAL);
704 1.1 augustss }
705 1.56 augustss sc->sc_bus.usbrev = USBREV_1_0;
706 1.1 augustss
707 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
708 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
709 1.83 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
710 1.83 augustss LIST_INIT(&sc->sc_hash_itds[i]);
711 1.1 augustss
712 1.62 augustss SIMPLEQ_INIT(&sc->sc_free_xfers);
713 1.62 augustss
714 1.153 fvdl #ifdef __NetBSD__
715 1.153 fvdl usb_setup_reserve(sc, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
716 1.153 fvdl USB_MEM_RESERVE);
717 1.153 fvdl #endif
718 1.153 fvdl
719 1.73 augustss /* XXX determine alignment by R/W */
720 1.1 augustss /* Allocate the HCCA area. */
721 1.120 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
722 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
723 1.53 augustss if (err)
724 1.53 augustss return (err);
725 1.123 augustss sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
726 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
727 1.1 augustss
728 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
729 1.1 augustss
730 1.60 augustss /* Allocate dummy ED that starts the control list. */
731 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
732 1.53 augustss if (sc->sc_ctrl_head == NULL) {
733 1.53 augustss err = USBD_NOMEM;
734 1.1 augustss goto bad1;
735 1.1 augustss }
736 1.168 augustss sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
737 1.34 augustss
738 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
739 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
740 1.53 augustss if (sc->sc_bulk_head == NULL) {
741 1.53 augustss err = USBD_NOMEM;
742 1.1 augustss goto bad2;
743 1.1 augustss }
744 1.168 augustss sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
745 1.179.2.1.2.1 skrll usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
746 1.179.2.1.2.1 skrll sizeof(sc->sc_bulk_head->ed),
747 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
748 1.1 augustss
749 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
750 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
751 1.60 augustss if (sc->sc_isoc_head == NULL) {
752 1.60 augustss err = USBD_NOMEM;
753 1.60 augustss goto bad3;
754 1.60 augustss }
755 1.168 augustss sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
756 1.179.2.1.2.1 skrll usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
757 1.179.2.1.2.1 skrll sizeof(sc->sc_isoc_head->ed),
758 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
759 1.60 augustss
760 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
761 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
762 1.1 augustss sed = ohci_alloc_sed(sc);
763 1.53 augustss if (sed == NULL) {
764 1.1 augustss while (--i >= 0)
765 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
766 1.53 augustss err = USBD_NOMEM;
767 1.60 augustss goto bad4;
768 1.1 augustss }
769 1.1 augustss /* All ED fields are set to 0. */
770 1.1 augustss sc->sc_eds[i] = sed;
771 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
772 1.60 augustss if (i != 0)
773 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
774 1.60 augustss else
775 1.60 augustss psed= sc->sc_isoc_head;
776 1.60 augustss sed->next = psed;
777 1.168 augustss sed->ed.ed_nexted = HTOO32(psed->physaddr);
778 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
779 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
780 1.1 augustss }
781 1.120 augustss /*
782 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
783 1.1 augustss * the tree set up properly to spread the interrupts.
784 1.1 augustss */
785 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
786 1.120 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
787 1.168 augustss HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
788 1.179.2.1.2.1 skrll usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
789 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
790 1.1 augustss
791 1.73 augustss #ifdef OHCI_DEBUG
792 1.73 augustss if (ohcidebug > 15) {
793 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
794 1.73 augustss printf("ed#%d ", i);
795 1.168 augustss ohci_dump_ed(sc, sc->sc_eds[i]);
796 1.73 augustss }
797 1.73 augustss printf("iso ");
798 1.168 augustss ohci_dump_ed(sc, sc->sc_isoc_head);
799 1.73 augustss }
800 1.73 augustss #endif
801 1.73 augustss
802 1.161 augustss /* Preserve values programmed by SMM/BIOS but lost over reset. */
803 1.161 augustss ctl = OREAD4(sc, OHCI_CONTROL);
804 1.161 augustss rwc = ctl & OHCI_RWC;
805 1.161 augustss fm = OREAD4(sc, OHCI_FM_INTERVAL);
806 1.161 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
807 1.161 augustss descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
808 1.161 augustss
809 1.1 augustss /* Determine in what context we are running. */
810 1.1 augustss if (ctl & OHCI_IR) {
811 1.1 augustss /* SMM active, request change */
812 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
813 1.160 augustss if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
814 1.160 augustss (OHCI_OC | OHCI_MIE))
815 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
816 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
817 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
818 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
819 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
820 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
821 1.1 augustss }
822 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
823 1.1 augustss if ((ctl & OHCI_IR) == 0) {
824 1.15 augustss printf("%s: SMM does not respond, resetting\n",
825 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
826 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
827 1.1 augustss goto reset;
828 1.1 augustss }
829 1.103 augustss #if 0
830 1.103 augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
831 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
832 1.1 augustss /* BIOS started controller. */
833 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
834 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
835 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
836 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
837 1.1 augustss }
838 1.103 augustss #endif
839 1.1 augustss } else {
840 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
841 1.1 augustss reset:
842 1.1 augustss /* Controller was cold started. */
843 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
844 1.1 augustss }
845 1.1 augustss
846 1.16 augustss /*
847 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
848 1.25 augustss * without it some controllers do not start.
849 1.16 augustss */
850 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
851 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
852 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
853 1.16 augustss
854 1.1 augustss /* We now own the host controller and the bus has been reset. */
855 1.1 augustss
856 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
857 1.1 augustss /* Nominal time for a reset is 10 us. */
858 1.1 augustss for (i = 0; i < 10; i++) {
859 1.1 augustss delay(10);
860 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
861 1.1 augustss if (!hcr)
862 1.1 augustss break;
863 1.1 augustss }
864 1.1 augustss if (hcr) {
865 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
866 1.53 augustss err = USBD_IOERROR;
867 1.60 augustss goto bad5;
868 1.1 augustss }
869 1.52 augustss #ifdef OHCI_DEBUG
870 1.1 augustss if (ohcidebug > 15)
871 1.1 augustss ohci_dumpregs(sc);
872 1.1 augustss #endif
873 1.1 augustss
874 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
875 1.1 augustss
876 1.1 augustss /* Set up HC registers. */
877 1.125 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
878 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
879 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
880 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
881 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
882 1.55 augustss /* switch on desired functional features */
883 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
884 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
885 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
886 1.161 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
887 1.1 augustss /* And finally start it! */
888 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
889 1.1 augustss
890 1.1 augustss /*
891 1.1 augustss * The controller is now OPERATIONAL. Set a some final
892 1.1 augustss * registers that should be set earlier, but that the
893 1.1 augustss * controller ignores when in the SUSPEND state.
894 1.1 augustss */
895 1.161 augustss ival = OHCI_GET_IVAL(fm);
896 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
897 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
898 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
899 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
900 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
901 1.1 augustss
902 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
903 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
904 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
905 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
906 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
907 1.1 augustss
908 1.85 augustss /*
909 1.85 augustss * The AMD756 requires a delay before re-reading the register,
910 1.85 augustss * otherwise it will occasionally report 0 ports.
911 1.85 augustss */
912 1.145 augustss sc->sc_noport = 0;
913 1.145 augustss for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
914 1.145 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
915 1.145 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
916 1.145 augustss }
917 1.1 augustss
918 1.52 augustss #ifdef OHCI_DEBUG
919 1.1 augustss if (ohcidebug > 5)
920 1.1 augustss ohci_dumpregs(sc);
921 1.1 augustss #endif
922 1.120 augustss
923 1.1 augustss /* Set up the bus struct. */
924 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
925 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
926 1.1 augustss
927 1.71 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
928 1.101 minoura sc->sc_control = sc->sc_intre = 0;
929 1.176 jmcneill sc->sc_powerhook = powerhook_establish(USBDEVNAME(sc->sc_bus.bdev),
930 1.176 jmcneill ohci_power, sc);
931 1.59 augustss sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
932 1.71 augustss #endif
933 1.59 augustss
934 1.104 augustss usb_callout_init(sc->sc_tmo_rhsc);
935 1.104 augustss
936 1.167 augustss /* Finally, turn on interrupts. */
937 1.167 augustss DPRINTFN(1,("ohci_init: enabling\n"));
938 1.167 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
939 1.167 augustss
940 1.1 augustss return (USBD_NORMAL_COMPLETION);
941 1.1 augustss
942 1.60 augustss bad5:
943 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
944 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
945 1.60 augustss bad4:
946 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
947 1.1 augustss bad3:
948 1.144 augustss ohci_free_sed(sc, sc->sc_bulk_head);
949 1.144 augustss bad2:
950 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
951 1.1 augustss bad1:
952 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
953 1.53 augustss return (err);
954 1.1 augustss }
955 1.1 augustss
956 1.42 augustss usbd_status
957 1.91 augustss ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
958 1.42 augustss {
959 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
960 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
961 1.52 augustss #endif
962 1.153 fvdl usbd_status status;
963 1.42 augustss
964 1.153 fvdl status = usb_allocmem(&sc->sc_bus, size, 0, dma);
965 1.153 fvdl #ifdef __NetBSD__
966 1.153 fvdl if (status == USBD_NOMEM)
967 1.153 fvdl status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
968 1.153 fvdl #endif
969 1.153 fvdl return status;
970 1.42 augustss }
971 1.42 augustss
972 1.42 augustss void
973 1.91 augustss ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
974 1.42 augustss {
975 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
976 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
977 1.52 augustss #endif
978 1.153 fvdl #ifdef __NetBSD__
979 1.153 fvdl if (dma->block->flags & USB_DMA_RESERVE) {
980 1.153 fvdl usb_reserve_freem(&((struct ohci_softc *)bus)->sc_dma_reserve,
981 1.153 fvdl dma);
982 1.153 fvdl return;
983 1.153 fvdl }
984 1.153 fvdl #endif
985 1.44 augustss usb_freemem(&sc->sc_bus, dma);
986 1.62 augustss }
987 1.62 augustss
988 1.62 augustss usbd_xfer_handle
989 1.91 augustss ohci_allocx(struct usbd_bus *bus)
990 1.62 augustss {
991 1.62 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
992 1.62 augustss usbd_xfer_handle xfer;
993 1.62 augustss
994 1.62 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
995 1.118 augustss if (xfer != NULL) {
996 1.126 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
997 1.118 augustss #ifdef DIAGNOSTIC
998 1.118 augustss if (xfer->busy_free != XFER_FREE) {
999 1.118 augustss printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
1000 1.118 augustss xfer->busy_free);
1001 1.118 augustss }
1002 1.118 augustss #endif
1003 1.118 augustss } else {
1004 1.114 augustss xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
1005 1.118 augustss }
1006 1.118 augustss if (xfer != NULL) {
1007 1.114 augustss memset(xfer, 0, sizeof (struct ohci_xfer));
1008 1.118 augustss #ifdef DIAGNOSTIC
1009 1.118 augustss xfer->busy_free = XFER_BUSY;
1010 1.118 augustss #endif
1011 1.118 augustss }
1012 1.62 augustss return (xfer);
1013 1.62 augustss }
1014 1.62 augustss
1015 1.62 augustss void
1016 1.91 augustss ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1017 1.62 augustss {
1018 1.62 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
1019 1.62 augustss
1020 1.118 augustss #ifdef DIAGNOSTIC
1021 1.118 augustss if (xfer->busy_free != XFER_BUSY) {
1022 1.118 augustss printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1023 1.118 augustss xfer->busy_free);
1024 1.118 augustss }
1025 1.118 augustss xfer->busy_free = XFER_FREE;
1026 1.118 augustss #endif
1027 1.62 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1028 1.42 augustss }
1029 1.42 augustss
1030 1.59 augustss /*
1031 1.59 augustss * Shut down the controller when the system is going down.
1032 1.59 augustss */
1033 1.59 augustss void
1034 1.91 augustss ohci_shutdown(void *v)
1035 1.59 augustss {
1036 1.59 augustss ohci_softc_t *sc = v;
1037 1.179.2.1.2.1 skrll int s;
1038 1.59 augustss
1039 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
1040 1.179.2.1.2.1 skrll
1041 1.179.2.1.2.1 skrll /*
1042 1.179.2.1.2.1 skrll * Use polling mode to prevent the interrupts shutting
1043 1.179.2.1.2.1 skrll * us down before we shut them down.
1044 1.179.2.1.2.1 skrll */
1045 1.179.2.1.2.1 skrll s = splhardusb();
1046 1.179.2.1.2.1 skrll sc->sc_bus.use_polling++;
1047 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1048 1.179.2.1.2.1 skrll sc->sc_bus.use_polling--;
1049 1.179.2.1.2.1 skrll splx(s);
1050 1.59 augustss }
1051 1.59 augustss
1052 1.59 augustss /*
1053 1.59 augustss * Handle suspend/resume.
1054 1.59 augustss *
1055 1.59 augustss * We need to switch to polling mode here, because this routine is
1056 1.162 augustss * called from an interupt context. This is all right since we
1057 1.59 augustss * are almost suspended anyway.
1058 1.59 augustss */
1059 1.33 augustss void
1060 1.91 augustss ohci_power(int why, void *v)
1061 1.33 augustss {
1062 1.33 augustss ohci_softc_t *sc = v;
1063 1.97 augustss u_int32_t ctl;
1064 1.95 augustss int s;
1065 1.33 augustss
1066 1.95 augustss #ifdef OHCI_DEBUG
1067 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
1068 1.33 augustss ohci_dumpregs(sc);
1069 1.33 augustss #endif
1070 1.95 augustss
1071 1.98 augustss s = splhardusb();
1072 1.95 augustss switch (why) {
1073 1.95 augustss case PWR_SUSPEND:
1074 1.95 augustss case PWR_STANDBY:
1075 1.97 augustss sc->sc_bus.use_polling++;
1076 1.101 minoura ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1077 1.101 minoura if (sc->sc_control == 0) {
1078 1.101 minoura /*
1079 1.101 minoura * Preserve register values, in case that APM BIOS
1080 1.101 minoura * does not recover them.
1081 1.101 minoura */
1082 1.101 minoura sc->sc_control = ctl;
1083 1.101 minoura sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE);
1084 1.101 minoura }
1085 1.101 minoura ctl |= OHCI_HCFS_SUSPEND;
1086 1.97 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
1087 1.97 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1088 1.97 augustss sc->sc_bus.use_polling--;
1089 1.95 augustss break;
1090 1.95 augustss case PWR_RESUME:
1091 1.97 augustss sc->sc_bus.use_polling++;
1092 1.101 minoura /* Some broken BIOSes do not recover these values */
1093 1.125 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1094 1.101 minoura OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
1095 1.101 minoura OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
1096 1.101 minoura if (sc->sc_intre)
1097 1.101 minoura OWRITE4(sc, OHCI_INTERRUPT_ENABLE,
1098 1.101 minoura sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE));
1099 1.101 minoura if (sc->sc_control)
1100 1.101 minoura ctl = sc->sc_control;
1101 1.101 minoura else
1102 1.101 minoura ctl = OREAD4(sc, OHCI_CONTROL);
1103 1.101 minoura ctl |= OHCI_HCFS_RESUME;
1104 1.97 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
1105 1.97 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1106 1.97 augustss ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1107 1.97 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
1108 1.97 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1109 1.101 minoura sc->sc_control = sc->sc_intre = 0;
1110 1.97 augustss sc->sc_bus.use_polling--;
1111 1.95 augustss break;
1112 1.95 augustss case PWR_SOFTSUSPEND:
1113 1.95 augustss case PWR_SOFTSTANDBY:
1114 1.95 augustss case PWR_SOFTRESUME:
1115 1.95 augustss break;
1116 1.95 augustss }
1117 1.95 augustss splx(s);
1118 1.33 augustss }
1119 1.33 augustss
1120 1.52 augustss #ifdef OHCI_DEBUG
1121 1.1 augustss void
1122 1.91 augustss ohci_dumpregs(ohci_softc_t *sc)
1123 1.1 augustss {
1124 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1125 1.41 augustss OREAD4(sc, OHCI_REVISION),
1126 1.41 augustss OREAD4(sc, OHCI_CONTROL),
1127 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1128 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1129 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
1130 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1131 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1132 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1133 1.41 augustss OREAD4(sc, OHCI_HCCA),
1134 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1135 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1136 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1137 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1138 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1139 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1140 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1141 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1142 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1143 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
1144 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1145 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1146 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1147 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
1148 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1149 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1150 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1151 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
1152 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
1153 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1154 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1155 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1156 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number),
1157 1.168 augustss O32TOH(sc->sc_hcca->hcca_done_head)));
1158 1.1 augustss }
1159 1.1 augustss #endif
1160 1.1 augustss
1161 1.91 augustss Static int ohci_intr1(ohci_softc_t *);
1162 1.53 augustss
1163 1.1 augustss int
1164 1.91 augustss ohci_intr(void *p)
1165 1.1 augustss {
1166 1.1 augustss ohci_softc_t *sc = p;
1167 1.111 augustss
1168 1.116 augustss if (sc == NULL || sc->sc_dying)
1169 1.111 augustss return (0);
1170 1.53 augustss
1171 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
1172 1.57 augustss if (sc->sc_bus.use_polling) {
1173 1.57 augustss #ifdef DIAGNOSTIC
1174 1.149 mycroft DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1175 1.57 augustss #endif
1176 1.154 joff /* for level triggered intrs, should do something to ack */
1177 1.155 perry OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1178 1.154 joff OREAD4(sc, OHCI_INTERRUPT_STATUS));
1179 1.155 perry
1180 1.53 augustss return (0);
1181 1.57 augustss }
1182 1.53 augustss
1183 1.120 augustss return (ohci_intr1(sc));
1184 1.53 augustss }
1185 1.53 augustss
1186 1.82 augustss Static int
1187 1.91 augustss ohci_intr1(ohci_softc_t *sc)
1188 1.53 augustss {
1189 1.1 augustss u_int32_t intrs, eintrs;
1190 1.1 augustss
1191 1.105 augustss DPRINTFN(14,("ohci_intr1: enter\n"));
1192 1.105 augustss
1193 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1194 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1195 1.15 augustss #ifdef DIAGNOSTIC
1196 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1197 1.15 augustss #endif
1198 1.15 augustss return (0);
1199 1.15 augustss }
1200 1.15 augustss
1201 1.157 mycroft intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1202 1.1 augustss if (!intrs)
1203 1.1 augustss return (0);
1204 1.55 augustss
1205 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1206 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1207 1.1 augustss if (!eintrs)
1208 1.1 augustss return (0);
1209 1.1 augustss
1210 1.45 augustss sc->sc_bus.intr_context++;
1211 1.44 augustss sc->sc_bus.no_intrs++;
1212 1.120 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1213 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1214 1.1 augustss (u_int)eintrs));
1215 1.1 augustss
1216 1.1 augustss if (eintrs & OHCI_SO) {
1217 1.100 augustss sc->sc_overrun_cnt++;
1218 1.100 augustss if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1219 1.100 augustss printf("%s: %u scheduling overruns\n",
1220 1.100 augustss USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1221 1.100 augustss sc->sc_overrun_cnt = 0;
1222 1.100 augustss }
1223 1.1 augustss /* XXX do what */
1224 1.106 augustss eintrs &= ~OHCI_SO;
1225 1.1 augustss }
1226 1.1 augustss if (eintrs & OHCI_WDH) {
1227 1.157 mycroft /*
1228 1.157 mycroft * We block the interrupt below, and reenable it later from
1229 1.157 mycroft * ohci_softintr().
1230 1.157 mycroft */
1231 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1232 1.1 augustss }
1233 1.1 augustss if (eintrs & OHCI_RD) {
1234 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1235 1.1 augustss /* XXX process resume detect */
1236 1.1 augustss }
1237 1.1 augustss if (eintrs & OHCI_UE) {
1238 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1239 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
1240 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1241 1.1 augustss /* XXX what else */
1242 1.1 augustss }
1243 1.1 augustss if (eintrs & OHCI_RHSC) {
1244 1.120 augustss /*
1245 1.157 mycroft * We block the interrupt below, and reenable it later from
1246 1.157 mycroft * a timeout.
1247 1.1 augustss */
1248 1.157 mycroft ohci_rhsc(sc, sc->sc_intrxfer);
1249 1.104 augustss /* Do not allow RHSC interrupts > 1 per second */
1250 1.104 augustss usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1251 1.1 augustss }
1252 1.1 augustss
1253 1.45 augustss sc->sc_bus.intr_context--;
1254 1.44 augustss
1255 1.106 augustss if (eintrs != 0) {
1256 1.157 mycroft /* Block unprocessed interrupts. */
1257 1.106 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1258 1.106 augustss sc->sc_eintrs &= ~eintrs;
1259 1.157 mycroft DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1260 1.157 mycroft USBDEVNAME(sc->sc_bus.bdev), eintrs));
1261 1.106 augustss }
1262 1.1 augustss
1263 1.1 augustss return (1);
1264 1.1 augustss }
1265 1.1 augustss
1266 1.1 augustss void
1267 1.104 augustss ohci_rhsc_enable(void *v_sc)
1268 1.104 augustss {
1269 1.104 augustss ohci_softc_t *sc = v_sc;
1270 1.129 augustss int s;
1271 1.104 augustss
1272 1.129 augustss s = splhardusb();
1273 1.157 mycroft sc->sc_eintrs |= OHCI_RHSC;
1274 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1275 1.129 augustss splx(s);
1276 1.1 augustss }
1277 1.1 augustss
1278 1.52 augustss #ifdef OHCI_DEBUG
1279 1.166 drochner const char *ohci_cc_strs[] = {
1280 1.13 augustss "NO_ERROR",
1281 1.13 augustss "CRC",
1282 1.13 augustss "BIT_STUFFING",
1283 1.13 augustss "DATA_TOGGLE_MISMATCH",
1284 1.13 augustss "STALL",
1285 1.13 augustss "DEVICE_NOT_RESPONDING",
1286 1.13 augustss "PID_CHECK_FAILURE",
1287 1.13 augustss "UNEXPECTED_PID",
1288 1.13 augustss "DATA_OVERRUN",
1289 1.13 augustss "DATA_UNDERRUN",
1290 1.13 augustss "BUFFER_OVERRUN",
1291 1.13 augustss "BUFFER_UNDERRUN",
1292 1.67 augustss "reserved",
1293 1.67 augustss "reserved",
1294 1.67 augustss "NOT_ACCESSED",
1295 1.13 augustss "NOT_ACCESSED",
1296 1.13 augustss };
1297 1.13 augustss #endif
1298 1.13 augustss
1299 1.1 augustss void
1300 1.157 mycroft ohci_softintr(void *v)
1301 1.83 augustss {
1302 1.157 mycroft ohci_softc_t *sc = v;
1303 1.157 mycroft ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1304 1.157 mycroft ohci_soft_td_t *std, *sdone, *stdnext;
1305 1.157 mycroft usbd_xfer_handle xfer;
1306 1.157 mycroft struct ohci_pipe *opipe;
1307 1.157 mycroft int len, cc, s;
1308 1.157 mycroft int i, j, actlen, iframes, uedir;
1309 1.157 mycroft ohci_physaddr_t done;
1310 1.157 mycroft
1311 1.157 mycroft DPRINTFN(10,("ohci_softintr: enter\n"));
1312 1.157 mycroft
1313 1.157 mycroft sc->sc_bus.intr_context++;
1314 1.157 mycroft
1315 1.157 mycroft s = splhardusb();
1316 1.179.2.1.2.1 skrll usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1317 1.179.2.1.2.1 skrll sizeof(sc->sc_hcca->hcca_done_head),
1318 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1319 1.168 augustss done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1320 1.157 mycroft sc->sc_hcca->hcca_done_head = 0;
1321 1.179.2.1.2.1 skrll usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1322 1.179.2.1.2.1 skrll sizeof(sc->sc_hcca->hcca_done_head),
1323 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1324 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1325 1.157 mycroft sc->sc_eintrs |= OHCI_WDH;
1326 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1327 1.157 mycroft splx(s);
1328 1.83 augustss
1329 1.83 augustss /* Reverse the done list. */
1330 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1331 1.83 augustss std = ohci_hash_find_td(sc, done);
1332 1.83 augustss if (std != NULL) {
1333 1.179.2.1.2.1 skrll usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1334 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1335 1.83 augustss std->dnext = sdone;
1336 1.168 augustss done = O32TOH(std->td.td_nexttd);
1337 1.83 augustss sdone = std;
1338 1.83 augustss DPRINTFN(10,("add TD %p\n", std));
1339 1.83 augustss continue;
1340 1.83 augustss }
1341 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1342 1.83 augustss if (sitd != NULL) {
1343 1.179.2.1.2.1 skrll usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1344 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1345 1.83 augustss sitd->dnext = sidone;
1346 1.168 augustss done = O32TOH(sitd->itd.itd_nextitd);
1347 1.83 augustss sidone = sitd;
1348 1.83 augustss DPRINTFN(5,("add ITD %p\n", sitd));
1349 1.83 augustss continue;
1350 1.83 augustss }
1351 1.157 mycroft panic("ohci_softintr: addr 0x%08lx not found", (u_long)done);
1352 1.83 augustss }
1353 1.83 augustss
1354 1.105 augustss DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1355 1.1 augustss
1356 1.52 augustss #ifdef OHCI_DEBUG
1357 1.1 augustss if (ohcidebug > 10) {
1358 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1359 1.168 augustss ohci_dump_tds(sc, sdone);
1360 1.1 augustss }
1361 1.1 augustss #endif
1362 1.1 augustss
1363 1.48 augustss for (std = sdone; std; std = stdnext) {
1364 1.53 augustss xfer = std->xfer;
1365 1.48 augustss stdnext = std->dnext;
1366 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1367 1.69 augustss std, xfer, xfer ? xfer->hcpriv : 0));
1368 1.71 augustss if (xfer == NULL) {
1369 1.117 augustss /*
1370 1.117 augustss * xfer == NULL: There seems to be no xfer associated
1371 1.71 augustss * with this TD. It is tailp that happened to end up on
1372 1.71 augustss * the done queue.
1373 1.117 augustss * Shouldn't happen, but some chips are broken(?).
1374 1.71 augustss */
1375 1.71 augustss continue;
1376 1.71 augustss }
1377 1.53 augustss if (xfer->status == USBD_CANCELLED ||
1378 1.53 augustss xfer->status == USBD_TIMEOUT) {
1379 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1380 1.53 augustss xfer));
1381 1.38 augustss /* Handled by abort routine. */
1382 1.83 augustss continue;
1383 1.83 augustss }
1384 1.83 augustss usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1385 1.141 mycroft
1386 1.141 mycroft len = std->len;
1387 1.141 mycroft if (std->td.td_cbp != 0)
1388 1.168 augustss len -= O32TOH(std->td.td_be) -
1389 1.168 augustss O32TOH(std->td.td_cbp) + 1;
1390 1.141 mycroft DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1391 1.141 mycroft std->flags));
1392 1.141 mycroft if (std->flags & OHCI_ADD_LEN)
1393 1.141 mycroft xfer->actlen += len;
1394 1.141 mycroft
1395 1.168 augustss cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1396 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1397 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1398 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1399 1.133 toshii s = splusb();
1400 1.53 augustss usb_transfer_complete(xfer);
1401 1.133 toshii splx(s);
1402 1.21 augustss }
1403 1.48 augustss ohci_free_std(sc, std);
1404 1.1 augustss } else {
1405 1.48 augustss /*
1406 1.48 augustss * Endpoint is halted. First unlink all the TDs
1407 1.48 augustss * belonging to the failed transfer, and then restart
1408 1.48 augustss * the endpoint.
1409 1.48 augustss */
1410 1.1 augustss ohci_soft_td_t *p, *n;
1411 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1412 1.48 augustss
1413 1.71 augustss DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1414 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1415 1.168 augustss ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1416 1.48 augustss
1417 1.48 augustss /* remove TDs */
1418 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1419 1.1 augustss n = p->nexttd;
1420 1.1 augustss ohci_free_std(sc, p);
1421 1.1 augustss }
1422 1.48 augustss
1423 1.16 augustss /* clear halt */
1424 1.168 augustss opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1425 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1426 1.48 augustss
1427 1.1 augustss if (cc == OHCI_CC_STALL)
1428 1.53 augustss xfer->status = USBD_STALLED;
1429 1.1 augustss else
1430 1.53 augustss xfer->status = USBD_IOERROR;
1431 1.133 toshii s = splusb();
1432 1.53 augustss usb_transfer_complete(xfer);
1433 1.133 toshii splx(s);
1434 1.1 augustss }
1435 1.1 augustss }
1436 1.72 augustss
1437 1.83 augustss #ifdef OHCI_DEBUG
1438 1.83 augustss if (ohcidebug > 10) {
1439 1.105 augustss DPRINTF(("ohci_softintr: ITD done:\n"));
1440 1.168 augustss ohci_dump_itds(sc, sidone);
1441 1.83 augustss }
1442 1.83 augustss #endif
1443 1.83 augustss
1444 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1445 1.83 augustss xfer = sitd->xfer;
1446 1.83 augustss sitdnext = sitd->dnext;
1447 1.83 augustss DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1448 1.83 augustss sitd, xfer, xfer ? xfer->hcpriv : 0));
1449 1.83 augustss if (xfer == NULL)
1450 1.83 augustss continue;
1451 1.83 augustss if (xfer->status == USBD_CANCELLED ||
1452 1.83 augustss xfer->status == USBD_TIMEOUT) {
1453 1.83 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1454 1.83 augustss xfer));
1455 1.83 augustss /* Handled by abort routine. */
1456 1.83 augustss continue;
1457 1.83 augustss }
1458 1.83 augustss #ifdef DIAGNOSTIC
1459 1.83 augustss if (sitd->isdone)
1460 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1461 1.83 augustss sitd->isdone = 1;
1462 1.83 augustss #endif
1463 1.134 toshii if (sitd->flags & OHCI_CALL_DONE) {
1464 1.134 toshii ohci_soft_itd_t *next;
1465 1.134 toshii
1466 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1467 1.134 toshii opipe->u.iso.inuse -= xfer->nframes;
1468 1.134 toshii uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1469 1.134 toshii bEndpointAddress);
1470 1.134 toshii xfer->status = USBD_NORMAL_COMPLETION;
1471 1.134 toshii actlen = 0;
1472 1.137 simonb for (i = 0, sitd = xfer->hcpriv;;
1473 1.134 toshii sitd = next) {
1474 1.134 toshii next = sitd->nextitd;
1475 1.168 augustss if (OHCI_ITD_GET_CC(O32TOH(sitd->
1476 1.135 toshii itd.itd_flags)) != OHCI_CC_NO_ERROR)
1477 1.134 toshii xfer->status = USBD_IOERROR;
1478 1.134 toshii /* For input, update frlengths with actual */
1479 1.134 toshii /* XXX anything necessary for output? */
1480 1.134 toshii if (uedir == UE_DIR_IN &&
1481 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION) {
1482 1.168 augustss iframes = OHCI_ITD_GET_FC(O32TOH(
1483 1.135 toshii sitd->itd.itd_flags));
1484 1.134 toshii for (j = 0; j < iframes; i++, j++) {
1485 1.168 augustss len = O16TOH(sitd->
1486 1.134 toshii itd.itd_offset[j]);
1487 1.158 toshii if ((OHCI_ITD_PSW_GET_CC(len) &
1488 1.158 toshii OHCI_CC_NOT_ACCESSED_MASK)
1489 1.158 toshii == OHCI_CC_NOT_ACCESSED)
1490 1.158 toshii len = 0;
1491 1.158 toshii else
1492 1.158 toshii len = OHCI_ITD_PSW_LENGTH(len);
1493 1.134 toshii xfer->frlengths[i] = len;
1494 1.134 toshii actlen += len;
1495 1.134 toshii }
1496 1.134 toshii }
1497 1.134 toshii if (sitd->flags & OHCI_CALL_DONE)
1498 1.134 toshii break;
1499 1.134 toshii ohci_free_sitd(sc, sitd);
1500 1.83 augustss }
1501 1.134 toshii ohci_free_sitd(sc, sitd);
1502 1.134 toshii if (uedir == UE_DIR_IN &&
1503 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION)
1504 1.134 toshii xfer->actlen = actlen;
1505 1.151 mycroft xfer->hcpriv = NULL;
1506 1.134 toshii
1507 1.134 toshii s = splusb();
1508 1.83 augustss usb_transfer_complete(xfer);
1509 1.134 toshii splx(s);
1510 1.83 augustss }
1511 1.83 augustss }
1512 1.83 augustss
1513 1.131 augustss #ifdef USB_USE_SOFTINTR
1514 1.119 augustss if (sc->sc_softwake) {
1515 1.119 augustss sc->sc_softwake = 0;
1516 1.119 augustss wakeup(&sc->sc_softwake);
1517 1.119 augustss }
1518 1.131 augustss #endif /* USB_USE_SOFTINTR */
1519 1.119 augustss
1520 1.72 augustss sc->sc_bus.intr_context--;
1521 1.105 augustss DPRINTFN(10,("ohci_softintr: done:\n"));
1522 1.1 augustss }
1523 1.1 augustss
1524 1.1 augustss void
1525 1.179 christos ohci_device_ctrl_done(usbd_xfer_handle xfer)
1526 1.1 augustss {
1527 1.179.2.1.2.1 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1528 1.179.2.1.2.1 skrll int len = UGETW(xfer->request.wLength);
1529 1.179.2.1.2.1 skrll int isread = (xfer->request.bmRequestType & UT_READ);
1530 1.179.2.1.2.1 skrll
1531 1.140 gson DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1532 1.1 augustss
1533 1.38 augustss #ifdef DIAGNOSTIC
1534 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1535 1.140 gson panic("ohci_device_ctrl_done: not a request");
1536 1.1 augustss }
1537 1.38 augustss #endif
1538 1.179.2.1.2.1 skrll if (len)
1539 1.179.2.1.2.1 skrll usb_syncmem(&xfer->dmabuf, 0, len,
1540 1.179.2.1.2.1 skrll isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1541 1.179.2.1.2.1 skrll usb_syncmem(&opipe->u.ctl.reqdma, 0,
1542 1.179.2.1.2.1 skrll sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1543 1.1 augustss }
1544 1.1 augustss
1545 1.1 augustss void
1546 1.91 augustss ohci_device_intr_done(usbd_xfer_handle xfer)
1547 1.1 augustss {
1548 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1549 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1550 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1551 1.48 augustss ohci_soft_td_t *data, *tail;
1552 1.179.2.1.2.1 skrll int isread =
1553 1.179.2.1.2.1 skrll (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1554 1.1 augustss
1555 1.1 augustss
1556 1.140 gson DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1557 1.53 augustss xfer, xfer->actlen));
1558 1.1 augustss
1559 1.179.2.1.2.1 skrll usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1560 1.179.2.1.2.1 skrll isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1561 1.53 augustss if (xfer->pipe->repeat) {
1562 1.60 augustss data = opipe->tail.td;
1563 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1564 1.53 augustss if (tail == NULL) {
1565 1.53 augustss xfer->status = USBD_NOMEM;
1566 1.1 augustss return;
1567 1.1 augustss }
1568 1.55 augustss tail->xfer = NULL;
1569 1.120 augustss
1570 1.168 augustss data->td.td_flags = HTOO32(
1571 1.120 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1572 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1573 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1574 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
1575 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1576 1.48 augustss data->nexttd = tail;
1577 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
1578 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1579 1.76 tsutsui xfer->length - 1);
1580 1.53 augustss data->len = xfer->length;
1581 1.53 augustss data->xfer = xfer;
1582 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1583 1.179.2.1.2.1 skrll usb_syncmem(&data->dma, data->offs, sizeof(data->td),
1584 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1585 1.53 augustss xfer->hcpriv = data;
1586 1.53 augustss xfer->actlen = 0;
1587 1.1 augustss
1588 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1589 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma,
1590 1.179.2.1.2.1 skrll sed->offs + offsetof(ohci_ed_t, ed_tailp),
1591 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_tailp),
1592 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1593 1.60 augustss opipe->tail.td = tail;
1594 1.1 augustss }
1595 1.1 augustss }
1596 1.1 augustss
1597 1.1 augustss void
1598 1.179 christos ohci_device_bulk_done(usbd_xfer_handle xfer)
1599 1.3 augustss {
1600 1.179.2.1.2.1 skrll int isread =
1601 1.179.2.1.2.1 skrll (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1602 1.179.2.1.2.1 skrll
1603 1.140 gson DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1604 1.53 augustss xfer, xfer->actlen));
1605 1.179.2.1.2.1 skrll usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1606 1.179.2.1.2.1 skrll isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1607 1.3 augustss }
1608 1.3 augustss
1609 1.3 augustss void
1610 1.91 augustss ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1611 1.1 augustss {
1612 1.1 augustss usbd_pipe_handle pipe;
1613 1.1 augustss u_char *p;
1614 1.1 augustss int i, m;
1615 1.1 augustss int hstatus;
1616 1.1 augustss
1617 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1618 1.120 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1619 1.53 augustss sc, xfer, hstatus));
1620 1.1 augustss
1621 1.53 augustss if (xfer == NULL) {
1622 1.1 augustss /* Just ignore the change. */
1623 1.1 augustss return;
1624 1.1 augustss }
1625 1.1 augustss
1626 1.53 augustss pipe = xfer->pipe;
1627 1.1 augustss
1628 1.123 augustss p = KERNADDR(&xfer->dmabuf, 0);
1629 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1630 1.53 augustss memset(p, 0, xfer->length);
1631 1.1 augustss for (i = 1; i <= m; i++) {
1632 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1633 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1634 1.1 augustss p[i/8] |= 1 << (i%8);
1635 1.1 augustss }
1636 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1637 1.53 augustss xfer->actlen = xfer->length;
1638 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1639 1.1 augustss
1640 1.53 augustss usb_transfer_complete(xfer);
1641 1.38 augustss }
1642 1.38 augustss
1643 1.38 augustss void
1644 1.179 christos ohci_root_intr_done(usbd_xfer_handle xfer)
1645 1.65 augustss {
1646 1.65 augustss }
1647 1.65 augustss
1648 1.65 augustss void
1649 1.179 christos ohci_root_ctrl_done(usbd_xfer_handle xfer)
1650 1.38 augustss {
1651 1.1 augustss }
1652 1.1 augustss
1653 1.1 augustss /*
1654 1.1 augustss * Wait here until controller claims to have an interrupt.
1655 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1656 1.1 augustss * too long.
1657 1.1 augustss */
1658 1.1 augustss void
1659 1.91 augustss ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1660 1.1 augustss {
1661 1.163 augustss int timo;
1662 1.1 augustss u_int32_t intrs;
1663 1.1 augustss
1664 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1665 1.163 augustss for (timo = xfer->timeout; timo >= 0; timo--) {
1666 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1667 1.116 augustss if (sc->sc_dying)
1668 1.116 augustss break;
1669 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1670 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1671 1.52 augustss #ifdef OHCI_DEBUG
1672 1.1 augustss if (ohcidebug > 15)
1673 1.1 augustss ohci_dumpregs(sc);
1674 1.1 augustss #endif
1675 1.1 augustss if (intrs) {
1676 1.53 augustss ohci_intr1(sc);
1677 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1678 1.1 augustss return;
1679 1.1 augustss }
1680 1.1 augustss }
1681 1.15 augustss
1682 1.15 augustss /* Timeout */
1683 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1684 1.53 augustss xfer->status = USBD_TIMEOUT;
1685 1.53 augustss usb_transfer_complete(xfer);
1686 1.15 augustss /* XXX should free TD */
1687 1.5 augustss }
1688 1.5 augustss
1689 1.5 augustss void
1690 1.91 augustss ohci_poll(struct usbd_bus *bus)
1691 1.5 augustss {
1692 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1693 1.105 augustss #ifdef OHCI_DEBUG
1694 1.105 augustss static int last;
1695 1.105 augustss int new;
1696 1.105 augustss new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1697 1.105 augustss if (new != last) {
1698 1.105 augustss DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1699 1.105 augustss last = new;
1700 1.105 augustss }
1701 1.105 augustss #endif
1702 1.5 augustss
1703 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1704 1.53 augustss ohci_intr1(sc);
1705 1.1 augustss }
1706 1.1 augustss
1707 1.1 augustss usbd_status
1708 1.91 augustss ohci_device_request(usbd_xfer_handle xfer)
1709 1.1 augustss {
1710 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1711 1.53 augustss usb_device_request_t *req = &xfer->request;
1712 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1713 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1714 1.1 augustss int addr = dev->address;
1715 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1716 1.1 augustss ohci_soft_ed_t *sed;
1717 1.1 augustss int isread;
1718 1.1 augustss int len;
1719 1.53 augustss usbd_status err;
1720 1.1 augustss int s;
1721 1.1 augustss
1722 1.1 augustss isread = req->bmRequestType & UT_READ;
1723 1.1 augustss len = UGETW(req->wLength);
1724 1.1 augustss
1725 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1726 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1727 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1728 1.120 augustss UGETW(req->wIndex), len, addr,
1729 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1730 1.1 augustss
1731 1.60 augustss setup = opipe->tail.td;
1732 1.1 augustss stat = ohci_alloc_std(sc);
1733 1.53 augustss if (stat == NULL) {
1734 1.53 augustss err = USBD_NOMEM;
1735 1.1 augustss goto bad1;
1736 1.1 augustss }
1737 1.1 augustss tail = ohci_alloc_std(sc);
1738 1.53 augustss if (tail == NULL) {
1739 1.53 augustss err = USBD_NOMEM;
1740 1.1 augustss goto bad2;
1741 1.1 augustss }
1742 1.55 augustss tail->xfer = NULL;
1743 1.1 augustss
1744 1.1 augustss sed = opipe->sed;
1745 1.1 augustss opipe->u.ctl.length = len;
1746 1.1 augustss
1747 1.148 mycroft /* Update device address and length since they may have changed
1748 1.148 mycroft during the setup of the control pipe in usbd_new_device(). */
1749 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1750 1.77 augustss /* XXXX Should not touch ED here! */
1751 1.179.2.1.2.1 skrll
1752 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1753 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
1754 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1755 1.168 augustss sed->ed.ed_flags = HTOO32(
1756 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1757 1.16 augustss OHCI_ED_SET_FA(addr) |
1758 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1759 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1760 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
1761 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1762 1.1 augustss
1763 1.77 augustss next = stat;
1764 1.77 augustss
1765 1.1 augustss /* Set up data transaction */
1766 1.1 augustss if (len != 0) {
1767 1.77 augustss ohci_soft_td_t *std = stat;
1768 1.77 augustss
1769 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1770 1.77 augustss std, &stat);
1771 1.77 augustss stat = stat->nexttd; /* point at free TD */
1772 1.77 augustss if (err)
1773 1.1 augustss goto bad3;
1774 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1775 1.168 augustss std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1776 1.168 augustss std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1777 1.179.2.1.2.1 skrll usb_syncmem(&std->dma,
1778 1.179.2.1.2.1 skrll std->offs + offsetof(ohci_td_t, td_flags),
1779 1.179.2.1.2.1 skrll sizeof(std->td.td_flags),
1780 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1781 1.34 augustss }
1782 1.1 augustss
1783 1.123 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1784 1.179.2.1.2.1 skrll usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
1785 1.1 augustss
1786 1.168 augustss setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1787 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1788 1.168 augustss setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1789 1.1 augustss setup->nexttd = next;
1790 1.168 augustss setup->td.td_nexttd = HTOO32(next->physaddr);
1791 1.168 augustss setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1792 1.77 augustss setup->len = 0;
1793 1.53 augustss setup->xfer = xfer;
1794 1.34 augustss setup->flags = 0;
1795 1.53 augustss xfer->hcpriv = setup;
1796 1.179.2.1.2.1 skrll usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
1797 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1798 1.1 augustss
1799 1.168 augustss stat->td.td_flags = HTOO32(
1800 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1801 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1802 1.39 augustss stat->td.td_cbp = 0;
1803 1.1 augustss stat->nexttd = tail;
1804 1.168 augustss stat->td.td_nexttd = HTOO32(tail->physaddr);
1805 1.39 augustss stat->td.td_be = 0;
1806 1.77 augustss stat->flags = OHCI_CALL_DONE;
1807 1.1 augustss stat->len = 0;
1808 1.53 augustss stat->xfer = xfer;
1809 1.179.2.1.2.1 skrll usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
1810 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1811 1.1 augustss
1812 1.52 augustss #ifdef OHCI_DEBUG
1813 1.1 augustss if (ohcidebug > 5) {
1814 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1815 1.168 augustss ohci_dump_ed(sc, sed);
1816 1.168 augustss ohci_dump_tds(sc, setup);
1817 1.1 augustss }
1818 1.1 augustss #endif
1819 1.1 augustss
1820 1.1 augustss /* Insert ED in schedule */
1821 1.1 augustss s = splusb();
1822 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1823 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma,
1824 1.179.2.1.2.1 skrll sed->offs + offsetof(ohci_ed_t, ed_tailp),
1825 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_tailp),
1826 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1827 1.60 augustss opipe->tail.td = tail;
1828 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1829 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1830 1.139 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1831 1.80 augustss ohci_timeout, xfer);
1832 1.15 augustss }
1833 1.1 augustss splx(s);
1834 1.1 augustss
1835 1.115 itojun #ifdef OHCI_DEBUG
1836 1.113 augustss if (ohcidebug > 20) {
1837 1.77 augustss delay(10000);
1838 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1839 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1840 1.113 augustss ohci_dumpregs(sc);
1841 1.113 augustss printf("ctrl head:\n");
1842 1.168 augustss ohci_dump_ed(sc, sc->sc_ctrl_head);
1843 1.113 augustss printf("sed:\n");
1844 1.168 augustss ohci_dump_ed(sc, sed);
1845 1.168 augustss ohci_dump_tds(sc, setup);
1846 1.1 augustss }
1847 1.1 augustss #endif
1848 1.1 augustss
1849 1.1 augustss return (USBD_NORMAL_COMPLETION);
1850 1.1 augustss
1851 1.1 augustss bad3:
1852 1.1 augustss ohci_free_std(sc, tail);
1853 1.1 augustss bad2:
1854 1.1 augustss ohci_free_std(sc, stat);
1855 1.1 augustss bad1:
1856 1.53 augustss return (err);
1857 1.1 augustss }
1858 1.1 augustss
1859 1.1 augustss /*
1860 1.1 augustss * Add an ED to the schedule. Called at splusb().
1861 1.1 augustss */
1862 1.1 augustss void
1863 1.168 augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1864 1.1 augustss {
1865 1.113 augustss DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1866 1.113 augustss
1867 1.46 augustss SPLUSBCHECK;
1868 1.179.2.1.2.1 skrll usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1869 1.179.2.1.2.1 skrll sizeof(head->ed.ed_nexted),
1870 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1871 1.1 augustss sed->next = head->next;
1872 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1873 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1874 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_nexted),
1875 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1876 1.1 augustss head->next = sed;
1877 1.168 augustss head->ed.ed_nexted = HTOO32(sed->physaddr);
1878 1.179.2.1.2.1 skrll usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1879 1.179.2.1.2.1 skrll sizeof(head->ed.ed_nexted),
1880 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1881 1.1 augustss }
1882 1.1 augustss
1883 1.1 augustss /*
1884 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1885 1.3 augustss */
1886 1.3 augustss void
1887 1.91 augustss ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1888 1.3 augustss {
1889 1.120 augustss ohci_soft_ed_t *p;
1890 1.3 augustss
1891 1.46 augustss SPLUSBCHECK;
1892 1.46 augustss
1893 1.3 augustss /* XXX */
1894 1.133 toshii for (p = head; p != NULL && p->next != sed; p = p->next)
1895 1.3 augustss ;
1896 1.55 augustss if (p == NULL)
1897 1.128 provos panic("ohci_rem_ed: ED not found");
1898 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1899 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_nexted),
1900 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1901 1.3 augustss p->next = sed->next;
1902 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1903 1.179.2.1.2.1 skrll usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1904 1.179.2.1.2.1 skrll sizeof(p->ed.ed_nexted),
1905 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1906 1.3 augustss }
1907 1.3 augustss
1908 1.3 augustss /*
1909 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1910 1.1 augustss * the host controller. This queue is the processed by software.
1911 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1912 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1913 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1914 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1915 1.1 augustss * hash value.
1916 1.1 augustss */
1917 1.1 augustss
1918 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1919 1.1 augustss /* Called at splusb() */
1920 1.1 augustss void
1921 1.91 augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1922 1.1 augustss {
1923 1.1 augustss int h = HASH(std->physaddr);
1924 1.1 augustss
1925 1.46 augustss SPLUSBCHECK;
1926 1.46 augustss
1927 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1928 1.1 augustss }
1929 1.1 augustss
1930 1.1 augustss /* Called at splusb() */
1931 1.1 augustss void
1932 1.179 christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1933 1.1 augustss {
1934 1.46 augustss SPLUSBCHECK;
1935 1.46 augustss
1936 1.1 augustss LIST_REMOVE(std, hnext);
1937 1.1 augustss }
1938 1.1 augustss
1939 1.1 augustss ohci_soft_td_t *
1940 1.91 augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1941 1.1 augustss {
1942 1.1 augustss int h = HASH(a);
1943 1.1 augustss ohci_soft_td_t *std;
1944 1.1 augustss
1945 1.120 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1946 1.53 augustss std != NULL;
1947 1.1 augustss std = LIST_NEXT(std, hnext))
1948 1.1 augustss if (std->physaddr == a)
1949 1.1 augustss return (std);
1950 1.83 augustss return (NULL);
1951 1.83 augustss }
1952 1.83 augustss
1953 1.83 augustss /* Called at splusb() */
1954 1.83 augustss void
1955 1.91 augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1956 1.83 augustss {
1957 1.83 augustss int h = HASH(sitd->physaddr);
1958 1.83 augustss
1959 1.83 augustss SPLUSBCHECK;
1960 1.83 augustss
1961 1.120 augustss DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1962 1.83 augustss sitd, (u_long)sitd->physaddr));
1963 1.83 augustss
1964 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1965 1.83 augustss }
1966 1.83 augustss
1967 1.83 augustss /* Called at splusb() */
1968 1.83 augustss void
1969 1.179 christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1970 1.83 augustss {
1971 1.83 augustss SPLUSBCHECK;
1972 1.83 augustss
1973 1.120 augustss DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1974 1.83 augustss sitd, (u_long)sitd->physaddr));
1975 1.83 augustss
1976 1.83 augustss LIST_REMOVE(sitd, hnext);
1977 1.83 augustss }
1978 1.83 augustss
1979 1.83 augustss ohci_soft_itd_t *
1980 1.91 augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1981 1.83 augustss {
1982 1.83 augustss int h = HASH(a);
1983 1.83 augustss ohci_soft_itd_t *sitd;
1984 1.83 augustss
1985 1.120 augustss for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1986 1.83 augustss sitd != NULL;
1987 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1988 1.83 augustss if (sitd->physaddr == a)
1989 1.83 augustss return (sitd);
1990 1.83 augustss return (NULL);
1991 1.1 augustss }
1992 1.1 augustss
1993 1.1 augustss void
1994 1.91 augustss ohci_timeout(void *addr)
1995 1.1 augustss {
1996 1.114 augustss struct ohci_xfer *oxfer = addr;
1997 1.116 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1998 1.116 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1999 1.114 augustss
2000 1.114 augustss DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
2001 1.114 augustss
2002 1.116 augustss if (sc->sc_dying) {
2003 1.116 augustss ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
2004 1.116 augustss return;
2005 1.116 augustss }
2006 1.116 augustss
2007 1.114 augustss /* Execute the abort in a process context. */
2008 1.114 augustss usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
2009 1.178 joerg usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
2010 1.178 joerg USB_TASKQ_HC);
2011 1.114 augustss }
2012 1.114 augustss
2013 1.114 augustss void
2014 1.114 augustss ohci_timeout_task(void *addr)
2015 1.114 augustss {
2016 1.53 augustss usbd_xfer_handle xfer = addr;
2017 1.48 augustss int s;
2018 1.1 augustss
2019 1.114 augustss DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
2020 1.45 augustss
2021 1.48 augustss s = splusb();
2022 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
2023 1.48 augustss splx(s);
2024 1.1 augustss }
2025 1.1 augustss
2026 1.52 augustss #ifdef OHCI_DEBUG
2027 1.1 augustss void
2028 1.168 augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
2029 1.1 augustss {
2030 1.1 augustss for (; std; std = std->nexttd)
2031 1.168 augustss ohci_dump_td(sc, std);
2032 1.1 augustss }
2033 1.1 augustss
2034 1.1 augustss void
2035 1.168 augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
2036 1.1 augustss {
2037 1.92 tv char sbuf[128];
2038 1.92 tv
2039 1.168 augustss bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags),
2040 1.92 tv "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
2041 1.92 tv sbuf, sizeof(sbuf));
2042 1.92 tv
2043 1.179.2.1.2.1 skrll usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2044 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2045 1.107 augustss printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2046 1.120 augustss "nexttd=0x%08lx be=0x%08lx\n",
2047 1.107 augustss std, (u_long)std->physaddr, sbuf,
2048 1.168 augustss OHCI_TD_GET_DI(O32TOH(std->td.td_flags)),
2049 1.168 augustss OHCI_TD_GET_EC(O32TOH(std->td.td_flags)),
2050 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
2051 1.168 augustss (u_long)O32TOH(std->td.td_cbp),
2052 1.168 augustss (u_long)O32TOH(std->td.td_nexttd),
2053 1.168 augustss (u_long)O32TOH(std->td.td_be));
2054 1.1 augustss }
2055 1.1 augustss
2056 1.1 augustss void
2057 1.168 augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2058 1.83 augustss {
2059 1.83 augustss int i;
2060 1.83 augustss
2061 1.179.2.1.2.1 skrll usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
2062 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2063 1.107 augustss printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2064 1.120 augustss "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2065 1.107 augustss sitd, (u_long)sitd->physaddr,
2066 1.168 augustss OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
2067 1.168 augustss OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
2068 1.168 augustss OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
2069 1.168 augustss OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
2070 1.168 augustss (u_long)O32TOH(sitd->itd.itd_bp0),
2071 1.168 augustss (u_long)O32TOH(sitd->itd.itd_nextitd),
2072 1.168 augustss (u_long)O32TOH(sitd->itd.itd_be));
2073 1.83 augustss for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2074 1.107 augustss printf("offs[%d]=0x%04x ", i,
2075 1.168 augustss (u_int)O16TOH(sitd->itd.itd_offset[i]));
2076 1.107 augustss printf("\n");
2077 1.83 augustss }
2078 1.83 augustss
2079 1.83 augustss void
2080 1.168 augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2081 1.83 augustss {
2082 1.83 augustss for (; sitd; sitd = sitd->nextitd)
2083 1.168 augustss ohci_dump_itd(sc, sitd);
2084 1.83 augustss }
2085 1.83 augustss
2086 1.83 augustss void
2087 1.168 augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2088 1.1 augustss {
2089 1.92 tv char sbuf[128], sbuf2[128];
2090 1.92 tv
2091 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2092 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2093 1.168 augustss bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags),
2094 1.92 tv "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2095 1.92 tv sbuf, sizeof(sbuf));
2096 1.168 augustss bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp),
2097 1.92 tv "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2098 1.92 tv
2099 1.107 augustss printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2100 1.92 tv "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2101 1.120 augustss sed, (u_long)sed->physaddr,
2102 1.168 augustss OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
2103 1.168 augustss OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
2104 1.168 augustss OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
2105 1.168 augustss (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
2106 1.168 augustss (u_long)O32TOH(sed->ed.ed_headp),
2107 1.168 augustss (u_long)O32TOH(sed->ed.ed_nexted));
2108 1.1 augustss }
2109 1.1 augustss #endif
2110 1.1 augustss
2111 1.1 augustss usbd_status
2112 1.91 augustss ohci_open(usbd_pipe_handle pipe)
2113 1.1 augustss {
2114 1.1 augustss usbd_device_handle dev = pipe->device;
2115 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2116 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2117 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2118 1.1 augustss u_int8_t addr = dev->address;
2119 1.60 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2120 1.1 augustss ohci_soft_ed_t *sed;
2121 1.1 augustss ohci_soft_td_t *std;
2122 1.60 augustss ohci_soft_itd_t *sitd;
2123 1.60 augustss ohci_physaddr_t tdphys;
2124 1.60 augustss u_int32_t fmt;
2125 1.53 augustss usbd_status err;
2126 1.1 augustss int s;
2127 1.64 augustss int ival;
2128 1.1 augustss
2129 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2130 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2131 1.81 augustss
2132 1.116 augustss if (sc->sc_dying)
2133 1.116 augustss return (USBD_IOERROR);
2134 1.116 augustss
2135 1.90 thorpej std = NULL;
2136 1.90 thorpej sed = NULL;
2137 1.90 thorpej
2138 1.1 augustss if (addr == sc->sc_addr) {
2139 1.1 augustss switch (ed->bEndpointAddress) {
2140 1.1 augustss case USB_CONTROL_ENDPOINT:
2141 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
2142 1.1 augustss break;
2143 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
2144 1.1 augustss pipe->methods = &ohci_root_intr_methods;
2145 1.1 augustss break;
2146 1.1 augustss default:
2147 1.1 augustss return (USBD_INVAL);
2148 1.1 augustss }
2149 1.1 augustss } else {
2150 1.1 augustss sed = ohci_alloc_sed(sc);
2151 1.53 augustss if (sed == NULL)
2152 1.1 augustss goto bad0;
2153 1.1 augustss opipe->sed = sed;
2154 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
2155 1.60 augustss sitd = ohci_alloc_sitd(sc);
2156 1.127 augustss if (sitd == NULL)
2157 1.60 augustss goto bad1;
2158 1.60 augustss opipe->tail.itd = sitd;
2159 1.76 tsutsui tdphys = sitd->physaddr;
2160 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
2161 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2162 1.83 augustss fmt |= OHCI_ED_DIR_IN;
2163 1.83 augustss else
2164 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
2165 1.60 augustss } else {
2166 1.60 augustss std = ohci_alloc_std(sc);
2167 1.127 augustss if (std == NULL)
2168 1.60 augustss goto bad1;
2169 1.60 augustss opipe->tail.td = std;
2170 1.76 tsutsui tdphys = std->physaddr;
2171 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2172 1.60 augustss }
2173 1.168 augustss sed->ed.ed_flags = HTOO32(
2174 1.120 augustss OHCI_ED_SET_FA(addr) |
2175 1.147 mycroft OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2176 1.109 augustss (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2177 1.109 augustss fmt |
2178 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2179 1.168 augustss sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys);
2180 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2181 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2182 1.1 augustss
2183 1.60 augustss switch (xfertype) {
2184 1.1 augustss case UE_CONTROL:
2185 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
2186 1.120 augustss err = usb_allocmem(&sc->sc_bus,
2187 1.120 augustss sizeof(usb_device_request_t),
2188 1.53 augustss 0, &opipe->u.ctl.reqdma);
2189 1.53 augustss if (err)
2190 1.1 augustss goto bad;
2191 1.1 augustss s = splusb();
2192 1.168 augustss ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2193 1.1 augustss splx(s);
2194 1.1 augustss break;
2195 1.1 augustss case UE_INTERRUPT:
2196 1.1 augustss pipe->methods = &ohci_device_intr_methods;
2197 1.64 augustss ival = pipe->interval;
2198 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
2199 1.64 augustss ival = ed->bInterval;
2200 1.64 augustss return (ohci_device_setintr(sc, opipe, ival));
2201 1.1 augustss case UE_ISOCHRONOUS:
2202 1.60 augustss pipe->methods = &ohci_device_isoc_methods;
2203 1.60 augustss return (ohci_setup_isoc(pipe));
2204 1.1 augustss case UE_BULK:
2205 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
2206 1.3 augustss s = splusb();
2207 1.168 augustss ohci_add_ed(sc, sed, sc->sc_bulk_head);
2208 1.3 augustss splx(s);
2209 1.3 augustss break;
2210 1.1 augustss }
2211 1.1 augustss }
2212 1.1 augustss return (USBD_NORMAL_COMPLETION);
2213 1.1 augustss
2214 1.1 augustss bad:
2215 1.90 thorpej if (std != NULL)
2216 1.90 thorpej ohci_free_std(sc, std);
2217 1.1 augustss bad1:
2218 1.90 thorpej if (sed != NULL)
2219 1.90 thorpej ohci_free_sed(sc, sed);
2220 1.1 augustss bad0:
2221 1.1 augustss return (USBD_NOMEM);
2222 1.120 augustss
2223 1.1 augustss }
2224 1.1 augustss
2225 1.1 augustss /*
2226 1.34 augustss * Close a reqular pipe.
2227 1.34 augustss * Assumes that there are no pending transactions.
2228 1.34 augustss */
2229 1.34 augustss void
2230 1.91 augustss ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2231 1.34 augustss {
2232 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2233 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2234 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
2235 1.34 augustss int s;
2236 1.34 augustss
2237 1.34 augustss s = splusb();
2238 1.34 augustss #ifdef DIAGNOSTIC
2239 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2240 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2241 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2242 1.34 augustss ohci_soft_td_t *std;
2243 1.168 augustss std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2244 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2245 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
2246 1.168 augustss (int)O32TOH(sed->ed.ed_headp),
2247 1.168 augustss (int)O32TOH(sed->ed.ed_tailp),
2248 1.34 augustss pipe, std);
2249 1.107 augustss #ifdef USB_DEBUG
2250 1.107 augustss usbd_dump_pipe(&opipe->pipe);
2251 1.107 augustss #endif
2252 1.106 augustss #ifdef OHCI_DEBUG
2253 1.168 augustss ohci_dump_ed(sc, sed);
2254 1.106 augustss if (std)
2255 1.168 augustss ohci_dump_td(sc, std);
2256 1.106 augustss #endif
2257 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
2258 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2259 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2260 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
2261 1.34 augustss }
2262 1.34 augustss #endif
2263 1.34 augustss ohci_rem_ed(sed, head);
2264 1.133 toshii /* Make sure the host controller is not touching this ED */
2265 1.133 toshii usb_delay_ms(&sc->sc_bus, 1);
2266 1.34 augustss splx(s);
2267 1.34 augustss ohci_free_sed(sc, opipe->sed);
2268 1.34 augustss }
2269 1.34 augustss
2270 1.120 augustss /*
2271 1.34 augustss * Abort a device request.
2272 1.34 augustss * If this routine is called at splusb() it guarantees that the request
2273 1.34 augustss * will be removed from the hardware scheduling and that the callback
2274 1.34 augustss * for it will be called with USBD_CANCELLED status.
2275 1.34 augustss * It's impossible to guarantee that the requested transfer will not
2276 1.34 augustss * have happened since the hardware runs concurrently.
2277 1.34 augustss * If the transaction has already happened we rely on the ordinary
2278 1.34 augustss * interrupt processing to process it.
2279 1.34 augustss */
2280 1.34 augustss void
2281 1.91 augustss ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2282 1.34 augustss {
2283 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2284 1.106 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2285 1.106 augustss ohci_soft_ed_t *sed = opipe->sed;
2286 1.106 augustss ohci_soft_td_t *p, *n;
2287 1.106 augustss ohci_physaddr_t headp;
2288 1.106 augustss int s, hit;
2289 1.159 augustss int wake;
2290 1.34 augustss
2291 1.106 augustss DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2292 1.34 augustss
2293 1.116 augustss if (sc->sc_dying) {
2294 1.116 augustss /* If we're dying, just do the software part. */
2295 1.116 augustss s = splusb();
2296 1.116 augustss xfer->status = status; /* make software ignore it */
2297 1.121 tsutsui usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2298 1.116 augustss usb_transfer_complete(xfer);
2299 1.116 augustss splx(s);
2300 1.170 christos return;
2301 1.116 augustss }
2302 1.116 augustss
2303 1.106 augustss if (xfer->device->bus->intr_context || !curproc)
2304 1.128 provos panic("ohci_abort_xfer: not in process context");
2305 1.34 augustss
2306 1.106 augustss /*
2307 1.159 augustss * If an abort is already in progress then just wait for it to
2308 1.159 augustss * complete and return.
2309 1.159 augustss */
2310 1.159 augustss if (xfer->hcflags & UXFER_ABORTING) {
2311 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2312 1.159 augustss #ifdef DIAGNOSTIC
2313 1.159 augustss if (status == USBD_TIMEOUT)
2314 1.159 augustss printf("0hci_abort_xfer: TIMEOUT while aborting\n");
2315 1.159 augustss #endif
2316 1.159 augustss /* Override the status which might be USBD_TIMEOUT. */
2317 1.159 augustss xfer->status = status;
2318 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2319 1.159 augustss xfer->hcflags |= UXFER_ABORTWAIT;
2320 1.159 augustss while (xfer->hcflags & UXFER_ABORTING)
2321 1.159 augustss tsleep(&xfer->hcflags, PZERO, "ohciaw", 0);
2322 1.159 augustss return;
2323 1.159 augustss }
2324 1.159 augustss xfer->hcflags |= UXFER_ABORTING;
2325 1.159 augustss
2326 1.159 augustss /*
2327 1.106 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2328 1.106 augustss */
2329 1.106 augustss s = splusb();
2330 1.106 augustss xfer->status = status; /* make software ignore it */
2331 1.81 augustss usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2332 1.106 augustss splx(s);
2333 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2334 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2335 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
2336 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2337 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2338 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2339 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
2340 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2341 1.34 augustss
2342 1.120 augustss /*
2343 1.106 augustss * Step 2: Wait until we know hardware has finished any possible
2344 1.106 augustss * use of the xfer. Also make sure the soft interrupt routine
2345 1.106 augustss * has run.
2346 1.106 augustss */
2347 1.119 augustss usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2348 1.119 augustss s = splusb();
2349 1.131 augustss #ifdef USB_USE_SOFTINTR
2350 1.119 augustss sc->sc_softwake = 1;
2351 1.131 augustss #endif /* USB_USE_SOFTINTR */
2352 1.119 augustss usb_schedsoftintr(&sc->sc_bus);
2353 1.131 augustss #ifdef USB_USE_SOFTINTR
2354 1.119 augustss tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2355 1.131 augustss #endif /* USB_USE_SOFTINTR */
2356 1.119 augustss splx(s);
2357 1.119 augustss
2358 1.120 augustss /*
2359 1.106 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2360 1.106 augustss * The complication here is that the hardware may have executed
2361 1.106 augustss * beyond the xfer we're trying to abort. So as we're scanning
2362 1.106 augustss * the TDs of this xfer we check if the hardware points to
2363 1.106 augustss * any of them.
2364 1.106 augustss */
2365 1.106 augustss s = splusb(); /* XXX why? */
2366 1.53 augustss p = xfer->hcpriv;
2367 1.34 augustss #ifdef DIAGNOSTIC
2368 1.55 augustss if (p == NULL) {
2369 1.159 augustss xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2370 1.102 augustss splx(s);
2371 1.106 augustss printf("ohci_abort_xfer: hcpriv is NULL\n");
2372 1.38 augustss return;
2373 1.38 augustss }
2374 1.34 augustss #endif
2375 1.106 augustss #ifdef OHCI_DEBUG
2376 1.106 augustss if (ohcidebug > 1) {
2377 1.106 augustss DPRINTF(("ohci_abort_xfer: sed=\n"));
2378 1.168 augustss ohci_dump_ed(sc, sed);
2379 1.168 augustss ohci_dump_tds(sc, p);
2380 1.106 augustss }
2381 1.106 augustss #endif
2382 1.168 augustss headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2383 1.106 augustss hit = 0;
2384 1.53 augustss for (; p->xfer == xfer; p = n) {
2385 1.106 augustss hit |= headp == p->physaddr;
2386 1.38 augustss n = p->nexttd;
2387 1.38 augustss ohci_free_std(sc, p);
2388 1.34 augustss }
2389 1.106 augustss /* Zap headp register if hardware pointed inside the xfer. */
2390 1.106 augustss if (hit) {
2391 1.150 mycroft DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2392 1.168 augustss (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2393 1.168 augustss sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2394 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma,
2395 1.179.2.1.2.1 skrll sed->offs + offsetof(ohci_ed_t, ed_headp),
2396 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_headp),
2397 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2398 1.106 augustss } else {
2399 1.106 augustss DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2400 1.106 augustss }
2401 1.34 augustss
2402 1.106 augustss /*
2403 1.106 augustss * Step 4: Turn on hardware again.
2404 1.106 augustss */
2405 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2406 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
2407 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2408 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2409 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2410 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
2411 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2412 1.38 augustss
2413 1.106 augustss /*
2414 1.106 augustss * Step 5: Execute callback.
2415 1.106 augustss */
2416 1.159 augustss wake = xfer->hcflags & UXFER_ABORTWAIT;
2417 1.159 augustss xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2418 1.53 augustss usb_transfer_complete(xfer);
2419 1.159 augustss if (wake)
2420 1.159 augustss wakeup(&xfer->hcflags);
2421 1.38 augustss
2422 1.34 augustss splx(s);
2423 1.34 augustss }
2424 1.34 augustss
2425 1.34 augustss /*
2426 1.1 augustss * Data structures and routines to emulate the root hub.
2427 1.1 augustss */
2428 1.82 augustss Static usb_device_descriptor_t ohci_devd = {
2429 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2430 1.1 augustss UDESC_DEVICE, /* type */
2431 1.1 augustss {0x00, 0x01}, /* USB version */
2432 1.74 augustss UDCLASS_HUB, /* class */
2433 1.74 augustss UDSUBCLASS_HUB, /* subclass */
2434 1.109 augustss UDPROTO_FSHUB,
2435 1.1 augustss 64, /* max packet */
2436 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2437 1.1 augustss 1,2,0, /* string indicies */
2438 1.1 augustss 1 /* # of configurations */
2439 1.1 augustss };
2440 1.1 augustss
2441 1.82 augustss Static usb_config_descriptor_t ohci_confd = {
2442 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2443 1.1 augustss UDESC_CONFIG,
2444 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2445 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2446 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2447 1.1 augustss 1,
2448 1.1 augustss 1,
2449 1.1 augustss 0,
2450 1.1 augustss UC_SELF_POWERED,
2451 1.1 augustss 0 /* max power */
2452 1.1 augustss };
2453 1.1 augustss
2454 1.82 augustss Static usb_interface_descriptor_t ohci_ifcd = {
2455 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2456 1.1 augustss UDESC_INTERFACE,
2457 1.1 augustss 0,
2458 1.1 augustss 0,
2459 1.1 augustss 1,
2460 1.74 augustss UICLASS_HUB,
2461 1.74 augustss UISUBCLASS_HUB,
2462 1.109 augustss UIPROTO_FSHUB,
2463 1.1 augustss 0
2464 1.1 augustss };
2465 1.1 augustss
2466 1.82 augustss Static usb_endpoint_descriptor_t ohci_endpd = {
2467 1.175 christos .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2468 1.175 christos .bDescriptorType = UDESC_ENDPOINT,
2469 1.175 christos .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2470 1.175 christos .bmAttributes = UE_INTERRUPT,
2471 1.175 christos .wMaxPacketSize = {8, 0}, /* max packet */
2472 1.175 christos .bInterval = 255,
2473 1.1 augustss };
2474 1.1 augustss
2475 1.82 augustss Static usb_hub_descriptor_t ohci_hubd = {
2476 1.175 christos .bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2477 1.175 christos .bDescriptorType = UDESC_HUB,
2478 1.1 augustss };
2479 1.1 augustss
2480 1.82 augustss Static int
2481 1.120 augustss ohci_str(usb_string_descriptor_t *p, int l, const char *s)
2482 1.1 augustss {
2483 1.1 augustss int i;
2484 1.1 augustss
2485 1.1 augustss if (l == 0)
2486 1.1 augustss return (0);
2487 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2488 1.1 augustss if (l == 1)
2489 1.1 augustss return (1);
2490 1.1 augustss p->bDescriptorType = UDESC_STRING;
2491 1.1 augustss l -= 2;
2492 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2493 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2494 1.1 augustss return (2*i+2);
2495 1.1 augustss }
2496 1.1 augustss
2497 1.1 augustss /*
2498 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2499 1.1 augustss */
2500 1.82 augustss Static usbd_status
2501 1.91 augustss ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2502 1.1 augustss {
2503 1.53 augustss usbd_status err;
2504 1.17 augustss
2505 1.46 augustss /* Insert last in queue. */
2506 1.53 augustss err = usb_insert_transfer(xfer);
2507 1.53 augustss if (err)
2508 1.53 augustss return (err);
2509 1.46 augustss
2510 1.46 augustss /* Pipe isn't running, start first */
2511 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2512 1.17 augustss }
2513 1.17 augustss
2514 1.82 augustss Static usbd_status
2515 1.91 augustss ohci_root_ctrl_start(usbd_xfer_handle xfer)
2516 1.17 augustss {
2517 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2518 1.1 augustss usb_device_request_t *req;
2519 1.52 augustss void *buf = NULL;
2520 1.1 augustss int port, i;
2521 1.46 augustss int s, len, value, index, l, totlen = 0;
2522 1.1 augustss usb_port_status_t ps;
2523 1.1 augustss usb_hub_descriptor_t hubd;
2524 1.53 augustss usbd_status err;
2525 1.1 augustss u_int32_t v;
2526 1.1 augustss
2527 1.83 augustss if (sc->sc_dying)
2528 1.83 augustss return (USBD_IOERROR);
2529 1.83 augustss
2530 1.42 augustss #ifdef DIAGNOSTIC
2531 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
2532 1.1 augustss /* XXX panic */
2533 1.1 augustss return (USBD_INVAL);
2534 1.42 augustss #endif
2535 1.53 augustss req = &xfer->request;
2536 1.1 augustss
2537 1.120 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2538 1.1 augustss req->bmRequestType, req->bRequest));
2539 1.1 augustss
2540 1.1 augustss len = UGETW(req->wLength);
2541 1.1 augustss value = UGETW(req->wValue);
2542 1.1 augustss index = UGETW(req->wIndex);
2543 1.43 augustss
2544 1.43 augustss if (len != 0)
2545 1.123 augustss buf = KERNADDR(&xfer->dmabuf, 0);
2546 1.43 augustss
2547 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2548 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2549 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2550 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2551 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2552 1.120 augustss /*
2553 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2554 1.1 augustss * for the integrated root hub.
2555 1.1 augustss */
2556 1.1 augustss break;
2557 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2558 1.1 augustss if (len > 0) {
2559 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2560 1.1 augustss totlen = 1;
2561 1.1 augustss }
2562 1.1 augustss break;
2563 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2564 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2565 1.171 christos if (len == 0)
2566 1.171 christos break;
2567 1.1 augustss switch(value >> 8) {
2568 1.1 augustss case UDESC_DEVICE:
2569 1.1 augustss if ((value & 0xff) != 0) {
2570 1.53 augustss err = USBD_IOERROR;
2571 1.1 augustss goto ret;
2572 1.1 augustss }
2573 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2574 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2575 1.1 augustss memcpy(buf, &ohci_devd, l);
2576 1.1 augustss break;
2577 1.1 augustss case UDESC_CONFIG:
2578 1.1 augustss if ((value & 0xff) != 0) {
2579 1.53 augustss err = USBD_IOERROR;
2580 1.1 augustss goto ret;
2581 1.1 augustss }
2582 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2583 1.1 augustss memcpy(buf, &ohci_confd, l);
2584 1.1 augustss buf = (char *)buf + l;
2585 1.1 augustss len -= l;
2586 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2587 1.1 augustss totlen += l;
2588 1.1 augustss memcpy(buf, &ohci_ifcd, l);
2589 1.1 augustss buf = (char *)buf + l;
2590 1.1 augustss len -= l;
2591 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2592 1.1 augustss totlen += l;
2593 1.1 augustss memcpy(buf, &ohci_endpd, l);
2594 1.1 augustss break;
2595 1.1 augustss case UDESC_STRING:
2596 1.1 augustss *(u_int8_t *)buf = 0;
2597 1.1 augustss totlen = 1;
2598 1.1 augustss switch (value & 0xff) {
2599 1.152 augustss case 0: /* Language table */
2600 1.152 augustss totlen = ohci_str(buf, len, "\001");
2601 1.152 augustss break;
2602 1.1 augustss case 1: /* Vendor */
2603 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
2604 1.1 augustss break;
2605 1.1 augustss case 2: /* Product */
2606 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
2607 1.1 augustss break;
2608 1.1 augustss }
2609 1.1 augustss break;
2610 1.1 augustss default:
2611 1.53 augustss err = USBD_IOERROR;
2612 1.1 augustss goto ret;
2613 1.1 augustss }
2614 1.1 augustss break;
2615 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2616 1.1 augustss if (len > 0) {
2617 1.1 augustss *(u_int8_t *)buf = 0;
2618 1.1 augustss totlen = 1;
2619 1.1 augustss }
2620 1.1 augustss break;
2621 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2622 1.1 augustss if (len > 1) {
2623 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2624 1.1 augustss totlen = 2;
2625 1.1 augustss }
2626 1.1 augustss break;
2627 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2628 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2629 1.1 augustss if (len > 1) {
2630 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2631 1.1 augustss totlen = 2;
2632 1.1 augustss }
2633 1.1 augustss break;
2634 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2635 1.1 augustss if (value >= USB_MAX_DEVICES) {
2636 1.53 augustss err = USBD_IOERROR;
2637 1.1 augustss goto ret;
2638 1.1 augustss }
2639 1.1 augustss sc->sc_addr = value;
2640 1.1 augustss break;
2641 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2642 1.1 augustss if (value != 0 && value != 1) {
2643 1.53 augustss err = USBD_IOERROR;
2644 1.1 augustss goto ret;
2645 1.1 augustss }
2646 1.1 augustss sc->sc_conf = value;
2647 1.1 augustss break;
2648 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2649 1.1 augustss break;
2650 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2651 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2652 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2653 1.53 augustss err = USBD_IOERROR;
2654 1.1 augustss goto ret;
2655 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2656 1.1 augustss break;
2657 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2658 1.1 augustss break;
2659 1.1 augustss /* Hub requests */
2660 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2661 1.1 augustss break;
2662 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2663 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2664 1.14 augustss "port=%d feature=%d\n",
2665 1.1 augustss index, value));
2666 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2667 1.53 augustss err = USBD_IOERROR;
2668 1.1 augustss goto ret;
2669 1.1 augustss }
2670 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2671 1.1 augustss switch(value) {
2672 1.1 augustss case UHF_PORT_ENABLE:
2673 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2674 1.1 augustss break;
2675 1.1 augustss case UHF_PORT_SUSPEND:
2676 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2677 1.1 augustss break;
2678 1.1 augustss case UHF_PORT_POWER:
2679 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2680 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2681 1.1 augustss break;
2682 1.1 augustss case UHF_C_PORT_CONNECTION:
2683 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2684 1.1 augustss break;
2685 1.1 augustss case UHF_C_PORT_ENABLE:
2686 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2687 1.1 augustss break;
2688 1.1 augustss case UHF_C_PORT_SUSPEND:
2689 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2690 1.1 augustss break;
2691 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2692 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2693 1.1 augustss break;
2694 1.1 augustss case UHF_C_PORT_RESET:
2695 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2696 1.1 augustss break;
2697 1.1 augustss default:
2698 1.53 augustss err = USBD_IOERROR;
2699 1.1 augustss goto ret;
2700 1.1 augustss }
2701 1.1 augustss switch(value) {
2702 1.1 augustss case UHF_C_PORT_CONNECTION:
2703 1.1 augustss case UHF_C_PORT_ENABLE:
2704 1.1 augustss case UHF_C_PORT_SUSPEND:
2705 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2706 1.1 augustss case UHF_C_PORT_RESET:
2707 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2708 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2709 1.157 mycroft ohci_rhsc_enable(sc);
2710 1.1 augustss break;
2711 1.1 augustss default:
2712 1.1 augustss break;
2713 1.1 augustss }
2714 1.1 augustss break;
2715 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2716 1.171 christos if (len == 0)
2717 1.171 christos break;
2718 1.146 toshii if ((value & 0xff) != 0) {
2719 1.53 augustss err = USBD_IOERROR;
2720 1.1 augustss goto ret;
2721 1.1 augustss }
2722 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2723 1.1 augustss hubd = ohci_hubd;
2724 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2725 1.15 augustss USETW(hubd.wHubCharacteristics,
2726 1.120 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2727 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2728 1.1 augustss /* XXX overcurrent */
2729 1.1 augustss );
2730 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2731 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2732 1.120 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2733 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
2734 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2735 1.1 augustss l = min(len, hubd.bDescLength);
2736 1.1 augustss totlen = l;
2737 1.1 augustss memcpy(buf, &hubd, l);
2738 1.1 augustss break;
2739 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2740 1.1 augustss if (len != 4) {
2741 1.53 augustss err = USBD_IOERROR;
2742 1.1 augustss goto ret;
2743 1.1 augustss }
2744 1.1 augustss memset(buf, 0, len); /* ? XXX */
2745 1.1 augustss totlen = len;
2746 1.1 augustss break;
2747 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2748 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2749 1.1 augustss index));
2750 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2751 1.53 augustss err = USBD_IOERROR;
2752 1.1 augustss goto ret;
2753 1.1 augustss }
2754 1.1 augustss if (len != 4) {
2755 1.53 augustss err = USBD_IOERROR;
2756 1.1 augustss goto ret;
2757 1.1 augustss }
2758 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2759 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2760 1.1 augustss v));
2761 1.1 augustss USETW(ps.wPortStatus, v);
2762 1.1 augustss USETW(ps.wPortChange, v >> 16);
2763 1.1 augustss l = min(len, sizeof ps);
2764 1.1 augustss memcpy(buf, &ps, l);
2765 1.1 augustss totlen = l;
2766 1.1 augustss break;
2767 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2768 1.53 augustss err = USBD_IOERROR;
2769 1.1 augustss goto ret;
2770 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2771 1.1 augustss break;
2772 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2773 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2774 1.53 augustss err = USBD_IOERROR;
2775 1.1 augustss goto ret;
2776 1.1 augustss }
2777 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2778 1.1 augustss switch(value) {
2779 1.1 augustss case UHF_PORT_ENABLE:
2780 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2781 1.1 augustss break;
2782 1.1 augustss case UHF_PORT_SUSPEND:
2783 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2784 1.1 augustss break;
2785 1.1 augustss case UHF_PORT_RESET:
2786 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2787 1.14 augustss index));
2788 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2789 1.110 augustss for (i = 0; i < 5; i++) {
2790 1.110 augustss usb_delay_ms(&sc->sc_bus,
2791 1.110 augustss USB_PORT_ROOT_RESET_DELAY);
2792 1.116 augustss if (sc->sc_dying) {
2793 1.116 augustss err = USBD_IOERROR;
2794 1.116 augustss goto ret;
2795 1.116 augustss }
2796 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2797 1.1 augustss break;
2798 1.1 augustss }
2799 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2800 1.1 augustss index, OREAD4(sc, port)));
2801 1.1 augustss break;
2802 1.1 augustss case UHF_PORT_POWER:
2803 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2804 1.14 augustss "%d\n", index));
2805 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2806 1.1 augustss break;
2807 1.1 augustss default:
2808 1.53 augustss err = USBD_IOERROR;
2809 1.1 augustss goto ret;
2810 1.1 augustss }
2811 1.1 augustss break;
2812 1.1 augustss default:
2813 1.53 augustss err = USBD_IOERROR;
2814 1.1 augustss goto ret;
2815 1.1 augustss }
2816 1.53 augustss xfer->actlen = totlen;
2817 1.53 augustss err = USBD_NORMAL_COMPLETION;
2818 1.1 augustss ret:
2819 1.53 augustss xfer->status = err;
2820 1.46 augustss s = splusb();
2821 1.53 augustss usb_transfer_complete(xfer);
2822 1.46 augustss splx(s);
2823 1.1 augustss return (USBD_IN_PROGRESS);
2824 1.1 augustss }
2825 1.1 augustss
2826 1.1 augustss /* Abort a root control request. */
2827 1.82 augustss Static void
2828 1.179 christos ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2829 1.1 augustss {
2830 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2831 1.1 augustss }
2832 1.1 augustss
2833 1.1 augustss /* Close the root pipe. */
2834 1.82 augustss Static void
2835 1.179 christos ohci_root_ctrl_close(usbd_pipe_handle pipe)
2836 1.1 augustss {
2837 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2838 1.34 augustss /* Nothing to do. */
2839 1.1 augustss }
2840 1.1 augustss
2841 1.82 augustss Static usbd_status
2842 1.91 augustss ohci_root_intr_transfer(usbd_xfer_handle xfer)
2843 1.1 augustss {
2844 1.53 augustss usbd_status err;
2845 1.17 augustss
2846 1.46 augustss /* Insert last in queue. */
2847 1.53 augustss err = usb_insert_transfer(xfer);
2848 1.53 augustss if (err)
2849 1.53 augustss return (err);
2850 1.46 augustss
2851 1.46 augustss /* Pipe isn't running, start first */
2852 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2853 1.17 augustss }
2854 1.17 augustss
2855 1.82 augustss Static usbd_status
2856 1.91 augustss ohci_root_intr_start(usbd_xfer_handle xfer)
2857 1.17 augustss {
2858 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2859 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2860 1.1 augustss
2861 1.83 augustss if (sc->sc_dying)
2862 1.83 augustss return (USBD_IOERROR);
2863 1.83 augustss
2864 1.53 augustss sc->sc_intrxfer = xfer;
2865 1.1 augustss
2866 1.1 augustss return (USBD_IN_PROGRESS);
2867 1.1 augustss }
2868 1.1 augustss
2869 1.3 augustss /* Abort a root interrupt request. */
2870 1.82 augustss Static void
2871 1.91 augustss ohci_root_intr_abort(usbd_xfer_handle xfer)
2872 1.1 augustss {
2873 1.53 augustss int s;
2874 1.53 augustss
2875 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2876 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2877 1.53 augustss xfer->pipe->intrxfer = NULL;
2878 1.51 augustss }
2879 1.53 augustss xfer->status = USBD_CANCELLED;
2880 1.53 augustss s = splusb();
2881 1.53 augustss usb_transfer_complete(xfer);
2882 1.53 augustss splx(s);
2883 1.1 augustss }
2884 1.1 augustss
2885 1.1 augustss /* Close the root pipe. */
2886 1.82 augustss Static void
2887 1.91 augustss ohci_root_intr_close(usbd_pipe_handle pipe)
2888 1.1 augustss {
2889 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2890 1.120 augustss
2891 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2892 1.34 augustss
2893 1.53 augustss sc->sc_intrxfer = NULL;
2894 1.1 augustss }
2895 1.1 augustss
2896 1.1 augustss /************************/
2897 1.1 augustss
2898 1.82 augustss Static usbd_status
2899 1.91 augustss ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2900 1.1 augustss {
2901 1.53 augustss usbd_status err;
2902 1.17 augustss
2903 1.46 augustss /* Insert last in queue. */
2904 1.53 augustss err = usb_insert_transfer(xfer);
2905 1.53 augustss if (err)
2906 1.53 augustss return (err);
2907 1.46 augustss
2908 1.46 augustss /* Pipe isn't running, start first */
2909 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2910 1.17 augustss }
2911 1.17 augustss
2912 1.82 augustss Static usbd_status
2913 1.91 augustss ohci_device_ctrl_start(usbd_xfer_handle xfer)
2914 1.17 augustss {
2915 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2916 1.53 augustss usbd_status err;
2917 1.1 augustss
2918 1.83 augustss if (sc->sc_dying)
2919 1.83 augustss return (USBD_IOERROR);
2920 1.83 augustss
2921 1.42 augustss #ifdef DIAGNOSTIC
2922 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2923 1.1 augustss /* XXX panic */
2924 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2925 1.1 augustss return (USBD_INVAL);
2926 1.1 augustss }
2927 1.42 augustss #endif
2928 1.1 augustss
2929 1.53 augustss err = ohci_device_request(xfer);
2930 1.53 augustss if (err)
2931 1.53 augustss return (err);
2932 1.1 augustss
2933 1.6 augustss if (sc->sc_bus.use_polling)
2934 1.53 augustss ohci_waitintr(sc, xfer);
2935 1.1 augustss return (USBD_IN_PROGRESS);
2936 1.1 augustss }
2937 1.1 augustss
2938 1.1 augustss /* Abort a device control request. */
2939 1.82 augustss Static void
2940 1.91 augustss ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2941 1.1 augustss {
2942 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2943 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2944 1.1 augustss }
2945 1.1 augustss
2946 1.1 augustss /* Close a device control pipe. */
2947 1.82 augustss Static void
2948 1.91 augustss ohci_device_ctrl_close(usbd_pipe_handle pipe)
2949 1.1 augustss {
2950 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2951 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2952 1.1 augustss
2953 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2954 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2955 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2956 1.3 augustss }
2957 1.3 augustss
2958 1.3 augustss /************************/
2959 1.37 augustss
2960 1.82 augustss Static void
2961 1.91 augustss ohci_device_clear_toggle(usbd_pipe_handle pipe)
2962 1.37 augustss {
2963 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2964 1.168 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2965 1.37 augustss
2966 1.168 augustss opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2967 1.37 augustss }
2968 1.37 augustss
2969 1.82 augustss Static void
2970 1.179 christos ohci_noop(usbd_pipe_handle pipe)
2971 1.37 augustss {
2972 1.37 augustss }
2973 1.3 augustss
2974 1.82 augustss Static usbd_status
2975 1.91 augustss ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2976 1.3 augustss {
2977 1.53 augustss usbd_status err;
2978 1.17 augustss
2979 1.46 augustss /* Insert last in queue. */
2980 1.53 augustss err = usb_insert_transfer(xfer);
2981 1.53 augustss if (err)
2982 1.53 augustss return (err);
2983 1.46 augustss
2984 1.46 augustss /* Pipe isn't running, start first */
2985 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2986 1.17 augustss }
2987 1.17 augustss
2988 1.82 augustss Static usbd_status
2989 1.91 augustss ohci_device_bulk_start(usbd_xfer_handle xfer)
2990 1.17 augustss {
2991 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2992 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2993 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2994 1.3 augustss int addr = dev->address;
2995 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2996 1.3 augustss ohci_soft_ed_t *sed;
2997 1.40 augustss int s, len, isread, endpt;
2998 1.53 augustss usbd_status err;
2999 1.3 augustss
3000 1.83 augustss if (sc->sc_dying)
3001 1.83 augustss return (USBD_IOERROR);
3002 1.83 augustss
3003 1.34 augustss #ifdef DIAGNOSTIC
3004 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
3005 1.3 augustss /* XXX panic */
3006 1.34 augustss printf("ohci_device_bulk_start: a request\n");
3007 1.3 augustss return (USBD_INVAL);
3008 1.3 augustss }
3009 1.34 augustss #endif
3010 1.3 augustss
3011 1.53 augustss len = xfer->length;
3012 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3013 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3014 1.3 augustss sed = opipe->sed;
3015 1.3 augustss
3016 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
3017 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
3018 1.40 augustss endpt));
3019 1.34 augustss
3020 1.32 augustss opipe->u.bulk.isread = isread;
3021 1.3 augustss opipe->u.bulk.length = len;
3022 1.3 augustss
3023 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3024 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3025 1.3 augustss /* Update device address */
3026 1.168 augustss sed->ed.ed_flags = HTOO32(
3027 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
3028 1.16 augustss OHCI_ED_SET_FA(addr));
3029 1.3 augustss
3030 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
3031 1.60 augustss data = opipe->tail.td;
3032 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
3033 1.77 augustss data, &tail);
3034 1.77 augustss /* We want interrupt at the end of the transfer. */
3035 1.168 augustss tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
3036 1.168 augustss tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
3037 1.77 augustss tail->flags |= OHCI_CALL_DONE;
3038 1.77 augustss tail = tail->nexttd; /* point at sentinel */
3039 1.179.2.1.2.1 skrll usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
3040 1.179.2.1.2.1 skrll sizeof(tail->td.td_flags),
3041 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3042 1.53 augustss if (err)
3043 1.53 augustss return (err);
3044 1.48 augustss
3045 1.53 augustss tail->xfer = NULL;
3046 1.53 augustss xfer->hcpriv = data;
3047 1.3 augustss
3048 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
3049 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
3050 1.168 augustss (int)O32TOH(sed->ed.ed_flags),
3051 1.168 augustss (int)O32TOH(data->td.td_flags),
3052 1.168 augustss (int)O32TOH(data->td.td_cbp),
3053 1.168 augustss (int)O32TOH(data->td.td_be)));
3054 1.34 augustss
3055 1.52 augustss #ifdef OHCI_DEBUG
3056 1.75 augustss if (ohcidebug > 5) {
3057 1.168 augustss ohci_dump_ed(sc, sed);
3058 1.168 augustss ohci_dump_tds(sc, data);
3059 1.34 augustss }
3060 1.34 augustss #endif
3061 1.34 augustss
3062 1.3 augustss /* Insert ED in schedule */
3063 1.3 augustss s = splusb();
3064 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
3065 1.53 augustss tdp->xfer = xfer;
3066 1.48 augustss }
3067 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3068 1.60 augustss opipe->tail.td = tail;
3069 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3070 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3071 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3072 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3073 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
3074 1.139 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
3075 1.80 augustss ohci_timeout, xfer);
3076 1.15 augustss }
3077 1.34 augustss
3078 1.52 augustss #if 0
3079 1.52 augustss /* This goes wrong if we are too slow. */
3080 1.75 augustss if (ohcidebug > 10) {
3081 1.75 augustss delay(10000);
3082 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3083 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3084 1.168 augustss ohci_dump_ed(sc, sed);
3085 1.168 augustss ohci_dump_tds(sc, data);
3086 1.34 augustss }
3087 1.34 augustss #endif
3088 1.34 augustss
3089 1.3 augustss splx(s);
3090 1.3 augustss
3091 1.3 augustss return (USBD_IN_PROGRESS);
3092 1.3 augustss }
3093 1.3 augustss
3094 1.82 augustss Static void
3095 1.91 augustss ohci_device_bulk_abort(usbd_xfer_handle xfer)
3096 1.3 augustss {
3097 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3098 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3099 1.3 augustss }
3100 1.3 augustss
3101 1.120 augustss /*
3102 1.34 augustss * Close a device bulk pipe.
3103 1.34 augustss */
3104 1.82 augustss Static void
3105 1.91 augustss ohci_device_bulk_close(usbd_pipe_handle pipe)
3106 1.3 augustss {
3107 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3108 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3109 1.3 augustss
3110 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3111 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
3112 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3113 1.1 augustss }
3114 1.1 augustss
3115 1.1 augustss /************************/
3116 1.1 augustss
3117 1.82 augustss Static usbd_status
3118 1.91 augustss ohci_device_intr_transfer(usbd_xfer_handle xfer)
3119 1.17 augustss {
3120 1.53 augustss usbd_status err;
3121 1.17 augustss
3122 1.46 augustss /* Insert last in queue. */
3123 1.53 augustss err = usb_insert_transfer(xfer);
3124 1.53 augustss if (err)
3125 1.53 augustss return (err);
3126 1.46 augustss
3127 1.46 augustss /* Pipe isn't running, start first */
3128 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3129 1.17 augustss }
3130 1.17 augustss
3131 1.82 augustss Static usbd_status
3132 1.91 augustss ohci_device_intr_start(usbd_xfer_handle xfer)
3133 1.1 augustss {
3134 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3135 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
3136 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3137 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
3138 1.48 augustss ohci_soft_td_t *data, *tail;
3139 1.165 skrll int s, len, isread, endpt;
3140 1.1 augustss
3141 1.83 augustss if (sc->sc_dying)
3142 1.83 augustss return (USBD_IOERROR);
3143 1.83 augustss
3144 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3145 1.14 augustss "flags=%d priv=%p\n",
3146 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
3147 1.1 augustss
3148 1.42 augustss #ifdef DIAGNOSTIC
3149 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
3150 1.128 provos panic("ohci_device_intr_transfer: a request");
3151 1.42 augustss #endif
3152 1.1 augustss
3153 1.53 augustss len = xfer->length;
3154 1.165 skrll endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3155 1.165 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3156 1.1 augustss
3157 1.60 augustss data = opipe->tail.td;
3158 1.1 augustss tail = ohci_alloc_std(sc);
3159 1.55 augustss if (tail == NULL)
3160 1.43 augustss return (USBD_NOMEM);
3161 1.53 augustss tail->xfer = NULL;
3162 1.1 augustss
3163 1.168 augustss data->td.td_flags = HTOO32(
3164 1.165 skrll isread ? OHCI_TD_IN : OHCI_TD_OUT |
3165 1.165 skrll OHCI_TD_NOCC |
3166 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3167 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
3168 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
3169 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3170 1.48 augustss data->nexttd = tail;
3171 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
3172 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3173 1.48 augustss data->len = len;
3174 1.53 augustss data->xfer = xfer;
3175 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3176 1.179.2.1.2.1 skrll usb_syncmem(&data->dma, data->offs, sizeof(data->td),
3177 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3178 1.53 augustss xfer->hcpriv = data;
3179 1.1 augustss
3180 1.52 augustss #ifdef OHCI_DEBUG
3181 1.1 augustss if (ohcidebug > 5) {
3182 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
3183 1.168 augustss ohci_dump_ed(sc, sed);
3184 1.168 augustss ohci_dump_tds(sc, data);
3185 1.1 augustss }
3186 1.1 augustss #endif
3187 1.1 augustss
3188 1.1 augustss /* Insert ED in schedule */
3189 1.1 augustss s = splusb();
3190 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3191 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3192 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3193 1.60 augustss opipe->tail.td = tail;
3194 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3195 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3196 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3197 1.1 augustss
3198 1.52 augustss #if 0
3199 1.52 augustss /*
3200 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
3201 1.52 augustss * because false references are followed due to the fact that the
3202 1.52 augustss * TD is gone.
3203 1.52 augustss */
3204 1.1 augustss if (ohcidebug > 5) {
3205 1.55 augustss usb_delay_ms(&sc->sc_bus, 5);
3206 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3207 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3208 1.168 augustss ohci_dump_ed(sc, sed);
3209 1.168 augustss ohci_dump_tds(sc, data);
3210 1.1 augustss }
3211 1.1 augustss #endif
3212 1.26 augustss splx(s);
3213 1.1 augustss
3214 1.1 augustss return (USBD_IN_PROGRESS);
3215 1.1 augustss }
3216 1.1 augustss
3217 1.1 augustss /* Abort a device control request. */
3218 1.82 augustss Static void
3219 1.91 augustss ohci_device_intr_abort(usbd_xfer_handle xfer)
3220 1.1 augustss {
3221 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
3222 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
3223 1.55 augustss xfer->pipe->intrxfer = NULL;
3224 1.1 augustss }
3225 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3226 1.1 augustss }
3227 1.1 augustss
3228 1.1 augustss /* Close a device interrupt pipe. */
3229 1.82 augustss Static void
3230 1.91 augustss ohci_device_intr_close(usbd_pipe_handle pipe)
3231 1.1 augustss {
3232 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3233 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3234 1.1 augustss int nslots = opipe->u.intr.nslots;
3235 1.1 augustss int pos = opipe->u.intr.pos;
3236 1.1 augustss int j;
3237 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
3238 1.1 augustss int s;
3239 1.1 augustss
3240 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3241 1.1 augustss pipe, nslots, pos));
3242 1.1 augustss s = splusb();
3243 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs,
3244 1.179.2.1.2.1 skrll sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3245 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3246 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3247 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
3248 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3249 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3250 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3251 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
3252 1.1 augustss
3253 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3254 1.172 christos continue;
3255 1.53 augustss #ifdef DIAGNOSTIC
3256 1.173 christos if (p == NULL)
3257 1.128 provos panic("ohci_device_intr_close: ED not found");
3258 1.53 augustss #endif
3259 1.173 christos p->next = sed->next;
3260 1.173 christos p->ed.ed_nexted = sed->ed.ed_nexted;
3261 1.179.2.1.2.1 skrll usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3262 1.179.2.1.2.1 skrll sizeof(p->ed.ed_nexted),
3263 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3264 1.1 augustss splx(s);
3265 1.1 augustss
3266 1.1 augustss for (j = 0; j < nslots; j++)
3267 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3268 1.1 augustss
3269 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3270 1.1 augustss ohci_free_sed(sc, opipe->sed);
3271 1.1 augustss }
3272 1.1 augustss
3273 1.82 augustss Static usbd_status
3274 1.91 augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3275 1.1 augustss {
3276 1.1 augustss int i, j, s, best;
3277 1.1 augustss u_int npoll, slow, shigh, nslots;
3278 1.1 augustss u_int bestbw, bw;
3279 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
3280 1.1 augustss
3281 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3282 1.1 augustss if (ival == 0) {
3283 1.1 augustss printf("ohci_setintr: 0 interval\n");
3284 1.1 augustss return (USBD_INVAL);
3285 1.1 augustss }
3286 1.1 augustss
3287 1.1 augustss npoll = OHCI_NO_INTRS;
3288 1.1 augustss while (npoll > ival)
3289 1.1 augustss npoll /= 2;
3290 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3291 1.1 augustss
3292 1.1 augustss /*
3293 1.1 augustss * We now know which level in the tree the ED must go into.
3294 1.1 augustss * Figure out which slot has most bandwidth left over.
3295 1.1 augustss * Slots to examine:
3296 1.1 augustss * npoll
3297 1.1 augustss * 1 0
3298 1.1 augustss * 2 1 2
3299 1.1 augustss * 4 3 4 5 6
3300 1.1 augustss * 8 7 8 9 10 11 12 13 14
3301 1.1 augustss * N (N-1) .. (N-1+N-1)
3302 1.1 augustss */
3303 1.1 augustss slow = npoll-1;
3304 1.1 augustss shigh = slow + npoll;
3305 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
3306 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3307 1.1 augustss bw = 0;
3308 1.1 augustss for (j = 0; j < nslots; j++)
3309 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3310 1.1 augustss if (bw < bestbw) {
3311 1.1 augustss best = i;
3312 1.1 augustss bestbw = bw;
3313 1.1 augustss }
3314 1.1 augustss }
3315 1.120 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3316 1.1 augustss best, slow, shigh, bestbw));
3317 1.1 augustss
3318 1.1 augustss s = splusb();
3319 1.1 augustss hsed = sc->sc_eds[best];
3320 1.1 augustss sed->next = hsed->next;
3321 1.179.2.1.2.1 skrll usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3322 1.179.2.1.2.1 skrll sizeof(hsed->ed.ed_flags),
3323 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3324 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
3325 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3326 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
3327 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3328 1.1 augustss hsed->next = sed;
3329 1.168 augustss hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3330 1.179.2.1.2.1 skrll usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3331 1.179.2.1.2.1 skrll sizeof(hsed->ed.ed_flags),
3332 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3333 1.1 augustss splx(s);
3334 1.1 augustss
3335 1.1 augustss for (j = 0; j < nslots; j++)
3336 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3337 1.1 augustss opipe->u.intr.nslots = nslots;
3338 1.1 augustss opipe->u.intr.pos = best;
3339 1.1 augustss
3340 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3341 1.1 augustss return (USBD_NORMAL_COMPLETION);
3342 1.60 augustss }
3343 1.60 augustss
3344 1.60 augustss /***********************/
3345 1.60 augustss
3346 1.60 augustss usbd_status
3347 1.91 augustss ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3348 1.60 augustss {
3349 1.60 augustss usbd_status err;
3350 1.60 augustss
3351 1.60 augustss DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3352 1.60 augustss
3353 1.60 augustss /* Put it on our queue, */
3354 1.60 augustss err = usb_insert_transfer(xfer);
3355 1.60 augustss
3356 1.60 augustss /* bail out on error, */
3357 1.60 augustss if (err && err != USBD_IN_PROGRESS)
3358 1.60 augustss return (err);
3359 1.60 augustss
3360 1.60 augustss /* XXX should check inuse here */
3361 1.60 augustss
3362 1.60 augustss /* insert into schedule, */
3363 1.60 augustss ohci_device_isoc_enter(xfer);
3364 1.60 augustss
3365 1.83 augustss /* and start if the pipe wasn't running */
3366 1.60 augustss if (!err)
3367 1.60 augustss ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3368 1.60 augustss
3369 1.60 augustss return (err);
3370 1.60 augustss }
3371 1.60 augustss
3372 1.60 augustss void
3373 1.91 augustss ohci_device_isoc_enter(usbd_xfer_handle xfer)
3374 1.60 augustss {
3375 1.61 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3376 1.61 augustss usbd_device_handle dev = opipe->pipe.device;
3377 1.61 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
3378 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
3379 1.61 augustss struct iso *iso = &opipe->u.iso;
3380 1.120 augustss ohci_soft_itd_t *sitd, *nsitd;
3381 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
3382 1.61 augustss int i, ncur, nframes;
3383 1.61 augustss int s;
3384 1.61 augustss
3385 1.83 augustss DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3386 1.83 augustss "nframes=%d\n",
3387 1.83 augustss iso->inuse, iso->next, xfer, xfer->nframes));
3388 1.83 augustss
3389 1.83 augustss if (sc->sc_dying)
3390 1.83 augustss return;
3391 1.83 augustss
3392 1.83 augustss if (iso->next == -1) {
3393 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
3394 1.168 augustss iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3395 1.120 augustss DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3396 1.83 augustss iso->next));
3397 1.83 augustss }
3398 1.83 augustss
3399 1.61 augustss sitd = opipe->tail.itd;
3400 1.125 augustss buf = DMAADDR(&xfer->dmabuf, 0);
3401 1.83 augustss bp0 = OHCI_PAGE(buf);
3402 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
3403 1.61 augustss nframes = xfer->nframes;
3404 1.83 augustss xfer->hcpriv = sitd;
3405 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
3406 1.83 augustss noffs = offs + xfer->frlengths[i];
3407 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3408 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3409 1.120 augustss
3410 1.83 augustss /* Allocate next ITD */
3411 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3412 1.61 augustss if (nsitd == NULL) {
3413 1.61 augustss /* XXX what now? */
3414 1.83 augustss printf("%s: isoc TD alloc failed\n",
3415 1.83 augustss USBDEVNAME(sc->sc_bus.bdev));
3416 1.61 augustss return;
3417 1.61 augustss }
3418 1.83 augustss
3419 1.83 augustss /* Fill current ITD */
3420 1.168 augustss sitd->itd.itd_flags = HTOO32(
3421 1.120 augustss OHCI_ITD_NOCC |
3422 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3423 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
3424 1.83 augustss OHCI_ITD_SET_FC(ncur));
3425 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3426 1.83 augustss sitd->nextitd = nsitd;
3427 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3428 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3429 1.83 augustss sitd->xfer = xfer;
3430 1.83 augustss sitd->flags = 0;
3431 1.179.2.1.2.1 skrll usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3432 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3433 1.83 augustss
3434 1.61 augustss sitd = nsitd;
3435 1.120 augustss iso->next = iso->next + ncur;
3436 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
3437 1.61 augustss ncur = 0;
3438 1.61 augustss }
3439 1.168 augustss sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3440 1.83 augustss offs = noffs;
3441 1.61 augustss }
3442 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3443 1.61 augustss if (nsitd == NULL) {
3444 1.61 augustss /* XXX what now? */
3445 1.120 augustss printf("%s: isoc TD alloc failed\n",
3446 1.83 augustss USBDEVNAME(sc->sc_bus.bdev));
3447 1.61 augustss return;
3448 1.61 augustss }
3449 1.83 augustss /* Fixup last used ITD */
3450 1.168 augustss sitd->itd.itd_flags = HTOO32(
3451 1.120 augustss OHCI_ITD_NOCC |
3452 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3453 1.61 augustss OHCI_ITD_SET_DI(0) |
3454 1.61 augustss OHCI_ITD_SET_FC(ncur));
3455 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3456 1.83 augustss sitd->nextitd = nsitd;
3457 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3458 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3459 1.83 augustss sitd->xfer = xfer;
3460 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3461 1.179.2.1.2.1 skrll usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3462 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3463 1.83 augustss
3464 1.61 augustss iso->next = iso->next + ncur;
3465 1.83 augustss iso->inuse += nframes;
3466 1.83 augustss
3467 1.83 augustss xfer->actlen = offs; /* XXX pretend we did it all */
3468 1.83 augustss
3469 1.83 augustss xfer->status = USBD_IN_PROGRESS;
3470 1.83 augustss
3471 1.83 augustss #ifdef OHCI_DEBUG
3472 1.83 augustss if (ohcidebug > 5) {
3473 1.83 augustss DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3474 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3475 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3476 1.168 augustss ohci_dump_ed(sc, sed);
3477 1.83 augustss }
3478 1.83 augustss #endif
3479 1.61 augustss
3480 1.83 augustss s = splusb();
3481 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3482 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3483 1.168 augustss sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3484 1.61 augustss opipe->tail.itd = nsitd;
3485 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3486 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3487 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
3488 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3489 1.61 augustss splx(s);
3490 1.83 augustss
3491 1.83 augustss #ifdef OHCI_DEBUG
3492 1.83 augustss if (ohcidebug > 5) {
3493 1.83 augustss delay(150000);
3494 1.83 augustss DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3495 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3496 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3497 1.168 augustss ohci_dump_ed(sc, sed);
3498 1.83 augustss }
3499 1.83 augustss #endif
3500 1.60 augustss }
3501 1.60 augustss
3502 1.60 augustss usbd_status
3503 1.91 augustss ohci_device_isoc_start(usbd_xfer_handle xfer)
3504 1.60 augustss {
3505 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3506 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3507 1.83 augustss
3508 1.83 augustss DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3509 1.83 augustss
3510 1.83 augustss if (sc->sc_dying)
3511 1.83 augustss return (USBD_IOERROR);
3512 1.83 augustss
3513 1.83 augustss #ifdef DIAGNOSTIC
3514 1.83 augustss if (xfer->status != USBD_IN_PROGRESS)
3515 1.121 tsutsui printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3516 1.83 augustss #endif
3517 1.83 augustss
3518 1.83 augustss /* XXX anything to do? */
3519 1.83 augustss
3520 1.83 augustss return (USBD_IN_PROGRESS);
3521 1.60 augustss }
3522 1.60 augustss
3523 1.60 augustss void
3524 1.91 augustss ohci_device_isoc_abort(usbd_xfer_handle xfer)
3525 1.60 augustss {
3526 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3527 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3528 1.83 augustss ohci_soft_ed_t *sed;
3529 1.83 augustss ohci_soft_itd_t *sitd;
3530 1.83 augustss int s;
3531 1.83 augustss
3532 1.83 augustss s = splusb();
3533 1.83 augustss
3534 1.83 augustss DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3535 1.83 augustss
3536 1.83 augustss /* Transfer is already done. */
3537 1.120 augustss if (xfer->status != USBD_NOT_STARTED &&
3538 1.83 augustss xfer->status != USBD_IN_PROGRESS) {
3539 1.83 augustss splx(s);
3540 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3541 1.83 augustss return;
3542 1.83 augustss }
3543 1.83 augustss
3544 1.83 augustss /* Give xfer the requested abort code. */
3545 1.83 augustss xfer->status = USBD_CANCELLED;
3546 1.83 augustss
3547 1.83 augustss sed = opipe->sed;
3548 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3549 1.179.2.1.2.1 skrll BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3550 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3551 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3552 1.179.2.1.2.1 skrll sizeof(sed->ed.ed_flags),
3553 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3554 1.83 augustss
3555 1.83 augustss sitd = xfer->hcpriv;
3556 1.83 augustss #ifdef DIAGNOSTIC
3557 1.83 augustss if (sitd == NULL) {
3558 1.102 augustss splx(s);
3559 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3560 1.83 augustss return;
3561 1.83 augustss }
3562 1.83 augustss #endif
3563 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3564 1.83 augustss #ifdef DIAGNOSTIC
3565 1.83 augustss DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3566 1.83 augustss sitd->isdone = 1;
3567 1.83 augustss #endif
3568 1.83 augustss }
3569 1.83 augustss
3570 1.83 augustss splx(s);
3571 1.83 augustss
3572 1.83 augustss usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3573 1.83 augustss
3574 1.83 augustss s = splusb();
3575 1.83 augustss
3576 1.83 augustss /* Run callback. */
3577 1.83 augustss usb_transfer_complete(xfer);
3578 1.83 augustss
3579 1.168 augustss sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3580 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3581 1.179.2.1.2.1 skrll usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3582 1.179.2.1.2.1 skrll BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3583 1.83 augustss
3584 1.83 augustss splx(s);
3585 1.60 augustss }
3586 1.60 augustss
3587 1.60 augustss void
3588 1.179 christos ohci_device_isoc_done(usbd_xfer_handle xfer)
3589 1.60 augustss {
3590 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3591 1.60 augustss }
3592 1.60 augustss
3593 1.60 augustss usbd_status
3594 1.91 augustss ohci_setup_isoc(usbd_pipe_handle pipe)
3595 1.60 augustss {
3596 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3597 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3598 1.60 augustss struct iso *iso = &opipe->u.iso;
3599 1.83 augustss int s;
3600 1.60 augustss
3601 1.60 augustss iso->next = -1;
3602 1.60 augustss iso->inuse = 0;
3603 1.60 augustss
3604 1.83 augustss s = splusb();
3605 1.168 augustss ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3606 1.83 augustss splx(s);
3607 1.83 augustss
3608 1.60 augustss return (USBD_NORMAL_COMPLETION);
3609 1.60 augustss }
3610 1.60 augustss
3611 1.60 augustss void
3612 1.91 augustss ohci_device_isoc_close(usbd_pipe_handle pipe)
3613 1.60 augustss {
3614 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3615 1.60 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3616 1.60 augustss
3617 1.60 augustss DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3618 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3619 1.83 augustss #ifdef DIAGNOSTIC
3620 1.83 augustss opipe->tail.itd->isdone = 1;
3621 1.83 augustss #endif
3622 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3623 1.1 augustss }
3624