ohci.c revision 1.196 1 1.196 drochner /* $NetBSD: ohci.c,v 1.196 2008/08/13 09:43:56 drochner Exp $ */
2 1.55 augustss /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.157 mycroft * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.157 mycroft * This code is derived from software contributed to The NetBSD Foundation
12 1.157 mycroft * by Charles M. Hannum.
13 1.1 augustss *
14 1.1 augustss * Redistribution and use in source and binary forms, with or without
15 1.1 augustss * modification, are permitted provided that the following conditions
16 1.1 augustss * are met:
17 1.1 augustss * 1. Redistributions of source code must retain the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer.
19 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 augustss * notice, this list of conditions and the following disclaimer in the
21 1.1 augustss * documentation and/or other materials provided with the distribution.
22 1.1 augustss *
23 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /*
37 1.1 augustss * USB Open Host Controller driver.
38 1.1 augustss *
39 1.96 augustss * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
40 1.138 ichiro * USB spec: http://www.usb.org/developers/docs/usbspec.zip
41 1.1 augustss */
42 1.108 lukem
43 1.108 lukem #include <sys/cdefs.h>
44 1.196 drochner __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.196 2008/08/13 09:43:56 drochner Exp $");
45 1.1 augustss
46 1.1 augustss #include <sys/param.h>
47 1.1 augustss #include <sys/systm.h>
48 1.1 augustss #include <sys/malloc.h>
49 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
50 1.55 augustss #include <sys/kernel.h>
51 1.1 augustss #include <sys/device.h>
52 1.55 augustss #include <sys/select.h>
53 1.153 fvdl #include <uvm/uvm_extern.h>
54 1.15 augustss #elif defined(__FreeBSD__)
55 1.15 augustss #include <sys/module.h>
56 1.15 augustss #include <sys/bus.h>
57 1.52 augustss #include <machine/bus_pio.h>
58 1.52 augustss #include <machine/bus_memio.h>
59 1.55 augustss #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
60 1.184 ad #include <sys/cpu.h>
61 1.55 augustss #endif
62 1.15 augustss #endif
63 1.1 augustss #include <sys/proc.h>
64 1.1 augustss #include <sys/queue.h>
65 1.1 augustss
66 1.184 ad #include <sys/bus.h>
67 1.16 augustss #include <machine/endian.h>
68 1.4 augustss
69 1.1 augustss #include <dev/usb/usb.h>
70 1.1 augustss #include <dev/usb/usbdi.h>
71 1.1 augustss #include <dev/usb/usbdivar.h>
72 1.38 augustss #include <dev/usb/usb_mem.h>
73 1.1 augustss #include <dev/usb/usb_quirks.h>
74 1.1 augustss
75 1.1 augustss #include <dev/usb/ohcireg.h>
76 1.1 augustss #include <dev/usb/ohcivar.h>
77 1.186 drochner #include <dev/usb/usbroothub_subr.h>
78 1.1 augustss
79 1.15 augustss #if defined(__FreeBSD__)
80 1.15 augustss #include <machine/clock.h>
81 1.55 augustss
82 1.15 augustss #define delay(d) DELAY(d)
83 1.15 augustss #endif
84 1.1 augustss
85 1.36 augustss #if defined(__OpenBSD__)
86 1.36 augustss struct cfdriver ohci_cd = {
87 1.36 augustss NULL, "ohci", DV_DULL
88 1.36 augustss };
89 1.36 augustss #endif
90 1.36 augustss
91 1.52 augustss #ifdef OHCI_DEBUG
92 1.52 augustss #define DPRINTF(x) if (ohcidebug) logprintf x
93 1.52 augustss #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
94 1.52 augustss int ohcidebug = 0;
95 1.92 tv #ifndef __NetBSD__
96 1.92 tv #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
97 1.92 tv #endif
98 1.52 augustss #else
99 1.52 augustss #define DPRINTF(x)
100 1.52 augustss #define DPRINTFN(n,x)
101 1.52 augustss #endif
102 1.52 augustss
103 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
104 1.169 tron #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
105 1.16 augustss #else
106 1.169 tron #define SWAP_ENDIAN OHCI_BIG_ENDIAN
107 1.16 augustss #endif
108 1.16 augustss
109 1.169 tron #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
110 1.169 tron #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
111 1.169 tron #define HTOO16(val) O16TOH(val)
112 1.169 tron #define HTOO32(val) O32TOH(val)
113 1.168 augustss
114 1.1 augustss struct ohci_pipe;
115 1.1 augustss
116 1.91 augustss Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
117 1.91 augustss Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
118 1.1 augustss
119 1.91 augustss Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
120 1.91 augustss Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
121 1.1 augustss
122 1.91 augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
123 1.91 augustss Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
124 1.60 augustss
125 1.53 augustss #if 0
126 1.91 augustss Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
127 1.91 augustss ohci_soft_td_t *);
128 1.53 augustss #endif
129 1.91 augustss Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
130 1.77 augustss ohci_softc_t *, int, int, usbd_xfer_handle,
131 1.91 augustss ohci_soft_td_t *, ohci_soft_td_t **);
132 1.53 augustss
133 1.91 augustss Static usbd_status ohci_open(usbd_pipe_handle);
134 1.91 augustss Static void ohci_poll(struct usbd_bus *);
135 1.99 augustss Static void ohci_softintr(void *);
136 1.91 augustss Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
137 1.91 augustss Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
138 1.91 augustss
139 1.91 augustss Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
140 1.168 augustss Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
141 1.168 augustss ohci_soft_ed_t *);
142 1.168 augustss
143 1.91 augustss Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
144 1.91 augustss Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
145 1.91 augustss Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
146 1.91 augustss Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
147 1.91 augustss Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
148 1.91 augustss Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
149 1.91 augustss Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
150 1.91 augustss
151 1.91 augustss Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
152 1.91 augustss Static void ohci_device_isoc_enter(usbd_xfer_handle);
153 1.91 augustss
154 1.91 augustss Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
155 1.91 augustss Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
156 1.91 augustss
157 1.91 augustss Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
158 1.91 augustss Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
159 1.91 augustss
160 1.91 augustss Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
161 1.91 augustss Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
162 1.91 augustss Static void ohci_root_ctrl_abort(usbd_xfer_handle);
163 1.91 augustss Static void ohci_root_ctrl_close(usbd_pipe_handle);
164 1.91 augustss Static void ohci_root_ctrl_done(usbd_xfer_handle);
165 1.91 augustss
166 1.91 augustss Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
167 1.91 augustss Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
168 1.91 augustss Static void ohci_root_intr_abort(usbd_xfer_handle);
169 1.91 augustss Static void ohci_root_intr_close(usbd_pipe_handle);
170 1.91 augustss Static void ohci_root_intr_done(usbd_xfer_handle);
171 1.91 augustss
172 1.91 augustss Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
173 1.91 augustss Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
174 1.91 augustss Static void ohci_device_ctrl_abort(usbd_xfer_handle);
175 1.91 augustss Static void ohci_device_ctrl_close(usbd_pipe_handle);
176 1.91 augustss Static void ohci_device_ctrl_done(usbd_xfer_handle);
177 1.91 augustss
178 1.91 augustss Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
179 1.91 augustss Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
180 1.91 augustss Static void ohci_device_bulk_abort(usbd_xfer_handle);
181 1.91 augustss Static void ohci_device_bulk_close(usbd_pipe_handle);
182 1.91 augustss Static void ohci_device_bulk_done(usbd_xfer_handle);
183 1.91 augustss
184 1.91 augustss Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
185 1.91 augustss Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
186 1.91 augustss Static void ohci_device_intr_abort(usbd_xfer_handle);
187 1.91 augustss Static void ohci_device_intr_close(usbd_pipe_handle);
188 1.91 augustss Static void ohci_device_intr_done(usbd_xfer_handle);
189 1.91 augustss
190 1.91 augustss Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
191 1.91 augustss Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
192 1.91 augustss Static void ohci_device_isoc_abort(usbd_xfer_handle);
193 1.91 augustss Static void ohci_device_isoc_close(usbd_pipe_handle);
194 1.91 augustss Static void ohci_device_isoc_done(usbd_xfer_handle);
195 1.91 augustss
196 1.120 augustss Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
197 1.91 augustss struct ohci_pipe *pipe, int ival);
198 1.91 augustss
199 1.91 augustss Static void ohci_timeout(void *);
200 1.114 augustss Static void ohci_timeout_task(void *);
201 1.104 augustss Static void ohci_rhsc_enable(void *);
202 1.91 augustss
203 1.91 augustss Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
204 1.91 augustss Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
205 1.53 augustss
206 1.91 augustss Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
207 1.91 augustss Static void ohci_noop(usbd_pipe_handle pipe);
208 1.37 augustss
209 1.52 augustss #ifdef OHCI_DEBUG
210 1.91 augustss Static void ohci_dumpregs(ohci_softc_t *);
211 1.168 augustss Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
212 1.168 augustss Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
213 1.168 augustss Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
214 1.168 augustss Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
215 1.168 augustss Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
216 1.1 augustss #endif
217 1.1 augustss
218 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
219 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
220 1.88 augustss #define OWRITE1(sc, r, x) \
221 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
222 1.88 augustss #define OWRITE2(sc, r, x) \
223 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
224 1.88 augustss #define OWRITE4(sc, r, x) \
225 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
226 1.174 mrg static __inline uint8_t
227 1.174 mrg OREAD1(ohci_softc_t *sc, bus_size_t r)
228 1.174 mrg {
229 1.174 mrg
230 1.174 mrg OBARR(sc);
231 1.174 mrg return bus_space_read_1(sc->iot, sc->ioh, r);
232 1.174 mrg }
233 1.174 mrg
234 1.174 mrg static __inline uint16_t
235 1.174 mrg OREAD2(ohci_softc_t *sc, bus_size_t r)
236 1.174 mrg {
237 1.174 mrg
238 1.174 mrg OBARR(sc);
239 1.174 mrg return bus_space_read_2(sc->iot, sc->ioh, r);
240 1.174 mrg }
241 1.174 mrg
242 1.174 mrg static __inline uint32_t
243 1.174 mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
244 1.174 mrg {
245 1.174 mrg
246 1.174 mrg OBARR(sc);
247 1.174 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
248 1.174 mrg }
249 1.1 augustss
250 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
251 1.120 augustss Static u_int8_t revbits[OHCI_NO_INTRS] =
252 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
253 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
254 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
255 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
256 1.1 augustss
257 1.1 augustss struct ohci_pipe {
258 1.1 augustss struct usbd_pipe pipe;
259 1.1 augustss ohci_soft_ed_t *sed;
260 1.60 augustss union {
261 1.60 augustss ohci_soft_td_t *td;
262 1.60 augustss ohci_soft_itd_t *itd;
263 1.60 augustss } tail;
264 1.1 augustss /* Info needed for different pipe kinds. */
265 1.1 augustss union {
266 1.1 augustss /* Control pipe */
267 1.1 augustss struct {
268 1.4 augustss usb_dma_t reqdma;
269 1.1 augustss u_int length;
270 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
271 1.1 augustss } ctl;
272 1.1 augustss /* Interrupt pipe */
273 1.1 augustss struct {
274 1.1 augustss int nslots;
275 1.1 augustss int pos;
276 1.1 augustss } intr;
277 1.3 augustss /* Bulk pipe */
278 1.3 augustss struct {
279 1.3 augustss u_int length;
280 1.32 augustss int isread;
281 1.3 augustss } bulk;
282 1.43 augustss /* Iso pipe */
283 1.43 augustss struct iso {
284 1.60 augustss int next, inuse;
285 1.43 augustss } iso;
286 1.1 augustss } u;
287 1.1 augustss };
288 1.1 augustss
289 1.1 augustss #define OHCI_INTR_ENDPT 1
290 1.1 augustss
291 1.182 drochner Static const struct usbd_bus_methods ohci_bus_methods = {
292 1.42 augustss ohci_open,
293 1.73 augustss ohci_softintr,
294 1.42 augustss ohci_poll,
295 1.42 augustss ohci_allocm,
296 1.42 augustss ohci_freem,
297 1.62 augustss ohci_allocx,
298 1.62 augustss ohci_freex,
299 1.42 augustss };
300 1.42 augustss
301 1.182 drochner Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
302 1.1 augustss ohci_root_ctrl_transfer,
303 1.17 augustss ohci_root_ctrl_start,
304 1.1 augustss ohci_root_ctrl_abort,
305 1.1 augustss ohci_root_ctrl_close,
306 1.37 augustss ohci_noop,
307 1.65 augustss ohci_root_ctrl_done,
308 1.1 augustss };
309 1.1 augustss
310 1.182 drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
311 1.1 augustss ohci_root_intr_transfer,
312 1.17 augustss ohci_root_intr_start,
313 1.1 augustss ohci_root_intr_abort,
314 1.1 augustss ohci_root_intr_close,
315 1.37 augustss ohci_noop,
316 1.38 augustss ohci_root_intr_done,
317 1.1 augustss };
318 1.1 augustss
319 1.182 drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
320 1.1 augustss ohci_device_ctrl_transfer,
321 1.17 augustss ohci_device_ctrl_start,
322 1.1 augustss ohci_device_ctrl_abort,
323 1.1 augustss ohci_device_ctrl_close,
324 1.37 augustss ohci_noop,
325 1.38 augustss ohci_device_ctrl_done,
326 1.1 augustss };
327 1.1 augustss
328 1.182 drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
329 1.1 augustss ohci_device_intr_transfer,
330 1.17 augustss ohci_device_intr_start,
331 1.1 augustss ohci_device_intr_abort,
332 1.1 augustss ohci_device_intr_close,
333 1.37 augustss ohci_device_clear_toggle,
334 1.38 augustss ohci_device_intr_done,
335 1.1 augustss };
336 1.1 augustss
337 1.182 drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
338 1.3 augustss ohci_device_bulk_transfer,
339 1.17 augustss ohci_device_bulk_start,
340 1.3 augustss ohci_device_bulk_abort,
341 1.3 augustss ohci_device_bulk_close,
342 1.37 augustss ohci_device_clear_toggle,
343 1.38 augustss ohci_device_bulk_done,
344 1.3 augustss };
345 1.3 augustss
346 1.182 drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
347 1.43 augustss ohci_device_isoc_transfer,
348 1.43 augustss ohci_device_isoc_start,
349 1.43 augustss ohci_device_isoc_abort,
350 1.43 augustss ohci_device_isoc_close,
351 1.43 augustss ohci_noop,
352 1.43 augustss ohci_device_isoc_done,
353 1.43 augustss };
354 1.43 augustss
355 1.55 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
356 1.47 augustss int
357 1.189 dyoung ohci_activate(device_t self, enum devact act)
358 1.47 augustss {
359 1.189 dyoung struct ohci_softc *sc = device_private(self);
360 1.47 augustss int rv = 0;
361 1.47 augustss
362 1.47 augustss switch (act) {
363 1.47 augustss case DVACT_ACTIVATE:
364 1.47 augustss return (EOPNOTSUPP);
365 1.47 augustss
366 1.47 augustss case DVACT_DEACTIVATE:
367 1.183 kiyohara sc->sc_dying = 1;
368 1.49 augustss if (sc->sc_child != NULL)
369 1.49 augustss rv = config_deactivate(sc->sc_child);
370 1.47 augustss break;
371 1.47 augustss }
372 1.47 augustss return (rv);
373 1.47 augustss }
374 1.47 augustss
375 1.187 dyoung void
376 1.187 dyoung ohci_childdet(device_t self, device_t child)
377 1.187 dyoung {
378 1.187 dyoung struct ohci_softc *sc = device_private(self);
379 1.187 dyoung
380 1.187 dyoung KASSERT(sc->sc_child == child);
381 1.187 dyoung sc->sc_child = NULL;
382 1.187 dyoung }
383 1.187 dyoung
384 1.47 augustss int
385 1.91 augustss ohci_detach(struct ohci_softc *sc, int flags)
386 1.47 augustss {
387 1.47 augustss int rv = 0;
388 1.196 drochner usbd_xfer_handle xfer;
389 1.47 augustss
390 1.47 augustss if (sc->sc_child != NULL)
391 1.47 augustss rv = config_detach(sc->sc_child, flags);
392 1.120 augustss
393 1.47 augustss if (rv != 0)
394 1.47 augustss return (rv);
395 1.47 augustss
396 1.104 augustss usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc);
397 1.104 augustss
398 1.116 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
399 1.116 augustss
400 1.196 drochner usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
401 1.196 drochner while((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) {
402 1.196 drochner SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
403 1.196 drochner free(xfer, M_USB);
404 1.196 drochner }
405 1.47 augustss
406 1.47 augustss return (rv);
407 1.47 augustss }
408 1.55 augustss #endif
409 1.47 augustss
410 1.1 augustss ohci_soft_ed_t *
411 1.91 augustss ohci_alloc_sed(ohci_softc_t *sc)
412 1.1 augustss {
413 1.1 augustss ohci_soft_ed_t *sed;
414 1.53 augustss usbd_status err;
415 1.1 augustss int i, offs;
416 1.4 augustss usb_dma_t dma;
417 1.1 augustss
418 1.53 augustss if (sc->sc_freeeds == NULL) {
419 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
420 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
421 1.53 augustss OHCI_ED_ALIGN, &dma);
422 1.53 augustss if (err)
423 1.39 augustss return (0);
424 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
425 1.39 augustss offs = i * OHCI_SED_SIZE;
426 1.123 augustss sed = KERNADDR(&dma, offs);
427 1.125 augustss sed->physaddr = DMAADDR(&dma, offs);
428 1.195 bouyer sed->dma = dma;
429 1.195 bouyer sed->offs = offs;
430 1.1 augustss sed->next = sc->sc_freeeds;
431 1.1 augustss sc->sc_freeeds = sed;
432 1.1 augustss }
433 1.1 augustss }
434 1.1 augustss sed = sc->sc_freeeds;
435 1.1 augustss sc->sc_freeeds = sed->next;
436 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
437 1.1 augustss sed->next = 0;
438 1.39 augustss return (sed);
439 1.1 augustss }
440 1.1 augustss
441 1.1 augustss void
442 1.91 augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
443 1.1 augustss {
444 1.1 augustss sed->next = sc->sc_freeeds;
445 1.1 augustss sc->sc_freeeds = sed;
446 1.1 augustss }
447 1.1 augustss
448 1.1 augustss ohci_soft_td_t *
449 1.91 augustss ohci_alloc_std(ohci_softc_t *sc)
450 1.1 augustss {
451 1.1 augustss ohci_soft_td_t *std;
452 1.53 augustss usbd_status err;
453 1.1 augustss int i, offs;
454 1.4 augustss usb_dma_t dma;
455 1.69 augustss int s;
456 1.1 augustss
457 1.53 augustss if (sc->sc_freetds == NULL) {
458 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
459 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
460 1.53 augustss OHCI_TD_ALIGN, &dma);
461 1.53 augustss if (err)
462 1.83 augustss return (NULL);
463 1.69 augustss s = splusb();
464 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
465 1.39 augustss offs = i * OHCI_STD_SIZE;
466 1.123 augustss std = KERNADDR(&dma, offs);
467 1.125 augustss std->physaddr = DMAADDR(&dma, offs);
468 1.195 bouyer std->dma = dma;
469 1.195 bouyer std->offs = offs;
470 1.1 augustss std->nexttd = sc->sc_freetds;
471 1.1 augustss sc->sc_freetds = std;
472 1.1 augustss }
473 1.69 augustss splx(s);
474 1.1 augustss }
475 1.69 augustss
476 1.69 augustss s = splusb();
477 1.1 augustss std = sc->sc_freetds;
478 1.1 augustss sc->sc_freetds = std->nexttd;
479 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
480 1.83 augustss std->nexttd = NULL;
481 1.83 augustss std->xfer = NULL;
482 1.69 augustss ohci_hash_add_td(sc, std);
483 1.69 augustss splx(s);
484 1.69 augustss
485 1.1 augustss return (std);
486 1.1 augustss }
487 1.1 augustss
488 1.1 augustss void
489 1.91 augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
490 1.1 augustss {
491 1.69 augustss int s;
492 1.69 augustss
493 1.69 augustss s = splusb();
494 1.69 augustss ohci_hash_rem_td(sc, std);
495 1.1 augustss std->nexttd = sc->sc_freetds;
496 1.1 augustss sc->sc_freetds = std;
497 1.69 augustss splx(s);
498 1.1 augustss }
499 1.1 augustss
500 1.1 augustss usbd_status
501 1.91 augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
502 1.91 augustss int alen, int rd, usbd_xfer_handle xfer,
503 1.91 augustss ohci_soft_td_t *sp, ohci_soft_td_t **ep)
504 1.48 augustss {
505 1.48 augustss ohci_soft_td_t *next, *cur;
506 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
507 1.77 augustss u_int32_t tdflags;
508 1.75 augustss int len, curlen;
509 1.77 augustss usb_dma_t *dma = &xfer->dmabuf;
510 1.77 augustss u_int16_t flags = xfer->flags;
511 1.48 augustss
512 1.75 augustss DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
513 1.75 augustss
514 1.75 augustss len = alen;
515 1.48 augustss cur = sp;
516 1.125 augustss dataphys = DMAADDR(dma, 0);
517 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
518 1.195 bouyer usb_syncmem(dma, 0, len,
519 1.195 bouyer rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
520 1.168 augustss tdflags = HTOO32(
521 1.120 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
522 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
523 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
524 1.61 augustss
525 1.48 augustss for (;;) {
526 1.48 augustss next = ohci_alloc_std(sc);
527 1.75 augustss if (next == NULL)
528 1.61 augustss goto nomem;
529 1.48 augustss
530 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
531 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
532 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
533 1.48 augustss /* we can handle it in this TD */
534 1.48 augustss curlen = len;
535 1.48 augustss } else {
536 1.48 augustss /* must use multiple TDs, fill as much as possible. */
537 1.120 augustss curlen = 2 * OHCI_PAGE_SIZE -
538 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
539 1.78 augustss /* the length must be a multiple of the max size */
540 1.78 augustss curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
541 1.78 augustss #ifdef DIAGNOSTIC
542 1.78 augustss if (curlen == 0)
543 1.128 provos panic("ohci_alloc_std: curlen == 0");
544 1.78 augustss #endif
545 1.48 augustss }
546 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
547 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
548 1.48 augustss dataphys, dataphysend,
549 1.48 augustss len, curlen));
550 1.48 augustss len -= curlen;
551 1.48 augustss
552 1.77 augustss cur->td.td_flags = tdflags;
553 1.168 augustss cur->td.td_cbp = HTOO32(dataphys);
554 1.48 augustss cur->nexttd = next;
555 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
556 1.168 augustss cur->td.td_be = HTOO32(dataphys + curlen - 1);
557 1.48 augustss cur->len = curlen;
558 1.48 augustss cur->flags = OHCI_ADD_LEN;
559 1.77 augustss cur->xfer = xfer;
560 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
561 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
562 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
563 1.48 augustss dataphys, dataphys + curlen - 1));
564 1.48 augustss if (len == 0)
565 1.48 augustss break;
566 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
567 1.48 augustss dataphys += curlen;
568 1.48 augustss cur = next;
569 1.48 augustss }
570 1.164 augustss if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
571 1.75 augustss alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
572 1.61 augustss /* Force a 0 length transfer at the end. */
573 1.75 augustss
574 1.75 augustss cur = next;
575 1.61 augustss next = ohci_alloc_std(sc);
576 1.75 augustss if (next == NULL)
577 1.61 augustss goto nomem;
578 1.61 augustss
579 1.77 augustss cur->td.td_flags = tdflags;
580 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
581 1.61 augustss cur->nexttd = next;
582 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
583 1.75 augustss cur->td.td_be = ~0;
584 1.61 augustss cur->len = 0;
585 1.61 augustss cur->flags = 0;
586 1.77 augustss cur->xfer = xfer;
587 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
588 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
589 1.61 augustss DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
590 1.61 augustss }
591 1.77 augustss *ep = cur;
592 1.48 augustss
593 1.48 augustss return (USBD_NORMAL_COMPLETION);
594 1.61 augustss
595 1.61 augustss nomem:
596 1.61 augustss /* XXX free chain */
597 1.61 augustss return (USBD_NOMEM);
598 1.48 augustss }
599 1.48 augustss
600 1.53 augustss #if 0
601 1.82 augustss Static void
602 1.120 augustss ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
603 1.91 augustss ohci_soft_td_t *stdend)
604 1.48 augustss {
605 1.48 augustss ohci_soft_td_t *p;
606 1.48 augustss
607 1.48 augustss for (; std != stdend; std = p) {
608 1.48 augustss p = std->nexttd;
609 1.48 augustss ohci_free_std(sc, std);
610 1.48 augustss }
611 1.48 augustss }
612 1.53 augustss #endif
613 1.48 augustss
614 1.60 augustss ohci_soft_itd_t *
615 1.91 augustss ohci_alloc_sitd(ohci_softc_t *sc)
616 1.60 augustss {
617 1.60 augustss ohci_soft_itd_t *sitd;
618 1.60 augustss usbd_status err;
619 1.83 augustss int i, s, offs;
620 1.60 augustss usb_dma_t dma;
621 1.60 augustss
622 1.60 augustss if (sc->sc_freeitds == NULL) {
623 1.60 augustss DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
624 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
625 1.83 augustss OHCI_ITD_ALIGN, &dma);
626 1.60 augustss if (err)
627 1.83 augustss return (NULL);
628 1.129 augustss s = splusb();
629 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
630 1.83 augustss offs = i * OHCI_SITD_SIZE;
631 1.123 augustss sitd = KERNADDR(&dma, offs);
632 1.125 augustss sitd->physaddr = DMAADDR(&dma, offs);
633 1.195 bouyer sitd->dma = dma;
634 1.195 bouyer sitd->offs = offs;
635 1.60 augustss sitd->nextitd = sc->sc_freeitds;
636 1.60 augustss sc->sc_freeitds = sitd;
637 1.60 augustss }
638 1.129 augustss splx(s);
639 1.60 augustss }
640 1.83 augustss
641 1.83 augustss s = splusb();
642 1.60 augustss sitd = sc->sc_freeitds;
643 1.60 augustss sc->sc_freeitds = sitd->nextitd;
644 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
645 1.83 augustss sitd->nextitd = NULL;
646 1.83 augustss sitd->xfer = NULL;
647 1.83 augustss ohci_hash_add_itd(sc, sitd);
648 1.83 augustss splx(s);
649 1.83 augustss
650 1.83 augustss #ifdef DIAGNOSTIC
651 1.83 augustss sitd->isdone = 0;
652 1.83 augustss #endif
653 1.83 augustss
654 1.60 augustss return (sitd);
655 1.60 augustss }
656 1.60 augustss
657 1.60 augustss void
658 1.91 augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
659 1.60 augustss {
660 1.83 augustss int s;
661 1.83 augustss
662 1.83 augustss DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
663 1.83 augustss
664 1.83 augustss #ifdef DIAGNOSTIC
665 1.83 augustss if (!sitd->isdone) {
666 1.128 provos panic("ohci_free_sitd: sitd=%p not done", sitd);
667 1.83 augustss return;
668 1.83 augustss }
669 1.134 toshii /* Warn double free */
670 1.134 toshii sitd->isdone = 0;
671 1.83 augustss #endif
672 1.83 augustss
673 1.83 augustss s = splusb();
674 1.83 augustss ohci_hash_rem_itd(sc, sitd);
675 1.60 augustss sitd->nextitd = sc->sc_freeitds;
676 1.60 augustss sc->sc_freeitds = sitd;
677 1.83 augustss splx(s);
678 1.60 augustss }
679 1.60 augustss
680 1.48 augustss usbd_status
681 1.91 augustss ohci_init(ohci_softc_t *sc)
682 1.1 augustss {
683 1.1 augustss ohci_soft_ed_t *sed, *psed;
684 1.53 augustss usbd_status err;
685 1.1 augustss int i;
686 1.161 augustss u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
687 1.16 augustss
688 1.1 augustss DPRINTF(("ohci_init: start\n"));
689 1.36 augustss #if defined(__OpenBSD__)
690 1.55 augustss printf(",");
691 1.36 augustss #else
692 1.190 drochner printf("%s:", device_xname(sc->sc_dev));
693 1.36 augustss #endif
694 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
695 1.55 augustss printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
696 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
697 1.55 augustss
698 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
699 1.120 augustss printf("%s: unsupported OHCI revision\n",
700 1.190 drochner device_xname(sc->sc_dev));
701 1.56 augustss sc->sc_bus.usbrev = USBREV_UNKNOWN;
702 1.1 augustss return (USBD_INVAL);
703 1.1 augustss }
704 1.56 augustss sc->sc_bus.usbrev = USBREV_1_0;
705 1.1 augustss
706 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
707 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
708 1.83 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
709 1.83 augustss LIST_INIT(&sc->sc_hash_itds[i]);
710 1.1 augustss
711 1.62 augustss SIMPLEQ_INIT(&sc->sc_free_xfers);
712 1.62 augustss
713 1.153 fvdl #ifdef __NetBSD__
714 1.193 drochner usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
715 1.153 fvdl USB_MEM_RESERVE);
716 1.153 fvdl #endif
717 1.153 fvdl
718 1.73 augustss /* XXX determine alignment by R/W */
719 1.1 augustss /* Allocate the HCCA area. */
720 1.120 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
721 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
722 1.53 augustss if (err)
723 1.53 augustss return (err);
724 1.123 augustss sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
725 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
726 1.1 augustss
727 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
728 1.1 augustss
729 1.60 augustss /* Allocate dummy ED that starts the control list. */
730 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
731 1.53 augustss if (sc->sc_ctrl_head == NULL) {
732 1.53 augustss err = USBD_NOMEM;
733 1.1 augustss goto bad1;
734 1.1 augustss }
735 1.168 augustss sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
736 1.34 augustss
737 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
738 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
739 1.53 augustss if (sc->sc_bulk_head == NULL) {
740 1.53 augustss err = USBD_NOMEM;
741 1.1 augustss goto bad2;
742 1.1 augustss }
743 1.168 augustss sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
744 1.195 bouyer usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
745 1.195 bouyer sizeof(sc->sc_bulk_head->ed),
746 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
747 1.1 augustss
748 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
749 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
750 1.60 augustss if (sc->sc_isoc_head == NULL) {
751 1.60 augustss err = USBD_NOMEM;
752 1.60 augustss goto bad3;
753 1.60 augustss }
754 1.168 augustss sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
755 1.195 bouyer usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
756 1.195 bouyer sizeof(sc->sc_isoc_head->ed),
757 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
758 1.60 augustss
759 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
760 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
761 1.1 augustss sed = ohci_alloc_sed(sc);
762 1.53 augustss if (sed == NULL) {
763 1.1 augustss while (--i >= 0)
764 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
765 1.53 augustss err = USBD_NOMEM;
766 1.60 augustss goto bad4;
767 1.1 augustss }
768 1.1 augustss /* All ED fields are set to 0. */
769 1.1 augustss sc->sc_eds[i] = sed;
770 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
771 1.60 augustss if (i != 0)
772 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
773 1.60 augustss else
774 1.60 augustss psed= sc->sc_isoc_head;
775 1.60 augustss sed->next = psed;
776 1.168 augustss sed->ed.ed_nexted = HTOO32(psed->physaddr);
777 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
778 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
779 1.1 augustss }
780 1.120 augustss /*
781 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
782 1.1 augustss * the tree set up properly to spread the interrupts.
783 1.1 augustss */
784 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
785 1.120 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
786 1.168 augustss HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
787 1.195 bouyer usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
788 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
789 1.1 augustss
790 1.73 augustss #ifdef OHCI_DEBUG
791 1.73 augustss if (ohcidebug > 15) {
792 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
793 1.73 augustss printf("ed#%d ", i);
794 1.168 augustss ohci_dump_ed(sc, sc->sc_eds[i]);
795 1.73 augustss }
796 1.73 augustss printf("iso ");
797 1.168 augustss ohci_dump_ed(sc, sc->sc_isoc_head);
798 1.73 augustss }
799 1.73 augustss #endif
800 1.73 augustss
801 1.161 augustss /* Preserve values programmed by SMM/BIOS but lost over reset. */
802 1.161 augustss ctl = OREAD4(sc, OHCI_CONTROL);
803 1.161 augustss rwc = ctl & OHCI_RWC;
804 1.161 augustss fm = OREAD4(sc, OHCI_FM_INTERVAL);
805 1.161 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
806 1.161 augustss descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
807 1.161 augustss
808 1.1 augustss /* Determine in what context we are running. */
809 1.1 augustss if (ctl & OHCI_IR) {
810 1.1 augustss /* SMM active, request change */
811 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
812 1.160 augustss if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
813 1.160 augustss (OHCI_OC | OHCI_MIE))
814 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
815 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
816 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
817 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
818 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
819 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
820 1.1 augustss }
821 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
822 1.1 augustss if ((ctl & OHCI_IR) == 0) {
823 1.15 augustss printf("%s: SMM does not respond, resetting\n",
824 1.190 drochner device_xname(sc->sc_dev));
825 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
826 1.1 augustss goto reset;
827 1.1 augustss }
828 1.103 augustss #if 0
829 1.103 augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
830 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
831 1.1 augustss /* BIOS started controller. */
832 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
833 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
834 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
835 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
836 1.1 augustss }
837 1.103 augustss #endif
838 1.1 augustss } else {
839 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
840 1.1 augustss reset:
841 1.1 augustss /* Controller was cold started. */
842 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
843 1.1 augustss }
844 1.1 augustss
845 1.16 augustss /*
846 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
847 1.25 augustss * without it some controllers do not start.
848 1.16 augustss */
849 1.190 drochner DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
850 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
851 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
852 1.16 augustss
853 1.1 augustss /* We now own the host controller and the bus has been reset. */
854 1.1 augustss
855 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
856 1.1 augustss /* Nominal time for a reset is 10 us. */
857 1.1 augustss for (i = 0; i < 10; i++) {
858 1.1 augustss delay(10);
859 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
860 1.1 augustss if (!hcr)
861 1.1 augustss break;
862 1.1 augustss }
863 1.1 augustss if (hcr) {
864 1.190 drochner printf("%s: reset timeout\n", device_xname(sc->sc_dev));
865 1.53 augustss err = USBD_IOERROR;
866 1.60 augustss goto bad5;
867 1.1 augustss }
868 1.52 augustss #ifdef OHCI_DEBUG
869 1.1 augustss if (ohcidebug > 15)
870 1.1 augustss ohci_dumpregs(sc);
871 1.1 augustss #endif
872 1.1 augustss
873 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
874 1.1 augustss
875 1.1 augustss /* Set up HC registers. */
876 1.125 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
877 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
878 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
879 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
880 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
881 1.55 augustss /* switch on desired functional features */
882 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
883 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
884 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
885 1.161 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
886 1.1 augustss /* And finally start it! */
887 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
888 1.1 augustss
889 1.1 augustss /*
890 1.1 augustss * The controller is now OPERATIONAL. Set a some final
891 1.1 augustss * registers that should be set earlier, but that the
892 1.1 augustss * controller ignores when in the SUSPEND state.
893 1.1 augustss */
894 1.161 augustss ival = OHCI_GET_IVAL(fm);
895 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
896 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
897 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
898 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
899 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
900 1.1 augustss
901 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
902 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
903 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
904 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
905 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
906 1.1 augustss
907 1.85 augustss /*
908 1.85 augustss * The AMD756 requires a delay before re-reading the register,
909 1.85 augustss * otherwise it will occasionally report 0 ports.
910 1.85 augustss */
911 1.145 augustss sc->sc_noport = 0;
912 1.145 augustss for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
913 1.145 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
914 1.145 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
915 1.145 augustss }
916 1.1 augustss
917 1.52 augustss #ifdef OHCI_DEBUG
918 1.1 augustss if (ohcidebug > 5)
919 1.1 augustss ohci_dumpregs(sc);
920 1.1 augustss #endif
921 1.120 augustss
922 1.1 augustss /* Set up the bus struct. */
923 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
924 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
925 1.1 augustss
926 1.71 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
927 1.101 minoura sc->sc_control = sc->sc_intre = 0;
928 1.71 augustss #endif
929 1.59 augustss
930 1.104 augustss usb_callout_init(sc->sc_tmo_rhsc);
931 1.104 augustss
932 1.167 augustss /* Finally, turn on interrupts. */
933 1.167 augustss DPRINTFN(1,("ohci_init: enabling\n"));
934 1.167 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
935 1.167 augustss
936 1.1 augustss return (USBD_NORMAL_COMPLETION);
937 1.1 augustss
938 1.60 augustss bad5:
939 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
940 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
941 1.60 augustss bad4:
942 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
943 1.1 augustss bad3:
944 1.144 augustss ohci_free_sed(sc, sc->sc_bulk_head);
945 1.144 augustss bad2:
946 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
947 1.1 augustss bad1:
948 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
949 1.53 augustss return (err);
950 1.1 augustss }
951 1.1 augustss
952 1.42 augustss usbd_status
953 1.91 augustss ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
954 1.42 augustss {
955 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
956 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
957 1.52 augustss #endif
958 1.153 fvdl usbd_status status;
959 1.42 augustss
960 1.153 fvdl status = usb_allocmem(&sc->sc_bus, size, 0, dma);
961 1.153 fvdl #ifdef __NetBSD__
962 1.153 fvdl if (status == USBD_NOMEM)
963 1.153 fvdl status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
964 1.153 fvdl #endif
965 1.153 fvdl return status;
966 1.42 augustss }
967 1.42 augustss
968 1.42 augustss void
969 1.91 augustss ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
970 1.42 augustss {
971 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
972 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
973 1.52 augustss #endif
974 1.153 fvdl #ifdef __NetBSD__
975 1.153 fvdl if (dma->block->flags & USB_DMA_RESERVE) {
976 1.191 nakayama usb_reserve_freem(&sc->sc_dma_reserve, dma);
977 1.153 fvdl return;
978 1.153 fvdl }
979 1.153 fvdl #endif
980 1.44 augustss usb_freemem(&sc->sc_bus, dma);
981 1.62 augustss }
982 1.62 augustss
983 1.62 augustss usbd_xfer_handle
984 1.91 augustss ohci_allocx(struct usbd_bus *bus)
985 1.62 augustss {
986 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
987 1.62 augustss usbd_xfer_handle xfer;
988 1.62 augustss
989 1.62 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
990 1.118 augustss if (xfer != NULL) {
991 1.126 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
992 1.118 augustss #ifdef DIAGNOSTIC
993 1.118 augustss if (xfer->busy_free != XFER_FREE) {
994 1.118 augustss printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
995 1.118 augustss xfer->busy_free);
996 1.118 augustss }
997 1.118 augustss #endif
998 1.118 augustss } else {
999 1.114 augustss xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
1000 1.118 augustss }
1001 1.118 augustss if (xfer != NULL) {
1002 1.114 augustss memset(xfer, 0, sizeof (struct ohci_xfer));
1003 1.118 augustss #ifdef DIAGNOSTIC
1004 1.118 augustss xfer->busy_free = XFER_BUSY;
1005 1.118 augustss #endif
1006 1.118 augustss }
1007 1.62 augustss return (xfer);
1008 1.62 augustss }
1009 1.62 augustss
1010 1.62 augustss void
1011 1.91 augustss ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
1012 1.62 augustss {
1013 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
1014 1.62 augustss
1015 1.118 augustss #ifdef DIAGNOSTIC
1016 1.118 augustss if (xfer->busy_free != XFER_BUSY) {
1017 1.118 augustss printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
1018 1.118 augustss xfer->busy_free);
1019 1.118 augustss }
1020 1.118 augustss xfer->busy_free = XFER_FREE;
1021 1.118 augustss #endif
1022 1.62 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
1023 1.42 augustss }
1024 1.42 augustss
1025 1.59 augustss /*
1026 1.59 augustss * Shut down the controller when the system is going down.
1027 1.59 augustss */
1028 1.188 dyoung bool
1029 1.188 dyoung ohci_shutdown(device_t self, int flags)
1030 1.59 augustss {
1031 1.188 dyoung ohci_softc_t *sc = device_private(self);
1032 1.59 augustss
1033 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
1034 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1035 1.188 dyoung return true;
1036 1.59 augustss }
1037 1.59 augustss
1038 1.185 jmcneill bool
1039 1.187 dyoung ohci_resume(device_t dv PMF_FN_ARGS)
1040 1.33 augustss {
1041 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1042 1.185 jmcneill uint32_t ctl;
1043 1.95 augustss int s;
1044 1.33 augustss
1045 1.185 jmcneill s = splhardusb();
1046 1.185 jmcneill sc->sc_bus.use_polling++;
1047 1.185 jmcneill /* Some broken BIOSes do not recover these values */
1048 1.185 jmcneill OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1049 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1050 1.185 jmcneill sc->sc_ctrl_head->physaddr);
1051 1.185 jmcneill OWRITE4(sc, OHCI_BULK_HEAD_ED,
1052 1.185 jmcneill sc->sc_bulk_head->physaddr);
1053 1.185 jmcneill if (sc->sc_intre)
1054 1.185 jmcneill OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1055 1.185 jmcneill (OHCI_ALL_INTRS | OHCI_MIE));
1056 1.185 jmcneill if (sc->sc_control)
1057 1.185 jmcneill ctl = sc->sc_control;
1058 1.185 jmcneill else
1059 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL);
1060 1.185 jmcneill ctl |= OHCI_HCFS_RESUME;
1061 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1062 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1063 1.185 jmcneill ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1064 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1065 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1066 1.185 jmcneill sc->sc_control = sc->sc_intre = 0;
1067 1.185 jmcneill sc->sc_bus.use_polling--;
1068 1.194 nonaka splx(s);
1069 1.185 jmcneill
1070 1.185 jmcneill return true;
1071 1.185 jmcneill }
1072 1.185 jmcneill
1073 1.185 jmcneill bool
1074 1.187 dyoung ohci_suspend(device_t dv PMF_FN_ARGS)
1075 1.185 jmcneill {
1076 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1077 1.185 jmcneill uint32_t ctl;
1078 1.185 jmcneill int s;
1079 1.95 augustss
1080 1.98 augustss s = splhardusb();
1081 1.185 jmcneill sc->sc_bus.use_polling++;
1082 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1083 1.185 jmcneill if (sc->sc_control == 0) {
1084 1.185 jmcneill /*
1085 1.185 jmcneill * Preserve register values, in case that BIOS
1086 1.185 jmcneill * does not recover them.
1087 1.185 jmcneill */
1088 1.185 jmcneill sc->sc_control = ctl;
1089 1.185 jmcneill sc->sc_intre = OREAD4(sc,
1090 1.185 jmcneill OHCI_INTERRUPT_ENABLE);
1091 1.95 augustss }
1092 1.185 jmcneill ctl |= OHCI_HCFS_SUSPEND;
1093 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1094 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1095 1.185 jmcneill sc->sc_bus.use_polling--;
1096 1.95 augustss splx(s);
1097 1.185 jmcneill
1098 1.185 jmcneill return true;
1099 1.33 augustss }
1100 1.33 augustss
1101 1.52 augustss #ifdef OHCI_DEBUG
1102 1.1 augustss void
1103 1.91 augustss ohci_dumpregs(ohci_softc_t *sc)
1104 1.1 augustss {
1105 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1106 1.41 augustss OREAD4(sc, OHCI_REVISION),
1107 1.41 augustss OREAD4(sc, OHCI_CONTROL),
1108 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1109 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1110 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
1111 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1112 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1113 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1114 1.41 augustss OREAD4(sc, OHCI_HCCA),
1115 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1116 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1117 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1118 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1119 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1120 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1121 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1122 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1123 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1124 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
1125 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1126 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1127 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1128 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
1129 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1130 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1131 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1132 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
1133 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
1134 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1135 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1136 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1137 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number),
1138 1.168 augustss O32TOH(sc->sc_hcca->hcca_done_head)));
1139 1.1 augustss }
1140 1.1 augustss #endif
1141 1.1 augustss
1142 1.91 augustss Static int ohci_intr1(ohci_softc_t *);
1143 1.53 augustss
1144 1.1 augustss int
1145 1.91 augustss ohci_intr(void *p)
1146 1.1 augustss {
1147 1.1 augustss ohci_softc_t *sc = p;
1148 1.111 augustss
1149 1.190 drochner if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev))
1150 1.111 augustss return (0);
1151 1.53 augustss
1152 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
1153 1.57 augustss if (sc->sc_bus.use_polling) {
1154 1.57 augustss #ifdef DIAGNOSTIC
1155 1.149 mycroft DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1156 1.57 augustss #endif
1157 1.154 joff /* for level triggered intrs, should do something to ack */
1158 1.155 perry OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1159 1.154 joff OREAD4(sc, OHCI_INTERRUPT_STATUS));
1160 1.155 perry
1161 1.53 augustss return (0);
1162 1.57 augustss }
1163 1.53 augustss
1164 1.120 augustss return (ohci_intr1(sc));
1165 1.53 augustss }
1166 1.53 augustss
1167 1.82 augustss Static int
1168 1.91 augustss ohci_intr1(ohci_softc_t *sc)
1169 1.53 augustss {
1170 1.1 augustss u_int32_t intrs, eintrs;
1171 1.1 augustss
1172 1.105 augustss DPRINTFN(14,("ohci_intr1: enter\n"));
1173 1.105 augustss
1174 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1175 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1176 1.15 augustss #ifdef DIAGNOSTIC
1177 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1178 1.15 augustss #endif
1179 1.15 augustss return (0);
1180 1.15 augustss }
1181 1.15 augustss
1182 1.157 mycroft intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1183 1.1 augustss if (!intrs)
1184 1.1 augustss return (0);
1185 1.55 augustss
1186 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1187 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1188 1.1 augustss if (!eintrs)
1189 1.1 augustss return (0);
1190 1.1 augustss
1191 1.45 augustss sc->sc_bus.intr_context++;
1192 1.44 augustss sc->sc_bus.no_intrs++;
1193 1.120 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1194 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1195 1.1 augustss (u_int)eintrs));
1196 1.1 augustss
1197 1.1 augustss if (eintrs & OHCI_SO) {
1198 1.100 augustss sc->sc_overrun_cnt++;
1199 1.100 augustss if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1200 1.100 augustss printf("%s: %u scheduling overruns\n",
1201 1.190 drochner device_xname(sc->sc_dev), sc->sc_overrun_cnt);
1202 1.100 augustss sc->sc_overrun_cnt = 0;
1203 1.100 augustss }
1204 1.1 augustss /* XXX do what */
1205 1.106 augustss eintrs &= ~OHCI_SO;
1206 1.1 augustss }
1207 1.1 augustss if (eintrs & OHCI_WDH) {
1208 1.157 mycroft /*
1209 1.157 mycroft * We block the interrupt below, and reenable it later from
1210 1.157 mycroft * ohci_softintr().
1211 1.157 mycroft */
1212 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1213 1.1 augustss }
1214 1.1 augustss if (eintrs & OHCI_RD) {
1215 1.190 drochner printf("%s: resume detect\n", device_xname(sc->sc_dev));
1216 1.1 augustss /* XXX process resume detect */
1217 1.1 augustss }
1218 1.1 augustss if (eintrs & OHCI_UE) {
1219 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1220 1.190 drochner device_xname(sc->sc_dev));
1221 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1222 1.1 augustss /* XXX what else */
1223 1.1 augustss }
1224 1.1 augustss if (eintrs & OHCI_RHSC) {
1225 1.120 augustss /*
1226 1.157 mycroft * We block the interrupt below, and reenable it later from
1227 1.157 mycroft * a timeout.
1228 1.1 augustss */
1229 1.157 mycroft ohci_rhsc(sc, sc->sc_intrxfer);
1230 1.104 augustss /* Do not allow RHSC interrupts > 1 per second */
1231 1.104 augustss usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1232 1.1 augustss }
1233 1.1 augustss
1234 1.45 augustss sc->sc_bus.intr_context--;
1235 1.44 augustss
1236 1.106 augustss if (eintrs != 0) {
1237 1.157 mycroft /* Block unprocessed interrupts. */
1238 1.106 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1239 1.106 augustss sc->sc_eintrs &= ~eintrs;
1240 1.157 mycroft DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1241 1.190 drochner device_xname(sc->sc_dev), eintrs));
1242 1.106 augustss }
1243 1.1 augustss
1244 1.1 augustss return (1);
1245 1.1 augustss }
1246 1.1 augustss
1247 1.1 augustss void
1248 1.104 augustss ohci_rhsc_enable(void *v_sc)
1249 1.104 augustss {
1250 1.104 augustss ohci_softc_t *sc = v_sc;
1251 1.129 augustss int s;
1252 1.104 augustss
1253 1.129 augustss s = splhardusb();
1254 1.157 mycroft sc->sc_eintrs |= OHCI_RHSC;
1255 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1256 1.129 augustss splx(s);
1257 1.1 augustss }
1258 1.1 augustss
1259 1.52 augustss #ifdef OHCI_DEBUG
1260 1.166 drochner const char *ohci_cc_strs[] = {
1261 1.13 augustss "NO_ERROR",
1262 1.13 augustss "CRC",
1263 1.13 augustss "BIT_STUFFING",
1264 1.13 augustss "DATA_TOGGLE_MISMATCH",
1265 1.13 augustss "STALL",
1266 1.13 augustss "DEVICE_NOT_RESPONDING",
1267 1.13 augustss "PID_CHECK_FAILURE",
1268 1.13 augustss "UNEXPECTED_PID",
1269 1.13 augustss "DATA_OVERRUN",
1270 1.13 augustss "DATA_UNDERRUN",
1271 1.13 augustss "BUFFER_OVERRUN",
1272 1.13 augustss "BUFFER_UNDERRUN",
1273 1.67 augustss "reserved",
1274 1.67 augustss "reserved",
1275 1.67 augustss "NOT_ACCESSED",
1276 1.13 augustss "NOT_ACCESSED",
1277 1.13 augustss };
1278 1.13 augustss #endif
1279 1.13 augustss
1280 1.1 augustss void
1281 1.157 mycroft ohci_softintr(void *v)
1282 1.83 augustss {
1283 1.190 drochner struct usbd_bus *bus = v;
1284 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1285 1.157 mycroft ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1286 1.157 mycroft ohci_soft_td_t *std, *sdone, *stdnext;
1287 1.157 mycroft usbd_xfer_handle xfer;
1288 1.157 mycroft struct ohci_pipe *opipe;
1289 1.157 mycroft int len, cc, s;
1290 1.157 mycroft int i, j, actlen, iframes, uedir;
1291 1.157 mycroft ohci_physaddr_t done;
1292 1.157 mycroft
1293 1.157 mycroft DPRINTFN(10,("ohci_softintr: enter\n"));
1294 1.157 mycroft
1295 1.157 mycroft sc->sc_bus.intr_context++;
1296 1.157 mycroft
1297 1.157 mycroft s = splhardusb();
1298 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1299 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1300 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1301 1.168 augustss done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1302 1.157 mycroft sc->sc_hcca->hcca_done_head = 0;
1303 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1304 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1305 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1306 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1307 1.157 mycroft sc->sc_eintrs |= OHCI_WDH;
1308 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1309 1.157 mycroft splx(s);
1310 1.83 augustss
1311 1.83 augustss /* Reverse the done list. */
1312 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1313 1.83 augustss std = ohci_hash_find_td(sc, done);
1314 1.83 augustss if (std != NULL) {
1315 1.195 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1316 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1317 1.83 augustss std->dnext = sdone;
1318 1.168 augustss done = O32TOH(std->td.td_nexttd);
1319 1.83 augustss sdone = std;
1320 1.83 augustss DPRINTFN(10,("add TD %p\n", std));
1321 1.83 augustss continue;
1322 1.83 augustss }
1323 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1324 1.83 augustss if (sitd != NULL) {
1325 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1326 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1327 1.83 augustss sitd->dnext = sidone;
1328 1.168 augustss done = O32TOH(sitd->itd.itd_nextitd);
1329 1.83 augustss sidone = sitd;
1330 1.83 augustss DPRINTFN(5,("add ITD %p\n", sitd));
1331 1.83 augustss continue;
1332 1.83 augustss }
1333 1.157 mycroft panic("ohci_softintr: addr 0x%08lx not found", (u_long)done);
1334 1.83 augustss }
1335 1.83 augustss
1336 1.105 augustss DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1337 1.1 augustss
1338 1.52 augustss #ifdef OHCI_DEBUG
1339 1.1 augustss if (ohcidebug > 10) {
1340 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1341 1.168 augustss ohci_dump_tds(sc, sdone);
1342 1.1 augustss }
1343 1.1 augustss #endif
1344 1.1 augustss
1345 1.48 augustss for (std = sdone; std; std = stdnext) {
1346 1.53 augustss xfer = std->xfer;
1347 1.48 augustss stdnext = std->dnext;
1348 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1349 1.69 augustss std, xfer, xfer ? xfer->hcpriv : 0));
1350 1.71 augustss if (xfer == NULL) {
1351 1.117 augustss /*
1352 1.117 augustss * xfer == NULL: There seems to be no xfer associated
1353 1.71 augustss * with this TD. It is tailp that happened to end up on
1354 1.71 augustss * the done queue.
1355 1.117 augustss * Shouldn't happen, but some chips are broken(?).
1356 1.71 augustss */
1357 1.71 augustss continue;
1358 1.71 augustss }
1359 1.53 augustss if (xfer->status == USBD_CANCELLED ||
1360 1.53 augustss xfer->status == USBD_TIMEOUT) {
1361 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1362 1.53 augustss xfer));
1363 1.38 augustss /* Handled by abort routine. */
1364 1.83 augustss continue;
1365 1.83 augustss }
1366 1.83 augustss usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1367 1.141 mycroft
1368 1.141 mycroft len = std->len;
1369 1.141 mycroft if (std->td.td_cbp != 0)
1370 1.168 augustss len -= O32TOH(std->td.td_be) -
1371 1.168 augustss O32TOH(std->td.td_cbp) + 1;
1372 1.141 mycroft DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1373 1.141 mycroft std->flags));
1374 1.141 mycroft if (std->flags & OHCI_ADD_LEN)
1375 1.141 mycroft xfer->actlen += len;
1376 1.141 mycroft
1377 1.168 augustss cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1378 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1379 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1380 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1381 1.133 toshii s = splusb();
1382 1.53 augustss usb_transfer_complete(xfer);
1383 1.133 toshii splx(s);
1384 1.21 augustss }
1385 1.48 augustss ohci_free_std(sc, std);
1386 1.1 augustss } else {
1387 1.48 augustss /*
1388 1.48 augustss * Endpoint is halted. First unlink all the TDs
1389 1.48 augustss * belonging to the failed transfer, and then restart
1390 1.48 augustss * the endpoint.
1391 1.48 augustss */
1392 1.1 augustss ohci_soft_td_t *p, *n;
1393 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1394 1.48 augustss
1395 1.71 augustss DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1396 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1397 1.168 augustss ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1398 1.48 augustss
1399 1.48 augustss /* remove TDs */
1400 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1401 1.1 augustss n = p->nexttd;
1402 1.1 augustss ohci_free_std(sc, p);
1403 1.1 augustss }
1404 1.48 augustss
1405 1.16 augustss /* clear halt */
1406 1.168 augustss opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1407 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1408 1.48 augustss
1409 1.1 augustss if (cc == OHCI_CC_STALL)
1410 1.53 augustss xfer->status = USBD_STALLED;
1411 1.1 augustss else
1412 1.53 augustss xfer->status = USBD_IOERROR;
1413 1.133 toshii s = splusb();
1414 1.53 augustss usb_transfer_complete(xfer);
1415 1.133 toshii splx(s);
1416 1.1 augustss }
1417 1.1 augustss }
1418 1.72 augustss
1419 1.83 augustss #ifdef OHCI_DEBUG
1420 1.83 augustss if (ohcidebug > 10) {
1421 1.105 augustss DPRINTF(("ohci_softintr: ITD done:\n"));
1422 1.168 augustss ohci_dump_itds(sc, sidone);
1423 1.83 augustss }
1424 1.83 augustss #endif
1425 1.83 augustss
1426 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1427 1.83 augustss xfer = sitd->xfer;
1428 1.83 augustss sitdnext = sitd->dnext;
1429 1.83 augustss DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1430 1.83 augustss sitd, xfer, xfer ? xfer->hcpriv : 0));
1431 1.83 augustss if (xfer == NULL)
1432 1.83 augustss continue;
1433 1.83 augustss if (xfer->status == USBD_CANCELLED ||
1434 1.83 augustss xfer->status == USBD_TIMEOUT) {
1435 1.83 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1436 1.83 augustss xfer));
1437 1.83 augustss /* Handled by abort routine. */
1438 1.83 augustss continue;
1439 1.83 augustss }
1440 1.83 augustss #ifdef DIAGNOSTIC
1441 1.83 augustss if (sitd->isdone)
1442 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1443 1.83 augustss sitd->isdone = 1;
1444 1.83 augustss #endif
1445 1.134 toshii if (sitd->flags & OHCI_CALL_DONE) {
1446 1.134 toshii ohci_soft_itd_t *next;
1447 1.134 toshii
1448 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1449 1.134 toshii opipe->u.iso.inuse -= xfer->nframes;
1450 1.134 toshii uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1451 1.134 toshii bEndpointAddress);
1452 1.134 toshii xfer->status = USBD_NORMAL_COMPLETION;
1453 1.134 toshii actlen = 0;
1454 1.137 simonb for (i = 0, sitd = xfer->hcpriv;;
1455 1.134 toshii sitd = next) {
1456 1.134 toshii next = sitd->nextitd;
1457 1.168 augustss if (OHCI_ITD_GET_CC(O32TOH(sitd->
1458 1.135 toshii itd.itd_flags)) != OHCI_CC_NO_ERROR)
1459 1.134 toshii xfer->status = USBD_IOERROR;
1460 1.134 toshii /* For input, update frlengths with actual */
1461 1.134 toshii /* XXX anything necessary for output? */
1462 1.134 toshii if (uedir == UE_DIR_IN &&
1463 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION) {
1464 1.168 augustss iframes = OHCI_ITD_GET_FC(O32TOH(
1465 1.135 toshii sitd->itd.itd_flags));
1466 1.134 toshii for (j = 0; j < iframes; i++, j++) {
1467 1.168 augustss len = O16TOH(sitd->
1468 1.134 toshii itd.itd_offset[j]);
1469 1.158 toshii if ((OHCI_ITD_PSW_GET_CC(len) &
1470 1.158 toshii OHCI_CC_NOT_ACCESSED_MASK)
1471 1.158 toshii == OHCI_CC_NOT_ACCESSED)
1472 1.158 toshii len = 0;
1473 1.158 toshii else
1474 1.158 toshii len = OHCI_ITD_PSW_LENGTH(len);
1475 1.134 toshii xfer->frlengths[i] = len;
1476 1.134 toshii actlen += len;
1477 1.134 toshii }
1478 1.134 toshii }
1479 1.134 toshii if (sitd->flags & OHCI_CALL_DONE)
1480 1.134 toshii break;
1481 1.134 toshii ohci_free_sitd(sc, sitd);
1482 1.83 augustss }
1483 1.134 toshii ohci_free_sitd(sc, sitd);
1484 1.134 toshii if (uedir == UE_DIR_IN &&
1485 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION)
1486 1.134 toshii xfer->actlen = actlen;
1487 1.151 mycroft xfer->hcpriv = NULL;
1488 1.134 toshii
1489 1.134 toshii s = splusb();
1490 1.83 augustss usb_transfer_complete(xfer);
1491 1.134 toshii splx(s);
1492 1.83 augustss }
1493 1.83 augustss }
1494 1.83 augustss
1495 1.131 augustss #ifdef USB_USE_SOFTINTR
1496 1.119 augustss if (sc->sc_softwake) {
1497 1.119 augustss sc->sc_softwake = 0;
1498 1.119 augustss wakeup(&sc->sc_softwake);
1499 1.119 augustss }
1500 1.131 augustss #endif /* USB_USE_SOFTINTR */
1501 1.119 augustss
1502 1.72 augustss sc->sc_bus.intr_context--;
1503 1.105 augustss DPRINTFN(10,("ohci_softintr: done:\n"));
1504 1.1 augustss }
1505 1.1 augustss
1506 1.1 augustss void
1507 1.179 christos ohci_device_ctrl_done(usbd_xfer_handle xfer)
1508 1.1 augustss {
1509 1.195 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1510 1.195 bouyer int len = UGETW(xfer->request.wLength);
1511 1.195 bouyer int isread = (xfer->request.bmRequestType & UT_READ);
1512 1.195 bouyer
1513 1.140 gson DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1514 1.1 augustss
1515 1.38 augustss #ifdef DIAGNOSTIC
1516 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1517 1.140 gson panic("ohci_device_ctrl_done: not a request");
1518 1.1 augustss }
1519 1.38 augustss #endif
1520 1.195 bouyer if (len)
1521 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, len,
1522 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1523 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0,
1524 1.195 bouyer sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1525 1.1 augustss }
1526 1.1 augustss
1527 1.1 augustss void
1528 1.91 augustss ohci_device_intr_done(usbd_xfer_handle xfer)
1529 1.1 augustss {
1530 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1531 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1532 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1533 1.48 augustss ohci_soft_td_t *data, *tail;
1534 1.195 bouyer int isread =
1535 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1536 1.1 augustss
1537 1.1 augustss
1538 1.140 gson DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1539 1.53 augustss xfer, xfer->actlen));
1540 1.1 augustss
1541 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1542 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1543 1.53 augustss if (xfer->pipe->repeat) {
1544 1.60 augustss data = opipe->tail.td;
1545 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1546 1.53 augustss if (tail == NULL) {
1547 1.53 augustss xfer->status = USBD_NOMEM;
1548 1.1 augustss return;
1549 1.1 augustss }
1550 1.55 augustss tail->xfer = NULL;
1551 1.120 augustss
1552 1.168 augustss data->td.td_flags = HTOO32(
1553 1.120 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1554 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1555 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1556 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
1557 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1558 1.48 augustss data->nexttd = tail;
1559 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
1560 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1561 1.76 tsutsui xfer->length - 1);
1562 1.53 augustss data->len = xfer->length;
1563 1.53 augustss data->xfer = xfer;
1564 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1565 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
1566 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1567 1.53 augustss xfer->hcpriv = data;
1568 1.53 augustss xfer->actlen = 0;
1569 1.1 augustss
1570 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1571 1.195 bouyer usb_syncmem(&sed->dma,
1572 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1573 1.195 bouyer sizeof(sed->ed.ed_tailp),
1574 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1575 1.60 augustss opipe->tail.td = tail;
1576 1.1 augustss }
1577 1.1 augustss }
1578 1.1 augustss
1579 1.1 augustss void
1580 1.179 christos ohci_device_bulk_done(usbd_xfer_handle xfer)
1581 1.3 augustss {
1582 1.195 bouyer int isread =
1583 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1584 1.195 bouyer
1585 1.140 gson DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1586 1.53 augustss xfer, xfer->actlen));
1587 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1588 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1589 1.3 augustss }
1590 1.3 augustss
1591 1.3 augustss void
1592 1.91 augustss ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1593 1.1 augustss {
1594 1.1 augustss usbd_pipe_handle pipe;
1595 1.1 augustss u_char *p;
1596 1.1 augustss int i, m;
1597 1.1 augustss int hstatus;
1598 1.1 augustss
1599 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1600 1.120 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1601 1.53 augustss sc, xfer, hstatus));
1602 1.1 augustss
1603 1.53 augustss if (xfer == NULL) {
1604 1.1 augustss /* Just ignore the change. */
1605 1.1 augustss return;
1606 1.1 augustss }
1607 1.1 augustss
1608 1.53 augustss pipe = xfer->pipe;
1609 1.1 augustss
1610 1.123 augustss p = KERNADDR(&xfer->dmabuf, 0);
1611 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1612 1.53 augustss memset(p, 0, xfer->length);
1613 1.1 augustss for (i = 1; i <= m; i++) {
1614 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1615 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1616 1.1 augustss p[i/8] |= 1 << (i%8);
1617 1.1 augustss }
1618 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1619 1.53 augustss xfer->actlen = xfer->length;
1620 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1621 1.1 augustss
1622 1.53 augustss usb_transfer_complete(xfer);
1623 1.38 augustss }
1624 1.38 augustss
1625 1.38 augustss void
1626 1.179 christos ohci_root_intr_done(usbd_xfer_handle xfer)
1627 1.65 augustss {
1628 1.65 augustss }
1629 1.65 augustss
1630 1.65 augustss void
1631 1.179 christos ohci_root_ctrl_done(usbd_xfer_handle xfer)
1632 1.38 augustss {
1633 1.1 augustss }
1634 1.1 augustss
1635 1.1 augustss /*
1636 1.1 augustss * Wait here until controller claims to have an interrupt.
1637 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1638 1.1 augustss * too long.
1639 1.1 augustss */
1640 1.1 augustss void
1641 1.91 augustss ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1642 1.1 augustss {
1643 1.163 augustss int timo;
1644 1.1 augustss u_int32_t intrs;
1645 1.1 augustss
1646 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1647 1.163 augustss for (timo = xfer->timeout; timo >= 0; timo--) {
1648 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1649 1.116 augustss if (sc->sc_dying)
1650 1.116 augustss break;
1651 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1652 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1653 1.52 augustss #ifdef OHCI_DEBUG
1654 1.1 augustss if (ohcidebug > 15)
1655 1.1 augustss ohci_dumpregs(sc);
1656 1.1 augustss #endif
1657 1.1 augustss if (intrs) {
1658 1.53 augustss ohci_intr1(sc);
1659 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1660 1.1 augustss return;
1661 1.1 augustss }
1662 1.1 augustss }
1663 1.15 augustss
1664 1.15 augustss /* Timeout */
1665 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1666 1.53 augustss xfer->status = USBD_TIMEOUT;
1667 1.53 augustss usb_transfer_complete(xfer);
1668 1.15 augustss /* XXX should free TD */
1669 1.5 augustss }
1670 1.5 augustss
1671 1.5 augustss void
1672 1.91 augustss ohci_poll(struct usbd_bus *bus)
1673 1.5 augustss {
1674 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1675 1.105 augustss #ifdef OHCI_DEBUG
1676 1.105 augustss static int last;
1677 1.105 augustss int new;
1678 1.105 augustss new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1679 1.105 augustss if (new != last) {
1680 1.105 augustss DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1681 1.105 augustss last = new;
1682 1.105 augustss }
1683 1.105 augustss #endif
1684 1.5 augustss
1685 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1686 1.53 augustss ohci_intr1(sc);
1687 1.1 augustss }
1688 1.1 augustss
1689 1.1 augustss usbd_status
1690 1.91 augustss ohci_device_request(usbd_xfer_handle xfer)
1691 1.1 augustss {
1692 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1693 1.53 augustss usb_device_request_t *req = &xfer->request;
1694 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1695 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
1696 1.1 augustss int addr = dev->address;
1697 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1698 1.1 augustss ohci_soft_ed_t *sed;
1699 1.1 augustss int isread;
1700 1.1 augustss int len;
1701 1.53 augustss usbd_status err;
1702 1.1 augustss int s;
1703 1.1 augustss
1704 1.1 augustss isread = req->bmRequestType & UT_READ;
1705 1.1 augustss len = UGETW(req->wLength);
1706 1.1 augustss
1707 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1708 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1709 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1710 1.120 augustss UGETW(req->wIndex), len, addr,
1711 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1712 1.1 augustss
1713 1.60 augustss setup = opipe->tail.td;
1714 1.1 augustss stat = ohci_alloc_std(sc);
1715 1.53 augustss if (stat == NULL) {
1716 1.53 augustss err = USBD_NOMEM;
1717 1.1 augustss goto bad1;
1718 1.1 augustss }
1719 1.1 augustss tail = ohci_alloc_std(sc);
1720 1.53 augustss if (tail == NULL) {
1721 1.53 augustss err = USBD_NOMEM;
1722 1.1 augustss goto bad2;
1723 1.1 augustss }
1724 1.55 augustss tail->xfer = NULL;
1725 1.1 augustss
1726 1.1 augustss sed = opipe->sed;
1727 1.1 augustss opipe->u.ctl.length = len;
1728 1.1 augustss
1729 1.148 mycroft /* Update device address and length since they may have changed
1730 1.148 mycroft during the setup of the control pipe in usbd_new_device(). */
1731 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1732 1.77 augustss /* XXXX Should not touch ED here! */
1733 1.195 bouyer
1734 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1735 1.195 bouyer sizeof(sed->ed.ed_flags),
1736 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1737 1.168 augustss sed->ed.ed_flags = HTOO32(
1738 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1739 1.16 augustss OHCI_ED_SET_FA(addr) |
1740 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1741 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1742 1.195 bouyer sizeof(sed->ed.ed_flags),
1743 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1744 1.1 augustss
1745 1.77 augustss next = stat;
1746 1.77 augustss
1747 1.1 augustss /* Set up data transaction */
1748 1.1 augustss if (len != 0) {
1749 1.77 augustss ohci_soft_td_t *std = stat;
1750 1.77 augustss
1751 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1752 1.77 augustss std, &stat);
1753 1.77 augustss stat = stat->nexttd; /* point at free TD */
1754 1.77 augustss if (err)
1755 1.1 augustss goto bad3;
1756 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1757 1.168 augustss std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1758 1.168 augustss std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1759 1.195 bouyer usb_syncmem(&std->dma,
1760 1.195 bouyer std->offs + offsetof(ohci_td_t, td_flags),
1761 1.195 bouyer sizeof(std->td.td_flags),
1762 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1763 1.34 augustss }
1764 1.1 augustss
1765 1.123 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1766 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
1767 1.1 augustss
1768 1.168 augustss setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1769 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1770 1.168 augustss setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1771 1.1 augustss setup->nexttd = next;
1772 1.168 augustss setup->td.td_nexttd = HTOO32(next->physaddr);
1773 1.168 augustss setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1774 1.77 augustss setup->len = 0;
1775 1.53 augustss setup->xfer = xfer;
1776 1.34 augustss setup->flags = 0;
1777 1.53 augustss xfer->hcpriv = setup;
1778 1.195 bouyer usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
1779 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1780 1.1 augustss
1781 1.168 augustss stat->td.td_flags = HTOO32(
1782 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1783 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1784 1.39 augustss stat->td.td_cbp = 0;
1785 1.1 augustss stat->nexttd = tail;
1786 1.168 augustss stat->td.td_nexttd = HTOO32(tail->physaddr);
1787 1.39 augustss stat->td.td_be = 0;
1788 1.77 augustss stat->flags = OHCI_CALL_DONE;
1789 1.1 augustss stat->len = 0;
1790 1.53 augustss stat->xfer = xfer;
1791 1.195 bouyer usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
1792 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1793 1.1 augustss
1794 1.52 augustss #ifdef OHCI_DEBUG
1795 1.1 augustss if (ohcidebug > 5) {
1796 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1797 1.168 augustss ohci_dump_ed(sc, sed);
1798 1.168 augustss ohci_dump_tds(sc, setup);
1799 1.1 augustss }
1800 1.1 augustss #endif
1801 1.1 augustss
1802 1.1 augustss /* Insert ED in schedule */
1803 1.1 augustss s = splusb();
1804 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1805 1.195 bouyer usb_syncmem(&sed->dma,
1806 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1807 1.195 bouyer sizeof(sed->ed.ed_tailp),
1808 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1809 1.60 augustss opipe->tail.td = tail;
1810 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1811 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1812 1.139 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
1813 1.80 augustss ohci_timeout, xfer);
1814 1.15 augustss }
1815 1.1 augustss splx(s);
1816 1.1 augustss
1817 1.115 itojun #ifdef OHCI_DEBUG
1818 1.113 augustss if (ohcidebug > 20) {
1819 1.77 augustss delay(10000);
1820 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1821 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1822 1.113 augustss ohci_dumpregs(sc);
1823 1.113 augustss printf("ctrl head:\n");
1824 1.168 augustss ohci_dump_ed(sc, sc->sc_ctrl_head);
1825 1.113 augustss printf("sed:\n");
1826 1.168 augustss ohci_dump_ed(sc, sed);
1827 1.168 augustss ohci_dump_tds(sc, setup);
1828 1.1 augustss }
1829 1.1 augustss #endif
1830 1.1 augustss
1831 1.1 augustss return (USBD_NORMAL_COMPLETION);
1832 1.1 augustss
1833 1.1 augustss bad3:
1834 1.1 augustss ohci_free_std(sc, tail);
1835 1.1 augustss bad2:
1836 1.1 augustss ohci_free_std(sc, stat);
1837 1.1 augustss bad1:
1838 1.53 augustss return (err);
1839 1.1 augustss }
1840 1.1 augustss
1841 1.1 augustss /*
1842 1.1 augustss * Add an ED to the schedule. Called at splusb().
1843 1.1 augustss */
1844 1.1 augustss void
1845 1.168 augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1846 1.1 augustss {
1847 1.113 augustss DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1848 1.113 augustss
1849 1.46 augustss SPLUSBCHECK;
1850 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1851 1.195 bouyer sizeof(head->ed.ed_nexted),
1852 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1853 1.1 augustss sed->next = head->next;
1854 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1855 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1856 1.195 bouyer sizeof(sed->ed.ed_nexted),
1857 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1858 1.1 augustss head->next = sed;
1859 1.168 augustss head->ed.ed_nexted = HTOO32(sed->physaddr);
1860 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1861 1.195 bouyer sizeof(head->ed.ed_nexted),
1862 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1863 1.1 augustss }
1864 1.1 augustss
1865 1.1 augustss /*
1866 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1867 1.3 augustss */
1868 1.3 augustss void
1869 1.91 augustss ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1870 1.3 augustss {
1871 1.120 augustss ohci_soft_ed_t *p;
1872 1.3 augustss
1873 1.46 augustss SPLUSBCHECK;
1874 1.46 augustss
1875 1.3 augustss /* XXX */
1876 1.133 toshii for (p = head; p != NULL && p->next != sed; p = p->next)
1877 1.3 augustss ;
1878 1.55 augustss if (p == NULL)
1879 1.128 provos panic("ohci_rem_ed: ED not found");
1880 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1881 1.195 bouyer sizeof(sed->ed.ed_nexted),
1882 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1883 1.3 augustss p->next = sed->next;
1884 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1885 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1886 1.195 bouyer sizeof(p->ed.ed_nexted),
1887 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1888 1.3 augustss }
1889 1.3 augustss
1890 1.3 augustss /*
1891 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1892 1.1 augustss * the host controller. This queue is the processed by software.
1893 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1894 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1895 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1896 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1897 1.1 augustss * hash value.
1898 1.1 augustss */
1899 1.1 augustss
1900 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1901 1.1 augustss /* Called at splusb() */
1902 1.1 augustss void
1903 1.91 augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1904 1.1 augustss {
1905 1.1 augustss int h = HASH(std->physaddr);
1906 1.1 augustss
1907 1.46 augustss SPLUSBCHECK;
1908 1.46 augustss
1909 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1910 1.1 augustss }
1911 1.1 augustss
1912 1.1 augustss /* Called at splusb() */
1913 1.1 augustss void
1914 1.179 christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1915 1.1 augustss {
1916 1.46 augustss SPLUSBCHECK;
1917 1.46 augustss
1918 1.1 augustss LIST_REMOVE(std, hnext);
1919 1.1 augustss }
1920 1.1 augustss
1921 1.1 augustss ohci_soft_td_t *
1922 1.91 augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1923 1.1 augustss {
1924 1.1 augustss int h = HASH(a);
1925 1.1 augustss ohci_soft_td_t *std;
1926 1.1 augustss
1927 1.120 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1928 1.53 augustss std != NULL;
1929 1.1 augustss std = LIST_NEXT(std, hnext))
1930 1.1 augustss if (std->physaddr == a)
1931 1.1 augustss return (std);
1932 1.83 augustss return (NULL);
1933 1.83 augustss }
1934 1.83 augustss
1935 1.83 augustss /* Called at splusb() */
1936 1.83 augustss void
1937 1.91 augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1938 1.83 augustss {
1939 1.83 augustss int h = HASH(sitd->physaddr);
1940 1.83 augustss
1941 1.83 augustss SPLUSBCHECK;
1942 1.83 augustss
1943 1.120 augustss DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1944 1.83 augustss sitd, (u_long)sitd->physaddr));
1945 1.83 augustss
1946 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1947 1.83 augustss }
1948 1.83 augustss
1949 1.83 augustss /* Called at splusb() */
1950 1.83 augustss void
1951 1.179 christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1952 1.83 augustss {
1953 1.83 augustss SPLUSBCHECK;
1954 1.83 augustss
1955 1.120 augustss DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1956 1.83 augustss sitd, (u_long)sitd->physaddr));
1957 1.83 augustss
1958 1.83 augustss LIST_REMOVE(sitd, hnext);
1959 1.83 augustss }
1960 1.83 augustss
1961 1.83 augustss ohci_soft_itd_t *
1962 1.91 augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1963 1.83 augustss {
1964 1.83 augustss int h = HASH(a);
1965 1.83 augustss ohci_soft_itd_t *sitd;
1966 1.83 augustss
1967 1.120 augustss for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1968 1.83 augustss sitd != NULL;
1969 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1970 1.83 augustss if (sitd->physaddr == a)
1971 1.83 augustss return (sitd);
1972 1.83 augustss return (NULL);
1973 1.1 augustss }
1974 1.1 augustss
1975 1.1 augustss void
1976 1.91 augustss ohci_timeout(void *addr)
1977 1.1 augustss {
1978 1.114 augustss struct ohci_xfer *oxfer = addr;
1979 1.116 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1980 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1981 1.114 augustss
1982 1.114 augustss DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1983 1.114 augustss
1984 1.116 augustss if (sc->sc_dying) {
1985 1.116 augustss ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1986 1.116 augustss return;
1987 1.116 augustss }
1988 1.116 augustss
1989 1.114 augustss /* Execute the abort in a process context. */
1990 1.114 augustss usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1991 1.178 joerg usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
1992 1.178 joerg USB_TASKQ_HC);
1993 1.114 augustss }
1994 1.114 augustss
1995 1.114 augustss void
1996 1.114 augustss ohci_timeout_task(void *addr)
1997 1.114 augustss {
1998 1.53 augustss usbd_xfer_handle xfer = addr;
1999 1.48 augustss int s;
2000 1.1 augustss
2001 1.114 augustss DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
2002 1.45 augustss
2003 1.48 augustss s = splusb();
2004 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
2005 1.48 augustss splx(s);
2006 1.1 augustss }
2007 1.1 augustss
2008 1.52 augustss #ifdef OHCI_DEBUG
2009 1.1 augustss void
2010 1.168 augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
2011 1.1 augustss {
2012 1.1 augustss for (; std; std = std->nexttd)
2013 1.168 augustss ohci_dump_td(sc, std);
2014 1.1 augustss }
2015 1.1 augustss
2016 1.1 augustss void
2017 1.168 augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
2018 1.1 augustss {
2019 1.92 tv char sbuf[128];
2020 1.92 tv
2021 1.168 augustss bitmask_snprintf((u_int32_t)O32TOH(std->td.td_flags),
2022 1.92 tv "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
2023 1.92 tv sbuf, sizeof(sbuf));
2024 1.92 tv
2025 1.195 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2026 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2027 1.107 augustss printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2028 1.120 augustss "nexttd=0x%08lx be=0x%08lx\n",
2029 1.107 augustss std, (u_long)std->physaddr, sbuf,
2030 1.168 augustss OHCI_TD_GET_DI(O32TOH(std->td.td_flags)),
2031 1.168 augustss OHCI_TD_GET_EC(O32TOH(std->td.td_flags)),
2032 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
2033 1.168 augustss (u_long)O32TOH(std->td.td_cbp),
2034 1.168 augustss (u_long)O32TOH(std->td.td_nexttd),
2035 1.168 augustss (u_long)O32TOH(std->td.td_be));
2036 1.1 augustss }
2037 1.1 augustss
2038 1.1 augustss void
2039 1.168 augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2040 1.83 augustss {
2041 1.83 augustss int i;
2042 1.83 augustss
2043 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
2044 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2045 1.107 augustss printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2046 1.120 augustss "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2047 1.107 augustss sitd, (u_long)sitd->physaddr,
2048 1.168 augustss OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
2049 1.168 augustss OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
2050 1.168 augustss OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
2051 1.168 augustss OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
2052 1.168 augustss (u_long)O32TOH(sitd->itd.itd_bp0),
2053 1.168 augustss (u_long)O32TOH(sitd->itd.itd_nextitd),
2054 1.168 augustss (u_long)O32TOH(sitd->itd.itd_be));
2055 1.83 augustss for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2056 1.107 augustss printf("offs[%d]=0x%04x ", i,
2057 1.168 augustss (u_int)O16TOH(sitd->itd.itd_offset[i]));
2058 1.107 augustss printf("\n");
2059 1.83 augustss }
2060 1.83 augustss
2061 1.83 augustss void
2062 1.168 augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2063 1.83 augustss {
2064 1.83 augustss for (; sitd; sitd = sitd->nextitd)
2065 1.168 augustss ohci_dump_itd(sc, sitd);
2066 1.83 augustss }
2067 1.83 augustss
2068 1.83 augustss void
2069 1.168 augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2070 1.1 augustss {
2071 1.92 tv char sbuf[128], sbuf2[128];
2072 1.92 tv
2073 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2074 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2075 1.168 augustss bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_flags),
2076 1.92 tv "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2077 1.92 tv sbuf, sizeof(sbuf));
2078 1.168 augustss bitmask_snprintf((u_int32_t)O32TOH(sed->ed.ed_headp),
2079 1.92 tv "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
2080 1.92 tv
2081 1.107 augustss printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2082 1.92 tv "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2083 1.120 augustss sed, (u_long)sed->physaddr,
2084 1.168 augustss OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
2085 1.168 augustss OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
2086 1.168 augustss OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
2087 1.168 augustss (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
2088 1.168 augustss (u_long)O32TOH(sed->ed.ed_headp),
2089 1.168 augustss (u_long)O32TOH(sed->ed.ed_nexted));
2090 1.1 augustss }
2091 1.1 augustss #endif
2092 1.1 augustss
2093 1.1 augustss usbd_status
2094 1.91 augustss ohci_open(usbd_pipe_handle pipe)
2095 1.1 augustss {
2096 1.1 augustss usbd_device_handle dev = pipe->device;
2097 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
2098 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2099 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2100 1.1 augustss u_int8_t addr = dev->address;
2101 1.60 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2102 1.1 augustss ohci_soft_ed_t *sed;
2103 1.1 augustss ohci_soft_td_t *std;
2104 1.60 augustss ohci_soft_itd_t *sitd;
2105 1.60 augustss ohci_physaddr_t tdphys;
2106 1.60 augustss u_int32_t fmt;
2107 1.53 augustss usbd_status err;
2108 1.1 augustss int s;
2109 1.64 augustss int ival;
2110 1.1 augustss
2111 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2112 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2113 1.81 augustss
2114 1.116 augustss if (sc->sc_dying)
2115 1.116 augustss return (USBD_IOERROR);
2116 1.116 augustss
2117 1.90 thorpej std = NULL;
2118 1.90 thorpej sed = NULL;
2119 1.90 thorpej
2120 1.1 augustss if (addr == sc->sc_addr) {
2121 1.1 augustss switch (ed->bEndpointAddress) {
2122 1.1 augustss case USB_CONTROL_ENDPOINT:
2123 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
2124 1.1 augustss break;
2125 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
2126 1.1 augustss pipe->methods = &ohci_root_intr_methods;
2127 1.1 augustss break;
2128 1.1 augustss default:
2129 1.1 augustss return (USBD_INVAL);
2130 1.1 augustss }
2131 1.1 augustss } else {
2132 1.1 augustss sed = ohci_alloc_sed(sc);
2133 1.53 augustss if (sed == NULL)
2134 1.1 augustss goto bad0;
2135 1.1 augustss opipe->sed = sed;
2136 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
2137 1.60 augustss sitd = ohci_alloc_sitd(sc);
2138 1.127 augustss if (sitd == NULL)
2139 1.60 augustss goto bad1;
2140 1.60 augustss opipe->tail.itd = sitd;
2141 1.76 tsutsui tdphys = sitd->physaddr;
2142 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
2143 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2144 1.83 augustss fmt |= OHCI_ED_DIR_IN;
2145 1.83 augustss else
2146 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
2147 1.60 augustss } else {
2148 1.60 augustss std = ohci_alloc_std(sc);
2149 1.127 augustss if (std == NULL)
2150 1.60 augustss goto bad1;
2151 1.60 augustss opipe->tail.td = std;
2152 1.76 tsutsui tdphys = std->physaddr;
2153 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2154 1.60 augustss }
2155 1.168 augustss sed->ed.ed_flags = HTOO32(
2156 1.120 augustss OHCI_ED_SET_FA(addr) |
2157 1.147 mycroft OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2158 1.109 augustss (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2159 1.109 augustss fmt |
2160 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2161 1.168 augustss sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys);
2162 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2163 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2164 1.1 augustss
2165 1.60 augustss switch (xfertype) {
2166 1.1 augustss case UE_CONTROL:
2167 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
2168 1.120 augustss err = usb_allocmem(&sc->sc_bus,
2169 1.120 augustss sizeof(usb_device_request_t),
2170 1.53 augustss 0, &opipe->u.ctl.reqdma);
2171 1.53 augustss if (err)
2172 1.1 augustss goto bad;
2173 1.1 augustss s = splusb();
2174 1.168 augustss ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2175 1.1 augustss splx(s);
2176 1.1 augustss break;
2177 1.1 augustss case UE_INTERRUPT:
2178 1.1 augustss pipe->methods = &ohci_device_intr_methods;
2179 1.64 augustss ival = pipe->interval;
2180 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
2181 1.64 augustss ival = ed->bInterval;
2182 1.64 augustss return (ohci_device_setintr(sc, opipe, ival));
2183 1.1 augustss case UE_ISOCHRONOUS:
2184 1.60 augustss pipe->methods = &ohci_device_isoc_methods;
2185 1.60 augustss return (ohci_setup_isoc(pipe));
2186 1.1 augustss case UE_BULK:
2187 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
2188 1.3 augustss s = splusb();
2189 1.168 augustss ohci_add_ed(sc, sed, sc->sc_bulk_head);
2190 1.3 augustss splx(s);
2191 1.3 augustss break;
2192 1.1 augustss }
2193 1.1 augustss }
2194 1.1 augustss return (USBD_NORMAL_COMPLETION);
2195 1.1 augustss
2196 1.1 augustss bad:
2197 1.90 thorpej if (std != NULL)
2198 1.90 thorpej ohci_free_std(sc, std);
2199 1.1 augustss bad1:
2200 1.90 thorpej if (sed != NULL)
2201 1.90 thorpej ohci_free_sed(sc, sed);
2202 1.1 augustss bad0:
2203 1.1 augustss return (USBD_NOMEM);
2204 1.120 augustss
2205 1.1 augustss }
2206 1.1 augustss
2207 1.1 augustss /*
2208 1.34 augustss * Close a reqular pipe.
2209 1.34 augustss * Assumes that there are no pending transactions.
2210 1.34 augustss */
2211 1.34 augustss void
2212 1.91 augustss ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2213 1.34 augustss {
2214 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2215 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2216 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
2217 1.34 augustss int s;
2218 1.34 augustss
2219 1.34 augustss s = splusb();
2220 1.34 augustss #ifdef DIAGNOSTIC
2221 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2222 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2223 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2224 1.34 augustss ohci_soft_td_t *std;
2225 1.168 augustss std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2226 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2227 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
2228 1.168 augustss (int)O32TOH(sed->ed.ed_headp),
2229 1.168 augustss (int)O32TOH(sed->ed.ed_tailp),
2230 1.34 augustss pipe, std);
2231 1.107 augustss #ifdef USB_DEBUG
2232 1.107 augustss usbd_dump_pipe(&opipe->pipe);
2233 1.107 augustss #endif
2234 1.106 augustss #ifdef OHCI_DEBUG
2235 1.168 augustss ohci_dump_ed(sc, sed);
2236 1.106 augustss if (std)
2237 1.168 augustss ohci_dump_td(sc, std);
2238 1.106 augustss #endif
2239 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
2240 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2241 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2242 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
2243 1.34 augustss }
2244 1.34 augustss #endif
2245 1.34 augustss ohci_rem_ed(sed, head);
2246 1.133 toshii /* Make sure the host controller is not touching this ED */
2247 1.133 toshii usb_delay_ms(&sc->sc_bus, 1);
2248 1.34 augustss splx(s);
2249 1.34 augustss ohci_free_sed(sc, opipe->sed);
2250 1.34 augustss }
2251 1.34 augustss
2252 1.120 augustss /*
2253 1.34 augustss * Abort a device request.
2254 1.34 augustss * If this routine is called at splusb() it guarantees that the request
2255 1.34 augustss * will be removed from the hardware scheduling and that the callback
2256 1.34 augustss * for it will be called with USBD_CANCELLED status.
2257 1.34 augustss * It's impossible to guarantee that the requested transfer will not
2258 1.34 augustss * have happened since the hardware runs concurrently.
2259 1.34 augustss * If the transaction has already happened we rely on the ordinary
2260 1.34 augustss * interrupt processing to process it.
2261 1.34 augustss */
2262 1.34 augustss void
2263 1.91 augustss ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2264 1.34 augustss {
2265 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2266 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
2267 1.106 augustss ohci_soft_ed_t *sed = opipe->sed;
2268 1.106 augustss ohci_soft_td_t *p, *n;
2269 1.106 augustss ohci_physaddr_t headp;
2270 1.106 augustss int s, hit;
2271 1.159 augustss int wake;
2272 1.34 augustss
2273 1.106 augustss DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2274 1.34 augustss
2275 1.116 augustss if (sc->sc_dying) {
2276 1.116 augustss /* If we're dying, just do the software part. */
2277 1.116 augustss s = splusb();
2278 1.116 augustss xfer->status = status; /* make software ignore it */
2279 1.121 tsutsui usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2280 1.116 augustss usb_transfer_complete(xfer);
2281 1.116 augustss splx(s);
2282 1.170 christos return;
2283 1.116 augustss }
2284 1.116 augustss
2285 1.106 augustss if (xfer->device->bus->intr_context || !curproc)
2286 1.128 provos panic("ohci_abort_xfer: not in process context");
2287 1.34 augustss
2288 1.106 augustss /*
2289 1.159 augustss * If an abort is already in progress then just wait for it to
2290 1.159 augustss * complete and return.
2291 1.159 augustss */
2292 1.159 augustss if (xfer->hcflags & UXFER_ABORTING) {
2293 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2294 1.159 augustss #ifdef DIAGNOSTIC
2295 1.159 augustss if (status == USBD_TIMEOUT)
2296 1.159 augustss printf("0hci_abort_xfer: TIMEOUT while aborting\n");
2297 1.159 augustss #endif
2298 1.159 augustss /* Override the status which might be USBD_TIMEOUT. */
2299 1.159 augustss xfer->status = status;
2300 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2301 1.159 augustss xfer->hcflags |= UXFER_ABORTWAIT;
2302 1.159 augustss while (xfer->hcflags & UXFER_ABORTING)
2303 1.159 augustss tsleep(&xfer->hcflags, PZERO, "ohciaw", 0);
2304 1.159 augustss return;
2305 1.159 augustss }
2306 1.159 augustss xfer->hcflags |= UXFER_ABORTING;
2307 1.159 augustss
2308 1.159 augustss /*
2309 1.106 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2310 1.106 augustss */
2311 1.106 augustss s = splusb();
2312 1.106 augustss xfer->status = status; /* make software ignore it */
2313 1.81 augustss usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2314 1.106 augustss splx(s);
2315 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2316 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2317 1.195 bouyer sizeof(sed->ed.ed_flags),
2318 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2319 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2320 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2321 1.195 bouyer sizeof(sed->ed.ed_flags),
2322 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2323 1.34 augustss
2324 1.120 augustss /*
2325 1.106 augustss * Step 2: Wait until we know hardware has finished any possible
2326 1.106 augustss * use of the xfer. Also make sure the soft interrupt routine
2327 1.106 augustss * has run.
2328 1.106 augustss */
2329 1.119 augustss usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2330 1.119 augustss s = splusb();
2331 1.131 augustss #ifdef USB_USE_SOFTINTR
2332 1.119 augustss sc->sc_softwake = 1;
2333 1.131 augustss #endif /* USB_USE_SOFTINTR */
2334 1.119 augustss usb_schedsoftintr(&sc->sc_bus);
2335 1.131 augustss #ifdef USB_USE_SOFTINTR
2336 1.119 augustss tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2337 1.131 augustss #endif /* USB_USE_SOFTINTR */
2338 1.119 augustss splx(s);
2339 1.119 augustss
2340 1.120 augustss /*
2341 1.106 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2342 1.106 augustss * The complication here is that the hardware may have executed
2343 1.106 augustss * beyond the xfer we're trying to abort. So as we're scanning
2344 1.106 augustss * the TDs of this xfer we check if the hardware points to
2345 1.106 augustss * any of them.
2346 1.106 augustss */
2347 1.106 augustss s = splusb(); /* XXX why? */
2348 1.53 augustss p = xfer->hcpriv;
2349 1.34 augustss #ifdef DIAGNOSTIC
2350 1.55 augustss if (p == NULL) {
2351 1.159 augustss xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2352 1.102 augustss splx(s);
2353 1.106 augustss printf("ohci_abort_xfer: hcpriv is NULL\n");
2354 1.38 augustss return;
2355 1.38 augustss }
2356 1.34 augustss #endif
2357 1.106 augustss #ifdef OHCI_DEBUG
2358 1.106 augustss if (ohcidebug > 1) {
2359 1.106 augustss DPRINTF(("ohci_abort_xfer: sed=\n"));
2360 1.168 augustss ohci_dump_ed(sc, sed);
2361 1.168 augustss ohci_dump_tds(sc, p);
2362 1.106 augustss }
2363 1.106 augustss #endif
2364 1.168 augustss headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2365 1.106 augustss hit = 0;
2366 1.53 augustss for (; p->xfer == xfer; p = n) {
2367 1.106 augustss hit |= headp == p->physaddr;
2368 1.38 augustss n = p->nexttd;
2369 1.38 augustss ohci_free_std(sc, p);
2370 1.34 augustss }
2371 1.106 augustss /* Zap headp register if hardware pointed inside the xfer. */
2372 1.106 augustss if (hit) {
2373 1.150 mycroft DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2374 1.168 augustss (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2375 1.168 augustss sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2376 1.195 bouyer usb_syncmem(&sed->dma,
2377 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_headp),
2378 1.195 bouyer sizeof(sed->ed.ed_headp),
2379 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2380 1.106 augustss } else {
2381 1.106 augustss DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2382 1.106 augustss }
2383 1.34 augustss
2384 1.106 augustss /*
2385 1.106 augustss * Step 4: Turn on hardware again.
2386 1.106 augustss */
2387 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2388 1.195 bouyer sizeof(sed->ed.ed_flags),
2389 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2390 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2391 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2392 1.195 bouyer sizeof(sed->ed.ed_flags),
2393 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2394 1.38 augustss
2395 1.106 augustss /*
2396 1.106 augustss * Step 5: Execute callback.
2397 1.106 augustss */
2398 1.159 augustss wake = xfer->hcflags & UXFER_ABORTWAIT;
2399 1.159 augustss xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2400 1.53 augustss usb_transfer_complete(xfer);
2401 1.159 augustss if (wake)
2402 1.159 augustss wakeup(&xfer->hcflags);
2403 1.38 augustss
2404 1.34 augustss splx(s);
2405 1.34 augustss }
2406 1.34 augustss
2407 1.34 augustss /*
2408 1.1 augustss * Data structures and routines to emulate the root hub.
2409 1.1 augustss */
2410 1.82 augustss Static usb_device_descriptor_t ohci_devd = {
2411 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2412 1.1 augustss UDESC_DEVICE, /* type */
2413 1.1 augustss {0x00, 0x01}, /* USB version */
2414 1.74 augustss UDCLASS_HUB, /* class */
2415 1.74 augustss UDSUBCLASS_HUB, /* subclass */
2416 1.109 augustss UDPROTO_FSHUB,
2417 1.1 augustss 64, /* max packet */
2418 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2419 1.1 augustss 1,2,0, /* string indicies */
2420 1.1 augustss 1 /* # of configurations */
2421 1.1 augustss };
2422 1.1 augustss
2423 1.182 drochner Static const usb_config_descriptor_t ohci_confd = {
2424 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2425 1.1 augustss UDESC_CONFIG,
2426 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2427 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2428 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2429 1.1 augustss 1,
2430 1.1 augustss 1,
2431 1.1 augustss 0,
2432 1.180 drochner UC_ATTR_MBO | UC_SELF_POWERED,
2433 1.1 augustss 0 /* max power */
2434 1.1 augustss };
2435 1.1 augustss
2436 1.182 drochner Static const usb_interface_descriptor_t ohci_ifcd = {
2437 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2438 1.1 augustss UDESC_INTERFACE,
2439 1.1 augustss 0,
2440 1.1 augustss 0,
2441 1.1 augustss 1,
2442 1.74 augustss UICLASS_HUB,
2443 1.74 augustss UISUBCLASS_HUB,
2444 1.109 augustss UIPROTO_FSHUB,
2445 1.1 augustss 0
2446 1.1 augustss };
2447 1.1 augustss
2448 1.182 drochner Static const usb_endpoint_descriptor_t ohci_endpd = {
2449 1.175 christos .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2450 1.175 christos .bDescriptorType = UDESC_ENDPOINT,
2451 1.175 christos .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2452 1.175 christos .bmAttributes = UE_INTERRUPT,
2453 1.175 christos .wMaxPacketSize = {8, 0}, /* max packet */
2454 1.175 christos .bInterval = 255,
2455 1.1 augustss };
2456 1.1 augustss
2457 1.182 drochner Static const usb_hub_descriptor_t ohci_hubd = {
2458 1.175 christos .bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2459 1.175 christos .bDescriptorType = UDESC_HUB,
2460 1.1 augustss };
2461 1.1 augustss
2462 1.1 augustss /*
2463 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2464 1.1 augustss */
2465 1.82 augustss Static usbd_status
2466 1.91 augustss ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2467 1.1 augustss {
2468 1.53 augustss usbd_status err;
2469 1.17 augustss
2470 1.46 augustss /* Insert last in queue. */
2471 1.53 augustss err = usb_insert_transfer(xfer);
2472 1.53 augustss if (err)
2473 1.53 augustss return (err);
2474 1.46 augustss
2475 1.46 augustss /* Pipe isn't running, start first */
2476 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2477 1.17 augustss }
2478 1.17 augustss
2479 1.82 augustss Static usbd_status
2480 1.91 augustss ohci_root_ctrl_start(usbd_xfer_handle xfer)
2481 1.17 augustss {
2482 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2483 1.1 augustss usb_device_request_t *req;
2484 1.52 augustss void *buf = NULL;
2485 1.1 augustss int port, i;
2486 1.46 augustss int s, len, value, index, l, totlen = 0;
2487 1.1 augustss usb_port_status_t ps;
2488 1.1 augustss usb_hub_descriptor_t hubd;
2489 1.53 augustss usbd_status err;
2490 1.1 augustss u_int32_t v;
2491 1.1 augustss
2492 1.83 augustss if (sc->sc_dying)
2493 1.83 augustss return (USBD_IOERROR);
2494 1.83 augustss
2495 1.42 augustss #ifdef DIAGNOSTIC
2496 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
2497 1.1 augustss /* XXX panic */
2498 1.1 augustss return (USBD_INVAL);
2499 1.42 augustss #endif
2500 1.53 augustss req = &xfer->request;
2501 1.1 augustss
2502 1.120 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2503 1.1 augustss req->bmRequestType, req->bRequest));
2504 1.1 augustss
2505 1.1 augustss len = UGETW(req->wLength);
2506 1.1 augustss value = UGETW(req->wValue);
2507 1.1 augustss index = UGETW(req->wIndex);
2508 1.43 augustss
2509 1.43 augustss if (len != 0)
2510 1.123 augustss buf = KERNADDR(&xfer->dmabuf, 0);
2511 1.43 augustss
2512 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2513 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2514 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2515 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2516 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2517 1.120 augustss /*
2518 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2519 1.1 augustss * for the integrated root hub.
2520 1.1 augustss */
2521 1.1 augustss break;
2522 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2523 1.1 augustss if (len > 0) {
2524 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2525 1.1 augustss totlen = 1;
2526 1.1 augustss }
2527 1.1 augustss break;
2528 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2529 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2530 1.171 christos if (len == 0)
2531 1.171 christos break;
2532 1.1 augustss switch(value >> 8) {
2533 1.1 augustss case UDESC_DEVICE:
2534 1.1 augustss if ((value & 0xff) != 0) {
2535 1.53 augustss err = USBD_IOERROR;
2536 1.1 augustss goto ret;
2537 1.1 augustss }
2538 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2539 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2540 1.1 augustss memcpy(buf, &ohci_devd, l);
2541 1.1 augustss break;
2542 1.1 augustss case UDESC_CONFIG:
2543 1.1 augustss if ((value & 0xff) != 0) {
2544 1.53 augustss err = USBD_IOERROR;
2545 1.1 augustss goto ret;
2546 1.1 augustss }
2547 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2548 1.1 augustss memcpy(buf, &ohci_confd, l);
2549 1.1 augustss buf = (char *)buf + l;
2550 1.1 augustss len -= l;
2551 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2552 1.1 augustss totlen += l;
2553 1.1 augustss memcpy(buf, &ohci_ifcd, l);
2554 1.1 augustss buf = (char *)buf + l;
2555 1.1 augustss len -= l;
2556 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2557 1.1 augustss totlen += l;
2558 1.1 augustss memcpy(buf, &ohci_endpd, l);
2559 1.1 augustss break;
2560 1.1 augustss case UDESC_STRING:
2561 1.186 drochner #define sd ((usb_string_descriptor_t *)buf)
2562 1.1 augustss switch (value & 0xff) {
2563 1.152 augustss case 0: /* Language table */
2564 1.186 drochner totlen = usb_makelangtbl(sd, len);
2565 1.152 augustss break;
2566 1.1 augustss case 1: /* Vendor */
2567 1.186 drochner totlen = usb_makestrdesc(sd, len,
2568 1.186 drochner sc->sc_vendor);
2569 1.1 augustss break;
2570 1.1 augustss case 2: /* Product */
2571 1.186 drochner totlen = usb_makestrdesc(sd, len,
2572 1.186 drochner "OHCI root hub");
2573 1.1 augustss break;
2574 1.1 augustss }
2575 1.186 drochner #undef sd
2576 1.1 augustss break;
2577 1.1 augustss default:
2578 1.53 augustss err = USBD_IOERROR;
2579 1.1 augustss goto ret;
2580 1.1 augustss }
2581 1.1 augustss break;
2582 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2583 1.1 augustss if (len > 0) {
2584 1.1 augustss *(u_int8_t *)buf = 0;
2585 1.1 augustss totlen = 1;
2586 1.1 augustss }
2587 1.1 augustss break;
2588 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2589 1.1 augustss if (len > 1) {
2590 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2591 1.1 augustss totlen = 2;
2592 1.1 augustss }
2593 1.1 augustss break;
2594 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2595 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2596 1.1 augustss if (len > 1) {
2597 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2598 1.1 augustss totlen = 2;
2599 1.1 augustss }
2600 1.1 augustss break;
2601 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2602 1.1 augustss if (value >= USB_MAX_DEVICES) {
2603 1.53 augustss err = USBD_IOERROR;
2604 1.1 augustss goto ret;
2605 1.1 augustss }
2606 1.1 augustss sc->sc_addr = value;
2607 1.1 augustss break;
2608 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2609 1.1 augustss if (value != 0 && value != 1) {
2610 1.53 augustss err = USBD_IOERROR;
2611 1.1 augustss goto ret;
2612 1.1 augustss }
2613 1.1 augustss sc->sc_conf = value;
2614 1.1 augustss break;
2615 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2616 1.1 augustss break;
2617 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2618 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2619 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2620 1.53 augustss err = USBD_IOERROR;
2621 1.1 augustss goto ret;
2622 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2623 1.1 augustss break;
2624 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2625 1.1 augustss break;
2626 1.1 augustss /* Hub requests */
2627 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2628 1.1 augustss break;
2629 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2630 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2631 1.14 augustss "port=%d feature=%d\n",
2632 1.1 augustss index, value));
2633 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2634 1.53 augustss err = USBD_IOERROR;
2635 1.1 augustss goto ret;
2636 1.1 augustss }
2637 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2638 1.1 augustss switch(value) {
2639 1.1 augustss case UHF_PORT_ENABLE:
2640 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2641 1.1 augustss break;
2642 1.1 augustss case UHF_PORT_SUSPEND:
2643 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2644 1.1 augustss break;
2645 1.1 augustss case UHF_PORT_POWER:
2646 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2647 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2648 1.1 augustss break;
2649 1.1 augustss case UHF_C_PORT_CONNECTION:
2650 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2651 1.1 augustss break;
2652 1.1 augustss case UHF_C_PORT_ENABLE:
2653 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2654 1.1 augustss break;
2655 1.1 augustss case UHF_C_PORT_SUSPEND:
2656 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2657 1.1 augustss break;
2658 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2659 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2660 1.1 augustss break;
2661 1.1 augustss case UHF_C_PORT_RESET:
2662 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2663 1.1 augustss break;
2664 1.1 augustss default:
2665 1.53 augustss err = USBD_IOERROR;
2666 1.1 augustss goto ret;
2667 1.1 augustss }
2668 1.1 augustss switch(value) {
2669 1.1 augustss case UHF_C_PORT_CONNECTION:
2670 1.1 augustss case UHF_C_PORT_ENABLE:
2671 1.1 augustss case UHF_C_PORT_SUSPEND:
2672 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2673 1.1 augustss case UHF_C_PORT_RESET:
2674 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2675 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2676 1.157 mycroft ohci_rhsc_enable(sc);
2677 1.1 augustss break;
2678 1.1 augustss default:
2679 1.1 augustss break;
2680 1.1 augustss }
2681 1.1 augustss break;
2682 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2683 1.171 christos if (len == 0)
2684 1.171 christos break;
2685 1.146 toshii if ((value & 0xff) != 0) {
2686 1.53 augustss err = USBD_IOERROR;
2687 1.1 augustss goto ret;
2688 1.1 augustss }
2689 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2690 1.1 augustss hubd = ohci_hubd;
2691 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2692 1.15 augustss USETW(hubd.wHubCharacteristics,
2693 1.120 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2694 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2695 1.1 augustss /* XXX overcurrent */
2696 1.1 augustss );
2697 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2698 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2699 1.120 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2700 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
2701 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2702 1.1 augustss l = min(len, hubd.bDescLength);
2703 1.1 augustss totlen = l;
2704 1.1 augustss memcpy(buf, &hubd, l);
2705 1.1 augustss break;
2706 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2707 1.1 augustss if (len != 4) {
2708 1.53 augustss err = USBD_IOERROR;
2709 1.1 augustss goto ret;
2710 1.1 augustss }
2711 1.1 augustss memset(buf, 0, len); /* ? XXX */
2712 1.1 augustss totlen = len;
2713 1.1 augustss break;
2714 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2715 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2716 1.1 augustss index));
2717 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2718 1.53 augustss err = USBD_IOERROR;
2719 1.1 augustss goto ret;
2720 1.1 augustss }
2721 1.1 augustss if (len != 4) {
2722 1.53 augustss err = USBD_IOERROR;
2723 1.1 augustss goto ret;
2724 1.1 augustss }
2725 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2726 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2727 1.1 augustss v));
2728 1.1 augustss USETW(ps.wPortStatus, v);
2729 1.1 augustss USETW(ps.wPortChange, v >> 16);
2730 1.1 augustss l = min(len, sizeof ps);
2731 1.1 augustss memcpy(buf, &ps, l);
2732 1.1 augustss totlen = l;
2733 1.1 augustss break;
2734 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2735 1.53 augustss err = USBD_IOERROR;
2736 1.1 augustss goto ret;
2737 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2738 1.1 augustss break;
2739 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2740 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2741 1.53 augustss err = USBD_IOERROR;
2742 1.1 augustss goto ret;
2743 1.1 augustss }
2744 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2745 1.1 augustss switch(value) {
2746 1.1 augustss case UHF_PORT_ENABLE:
2747 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2748 1.1 augustss break;
2749 1.1 augustss case UHF_PORT_SUSPEND:
2750 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2751 1.1 augustss break;
2752 1.1 augustss case UHF_PORT_RESET:
2753 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2754 1.14 augustss index));
2755 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2756 1.110 augustss for (i = 0; i < 5; i++) {
2757 1.110 augustss usb_delay_ms(&sc->sc_bus,
2758 1.110 augustss USB_PORT_ROOT_RESET_DELAY);
2759 1.116 augustss if (sc->sc_dying) {
2760 1.116 augustss err = USBD_IOERROR;
2761 1.116 augustss goto ret;
2762 1.116 augustss }
2763 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2764 1.1 augustss break;
2765 1.1 augustss }
2766 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2767 1.1 augustss index, OREAD4(sc, port)));
2768 1.1 augustss break;
2769 1.1 augustss case UHF_PORT_POWER:
2770 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2771 1.14 augustss "%d\n", index));
2772 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2773 1.1 augustss break;
2774 1.1 augustss default:
2775 1.53 augustss err = USBD_IOERROR;
2776 1.1 augustss goto ret;
2777 1.1 augustss }
2778 1.1 augustss break;
2779 1.1 augustss default:
2780 1.53 augustss err = USBD_IOERROR;
2781 1.1 augustss goto ret;
2782 1.1 augustss }
2783 1.53 augustss xfer->actlen = totlen;
2784 1.53 augustss err = USBD_NORMAL_COMPLETION;
2785 1.1 augustss ret:
2786 1.53 augustss xfer->status = err;
2787 1.46 augustss s = splusb();
2788 1.53 augustss usb_transfer_complete(xfer);
2789 1.46 augustss splx(s);
2790 1.1 augustss return (USBD_IN_PROGRESS);
2791 1.1 augustss }
2792 1.1 augustss
2793 1.1 augustss /* Abort a root control request. */
2794 1.82 augustss Static void
2795 1.179 christos ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2796 1.1 augustss {
2797 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2798 1.1 augustss }
2799 1.1 augustss
2800 1.1 augustss /* Close the root pipe. */
2801 1.82 augustss Static void
2802 1.179 christos ohci_root_ctrl_close(usbd_pipe_handle pipe)
2803 1.1 augustss {
2804 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2805 1.34 augustss /* Nothing to do. */
2806 1.1 augustss }
2807 1.1 augustss
2808 1.82 augustss Static usbd_status
2809 1.91 augustss ohci_root_intr_transfer(usbd_xfer_handle xfer)
2810 1.1 augustss {
2811 1.53 augustss usbd_status err;
2812 1.17 augustss
2813 1.46 augustss /* Insert last in queue. */
2814 1.53 augustss err = usb_insert_transfer(xfer);
2815 1.53 augustss if (err)
2816 1.53 augustss return (err);
2817 1.46 augustss
2818 1.46 augustss /* Pipe isn't running, start first */
2819 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2820 1.17 augustss }
2821 1.17 augustss
2822 1.82 augustss Static usbd_status
2823 1.91 augustss ohci_root_intr_start(usbd_xfer_handle xfer)
2824 1.17 augustss {
2825 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2826 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2827 1.1 augustss
2828 1.83 augustss if (sc->sc_dying)
2829 1.83 augustss return (USBD_IOERROR);
2830 1.83 augustss
2831 1.53 augustss sc->sc_intrxfer = xfer;
2832 1.1 augustss
2833 1.1 augustss return (USBD_IN_PROGRESS);
2834 1.1 augustss }
2835 1.1 augustss
2836 1.3 augustss /* Abort a root interrupt request. */
2837 1.82 augustss Static void
2838 1.91 augustss ohci_root_intr_abort(usbd_xfer_handle xfer)
2839 1.1 augustss {
2840 1.53 augustss int s;
2841 1.53 augustss
2842 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2843 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2844 1.53 augustss xfer->pipe->intrxfer = NULL;
2845 1.51 augustss }
2846 1.53 augustss xfer->status = USBD_CANCELLED;
2847 1.53 augustss s = splusb();
2848 1.53 augustss usb_transfer_complete(xfer);
2849 1.53 augustss splx(s);
2850 1.1 augustss }
2851 1.1 augustss
2852 1.1 augustss /* Close the root pipe. */
2853 1.82 augustss Static void
2854 1.91 augustss ohci_root_intr_close(usbd_pipe_handle pipe)
2855 1.1 augustss {
2856 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2857 1.120 augustss
2858 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2859 1.34 augustss
2860 1.53 augustss sc->sc_intrxfer = NULL;
2861 1.1 augustss }
2862 1.1 augustss
2863 1.1 augustss /************************/
2864 1.1 augustss
2865 1.82 augustss Static usbd_status
2866 1.91 augustss ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2867 1.1 augustss {
2868 1.53 augustss usbd_status err;
2869 1.17 augustss
2870 1.46 augustss /* Insert last in queue. */
2871 1.53 augustss err = usb_insert_transfer(xfer);
2872 1.53 augustss if (err)
2873 1.53 augustss return (err);
2874 1.46 augustss
2875 1.46 augustss /* Pipe isn't running, start first */
2876 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2877 1.17 augustss }
2878 1.17 augustss
2879 1.82 augustss Static usbd_status
2880 1.91 augustss ohci_device_ctrl_start(usbd_xfer_handle xfer)
2881 1.17 augustss {
2882 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2883 1.53 augustss usbd_status err;
2884 1.1 augustss
2885 1.83 augustss if (sc->sc_dying)
2886 1.83 augustss return (USBD_IOERROR);
2887 1.83 augustss
2888 1.42 augustss #ifdef DIAGNOSTIC
2889 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2890 1.1 augustss /* XXX panic */
2891 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2892 1.1 augustss return (USBD_INVAL);
2893 1.1 augustss }
2894 1.42 augustss #endif
2895 1.1 augustss
2896 1.53 augustss err = ohci_device_request(xfer);
2897 1.53 augustss if (err)
2898 1.53 augustss return (err);
2899 1.1 augustss
2900 1.6 augustss if (sc->sc_bus.use_polling)
2901 1.53 augustss ohci_waitintr(sc, xfer);
2902 1.1 augustss return (USBD_IN_PROGRESS);
2903 1.1 augustss }
2904 1.1 augustss
2905 1.1 augustss /* Abort a device control request. */
2906 1.82 augustss Static void
2907 1.91 augustss ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2908 1.1 augustss {
2909 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2910 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2911 1.1 augustss }
2912 1.1 augustss
2913 1.1 augustss /* Close a device control pipe. */
2914 1.82 augustss Static void
2915 1.91 augustss ohci_device_ctrl_close(usbd_pipe_handle pipe)
2916 1.1 augustss {
2917 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2918 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2919 1.1 augustss
2920 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2921 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2922 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2923 1.3 augustss }
2924 1.3 augustss
2925 1.3 augustss /************************/
2926 1.37 augustss
2927 1.82 augustss Static void
2928 1.91 augustss ohci_device_clear_toggle(usbd_pipe_handle pipe)
2929 1.37 augustss {
2930 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2931 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2932 1.37 augustss
2933 1.168 augustss opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2934 1.37 augustss }
2935 1.37 augustss
2936 1.82 augustss Static void
2937 1.179 christos ohci_noop(usbd_pipe_handle pipe)
2938 1.37 augustss {
2939 1.37 augustss }
2940 1.3 augustss
2941 1.82 augustss Static usbd_status
2942 1.91 augustss ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2943 1.3 augustss {
2944 1.53 augustss usbd_status err;
2945 1.17 augustss
2946 1.46 augustss /* Insert last in queue. */
2947 1.53 augustss err = usb_insert_transfer(xfer);
2948 1.53 augustss if (err)
2949 1.53 augustss return (err);
2950 1.46 augustss
2951 1.46 augustss /* Pipe isn't running, start first */
2952 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2953 1.17 augustss }
2954 1.17 augustss
2955 1.82 augustss Static usbd_status
2956 1.91 augustss ohci_device_bulk_start(usbd_xfer_handle xfer)
2957 1.17 augustss {
2958 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2959 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2960 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
2961 1.3 augustss int addr = dev->address;
2962 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2963 1.3 augustss ohci_soft_ed_t *sed;
2964 1.40 augustss int s, len, isread, endpt;
2965 1.53 augustss usbd_status err;
2966 1.3 augustss
2967 1.83 augustss if (sc->sc_dying)
2968 1.83 augustss return (USBD_IOERROR);
2969 1.83 augustss
2970 1.34 augustss #ifdef DIAGNOSTIC
2971 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
2972 1.3 augustss /* XXX panic */
2973 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2974 1.3 augustss return (USBD_INVAL);
2975 1.3 augustss }
2976 1.34 augustss #endif
2977 1.3 augustss
2978 1.53 augustss len = xfer->length;
2979 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2980 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2981 1.3 augustss sed = opipe->sed;
2982 1.3 augustss
2983 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2984 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2985 1.40 augustss endpt));
2986 1.34 augustss
2987 1.32 augustss opipe->u.bulk.isread = isread;
2988 1.3 augustss opipe->u.bulk.length = len;
2989 1.3 augustss
2990 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2991 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2992 1.3 augustss /* Update device address */
2993 1.168 augustss sed->ed.ed_flags = HTOO32(
2994 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2995 1.16 augustss OHCI_ED_SET_FA(addr));
2996 1.3 augustss
2997 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2998 1.60 augustss data = opipe->tail.td;
2999 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
3000 1.77 augustss data, &tail);
3001 1.77 augustss /* We want interrupt at the end of the transfer. */
3002 1.168 augustss tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
3003 1.168 augustss tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
3004 1.77 augustss tail->flags |= OHCI_CALL_DONE;
3005 1.77 augustss tail = tail->nexttd; /* point at sentinel */
3006 1.195 bouyer usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
3007 1.195 bouyer sizeof(tail->td.td_flags),
3008 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3009 1.53 augustss if (err)
3010 1.53 augustss return (err);
3011 1.48 augustss
3012 1.53 augustss tail->xfer = NULL;
3013 1.53 augustss xfer->hcpriv = data;
3014 1.3 augustss
3015 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
3016 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
3017 1.168 augustss (int)O32TOH(sed->ed.ed_flags),
3018 1.168 augustss (int)O32TOH(data->td.td_flags),
3019 1.168 augustss (int)O32TOH(data->td.td_cbp),
3020 1.168 augustss (int)O32TOH(data->td.td_be)));
3021 1.34 augustss
3022 1.52 augustss #ifdef OHCI_DEBUG
3023 1.75 augustss if (ohcidebug > 5) {
3024 1.168 augustss ohci_dump_ed(sc, sed);
3025 1.168 augustss ohci_dump_tds(sc, data);
3026 1.34 augustss }
3027 1.34 augustss #endif
3028 1.34 augustss
3029 1.3 augustss /* Insert ED in schedule */
3030 1.3 augustss s = splusb();
3031 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
3032 1.53 augustss tdp->xfer = xfer;
3033 1.48 augustss }
3034 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3035 1.60 augustss opipe->tail.td = tail;
3036 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3037 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3038 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3039 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3040 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
3041 1.139 tsutsui usb_callout(xfer->timeout_handle, mstohz(xfer->timeout),
3042 1.80 augustss ohci_timeout, xfer);
3043 1.15 augustss }
3044 1.34 augustss
3045 1.52 augustss #if 0
3046 1.52 augustss /* This goes wrong if we are too slow. */
3047 1.75 augustss if (ohcidebug > 10) {
3048 1.75 augustss delay(10000);
3049 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3050 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3051 1.168 augustss ohci_dump_ed(sc, sed);
3052 1.168 augustss ohci_dump_tds(sc, data);
3053 1.34 augustss }
3054 1.34 augustss #endif
3055 1.34 augustss
3056 1.3 augustss splx(s);
3057 1.3 augustss
3058 1.3 augustss return (USBD_IN_PROGRESS);
3059 1.3 augustss }
3060 1.3 augustss
3061 1.82 augustss Static void
3062 1.91 augustss ohci_device_bulk_abort(usbd_xfer_handle xfer)
3063 1.3 augustss {
3064 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3065 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3066 1.3 augustss }
3067 1.3 augustss
3068 1.120 augustss /*
3069 1.34 augustss * Close a device bulk pipe.
3070 1.34 augustss */
3071 1.82 augustss Static void
3072 1.91 augustss ohci_device_bulk_close(usbd_pipe_handle pipe)
3073 1.3 augustss {
3074 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3075 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3076 1.3 augustss
3077 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3078 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
3079 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3080 1.1 augustss }
3081 1.1 augustss
3082 1.1 augustss /************************/
3083 1.1 augustss
3084 1.82 augustss Static usbd_status
3085 1.91 augustss ohci_device_intr_transfer(usbd_xfer_handle xfer)
3086 1.17 augustss {
3087 1.53 augustss usbd_status err;
3088 1.17 augustss
3089 1.46 augustss /* Insert last in queue. */
3090 1.53 augustss err = usb_insert_transfer(xfer);
3091 1.53 augustss if (err)
3092 1.53 augustss return (err);
3093 1.46 augustss
3094 1.46 augustss /* Pipe isn't running, start first */
3095 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3096 1.17 augustss }
3097 1.17 augustss
3098 1.82 augustss Static usbd_status
3099 1.91 augustss ohci_device_intr_start(usbd_xfer_handle xfer)
3100 1.1 augustss {
3101 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3102 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
3103 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3104 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
3105 1.48 augustss ohci_soft_td_t *data, *tail;
3106 1.165 skrll int s, len, isread, endpt;
3107 1.1 augustss
3108 1.83 augustss if (sc->sc_dying)
3109 1.83 augustss return (USBD_IOERROR);
3110 1.83 augustss
3111 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3112 1.14 augustss "flags=%d priv=%p\n",
3113 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
3114 1.1 augustss
3115 1.42 augustss #ifdef DIAGNOSTIC
3116 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
3117 1.128 provos panic("ohci_device_intr_transfer: a request");
3118 1.42 augustss #endif
3119 1.1 augustss
3120 1.53 augustss len = xfer->length;
3121 1.165 skrll endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3122 1.165 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3123 1.1 augustss
3124 1.60 augustss data = opipe->tail.td;
3125 1.1 augustss tail = ohci_alloc_std(sc);
3126 1.55 augustss if (tail == NULL)
3127 1.43 augustss return (USBD_NOMEM);
3128 1.53 augustss tail->xfer = NULL;
3129 1.1 augustss
3130 1.168 augustss data->td.td_flags = HTOO32(
3131 1.165 skrll isread ? OHCI_TD_IN : OHCI_TD_OUT |
3132 1.165 skrll OHCI_TD_NOCC |
3133 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3134 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
3135 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
3136 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3137 1.48 augustss data->nexttd = tail;
3138 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
3139 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3140 1.48 augustss data->len = len;
3141 1.53 augustss data->xfer = xfer;
3142 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3143 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
3144 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3145 1.53 augustss xfer->hcpriv = data;
3146 1.1 augustss
3147 1.52 augustss #ifdef OHCI_DEBUG
3148 1.1 augustss if (ohcidebug > 5) {
3149 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
3150 1.168 augustss ohci_dump_ed(sc, sed);
3151 1.168 augustss ohci_dump_tds(sc, data);
3152 1.1 augustss }
3153 1.1 augustss #endif
3154 1.1 augustss
3155 1.1 augustss /* Insert ED in schedule */
3156 1.1 augustss s = splusb();
3157 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3158 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3159 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3160 1.60 augustss opipe->tail.td = tail;
3161 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3162 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3163 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3164 1.1 augustss
3165 1.52 augustss #if 0
3166 1.52 augustss /*
3167 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
3168 1.52 augustss * because false references are followed due to the fact that the
3169 1.52 augustss * TD is gone.
3170 1.52 augustss */
3171 1.1 augustss if (ohcidebug > 5) {
3172 1.55 augustss usb_delay_ms(&sc->sc_bus, 5);
3173 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3174 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3175 1.168 augustss ohci_dump_ed(sc, sed);
3176 1.168 augustss ohci_dump_tds(sc, data);
3177 1.1 augustss }
3178 1.1 augustss #endif
3179 1.26 augustss splx(s);
3180 1.1 augustss
3181 1.1 augustss return (USBD_IN_PROGRESS);
3182 1.1 augustss }
3183 1.1 augustss
3184 1.1 augustss /* Abort a device control request. */
3185 1.82 augustss Static void
3186 1.91 augustss ohci_device_intr_abort(usbd_xfer_handle xfer)
3187 1.1 augustss {
3188 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
3189 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
3190 1.55 augustss xfer->pipe->intrxfer = NULL;
3191 1.1 augustss }
3192 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3193 1.1 augustss }
3194 1.1 augustss
3195 1.1 augustss /* Close a device interrupt pipe. */
3196 1.82 augustss Static void
3197 1.91 augustss ohci_device_intr_close(usbd_pipe_handle pipe)
3198 1.1 augustss {
3199 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3200 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3201 1.1 augustss int nslots = opipe->u.intr.nslots;
3202 1.1 augustss int pos = opipe->u.intr.pos;
3203 1.1 augustss int j;
3204 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
3205 1.1 augustss int s;
3206 1.1 augustss
3207 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3208 1.1 augustss pipe, nslots, pos));
3209 1.1 augustss s = splusb();
3210 1.195 bouyer usb_syncmem(&sed->dma, sed->offs,
3211 1.195 bouyer sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3212 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3213 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3214 1.195 bouyer sizeof(sed->ed.ed_flags),
3215 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3216 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3217 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3218 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
3219 1.1 augustss
3220 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3221 1.172 christos continue;
3222 1.53 augustss #ifdef DIAGNOSTIC
3223 1.173 christos if (p == NULL)
3224 1.128 provos panic("ohci_device_intr_close: ED not found");
3225 1.53 augustss #endif
3226 1.173 christos p->next = sed->next;
3227 1.173 christos p->ed.ed_nexted = sed->ed.ed_nexted;
3228 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3229 1.195 bouyer sizeof(p->ed.ed_nexted),
3230 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3231 1.1 augustss splx(s);
3232 1.1 augustss
3233 1.1 augustss for (j = 0; j < nslots; j++)
3234 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3235 1.1 augustss
3236 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3237 1.1 augustss ohci_free_sed(sc, opipe->sed);
3238 1.1 augustss }
3239 1.1 augustss
3240 1.82 augustss Static usbd_status
3241 1.91 augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3242 1.1 augustss {
3243 1.1 augustss int i, j, s, best;
3244 1.1 augustss u_int npoll, slow, shigh, nslots;
3245 1.1 augustss u_int bestbw, bw;
3246 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
3247 1.1 augustss
3248 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3249 1.1 augustss if (ival == 0) {
3250 1.1 augustss printf("ohci_setintr: 0 interval\n");
3251 1.1 augustss return (USBD_INVAL);
3252 1.1 augustss }
3253 1.1 augustss
3254 1.1 augustss npoll = OHCI_NO_INTRS;
3255 1.1 augustss while (npoll > ival)
3256 1.1 augustss npoll /= 2;
3257 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3258 1.1 augustss
3259 1.1 augustss /*
3260 1.1 augustss * We now know which level in the tree the ED must go into.
3261 1.1 augustss * Figure out which slot has most bandwidth left over.
3262 1.1 augustss * Slots to examine:
3263 1.1 augustss * npoll
3264 1.1 augustss * 1 0
3265 1.1 augustss * 2 1 2
3266 1.1 augustss * 4 3 4 5 6
3267 1.1 augustss * 8 7 8 9 10 11 12 13 14
3268 1.1 augustss * N (N-1) .. (N-1+N-1)
3269 1.1 augustss */
3270 1.1 augustss slow = npoll-1;
3271 1.1 augustss shigh = slow + npoll;
3272 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
3273 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3274 1.1 augustss bw = 0;
3275 1.1 augustss for (j = 0; j < nslots; j++)
3276 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3277 1.1 augustss if (bw < bestbw) {
3278 1.1 augustss best = i;
3279 1.1 augustss bestbw = bw;
3280 1.1 augustss }
3281 1.1 augustss }
3282 1.120 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3283 1.1 augustss best, slow, shigh, bestbw));
3284 1.1 augustss
3285 1.1 augustss s = splusb();
3286 1.1 augustss hsed = sc->sc_eds[best];
3287 1.1 augustss sed->next = hsed->next;
3288 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3289 1.195 bouyer sizeof(hsed->ed.ed_flags),
3290 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3291 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
3292 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3293 1.195 bouyer sizeof(sed->ed.ed_flags),
3294 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3295 1.1 augustss hsed->next = sed;
3296 1.168 augustss hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3297 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3298 1.195 bouyer sizeof(hsed->ed.ed_flags),
3299 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3300 1.1 augustss splx(s);
3301 1.1 augustss
3302 1.1 augustss for (j = 0; j < nslots; j++)
3303 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3304 1.1 augustss opipe->u.intr.nslots = nslots;
3305 1.1 augustss opipe->u.intr.pos = best;
3306 1.1 augustss
3307 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3308 1.1 augustss return (USBD_NORMAL_COMPLETION);
3309 1.60 augustss }
3310 1.60 augustss
3311 1.60 augustss /***********************/
3312 1.60 augustss
3313 1.60 augustss usbd_status
3314 1.91 augustss ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3315 1.60 augustss {
3316 1.60 augustss usbd_status err;
3317 1.60 augustss
3318 1.60 augustss DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3319 1.60 augustss
3320 1.60 augustss /* Put it on our queue, */
3321 1.60 augustss err = usb_insert_transfer(xfer);
3322 1.60 augustss
3323 1.60 augustss /* bail out on error, */
3324 1.60 augustss if (err && err != USBD_IN_PROGRESS)
3325 1.60 augustss return (err);
3326 1.60 augustss
3327 1.60 augustss /* XXX should check inuse here */
3328 1.60 augustss
3329 1.60 augustss /* insert into schedule, */
3330 1.60 augustss ohci_device_isoc_enter(xfer);
3331 1.60 augustss
3332 1.83 augustss /* and start if the pipe wasn't running */
3333 1.60 augustss if (!err)
3334 1.60 augustss ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3335 1.60 augustss
3336 1.60 augustss return (err);
3337 1.60 augustss }
3338 1.60 augustss
3339 1.60 augustss void
3340 1.91 augustss ohci_device_isoc_enter(usbd_xfer_handle xfer)
3341 1.60 augustss {
3342 1.61 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3343 1.61 augustss usbd_device_handle dev = opipe->pipe.device;
3344 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3345 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
3346 1.61 augustss struct iso *iso = &opipe->u.iso;
3347 1.120 augustss ohci_soft_itd_t *sitd, *nsitd;
3348 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
3349 1.61 augustss int i, ncur, nframes;
3350 1.61 augustss int s;
3351 1.61 augustss
3352 1.83 augustss DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3353 1.83 augustss "nframes=%d\n",
3354 1.83 augustss iso->inuse, iso->next, xfer, xfer->nframes));
3355 1.83 augustss
3356 1.83 augustss if (sc->sc_dying)
3357 1.83 augustss return;
3358 1.83 augustss
3359 1.83 augustss if (iso->next == -1) {
3360 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
3361 1.168 augustss iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3362 1.120 augustss DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3363 1.83 augustss iso->next));
3364 1.83 augustss }
3365 1.83 augustss
3366 1.61 augustss sitd = opipe->tail.itd;
3367 1.125 augustss buf = DMAADDR(&xfer->dmabuf, 0);
3368 1.83 augustss bp0 = OHCI_PAGE(buf);
3369 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
3370 1.61 augustss nframes = xfer->nframes;
3371 1.83 augustss xfer->hcpriv = sitd;
3372 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
3373 1.83 augustss noffs = offs + xfer->frlengths[i];
3374 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3375 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3376 1.120 augustss
3377 1.83 augustss /* Allocate next ITD */
3378 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3379 1.61 augustss if (nsitd == NULL) {
3380 1.61 augustss /* XXX what now? */
3381 1.83 augustss printf("%s: isoc TD alloc failed\n",
3382 1.190 drochner device_xname(sc->sc_dev));
3383 1.61 augustss return;
3384 1.61 augustss }
3385 1.83 augustss
3386 1.83 augustss /* Fill current ITD */
3387 1.168 augustss sitd->itd.itd_flags = HTOO32(
3388 1.120 augustss OHCI_ITD_NOCC |
3389 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3390 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
3391 1.83 augustss OHCI_ITD_SET_FC(ncur));
3392 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3393 1.83 augustss sitd->nextitd = nsitd;
3394 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3395 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3396 1.83 augustss sitd->xfer = xfer;
3397 1.83 augustss sitd->flags = 0;
3398 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3399 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3400 1.83 augustss
3401 1.61 augustss sitd = nsitd;
3402 1.120 augustss iso->next = iso->next + ncur;
3403 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
3404 1.61 augustss ncur = 0;
3405 1.61 augustss }
3406 1.168 augustss sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3407 1.83 augustss offs = noffs;
3408 1.61 augustss }
3409 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3410 1.61 augustss if (nsitd == NULL) {
3411 1.61 augustss /* XXX what now? */
3412 1.120 augustss printf("%s: isoc TD alloc failed\n",
3413 1.190 drochner device_xname(sc->sc_dev));
3414 1.61 augustss return;
3415 1.61 augustss }
3416 1.83 augustss /* Fixup last used ITD */
3417 1.168 augustss sitd->itd.itd_flags = HTOO32(
3418 1.120 augustss OHCI_ITD_NOCC |
3419 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3420 1.61 augustss OHCI_ITD_SET_DI(0) |
3421 1.61 augustss OHCI_ITD_SET_FC(ncur));
3422 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3423 1.83 augustss sitd->nextitd = nsitd;
3424 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3425 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3426 1.83 augustss sitd->xfer = xfer;
3427 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3428 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3429 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3430 1.83 augustss
3431 1.61 augustss iso->next = iso->next + ncur;
3432 1.83 augustss iso->inuse += nframes;
3433 1.83 augustss
3434 1.83 augustss xfer->actlen = offs; /* XXX pretend we did it all */
3435 1.83 augustss
3436 1.83 augustss xfer->status = USBD_IN_PROGRESS;
3437 1.83 augustss
3438 1.83 augustss #ifdef OHCI_DEBUG
3439 1.83 augustss if (ohcidebug > 5) {
3440 1.83 augustss DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3441 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3442 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3443 1.168 augustss ohci_dump_ed(sc, sed);
3444 1.83 augustss }
3445 1.83 augustss #endif
3446 1.61 augustss
3447 1.83 augustss s = splusb();
3448 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3449 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3450 1.168 augustss sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3451 1.61 augustss opipe->tail.itd = nsitd;
3452 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3453 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3454 1.195 bouyer sizeof(sed->ed.ed_flags),
3455 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3456 1.61 augustss splx(s);
3457 1.83 augustss
3458 1.83 augustss #ifdef OHCI_DEBUG
3459 1.83 augustss if (ohcidebug > 5) {
3460 1.83 augustss delay(150000);
3461 1.83 augustss DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3462 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3463 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3464 1.168 augustss ohci_dump_ed(sc, sed);
3465 1.83 augustss }
3466 1.83 augustss #endif
3467 1.60 augustss }
3468 1.60 augustss
3469 1.60 augustss usbd_status
3470 1.91 augustss ohci_device_isoc_start(usbd_xfer_handle xfer)
3471 1.60 augustss {
3472 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3473 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3474 1.83 augustss
3475 1.83 augustss DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3476 1.83 augustss
3477 1.83 augustss if (sc->sc_dying)
3478 1.83 augustss return (USBD_IOERROR);
3479 1.83 augustss
3480 1.83 augustss #ifdef DIAGNOSTIC
3481 1.83 augustss if (xfer->status != USBD_IN_PROGRESS)
3482 1.121 tsutsui printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3483 1.83 augustss #endif
3484 1.83 augustss
3485 1.83 augustss /* XXX anything to do? */
3486 1.83 augustss
3487 1.83 augustss return (USBD_IN_PROGRESS);
3488 1.60 augustss }
3489 1.60 augustss
3490 1.60 augustss void
3491 1.91 augustss ohci_device_isoc_abort(usbd_xfer_handle xfer)
3492 1.60 augustss {
3493 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3494 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3495 1.83 augustss ohci_soft_ed_t *sed;
3496 1.83 augustss ohci_soft_itd_t *sitd;
3497 1.83 augustss int s;
3498 1.83 augustss
3499 1.83 augustss s = splusb();
3500 1.83 augustss
3501 1.83 augustss DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3502 1.83 augustss
3503 1.83 augustss /* Transfer is already done. */
3504 1.120 augustss if (xfer->status != USBD_NOT_STARTED &&
3505 1.83 augustss xfer->status != USBD_IN_PROGRESS) {
3506 1.83 augustss splx(s);
3507 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3508 1.83 augustss return;
3509 1.83 augustss }
3510 1.83 augustss
3511 1.83 augustss /* Give xfer the requested abort code. */
3512 1.83 augustss xfer->status = USBD_CANCELLED;
3513 1.83 augustss
3514 1.83 augustss sed = opipe->sed;
3515 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3516 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3517 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3518 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3519 1.195 bouyer sizeof(sed->ed.ed_flags),
3520 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3521 1.83 augustss
3522 1.83 augustss sitd = xfer->hcpriv;
3523 1.83 augustss #ifdef DIAGNOSTIC
3524 1.83 augustss if (sitd == NULL) {
3525 1.102 augustss splx(s);
3526 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3527 1.83 augustss return;
3528 1.83 augustss }
3529 1.83 augustss #endif
3530 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3531 1.83 augustss #ifdef DIAGNOSTIC
3532 1.83 augustss DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3533 1.83 augustss sitd->isdone = 1;
3534 1.83 augustss #endif
3535 1.83 augustss }
3536 1.83 augustss
3537 1.83 augustss splx(s);
3538 1.83 augustss
3539 1.83 augustss usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3540 1.83 augustss
3541 1.83 augustss s = splusb();
3542 1.83 augustss
3543 1.83 augustss /* Run callback. */
3544 1.83 augustss usb_transfer_complete(xfer);
3545 1.83 augustss
3546 1.168 augustss sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3547 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3548 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3549 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3550 1.83 augustss
3551 1.83 augustss splx(s);
3552 1.60 augustss }
3553 1.60 augustss
3554 1.60 augustss void
3555 1.179 christos ohci_device_isoc_done(usbd_xfer_handle xfer)
3556 1.60 augustss {
3557 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3558 1.60 augustss }
3559 1.60 augustss
3560 1.60 augustss usbd_status
3561 1.91 augustss ohci_setup_isoc(usbd_pipe_handle pipe)
3562 1.60 augustss {
3563 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3564 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3565 1.60 augustss struct iso *iso = &opipe->u.iso;
3566 1.83 augustss int s;
3567 1.60 augustss
3568 1.60 augustss iso->next = -1;
3569 1.60 augustss iso->inuse = 0;
3570 1.60 augustss
3571 1.83 augustss s = splusb();
3572 1.168 augustss ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3573 1.83 augustss splx(s);
3574 1.83 augustss
3575 1.60 augustss return (USBD_NORMAL_COMPLETION);
3576 1.60 augustss }
3577 1.60 augustss
3578 1.60 augustss void
3579 1.91 augustss ohci_device_isoc_close(usbd_pipe_handle pipe)
3580 1.60 augustss {
3581 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3582 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3583 1.60 augustss
3584 1.60 augustss DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3585 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3586 1.83 augustss #ifdef DIAGNOSTIC
3587 1.83 augustss opipe->tail.itd->isdone = 1;
3588 1.83 augustss #endif
3589 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3590 1.1 augustss }
3591