ohci.c revision 1.209 1 1.209 dyoung /* $NetBSD: ohci.c,v 1.209 2010/11/03 22:34:23 dyoung Exp $ */
2 1.55 augustss /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.157 mycroft * Copyright (c) 1998, 2004, 2005 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.157 mycroft * This code is derived from software contributed to The NetBSD Foundation
12 1.157 mycroft * by Charles M. Hannum.
13 1.1 augustss *
14 1.1 augustss * Redistribution and use in source and binary forms, with or without
15 1.1 augustss * modification, are permitted provided that the following conditions
16 1.1 augustss * are met:
17 1.1 augustss * 1. Redistributions of source code must retain the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer.
19 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 augustss * notice, this list of conditions and the following disclaimer in the
21 1.1 augustss * documentation and/or other materials provided with the distribution.
22 1.1 augustss *
23 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /*
37 1.1 augustss * USB Open Host Controller driver.
38 1.1 augustss *
39 1.96 augustss * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
40 1.201 uebayasi * USB spec: http://www.usb.org/developers/docs/
41 1.1 augustss */
42 1.108 lukem
43 1.108 lukem #include <sys/cdefs.h>
44 1.209 dyoung __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.209 2010/11/03 22:34:23 dyoung Exp $");
45 1.1 augustss
46 1.1 augustss #include <sys/param.h>
47 1.1 augustss #include <sys/systm.h>
48 1.1 augustss #include <sys/malloc.h>
49 1.55 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/device.h>
51 1.55 augustss #include <sys/select.h>
52 1.153 fvdl #include <uvm/uvm_extern.h>
53 1.1 augustss #include <sys/proc.h>
54 1.1 augustss #include <sys/queue.h>
55 1.1 augustss
56 1.184 ad #include <sys/bus.h>
57 1.16 augustss #include <machine/endian.h>
58 1.4 augustss
59 1.1 augustss #include <dev/usb/usb.h>
60 1.1 augustss #include <dev/usb/usbdi.h>
61 1.1 augustss #include <dev/usb/usbdivar.h>
62 1.38 augustss #include <dev/usb/usb_mem.h>
63 1.1 augustss #include <dev/usb/usb_quirks.h>
64 1.1 augustss
65 1.1 augustss #include <dev/usb/ohcireg.h>
66 1.1 augustss #include <dev/usb/ohcivar.h>
67 1.186 drochner #include <dev/usb/usbroothub_subr.h>
68 1.1 augustss
69 1.1 augustss
70 1.36 augustss
71 1.52 augustss #ifdef OHCI_DEBUG
72 1.209 dyoung #define DPRINTF(x) if (ohcidebug) printf x
73 1.209 dyoung #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x
74 1.52 augustss int ohcidebug = 0;
75 1.52 augustss #else
76 1.52 augustss #define DPRINTF(x)
77 1.52 augustss #define DPRINTFN(n,x)
78 1.52 augustss #endif
79 1.52 augustss
80 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
81 1.169 tron #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
82 1.16 augustss #else
83 1.169 tron #define SWAP_ENDIAN OHCI_BIG_ENDIAN
84 1.16 augustss #endif
85 1.16 augustss
86 1.169 tron #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
87 1.169 tron #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
88 1.169 tron #define HTOO16(val) O16TOH(val)
89 1.169 tron #define HTOO32(val) O32TOH(val)
90 1.168 augustss
91 1.1 augustss struct ohci_pipe;
92 1.1 augustss
93 1.91 augustss Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
94 1.91 augustss Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
95 1.1 augustss
96 1.91 augustss Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
97 1.91 augustss Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
98 1.1 augustss
99 1.91 augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
100 1.91 augustss Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
101 1.60 augustss
102 1.53 augustss #if 0
103 1.91 augustss Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
104 1.91 augustss ohci_soft_td_t *);
105 1.53 augustss #endif
106 1.91 augustss Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
107 1.77 augustss ohci_softc_t *, int, int, usbd_xfer_handle,
108 1.91 augustss ohci_soft_td_t *, ohci_soft_td_t **);
109 1.53 augustss
110 1.91 augustss Static usbd_status ohci_open(usbd_pipe_handle);
111 1.91 augustss Static void ohci_poll(struct usbd_bus *);
112 1.99 augustss Static void ohci_softintr(void *);
113 1.91 augustss Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
114 1.91 augustss Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
115 1.91 augustss
116 1.91 augustss Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
117 1.168 augustss Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
118 1.168 augustss ohci_soft_ed_t *);
119 1.168 augustss
120 1.91 augustss Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
121 1.91 augustss Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
122 1.91 augustss Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
123 1.91 augustss Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
124 1.91 augustss Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
125 1.91 augustss Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
126 1.91 augustss Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
127 1.91 augustss
128 1.91 augustss Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
129 1.91 augustss Static void ohci_device_isoc_enter(usbd_xfer_handle);
130 1.91 augustss
131 1.91 augustss Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
132 1.91 augustss Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
133 1.91 augustss
134 1.91 augustss Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
135 1.91 augustss Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
136 1.91 augustss
137 1.91 augustss Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
138 1.91 augustss Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
139 1.91 augustss Static void ohci_root_ctrl_abort(usbd_xfer_handle);
140 1.91 augustss Static void ohci_root_ctrl_close(usbd_pipe_handle);
141 1.91 augustss Static void ohci_root_ctrl_done(usbd_xfer_handle);
142 1.91 augustss
143 1.91 augustss Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
144 1.91 augustss Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
145 1.91 augustss Static void ohci_root_intr_abort(usbd_xfer_handle);
146 1.91 augustss Static void ohci_root_intr_close(usbd_pipe_handle);
147 1.91 augustss Static void ohci_root_intr_done(usbd_xfer_handle);
148 1.91 augustss
149 1.91 augustss Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
150 1.91 augustss Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
151 1.91 augustss Static void ohci_device_ctrl_abort(usbd_xfer_handle);
152 1.91 augustss Static void ohci_device_ctrl_close(usbd_pipe_handle);
153 1.91 augustss Static void ohci_device_ctrl_done(usbd_xfer_handle);
154 1.91 augustss
155 1.91 augustss Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
156 1.91 augustss Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
157 1.91 augustss Static void ohci_device_bulk_abort(usbd_xfer_handle);
158 1.91 augustss Static void ohci_device_bulk_close(usbd_pipe_handle);
159 1.91 augustss Static void ohci_device_bulk_done(usbd_xfer_handle);
160 1.91 augustss
161 1.91 augustss Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
162 1.91 augustss Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
163 1.91 augustss Static void ohci_device_intr_abort(usbd_xfer_handle);
164 1.91 augustss Static void ohci_device_intr_close(usbd_pipe_handle);
165 1.91 augustss Static void ohci_device_intr_done(usbd_xfer_handle);
166 1.91 augustss
167 1.91 augustss Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
168 1.91 augustss Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
169 1.91 augustss Static void ohci_device_isoc_abort(usbd_xfer_handle);
170 1.91 augustss Static void ohci_device_isoc_close(usbd_pipe_handle);
171 1.91 augustss Static void ohci_device_isoc_done(usbd_xfer_handle);
172 1.91 augustss
173 1.120 augustss Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
174 1.91 augustss struct ohci_pipe *pipe, int ival);
175 1.91 augustss
176 1.91 augustss Static void ohci_timeout(void *);
177 1.114 augustss Static void ohci_timeout_task(void *);
178 1.104 augustss Static void ohci_rhsc_enable(void *);
179 1.91 augustss
180 1.91 augustss Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
181 1.91 augustss Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
182 1.53 augustss
183 1.91 augustss Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
184 1.91 augustss Static void ohci_noop(usbd_pipe_handle pipe);
185 1.37 augustss
186 1.52 augustss #ifdef OHCI_DEBUG
187 1.91 augustss Static void ohci_dumpregs(ohci_softc_t *);
188 1.168 augustss Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
189 1.168 augustss Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
190 1.168 augustss Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
191 1.168 augustss Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
192 1.168 augustss Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
193 1.1 augustss #endif
194 1.1 augustss
195 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
196 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
197 1.88 augustss #define OWRITE1(sc, r, x) \
198 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
199 1.88 augustss #define OWRITE2(sc, r, x) \
200 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
201 1.88 augustss #define OWRITE4(sc, r, x) \
202 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
203 1.174 mrg static __inline uint8_t
204 1.174 mrg OREAD1(ohci_softc_t *sc, bus_size_t r)
205 1.174 mrg {
206 1.174 mrg
207 1.174 mrg OBARR(sc);
208 1.174 mrg return bus_space_read_1(sc->iot, sc->ioh, r);
209 1.174 mrg }
210 1.174 mrg
211 1.174 mrg static __inline uint16_t
212 1.174 mrg OREAD2(ohci_softc_t *sc, bus_size_t r)
213 1.174 mrg {
214 1.174 mrg
215 1.174 mrg OBARR(sc);
216 1.174 mrg return bus_space_read_2(sc->iot, sc->ioh, r);
217 1.174 mrg }
218 1.174 mrg
219 1.174 mrg static __inline uint32_t
220 1.174 mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
221 1.174 mrg {
222 1.174 mrg
223 1.174 mrg OBARR(sc);
224 1.174 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
225 1.174 mrg }
226 1.1 augustss
227 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
228 1.120 augustss Static u_int8_t revbits[OHCI_NO_INTRS] =
229 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
230 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
231 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
232 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
233 1.1 augustss
234 1.1 augustss struct ohci_pipe {
235 1.1 augustss struct usbd_pipe pipe;
236 1.1 augustss ohci_soft_ed_t *sed;
237 1.60 augustss union {
238 1.60 augustss ohci_soft_td_t *td;
239 1.60 augustss ohci_soft_itd_t *itd;
240 1.60 augustss } tail;
241 1.1 augustss /* Info needed for different pipe kinds. */
242 1.1 augustss union {
243 1.1 augustss /* Control pipe */
244 1.1 augustss struct {
245 1.4 augustss usb_dma_t reqdma;
246 1.1 augustss u_int length;
247 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
248 1.1 augustss } ctl;
249 1.1 augustss /* Interrupt pipe */
250 1.1 augustss struct {
251 1.1 augustss int nslots;
252 1.1 augustss int pos;
253 1.1 augustss } intr;
254 1.3 augustss /* Bulk pipe */
255 1.3 augustss struct {
256 1.3 augustss u_int length;
257 1.32 augustss int isread;
258 1.3 augustss } bulk;
259 1.43 augustss /* Iso pipe */
260 1.43 augustss struct iso {
261 1.60 augustss int next, inuse;
262 1.43 augustss } iso;
263 1.1 augustss } u;
264 1.1 augustss };
265 1.1 augustss
266 1.1 augustss #define OHCI_INTR_ENDPT 1
267 1.1 augustss
268 1.182 drochner Static const struct usbd_bus_methods ohci_bus_methods = {
269 1.42 augustss ohci_open,
270 1.73 augustss ohci_softintr,
271 1.42 augustss ohci_poll,
272 1.42 augustss ohci_allocm,
273 1.42 augustss ohci_freem,
274 1.62 augustss ohci_allocx,
275 1.62 augustss ohci_freex,
276 1.42 augustss };
277 1.42 augustss
278 1.182 drochner Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
279 1.1 augustss ohci_root_ctrl_transfer,
280 1.17 augustss ohci_root_ctrl_start,
281 1.1 augustss ohci_root_ctrl_abort,
282 1.1 augustss ohci_root_ctrl_close,
283 1.37 augustss ohci_noop,
284 1.65 augustss ohci_root_ctrl_done,
285 1.1 augustss };
286 1.1 augustss
287 1.182 drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
288 1.1 augustss ohci_root_intr_transfer,
289 1.17 augustss ohci_root_intr_start,
290 1.1 augustss ohci_root_intr_abort,
291 1.1 augustss ohci_root_intr_close,
292 1.37 augustss ohci_noop,
293 1.38 augustss ohci_root_intr_done,
294 1.1 augustss };
295 1.1 augustss
296 1.182 drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
297 1.1 augustss ohci_device_ctrl_transfer,
298 1.17 augustss ohci_device_ctrl_start,
299 1.1 augustss ohci_device_ctrl_abort,
300 1.1 augustss ohci_device_ctrl_close,
301 1.37 augustss ohci_noop,
302 1.38 augustss ohci_device_ctrl_done,
303 1.1 augustss };
304 1.1 augustss
305 1.182 drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
306 1.1 augustss ohci_device_intr_transfer,
307 1.17 augustss ohci_device_intr_start,
308 1.1 augustss ohci_device_intr_abort,
309 1.1 augustss ohci_device_intr_close,
310 1.37 augustss ohci_device_clear_toggle,
311 1.38 augustss ohci_device_intr_done,
312 1.1 augustss };
313 1.1 augustss
314 1.182 drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
315 1.3 augustss ohci_device_bulk_transfer,
316 1.17 augustss ohci_device_bulk_start,
317 1.3 augustss ohci_device_bulk_abort,
318 1.3 augustss ohci_device_bulk_close,
319 1.37 augustss ohci_device_clear_toggle,
320 1.38 augustss ohci_device_bulk_done,
321 1.3 augustss };
322 1.3 augustss
323 1.182 drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
324 1.43 augustss ohci_device_isoc_transfer,
325 1.43 augustss ohci_device_isoc_start,
326 1.43 augustss ohci_device_isoc_abort,
327 1.43 augustss ohci_device_isoc_close,
328 1.43 augustss ohci_noop,
329 1.43 augustss ohci_device_isoc_done,
330 1.43 augustss };
331 1.43 augustss
332 1.47 augustss int
333 1.189 dyoung ohci_activate(device_t self, enum devact act)
334 1.47 augustss {
335 1.189 dyoung struct ohci_softc *sc = device_private(self);
336 1.47 augustss
337 1.47 augustss switch (act) {
338 1.47 augustss case DVACT_DEACTIVATE:
339 1.183 kiyohara sc->sc_dying = 1;
340 1.203 dyoung return 0;
341 1.203 dyoung default:
342 1.203 dyoung return EOPNOTSUPP;
343 1.47 augustss }
344 1.47 augustss }
345 1.47 augustss
346 1.187 dyoung void
347 1.187 dyoung ohci_childdet(device_t self, device_t child)
348 1.187 dyoung {
349 1.187 dyoung struct ohci_softc *sc = device_private(self);
350 1.187 dyoung
351 1.187 dyoung KASSERT(sc->sc_child == child);
352 1.187 dyoung sc->sc_child = NULL;
353 1.187 dyoung }
354 1.187 dyoung
355 1.47 augustss int
356 1.91 augustss ohci_detach(struct ohci_softc *sc, int flags)
357 1.47 augustss {
358 1.47 augustss int rv = 0;
359 1.196 drochner usbd_xfer_handle xfer;
360 1.47 augustss
361 1.47 augustss if (sc->sc_child != NULL)
362 1.47 augustss rv = config_detach(sc->sc_child, flags);
363 1.120 augustss
364 1.47 augustss if (rv != 0)
365 1.47 augustss return (rv);
366 1.47 augustss
367 1.209 dyoung callout_stop(&sc->sc_tmo_rhsc);
368 1.104 augustss
369 1.116 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
370 1.209 dyoung callout_destroy(&sc->sc_tmo_rhsc);
371 1.116 augustss
372 1.198 cegger if (sc->sc_hcca != NULL)
373 1.198 cegger usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
374 1.196 drochner while((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) {
375 1.196 drochner SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
376 1.196 drochner free(xfer, M_USB);
377 1.196 drochner }
378 1.47 augustss
379 1.47 augustss return (rv);
380 1.47 augustss }
381 1.47 augustss
382 1.1 augustss ohci_soft_ed_t *
383 1.91 augustss ohci_alloc_sed(ohci_softc_t *sc)
384 1.1 augustss {
385 1.1 augustss ohci_soft_ed_t *sed;
386 1.53 augustss usbd_status err;
387 1.1 augustss int i, offs;
388 1.4 augustss usb_dma_t dma;
389 1.1 augustss
390 1.53 augustss if (sc->sc_freeeds == NULL) {
391 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
392 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
393 1.53 augustss OHCI_ED_ALIGN, &dma);
394 1.53 augustss if (err)
395 1.39 augustss return (0);
396 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
397 1.39 augustss offs = i * OHCI_SED_SIZE;
398 1.123 augustss sed = KERNADDR(&dma, offs);
399 1.125 augustss sed->physaddr = DMAADDR(&dma, offs);
400 1.195 bouyer sed->dma = dma;
401 1.195 bouyer sed->offs = offs;
402 1.1 augustss sed->next = sc->sc_freeeds;
403 1.1 augustss sc->sc_freeeds = sed;
404 1.1 augustss }
405 1.1 augustss }
406 1.1 augustss sed = sc->sc_freeeds;
407 1.1 augustss sc->sc_freeeds = sed->next;
408 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
409 1.1 augustss sed->next = 0;
410 1.39 augustss return (sed);
411 1.1 augustss }
412 1.1 augustss
413 1.1 augustss void
414 1.91 augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
415 1.1 augustss {
416 1.1 augustss sed->next = sc->sc_freeeds;
417 1.1 augustss sc->sc_freeeds = sed;
418 1.1 augustss }
419 1.1 augustss
420 1.1 augustss ohci_soft_td_t *
421 1.91 augustss ohci_alloc_std(ohci_softc_t *sc)
422 1.1 augustss {
423 1.1 augustss ohci_soft_td_t *std;
424 1.53 augustss usbd_status err;
425 1.1 augustss int i, offs;
426 1.4 augustss usb_dma_t dma;
427 1.69 augustss int s;
428 1.1 augustss
429 1.53 augustss if (sc->sc_freetds == NULL) {
430 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
431 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
432 1.53 augustss OHCI_TD_ALIGN, &dma);
433 1.53 augustss if (err)
434 1.83 augustss return (NULL);
435 1.69 augustss s = splusb();
436 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
437 1.39 augustss offs = i * OHCI_STD_SIZE;
438 1.123 augustss std = KERNADDR(&dma, offs);
439 1.125 augustss std->physaddr = DMAADDR(&dma, offs);
440 1.195 bouyer std->dma = dma;
441 1.195 bouyer std->offs = offs;
442 1.1 augustss std->nexttd = sc->sc_freetds;
443 1.1 augustss sc->sc_freetds = std;
444 1.1 augustss }
445 1.69 augustss splx(s);
446 1.1 augustss }
447 1.69 augustss
448 1.69 augustss s = splusb();
449 1.1 augustss std = sc->sc_freetds;
450 1.1 augustss sc->sc_freetds = std->nexttd;
451 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
452 1.83 augustss std->nexttd = NULL;
453 1.83 augustss std->xfer = NULL;
454 1.69 augustss ohci_hash_add_td(sc, std);
455 1.69 augustss splx(s);
456 1.69 augustss
457 1.1 augustss return (std);
458 1.1 augustss }
459 1.1 augustss
460 1.1 augustss void
461 1.91 augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
462 1.1 augustss {
463 1.69 augustss int s;
464 1.69 augustss
465 1.69 augustss s = splusb();
466 1.69 augustss ohci_hash_rem_td(sc, std);
467 1.1 augustss std->nexttd = sc->sc_freetds;
468 1.1 augustss sc->sc_freetds = std;
469 1.69 augustss splx(s);
470 1.1 augustss }
471 1.1 augustss
472 1.1 augustss usbd_status
473 1.91 augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
474 1.91 augustss int alen, int rd, usbd_xfer_handle xfer,
475 1.91 augustss ohci_soft_td_t *sp, ohci_soft_td_t **ep)
476 1.48 augustss {
477 1.48 augustss ohci_soft_td_t *next, *cur;
478 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
479 1.77 augustss u_int32_t tdflags;
480 1.75 augustss int len, curlen;
481 1.77 augustss usb_dma_t *dma = &xfer->dmabuf;
482 1.77 augustss u_int16_t flags = xfer->flags;
483 1.48 augustss
484 1.75 augustss DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
485 1.75 augustss
486 1.75 augustss len = alen;
487 1.48 augustss cur = sp;
488 1.125 augustss dataphys = DMAADDR(dma, 0);
489 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
490 1.195 bouyer usb_syncmem(dma, 0, len,
491 1.195 bouyer rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
492 1.168 augustss tdflags = HTOO32(
493 1.120 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
494 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
495 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
496 1.61 augustss
497 1.48 augustss for (;;) {
498 1.48 augustss next = ohci_alloc_std(sc);
499 1.75 augustss if (next == NULL)
500 1.61 augustss goto nomem;
501 1.48 augustss
502 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
503 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
504 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
505 1.48 augustss /* we can handle it in this TD */
506 1.48 augustss curlen = len;
507 1.48 augustss } else {
508 1.48 augustss /* must use multiple TDs, fill as much as possible. */
509 1.120 augustss curlen = 2 * OHCI_PAGE_SIZE -
510 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
511 1.78 augustss /* the length must be a multiple of the max size */
512 1.78 augustss curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
513 1.78 augustss #ifdef DIAGNOSTIC
514 1.78 augustss if (curlen == 0)
515 1.128 provos panic("ohci_alloc_std: curlen == 0");
516 1.78 augustss #endif
517 1.48 augustss }
518 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
519 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
520 1.48 augustss dataphys, dataphysend,
521 1.48 augustss len, curlen));
522 1.48 augustss len -= curlen;
523 1.48 augustss
524 1.77 augustss cur->td.td_flags = tdflags;
525 1.168 augustss cur->td.td_cbp = HTOO32(dataphys);
526 1.48 augustss cur->nexttd = next;
527 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
528 1.168 augustss cur->td.td_be = HTOO32(dataphys + curlen - 1);
529 1.48 augustss cur->len = curlen;
530 1.48 augustss cur->flags = OHCI_ADD_LEN;
531 1.77 augustss cur->xfer = xfer;
532 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
533 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
534 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
535 1.48 augustss dataphys, dataphys + curlen - 1));
536 1.48 augustss if (len == 0)
537 1.48 augustss break;
538 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
539 1.48 augustss dataphys += curlen;
540 1.48 augustss cur = next;
541 1.48 augustss }
542 1.164 augustss if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
543 1.75 augustss alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
544 1.61 augustss /* Force a 0 length transfer at the end. */
545 1.75 augustss
546 1.75 augustss cur = next;
547 1.61 augustss next = ohci_alloc_std(sc);
548 1.75 augustss if (next == NULL)
549 1.61 augustss goto nomem;
550 1.61 augustss
551 1.77 augustss cur->td.td_flags = tdflags;
552 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
553 1.61 augustss cur->nexttd = next;
554 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
555 1.75 augustss cur->td.td_be = ~0;
556 1.61 augustss cur->len = 0;
557 1.61 augustss cur->flags = 0;
558 1.77 augustss cur->xfer = xfer;
559 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
560 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
561 1.61 augustss DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
562 1.61 augustss }
563 1.77 augustss *ep = cur;
564 1.48 augustss
565 1.48 augustss return (USBD_NORMAL_COMPLETION);
566 1.61 augustss
567 1.61 augustss nomem:
568 1.61 augustss /* XXX free chain */
569 1.61 augustss return (USBD_NOMEM);
570 1.48 augustss }
571 1.48 augustss
572 1.53 augustss #if 0
573 1.82 augustss Static void
574 1.120 augustss ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
575 1.91 augustss ohci_soft_td_t *stdend)
576 1.48 augustss {
577 1.48 augustss ohci_soft_td_t *p;
578 1.48 augustss
579 1.48 augustss for (; std != stdend; std = p) {
580 1.48 augustss p = std->nexttd;
581 1.48 augustss ohci_free_std(sc, std);
582 1.48 augustss }
583 1.48 augustss }
584 1.53 augustss #endif
585 1.48 augustss
586 1.60 augustss ohci_soft_itd_t *
587 1.91 augustss ohci_alloc_sitd(ohci_softc_t *sc)
588 1.60 augustss {
589 1.60 augustss ohci_soft_itd_t *sitd;
590 1.60 augustss usbd_status err;
591 1.83 augustss int i, s, offs;
592 1.60 augustss usb_dma_t dma;
593 1.60 augustss
594 1.60 augustss if (sc->sc_freeitds == NULL) {
595 1.60 augustss DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
596 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
597 1.83 augustss OHCI_ITD_ALIGN, &dma);
598 1.60 augustss if (err)
599 1.83 augustss return (NULL);
600 1.129 augustss s = splusb();
601 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
602 1.83 augustss offs = i * OHCI_SITD_SIZE;
603 1.123 augustss sitd = KERNADDR(&dma, offs);
604 1.125 augustss sitd->physaddr = DMAADDR(&dma, offs);
605 1.195 bouyer sitd->dma = dma;
606 1.195 bouyer sitd->offs = offs;
607 1.60 augustss sitd->nextitd = sc->sc_freeitds;
608 1.60 augustss sc->sc_freeitds = sitd;
609 1.60 augustss }
610 1.129 augustss splx(s);
611 1.60 augustss }
612 1.83 augustss
613 1.83 augustss s = splusb();
614 1.60 augustss sitd = sc->sc_freeitds;
615 1.60 augustss sc->sc_freeitds = sitd->nextitd;
616 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
617 1.83 augustss sitd->nextitd = NULL;
618 1.83 augustss sitd->xfer = NULL;
619 1.83 augustss ohci_hash_add_itd(sc, sitd);
620 1.83 augustss splx(s);
621 1.83 augustss
622 1.83 augustss #ifdef DIAGNOSTIC
623 1.83 augustss sitd->isdone = 0;
624 1.83 augustss #endif
625 1.83 augustss
626 1.60 augustss return (sitd);
627 1.60 augustss }
628 1.60 augustss
629 1.60 augustss void
630 1.91 augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
631 1.60 augustss {
632 1.83 augustss int s;
633 1.83 augustss
634 1.83 augustss DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
635 1.83 augustss
636 1.83 augustss #ifdef DIAGNOSTIC
637 1.83 augustss if (!sitd->isdone) {
638 1.128 provos panic("ohci_free_sitd: sitd=%p not done", sitd);
639 1.83 augustss return;
640 1.83 augustss }
641 1.134 toshii /* Warn double free */
642 1.134 toshii sitd->isdone = 0;
643 1.83 augustss #endif
644 1.83 augustss
645 1.83 augustss s = splusb();
646 1.83 augustss ohci_hash_rem_itd(sc, sitd);
647 1.60 augustss sitd->nextitd = sc->sc_freeitds;
648 1.60 augustss sc->sc_freeitds = sitd;
649 1.83 augustss splx(s);
650 1.60 augustss }
651 1.60 augustss
652 1.48 augustss usbd_status
653 1.91 augustss ohci_init(ohci_softc_t *sc)
654 1.1 augustss {
655 1.1 augustss ohci_soft_ed_t *sed, *psed;
656 1.53 augustss usbd_status err;
657 1.1 augustss int i;
658 1.161 augustss u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
659 1.16 augustss
660 1.1 augustss DPRINTF(("ohci_init: start\n"));
661 1.199 jmcneill aprint_normal_dev(sc->sc_dev, "");
662 1.199 jmcneill
663 1.198 cegger sc->sc_hcca = NULL;
664 1.209 dyoung callout_init(&sc->sc_tmo_rhsc, 0);
665 1.198 cegger
666 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
667 1.198 cegger LIST_INIT(&sc->sc_hash_tds[i]);
668 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
669 1.198 cegger LIST_INIT(&sc->sc_hash_itds[i]);
670 1.198 cegger
671 1.198 cegger SIMPLEQ_INIT(&sc->sc_free_xfers);
672 1.198 cegger
673 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
674 1.200 enami aprint_normal("OHCI version %d.%d%s\n",
675 1.199 jmcneill OHCI_REV_HI(rev), OHCI_REV_LO(rev),
676 1.199 jmcneill OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
677 1.55 augustss
678 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
679 1.199 jmcneill aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
680 1.56 augustss sc->sc_bus.usbrev = USBREV_UNKNOWN;
681 1.1 augustss return (USBD_INVAL);
682 1.1 augustss }
683 1.56 augustss sc->sc_bus.usbrev = USBREV_1_0;
684 1.1 augustss
685 1.193 drochner usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
686 1.153 fvdl USB_MEM_RESERVE);
687 1.153 fvdl
688 1.73 augustss /* XXX determine alignment by R/W */
689 1.1 augustss /* Allocate the HCCA area. */
690 1.120 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
691 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
692 1.198 cegger if (err) {
693 1.198 cegger sc->sc_hcca = NULL;
694 1.198 cegger return err;
695 1.198 cegger }
696 1.123 augustss sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
697 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
698 1.1 augustss
699 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
700 1.1 augustss
701 1.60 augustss /* Allocate dummy ED that starts the control list. */
702 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
703 1.53 augustss if (sc->sc_ctrl_head == NULL) {
704 1.53 augustss err = USBD_NOMEM;
705 1.1 augustss goto bad1;
706 1.1 augustss }
707 1.168 augustss sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
708 1.34 augustss
709 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
710 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
711 1.53 augustss if (sc->sc_bulk_head == NULL) {
712 1.53 augustss err = USBD_NOMEM;
713 1.1 augustss goto bad2;
714 1.1 augustss }
715 1.168 augustss sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
716 1.195 bouyer usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
717 1.195 bouyer sizeof(sc->sc_bulk_head->ed),
718 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
719 1.1 augustss
720 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
721 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
722 1.60 augustss if (sc->sc_isoc_head == NULL) {
723 1.60 augustss err = USBD_NOMEM;
724 1.60 augustss goto bad3;
725 1.60 augustss }
726 1.168 augustss sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
727 1.195 bouyer usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
728 1.195 bouyer sizeof(sc->sc_isoc_head->ed),
729 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
730 1.60 augustss
731 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
732 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
733 1.1 augustss sed = ohci_alloc_sed(sc);
734 1.53 augustss if (sed == NULL) {
735 1.1 augustss while (--i >= 0)
736 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
737 1.53 augustss err = USBD_NOMEM;
738 1.60 augustss goto bad4;
739 1.1 augustss }
740 1.1 augustss /* All ED fields are set to 0. */
741 1.1 augustss sc->sc_eds[i] = sed;
742 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
743 1.60 augustss if (i != 0)
744 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
745 1.60 augustss else
746 1.60 augustss psed= sc->sc_isoc_head;
747 1.60 augustss sed->next = psed;
748 1.168 augustss sed->ed.ed_nexted = HTOO32(psed->physaddr);
749 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
750 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
751 1.1 augustss }
752 1.120 augustss /*
753 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
754 1.1 augustss * the tree set up properly to spread the interrupts.
755 1.1 augustss */
756 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
757 1.120 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
758 1.168 augustss HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
759 1.195 bouyer usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
760 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
761 1.1 augustss
762 1.73 augustss #ifdef OHCI_DEBUG
763 1.73 augustss if (ohcidebug > 15) {
764 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
765 1.73 augustss printf("ed#%d ", i);
766 1.168 augustss ohci_dump_ed(sc, sc->sc_eds[i]);
767 1.73 augustss }
768 1.73 augustss printf("iso ");
769 1.168 augustss ohci_dump_ed(sc, sc->sc_isoc_head);
770 1.73 augustss }
771 1.73 augustss #endif
772 1.73 augustss
773 1.161 augustss /* Preserve values programmed by SMM/BIOS but lost over reset. */
774 1.161 augustss ctl = OREAD4(sc, OHCI_CONTROL);
775 1.161 augustss rwc = ctl & OHCI_RWC;
776 1.161 augustss fm = OREAD4(sc, OHCI_FM_INTERVAL);
777 1.161 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
778 1.161 augustss descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
779 1.161 augustss
780 1.1 augustss /* Determine in what context we are running. */
781 1.1 augustss if (ctl & OHCI_IR) {
782 1.1 augustss /* SMM active, request change */
783 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
784 1.160 augustss if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
785 1.160 augustss (OHCI_OC | OHCI_MIE))
786 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
787 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
788 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
789 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
790 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
791 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
792 1.1 augustss }
793 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
794 1.1 augustss if ((ctl & OHCI_IR) == 0) {
795 1.199 jmcneill aprint_error_dev(sc->sc_dev,
796 1.199 jmcneill "SMM does not respond, resetting\n");
797 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
798 1.1 augustss goto reset;
799 1.1 augustss }
800 1.103 augustss #if 0
801 1.103 augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
802 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
803 1.1 augustss /* BIOS started controller. */
804 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
805 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
806 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
807 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
808 1.1 augustss }
809 1.103 augustss #endif
810 1.1 augustss } else {
811 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
812 1.1 augustss reset:
813 1.1 augustss /* Controller was cold started. */
814 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
815 1.1 augustss }
816 1.1 augustss
817 1.16 augustss /*
818 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
819 1.25 augustss * without it some controllers do not start.
820 1.16 augustss */
821 1.190 drochner DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
822 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
823 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
824 1.16 augustss
825 1.1 augustss /* We now own the host controller and the bus has been reset. */
826 1.1 augustss
827 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
828 1.1 augustss /* Nominal time for a reset is 10 us. */
829 1.1 augustss for (i = 0; i < 10; i++) {
830 1.1 augustss delay(10);
831 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
832 1.1 augustss if (!hcr)
833 1.1 augustss break;
834 1.1 augustss }
835 1.1 augustss if (hcr) {
836 1.199 jmcneill aprint_error_dev(sc->sc_dev, "reset timeout\n");
837 1.53 augustss err = USBD_IOERROR;
838 1.60 augustss goto bad5;
839 1.1 augustss }
840 1.52 augustss #ifdef OHCI_DEBUG
841 1.1 augustss if (ohcidebug > 15)
842 1.1 augustss ohci_dumpregs(sc);
843 1.1 augustss #endif
844 1.1 augustss
845 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
846 1.1 augustss
847 1.1 augustss /* Set up HC registers. */
848 1.125 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
849 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
850 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
851 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
852 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
853 1.55 augustss /* switch on desired functional features */
854 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
855 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
856 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
857 1.161 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
858 1.1 augustss /* And finally start it! */
859 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
860 1.1 augustss
861 1.1 augustss /*
862 1.1 augustss * The controller is now OPERATIONAL. Set a some final
863 1.1 augustss * registers that should be set earlier, but that the
864 1.1 augustss * controller ignores when in the SUSPEND state.
865 1.1 augustss */
866 1.161 augustss ival = OHCI_GET_IVAL(fm);
867 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
868 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
869 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
870 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
871 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
872 1.1 augustss
873 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
874 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
875 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
876 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
877 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
878 1.1 augustss
879 1.85 augustss /*
880 1.85 augustss * The AMD756 requires a delay before re-reading the register,
881 1.85 augustss * otherwise it will occasionally report 0 ports.
882 1.85 augustss */
883 1.145 augustss sc->sc_noport = 0;
884 1.145 augustss for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
885 1.145 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
886 1.145 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
887 1.145 augustss }
888 1.1 augustss
889 1.52 augustss #ifdef OHCI_DEBUG
890 1.1 augustss if (ohcidebug > 5)
891 1.1 augustss ohci_dumpregs(sc);
892 1.1 augustss #endif
893 1.120 augustss
894 1.1 augustss /* Set up the bus struct. */
895 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
896 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
897 1.1 augustss
898 1.101 minoura sc->sc_control = sc->sc_intre = 0;
899 1.59 augustss
900 1.167 augustss /* Finally, turn on interrupts. */
901 1.167 augustss DPRINTFN(1,("ohci_init: enabling\n"));
902 1.167 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
903 1.167 augustss
904 1.1 augustss return (USBD_NORMAL_COMPLETION);
905 1.1 augustss
906 1.60 augustss bad5:
907 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
908 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
909 1.60 augustss bad4:
910 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
911 1.1 augustss bad3:
912 1.144 augustss ohci_free_sed(sc, sc->sc_bulk_head);
913 1.144 augustss bad2:
914 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
915 1.1 augustss bad1:
916 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
917 1.198 cegger sc->sc_hcca = NULL;
918 1.53 augustss return (err);
919 1.1 augustss }
920 1.1 augustss
921 1.42 augustss usbd_status
922 1.91 augustss ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
923 1.42 augustss {
924 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
925 1.153 fvdl usbd_status status;
926 1.42 augustss
927 1.153 fvdl status = usb_allocmem(&sc->sc_bus, size, 0, dma);
928 1.153 fvdl if (status == USBD_NOMEM)
929 1.153 fvdl status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
930 1.153 fvdl return status;
931 1.42 augustss }
932 1.42 augustss
933 1.42 augustss void
934 1.91 augustss ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
935 1.42 augustss {
936 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
937 1.153 fvdl if (dma->block->flags & USB_DMA_RESERVE) {
938 1.191 nakayama usb_reserve_freem(&sc->sc_dma_reserve, dma);
939 1.153 fvdl return;
940 1.153 fvdl }
941 1.44 augustss usb_freemem(&sc->sc_bus, dma);
942 1.62 augustss }
943 1.62 augustss
944 1.62 augustss usbd_xfer_handle
945 1.91 augustss ohci_allocx(struct usbd_bus *bus)
946 1.62 augustss {
947 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
948 1.62 augustss usbd_xfer_handle xfer;
949 1.62 augustss
950 1.62 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
951 1.118 augustss if (xfer != NULL) {
952 1.126 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
953 1.118 augustss #ifdef DIAGNOSTIC
954 1.118 augustss if (xfer->busy_free != XFER_FREE) {
955 1.118 augustss printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
956 1.118 augustss xfer->busy_free);
957 1.118 augustss }
958 1.118 augustss #endif
959 1.118 augustss } else {
960 1.114 augustss xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT);
961 1.118 augustss }
962 1.118 augustss if (xfer != NULL) {
963 1.114 augustss memset(xfer, 0, sizeof (struct ohci_xfer));
964 1.118 augustss #ifdef DIAGNOSTIC
965 1.118 augustss xfer->busy_free = XFER_BUSY;
966 1.118 augustss #endif
967 1.118 augustss }
968 1.62 augustss return (xfer);
969 1.62 augustss }
970 1.62 augustss
971 1.62 augustss void
972 1.91 augustss ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
973 1.62 augustss {
974 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
975 1.62 augustss
976 1.118 augustss #ifdef DIAGNOSTIC
977 1.118 augustss if (xfer->busy_free != XFER_BUSY) {
978 1.118 augustss printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
979 1.118 augustss xfer->busy_free);
980 1.118 augustss }
981 1.118 augustss xfer->busy_free = XFER_FREE;
982 1.118 augustss #endif
983 1.62 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
984 1.42 augustss }
985 1.42 augustss
986 1.59 augustss /*
987 1.59 augustss * Shut down the controller when the system is going down.
988 1.59 augustss */
989 1.188 dyoung bool
990 1.188 dyoung ohci_shutdown(device_t self, int flags)
991 1.59 augustss {
992 1.188 dyoung ohci_softc_t *sc = device_private(self);
993 1.59 augustss
994 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
995 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
996 1.188 dyoung return true;
997 1.59 augustss }
998 1.59 augustss
999 1.185 jmcneill bool
1000 1.206 dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
1001 1.33 augustss {
1002 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1003 1.185 jmcneill uint32_t ctl;
1004 1.95 augustss int s;
1005 1.33 augustss
1006 1.185 jmcneill s = splhardusb();
1007 1.185 jmcneill sc->sc_bus.use_polling++;
1008 1.185 jmcneill /* Some broken BIOSes do not recover these values */
1009 1.185 jmcneill OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1010 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1011 1.185 jmcneill sc->sc_ctrl_head->physaddr);
1012 1.185 jmcneill OWRITE4(sc, OHCI_BULK_HEAD_ED,
1013 1.185 jmcneill sc->sc_bulk_head->physaddr);
1014 1.185 jmcneill if (sc->sc_intre)
1015 1.185 jmcneill OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1016 1.185 jmcneill (OHCI_ALL_INTRS | OHCI_MIE));
1017 1.185 jmcneill if (sc->sc_control)
1018 1.185 jmcneill ctl = sc->sc_control;
1019 1.185 jmcneill else
1020 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL);
1021 1.185 jmcneill ctl |= OHCI_HCFS_RESUME;
1022 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1023 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1024 1.185 jmcneill ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1025 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1026 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1027 1.185 jmcneill sc->sc_control = sc->sc_intre = 0;
1028 1.185 jmcneill sc->sc_bus.use_polling--;
1029 1.194 nonaka splx(s);
1030 1.185 jmcneill
1031 1.185 jmcneill return true;
1032 1.185 jmcneill }
1033 1.185 jmcneill
1034 1.185 jmcneill bool
1035 1.206 dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
1036 1.185 jmcneill {
1037 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1038 1.185 jmcneill uint32_t ctl;
1039 1.185 jmcneill int s;
1040 1.95 augustss
1041 1.98 augustss s = splhardusb();
1042 1.185 jmcneill sc->sc_bus.use_polling++;
1043 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1044 1.185 jmcneill if (sc->sc_control == 0) {
1045 1.185 jmcneill /*
1046 1.185 jmcneill * Preserve register values, in case that BIOS
1047 1.185 jmcneill * does not recover them.
1048 1.185 jmcneill */
1049 1.185 jmcneill sc->sc_control = ctl;
1050 1.185 jmcneill sc->sc_intre = OREAD4(sc,
1051 1.185 jmcneill OHCI_INTERRUPT_ENABLE);
1052 1.95 augustss }
1053 1.185 jmcneill ctl |= OHCI_HCFS_SUSPEND;
1054 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1055 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1056 1.185 jmcneill sc->sc_bus.use_polling--;
1057 1.95 augustss splx(s);
1058 1.185 jmcneill
1059 1.185 jmcneill return true;
1060 1.33 augustss }
1061 1.33 augustss
1062 1.52 augustss #ifdef OHCI_DEBUG
1063 1.1 augustss void
1064 1.91 augustss ohci_dumpregs(ohci_softc_t *sc)
1065 1.1 augustss {
1066 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1067 1.41 augustss OREAD4(sc, OHCI_REVISION),
1068 1.41 augustss OREAD4(sc, OHCI_CONTROL),
1069 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1070 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1071 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
1072 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1073 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1074 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1075 1.41 augustss OREAD4(sc, OHCI_HCCA),
1076 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1077 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1078 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1079 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1080 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1081 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1082 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1083 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1084 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1085 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
1086 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1087 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1088 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1089 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
1090 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1091 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1092 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1093 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
1094 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
1095 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1096 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1097 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1098 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number),
1099 1.168 augustss O32TOH(sc->sc_hcca->hcca_done_head)));
1100 1.1 augustss }
1101 1.1 augustss #endif
1102 1.1 augustss
1103 1.91 augustss Static int ohci_intr1(ohci_softc_t *);
1104 1.53 augustss
1105 1.1 augustss int
1106 1.91 augustss ohci_intr(void *p)
1107 1.1 augustss {
1108 1.1 augustss ohci_softc_t *sc = p;
1109 1.111 augustss
1110 1.190 drochner if (sc == NULL || sc->sc_dying || !device_has_power(sc->sc_dev))
1111 1.111 augustss return (0);
1112 1.53 augustss
1113 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
1114 1.57 augustss if (sc->sc_bus.use_polling) {
1115 1.57 augustss #ifdef DIAGNOSTIC
1116 1.149 mycroft DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1117 1.57 augustss #endif
1118 1.154 joff /* for level triggered intrs, should do something to ack */
1119 1.155 perry OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1120 1.154 joff OREAD4(sc, OHCI_INTERRUPT_STATUS));
1121 1.155 perry
1122 1.53 augustss return (0);
1123 1.57 augustss }
1124 1.53 augustss
1125 1.120 augustss return (ohci_intr1(sc));
1126 1.53 augustss }
1127 1.53 augustss
1128 1.82 augustss Static int
1129 1.91 augustss ohci_intr1(ohci_softc_t *sc)
1130 1.53 augustss {
1131 1.1 augustss u_int32_t intrs, eintrs;
1132 1.1 augustss
1133 1.105 augustss DPRINTFN(14,("ohci_intr1: enter\n"));
1134 1.105 augustss
1135 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1136 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1137 1.15 augustss #ifdef DIAGNOSTIC
1138 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1139 1.15 augustss #endif
1140 1.15 augustss return (0);
1141 1.15 augustss }
1142 1.15 augustss
1143 1.157 mycroft intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1144 1.1 augustss if (!intrs)
1145 1.1 augustss return (0);
1146 1.55 augustss
1147 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1148 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1149 1.1 augustss if (!eintrs)
1150 1.1 augustss return (0);
1151 1.1 augustss
1152 1.45 augustss sc->sc_bus.intr_context++;
1153 1.44 augustss sc->sc_bus.no_intrs++;
1154 1.120 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1155 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1156 1.1 augustss (u_int)eintrs));
1157 1.1 augustss
1158 1.1 augustss if (eintrs & OHCI_SO) {
1159 1.100 augustss sc->sc_overrun_cnt++;
1160 1.100 augustss if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1161 1.100 augustss printf("%s: %u scheduling overruns\n",
1162 1.190 drochner device_xname(sc->sc_dev), sc->sc_overrun_cnt);
1163 1.100 augustss sc->sc_overrun_cnt = 0;
1164 1.100 augustss }
1165 1.1 augustss /* XXX do what */
1166 1.106 augustss eintrs &= ~OHCI_SO;
1167 1.1 augustss }
1168 1.1 augustss if (eintrs & OHCI_WDH) {
1169 1.157 mycroft /*
1170 1.157 mycroft * We block the interrupt below, and reenable it later from
1171 1.157 mycroft * ohci_softintr().
1172 1.157 mycroft */
1173 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1174 1.1 augustss }
1175 1.1 augustss if (eintrs & OHCI_RD) {
1176 1.190 drochner printf("%s: resume detect\n", device_xname(sc->sc_dev));
1177 1.1 augustss /* XXX process resume detect */
1178 1.1 augustss }
1179 1.1 augustss if (eintrs & OHCI_UE) {
1180 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1181 1.190 drochner device_xname(sc->sc_dev));
1182 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1183 1.1 augustss /* XXX what else */
1184 1.1 augustss }
1185 1.1 augustss if (eintrs & OHCI_RHSC) {
1186 1.120 augustss /*
1187 1.157 mycroft * We block the interrupt below, and reenable it later from
1188 1.157 mycroft * a timeout.
1189 1.1 augustss */
1190 1.157 mycroft ohci_rhsc(sc, sc->sc_intrxfer);
1191 1.104 augustss /* Do not allow RHSC interrupts > 1 per second */
1192 1.209 dyoung callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1193 1.1 augustss }
1194 1.1 augustss
1195 1.45 augustss sc->sc_bus.intr_context--;
1196 1.44 augustss
1197 1.106 augustss if (eintrs != 0) {
1198 1.157 mycroft /* Block unprocessed interrupts. */
1199 1.106 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1200 1.106 augustss sc->sc_eintrs &= ~eintrs;
1201 1.157 mycroft DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1202 1.190 drochner device_xname(sc->sc_dev), eintrs));
1203 1.106 augustss }
1204 1.1 augustss
1205 1.1 augustss return (1);
1206 1.1 augustss }
1207 1.1 augustss
1208 1.1 augustss void
1209 1.104 augustss ohci_rhsc_enable(void *v_sc)
1210 1.104 augustss {
1211 1.104 augustss ohci_softc_t *sc = v_sc;
1212 1.129 augustss int s;
1213 1.104 augustss
1214 1.129 augustss s = splhardusb();
1215 1.157 mycroft sc->sc_eintrs |= OHCI_RHSC;
1216 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1217 1.129 augustss splx(s);
1218 1.1 augustss }
1219 1.1 augustss
1220 1.52 augustss #ifdef OHCI_DEBUG
1221 1.166 drochner const char *ohci_cc_strs[] = {
1222 1.13 augustss "NO_ERROR",
1223 1.13 augustss "CRC",
1224 1.13 augustss "BIT_STUFFING",
1225 1.13 augustss "DATA_TOGGLE_MISMATCH",
1226 1.13 augustss "STALL",
1227 1.13 augustss "DEVICE_NOT_RESPONDING",
1228 1.13 augustss "PID_CHECK_FAILURE",
1229 1.13 augustss "UNEXPECTED_PID",
1230 1.13 augustss "DATA_OVERRUN",
1231 1.13 augustss "DATA_UNDERRUN",
1232 1.13 augustss "BUFFER_OVERRUN",
1233 1.13 augustss "BUFFER_UNDERRUN",
1234 1.67 augustss "reserved",
1235 1.67 augustss "reserved",
1236 1.67 augustss "NOT_ACCESSED",
1237 1.13 augustss "NOT_ACCESSED",
1238 1.13 augustss };
1239 1.13 augustss #endif
1240 1.13 augustss
1241 1.1 augustss void
1242 1.157 mycroft ohci_softintr(void *v)
1243 1.83 augustss {
1244 1.190 drochner struct usbd_bus *bus = v;
1245 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1246 1.157 mycroft ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1247 1.157 mycroft ohci_soft_td_t *std, *sdone, *stdnext;
1248 1.157 mycroft usbd_xfer_handle xfer;
1249 1.157 mycroft struct ohci_pipe *opipe;
1250 1.157 mycroft int len, cc, s;
1251 1.157 mycroft int i, j, actlen, iframes, uedir;
1252 1.157 mycroft ohci_physaddr_t done;
1253 1.157 mycroft
1254 1.157 mycroft DPRINTFN(10,("ohci_softintr: enter\n"));
1255 1.157 mycroft
1256 1.157 mycroft sc->sc_bus.intr_context++;
1257 1.157 mycroft
1258 1.157 mycroft s = splhardusb();
1259 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1260 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1261 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1262 1.168 augustss done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1263 1.157 mycroft sc->sc_hcca->hcca_done_head = 0;
1264 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1265 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1266 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1267 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1268 1.157 mycroft sc->sc_eintrs |= OHCI_WDH;
1269 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1270 1.157 mycroft splx(s);
1271 1.83 augustss
1272 1.83 augustss /* Reverse the done list. */
1273 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1274 1.83 augustss std = ohci_hash_find_td(sc, done);
1275 1.83 augustss if (std != NULL) {
1276 1.195 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1277 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1278 1.83 augustss std->dnext = sdone;
1279 1.168 augustss done = O32TOH(std->td.td_nexttd);
1280 1.83 augustss sdone = std;
1281 1.83 augustss DPRINTFN(10,("add TD %p\n", std));
1282 1.83 augustss continue;
1283 1.83 augustss }
1284 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1285 1.83 augustss if (sitd != NULL) {
1286 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1287 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1288 1.83 augustss sitd->dnext = sidone;
1289 1.168 augustss done = O32TOH(sitd->itd.itd_nextitd);
1290 1.83 augustss sidone = sitd;
1291 1.83 augustss DPRINTFN(5,("add ITD %p\n", sitd));
1292 1.83 augustss continue;
1293 1.83 augustss }
1294 1.208 pgoyette panic("ohci_softintr: addr 0x%08lx not found", (u_long)done);
1295 1.83 augustss }
1296 1.83 augustss
1297 1.105 augustss DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1298 1.1 augustss
1299 1.52 augustss #ifdef OHCI_DEBUG
1300 1.1 augustss if (ohcidebug > 10) {
1301 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1302 1.168 augustss ohci_dump_tds(sc, sdone);
1303 1.1 augustss }
1304 1.1 augustss #endif
1305 1.1 augustss
1306 1.48 augustss for (std = sdone; std; std = stdnext) {
1307 1.53 augustss xfer = std->xfer;
1308 1.48 augustss stdnext = std->dnext;
1309 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1310 1.69 augustss std, xfer, xfer ? xfer->hcpriv : 0));
1311 1.71 augustss if (xfer == NULL) {
1312 1.117 augustss /*
1313 1.117 augustss * xfer == NULL: There seems to be no xfer associated
1314 1.71 augustss * with this TD. It is tailp that happened to end up on
1315 1.71 augustss * the done queue.
1316 1.117 augustss * Shouldn't happen, but some chips are broken(?).
1317 1.71 augustss */
1318 1.71 augustss continue;
1319 1.71 augustss }
1320 1.53 augustss if (xfer->status == USBD_CANCELLED ||
1321 1.53 augustss xfer->status == USBD_TIMEOUT) {
1322 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1323 1.53 augustss xfer));
1324 1.38 augustss /* Handled by abort routine. */
1325 1.83 augustss continue;
1326 1.83 augustss }
1327 1.209 dyoung callout_stop(&xfer->timeout_handle);
1328 1.141 mycroft
1329 1.141 mycroft len = std->len;
1330 1.141 mycroft if (std->td.td_cbp != 0)
1331 1.168 augustss len -= O32TOH(std->td.td_be) -
1332 1.168 augustss O32TOH(std->td.td_cbp) + 1;
1333 1.141 mycroft DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1334 1.141 mycroft std->flags));
1335 1.141 mycroft if (std->flags & OHCI_ADD_LEN)
1336 1.141 mycroft xfer->actlen += len;
1337 1.141 mycroft
1338 1.168 augustss cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1339 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1340 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1341 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1342 1.133 toshii s = splusb();
1343 1.53 augustss usb_transfer_complete(xfer);
1344 1.133 toshii splx(s);
1345 1.21 augustss }
1346 1.48 augustss ohci_free_std(sc, std);
1347 1.1 augustss } else {
1348 1.48 augustss /*
1349 1.48 augustss * Endpoint is halted. First unlink all the TDs
1350 1.48 augustss * belonging to the failed transfer, and then restart
1351 1.48 augustss * the endpoint.
1352 1.48 augustss */
1353 1.1 augustss ohci_soft_td_t *p, *n;
1354 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1355 1.48 augustss
1356 1.71 augustss DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1357 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1358 1.168 augustss ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1359 1.48 augustss
1360 1.48 augustss /* remove TDs */
1361 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1362 1.1 augustss n = p->nexttd;
1363 1.1 augustss ohci_free_std(sc, p);
1364 1.1 augustss }
1365 1.48 augustss
1366 1.16 augustss /* clear halt */
1367 1.168 augustss opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1368 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1369 1.48 augustss
1370 1.1 augustss if (cc == OHCI_CC_STALL)
1371 1.53 augustss xfer->status = USBD_STALLED;
1372 1.1 augustss else
1373 1.53 augustss xfer->status = USBD_IOERROR;
1374 1.133 toshii s = splusb();
1375 1.53 augustss usb_transfer_complete(xfer);
1376 1.133 toshii splx(s);
1377 1.1 augustss }
1378 1.1 augustss }
1379 1.72 augustss
1380 1.83 augustss #ifdef OHCI_DEBUG
1381 1.83 augustss if (ohcidebug > 10) {
1382 1.105 augustss DPRINTF(("ohci_softintr: ITD done:\n"));
1383 1.168 augustss ohci_dump_itds(sc, sidone);
1384 1.83 augustss }
1385 1.83 augustss #endif
1386 1.83 augustss
1387 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1388 1.83 augustss xfer = sitd->xfer;
1389 1.83 augustss sitdnext = sitd->dnext;
1390 1.83 augustss DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1391 1.83 augustss sitd, xfer, xfer ? xfer->hcpriv : 0));
1392 1.83 augustss if (xfer == NULL)
1393 1.83 augustss continue;
1394 1.83 augustss if (xfer->status == USBD_CANCELLED ||
1395 1.83 augustss xfer->status == USBD_TIMEOUT) {
1396 1.83 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1397 1.83 augustss xfer));
1398 1.83 augustss /* Handled by abort routine. */
1399 1.83 augustss continue;
1400 1.83 augustss }
1401 1.83 augustss #ifdef DIAGNOSTIC
1402 1.83 augustss if (sitd->isdone)
1403 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1404 1.83 augustss sitd->isdone = 1;
1405 1.83 augustss #endif
1406 1.134 toshii if (sitd->flags & OHCI_CALL_DONE) {
1407 1.134 toshii ohci_soft_itd_t *next;
1408 1.134 toshii
1409 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1410 1.134 toshii opipe->u.iso.inuse -= xfer->nframes;
1411 1.134 toshii uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1412 1.134 toshii bEndpointAddress);
1413 1.134 toshii xfer->status = USBD_NORMAL_COMPLETION;
1414 1.134 toshii actlen = 0;
1415 1.137 simonb for (i = 0, sitd = xfer->hcpriv;;
1416 1.134 toshii sitd = next) {
1417 1.134 toshii next = sitd->nextitd;
1418 1.168 augustss if (OHCI_ITD_GET_CC(O32TOH(sitd->
1419 1.135 toshii itd.itd_flags)) != OHCI_CC_NO_ERROR)
1420 1.134 toshii xfer->status = USBD_IOERROR;
1421 1.134 toshii /* For input, update frlengths with actual */
1422 1.134 toshii /* XXX anything necessary for output? */
1423 1.134 toshii if (uedir == UE_DIR_IN &&
1424 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION) {
1425 1.168 augustss iframes = OHCI_ITD_GET_FC(O32TOH(
1426 1.135 toshii sitd->itd.itd_flags));
1427 1.134 toshii for (j = 0; j < iframes; i++, j++) {
1428 1.168 augustss len = O16TOH(sitd->
1429 1.134 toshii itd.itd_offset[j]);
1430 1.158 toshii if ((OHCI_ITD_PSW_GET_CC(len) &
1431 1.158 toshii OHCI_CC_NOT_ACCESSED_MASK)
1432 1.158 toshii == OHCI_CC_NOT_ACCESSED)
1433 1.158 toshii len = 0;
1434 1.158 toshii else
1435 1.158 toshii len = OHCI_ITD_PSW_LENGTH(len);
1436 1.134 toshii xfer->frlengths[i] = len;
1437 1.134 toshii actlen += len;
1438 1.134 toshii }
1439 1.134 toshii }
1440 1.134 toshii if (sitd->flags & OHCI_CALL_DONE)
1441 1.134 toshii break;
1442 1.134 toshii ohci_free_sitd(sc, sitd);
1443 1.83 augustss }
1444 1.134 toshii ohci_free_sitd(sc, sitd);
1445 1.134 toshii if (uedir == UE_DIR_IN &&
1446 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION)
1447 1.134 toshii xfer->actlen = actlen;
1448 1.151 mycroft xfer->hcpriv = NULL;
1449 1.134 toshii
1450 1.134 toshii s = splusb();
1451 1.83 augustss usb_transfer_complete(xfer);
1452 1.134 toshii splx(s);
1453 1.83 augustss }
1454 1.83 augustss }
1455 1.83 augustss
1456 1.131 augustss #ifdef USB_USE_SOFTINTR
1457 1.119 augustss if (sc->sc_softwake) {
1458 1.119 augustss sc->sc_softwake = 0;
1459 1.119 augustss wakeup(&sc->sc_softwake);
1460 1.119 augustss }
1461 1.131 augustss #endif /* USB_USE_SOFTINTR */
1462 1.119 augustss
1463 1.72 augustss sc->sc_bus.intr_context--;
1464 1.105 augustss DPRINTFN(10,("ohci_softintr: done:\n"));
1465 1.1 augustss }
1466 1.1 augustss
1467 1.1 augustss void
1468 1.179 christos ohci_device_ctrl_done(usbd_xfer_handle xfer)
1469 1.1 augustss {
1470 1.195 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1471 1.195 bouyer int len = UGETW(xfer->request.wLength);
1472 1.195 bouyer int isread = (xfer->request.bmRequestType & UT_READ);
1473 1.195 bouyer
1474 1.140 gson DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1475 1.1 augustss
1476 1.38 augustss #ifdef DIAGNOSTIC
1477 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1478 1.140 gson panic("ohci_device_ctrl_done: not a request");
1479 1.1 augustss }
1480 1.38 augustss #endif
1481 1.195 bouyer if (len)
1482 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, len,
1483 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1484 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0,
1485 1.195 bouyer sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1486 1.1 augustss }
1487 1.1 augustss
1488 1.1 augustss void
1489 1.91 augustss ohci_device_intr_done(usbd_xfer_handle xfer)
1490 1.1 augustss {
1491 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1492 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1493 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1494 1.48 augustss ohci_soft_td_t *data, *tail;
1495 1.195 bouyer int isread =
1496 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1497 1.1 augustss
1498 1.1 augustss
1499 1.140 gson DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1500 1.53 augustss xfer, xfer->actlen));
1501 1.1 augustss
1502 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1503 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1504 1.53 augustss if (xfer->pipe->repeat) {
1505 1.60 augustss data = opipe->tail.td;
1506 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1507 1.53 augustss if (tail == NULL) {
1508 1.53 augustss xfer->status = USBD_NOMEM;
1509 1.1 augustss return;
1510 1.1 augustss }
1511 1.55 augustss tail->xfer = NULL;
1512 1.120 augustss
1513 1.168 augustss data->td.td_flags = HTOO32(
1514 1.120 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1515 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1516 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1517 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
1518 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1519 1.48 augustss data->nexttd = tail;
1520 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
1521 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1522 1.76 tsutsui xfer->length - 1);
1523 1.53 augustss data->len = xfer->length;
1524 1.53 augustss data->xfer = xfer;
1525 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1526 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
1527 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1528 1.53 augustss xfer->hcpriv = data;
1529 1.53 augustss xfer->actlen = 0;
1530 1.1 augustss
1531 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1532 1.195 bouyer usb_syncmem(&sed->dma,
1533 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1534 1.195 bouyer sizeof(sed->ed.ed_tailp),
1535 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1536 1.60 augustss opipe->tail.td = tail;
1537 1.1 augustss }
1538 1.1 augustss }
1539 1.1 augustss
1540 1.1 augustss void
1541 1.179 christos ohci_device_bulk_done(usbd_xfer_handle xfer)
1542 1.3 augustss {
1543 1.195 bouyer int isread =
1544 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1545 1.195 bouyer
1546 1.140 gson DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1547 1.53 augustss xfer, xfer->actlen));
1548 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1549 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1550 1.3 augustss }
1551 1.3 augustss
1552 1.3 augustss void
1553 1.91 augustss ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1554 1.1 augustss {
1555 1.1 augustss usbd_pipe_handle pipe;
1556 1.1 augustss u_char *p;
1557 1.1 augustss int i, m;
1558 1.1 augustss int hstatus;
1559 1.1 augustss
1560 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1561 1.120 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1562 1.53 augustss sc, xfer, hstatus));
1563 1.1 augustss
1564 1.53 augustss if (xfer == NULL) {
1565 1.1 augustss /* Just ignore the change. */
1566 1.1 augustss return;
1567 1.1 augustss }
1568 1.1 augustss
1569 1.53 augustss pipe = xfer->pipe;
1570 1.1 augustss
1571 1.123 augustss p = KERNADDR(&xfer->dmabuf, 0);
1572 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1573 1.53 augustss memset(p, 0, xfer->length);
1574 1.1 augustss for (i = 1; i <= m; i++) {
1575 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1576 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1577 1.1 augustss p[i/8] |= 1 << (i%8);
1578 1.1 augustss }
1579 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1580 1.53 augustss xfer->actlen = xfer->length;
1581 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1582 1.1 augustss
1583 1.53 augustss usb_transfer_complete(xfer);
1584 1.38 augustss }
1585 1.38 augustss
1586 1.38 augustss void
1587 1.179 christos ohci_root_intr_done(usbd_xfer_handle xfer)
1588 1.65 augustss {
1589 1.65 augustss }
1590 1.65 augustss
1591 1.65 augustss void
1592 1.179 christos ohci_root_ctrl_done(usbd_xfer_handle xfer)
1593 1.38 augustss {
1594 1.1 augustss }
1595 1.1 augustss
1596 1.1 augustss /*
1597 1.1 augustss * Wait here until controller claims to have an interrupt.
1598 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1599 1.1 augustss * too long.
1600 1.1 augustss */
1601 1.1 augustss void
1602 1.91 augustss ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1603 1.1 augustss {
1604 1.163 augustss int timo;
1605 1.1 augustss u_int32_t intrs;
1606 1.1 augustss
1607 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1608 1.163 augustss for (timo = xfer->timeout; timo >= 0; timo--) {
1609 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1610 1.116 augustss if (sc->sc_dying)
1611 1.116 augustss break;
1612 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1613 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1614 1.52 augustss #ifdef OHCI_DEBUG
1615 1.1 augustss if (ohcidebug > 15)
1616 1.1 augustss ohci_dumpregs(sc);
1617 1.1 augustss #endif
1618 1.1 augustss if (intrs) {
1619 1.53 augustss ohci_intr1(sc);
1620 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1621 1.1 augustss return;
1622 1.1 augustss }
1623 1.1 augustss }
1624 1.15 augustss
1625 1.15 augustss /* Timeout */
1626 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1627 1.53 augustss xfer->status = USBD_TIMEOUT;
1628 1.53 augustss usb_transfer_complete(xfer);
1629 1.15 augustss /* XXX should free TD */
1630 1.5 augustss }
1631 1.5 augustss
1632 1.5 augustss void
1633 1.91 augustss ohci_poll(struct usbd_bus *bus)
1634 1.5 augustss {
1635 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1636 1.105 augustss #ifdef OHCI_DEBUG
1637 1.105 augustss static int last;
1638 1.105 augustss int new;
1639 1.105 augustss new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1640 1.105 augustss if (new != last) {
1641 1.105 augustss DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1642 1.105 augustss last = new;
1643 1.105 augustss }
1644 1.105 augustss #endif
1645 1.5 augustss
1646 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1647 1.53 augustss ohci_intr1(sc);
1648 1.1 augustss }
1649 1.1 augustss
1650 1.1 augustss usbd_status
1651 1.91 augustss ohci_device_request(usbd_xfer_handle xfer)
1652 1.1 augustss {
1653 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1654 1.53 augustss usb_device_request_t *req = &xfer->request;
1655 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1656 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
1657 1.1 augustss int addr = dev->address;
1658 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1659 1.1 augustss ohci_soft_ed_t *sed;
1660 1.1 augustss int isread;
1661 1.1 augustss int len;
1662 1.53 augustss usbd_status err;
1663 1.1 augustss int s;
1664 1.1 augustss
1665 1.1 augustss isread = req->bmRequestType & UT_READ;
1666 1.1 augustss len = UGETW(req->wLength);
1667 1.1 augustss
1668 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1669 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1670 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1671 1.120 augustss UGETW(req->wIndex), len, addr,
1672 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1673 1.1 augustss
1674 1.60 augustss setup = opipe->tail.td;
1675 1.1 augustss stat = ohci_alloc_std(sc);
1676 1.53 augustss if (stat == NULL) {
1677 1.53 augustss err = USBD_NOMEM;
1678 1.1 augustss goto bad1;
1679 1.1 augustss }
1680 1.1 augustss tail = ohci_alloc_std(sc);
1681 1.53 augustss if (tail == NULL) {
1682 1.53 augustss err = USBD_NOMEM;
1683 1.1 augustss goto bad2;
1684 1.1 augustss }
1685 1.55 augustss tail->xfer = NULL;
1686 1.1 augustss
1687 1.1 augustss sed = opipe->sed;
1688 1.1 augustss opipe->u.ctl.length = len;
1689 1.1 augustss
1690 1.148 mycroft /* Update device address and length since they may have changed
1691 1.148 mycroft during the setup of the control pipe in usbd_new_device(). */
1692 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1693 1.77 augustss /* XXXX Should not touch ED here! */
1694 1.195 bouyer
1695 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1696 1.195 bouyer sizeof(sed->ed.ed_flags),
1697 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1698 1.168 augustss sed->ed.ed_flags = HTOO32(
1699 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1700 1.16 augustss OHCI_ED_SET_FA(addr) |
1701 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1702 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1703 1.195 bouyer sizeof(sed->ed.ed_flags),
1704 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1705 1.1 augustss
1706 1.77 augustss next = stat;
1707 1.77 augustss
1708 1.1 augustss /* Set up data transaction */
1709 1.1 augustss if (len != 0) {
1710 1.77 augustss ohci_soft_td_t *std = stat;
1711 1.77 augustss
1712 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1713 1.77 augustss std, &stat);
1714 1.77 augustss stat = stat->nexttd; /* point at free TD */
1715 1.77 augustss if (err)
1716 1.1 augustss goto bad3;
1717 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1718 1.168 augustss std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1719 1.168 augustss std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1720 1.195 bouyer usb_syncmem(&std->dma,
1721 1.195 bouyer std->offs + offsetof(ohci_td_t, td_flags),
1722 1.195 bouyer sizeof(std->td.td_flags),
1723 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1724 1.34 augustss }
1725 1.1 augustss
1726 1.123 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1727 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
1728 1.1 augustss
1729 1.168 augustss setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1730 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1731 1.168 augustss setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1732 1.1 augustss setup->nexttd = next;
1733 1.168 augustss setup->td.td_nexttd = HTOO32(next->physaddr);
1734 1.168 augustss setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1735 1.77 augustss setup->len = 0;
1736 1.53 augustss setup->xfer = xfer;
1737 1.34 augustss setup->flags = 0;
1738 1.53 augustss xfer->hcpriv = setup;
1739 1.195 bouyer usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
1740 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1741 1.1 augustss
1742 1.168 augustss stat->td.td_flags = HTOO32(
1743 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1744 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1745 1.39 augustss stat->td.td_cbp = 0;
1746 1.1 augustss stat->nexttd = tail;
1747 1.168 augustss stat->td.td_nexttd = HTOO32(tail->physaddr);
1748 1.39 augustss stat->td.td_be = 0;
1749 1.77 augustss stat->flags = OHCI_CALL_DONE;
1750 1.1 augustss stat->len = 0;
1751 1.53 augustss stat->xfer = xfer;
1752 1.195 bouyer usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
1753 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1754 1.1 augustss
1755 1.52 augustss #ifdef OHCI_DEBUG
1756 1.1 augustss if (ohcidebug > 5) {
1757 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1758 1.168 augustss ohci_dump_ed(sc, sed);
1759 1.168 augustss ohci_dump_tds(sc, setup);
1760 1.1 augustss }
1761 1.1 augustss #endif
1762 1.1 augustss
1763 1.1 augustss /* Insert ED in schedule */
1764 1.1 augustss s = splusb();
1765 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1766 1.195 bouyer usb_syncmem(&sed->dma,
1767 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1768 1.195 bouyer sizeof(sed->ed.ed_tailp),
1769 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1770 1.60 augustss opipe->tail.td = tail;
1771 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1772 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1773 1.209 dyoung callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
1774 1.80 augustss ohci_timeout, xfer);
1775 1.15 augustss }
1776 1.1 augustss splx(s);
1777 1.1 augustss
1778 1.115 itojun #ifdef OHCI_DEBUG
1779 1.113 augustss if (ohcidebug > 20) {
1780 1.77 augustss delay(10000);
1781 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1782 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1783 1.113 augustss ohci_dumpregs(sc);
1784 1.113 augustss printf("ctrl head:\n");
1785 1.168 augustss ohci_dump_ed(sc, sc->sc_ctrl_head);
1786 1.113 augustss printf("sed:\n");
1787 1.168 augustss ohci_dump_ed(sc, sed);
1788 1.168 augustss ohci_dump_tds(sc, setup);
1789 1.1 augustss }
1790 1.1 augustss #endif
1791 1.1 augustss
1792 1.1 augustss return (USBD_NORMAL_COMPLETION);
1793 1.1 augustss
1794 1.1 augustss bad3:
1795 1.1 augustss ohci_free_std(sc, tail);
1796 1.1 augustss bad2:
1797 1.1 augustss ohci_free_std(sc, stat);
1798 1.1 augustss bad1:
1799 1.53 augustss return (err);
1800 1.1 augustss }
1801 1.1 augustss
1802 1.1 augustss /*
1803 1.1 augustss * Add an ED to the schedule. Called at splusb().
1804 1.1 augustss */
1805 1.1 augustss void
1806 1.168 augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1807 1.1 augustss {
1808 1.113 augustss DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1809 1.113 augustss
1810 1.46 augustss SPLUSBCHECK;
1811 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1812 1.195 bouyer sizeof(head->ed.ed_nexted),
1813 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1814 1.1 augustss sed->next = head->next;
1815 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1816 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1817 1.195 bouyer sizeof(sed->ed.ed_nexted),
1818 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1819 1.1 augustss head->next = sed;
1820 1.168 augustss head->ed.ed_nexted = HTOO32(sed->physaddr);
1821 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1822 1.195 bouyer sizeof(head->ed.ed_nexted),
1823 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1824 1.1 augustss }
1825 1.1 augustss
1826 1.1 augustss /*
1827 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1828 1.3 augustss */
1829 1.3 augustss void
1830 1.91 augustss ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1831 1.3 augustss {
1832 1.120 augustss ohci_soft_ed_t *p;
1833 1.3 augustss
1834 1.46 augustss SPLUSBCHECK;
1835 1.46 augustss
1836 1.3 augustss /* XXX */
1837 1.133 toshii for (p = head; p != NULL && p->next != sed; p = p->next)
1838 1.3 augustss ;
1839 1.55 augustss if (p == NULL)
1840 1.128 provos panic("ohci_rem_ed: ED not found");
1841 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1842 1.195 bouyer sizeof(sed->ed.ed_nexted),
1843 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1844 1.3 augustss p->next = sed->next;
1845 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1846 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1847 1.195 bouyer sizeof(p->ed.ed_nexted),
1848 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1849 1.3 augustss }
1850 1.3 augustss
1851 1.3 augustss /*
1852 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1853 1.1 augustss * the host controller. This queue is the processed by software.
1854 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1855 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1856 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1857 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1858 1.1 augustss * hash value.
1859 1.1 augustss */
1860 1.1 augustss
1861 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1862 1.1 augustss /* Called at splusb() */
1863 1.1 augustss void
1864 1.91 augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1865 1.1 augustss {
1866 1.1 augustss int h = HASH(std->physaddr);
1867 1.1 augustss
1868 1.46 augustss SPLUSBCHECK;
1869 1.46 augustss
1870 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1871 1.1 augustss }
1872 1.1 augustss
1873 1.1 augustss /* Called at splusb() */
1874 1.1 augustss void
1875 1.179 christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1876 1.1 augustss {
1877 1.46 augustss SPLUSBCHECK;
1878 1.46 augustss
1879 1.1 augustss LIST_REMOVE(std, hnext);
1880 1.1 augustss }
1881 1.1 augustss
1882 1.1 augustss ohci_soft_td_t *
1883 1.91 augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1884 1.1 augustss {
1885 1.1 augustss int h = HASH(a);
1886 1.1 augustss ohci_soft_td_t *std;
1887 1.1 augustss
1888 1.120 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1889 1.53 augustss std != NULL;
1890 1.1 augustss std = LIST_NEXT(std, hnext))
1891 1.1 augustss if (std->physaddr == a)
1892 1.1 augustss return (std);
1893 1.83 augustss return (NULL);
1894 1.83 augustss }
1895 1.83 augustss
1896 1.83 augustss /* Called at splusb() */
1897 1.83 augustss void
1898 1.91 augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1899 1.83 augustss {
1900 1.83 augustss int h = HASH(sitd->physaddr);
1901 1.83 augustss
1902 1.83 augustss SPLUSBCHECK;
1903 1.83 augustss
1904 1.120 augustss DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1905 1.83 augustss sitd, (u_long)sitd->physaddr));
1906 1.83 augustss
1907 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1908 1.83 augustss }
1909 1.83 augustss
1910 1.83 augustss /* Called at splusb() */
1911 1.83 augustss void
1912 1.179 christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1913 1.83 augustss {
1914 1.83 augustss SPLUSBCHECK;
1915 1.83 augustss
1916 1.120 augustss DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1917 1.83 augustss sitd, (u_long)sitd->physaddr));
1918 1.83 augustss
1919 1.83 augustss LIST_REMOVE(sitd, hnext);
1920 1.83 augustss }
1921 1.83 augustss
1922 1.83 augustss ohci_soft_itd_t *
1923 1.91 augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1924 1.83 augustss {
1925 1.83 augustss int h = HASH(a);
1926 1.83 augustss ohci_soft_itd_t *sitd;
1927 1.83 augustss
1928 1.120 augustss for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1929 1.83 augustss sitd != NULL;
1930 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1931 1.83 augustss if (sitd->physaddr == a)
1932 1.83 augustss return (sitd);
1933 1.83 augustss return (NULL);
1934 1.1 augustss }
1935 1.1 augustss
1936 1.1 augustss void
1937 1.91 augustss ohci_timeout(void *addr)
1938 1.1 augustss {
1939 1.114 augustss struct ohci_xfer *oxfer = addr;
1940 1.116 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1941 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1942 1.114 augustss
1943 1.114 augustss DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1944 1.114 augustss
1945 1.116 augustss if (sc->sc_dying) {
1946 1.116 augustss ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1947 1.116 augustss return;
1948 1.116 augustss }
1949 1.116 augustss
1950 1.114 augustss /* Execute the abort in a process context. */
1951 1.114 augustss usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
1952 1.178 joerg usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
1953 1.178 joerg USB_TASKQ_HC);
1954 1.114 augustss }
1955 1.114 augustss
1956 1.114 augustss void
1957 1.114 augustss ohci_timeout_task(void *addr)
1958 1.114 augustss {
1959 1.53 augustss usbd_xfer_handle xfer = addr;
1960 1.48 augustss int s;
1961 1.1 augustss
1962 1.114 augustss DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1963 1.45 augustss
1964 1.48 augustss s = splusb();
1965 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
1966 1.48 augustss splx(s);
1967 1.1 augustss }
1968 1.1 augustss
1969 1.52 augustss #ifdef OHCI_DEBUG
1970 1.1 augustss void
1971 1.168 augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
1972 1.1 augustss {
1973 1.1 augustss for (; std; std = std->nexttd)
1974 1.168 augustss ohci_dump_td(sc, std);
1975 1.1 augustss }
1976 1.1 augustss
1977 1.1 augustss void
1978 1.168 augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1979 1.1 augustss {
1980 1.92 tv char sbuf[128];
1981 1.92 tv
1982 1.204 martin usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1983 1.204 martin BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1984 1.197 christos snprintb(sbuf, sizeof(sbuf),
1985 1.197 christos "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1986 1.197 christos (u_int32_t)O32TOH(std->td.td_flags));
1987 1.107 augustss printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1988 1.120 augustss "nexttd=0x%08lx be=0x%08lx\n",
1989 1.107 augustss std, (u_long)std->physaddr, sbuf,
1990 1.168 augustss OHCI_TD_GET_DI(O32TOH(std->td.td_flags)),
1991 1.168 augustss OHCI_TD_GET_EC(O32TOH(std->td.td_flags)),
1992 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1993 1.168 augustss (u_long)O32TOH(std->td.td_cbp),
1994 1.168 augustss (u_long)O32TOH(std->td.td_nexttd),
1995 1.168 augustss (u_long)O32TOH(std->td.td_be));
1996 1.1 augustss }
1997 1.1 augustss
1998 1.1 augustss void
1999 1.168 augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2000 1.83 augustss {
2001 1.83 augustss int i;
2002 1.83 augustss
2003 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
2004 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2005 1.107 augustss printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2006 1.120 augustss "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2007 1.107 augustss sitd, (u_long)sitd->physaddr,
2008 1.168 augustss OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
2009 1.168 augustss OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
2010 1.168 augustss OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
2011 1.168 augustss OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
2012 1.168 augustss (u_long)O32TOH(sitd->itd.itd_bp0),
2013 1.168 augustss (u_long)O32TOH(sitd->itd.itd_nextitd),
2014 1.168 augustss (u_long)O32TOH(sitd->itd.itd_be));
2015 1.83 augustss for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2016 1.107 augustss printf("offs[%d]=0x%04x ", i,
2017 1.168 augustss (u_int)O16TOH(sitd->itd.itd_offset[i]));
2018 1.107 augustss printf("\n");
2019 1.83 augustss }
2020 1.83 augustss
2021 1.83 augustss void
2022 1.168 augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2023 1.83 augustss {
2024 1.83 augustss for (; sitd; sitd = sitd->nextitd)
2025 1.168 augustss ohci_dump_itd(sc, sitd);
2026 1.83 augustss }
2027 1.83 augustss
2028 1.83 augustss void
2029 1.168 augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2030 1.1 augustss {
2031 1.92 tv char sbuf[128], sbuf2[128];
2032 1.92 tv
2033 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2034 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2035 1.197 christos snprintb(sbuf, sizeof(sbuf),
2036 1.197 christos "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2037 1.197 christos (u_int32_t)O32TOH(sed->ed.ed_flags));
2038 1.197 christos snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY",
2039 1.197 christos (u_int32_t)O32TOH(sed->ed.ed_headp));
2040 1.92 tv
2041 1.107 augustss printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2042 1.92 tv "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2043 1.120 augustss sed, (u_long)sed->physaddr,
2044 1.168 augustss OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
2045 1.168 augustss OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
2046 1.168 augustss OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
2047 1.168 augustss (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
2048 1.168 augustss (u_long)O32TOH(sed->ed.ed_headp),
2049 1.168 augustss (u_long)O32TOH(sed->ed.ed_nexted));
2050 1.1 augustss }
2051 1.1 augustss #endif
2052 1.1 augustss
2053 1.1 augustss usbd_status
2054 1.91 augustss ohci_open(usbd_pipe_handle pipe)
2055 1.1 augustss {
2056 1.1 augustss usbd_device_handle dev = pipe->device;
2057 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
2058 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2059 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2060 1.1 augustss u_int8_t addr = dev->address;
2061 1.60 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2062 1.1 augustss ohci_soft_ed_t *sed;
2063 1.1 augustss ohci_soft_td_t *std;
2064 1.60 augustss ohci_soft_itd_t *sitd;
2065 1.60 augustss ohci_physaddr_t tdphys;
2066 1.60 augustss u_int32_t fmt;
2067 1.53 augustss usbd_status err;
2068 1.1 augustss int s;
2069 1.64 augustss int ival;
2070 1.1 augustss
2071 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2072 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2073 1.81 augustss
2074 1.116 augustss if (sc->sc_dying)
2075 1.116 augustss return (USBD_IOERROR);
2076 1.116 augustss
2077 1.90 thorpej std = NULL;
2078 1.90 thorpej sed = NULL;
2079 1.90 thorpej
2080 1.1 augustss if (addr == sc->sc_addr) {
2081 1.1 augustss switch (ed->bEndpointAddress) {
2082 1.1 augustss case USB_CONTROL_ENDPOINT:
2083 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
2084 1.1 augustss break;
2085 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
2086 1.1 augustss pipe->methods = &ohci_root_intr_methods;
2087 1.1 augustss break;
2088 1.1 augustss default:
2089 1.1 augustss return (USBD_INVAL);
2090 1.1 augustss }
2091 1.1 augustss } else {
2092 1.1 augustss sed = ohci_alloc_sed(sc);
2093 1.53 augustss if (sed == NULL)
2094 1.1 augustss goto bad0;
2095 1.1 augustss opipe->sed = sed;
2096 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
2097 1.60 augustss sitd = ohci_alloc_sitd(sc);
2098 1.127 augustss if (sitd == NULL)
2099 1.60 augustss goto bad1;
2100 1.60 augustss opipe->tail.itd = sitd;
2101 1.76 tsutsui tdphys = sitd->physaddr;
2102 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
2103 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2104 1.83 augustss fmt |= OHCI_ED_DIR_IN;
2105 1.83 augustss else
2106 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
2107 1.60 augustss } else {
2108 1.60 augustss std = ohci_alloc_std(sc);
2109 1.127 augustss if (std == NULL)
2110 1.60 augustss goto bad1;
2111 1.60 augustss opipe->tail.td = std;
2112 1.76 tsutsui tdphys = std->physaddr;
2113 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2114 1.60 augustss }
2115 1.168 augustss sed->ed.ed_flags = HTOO32(
2116 1.120 augustss OHCI_ED_SET_FA(addr) |
2117 1.147 mycroft OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2118 1.109 augustss (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2119 1.109 augustss fmt |
2120 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2121 1.168 augustss sed->ed.ed_headp = sed->ed.ed_tailp = HTOO32(tdphys);
2122 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2123 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2124 1.1 augustss
2125 1.60 augustss switch (xfertype) {
2126 1.1 augustss case UE_CONTROL:
2127 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
2128 1.120 augustss err = usb_allocmem(&sc->sc_bus,
2129 1.120 augustss sizeof(usb_device_request_t),
2130 1.53 augustss 0, &opipe->u.ctl.reqdma);
2131 1.53 augustss if (err)
2132 1.1 augustss goto bad;
2133 1.1 augustss s = splusb();
2134 1.168 augustss ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2135 1.1 augustss splx(s);
2136 1.1 augustss break;
2137 1.1 augustss case UE_INTERRUPT:
2138 1.1 augustss pipe->methods = &ohci_device_intr_methods;
2139 1.64 augustss ival = pipe->interval;
2140 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
2141 1.64 augustss ival = ed->bInterval;
2142 1.64 augustss return (ohci_device_setintr(sc, opipe, ival));
2143 1.1 augustss case UE_ISOCHRONOUS:
2144 1.60 augustss pipe->methods = &ohci_device_isoc_methods;
2145 1.60 augustss return (ohci_setup_isoc(pipe));
2146 1.1 augustss case UE_BULK:
2147 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
2148 1.3 augustss s = splusb();
2149 1.168 augustss ohci_add_ed(sc, sed, sc->sc_bulk_head);
2150 1.3 augustss splx(s);
2151 1.3 augustss break;
2152 1.1 augustss }
2153 1.1 augustss }
2154 1.1 augustss return (USBD_NORMAL_COMPLETION);
2155 1.1 augustss
2156 1.1 augustss bad:
2157 1.90 thorpej if (std != NULL)
2158 1.90 thorpej ohci_free_std(sc, std);
2159 1.1 augustss bad1:
2160 1.90 thorpej if (sed != NULL)
2161 1.90 thorpej ohci_free_sed(sc, sed);
2162 1.1 augustss bad0:
2163 1.1 augustss return (USBD_NOMEM);
2164 1.120 augustss
2165 1.1 augustss }
2166 1.1 augustss
2167 1.1 augustss /*
2168 1.34 augustss * Close a reqular pipe.
2169 1.34 augustss * Assumes that there are no pending transactions.
2170 1.34 augustss */
2171 1.34 augustss void
2172 1.91 augustss ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2173 1.34 augustss {
2174 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2175 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2176 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
2177 1.34 augustss int s;
2178 1.34 augustss
2179 1.34 augustss s = splusb();
2180 1.34 augustss #ifdef DIAGNOSTIC
2181 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2182 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2183 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2184 1.34 augustss ohci_soft_td_t *std;
2185 1.168 augustss std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2186 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2187 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
2188 1.168 augustss (int)O32TOH(sed->ed.ed_headp),
2189 1.168 augustss (int)O32TOH(sed->ed.ed_tailp),
2190 1.34 augustss pipe, std);
2191 1.107 augustss #ifdef USB_DEBUG
2192 1.107 augustss usbd_dump_pipe(&opipe->pipe);
2193 1.107 augustss #endif
2194 1.106 augustss #ifdef OHCI_DEBUG
2195 1.168 augustss ohci_dump_ed(sc, sed);
2196 1.106 augustss if (std)
2197 1.168 augustss ohci_dump_td(sc, std);
2198 1.106 augustss #endif
2199 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
2200 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2201 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2202 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
2203 1.34 augustss }
2204 1.34 augustss #endif
2205 1.34 augustss ohci_rem_ed(sed, head);
2206 1.133 toshii /* Make sure the host controller is not touching this ED */
2207 1.133 toshii usb_delay_ms(&sc->sc_bus, 1);
2208 1.34 augustss splx(s);
2209 1.34 augustss ohci_free_sed(sc, opipe->sed);
2210 1.34 augustss }
2211 1.34 augustss
2212 1.120 augustss /*
2213 1.34 augustss * Abort a device request.
2214 1.34 augustss * If this routine is called at splusb() it guarantees that the request
2215 1.34 augustss * will be removed from the hardware scheduling and that the callback
2216 1.34 augustss * for it will be called with USBD_CANCELLED status.
2217 1.34 augustss * It's impossible to guarantee that the requested transfer will not
2218 1.34 augustss * have happened since the hardware runs concurrently.
2219 1.34 augustss * If the transaction has already happened we rely on the ordinary
2220 1.34 augustss * interrupt processing to process it.
2221 1.34 augustss */
2222 1.34 augustss void
2223 1.91 augustss ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2224 1.34 augustss {
2225 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2226 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
2227 1.106 augustss ohci_soft_ed_t *sed = opipe->sed;
2228 1.106 augustss ohci_soft_td_t *p, *n;
2229 1.106 augustss ohci_physaddr_t headp;
2230 1.106 augustss int s, hit;
2231 1.159 augustss int wake;
2232 1.34 augustss
2233 1.106 augustss DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2234 1.34 augustss
2235 1.116 augustss if (sc->sc_dying) {
2236 1.116 augustss /* If we're dying, just do the software part. */
2237 1.116 augustss s = splusb();
2238 1.116 augustss xfer->status = status; /* make software ignore it */
2239 1.209 dyoung callout_stop(&xfer->timeout_handle);
2240 1.116 augustss usb_transfer_complete(xfer);
2241 1.116 augustss splx(s);
2242 1.170 christos return;
2243 1.116 augustss }
2244 1.116 augustss
2245 1.106 augustss if (xfer->device->bus->intr_context || !curproc)
2246 1.128 provos panic("ohci_abort_xfer: not in process context");
2247 1.34 augustss
2248 1.106 augustss /*
2249 1.159 augustss * If an abort is already in progress then just wait for it to
2250 1.159 augustss * complete and return.
2251 1.159 augustss */
2252 1.159 augustss if (xfer->hcflags & UXFER_ABORTING) {
2253 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2254 1.159 augustss #ifdef DIAGNOSTIC
2255 1.159 augustss if (status == USBD_TIMEOUT)
2256 1.159 augustss printf("0hci_abort_xfer: TIMEOUT while aborting\n");
2257 1.159 augustss #endif
2258 1.159 augustss /* Override the status which might be USBD_TIMEOUT. */
2259 1.159 augustss xfer->status = status;
2260 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2261 1.159 augustss xfer->hcflags |= UXFER_ABORTWAIT;
2262 1.159 augustss while (xfer->hcflags & UXFER_ABORTING)
2263 1.159 augustss tsleep(&xfer->hcflags, PZERO, "ohciaw", 0);
2264 1.159 augustss return;
2265 1.159 augustss }
2266 1.159 augustss xfer->hcflags |= UXFER_ABORTING;
2267 1.159 augustss
2268 1.159 augustss /*
2269 1.106 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2270 1.106 augustss */
2271 1.106 augustss s = splusb();
2272 1.106 augustss xfer->status = status; /* make software ignore it */
2273 1.209 dyoung callout_stop(&xfer->timeout_handle);
2274 1.106 augustss splx(s);
2275 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2276 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2277 1.195 bouyer sizeof(sed->ed.ed_flags),
2278 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2279 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2280 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2281 1.195 bouyer sizeof(sed->ed.ed_flags),
2282 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2283 1.34 augustss
2284 1.120 augustss /*
2285 1.106 augustss * Step 2: Wait until we know hardware has finished any possible
2286 1.106 augustss * use of the xfer. Also make sure the soft interrupt routine
2287 1.106 augustss * has run.
2288 1.106 augustss */
2289 1.119 augustss usb_delay_ms(opipe->pipe.device->bus, 20); /* Hardware finishes in 1ms */
2290 1.119 augustss s = splusb();
2291 1.131 augustss #ifdef USB_USE_SOFTINTR
2292 1.119 augustss sc->sc_softwake = 1;
2293 1.131 augustss #endif /* USB_USE_SOFTINTR */
2294 1.119 augustss usb_schedsoftintr(&sc->sc_bus);
2295 1.131 augustss #ifdef USB_USE_SOFTINTR
2296 1.119 augustss tsleep(&sc->sc_softwake, PZERO, "ohciab", 0);
2297 1.131 augustss #endif /* USB_USE_SOFTINTR */
2298 1.119 augustss splx(s);
2299 1.119 augustss
2300 1.120 augustss /*
2301 1.106 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2302 1.106 augustss * The complication here is that the hardware may have executed
2303 1.106 augustss * beyond the xfer we're trying to abort. So as we're scanning
2304 1.106 augustss * the TDs of this xfer we check if the hardware points to
2305 1.106 augustss * any of them.
2306 1.106 augustss */
2307 1.106 augustss s = splusb(); /* XXX why? */
2308 1.53 augustss p = xfer->hcpriv;
2309 1.34 augustss #ifdef DIAGNOSTIC
2310 1.55 augustss if (p == NULL) {
2311 1.159 augustss xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2312 1.102 augustss splx(s);
2313 1.106 augustss printf("ohci_abort_xfer: hcpriv is NULL\n");
2314 1.38 augustss return;
2315 1.38 augustss }
2316 1.34 augustss #endif
2317 1.106 augustss #ifdef OHCI_DEBUG
2318 1.106 augustss if (ohcidebug > 1) {
2319 1.106 augustss DPRINTF(("ohci_abort_xfer: sed=\n"));
2320 1.168 augustss ohci_dump_ed(sc, sed);
2321 1.168 augustss ohci_dump_tds(sc, p);
2322 1.106 augustss }
2323 1.106 augustss #endif
2324 1.168 augustss headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2325 1.106 augustss hit = 0;
2326 1.53 augustss for (; p->xfer == xfer; p = n) {
2327 1.106 augustss hit |= headp == p->physaddr;
2328 1.38 augustss n = p->nexttd;
2329 1.38 augustss ohci_free_std(sc, p);
2330 1.34 augustss }
2331 1.106 augustss /* Zap headp register if hardware pointed inside the xfer. */
2332 1.106 augustss if (hit) {
2333 1.150 mycroft DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2334 1.168 augustss (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2335 1.168 augustss sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2336 1.195 bouyer usb_syncmem(&sed->dma,
2337 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_headp),
2338 1.195 bouyer sizeof(sed->ed.ed_headp),
2339 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2340 1.106 augustss } else {
2341 1.106 augustss DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2342 1.106 augustss }
2343 1.34 augustss
2344 1.106 augustss /*
2345 1.106 augustss * Step 4: Turn on hardware again.
2346 1.106 augustss */
2347 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2348 1.195 bouyer sizeof(sed->ed.ed_flags),
2349 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2350 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2351 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2352 1.195 bouyer sizeof(sed->ed.ed_flags),
2353 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2354 1.38 augustss
2355 1.106 augustss /*
2356 1.106 augustss * Step 5: Execute callback.
2357 1.106 augustss */
2358 1.159 augustss wake = xfer->hcflags & UXFER_ABORTWAIT;
2359 1.159 augustss xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2360 1.53 augustss usb_transfer_complete(xfer);
2361 1.159 augustss if (wake)
2362 1.159 augustss wakeup(&xfer->hcflags);
2363 1.38 augustss
2364 1.34 augustss splx(s);
2365 1.34 augustss }
2366 1.34 augustss
2367 1.34 augustss /*
2368 1.1 augustss * Data structures and routines to emulate the root hub.
2369 1.1 augustss */
2370 1.82 augustss Static usb_device_descriptor_t ohci_devd = {
2371 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2372 1.1 augustss UDESC_DEVICE, /* type */
2373 1.1 augustss {0x00, 0x01}, /* USB version */
2374 1.74 augustss UDCLASS_HUB, /* class */
2375 1.74 augustss UDSUBCLASS_HUB, /* subclass */
2376 1.202 uebayasi UDPROTO_FSHUB, /* protocol */
2377 1.1 augustss 64, /* max packet */
2378 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2379 1.1 augustss 1,2,0, /* string indicies */
2380 1.1 augustss 1 /* # of configurations */
2381 1.1 augustss };
2382 1.1 augustss
2383 1.182 drochner Static const usb_config_descriptor_t ohci_confd = {
2384 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2385 1.1 augustss UDESC_CONFIG,
2386 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2387 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2388 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2389 1.1 augustss 1,
2390 1.1 augustss 1,
2391 1.1 augustss 0,
2392 1.180 drochner UC_ATTR_MBO | UC_SELF_POWERED,
2393 1.1 augustss 0 /* max power */
2394 1.1 augustss };
2395 1.1 augustss
2396 1.182 drochner Static const usb_interface_descriptor_t ohci_ifcd = {
2397 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2398 1.1 augustss UDESC_INTERFACE,
2399 1.1 augustss 0,
2400 1.1 augustss 0,
2401 1.1 augustss 1,
2402 1.74 augustss UICLASS_HUB,
2403 1.74 augustss UISUBCLASS_HUB,
2404 1.109 augustss UIPROTO_FSHUB,
2405 1.1 augustss 0
2406 1.1 augustss };
2407 1.1 augustss
2408 1.182 drochner Static const usb_endpoint_descriptor_t ohci_endpd = {
2409 1.175 christos .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2410 1.175 christos .bDescriptorType = UDESC_ENDPOINT,
2411 1.175 christos .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2412 1.175 christos .bmAttributes = UE_INTERRUPT,
2413 1.175 christos .wMaxPacketSize = {8, 0}, /* max packet */
2414 1.175 christos .bInterval = 255,
2415 1.1 augustss };
2416 1.1 augustss
2417 1.182 drochner Static const usb_hub_descriptor_t ohci_hubd = {
2418 1.175 christos .bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2419 1.175 christos .bDescriptorType = UDESC_HUB,
2420 1.1 augustss };
2421 1.1 augustss
2422 1.1 augustss /*
2423 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2424 1.1 augustss */
2425 1.82 augustss Static usbd_status
2426 1.91 augustss ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2427 1.1 augustss {
2428 1.53 augustss usbd_status err;
2429 1.17 augustss
2430 1.46 augustss /* Insert last in queue. */
2431 1.53 augustss err = usb_insert_transfer(xfer);
2432 1.53 augustss if (err)
2433 1.53 augustss return (err);
2434 1.46 augustss
2435 1.46 augustss /* Pipe isn't running, start first */
2436 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2437 1.17 augustss }
2438 1.17 augustss
2439 1.82 augustss Static usbd_status
2440 1.91 augustss ohci_root_ctrl_start(usbd_xfer_handle xfer)
2441 1.17 augustss {
2442 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2443 1.1 augustss usb_device_request_t *req;
2444 1.52 augustss void *buf = NULL;
2445 1.1 augustss int port, i;
2446 1.46 augustss int s, len, value, index, l, totlen = 0;
2447 1.1 augustss usb_port_status_t ps;
2448 1.1 augustss usb_hub_descriptor_t hubd;
2449 1.53 augustss usbd_status err;
2450 1.1 augustss u_int32_t v;
2451 1.1 augustss
2452 1.83 augustss if (sc->sc_dying)
2453 1.83 augustss return (USBD_IOERROR);
2454 1.83 augustss
2455 1.42 augustss #ifdef DIAGNOSTIC
2456 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
2457 1.1 augustss /* XXX panic */
2458 1.1 augustss return (USBD_INVAL);
2459 1.42 augustss #endif
2460 1.53 augustss req = &xfer->request;
2461 1.1 augustss
2462 1.120 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2463 1.1 augustss req->bmRequestType, req->bRequest));
2464 1.1 augustss
2465 1.1 augustss len = UGETW(req->wLength);
2466 1.1 augustss value = UGETW(req->wValue);
2467 1.1 augustss index = UGETW(req->wIndex);
2468 1.43 augustss
2469 1.43 augustss if (len != 0)
2470 1.123 augustss buf = KERNADDR(&xfer->dmabuf, 0);
2471 1.43 augustss
2472 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2473 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2474 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2475 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2476 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2477 1.120 augustss /*
2478 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2479 1.1 augustss * for the integrated root hub.
2480 1.1 augustss */
2481 1.1 augustss break;
2482 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2483 1.1 augustss if (len > 0) {
2484 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2485 1.1 augustss totlen = 1;
2486 1.1 augustss }
2487 1.1 augustss break;
2488 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2489 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2490 1.171 christos if (len == 0)
2491 1.171 christos break;
2492 1.1 augustss switch(value >> 8) {
2493 1.1 augustss case UDESC_DEVICE:
2494 1.1 augustss if ((value & 0xff) != 0) {
2495 1.53 augustss err = USBD_IOERROR;
2496 1.1 augustss goto ret;
2497 1.1 augustss }
2498 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2499 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2500 1.1 augustss memcpy(buf, &ohci_devd, l);
2501 1.1 augustss break;
2502 1.1 augustss case UDESC_CONFIG:
2503 1.1 augustss if ((value & 0xff) != 0) {
2504 1.53 augustss err = USBD_IOERROR;
2505 1.1 augustss goto ret;
2506 1.1 augustss }
2507 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2508 1.1 augustss memcpy(buf, &ohci_confd, l);
2509 1.1 augustss buf = (char *)buf + l;
2510 1.1 augustss len -= l;
2511 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2512 1.1 augustss totlen += l;
2513 1.1 augustss memcpy(buf, &ohci_ifcd, l);
2514 1.1 augustss buf = (char *)buf + l;
2515 1.1 augustss len -= l;
2516 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2517 1.1 augustss totlen += l;
2518 1.1 augustss memcpy(buf, &ohci_endpd, l);
2519 1.1 augustss break;
2520 1.1 augustss case UDESC_STRING:
2521 1.186 drochner #define sd ((usb_string_descriptor_t *)buf)
2522 1.1 augustss switch (value & 0xff) {
2523 1.152 augustss case 0: /* Language table */
2524 1.186 drochner totlen = usb_makelangtbl(sd, len);
2525 1.152 augustss break;
2526 1.1 augustss case 1: /* Vendor */
2527 1.186 drochner totlen = usb_makestrdesc(sd, len,
2528 1.186 drochner sc->sc_vendor);
2529 1.1 augustss break;
2530 1.1 augustss case 2: /* Product */
2531 1.186 drochner totlen = usb_makestrdesc(sd, len,
2532 1.186 drochner "OHCI root hub");
2533 1.1 augustss break;
2534 1.1 augustss }
2535 1.186 drochner #undef sd
2536 1.1 augustss break;
2537 1.1 augustss default:
2538 1.53 augustss err = USBD_IOERROR;
2539 1.1 augustss goto ret;
2540 1.1 augustss }
2541 1.1 augustss break;
2542 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2543 1.1 augustss if (len > 0) {
2544 1.1 augustss *(u_int8_t *)buf = 0;
2545 1.1 augustss totlen = 1;
2546 1.1 augustss }
2547 1.1 augustss break;
2548 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2549 1.1 augustss if (len > 1) {
2550 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2551 1.1 augustss totlen = 2;
2552 1.1 augustss }
2553 1.1 augustss break;
2554 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2555 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2556 1.1 augustss if (len > 1) {
2557 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2558 1.1 augustss totlen = 2;
2559 1.1 augustss }
2560 1.1 augustss break;
2561 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2562 1.1 augustss if (value >= USB_MAX_DEVICES) {
2563 1.53 augustss err = USBD_IOERROR;
2564 1.1 augustss goto ret;
2565 1.1 augustss }
2566 1.1 augustss sc->sc_addr = value;
2567 1.1 augustss break;
2568 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2569 1.1 augustss if (value != 0 && value != 1) {
2570 1.53 augustss err = USBD_IOERROR;
2571 1.1 augustss goto ret;
2572 1.1 augustss }
2573 1.1 augustss sc->sc_conf = value;
2574 1.1 augustss break;
2575 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2576 1.1 augustss break;
2577 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2578 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2579 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2580 1.53 augustss err = USBD_IOERROR;
2581 1.1 augustss goto ret;
2582 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2583 1.1 augustss break;
2584 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2585 1.1 augustss break;
2586 1.1 augustss /* Hub requests */
2587 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2588 1.1 augustss break;
2589 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2590 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2591 1.14 augustss "port=%d feature=%d\n",
2592 1.1 augustss index, value));
2593 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2594 1.53 augustss err = USBD_IOERROR;
2595 1.1 augustss goto ret;
2596 1.1 augustss }
2597 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2598 1.1 augustss switch(value) {
2599 1.1 augustss case UHF_PORT_ENABLE:
2600 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2601 1.1 augustss break;
2602 1.1 augustss case UHF_PORT_SUSPEND:
2603 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2604 1.1 augustss break;
2605 1.1 augustss case UHF_PORT_POWER:
2606 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2607 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2608 1.1 augustss break;
2609 1.1 augustss case UHF_C_PORT_CONNECTION:
2610 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2611 1.1 augustss break;
2612 1.1 augustss case UHF_C_PORT_ENABLE:
2613 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2614 1.1 augustss break;
2615 1.1 augustss case UHF_C_PORT_SUSPEND:
2616 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2617 1.1 augustss break;
2618 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2619 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2620 1.1 augustss break;
2621 1.1 augustss case UHF_C_PORT_RESET:
2622 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2623 1.1 augustss break;
2624 1.1 augustss default:
2625 1.53 augustss err = USBD_IOERROR;
2626 1.1 augustss goto ret;
2627 1.1 augustss }
2628 1.1 augustss switch(value) {
2629 1.1 augustss case UHF_C_PORT_CONNECTION:
2630 1.1 augustss case UHF_C_PORT_ENABLE:
2631 1.1 augustss case UHF_C_PORT_SUSPEND:
2632 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2633 1.1 augustss case UHF_C_PORT_RESET:
2634 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2635 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2636 1.157 mycroft ohci_rhsc_enable(sc);
2637 1.1 augustss break;
2638 1.1 augustss default:
2639 1.1 augustss break;
2640 1.1 augustss }
2641 1.1 augustss break;
2642 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2643 1.171 christos if (len == 0)
2644 1.171 christos break;
2645 1.146 toshii if ((value & 0xff) != 0) {
2646 1.53 augustss err = USBD_IOERROR;
2647 1.1 augustss goto ret;
2648 1.1 augustss }
2649 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2650 1.1 augustss hubd = ohci_hubd;
2651 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2652 1.15 augustss USETW(hubd.wHubCharacteristics,
2653 1.120 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2654 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2655 1.1 augustss /* XXX overcurrent */
2656 1.1 augustss );
2657 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2658 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2659 1.120 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2660 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
2661 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2662 1.1 augustss l = min(len, hubd.bDescLength);
2663 1.1 augustss totlen = l;
2664 1.1 augustss memcpy(buf, &hubd, l);
2665 1.1 augustss break;
2666 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2667 1.1 augustss if (len != 4) {
2668 1.53 augustss err = USBD_IOERROR;
2669 1.1 augustss goto ret;
2670 1.1 augustss }
2671 1.1 augustss memset(buf, 0, len); /* ? XXX */
2672 1.1 augustss totlen = len;
2673 1.1 augustss break;
2674 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2675 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2676 1.1 augustss index));
2677 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2678 1.53 augustss err = USBD_IOERROR;
2679 1.1 augustss goto ret;
2680 1.1 augustss }
2681 1.1 augustss if (len != 4) {
2682 1.53 augustss err = USBD_IOERROR;
2683 1.1 augustss goto ret;
2684 1.1 augustss }
2685 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2686 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2687 1.1 augustss v));
2688 1.1 augustss USETW(ps.wPortStatus, v);
2689 1.1 augustss USETW(ps.wPortChange, v >> 16);
2690 1.1 augustss l = min(len, sizeof ps);
2691 1.1 augustss memcpy(buf, &ps, l);
2692 1.1 augustss totlen = l;
2693 1.1 augustss break;
2694 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2695 1.53 augustss err = USBD_IOERROR;
2696 1.1 augustss goto ret;
2697 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2698 1.1 augustss break;
2699 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2700 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2701 1.53 augustss err = USBD_IOERROR;
2702 1.1 augustss goto ret;
2703 1.1 augustss }
2704 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2705 1.1 augustss switch(value) {
2706 1.1 augustss case UHF_PORT_ENABLE:
2707 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2708 1.1 augustss break;
2709 1.1 augustss case UHF_PORT_SUSPEND:
2710 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2711 1.1 augustss break;
2712 1.1 augustss case UHF_PORT_RESET:
2713 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2714 1.14 augustss index));
2715 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2716 1.110 augustss for (i = 0; i < 5; i++) {
2717 1.110 augustss usb_delay_ms(&sc->sc_bus,
2718 1.110 augustss USB_PORT_ROOT_RESET_DELAY);
2719 1.116 augustss if (sc->sc_dying) {
2720 1.116 augustss err = USBD_IOERROR;
2721 1.116 augustss goto ret;
2722 1.116 augustss }
2723 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2724 1.1 augustss break;
2725 1.1 augustss }
2726 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2727 1.1 augustss index, OREAD4(sc, port)));
2728 1.1 augustss break;
2729 1.1 augustss case UHF_PORT_POWER:
2730 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2731 1.14 augustss "%d\n", index));
2732 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2733 1.1 augustss break;
2734 1.1 augustss default:
2735 1.53 augustss err = USBD_IOERROR;
2736 1.1 augustss goto ret;
2737 1.1 augustss }
2738 1.1 augustss break;
2739 1.1 augustss default:
2740 1.53 augustss err = USBD_IOERROR;
2741 1.1 augustss goto ret;
2742 1.1 augustss }
2743 1.53 augustss xfer->actlen = totlen;
2744 1.53 augustss err = USBD_NORMAL_COMPLETION;
2745 1.1 augustss ret:
2746 1.53 augustss xfer->status = err;
2747 1.46 augustss s = splusb();
2748 1.53 augustss usb_transfer_complete(xfer);
2749 1.46 augustss splx(s);
2750 1.1 augustss return (USBD_IN_PROGRESS);
2751 1.1 augustss }
2752 1.1 augustss
2753 1.1 augustss /* Abort a root control request. */
2754 1.82 augustss Static void
2755 1.179 christos ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2756 1.1 augustss {
2757 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2758 1.1 augustss }
2759 1.1 augustss
2760 1.1 augustss /* Close the root pipe. */
2761 1.82 augustss Static void
2762 1.179 christos ohci_root_ctrl_close(usbd_pipe_handle pipe)
2763 1.1 augustss {
2764 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2765 1.34 augustss /* Nothing to do. */
2766 1.1 augustss }
2767 1.1 augustss
2768 1.82 augustss Static usbd_status
2769 1.91 augustss ohci_root_intr_transfer(usbd_xfer_handle xfer)
2770 1.1 augustss {
2771 1.53 augustss usbd_status err;
2772 1.17 augustss
2773 1.46 augustss /* Insert last in queue. */
2774 1.53 augustss err = usb_insert_transfer(xfer);
2775 1.53 augustss if (err)
2776 1.53 augustss return (err);
2777 1.46 augustss
2778 1.46 augustss /* Pipe isn't running, start first */
2779 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2780 1.17 augustss }
2781 1.17 augustss
2782 1.82 augustss Static usbd_status
2783 1.91 augustss ohci_root_intr_start(usbd_xfer_handle xfer)
2784 1.17 augustss {
2785 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2786 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2787 1.1 augustss
2788 1.83 augustss if (sc->sc_dying)
2789 1.83 augustss return (USBD_IOERROR);
2790 1.83 augustss
2791 1.53 augustss sc->sc_intrxfer = xfer;
2792 1.1 augustss
2793 1.1 augustss return (USBD_IN_PROGRESS);
2794 1.1 augustss }
2795 1.1 augustss
2796 1.3 augustss /* Abort a root interrupt request. */
2797 1.82 augustss Static void
2798 1.91 augustss ohci_root_intr_abort(usbd_xfer_handle xfer)
2799 1.1 augustss {
2800 1.53 augustss int s;
2801 1.53 augustss
2802 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2803 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2804 1.53 augustss xfer->pipe->intrxfer = NULL;
2805 1.51 augustss }
2806 1.53 augustss xfer->status = USBD_CANCELLED;
2807 1.53 augustss s = splusb();
2808 1.53 augustss usb_transfer_complete(xfer);
2809 1.53 augustss splx(s);
2810 1.1 augustss }
2811 1.1 augustss
2812 1.1 augustss /* Close the root pipe. */
2813 1.82 augustss Static void
2814 1.91 augustss ohci_root_intr_close(usbd_pipe_handle pipe)
2815 1.1 augustss {
2816 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2817 1.120 augustss
2818 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2819 1.34 augustss
2820 1.53 augustss sc->sc_intrxfer = NULL;
2821 1.1 augustss }
2822 1.1 augustss
2823 1.1 augustss /************************/
2824 1.1 augustss
2825 1.82 augustss Static usbd_status
2826 1.91 augustss ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2827 1.1 augustss {
2828 1.53 augustss usbd_status err;
2829 1.17 augustss
2830 1.46 augustss /* Insert last in queue. */
2831 1.53 augustss err = usb_insert_transfer(xfer);
2832 1.53 augustss if (err)
2833 1.53 augustss return (err);
2834 1.46 augustss
2835 1.46 augustss /* Pipe isn't running, start first */
2836 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2837 1.17 augustss }
2838 1.17 augustss
2839 1.82 augustss Static usbd_status
2840 1.91 augustss ohci_device_ctrl_start(usbd_xfer_handle xfer)
2841 1.17 augustss {
2842 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2843 1.53 augustss usbd_status err;
2844 1.1 augustss
2845 1.83 augustss if (sc->sc_dying)
2846 1.83 augustss return (USBD_IOERROR);
2847 1.83 augustss
2848 1.42 augustss #ifdef DIAGNOSTIC
2849 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2850 1.1 augustss /* XXX panic */
2851 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2852 1.1 augustss return (USBD_INVAL);
2853 1.1 augustss }
2854 1.42 augustss #endif
2855 1.1 augustss
2856 1.53 augustss err = ohci_device_request(xfer);
2857 1.53 augustss if (err)
2858 1.53 augustss return (err);
2859 1.1 augustss
2860 1.6 augustss if (sc->sc_bus.use_polling)
2861 1.53 augustss ohci_waitintr(sc, xfer);
2862 1.1 augustss return (USBD_IN_PROGRESS);
2863 1.1 augustss }
2864 1.1 augustss
2865 1.1 augustss /* Abort a device control request. */
2866 1.82 augustss Static void
2867 1.91 augustss ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2868 1.1 augustss {
2869 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2870 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2871 1.1 augustss }
2872 1.1 augustss
2873 1.1 augustss /* Close a device control pipe. */
2874 1.82 augustss Static void
2875 1.91 augustss ohci_device_ctrl_close(usbd_pipe_handle pipe)
2876 1.1 augustss {
2877 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2878 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2879 1.1 augustss
2880 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2881 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2882 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2883 1.3 augustss }
2884 1.3 augustss
2885 1.3 augustss /************************/
2886 1.37 augustss
2887 1.82 augustss Static void
2888 1.91 augustss ohci_device_clear_toggle(usbd_pipe_handle pipe)
2889 1.37 augustss {
2890 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2891 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2892 1.37 augustss
2893 1.168 augustss opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2894 1.37 augustss }
2895 1.37 augustss
2896 1.82 augustss Static void
2897 1.179 christos ohci_noop(usbd_pipe_handle pipe)
2898 1.37 augustss {
2899 1.37 augustss }
2900 1.3 augustss
2901 1.82 augustss Static usbd_status
2902 1.91 augustss ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2903 1.3 augustss {
2904 1.53 augustss usbd_status err;
2905 1.17 augustss
2906 1.46 augustss /* Insert last in queue. */
2907 1.53 augustss err = usb_insert_transfer(xfer);
2908 1.53 augustss if (err)
2909 1.53 augustss return (err);
2910 1.46 augustss
2911 1.46 augustss /* Pipe isn't running, start first */
2912 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2913 1.17 augustss }
2914 1.17 augustss
2915 1.82 augustss Static usbd_status
2916 1.91 augustss ohci_device_bulk_start(usbd_xfer_handle xfer)
2917 1.17 augustss {
2918 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2919 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2920 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
2921 1.3 augustss int addr = dev->address;
2922 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2923 1.3 augustss ohci_soft_ed_t *sed;
2924 1.40 augustss int s, len, isread, endpt;
2925 1.53 augustss usbd_status err;
2926 1.3 augustss
2927 1.83 augustss if (sc->sc_dying)
2928 1.83 augustss return (USBD_IOERROR);
2929 1.83 augustss
2930 1.34 augustss #ifdef DIAGNOSTIC
2931 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
2932 1.3 augustss /* XXX panic */
2933 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2934 1.3 augustss return (USBD_INVAL);
2935 1.3 augustss }
2936 1.34 augustss #endif
2937 1.3 augustss
2938 1.53 augustss len = xfer->length;
2939 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2940 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2941 1.3 augustss sed = opipe->sed;
2942 1.3 augustss
2943 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2944 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2945 1.40 augustss endpt));
2946 1.34 augustss
2947 1.32 augustss opipe->u.bulk.isread = isread;
2948 1.3 augustss opipe->u.bulk.length = len;
2949 1.3 augustss
2950 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2951 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2952 1.3 augustss /* Update device address */
2953 1.168 augustss sed->ed.ed_flags = HTOO32(
2954 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2955 1.16 augustss OHCI_ED_SET_FA(addr));
2956 1.3 augustss
2957 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2958 1.60 augustss data = opipe->tail.td;
2959 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2960 1.77 augustss data, &tail);
2961 1.77 augustss /* We want interrupt at the end of the transfer. */
2962 1.168 augustss tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
2963 1.168 augustss tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
2964 1.77 augustss tail->flags |= OHCI_CALL_DONE;
2965 1.77 augustss tail = tail->nexttd; /* point at sentinel */
2966 1.195 bouyer usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
2967 1.195 bouyer sizeof(tail->td.td_flags),
2968 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2969 1.53 augustss if (err)
2970 1.53 augustss return (err);
2971 1.48 augustss
2972 1.53 augustss tail->xfer = NULL;
2973 1.53 augustss xfer->hcpriv = data;
2974 1.3 augustss
2975 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2976 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2977 1.168 augustss (int)O32TOH(sed->ed.ed_flags),
2978 1.168 augustss (int)O32TOH(data->td.td_flags),
2979 1.168 augustss (int)O32TOH(data->td.td_cbp),
2980 1.168 augustss (int)O32TOH(data->td.td_be)));
2981 1.34 augustss
2982 1.52 augustss #ifdef OHCI_DEBUG
2983 1.75 augustss if (ohcidebug > 5) {
2984 1.168 augustss ohci_dump_ed(sc, sed);
2985 1.168 augustss ohci_dump_tds(sc, data);
2986 1.34 augustss }
2987 1.34 augustss #endif
2988 1.34 augustss
2989 1.3 augustss /* Insert ED in schedule */
2990 1.3 augustss s = splusb();
2991 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2992 1.53 augustss tdp->xfer = xfer;
2993 1.48 augustss }
2994 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
2995 1.60 augustss opipe->tail.td = tail;
2996 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
2997 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2998 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2999 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3000 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
3001 1.209 dyoung callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
3002 1.80 augustss ohci_timeout, xfer);
3003 1.15 augustss }
3004 1.34 augustss
3005 1.52 augustss #if 0
3006 1.52 augustss /* This goes wrong if we are too slow. */
3007 1.75 augustss if (ohcidebug > 10) {
3008 1.75 augustss delay(10000);
3009 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3010 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3011 1.168 augustss ohci_dump_ed(sc, sed);
3012 1.168 augustss ohci_dump_tds(sc, data);
3013 1.34 augustss }
3014 1.34 augustss #endif
3015 1.34 augustss
3016 1.3 augustss splx(s);
3017 1.3 augustss
3018 1.3 augustss return (USBD_IN_PROGRESS);
3019 1.3 augustss }
3020 1.3 augustss
3021 1.82 augustss Static void
3022 1.91 augustss ohci_device_bulk_abort(usbd_xfer_handle xfer)
3023 1.3 augustss {
3024 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3025 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3026 1.3 augustss }
3027 1.3 augustss
3028 1.120 augustss /*
3029 1.34 augustss * Close a device bulk pipe.
3030 1.34 augustss */
3031 1.82 augustss Static void
3032 1.91 augustss ohci_device_bulk_close(usbd_pipe_handle pipe)
3033 1.3 augustss {
3034 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3035 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3036 1.3 augustss
3037 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3038 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
3039 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3040 1.1 augustss }
3041 1.1 augustss
3042 1.1 augustss /************************/
3043 1.1 augustss
3044 1.82 augustss Static usbd_status
3045 1.91 augustss ohci_device_intr_transfer(usbd_xfer_handle xfer)
3046 1.17 augustss {
3047 1.53 augustss usbd_status err;
3048 1.17 augustss
3049 1.46 augustss /* Insert last in queue. */
3050 1.53 augustss err = usb_insert_transfer(xfer);
3051 1.53 augustss if (err)
3052 1.53 augustss return (err);
3053 1.46 augustss
3054 1.46 augustss /* Pipe isn't running, start first */
3055 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3056 1.17 augustss }
3057 1.17 augustss
3058 1.82 augustss Static usbd_status
3059 1.91 augustss ohci_device_intr_start(usbd_xfer_handle xfer)
3060 1.1 augustss {
3061 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3062 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
3063 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3064 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
3065 1.48 augustss ohci_soft_td_t *data, *tail;
3066 1.165 skrll int s, len, isread, endpt;
3067 1.1 augustss
3068 1.83 augustss if (sc->sc_dying)
3069 1.83 augustss return (USBD_IOERROR);
3070 1.83 augustss
3071 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3072 1.14 augustss "flags=%d priv=%p\n",
3073 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
3074 1.1 augustss
3075 1.42 augustss #ifdef DIAGNOSTIC
3076 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
3077 1.128 provos panic("ohci_device_intr_transfer: a request");
3078 1.42 augustss #endif
3079 1.1 augustss
3080 1.53 augustss len = xfer->length;
3081 1.165 skrll endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3082 1.165 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3083 1.1 augustss
3084 1.60 augustss data = opipe->tail.td;
3085 1.1 augustss tail = ohci_alloc_std(sc);
3086 1.55 augustss if (tail == NULL)
3087 1.43 augustss return (USBD_NOMEM);
3088 1.53 augustss tail->xfer = NULL;
3089 1.1 augustss
3090 1.168 augustss data->td.td_flags = HTOO32(
3091 1.165 skrll isread ? OHCI_TD_IN : OHCI_TD_OUT |
3092 1.165 skrll OHCI_TD_NOCC |
3093 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3094 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
3095 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
3096 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3097 1.48 augustss data->nexttd = tail;
3098 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
3099 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3100 1.48 augustss data->len = len;
3101 1.53 augustss data->xfer = xfer;
3102 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3103 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
3104 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3105 1.53 augustss xfer->hcpriv = data;
3106 1.1 augustss
3107 1.52 augustss #ifdef OHCI_DEBUG
3108 1.1 augustss if (ohcidebug > 5) {
3109 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
3110 1.168 augustss ohci_dump_ed(sc, sed);
3111 1.168 augustss ohci_dump_tds(sc, data);
3112 1.1 augustss }
3113 1.1 augustss #endif
3114 1.1 augustss
3115 1.1 augustss /* Insert ED in schedule */
3116 1.1 augustss s = splusb();
3117 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3118 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3119 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3120 1.60 augustss opipe->tail.td = tail;
3121 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3122 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3123 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3124 1.1 augustss
3125 1.52 augustss #if 0
3126 1.52 augustss /*
3127 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
3128 1.52 augustss * because false references are followed due to the fact that the
3129 1.52 augustss * TD is gone.
3130 1.52 augustss */
3131 1.1 augustss if (ohcidebug > 5) {
3132 1.55 augustss usb_delay_ms(&sc->sc_bus, 5);
3133 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3134 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3135 1.168 augustss ohci_dump_ed(sc, sed);
3136 1.168 augustss ohci_dump_tds(sc, data);
3137 1.1 augustss }
3138 1.1 augustss #endif
3139 1.26 augustss splx(s);
3140 1.1 augustss
3141 1.1 augustss return (USBD_IN_PROGRESS);
3142 1.1 augustss }
3143 1.1 augustss
3144 1.1 augustss /* Abort a device control request. */
3145 1.82 augustss Static void
3146 1.91 augustss ohci_device_intr_abort(usbd_xfer_handle xfer)
3147 1.1 augustss {
3148 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
3149 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
3150 1.55 augustss xfer->pipe->intrxfer = NULL;
3151 1.1 augustss }
3152 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3153 1.1 augustss }
3154 1.1 augustss
3155 1.1 augustss /* Close a device interrupt pipe. */
3156 1.82 augustss Static void
3157 1.91 augustss ohci_device_intr_close(usbd_pipe_handle pipe)
3158 1.1 augustss {
3159 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3160 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3161 1.1 augustss int nslots = opipe->u.intr.nslots;
3162 1.1 augustss int pos = opipe->u.intr.pos;
3163 1.1 augustss int j;
3164 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
3165 1.1 augustss int s;
3166 1.1 augustss
3167 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3168 1.1 augustss pipe, nslots, pos));
3169 1.1 augustss s = splusb();
3170 1.195 bouyer usb_syncmem(&sed->dma, sed->offs,
3171 1.195 bouyer sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3172 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3173 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3174 1.195 bouyer sizeof(sed->ed.ed_flags),
3175 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3176 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3177 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3178 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
3179 1.1 augustss
3180 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3181 1.172 christos continue;
3182 1.53 augustss #ifdef DIAGNOSTIC
3183 1.173 christos if (p == NULL)
3184 1.128 provos panic("ohci_device_intr_close: ED not found");
3185 1.53 augustss #endif
3186 1.173 christos p->next = sed->next;
3187 1.173 christos p->ed.ed_nexted = sed->ed.ed_nexted;
3188 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3189 1.195 bouyer sizeof(p->ed.ed_nexted),
3190 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3191 1.1 augustss splx(s);
3192 1.1 augustss
3193 1.1 augustss for (j = 0; j < nslots; j++)
3194 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3195 1.1 augustss
3196 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3197 1.1 augustss ohci_free_sed(sc, opipe->sed);
3198 1.1 augustss }
3199 1.1 augustss
3200 1.82 augustss Static usbd_status
3201 1.91 augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3202 1.1 augustss {
3203 1.1 augustss int i, j, s, best;
3204 1.1 augustss u_int npoll, slow, shigh, nslots;
3205 1.1 augustss u_int bestbw, bw;
3206 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
3207 1.1 augustss
3208 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3209 1.1 augustss if (ival == 0) {
3210 1.1 augustss printf("ohci_setintr: 0 interval\n");
3211 1.1 augustss return (USBD_INVAL);
3212 1.1 augustss }
3213 1.1 augustss
3214 1.1 augustss npoll = OHCI_NO_INTRS;
3215 1.1 augustss while (npoll > ival)
3216 1.1 augustss npoll /= 2;
3217 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3218 1.1 augustss
3219 1.1 augustss /*
3220 1.1 augustss * We now know which level in the tree the ED must go into.
3221 1.1 augustss * Figure out which slot has most bandwidth left over.
3222 1.1 augustss * Slots to examine:
3223 1.1 augustss * npoll
3224 1.1 augustss * 1 0
3225 1.1 augustss * 2 1 2
3226 1.1 augustss * 4 3 4 5 6
3227 1.1 augustss * 8 7 8 9 10 11 12 13 14
3228 1.1 augustss * N (N-1) .. (N-1+N-1)
3229 1.1 augustss */
3230 1.1 augustss slow = npoll-1;
3231 1.1 augustss shigh = slow + npoll;
3232 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
3233 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3234 1.1 augustss bw = 0;
3235 1.1 augustss for (j = 0; j < nslots; j++)
3236 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3237 1.1 augustss if (bw < bestbw) {
3238 1.1 augustss best = i;
3239 1.1 augustss bestbw = bw;
3240 1.1 augustss }
3241 1.1 augustss }
3242 1.120 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3243 1.1 augustss best, slow, shigh, bestbw));
3244 1.1 augustss
3245 1.1 augustss s = splusb();
3246 1.1 augustss hsed = sc->sc_eds[best];
3247 1.1 augustss sed->next = hsed->next;
3248 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3249 1.195 bouyer sizeof(hsed->ed.ed_flags),
3250 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3251 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
3252 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3253 1.195 bouyer sizeof(sed->ed.ed_flags),
3254 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3255 1.1 augustss hsed->next = sed;
3256 1.168 augustss hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3257 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3258 1.195 bouyer sizeof(hsed->ed.ed_flags),
3259 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3260 1.1 augustss splx(s);
3261 1.1 augustss
3262 1.1 augustss for (j = 0; j < nslots; j++)
3263 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3264 1.1 augustss opipe->u.intr.nslots = nslots;
3265 1.1 augustss opipe->u.intr.pos = best;
3266 1.1 augustss
3267 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3268 1.1 augustss return (USBD_NORMAL_COMPLETION);
3269 1.60 augustss }
3270 1.60 augustss
3271 1.60 augustss /***********************/
3272 1.60 augustss
3273 1.60 augustss usbd_status
3274 1.91 augustss ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3275 1.60 augustss {
3276 1.60 augustss usbd_status err;
3277 1.60 augustss
3278 1.60 augustss DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3279 1.60 augustss
3280 1.60 augustss /* Put it on our queue, */
3281 1.60 augustss err = usb_insert_transfer(xfer);
3282 1.60 augustss
3283 1.60 augustss /* bail out on error, */
3284 1.60 augustss if (err && err != USBD_IN_PROGRESS)
3285 1.60 augustss return (err);
3286 1.60 augustss
3287 1.60 augustss /* XXX should check inuse here */
3288 1.60 augustss
3289 1.60 augustss /* insert into schedule, */
3290 1.60 augustss ohci_device_isoc_enter(xfer);
3291 1.60 augustss
3292 1.83 augustss /* and start if the pipe wasn't running */
3293 1.60 augustss if (!err)
3294 1.60 augustss ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3295 1.60 augustss
3296 1.60 augustss return (err);
3297 1.60 augustss }
3298 1.60 augustss
3299 1.60 augustss void
3300 1.91 augustss ohci_device_isoc_enter(usbd_xfer_handle xfer)
3301 1.60 augustss {
3302 1.61 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3303 1.61 augustss usbd_device_handle dev = opipe->pipe.device;
3304 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3305 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
3306 1.61 augustss struct iso *iso = &opipe->u.iso;
3307 1.120 augustss ohci_soft_itd_t *sitd, *nsitd;
3308 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
3309 1.61 augustss int i, ncur, nframes;
3310 1.61 augustss int s;
3311 1.61 augustss
3312 1.83 augustss DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3313 1.83 augustss "nframes=%d\n",
3314 1.83 augustss iso->inuse, iso->next, xfer, xfer->nframes));
3315 1.83 augustss
3316 1.83 augustss if (sc->sc_dying)
3317 1.83 augustss return;
3318 1.83 augustss
3319 1.83 augustss if (iso->next == -1) {
3320 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
3321 1.168 augustss iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3322 1.120 augustss DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3323 1.83 augustss iso->next));
3324 1.83 augustss }
3325 1.83 augustss
3326 1.61 augustss sitd = opipe->tail.itd;
3327 1.125 augustss buf = DMAADDR(&xfer->dmabuf, 0);
3328 1.83 augustss bp0 = OHCI_PAGE(buf);
3329 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
3330 1.61 augustss nframes = xfer->nframes;
3331 1.83 augustss xfer->hcpriv = sitd;
3332 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
3333 1.83 augustss noffs = offs + xfer->frlengths[i];
3334 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3335 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3336 1.120 augustss
3337 1.83 augustss /* Allocate next ITD */
3338 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3339 1.61 augustss if (nsitd == NULL) {
3340 1.61 augustss /* XXX what now? */
3341 1.83 augustss printf("%s: isoc TD alloc failed\n",
3342 1.190 drochner device_xname(sc->sc_dev));
3343 1.61 augustss return;
3344 1.61 augustss }
3345 1.83 augustss
3346 1.83 augustss /* Fill current ITD */
3347 1.168 augustss sitd->itd.itd_flags = HTOO32(
3348 1.120 augustss OHCI_ITD_NOCC |
3349 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3350 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
3351 1.83 augustss OHCI_ITD_SET_FC(ncur));
3352 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3353 1.83 augustss sitd->nextitd = nsitd;
3354 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3355 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3356 1.83 augustss sitd->xfer = xfer;
3357 1.83 augustss sitd->flags = 0;
3358 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3359 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3360 1.83 augustss
3361 1.61 augustss sitd = nsitd;
3362 1.120 augustss iso->next = iso->next + ncur;
3363 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
3364 1.61 augustss ncur = 0;
3365 1.61 augustss }
3366 1.168 augustss sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3367 1.83 augustss offs = noffs;
3368 1.61 augustss }
3369 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3370 1.61 augustss if (nsitd == NULL) {
3371 1.61 augustss /* XXX what now? */
3372 1.120 augustss printf("%s: isoc TD alloc failed\n",
3373 1.190 drochner device_xname(sc->sc_dev));
3374 1.61 augustss return;
3375 1.61 augustss }
3376 1.83 augustss /* Fixup last used ITD */
3377 1.168 augustss sitd->itd.itd_flags = HTOO32(
3378 1.120 augustss OHCI_ITD_NOCC |
3379 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3380 1.61 augustss OHCI_ITD_SET_DI(0) |
3381 1.61 augustss OHCI_ITD_SET_FC(ncur));
3382 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3383 1.83 augustss sitd->nextitd = nsitd;
3384 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3385 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3386 1.83 augustss sitd->xfer = xfer;
3387 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3388 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3389 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3390 1.83 augustss
3391 1.61 augustss iso->next = iso->next + ncur;
3392 1.83 augustss iso->inuse += nframes;
3393 1.83 augustss
3394 1.83 augustss xfer->actlen = offs; /* XXX pretend we did it all */
3395 1.83 augustss
3396 1.83 augustss xfer->status = USBD_IN_PROGRESS;
3397 1.83 augustss
3398 1.83 augustss #ifdef OHCI_DEBUG
3399 1.83 augustss if (ohcidebug > 5) {
3400 1.83 augustss DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3401 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3402 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3403 1.168 augustss ohci_dump_ed(sc, sed);
3404 1.83 augustss }
3405 1.83 augustss #endif
3406 1.61 augustss
3407 1.83 augustss s = splusb();
3408 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3409 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3410 1.168 augustss sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3411 1.61 augustss opipe->tail.itd = nsitd;
3412 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3413 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3414 1.195 bouyer sizeof(sed->ed.ed_flags),
3415 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3416 1.61 augustss splx(s);
3417 1.83 augustss
3418 1.83 augustss #ifdef OHCI_DEBUG
3419 1.83 augustss if (ohcidebug > 5) {
3420 1.83 augustss delay(150000);
3421 1.83 augustss DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3422 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3423 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3424 1.168 augustss ohci_dump_ed(sc, sed);
3425 1.83 augustss }
3426 1.83 augustss #endif
3427 1.60 augustss }
3428 1.60 augustss
3429 1.60 augustss usbd_status
3430 1.91 augustss ohci_device_isoc_start(usbd_xfer_handle xfer)
3431 1.60 augustss {
3432 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3433 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3434 1.83 augustss
3435 1.83 augustss DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3436 1.83 augustss
3437 1.83 augustss if (sc->sc_dying)
3438 1.83 augustss return (USBD_IOERROR);
3439 1.83 augustss
3440 1.83 augustss #ifdef DIAGNOSTIC
3441 1.83 augustss if (xfer->status != USBD_IN_PROGRESS)
3442 1.121 tsutsui printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3443 1.83 augustss #endif
3444 1.83 augustss
3445 1.83 augustss /* XXX anything to do? */
3446 1.83 augustss
3447 1.83 augustss return (USBD_IN_PROGRESS);
3448 1.60 augustss }
3449 1.60 augustss
3450 1.60 augustss void
3451 1.91 augustss ohci_device_isoc_abort(usbd_xfer_handle xfer)
3452 1.60 augustss {
3453 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3454 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3455 1.83 augustss ohci_soft_ed_t *sed;
3456 1.83 augustss ohci_soft_itd_t *sitd;
3457 1.83 augustss int s;
3458 1.83 augustss
3459 1.83 augustss s = splusb();
3460 1.83 augustss
3461 1.83 augustss DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3462 1.83 augustss
3463 1.83 augustss /* Transfer is already done. */
3464 1.120 augustss if (xfer->status != USBD_NOT_STARTED &&
3465 1.83 augustss xfer->status != USBD_IN_PROGRESS) {
3466 1.83 augustss splx(s);
3467 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3468 1.83 augustss return;
3469 1.83 augustss }
3470 1.83 augustss
3471 1.83 augustss /* Give xfer the requested abort code. */
3472 1.83 augustss xfer->status = USBD_CANCELLED;
3473 1.83 augustss
3474 1.83 augustss sed = opipe->sed;
3475 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3476 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3477 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3478 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3479 1.195 bouyer sizeof(sed->ed.ed_flags),
3480 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3481 1.83 augustss
3482 1.83 augustss sitd = xfer->hcpriv;
3483 1.83 augustss #ifdef DIAGNOSTIC
3484 1.83 augustss if (sitd == NULL) {
3485 1.102 augustss splx(s);
3486 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3487 1.83 augustss return;
3488 1.83 augustss }
3489 1.83 augustss #endif
3490 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3491 1.83 augustss #ifdef DIAGNOSTIC
3492 1.83 augustss DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3493 1.83 augustss sitd->isdone = 1;
3494 1.83 augustss #endif
3495 1.83 augustss }
3496 1.83 augustss
3497 1.83 augustss splx(s);
3498 1.83 augustss
3499 1.83 augustss usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3500 1.83 augustss
3501 1.83 augustss s = splusb();
3502 1.83 augustss
3503 1.83 augustss /* Run callback. */
3504 1.83 augustss usb_transfer_complete(xfer);
3505 1.83 augustss
3506 1.168 augustss sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3507 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3508 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3509 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3510 1.83 augustss
3511 1.83 augustss splx(s);
3512 1.60 augustss }
3513 1.60 augustss
3514 1.60 augustss void
3515 1.179 christos ohci_device_isoc_done(usbd_xfer_handle xfer)
3516 1.60 augustss {
3517 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3518 1.60 augustss }
3519 1.60 augustss
3520 1.60 augustss usbd_status
3521 1.91 augustss ohci_setup_isoc(usbd_pipe_handle pipe)
3522 1.60 augustss {
3523 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3524 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3525 1.60 augustss struct iso *iso = &opipe->u.iso;
3526 1.83 augustss int s;
3527 1.60 augustss
3528 1.60 augustss iso->next = -1;
3529 1.60 augustss iso->inuse = 0;
3530 1.60 augustss
3531 1.83 augustss s = splusb();
3532 1.168 augustss ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3533 1.83 augustss splx(s);
3534 1.83 augustss
3535 1.60 augustss return (USBD_NORMAL_COMPLETION);
3536 1.60 augustss }
3537 1.60 augustss
3538 1.60 augustss void
3539 1.91 augustss ohci_device_isoc_close(usbd_pipe_handle pipe)
3540 1.60 augustss {
3541 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3542 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3543 1.60 augustss
3544 1.60 augustss DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3545 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3546 1.83 augustss #ifdef DIAGNOSTIC
3547 1.83 augustss opipe->tail.itd->isdone = 1;
3548 1.83 augustss #endif
3549 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3550 1.1 augustss }
3551