ohci.c revision 1.22 1 1.22 augustss /* $NetBSD: ohci.c,v 1.22 1999/01/07 01:59:24 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Open Host Controller driver.
42 1.1 augustss *
43 1.1 augustss * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
44 1.1 augustss * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
45 1.1 augustss */
46 1.1 augustss
47 1.1 augustss #include <sys/param.h>
48 1.1 augustss #include <sys/systm.h>
49 1.1 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.15 augustss #if defined(__NetBSD__)
52 1.1 augustss #include <sys/device.h>
53 1.15 augustss #elif defined(__FreeBSD__)
54 1.15 augustss #include <sys/module.h>
55 1.15 augustss #include <sys/bus.h>
56 1.15 augustss #endif
57 1.1 augustss #include <sys/proc.h>
58 1.1 augustss #include <sys/queue.h>
59 1.1 augustss #include <sys/select.h>
60 1.1 augustss
61 1.4 augustss #include <machine/bus.h>
62 1.16 augustss #include <machine/endian.h>
63 1.4 augustss
64 1.1 augustss #include <dev/usb/usb.h>
65 1.1 augustss #include <dev/usb/usbdi.h>
66 1.1 augustss #include <dev/usb/usbdivar.h>
67 1.1 augustss #include <dev/usb/usb_quirks.h>
68 1.4 augustss #include <dev/usb/usb_mem.h>
69 1.1 augustss
70 1.1 augustss #include <dev/usb/ohcireg.h>
71 1.1 augustss #include <dev/usb/ohcivar.h>
72 1.1 augustss
73 1.15 augustss #if defined(__FreeBSD__)
74 1.15 augustss #include <machine/clock.h>
75 1.15 augustss #include "dev/usb/queue.addendum.h"
76 1.15 augustss
77 1.15 augustss #define delay(d) DELAY(d)
78 1.15 augustss
79 1.15 augustss #endif
80 1.1 augustss
81 1.16 augustss /*
82 1.16 augustss * The OHCI controller is little endian, so on big endian machines
83 1.16 augustss * the data strored in memory needs to be swapped.
84 1.16 augustss */
85 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
86 1.16 augustss #define LE(x) (bswap32(x))
87 1.16 augustss #else
88 1.16 augustss #define LE(x) (x)
89 1.16 augustss #endif
90 1.16 augustss
91 1.1 augustss struct ohci_pipe;
92 1.1 augustss
93 1.1 augustss ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
94 1.1 augustss void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
95 1.1 augustss
96 1.1 augustss ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
97 1.1 augustss void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
98 1.1 augustss
99 1.1 augustss usbd_status ohci_open __P((usbd_pipe_handle));
100 1.5 augustss void ohci_poll __P((struct usbd_bus *));
101 1.1 augustss void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
102 1.1 augustss void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
103 1.1 augustss void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
104 1.22 augustss void ohci_idone __P((ohci_softc_t *, usbd_request_handle));
105 1.22 augustss void ohci_done __P((ohci_softc_t *, usbd_request_handle));
106 1.1 augustss void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle));
107 1.1 augustss void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle));
108 1.3 augustss void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle));
109 1.1 augustss
110 1.1 augustss usbd_status ohci_device_request __P((usbd_request_handle reqh));
111 1.3 augustss void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
112 1.3 augustss void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
113 1.1 augustss void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
114 1.1 augustss void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
115 1.1 augustss ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
116 1.1 augustss
117 1.1 augustss usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
118 1.17 augustss usbd_status ohci_root_ctrl_start __P((usbd_request_handle));
119 1.1 augustss void ohci_root_ctrl_abort __P((usbd_request_handle));
120 1.1 augustss void ohci_root_ctrl_close __P((usbd_pipe_handle));
121 1.1 augustss
122 1.1 augustss usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
123 1.17 augustss usbd_status ohci_root_intr_start __P((usbd_request_handle));
124 1.1 augustss void ohci_root_intr_abort __P((usbd_request_handle));
125 1.1 augustss void ohci_root_intr_close __P((usbd_pipe_handle));
126 1.1 augustss
127 1.1 augustss usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
128 1.17 augustss usbd_status ohci_device_ctrl_start __P((usbd_request_handle));
129 1.1 augustss void ohci_device_ctrl_abort __P((usbd_request_handle));
130 1.1 augustss void ohci_device_ctrl_close __P((usbd_pipe_handle));
131 1.1 augustss
132 1.3 augustss usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
133 1.17 augustss usbd_status ohci_device_bulk_start __P((usbd_request_handle));
134 1.3 augustss void ohci_device_bulk_abort __P((usbd_request_handle));
135 1.3 augustss void ohci_device_bulk_close __P((usbd_pipe_handle));
136 1.3 augustss
137 1.1 augustss usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
138 1.17 augustss usbd_status ohci_device_intr_start __P((usbd_request_handle));
139 1.1 augustss void ohci_device_intr_abort __P((usbd_request_handle));
140 1.1 augustss void ohci_device_intr_close __P((usbd_pipe_handle));
141 1.1 augustss usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
142 1.1 augustss struct ohci_pipe *pipe, int ival));
143 1.1 augustss
144 1.1 augustss int ohci_str __P((usb_string_descriptor_t *, int, char *));
145 1.1 augustss
146 1.1 augustss void ohci_timeout __P((void *));
147 1.1 augustss void ohci_rhsc_able __P((ohci_softc_t *, int));
148 1.1 augustss
149 1.22 augustss void ohci_close_pipe __P((usbd_pipe_handle pipe,
150 1.22 augustss ohci_soft_ed_t *head));
151 1.22 augustss void ohci_abort_request __P((usbd_request_handle reqh));
152 1.22 augustss
153 1.1 augustss #ifdef USB_DEBUG
154 1.1 augustss ohci_softc_t *thesc;
155 1.1 augustss void ohci_dumpregs __P((ohci_softc_t *));
156 1.1 augustss void ohci_dump_tds __P((ohci_soft_td_t *));
157 1.1 augustss void ohci_dump_td __P((ohci_soft_td_t *));
158 1.1 augustss void ohci_dump_ed __P((ohci_soft_ed_t *));
159 1.1 augustss #endif
160 1.1 augustss
161 1.15 augustss #if defined(__NetBSD__)
162 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
163 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
164 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
165 1.15 augustss #elif defined(__FreeBSD__)
166 1.15 augustss #define OWRITE4(sc, r, x) outl((sc)->sc_iobase + (r), (x))
167 1.15 augustss #define OREAD4(sc, r) inl((sc)->sc_iobase + (r))
168 1.15 augustss #define OREAD2(sc, r) inw((sc)->sc_iobase + (r))
169 1.15 augustss #endif
170 1.1 augustss
171 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
172 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
173 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
174 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
175 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
176 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
177 1.1 augustss
178 1.1 augustss struct ohci_pipe {
179 1.1 augustss struct usbd_pipe pipe;
180 1.1 augustss ohci_soft_ed_t *sed;
181 1.1 augustss ohci_soft_td_t *tail;
182 1.1 augustss /* Info needed for different pipe kinds. */
183 1.1 augustss union {
184 1.1 augustss /* Control pipe */
185 1.1 augustss struct {
186 1.4 augustss usb_dma_t datadma;
187 1.4 augustss usb_dma_t reqdma;
188 1.1 augustss u_int length;
189 1.1 augustss ohci_soft_td_t *setup, *xfer, *stat;
190 1.1 augustss } ctl;
191 1.1 augustss /* Interrupt pipe */
192 1.1 augustss struct {
193 1.4 augustss usb_dma_t datadma;
194 1.1 augustss int nslots;
195 1.1 augustss int pos;
196 1.1 augustss } intr;
197 1.3 augustss /* Bulk pipe */
198 1.3 augustss struct {
199 1.4 augustss usb_dma_t datadma;
200 1.3 augustss u_int length;
201 1.3 augustss } bulk;
202 1.1 augustss } u;
203 1.1 augustss };
204 1.1 augustss
205 1.1 augustss #define OHCI_INTR_ENDPT 1
206 1.1 augustss
207 1.1 augustss struct usbd_methods ohci_root_ctrl_methods = {
208 1.1 augustss ohci_root_ctrl_transfer,
209 1.17 augustss ohci_root_ctrl_start,
210 1.1 augustss ohci_root_ctrl_abort,
211 1.1 augustss ohci_root_ctrl_close,
212 1.7 augustss 0,
213 1.1 augustss };
214 1.1 augustss
215 1.1 augustss struct usbd_methods ohci_root_intr_methods = {
216 1.1 augustss ohci_root_intr_transfer,
217 1.17 augustss ohci_root_intr_start,
218 1.1 augustss ohci_root_intr_abort,
219 1.1 augustss ohci_root_intr_close,
220 1.7 augustss 0,
221 1.1 augustss };
222 1.1 augustss
223 1.1 augustss struct usbd_methods ohci_device_ctrl_methods = {
224 1.1 augustss ohci_device_ctrl_transfer,
225 1.17 augustss ohci_device_ctrl_start,
226 1.1 augustss ohci_device_ctrl_abort,
227 1.1 augustss ohci_device_ctrl_close,
228 1.7 augustss 0,
229 1.1 augustss };
230 1.1 augustss
231 1.1 augustss struct usbd_methods ohci_device_intr_methods = {
232 1.1 augustss ohci_device_intr_transfer,
233 1.17 augustss ohci_device_intr_start,
234 1.1 augustss ohci_device_intr_abort,
235 1.1 augustss ohci_device_intr_close,
236 1.1 augustss };
237 1.1 augustss
238 1.3 augustss struct usbd_methods ohci_device_bulk_methods = {
239 1.3 augustss ohci_device_bulk_transfer,
240 1.17 augustss ohci_device_bulk_start,
241 1.3 augustss ohci_device_bulk_abort,
242 1.3 augustss ohci_device_bulk_close,
243 1.7 augustss 0,
244 1.3 augustss };
245 1.3 augustss
246 1.1 augustss ohci_soft_ed_t *
247 1.1 augustss ohci_alloc_sed(sc)
248 1.1 augustss ohci_softc_t *sc;
249 1.1 augustss {
250 1.1 augustss ohci_soft_ed_t *sed;
251 1.1 augustss usbd_status r;
252 1.1 augustss int i, offs;
253 1.4 augustss usb_dma_t dma;
254 1.1 augustss
255 1.1 augustss if (!sc->sc_freeeds) {
256 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
257 1.1 augustss sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
258 1.1 augustss M_USBDEV, M_NOWAIT);
259 1.1 augustss if (!sed)
260 1.1 augustss return 0;
261 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
262 1.4 augustss OHCI_ED_ALIGN, &dma);
263 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
264 1.1 augustss free(sed, M_USBDEV);
265 1.1 augustss return 0;
266 1.1 augustss }
267 1.1 augustss for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
268 1.1 augustss offs = i * OHCI_ED_SIZE;
269 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
270 1.1 augustss sed->ed = (ohci_ed_t *)
271 1.1 augustss ((char *)KERNADDR(&dma) + offs);
272 1.1 augustss sed->next = sc->sc_freeeds;
273 1.1 augustss sc->sc_freeeds = sed;
274 1.1 augustss }
275 1.1 augustss }
276 1.1 augustss sed = sc->sc_freeeds;
277 1.1 augustss sc->sc_freeeds = sed->next;
278 1.1 augustss memset(sed->ed, 0, OHCI_ED_SIZE);
279 1.1 augustss sed->next = 0;
280 1.1 augustss return sed;
281 1.1 augustss }
282 1.1 augustss
283 1.1 augustss void
284 1.1 augustss ohci_free_sed(sc, sed)
285 1.1 augustss ohci_softc_t *sc;
286 1.1 augustss ohci_soft_ed_t *sed;
287 1.1 augustss {
288 1.1 augustss sed->next = sc->sc_freeeds;
289 1.1 augustss sc->sc_freeeds = sed;
290 1.1 augustss }
291 1.1 augustss
292 1.1 augustss ohci_soft_td_t *
293 1.1 augustss ohci_alloc_std(sc)
294 1.1 augustss ohci_softc_t *sc;
295 1.1 augustss {
296 1.1 augustss ohci_soft_td_t *std;
297 1.1 augustss usbd_status r;
298 1.1 augustss int i, offs;
299 1.4 augustss usb_dma_t dma;
300 1.1 augustss
301 1.1 augustss if (!sc->sc_freetds) {
302 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
303 1.1 augustss std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
304 1.1 augustss M_USBDEV, M_NOWAIT);
305 1.1 augustss if (!std)
306 1.1 augustss return 0;
307 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
308 1.4 augustss OHCI_TD_ALIGN, &dma);
309 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
310 1.1 augustss free(std, M_USBDEV);
311 1.1 augustss return 0;
312 1.1 augustss }
313 1.1 augustss for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
314 1.1 augustss offs = i * OHCI_TD_SIZE;
315 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
316 1.1 augustss std->td = (ohci_td_t *)
317 1.1 augustss ((char *)KERNADDR(&dma) + offs);
318 1.1 augustss std->nexttd = sc->sc_freetds;
319 1.1 augustss sc->sc_freetds = std;
320 1.1 augustss }
321 1.1 augustss }
322 1.1 augustss std = sc->sc_freetds;
323 1.1 augustss sc->sc_freetds = std->nexttd;
324 1.1 augustss memset(std->td, 0, OHCI_TD_SIZE);
325 1.1 augustss std->nexttd = 0;
326 1.1 augustss return (std);
327 1.1 augustss }
328 1.1 augustss
329 1.1 augustss void
330 1.1 augustss ohci_free_std(sc, std)
331 1.1 augustss ohci_softc_t *sc;
332 1.1 augustss ohci_soft_td_t *std;
333 1.1 augustss {
334 1.1 augustss std->nexttd = sc->sc_freetds;
335 1.1 augustss sc->sc_freetds = std;
336 1.1 augustss }
337 1.1 augustss
338 1.1 augustss usbd_status
339 1.1 augustss ohci_init(sc)
340 1.1 augustss ohci_softc_t *sc;
341 1.1 augustss {
342 1.1 augustss ohci_soft_ed_t *sed, *psed;
343 1.1 augustss usbd_status r;
344 1.1 augustss int rev;
345 1.1 augustss int i;
346 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
347 1.16 augustss
348 1.1 augustss DPRINTF(("ohci_init: start\n"));
349 1.1 augustss rev = OREAD4(sc, OHCI_REVISION);
350 1.15 augustss printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
351 1.1 augustss OHCI_REV_HI(rev), OHCI_REV_LO(rev),
352 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
353 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
354 1.1 augustss printf("%s: unsupported OHCI revision\n",
355 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
356 1.1 augustss return (USBD_INVAL);
357 1.1 augustss }
358 1.1 augustss
359 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
360 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
361 1.1 augustss
362 1.1 augustss /* Allocate the HCCA area. */
363 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
364 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
365 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
366 1.1 augustss return (r);
367 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
368 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
369 1.1 augustss
370 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
371 1.1 augustss
372 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
373 1.1 augustss if (!sc->sc_ctrl_head) {
374 1.1 augustss r = USBD_NOMEM;
375 1.1 augustss goto bad1;
376 1.1 augustss }
377 1.16 augustss sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
378 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
379 1.1 augustss if (!sc->sc_bulk_head) {
380 1.1 augustss r = USBD_NOMEM;
381 1.1 augustss goto bad2;
382 1.1 augustss }
383 1.16 augustss sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
384 1.1 augustss
385 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
386 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
387 1.1 augustss sed = ohci_alloc_sed(sc);
388 1.1 augustss if (!sed) {
389 1.1 augustss while (--i >= 0)
390 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
391 1.1 augustss r = USBD_NOMEM;
392 1.1 augustss goto bad3;
393 1.1 augustss }
394 1.1 augustss /* All ED fields are set to 0. */
395 1.1 augustss sc->sc_eds[i] = sed;
396 1.16 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
397 1.1 augustss if (i != 0) {
398 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
399 1.1 augustss sed->next = psed;
400 1.16 augustss sed->ed->ed_nexted = LE(psed->physaddr);
401 1.1 augustss }
402 1.1 augustss }
403 1.1 augustss /*
404 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
405 1.1 augustss * the tree set up properly to spread the interrupts.
406 1.1 augustss */
407 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
408 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
409 1.16 augustss LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
410 1.1 augustss
411 1.1 augustss /* Determine in what context we are running. */
412 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
413 1.1 augustss if (ctl & OHCI_IR) {
414 1.1 augustss /* SMM active, request change */
415 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
416 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
417 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
418 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
419 1.1 augustss delay(1000);
420 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
421 1.1 augustss }
422 1.1 augustss if ((ctl & OHCI_IR) == 0) {
423 1.15 augustss printf("%s: SMM does not respond, resetting\n",
424 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
425 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
426 1.1 augustss goto reset;
427 1.1 augustss }
428 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
429 1.1 augustss /* BIOS started controller. */
430 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
431 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
432 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
433 1.1 augustss delay(USB_RESUME_DELAY * 1000);
434 1.1 augustss }
435 1.1 augustss } else {
436 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
437 1.1 augustss reset:
438 1.1 augustss /* Controller was cold started. */
439 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
440 1.1 augustss }
441 1.1 augustss
442 1.16 augustss /*
443 1.16 augustss * This reset should be necessary according to the OHCI spec, but
444 1.16 augustss * without it some controller don't start.
445 1.16 augustss */
446 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
447 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
448 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
449 1.16 augustss
450 1.1 augustss /* We now own the host controller and the bus has been reset. */
451 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
452 1.1 augustss
453 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
454 1.1 augustss /* Nominal time for a reset is 10 us. */
455 1.1 augustss for (i = 0; i < 10; i++) {
456 1.1 augustss delay(10);
457 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
458 1.1 augustss if (!hcr)
459 1.1 augustss break;
460 1.1 augustss }
461 1.1 augustss if (hcr) {
462 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
463 1.1 augustss r = USBD_IOERROR;
464 1.1 augustss goto bad3;
465 1.1 augustss }
466 1.1 augustss #ifdef USB_DEBUG
467 1.1 augustss thesc = sc;
468 1.1 augustss if (ohcidebug > 15)
469 1.1 augustss ohci_dumpregs(sc);
470 1.1 augustss #endif
471 1.1 augustss
472 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
473 1.1 augustss
474 1.1 augustss /* Set up HC registers. */
475 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
476 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
477 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
478 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
479 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
480 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
481 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
482 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
483 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
484 1.1 augustss /* And finally start it! */
485 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
486 1.1 augustss
487 1.1 augustss /*
488 1.1 augustss * The controller is now OPERATIONAL. Set a some final
489 1.1 augustss * registers that should be set earlier, but that the
490 1.1 augustss * controller ignores when in the SUSPEND state.
491 1.1 augustss */
492 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
493 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
494 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
495 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
496 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
497 1.1 augustss
498 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
499 1.1 augustss
500 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
501 1.1 augustss
502 1.1 augustss #ifdef USB_DEBUG
503 1.1 augustss if (ohcidebug > 5)
504 1.1 augustss ohci_dumpregs(sc);
505 1.1 augustss #endif
506 1.1 augustss
507 1.1 augustss /* Set up the bus struct. */
508 1.1 augustss sc->sc_bus.open_pipe = ohci_open;
509 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
510 1.5 augustss sc->sc_bus.do_poll = ohci_poll;
511 1.1 augustss
512 1.1 augustss return (USBD_NORMAL_COMPLETION);
513 1.1 augustss
514 1.1 augustss bad3:
515 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
516 1.1 augustss bad2:
517 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
518 1.1 augustss bad1:
519 1.4 augustss usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
520 1.1 augustss return (r);
521 1.1 augustss }
522 1.1 augustss
523 1.1 augustss #ifdef USB_DEBUG
524 1.1 augustss void ohcidump(void);
525 1.1 augustss void ohcidump(void) { ohci_dumpregs(thesc); }
526 1.1 augustss
527 1.1 augustss void
528 1.1 augustss ohci_dumpregs(sc)
529 1.1 augustss ohci_softc_t *sc;
530 1.1 augustss {
531 1.1 augustss printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
532 1.1 augustss OREAD4(sc, OHCI_REVISION),
533 1.1 augustss OREAD4(sc, OHCI_CONTROL),
534 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
535 1.1 augustss printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
536 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
537 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
538 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE));
539 1.1 augustss printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
540 1.1 augustss OREAD4(sc, OHCI_HCCA),
541 1.1 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
542 1.1 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED));
543 1.1 augustss printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
544 1.1 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
545 1.1 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
546 1.1 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED));
547 1.1 augustss printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
548 1.1 augustss OREAD4(sc, OHCI_DONE_HEAD),
549 1.1 augustss OREAD4(sc, OHCI_FM_INTERVAL),
550 1.1 augustss OREAD4(sc, OHCI_FM_REMAINING));
551 1.1 augustss printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
552 1.1 augustss OREAD4(sc, OHCI_FM_NUMBER),
553 1.1 augustss OREAD4(sc, OHCI_PERIODIC_START),
554 1.1 augustss OREAD4(sc, OHCI_LS_THRESHOLD));
555 1.1 augustss printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
556 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
557 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
558 1.1 augustss OREAD4(sc, OHCI_RH_STATUS));
559 1.1 augustss printf(" port1=0x%08x port2=0x%08x\n",
560 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
561 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
562 1.1 augustss printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
563 1.16 augustss LE(sc->sc_hcca->hcca_frame_number),
564 1.16 augustss LE(sc->sc_hcca->hcca_done_head));
565 1.1 augustss }
566 1.1 augustss #endif
567 1.1 augustss
568 1.1 augustss int
569 1.1 augustss ohci_intr(p)
570 1.1 augustss void *p;
571 1.1 augustss {
572 1.1 augustss ohci_softc_t *sc = p;
573 1.1 augustss u_int32_t intrs, eintrs;
574 1.1 augustss ohci_physaddr_t done;
575 1.1 augustss
576 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
577 1.22 augustss if (sc == NULL || sc->sc_hcca == NULL) {
578 1.15 augustss #ifdef DIAGNOSTIC
579 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
580 1.15 augustss #endif
581 1.15 augustss return (0);
582 1.15 augustss }
583 1.15 augustss
584 1.16 augustss done = LE(sc->sc_hcca->hcca_done_head);
585 1.1 augustss if (done != 0) {
586 1.1 augustss intrs = OHCI_WDH;
587 1.1 augustss if (done & OHCI_DONE_INTRS)
588 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
589 1.1 augustss } else
590 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
591 1.1 augustss if (!intrs)
592 1.1 augustss return (0);
593 1.1 augustss intrs &= ~OHCI_MIE;
594 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
595 1.1 augustss eintrs = intrs & sc->sc_eintrs;
596 1.1 augustss if (!eintrs)
597 1.1 augustss return (0);
598 1.1 augustss
599 1.1 augustss sc->sc_intrs++;
600 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
601 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
602 1.1 augustss (u_int)eintrs));
603 1.1 augustss
604 1.1 augustss if (eintrs & OHCI_SO) {
605 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
606 1.1 augustss /* XXX do what */
607 1.1 augustss intrs &= ~OHCI_SO;
608 1.1 augustss }
609 1.1 augustss if (eintrs & OHCI_WDH) {
610 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
611 1.1 augustss sc->sc_hcca->hcca_done_head = 0;
612 1.1 augustss intrs &= ~OHCI_WDH;
613 1.1 augustss }
614 1.1 augustss if (eintrs & OHCI_RD) {
615 1.1 augustss /* XXX process resume detect */
616 1.1 augustss }
617 1.1 augustss if (eintrs & OHCI_UE) {
618 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
619 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
620 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
621 1.1 augustss /* XXX what else */
622 1.1 augustss }
623 1.1 augustss if (eintrs & OHCI_RHSC) {
624 1.1 augustss ohci_rhsc(sc, sc->sc_intrreqh);
625 1.1 augustss intrs &= ~OHCI_RHSC;
626 1.1 augustss
627 1.1 augustss /*
628 1.1 augustss * Disable RHSC interrupt for now, because it will be
629 1.1 augustss * on until the port has been reset.
630 1.1 augustss */
631 1.1 augustss ohci_rhsc_able(sc, 0);
632 1.1 augustss }
633 1.1 augustss
634 1.1 augustss /* Block unprocessed interrupts. XXX */
635 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
636 1.1 augustss sc->sc_eintrs &= ~intrs;
637 1.1 augustss
638 1.1 augustss return (1);
639 1.1 augustss }
640 1.1 augustss
641 1.1 augustss void
642 1.1 augustss ohci_rhsc_able(sc, on)
643 1.1 augustss ohci_softc_t *sc;
644 1.1 augustss int on;
645 1.1 augustss {
646 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
647 1.1 augustss if (on) {
648 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
649 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
650 1.1 augustss } else {
651 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
652 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
653 1.1 augustss }
654 1.1 augustss }
655 1.1 augustss
656 1.13 augustss #ifdef USB_DEBUG
657 1.13 augustss char *ohci_cc_strs[] = {
658 1.13 augustss "NO_ERROR",
659 1.13 augustss "CRC",
660 1.13 augustss "BIT_STUFFING",
661 1.13 augustss "DATA_TOGGLE_MISMATCH",
662 1.13 augustss "STALL",
663 1.13 augustss "DEVICE_NOT_RESPONDING",
664 1.13 augustss "PID_CHECK_FAILURE",
665 1.13 augustss "UNEXPECTED_PID",
666 1.13 augustss "DATA_OVERRUN",
667 1.13 augustss "DATA_UNDERRUN",
668 1.13 augustss "BUFFER_OVERRUN",
669 1.13 augustss "BUFFER_UNDERRUN",
670 1.13 augustss "NOT_ACCESSED",
671 1.13 augustss };
672 1.13 augustss #endif
673 1.13 augustss
674 1.1 augustss void
675 1.1 augustss ohci_process_done(sc, done)
676 1.1 augustss ohci_softc_t *sc;
677 1.1 augustss ohci_physaddr_t done;
678 1.1 augustss {
679 1.1 augustss ohci_soft_td_t *std, *sdone;
680 1.1 augustss usbd_request_handle reqh;
681 1.1 augustss int len, cc;
682 1.1 augustss
683 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
684 1.1 augustss
685 1.1 augustss /* Reverse the done list. */
686 1.16 augustss for (sdone = 0; done; done = LE(std->td->td_nexttd)) {
687 1.1 augustss std = ohci_hash_find_td(sc, done);
688 1.1 augustss std->dnext = sdone;
689 1.1 augustss sdone = std;
690 1.1 augustss }
691 1.1 augustss
692 1.1 augustss #ifdef USB_DEBUG
693 1.1 augustss if (ohcidebug > 10) {
694 1.1 augustss printf("ohci_process_done: TD done:\n");
695 1.1 augustss ohci_dump_tds(sdone);
696 1.1 augustss }
697 1.1 augustss #endif
698 1.1 augustss
699 1.1 augustss for (std = sdone; std; std = std->dnext) {
700 1.1 augustss reqh = std->reqh;
701 1.1 augustss DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh));
702 1.16 augustss cc = OHCI_TD_GET_CC(LE(std->td->td_flags));
703 1.22 augustss if (reqh->status == USBD_CANCELLED ||
704 1.22 augustss reqh->status == USBD_TIMEOUT) {
705 1.22 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
706 1.22 augustss reqh));
707 1.22 augustss ohci_idone(sc, reqh);
708 1.22 augustss } else if (cc == OHCI_CC_NO_ERROR) {
709 1.1 augustss if (std->td->td_cbp == 0)
710 1.1 augustss len = std->len;
711 1.1 augustss else
712 1.16 augustss len = LE(std->td->td_be) -
713 1.16 augustss LE(std->td->td_cbp) + 1;
714 1.22 augustss if (std->flags & OHCI_SET_LEN)
715 1.22 augustss reqh->actlen = len;
716 1.22 augustss if (std->flags & OHCI_CALL_DONE) {
717 1.22 augustss reqh->status = USBD_NORMAL_COMPLETION;
718 1.22 augustss ohci_idone(sc, reqh);
719 1.21 augustss }
720 1.1 augustss } else {
721 1.1 augustss ohci_soft_td_t *p, *n;
722 1.1 augustss struct ohci_pipe *opipe =
723 1.1 augustss (struct ohci_pipe *)reqh->pipe;
724 1.13 augustss DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
725 1.16 augustss OHCI_TD_GET_CC(LE(std->td->td_flags)),
726 1.16 augustss ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))]));
727 1.1 augustss /*
728 1.1 augustss * Endpoint is halted. First unlink all the TDs
729 1.1 augustss * belonging to the failed transfer, and then restart
730 1.1 augustss * the endpoint.
731 1.1 augustss */
732 1.1 augustss for (p = std->nexttd; p->reqh == reqh; p = n) {
733 1.1 augustss n = p->nexttd;
734 1.1 augustss ohci_hash_rem_td(sc, p);
735 1.1 augustss ohci_free_std(sc, p);
736 1.1 augustss }
737 1.16 augustss /* clear halt */
738 1.16 augustss opipe->sed->ed->ed_headp = LE(p->physaddr);
739 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
740 1.1 augustss
741 1.1 augustss if (cc == OHCI_CC_STALL)
742 1.1 augustss reqh->status = USBD_STALLED;
743 1.1 augustss else
744 1.1 augustss reqh->status = USBD_IOERROR;
745 1.22 augustss ohci_idone(sc, reqh);
746 1.1 augustss }
747 1.1 augustss ohci_hash_rem_td(sc, std);
748 1.1 augustss ohci_free_std(sc, std);
749 1.1 augustss }
750 1.1 augustss }
751 1.1 augustss
752 1.1 augustss void
753 1.22 augustss ohci_idone(sc, reqh)
754 1.15 augustss ohci_softc_t *sc;
755 1.15 augustss usbd_request_handle reqh;
756 1.15 augustss {
757 1.22 augustss ohci_done(sc, reqh);
758 1.22 augustss if (reqh->pipe->intrreqh != reqh)
759 1.22 augustss usb_start_next(reqh->pipe);
760 1.22 augustss }
761 1.22 augustss
762 1.22 augustss void
763 1.22 augustss ohci_done(sc, reqh)
764 1.22 augustss ohci_softc_t *sc;
765 1.22 augustss usbd_request_handle reqh;
766 1.22 augustss {
767 1.22 augustss #ifdef DIAGNOSTIC
768 1.22 augustss if (!reqh->hcpriv)
769 1.22 augustss printf("ohci_done: reqh=%p, no hcpriv\n", reqh);
770 1.22 augustss #endif
771 1.22 augustss reqh->hcpriv = 0;
772 1.22 augustss
773 1.15 augustss switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
774 1.15 augustss case UE_CONTROL:
775 1.15 augustss ohci_ctrl_done(sc, reqh);
776 1.15 augustss break;
777 1.15 augustss case UE_INTERRUPT:
778 1.15 augustss ohci_intr_done(sc, reqh);
779 1.15 augustss break;
780 1.15 augustss case UE_BULK:
781 1.15 augustss ohci_bulk_done(sc, reqh);
782 1.15 augustss break;
783 1.15 augustss case UE_ISOCHRONOUS:
784 1.15 augustss printf("ohci_process_done: ISO done?\n");
785 1.15 augustss break;
786 1.15 augustss }
787 1.15 augustss
788 1.15 augustss /* And finally execute callback. */
789 1.15 augustss reqh->xfercb(reqh);
790 1.15 augustss }
791 1.15 augustss
792 1.15 augustss void
793 1.1 augustss ohci_ctrl_done(sc, reqh)
794 1.1 augustss ohci_softc_t *sc;
795 1.1 augustss usbd_request_handle reqh;
796 1.1 augustss {
797 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
798 1.1 augustss u_int len = opipe->u.ctl.length;
799 1.4 augustss usb_dma_t *dma;
800 1.1 augustss
801 1.1 augustss DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
802 1.1 augustss
803 1.1 augustss if (!reqh->isreq) {
804 1.8 augustss panic("ohci_ctrl_done: not a request\n");
805 1.1 augustss return;
806 1.1 augustss }
807 1.1 augustss
808 1.1 augustss if (len != 0) {
809 1.1 augustss dma = &opipe->u.ctl.datadma;
810 1.1 augustss if (reqh->request.bmRequestType & UT_READ)
811 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), len);
812 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
813 1.1 augustss }
814 1.15 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
815 1.1 augustss }
816 1.1 augustss
817 1.1 augustss void
818 1.1 augustss ohci_intr_done(sc, reqh)
819 1.1 augustss ohci_softc_t *sc;
820 1.1 augustss usbd_request_handle reqh;
821 1.1 augustss {
822 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
823 1.4 augustss usb_dma_t *dma;
824 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
825 1.1 augustss ohci_soft_td_t *xfer, *tail;
826 1.1 augustss
827 1.1 augustss
828 1.1 augustss DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
829 1.1 augustss reqh, reqh->actlen));
830 1.1 augustss
831 1.1 augustss dma = &opipe->u.intr.datadma;
832 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
833 1.1 augustss
834 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
835 1.1 augustss xfer = opipe->tail;
836 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
837 1.1 augustss if (!tail) {
838 1.1 augustss reqh->status = USBD_NOMEM;
839 1.1 augustss return;
840 1.1 augustss }
841 1.1 augustss tail->reqh = 0;
842 1.1 augustss
843 1.16 augustss xfer->td->td_flags = LE(
844 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
845 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
846 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
847 1.19 augustss xfer->td->td_flags |= LE(OHCI_TD_R);
848 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dma));
849 1.1 augustss xfer->nexttd = tail;
850 1.16 augustss xfer->td->td_nexttd = LE(tail->physaddr);
851 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1);
852 1.1 augustss xfer->len = reqh->length;
853 1.1 augustss xfer->reqh = reqh;
854 1.22 augustss xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
855 1.22 augustss reqh->hcpriv = xfer;
856 1.1 augustss
857 1.1 augustss ohci_hash_add_td(sc, xfer);
858 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
859 1.1 augustss opipe->tail = tail;
860 1.1 augustss } else {
861 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
862 1.1 augustss }
863 1.1 augustss }
864 1.1 augustss
865 1.1 augustss void
866 1.3 augustss ohci_bulk_done(sc, reqh)
867 1.3 augustss ohci_softc_t *sc;
868 1.3 augustss usbd_request_handle reqh;
869 1.3 augustss {
870 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
871 1.4 augustss usb_dma_t *dma;
872 1.3 augustss
873 1.3 augustss
874 1.3 augustss DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
875 1.3 augustss reqh, reqh->actlen));
876 1.3 augustss
877 1.3 augustss dma = &opipe->u.bulk.datadma;
878 1.3 augustss if (reqh->request.bmRequestType & UT_READ)
879 1.3 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
880 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
881 1.15 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
882 1.3 augustss }
883 1.3 augustss
884 1.3 augustss void
885 1.1 augustss ohci_rhsc(sc, reqh)
886 1.1 augustss ohci_softc_t *sc;
887 1.1 augustss usbd_request_handle reqh;
888 1.1 augustss {
889 1.1 augustss usbd_pipe_handle pipe;
890 1.1 augustss struct ohci_pipe *opipe;
891 1.1 augustss u_char *p;
892 1.1 augustss int i, m;
893 1.1 augustss int hstatus;
894 1.1 augustss
895 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
896 1.1 augustss DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
897 1.1 augustss sc, reqh, hstatus));
898 1.1 augustss
899 1.1 augustss if (reqh == 0) {
900 1.1 augustss /* Just ignore the change. */
901 1.1 augustss return;
902 1.1 augustss }
903 1.1 augustss
904 1.1 augustss pipe = reqh->pipe;
905 1.1 augustss opipe = (struct ohci_pipe *)pipe;
906 1.1 augustss
907 1.1 augustss p = KERNADDR(&opipe->u.intr.datadma);
908 1.1 augustss m = min(sc->sc_noport, reqh->length * 8 - 1);
909 1.1 augustss memset(p, 0, reqh->length);
910 1.1 augustss for (i = 1; i <= m; i++) {
911 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
912 1.1 augustss p[i/8] |= 1 << (i%8);
913 1.1 augustss }
914 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
915 1.1 augustss reqh->actlen = reqh->length;
916 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
917 1.1 augustss reqh->xfercb(reqh);
918 1.1 augustss
919 1.1 augustss if (reqh->pipe->intrreqh != reqh) {
920 1.1 augustss sc->sc_intrreqh = 0;
921 1.4 augustss usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
922 1.17 augustss usb_start_next(reqh->pipe);
923 1.1 augustss }
924 1.1 augustss }
925 1.1 augustss
926 1.1 augustss /*
927 1.1 augustss * Wait here until controller claims to have an interrupt.
928 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
929 1.1 augustss * too long.
930 1.1 augustss */
931 1.1 augustss void
932 1.1 augustss ohci_waitintr(sc, reqh)
933 1.1 augustss ohci_softc_t *sc;
934 1.1 augustss usbd_request_handle reqh;
935 1.1 augustss {
936 1.1 augustss int timo = reqh->timeout;
937 1.1 augustss int usecs;
938 1.1 augustss u_int32_t intrs;
939 1.1 augustss
940 1.1 augustss reqh->status = USBD_IN_PROGRESS;
941 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
942 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
943 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
944 1.1 augustss DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs));
945 1.1 augustss #ifdef USB_DEBUG
946 1.1 augustss if (ohcidebug > 15)
947 1.1 augustss ohci_dumpregs(sc);
948 1.1 augustss #endif
949 1.1 augustss if (intrs) {
950 1.1 augustss ohci_intr(sc);
951 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
952 1.1 augustss return;
953 1.1 augustss }
954 1.1 augustss }
955 1.15 augustss
956 1.15 augustss /* Timeout */
957 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
958 1.1 augustss reqh->status = USBD_TIMEOUT;
959 1.22 augustss ohci_idone(sc, reqh);
960 1.15 augustss /* XXX should free TD */
961 1.5 augustss }
962 1.5 augustss
963 1.5 augustss void
964 1.5 augustss ohci_poll(bus)
965 1.5 augustss struct usbd_bus *bus;
966 1.5 augustss {
967 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
968 1.5 augustss
969 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
970 1.5 augustss ohci_intr(sc);
971 1.1 augustss }
972 1.1 augustss
973 1.1 augustss usbd_status
974 1.1 augustss ohci_device_request(reqh)
975 1.1 augustss usbd_request_handle reqh;
976 1.1 augustss {
977 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
978 1.1 augustss usb_device_request_t *req = &reqh->request;
979 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
980 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
981 1.1 augustss int addr = dev->address;
982 1.1 augustss ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
983 1.1 augustss ohci_soft_ed_t *sed;
984 1.4 augustss usb_dma_t *dmap;
985 1.1 augustss int isread;
986 1.1 augustss int len;
987 1.1 augustss usbd_status r;
988 1.1 augustss int s;
989 1.1 augustss
990 1.1 augustss isread = req->bmRequestType & UT_READ;
991 1.1 augustss len = UGETW(req->wLength);
992 1.1 augustss
993 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
994 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
995 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
996 1.1 augustss UGETW(req->wIndex), len, addr,
997 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
998 1.1 augustss
999 1.1 augustss setup = opipe->tail;
1000 1.1 augustss stat = ohci_alloc_std(sc);
1001 1.1 augustss if (!stat) {
1002 1.1 augustss r = USBD_NOMEM;
1003 1.1 augustss goto bad1;
1004 1.1 augustss }
1005 1.1 augustss tail = ohci_alloc_std(sc);
1006 1.1 augustss if (!tail) {
1007 1.1 augustss r = USBD_NOMEM;
1008 1.1 augustss goto bad2;
1009 1.1 augustss }
1010 1.1 augustss tail->reqh = 0;
1011 1.1 augustss
1012 1.1 augustss sed = opipe->sed;
1013 1.1 augustss dmap = &opipe->u.ctl.datadma;
1014 1.1 augustss opipe->u.ctl.length = len;
1015 1.1 augustss
1016 1.10 augustss /* Update device address and length since they may have changed. */
1017 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1018 1.16 augustss sed->ed->ed_flags = LE(
1019 1.16 augustss (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1020 1.16 augustss OHCI_ED_SET_FA(addr) |
1021 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1022 1.1 augustss
1023 1.1 augustss /* Set up data transaction */
1024 1.1 augustss if (len != 0) {
1025 1.1 augustss xfer = ohci_alloc_std(sc);
1026 1.1 augustss if (!xfer) {
1027 1.1 augustss r = USBD_NOMEM;
1028 1.1 augustss goto bad3;
1029 1.1 augustss }
1030 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1031 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1032 1.1 augustss goto bad4;
1033 1.16 augustss xfer->td->td_flags = LE(
1034 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1035 1.19 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1036 1.19 augustss (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1037 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dmap));
1038 1.1 augustss xfer->nexttd = stat;
1039 1.16 augustss xfer->td->td_nexttd = LE(stat->physaddr);
1040 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
1041 1.1 augustss xfer->len = len;
1042 1.1 augustss xfer->reqh = reqh;
1043 1.22 augustss xfer->flags = OHCI_SET_LEN;
1044 1.1 augustss
1045 1.1 augustss next = xfer;
1046 1.22 augustss stat->flags = OHCI_CALL_DONE;
1047 1.22 augustss } else {
1048 1.1 augustss next = stat;
1049 1.22 augustss stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
1050 1.22 augustss }
1051 1.1 augustss
1052 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1053 1.1 augustss if (!isread && len != 0)
1054 1.1 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1055 1.1 augustss
1056 1.16 augustss setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1057 1.16 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1058 1.16 augustss setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1059 1.1 augustss setup->nexttd = next;
1060 1.16 augustss setup->td->td_nexttd = LE(next->physaddr);
1061 1.16 augustss setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1);
1062 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
1063 1.1 augustss setup->reqh = reqh;
1064 1.22 augustss setup->flags = 0;
1065 1.22 augustss reqh->hcpriv = setup;
1066 1.1 augustss
1067 1.16 augustss stat->td->td_flags = LE(
1068 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1069 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1070 1.1 augustss stat->td->td_cbp = 0;
1071 1.1 augustss stat->nexttd = tail;
1072 1.16 augustss stat->td->td_nexttd = LE(tail->physaddr);
1073 1.1 augustss stat->td->td_be = 0;
1074 1.1 augustss stat->len = 0;
1075 1.1 augustss stat->reqh = reqh;
1076 1.1 augustss
1077 1.1 augustss #if USB_DEBUG
1078 1.1 augustss if (ohcidebug > 5) {
1079 1.1 augustss printf("ohci_device_request:\n");
1080 1.1 augustss ohci_dump_ed(sed);
1081 1.1 augustss ohci_dump_tds(setup);
1082 1.1 augustss }
1083 1.1 augustss #endif
1084 1.1 augustss
1085 1.1 augustss /* Insert ED in schedule */
1086 1.1 augustss s = splusb();
1087 1.1 augustss ohci_hash_add_td(sc, setup);
1088 1.1 augustss if (len != 0)
1089 1.1 augustss ohci_hash_add_td(sc, xfer);
1090 1.1 augustss ohci_hash_add_td(sc, stat);
1091 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
1092 1.1 augustss opipe->tail = tail;
1093 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1094 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1095 1.15 augustss usb_timeout(ohci_timeout, reqh,
1096 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1097 1.15 augustss }
1098 1.1 augustss splx(s);
1099 1.1 augustss
1100 1.1 augustss #if USB_DEBUG
1101 1.1 augustss if (ohcidebug > 5) {
1102 1.1 augustss delay(5000);
1103 1.1 augustss printf("ohci_device_request: status=%x\n",
1104 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
1105 1.1 augustss ohci_dump_ed(sed);
1106 1.1 augustss ohci_dump_tds(setup);
1107 1.1 augustss }
1108 1.1 augustss #endif
1109 1.1 augustss
1110 1.1 augustss return (USBD_NORMAL_COMPLETION);
1111 1.1 augustss
1112 1.1 augustss bad4:
1113 1.1 augustss ohci_free_std(sc, xfer);
1114 1.1 augustss bad3:
1115 1.1 augustss ohci_free_std(sc, tail);
1116 1.1 augustss bad2:
1117 1.1 augustss ohci_free_std(sc, stat);
1118 1.1 augustss bad1:
1119 1.1 augustss return (r);
1120 1.1 augustss }
1121 1.1 augustss
1122 1.1 augustss /*
1123 1.1 augustss * Add an ED to the schedule. Called at splusb().
1124 1.1 augustss */
1125 1.1 augustss void
1126 1.3 augustss ohci_add_ed(sed, head)
1127 1.1 augustss ohci_soft_ed_t *sed;
1128 1.1 augustss ohci_soft_ed_t *head;
1129 1.1 augustss {
1130 1.1 augustss sed->next = head->next;
1131 1.1 augustss sed->ed->ed_nexted = head->ed->ed_nexted;
1132 1.1 augustss head->next = sed;
1133 1.16 augustss head->ed->ed_nexted = LE(sed->physaddr);
1134 1.1 augustss }
1135 1.1 augustss
1136 1.1 augustss /*
1137 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1138 1.3 augustss */
1139 1.3 augustss void
1140 1.3 augustss ohci_rem_ed(sed, head)
1141 1.3 augustss ohci_soft_ed_t *sed;
1142 1.3 augustss ohci_soft_ed_t *head;
1143 1.3 augustss {
1144 1.3 augustss ohci_soft_ed_t *p;
1145 1.3 augustss
1146 1.3 augustss /* XXX */
1147 1.3 augustss for (p = head; p && p->next != sed; p = p->next)
1148 1.3 augustss ;
1149 1.3 augustss if (!p)
1150 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1151 1.3 augustss p->next = sed->next;
1152 1.3 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
1153 1.3 augustss }
1154 1.3 augustss
1155 1.3 augustss /*
1156 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1157 1.1 augustss * the host controller. This queue is the processed by software.
1158 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1159 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1160 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1161 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1162 1.1 augustss * hash value.
1163 1.1 augustss */
1164 1.1 augustss
1165 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1166 1.1 augustss /* Called at splusb() */
1167 1.1 augustss void
1168 1.1 augustss ohci_hash_add_td(sc, std)
1169 1.1 augustss ohci_softc_t *sc;
1170 1.1 augustss ohci_soft_td_t *std;
1171 1.1 augustss {
1172 1.1 augustss int h = HASH(std->physaddr);
1173 1.1 augustss
1174 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1175 1.1 augustss }
1176 1.1 augustss
1177 1.1 augustss /* Called at splusb() */
1178 1.1 augustss void
1179 1.1 augustss ohci_hash_rem_td(sc, std)
1180 1.1 augustss ohci_softc_t *sc;
1181 1.1 augustss ohci_soft_td_t *std;
1182 1.1 augustss {
1183 1.1 augustss LIST_REMOVE(std, hnext);
1184 1.1 augustss }
1185 1.1 augustss
1186 1.1 augustss ohci_soft_td_t *
1187 1.1 augustss ohci_hash_find_td(sc, a)
1188 1.1 augustss ohci_softc_t *sc;
1189 1.1 augustss ohci_physaddr_t a;
1190 1.1 augustss {
1191 1.1 augustss int h = HASH(a);
1192 1.1 augustss ohci_soft_td_t *std;
1193 1.1 augustss
1194 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1195 1.1 augustss std != 0;
1196 1.1 augustss std = LIST_NEXT(std, hnext))
1197 1.1 augustss if (std->physaddr == a)
1198 1.1 augustss return (std);
1199 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1200 1.1 augustss }
1201 1.1 augustss
1202 1.1 augustss void
1203 1.1 augustss ohci_timeout(addr)
1204 1.1 augustss void *addr;
1205 1.1 augustss {
1206 1.1 augustss #if 0
1207 1.1 augustss usbd_request_handle *reqh = addr;
1208 1.1 augustss int s;
1209 1.1 augustss
1210 1.1 augustss DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1211 1.1 augustss s = splusb();
1212 1.1 augustss /* XXX need to inactivate TD before calling interrupt routine */
1213 1.1 augustss ohci_XXX_done(reqh);
1214 1.1 augustss splx(s);
1215 1.1 augustss #endif
1216 1.1 augustss }
1217 1.1 augustss
1218 1.1 augustss #ifdef USB_DEBUG
1219 1.1 augustss void
1220 1.1 augustss ohci_dump_tds(std)
1221 1.1 augustss ohci_soft_td_t *std;
1222 1.1 augustss {
1223 1.1 augustss for (; std; std = std->nexttd)
1224 1.1 augustss ohci_dump_td(std);
1225 1.1 augustss }
1226 1.1 augustss
1227 1.1 augustss void
1228 1.1 augustss ohci_dump_td(std)
1229 1.1 augustss ohci_soft_td_t *std;
1230 1.1 augustss {
1231 1.14 augustss printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1232 1.14 augustss "nexttd=0x%08lx be=0x%08lx\n",
1233 1.1 augustss std, (u_long)std->physaddr,
1234 1.16 augustss (u_long)LE(std->td->td_flags),
1235 1.1 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1236 1.16 augustss OHCI_TD_GET_DI(LE(std->td->td_flags)),
1237 1.16 augustss OHCI_TD_GET_EC(LE(std->td->td_flags)),
1238 1.16 augustss OHCI_TD_GET_CC(LE(std->td->td_flags)),
1239 1.16 augustss (u_long)LE(std->td->td_cbp),
1240 1.16 augustss (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be));
1241 1.1 augustss }
1242 1.1 augustss
1243 1.1 augustss void
1244 1.1 augustss ohci_dump_ed(sed)
1245 1.1 augustss ohci_soft_ed_t *sed;
1246 1.1 augustss {
1247 1.14 augustss printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1248 1.14 augustss "headp=%b nexted=0x%08lx\n",
1249 1.1 augustss sed, (u_long)sed->physaddr,
1250 1.16 augustss OHCI_ED_GET_FA(LE(sed->ed->ed_flags)),
1251 1.16 augustss OHCI_ED_GET_EN(LE(sed->ed->ed_flags)),
1252 1.16 augustss OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)),
1253 1.16 augustss (u_long)LE(sed->ed->ed_flags),
1254 1.1 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO",
1255 1.16 augustss (u_long)LE(sed->ed->ed_tailp),
1256 1.16 augustss (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY",
1257 1.16 augustss (u_long)LE(sed->ed->ed_nexted));
1258 1.1 augustss }
1259 1.1 augustss #endif
1260 1.1 augustss
1261 1.1 augustss usbd_status
1262 1.1 augustss ohci_open(pipe)
1263 1.1 augustss usbd_pipe_handle pipe;
1264 1.1 augustss {
1265 1.1 augustss usbd_device_handle dev = pipe->device;
1266 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1267 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1268 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1269 1.1 augustss u_int8_t addr = dev->address;
1270 1.1 augustss ohci_soft_ed_t *sed;
1271 1.1 augustss ohci_soft_td_t *std;
1272 1.1 augustss usbd_status r;
1273 1.1 augustss int s;
1274 1.1 augustss
1275 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1276 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1277 1.1 augustss if (addr == sc->sc_addr) {
1278 1.1 augustss switch (ed->bEndpointAddress) {
1279 1.1 augustss case USB_CONTROL_ENDPOINT:
1280 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1281 1.1 augustss break;
1282 1.1 augustss case UE_IN | OHCI_INTR_ENDPT:
1283 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1284 1.1 augustss break;
1285 1.1 augustss default:
1286 1.1 augustss return (USBD_INVAL);
1287 1.1 augustss }
1288 1.1 augustss } else {
1289 1.1 augustss sed = ohci_alloc_sed(sc);
1290 1.1 augustss if (sed == 0)
1291 1.1 augustss goto bad0;
1292 1.1 augustss std = ohci_alloc_std(sc);
1293 1.1 augustss if (std == 0)
1294 1.1 augustss goto bad1;
1295 1.1 augustss opipe->sed = sed;
1296 1.1 augustss opipe->tail = std;
1297 1.16 augustss sed->ed->ed_flags = LE(
1298 1.1 augustss OHCI_ED_SET_FA(addr) |
1299 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1300 1.1 augustss OHCI_ED_DIR_TD |
1301 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1302 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1303 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1304 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1305 1.16 augustss sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr);
1306 1.1 augustss
1307 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1308 1.1 augustss case UE_CONTROL:
1309 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1310 1.4 augustss r = usb_allocmem(sc->sc_dmatag,
1311 1.4 augustss sizeof(usb_device_request_t),
1312 1.4 augustss 0, &opipe->u.ctl.reqdma);
1313 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1314 1.1 augustss goto bad;
1315 1.1 augustss s = splusb();
1316 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1317 1.1 augustss splx(s);
1318 1.1 augustss break;
1319 1.1 augustss case UE_INTERRUPT:
1320 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1321 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1322 1.1 augustss case UE_ISOCHRONOUS:
1323 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1324 1.1 augustss return (USBD_XXX);
1325 1.1 augustss case UE_BULK:
1326 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1327 1.3 augustss s = splusb();
1328 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1329 1.3 augustss splx(s);
1330 1.3 augustss break;
1331 1.1 augustss }
1332 1.1 augustss }
1333 1.1 augustss return (USBD_NORMAL_COMPLETION);
1334 1.1 augustss
1335 1.1 augustss bad:
1336 1.1 augustss ohci_free_std(sc, std);
1337 1.1 augustss bad1:
1338 1.1 augustss ohci_free_sed(sc, sed);
1339 1.1 augustss bad0:
1340 1.1 augustss return (USBD_NOMEM);
1341 1.1 augustss
1342 1.1 augustss }
1343 1.1 augustss
1344 1.1 augustss /*
1345 1.22 augustss * Close a reqular pipe.
1346 1.22 augustss * Assumes that there are no pending transactions.
1347 1.22 augustss */
1348 1.22 augustss void
1349 1.22 augustss ohci_close_pipe(pipe, head)
1350 1.22 augustss usbd_pipe_handle pipe;
1351 1.22 augustss ohci_soft_ed_t *head;
1352 1.22 augustss {
1353 1.22 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1354 1.22 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1355 1.22 augustss ohci_soft_ed_t *sed = opipe->sed;
1356 1.22 augustss int s;
1357 1.22 augustss
1358 1.22 augustss s = splusb();
1359 1.22 augustss #ifdef DIAGNOSTIC
1360 1.22 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
1361 1.22 augustss if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
1362 1.22 augustss (sed->ed->ed_headp & LE(OHCI_TAILMASK))) {
1363 1.22 augustss ohci_physaddr_t td = sed->ed->ed_headp;
1364 1.22 augustss ohci_soft_td_t *std;
1365 1.22 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1366 1.22 augustss std != 0;
1367 1.22 augustss std = LIST_NEXT(std, hnext))
1368 1.22 augustss if (std->physaddr == td)
1369 1.22 augustss break;
1370 1.22 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1371 1.22 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
1372 1.22 augustss (int)LE(sed->ed->ed_headp), (int)LE(sed->ed->ed_tailp),
1373 1.22 augustss pipe, std);
1374 1.22 augustss usb_delay_ms(&sc->sc_bus, 2);
1375 1.22 augustss if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
1376 1.22 augustss (sed->ed->ed_headp & LE(OHCI_TAILMASK)))
1377 1.22 augustss printf("ohci_close_pipe: pipe still not empty\n");
1378 1.22 augustss }
1379 1.22 augustss #endif
1380 1.22 augustss ohci_rem_ed(sed, head);
1381 1.22 augustss splx(s);
1382 1.22 augustss ohci_free_std(sc, opipe->tail);
1383 1.22 augustss ohci_free_sed(sc, opipe->sed);
1384 1.22 augustss }
1385 1.22 augustss
1386 1.22 augustss /*
1387 1.22 augustss * Abort a device bulk request.
1388 1.22 augustss * If this routine is called at splusb() it guarantees that the request
1389 1.22 augustss * will be removed from the hardware scheduling and that the callback
1390 1.22 augustss * for it will be called with USBD_CANCELLED status.
1391 1.22 augustss * It's impossible to guarantee that the requested transfer will not
1392 1.22 augustss * have happened since the hardware runs concurrently.
1393 1.22 augustss * If the transaction has already happened we rely on the ordinary
1394 1.22 augustss * interrupt processing to process it.
1395 1.22 augustss */
1396 1.22 augustss void
1397 1.22 augustss ohci_abort_request(reqh)
1398 1.22 augustss usbd_request_handle reqh;
1399 1.22 augustss {
1400 1.22 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1401 1.22 augustss usbd_device_handle dev = opipe->pipe.device;
1402 1.22 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1403 1.22 augustss ohci_soft_ed_t *sed;
1404 1.22 augustss ohci_soft_td_t *p, *n;
1405 1.22 augustss int s;
1406 1.22 augustss
1407 1.22 augustss DPRINTF(("ohci_abort_request: reqh=%p pipe=%p\n", reqh, opipe));
1408 1.22 augustss s = splusb();
1409 1.22 augustss
1410 1.22 augustss reqh->status = USBD_CANCELLED; /* mark as cancelled */
1411 1.22 augustss
1412 1.22 augustss if (!reqh->hcpriv) {
1413 1.22 augustss /* Not scheduled */
1414 1.22 augustss reqh->xfercb(reqh);
1415 1.22 augustss return;
1416 1.22 augustss }
1417 1.22 augustss
1418 1.22 augustss sed = opipe->sed;
1419 1.22 augustss DPRINTFN(1,("ohci_abort_request: stop ed=%p\n", sed));
1420 1.22 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1421 1.22 augustss delay(10); /* give HC hardware a little time */
1422 1.22 augustss
1423 1.22 augustss /* if already processed by hardware let interrupt routine handle it */
1424 1.22 augustss if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) ==
1425 1.22 augustss (sed->ed->ed_headp & LE(OHCI_TAILMASK))) {
1426 1.22 augustss DPRINTF(("ohci_abort_request: request processed\n"));
1427 1.22 augustss usb_delay_ms(dev->bus, 2);
1428 1.22 augustss } else {
1429 1.22 augustss p = reqh->hcpriv;
1430 1.22 augustss #ifdef DIAGNOSTIC
1431 1.22 augustss if (!p) {
1432 1.22 augustss printf("ohci_abort_request: hcpriv==0\n");
1433 1.22 augustss return;
1434 1.22 augustss }
1435 1.22 augustss #endif
1436 1.22 augustss ohci_done(sc, reqh);
1437 1.22 augustss for (; p->reqh == reqh; p = n) {
1438 1.22 augustss n = p->nexttd;
1439 1.22 augustss ohci_hash_rem_td(sc, p);
1440 1.22 augustss ohci_free_std(sc, p);
1441 1.22 augustss }
1442 1.22 augustss DPRINTFN(2,("ohci_abort_request: set hd=%x, tl=%x\n",
1443 1.22 augustss (int)LE(p->physaddr), (int)LE(sed->ed->ed_tailp)));
1444 1.22 augustss sed->ed->ed_headp = p->physaddr; /* unlink TDs */
1445 1.22 augustss }
1446 1.22 augustss
1447 1.22 augustss sed->ed->ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1448 1.22 augustss splx(s);
1449 1.22 augustss }
1450 1.22 augustss
1451 1.22 augustss /*
1452 1.1 augustss * Data structures and routines to emulate the root hub.
1453 1.1 augustss */
1454 1.1 augustss usb_device_descriptor_t ohci_devd = {
1455 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1456 1.1 augustss UDESC_DEVICE, /* type */
1457 1.1 augustss {0x00, 0x01}, /* USB version */
1458 1.1 augustss UCLASS_HUB, /* class */
1459 1.1 augustss USUBCLASS_HUB, /* subclass */
1460 1.1 augustss 0, /* protocol */
1461 1.1 augustss 64, /* max packet */
1462 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1463 1.1 augustss 1,2,0, /* string indicies */
1464 1.1 augustss 1 /* # of configurations */
1465 1.1 augustss };
1466 1.1 augustss
1467 1.1 augustss usb_config_descriptor_t ohci_confd = {
1468 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1469 1.1 augustss UDESC_CONFIG,
1470 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1471 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1472 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1473 1.1 augustss 1,
1474 1.1 augustss 1,
1475 1.1 augustss 0,
1476 1.1 augustss UC_SELF_POWERED,
1477 1.1 augustss 0 /* max power */
1478 1.1 augustss };
1479 1.1 augustss
1480 1.1 augustss usb_interface_descriptor_t ohci_ifcd = {
1481 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1482 1.1 augustss UDESC_INTERFACE,
1483 1.1 augustss 0,
1484 1.1 augustss 0,
1485 1.1 augustss 1,
1486 1.1 augustss UCLASS_HUB,
1487 1.1 augustss USUBCLASS_HUB,
1488 1.1 augustss 0,
1489 1.1 augustss 0
1490 1.1 augustss };
1491 1.1 augustss
1492 1.1 augustss usb_endpoint_descriptor_t ohci_endpd = {
1493 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1494 1.1 augustss UDESC_ENDPOINT,
1495 1.1 augustss UE_IN | OHCI_INTR_ENDPT,
1496 1.1 augustss UE_INTERRUPT,
1497 1.1 augustss {8, 0}, /* max packet */
1498 1.1 augustss 255
1499 1.1 augustss };
1500 1.1 augustss
1501 1.1 augustss usb_hub_descriptor_t ohci_hubd = {
1502 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1503 1.1 augustss UDESC_HUB,
1504 1.1 augustss 0,
1505 1.1 augustss {0,0},
1506 1.1 augustss 0,
1507 1.1 augustss 0,
1508 1.1 augustss {0},
1509 1.1 augustss };
1510 1.1 augustss
1511 1.1 augustss int
1512 1.1 augustss ohci_str(p, l, s)
1513 1.1 augustss usb_string_descriptor_t *p;
1514 1.1 augustss int l;
1515 1.1 augustss char *s;
1516 1.1 augustss {
1517 1.1 augustss int i;
1518 1.1 augustss
1519 1.1 augustss if (l == 0)
1520 1.1 augustss return (0);
1521 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1522 1.1 augustss if (l == 1)
1523 1.1 augustss return (1);
1524 1.1 augustss p->bDescriptorType = UDESC_STRING;
1525 1.1 augustss l -= 2;
1526 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1527 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1528 1.1 augustss return (2*i+2);
1529 1.1 augustss }
1530 1.1 augustss
1531 1.1 augustss /*
1532 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1533 1.1 augustss */
1534 1.1 augustss usbd_status
1535 1.1 augustss ohci_root_ctrl_transfer(reqh)
1536 1.1 augustss usbd_request_handle reqh;
1537 1.1 augustss {
1538 1.17 augustss int s;
1539 1.17 augustss usbd_status r;
1540 1.17 augustss
1541 1.17 augustss s = splusb();
1542 1.17 augustss r = usb_insert_transfer(reqh);
1543 1.17 augustss splx(s);
1544 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1545 1.17 augustss return (r);
1546 1.17 augustss else
1547 1.17 augustss return (ohci_root_ctrl_start(reqh));
1548 1.17 augustss }
1549 1.17 augustss
1550 1.17 augustss usbd_status
1551 1.17 augustss ohci_root_ctrl_start(reqh)
1552 1.17 augustss usbd_request_handle reqh;
1553 1.17 augustss {
1554 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1555 1.1 augustss usb_device_request_t *req;
1556 1.1 augustss void *buf;
1557 1.1 augustss int port, i;
1558 1.1 augustss int len, value, index, l, totlen = 0;
1559 1.1 augustss usb_port_status_t ps;
1560 1.1 augustss usb_hub_descriptor_t hubd;
1561 1.1 augustss usbd_status r;
1562 1.1 augustss u_int32_t v;
1563 1.1 augustss
1564 1.1 augustss if (!reqh->isreq)
1565 1.1 augustss /* XXX panic */
1566 1.1 augustss return (USBD_INVAL);
1567 1.1 augustss req = &reqh->request;
1568 1.1 augustss buf = reqh->buffer;
1569 1.1 augustss
1570 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1571 1.1 augustss req->bmRequestType, req->bRequest));
1572 1.1 augustss
1573 1.1 augustss len = UGETW(req->wLength);
1574 1.1 augustss value = UGETW(req->wValue);
1575 1.1 augustss index = UGETW(req->wIndex);
1576 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1577 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1578 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1579 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1580 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1581 1.1 augustss /*
1582 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1583 1.1 augustss * for the integrated root hub.
1584 1.1 augustss */
1585 1.1 augustss break;
1586 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1587 1.1 augustss if (len > 0) {
1588 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1589 1.1 augustss totlen = 1;
1590 1.1 augustss }
1591 1.1 augustss break;
1592 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1593 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1594 1.1 augustss switch(value >> 8) {
1595 1.1 augustss case UDESC_DEVICE:
1596 1.1 augustss if ((value & 0xff) != 0) {
1597 1.1 augustss r = USBD_IOERROR;
1598 1.1 augustss goto ret;
1599 1.1 augustss }
1600 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1601 1.1 augustss memcpy(buf, &ohci_devd, l);
1602 1.1 augustss break;
1603 1.1 augustss case UDESC_CONFIG:
1604 1.1 augustss if ((value & 0xff) != 0) {
1605 1.1 augustss r = USBD_IOERROR;
1606 1.1 augustss goto ret;
1607 1.1 augustss }
1608 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1609 1.1 augustss memcpy(buf, &ohci_confd, l);
1610 1.1 augustss buf = (char *)buf + l;
1611 1.1 augustss len -= l;
1612 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1613 1.1 augustss totlen += l;
1614 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1615 1.1 augustss buf = (char *)buf + l;
1616 1.1 augustss len -= l;
1617 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1618 1.1 augustss totlen += l;
1619 1.1 augustss memcpy(buf, &ohci_endpd, l);
1620 1.1 augustss break;
1621 1.1 augustss case UDESC_STRING:
1622 1.1 augustss if (len == 0)
1623 1.1 augustss break;
1624 1.1 augustss *(u_int8_t *)buf = 0;
1625 1.1 augustss totlen = 1;
1626 1.1 augustss switch (value & 0xff) {
1627 1.1 augustss case 1: /* Vendor */
1628 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1629 1.1 augustss break;
1630 1.1 augustss case 2: /* Product */
1631 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1632 1.1 augustss break;
1633 1.1 augustss }
1634 1.1 augustss break;
1635 1.1 augustss default:
1636 1.1 augustss r = USBD_IOERROR;
1637 1.1 augustss goto ret;
1638 1.1 augustss }
1639 1.1 augustss break;
1640 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1641 1.1 augustss if (len > 0) {
1642 1.1 augustss *(u_int8_t *)buf = 0;
1643 1.1 augustss totlen = 1;
1644 1.1 augustss }
1645 1.1 augustss break;
1646 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1647 1.1 augustss if (len > 1) {
1648 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1649 1.1 augustss totlen = 2;
1650 1.1 augustss }
1651 1.1 augustss break;
1652 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1653 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1654 1.1 augustss if (len > 1) {
1655 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1656 1.1 augustss totlen = 2;
1657 1.1 augustss }
1658 1.1 augustss break;
1659 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1660 1.1 augustss if (value >= USB_MAX_DEVICES) {
1661 1.1 augustss r = USBD_IOERROR;
1662 1.1 augustss goto ret;
1663 1.1 augustss }
1664 1.1 augustss sc->sc_addr = value;
1665 1.1 augustss break;
1666 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1667 1.1 augustss if (value != 0 && value != 1) {
1668 1.1 augustss r = USBD_IOERROR;
1669 1.1 augustss goto ret;
1670 1.1 augustss }
1671 1.1 augustss sc->sc_conf = value;
1672 1.1 augustss break;
1673 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1674 1.1 augustss break;
1675 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1676 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1677 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1678 1.1 augustss r = USBD_IOERROR;
1679 1.1 augustss goto ret;
1680 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1681 1.1 augustss break;
1682 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1683 1.1 augustss break;
1684 1.1 augustss /* Hub requests */
1685 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1686 1.1 augustss break;
1687 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1688 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1689 1.14 augustss "port=%d feature=%d\n",
1690 1.1 augustss index, value));
1691 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1692 1.1 augustss r = USBD_IOERROR;
1693 1.1 augustss goto ret;
1694 1.1 augustss }
1695 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1696 1.1 augustss switch(value) {
1697 1.1 augustss case UHF_PORT_ENABLE:
1698 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1699 1.1 augustss break;
1700 1.1 augustss case UHF_PORT_SUSPEND:
1701 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1702 1.1 augustss break;
1703 1.1 augustss case UHF_PORT_POWER:
1704 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1705 1.1 augustss break;
1706 1.1 augustss case UHF_C_PORT_CONNECTION:
1707 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1708 1.1 augustss break;
1709 1.1 augustss case UHF_C_PORT_ENABLE:
1710 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1711 1.1 augustss break;
1712 1.1 augustss case UHF_C_PORT_SUSPEND:
1713 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1714 1.1 augustss break;
1715 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1716 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1717 1.1 augustss break;
1718 1.1 augustss case UHF_C_PORT_RESET:
1719 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1720 1.1 augustss break;
1721 1.1 augustss default:
1722 1.1 augustss r = USBD_IOERROR;
1723 1.1 augustss goto ret;
1724 1.1 augustss }
1725 1.1 augustss switch(value) {
1726 1.1 augustss case UHF_C_PORT_CONNECTION:
1727 1.1 augustss case UHF_C_PORT_ENABLE:
1728 1.1 augustss case UHF_C_PORT_SUSPEND:
1729 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1730 1.1 augustss case UHF_C_PORT_RESET:
1731 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1732 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1733 1.1 augustss ohci_rhsc_able(sc, 1);
1734 1.1 augustss break;
1735 1.1 augustss default:
1736 1.1 augustss break;
1737 1.1 augustss }
1738 1.1 augustss break;
1739 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1740 1.1 augustss if (value != 0) {
1741 1.1 augustss r = USBD_IOERROR;
1742 1.1 augustss goto ret;
1743 1.1 augustss }
1744 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1745 1.1 augustss hubd = ohci_hubd;
1746 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1747 1.15 augustss USETW(hubd.wHubCharacteristics,
1748 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1749 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1750 1.1 augustss /* XXX overcurrent */
1751 1.1 augustss );
1752 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1753 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1754 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1755 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
1756 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1757 1.1 augustss l = min(len, hubd.bDescLength);
1758 1.1 augustss totlen = l;
1759 1.1 augustss memcpy(buf, &hubd, l);
1760 1.1 augustss break;
1761 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1762 1.1 augustss if (len != 4) {
1763 1.1 augustss r = USBD_IOERROR;
1764 1.1 augustss goto ret;
1765 1.1 augustss }
1766 1.1 augustss memset(buf, 0, len); /* ? XXX */
1767 1.1 augustss totlen = len;
1768 1.1 augustss break;
1769 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1770 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1771 1.1 augustss index));
1772 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1773 1.1 augustss r = USBD_IOERROR;
1774 1.1 augustss goto ret;
1775 1.1 augustss }
1776 1.1 augustss if (len != 4) {
1777 1.1 augustss r = USBD_IOERROR;
1778 1.1 augustss goto ret;
1779 1.1 augustss }
1780 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1781 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1782 1.1 augustss v));
1783 1.1 augustss USETW(ps.wPortStatus, v);
1784 1.1 augustss USETW(ps.wPortChange, v >> 16);
1785 1.1 augustss l = min(len, sizeof ps);
1786 1.1 augustss memcpy(buf, &ps, l);
1787 1.1 augustss totlen = l;
1788 1.1 augustss break;
1789 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1790 1.1 augustss r = USBD_IOERROR;
1791 1.1 augustss goto ret;
1792 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1793 1.1 augustss break;
1794 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1795 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1796 1.1 augustss r = USBD_IOERROR;
1797 1.1 augustss goto ret;
1798 1.1 augustss }
1799 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1800 1.1 augustss switch(value) {
1801 1.1 augustss case UHF_PORT_ENABLE:
1802 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
1803 1.1 augustss break;
1804 1.1 augustss case UHF_PORT_SUSPEND:
1805 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
1806 1.1 augustss break;
1807 1.1 augustss case UHF_PORT_RESET:
1808 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
1809 1.14 augustss index));
1810 1.1 augustss OWRITE4(sc, port, UPS_RESET);
1811 1.1 augustss for (i = 0; i < 10; i++) {
1812 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
1813 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
1814 1.1 augustss break;
1815 1.1 augustss }
1816 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1817 1.1 augustss index, OREAD4(sc, port)));
1818 1.1 augustss break;
1819 1.1 augustss case UHF_PORT_POWER:
1820 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
1821 1.14 augustss "%d\n", index));
1822 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
1823 1.1 augustss break;
1824 1.1 augustss default:
1825 1.1 augustss r = USBD_IOERROR;
1826 1.1 augustss goto ret;
1827 1.1 augustss }
1828 1.1 augustss break;
1829 1.1 augustss default:
1830 1.1 augustss r = USBD_IOERROR;
1831 1.1 augustss goto ret;
1832 1.1 augustss }
1833 1.1 augustss reqh->actlen = totlen;
1834 1.1 augustss r = USBD_NORMAL_COMPLETION;
1835 1.1 augustss ret:
1836 1.1 augustss reqh->status = r;
1837 1.1 augustss reqh->xfercb(reqh);
1838 1.17 augustss usb_start_next(reqh->pipe);
1839 1.1 augustss return (USBD_IN_PROGRESS);
1840 1.1 augustss }
1841 1.1 augustss
1842 1.1 augustss /* Abort a root control request. */
1843 1.1 augustss void
1844 1.1 augustss ohci_root_ctrl_abort(reqh)
1845 1.1 augustss usbd_request_handle reqh;
1846 1.1 augustss {
1847 1.9 augustss /* Nothing to do, all transfers are synchronous. */
1848 1.1 augustss }
1849 1.1 augustss
1850 1.1 augustss /* Close the root pipe. */
1851 1.1 augustss void
1852 1.1 augustss ohci_root_ctrl_close(pipe)
1853 1.1 augustss usbd_pipe_handle pipe;
1854 1.1 augustss {
1855 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
1856 1.22 augustss /* Nothing to do. */
1857 1.1 augustss }
1858 1.1 augustss
1859 1.1 augustss usbd_status
1860 1.1 augustss ohci_root_intr_transfer(reqh)
1861 1.1 augustss usbd_request_handle reqh;
1862 1.1 augustss {
1863 1.17 augustss int s;
1864 1.17 augustss usbd_status r;
1865 1.17 augustss
1866 1.17 augustss s = splusb();
1867 1.17 augustss r = usb_insert_transfer(reqh);
1868 1.17 augustss splx(s);
1869 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1870 1.17 augustss return (r);
1871 1.17 augustss else
1872 1.17 augustss return (ohci_root_intr_start(reqh));
1873 1.17 augustss }
1874 1.17 augustss
1875 1.17 augustss usbd_status
1876 1.17 augustss ohci_root_intr_start(reqh)
1877 1.17 augustss usbd_request_handle reqh;
1878 1.17 augustss {
1879 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
1880 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1881 1.1 augustss struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
1882 1.4 augustss usb_dma_t *dmap;
1883 1.1 augustss usbd_status r;
1884 1.1 augustss int len;
1885 1.1 augustss
1886 1.1 augustss len = reqh->length;
1887 1.1 augustss dmap = &upipe->u.intr.datadma;
1888 1.1 augustss if (len == 0)
1889 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
1890 1.1 augustss
1891 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1892 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1893 1.1 augustss return (r);
1894 1.1 augustss sc->sc_intrreqh = reqh;
1895 1.1 augustss
1896 1.1 augustss return (USBD_IN_PROGRESS);
1897 1.1 augustss }
1898 1.1 augustss
1899 1.3 augustss /* Abort a root interrupt request. */
1900 1.1 augustss void
1901 1.1 augustss ohci_root_intr_abort(reqh)
1902 1.1 augustss usbd_request_handle reqh;
1903 1.1 augustss {
1904 1.3 augustss /* No need to abort. */
1905 1.1 augustss }
1906 1.1 augustss
1907 1.1 augustss /* Close the root pipe. */
1908 1.1 augustss void
1909 1.1 augustss ohci_root_intr_close(pipe)
1910 1.1 augustss usbd_pipe_handle pipe;
1911 1.1 augustss {
1912 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1913 1.1 augustss
1914 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
1915 1.22 augustss
1916 1.22 augustss sc->sc_intrreqh = 0;
1917 1.1 augustss }
1918 1.1 augustss
1919 1.1 augustss /************************/
1920 1.1 augustss
1921 1.1 augustss usbd_status
1922 1.1 augustss ohci_device_ctrl_transfer(reqh)
1923 1.1 augustss usbd_request_handle reqh;
1924 1.1 augustss {
1925 1.17 augustss int s;
1926 1.17 augustss usbd_status r;
1927 1.17 augustss
1928 1.17 augustss s = splusb();
1929 1.17 augustss r = usb_insert_transfer(reqh);
1930 1.17 augustss splx(s);
1931 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1932 1.17 augustss return (r);
1933 1.17 augustss else
1934 1.17 augustss return (ohci_device_ctrl_start(reqh));
1935 1.17 augustss }
1936 1.17 augustss
1937 1.17 augustss usbd_status
1938 1.17 augustss ohci_device_ctrl_start(reqh)
1939 1.17 augustss usbd_request_handle reqh;
1940 1.17 augustss {
1941 1.6 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1942 1.1 augustss usbd_status r;
1943 1.1 augustss
1944 1.1 augustss if (!reqh->isreq) {
1945 1.1 augustss /* XXX panic */
1946 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
1947 1.1 augustss return (USBD_INVAL);
1948 1.1 augustss }
1949 1.1 augustss
1950 1.1 augustss r = ohci_device_request(reqh);
1951 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1952 1.1 augustss return (r);
1953 1.1 augustss
1954 1.6 augustss if (sc->sc_bus.use_polling)
1955 1.6 augustss ohci_waitintr(sc, reqh);
1956 1.1 augustss return (USBD_IN_PROGRESS);
1957 1.1 augustss }
1958 1.1 augustss
1959 1.1 augustss /* Abort a device control request. */
1960 1.1 augustss void
1961 1.1 augustss ohci_device_ctrl_abort(reqh)
1962 1.1 augustss usbd_request_handle reqh;
1963 1.1 augustss {
1964 1.22 augustss DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh));
1965 1.22 augustss ohci_abort_request(reqh);
1966 1.1 augustss }
1967 1.1 augustss
1968 1.1 augustss /* Close a device control pipe. */
1969 1.1 augustss void
1970 1.1 augustss ohci_device_ctrl_close(pipe)
1971 1.1 augustss usbd_pipe_handle pipe;
1972 1.1 augustss {
1973 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1974 1.1 augustss
1975 1.22 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
1976 1.22 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
1977 1.3 augustss }
1978 1.3 augustss
1979 1.3 augustss /************************/
1980 1.3 augustss
1981 1.3 augustss usbd_status
1982 1.3 augustss ohci_device_bulk_transfer(reqh)
1983 1.3 augustss usbd_request_handle reqh;
1984 1.3 augustss {
1985 1.17 augustss int s;
1986 1.17 augustss usbd_status r;
1987 1.17 augustss
1988 1.17 augustss s = splusb();
1989 1.17 augustss r = usb_insert_transfer(reqh);
1990 1.17 augustss splx(s);
1991 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1992 1.17 augustss return (r);
1993 1.17 augustss else
1994 1.17 augustss return (ohci_device_bulk_start(reqh));
1995 1.17 augustss }
1996 1.17 augustss
1997 1.17 augustss usbd_status
1998 1.17 augustss ohci_device_bulk_start(reqh)
1999 1.17 augustss usbd_request_handle reqh;
2000 1.17 augustss {
2001 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2002 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2003 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2004 1.3 augustss int addr = dev->address;
2005 1.3 augustss ohci_soft_td_t *xfer, *tail;
2006 1.3 augustss ohci_soft_ed_t *sed;
2007 1.4 augustss usb_dma_t *dmap;
2008 1.3 augustss usbd_status r;
2009 1.3 augustss int s, len, isread;
2010 1.3 augustss
2011 1.22 augustss #ifdef DIAGNOSTIC
2012 1.3 augustss if (reqh->isreq) {
2013 1.3 augustss /* XXX panic */
2014 1.22 augustss printf("ohci_device_bulk_start: a request\n");
2015 1.3 augustss return (USBD_INVAL);
2016 1.3 augustss }
2017 1.22 augustss #endif
2018 1.3 augustss
2019 1.3 augustss len = reqh->length;
2020 1.3 augustss dmap = &opipe->u.bulk.datadma;
2021 1.3 augustss isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
2022 1.3 augustss sed = opipe->sed;
2023 1.3 augustss
2024 1.22 augustss DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d "
2025 1.22 augustss "endpt=%d\n", reqh, len, isread,
2026 1.22 augustss reqh->pipe->endpoint->edesc->bEndpointAddress));
2027 1.22 augustss
2028 1.3 augustss opipe->u.bulk.length = len;
2029 1.3 augustss
2030 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2031 1.3 augustss if (r != USBD_NORMAL_COMPLETION)
2032 1.3 augustss goto ret1;
2033 1.3 augustss
2034 1.3 augustss tail = ohci_alloc_std(sc);
2035 1.3 augustss if (!tail) {
2036 1.3 augustss r = USBD_NOMEM;
2037 1.3 augustss goto ret2;
2038 1.3 augustss }
2039 1.3 augustss tail->reqh = 0;
2040 1.3 augustss
2041 1.3 augustss /* Update device address */
2042 1.16 augustss sed->ed->ed_flags = LE(
2043 1.16 augustss (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) |
2044 1.16 augustss OHCI_ED_SET_FA(addr));
2045 1.3 augustss
2046 1.3 augustss /* Set up data transaction */
2047 1.3 augustss xfer = opipe->tail;
2048 1.16 augustss xfer->td->td_flags = LE(
2049 1.3 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
2050 1.19 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY |
2051 1.19 augustss (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
2052 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dmap));
2053 1.3 augustss xfer->nexttd = tail;
2054 1.16 augustss xfer->td->td_nexttd = LE(tail->physaddr);
2055 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
2056 1.3 augustss xfer->len = len;
2057 1.3 augustss xfer->reqh = reqh;
2058 1.22 augustss xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2059 1.3 augustss reqh->hcpriv = xfer;
2060 1.3 augustss
2061 1.3 augustss if (!isread)
2062 1.3 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
2063 1.3 augustss
2064 1.22 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2065 1.22 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2066 1.22 augustss (int)LE(sed->ed->ed_flags), (int)LE(xfer->td->td_flags),
2067 1.22 augustss (int)LE(xfer->td->td_cbp), (int)LE(xfer->td->td_be)));
2068 1.22 augustss
2069 1.3 augustss /* Insert ED in schedule */
2070 1.3 augustss s = splusb();
2071 1.3 augustss ohci_hash_add_td(sc, xfer);
2072 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
2073 1.3 augustss opipe->tail = tail;
2074 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2075 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
2076 1.15 augustss usb_timeout(ohci_timeout, reqh,
2077 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2078 1.15 augustss }
2079 1.3 augustss splx(s);
2080 1.3 augustss
2081 1.3 augustss return (USBD_IN_PROGRESS);
2082 1.3 augustss
2083 1.3 augustss ret2:
2084 1.4 augustss usb_freemem(sc->sc_dmatag, dmap);
2085 1.3 augustss ret1:
2086 1.3 augustss return (r);
2087 1.3 augustss }
2088 1.3 augustss
2089 1.3 augustss void
2090 1.3 augustss ohci_device_bulk_abort(reqh)
2091 1.3 augustss usbd_request_handle reqh;
2092 1.3 augustss {
2093 1.22 augustss DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh));
2094 1.22 augustss ohci_abort_request(reqh);
2095 1.3 augustss }
2096 1.3 augustss
2097 1.22 augustss /*
2098 1.22 augustss * Close a device bulk pipe.
2099 1.22 augustss */
2100 1.3 augustss void
2101 1.3 augustss ohci_device_bulk_close(pipe)
2102 1.3 augustss usbd_pipe_handle pipe;
2103 1.3 augustss {
2104 1.22 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2105 1.3 augustss
2106 1.22 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2107 1.22 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2108 1.1 augustss }
2109 1.1 augustss
2110 1.1 augustss /************************/
2111 1.1 augustss
2112 1.1 augustss usbd_status
2113 1.1 augustss ohci_device_intr_transfer(reqh)
2114 1.17 augustss usbd_request_handle reqh;
2115 1.17 augustss {
2116 1.17 augustss int s;
2117 1.17 augustss usbd_status r;
2118 1.17 augustss
2119 1.17 augustss s = splusb();
2120 1.17 augustss r = usb_insert_transfer(reqh);
2121 1.17 augustss splx(s);
2122 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2123 1.17 augustss return (r);
2124 1.17 augustss else
2125 1.17 augustss return (ohci_device_intr_start(reqh));
2126 1.17 augustss }
2127 1.17 augustss
2128 1.17 augustss usbd_status
2129 1.17 augustss ohci_device_intr_start(reqh)
2130 1.1 augustss usbd_request_handle reqh;
2131 1.1 augustss {
2132 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2133 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2134 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2135 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2136 1.1 augustss ohci_soft_td_t *xfer, *tail;
2137 1.4 augustss usb_dma_t *dmap;
2138 1.1 augustss usbd_status r;
2139 1.1 augustss int len;
2140 1.1 augustss int s;
2141 1.1 augustss
2142 1.14 augustss DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d "
2143 1.14 augustss "flags=%d priv=%p\n",
2144 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
2145 1.1 augustss
2146 1.1 augustss if (reqh->isreq)
2147 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2148 1.1 augustss
2149 1.1 augustss len = reqh->length;
2150 1.1 augustss dmap = &opipe->u.intr.datadma;
2151 1.1 augustss if (len == 0)
2152 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
2153 1.1 augustss
2154 1.1 augustss xfer = opipe->tail;
2155 1.1 augustss tail = ohci_alloc_std(sc);
2156 1.1 augustss if (!tail) {
2157 1.1 augustss r = USBD_NOMEM;
2158 1.1 augustss goto ret1;
2159 1.1 augustss }
2160 1.1 augustss tail->reqh = 0;
2161 1.1 augustss
2162 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2163 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
2164 1.1 augustss goto ret2;
2165 1.1 augustss
2166 1.16 augustss xfer->td->td_flags = LE(
2167 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2168 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2169 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
2170 1.19 augustss xfer->td->td_flags |= LE(OHCI_TD_R);
2171 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dmap));
2172 1.1 augustss xfer->nexttd = tail;
2173 1.16 augustss xfer->td->td_nexttd = LE(tail->physaddr);
2174 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
2175 1.1 augustss xfer->len = len;
2176 1.1 augustss xfer->reqh = reqh;
2177 1.22 augustss xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2178 1.1 augustss reqh->hcpriv = xfer;
2179 1.1 augustss
2180 1.1 augustss #if USB_DEBUG
2181 1.1 augustss if (ohcidebug > 5) {
2182 1.1 augustss printf("ohci_device_intr_transfer:\n");
2183 1.1 augustss ohci_dump_ed(sed);
2184 1.1 augustss ohci_dump_tds(xfer);
2185 1.1 augustss }
2186 1.1 augustss #endif
2187 1.1 augustss
2188 1.1 augustss /* Insert ED in schedule */
2189 1.1 augustss s = splusb();
2190 1.1 augustss ohci_hash_add_td(sc, xfer);
2191 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
2192 1.1 augustss opipe->tail = tail;
2193 1.1 augustss #if 0
2194 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
2195 1.15 augustss usb_timeout(ohci_timeout, reqh,
2196 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2197 1.15 augustss }
2198 1.1 augustss #endif
2199 1.16 augustss sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
2200 1.1 augustss splx(s);
2201 1.1 augustss
2202 1.1 augustss #ifdef USB_DEBUG
2203 1.1 augustss if (ohcidebug > 5) {
2204 1.1 augustss delay(5000);
2205 1.1 augustss printf("ohci_device_intr_transfer: status=%x\n",
2206 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
2207 1.1 augustss ohci_dump_ed(sed);
2208 1.1 augustss ohci_dump_tds(xfer);
2209 1.1 augustss }
2210 1.1 augustss #endif
2211 1.1 augustss
2212 1.1 augustss return (USBD_IN_PROGRESS);
2213 1.1 augustss
2214 1.1 augustss ret2:
2215 1.1 augustss ohci_free_std(sc, xfer);
2216 1.1 augustss ret1:
2217 1.1 augustss return (r);
2218 1.1 augustss }
2219 1.1 augustss
2220 1.1 augustss /* Abort a device control request. */
2221 1.1 augustss void
2222 1.1 augustss ohci_device_intr_abort(reqh)
2223 1.1 augustss usbd_request_handle reqh;
2224 1.1 augustss {
2225 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
2226 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2227 1.1 augustss reqh->pipe->intrreqh = 0;
2228 1.1 augustss }
2229 1.22 augustss ohci_abort_request(reqh);
2230 1.1 augustss }
2231 1.1 augustss
2232 1.1 augustss /* Close a device interrupt pipe. */
2233 1.1 augustss void
2234 1.1 augustss ohci_device_intr_close(pipe)
2235 1.1 augustss usbd_pipe_handle pipe;
2236 1.1 augustss {
2237 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2238 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2239 1.1 augustss int nslots = opipe->u.intr.nslots;
2240 1.1 augustss int pos = opipe->u.intr.pos;
2241 1.1 augustss int j;
2242 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2243 1.1 augustss int s;
2244 1.1 augustss
2245 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2246 1.1 augustss pipe, nslots, pos));
2247 1.1 augustss s = splusb();
2248 1.16 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
2249 1.22 augustss if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) !=
2250 1.22 augustss (sed->ed->ed_headp & LE(OHCI_TAILMASK)))
2251 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2252 1.1 augustss
2253 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2254 1.1 augustss ;
2255 1.1 augustss if (!p)
2256 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2257 1.1 augustss p->next = sed->next;
2258 1.1 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
2259 1.1 augustss splx(s);
2260 1.1 augustss
2261 1.1 augustss for (j = 0; j < nslots; j++)
2262 1.1 augustss --sc->sc_bws[pos * nslots + j];
2263 1.1 augustss
2264 1.1 augustss ohci_free_std(sc, opipe->tail);
2265 1.1 augustss ohci_free_sed(sc, opipe->sed);
2266 1.1 augustss }
2267 1.1 augustss
2268 1.1 augustss usbd_status
2269 1.1 augustss ohci_device_setintr(sc, opipe, ival)
2270 1.1 augustss ohci_softc_t *sc;
2271 1.1 augustss struct ohci_pipe *opipe;
2272 1.1 augustss int ival;
2273 1.1 augustss {
2274 1.1 augustss int i, j, s, best;
2275 1.1 augustss u_int npoll, slow, shigh, nslots;
2276 1.1 augustss u_int bestbw, bw;
2277 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2278 1.1 augustss
2279 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2280 1.1 augustss if (ival == 0) {
2281 1.1 augustss printf("ohci_setintr: 0 interval\n");
2282 1.1 augustss return (USBD_INVAL);
2283 1.1 augustss }
2284 1.1 augustss
2285 1.1 augustss npoll = OHCI_NO_INTRS;
2286 1.1 augustss while (npoll > ival)
2287 1.1 augustss npoll /= 2;
2288 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2289 1.1 augustss
2290 1.1 augustss /*
2291 1.1 augustss * We now know which level in the tree the ED must go into.
2292 1.1 augustss * Figure out which slot has most bandwidth left over.
2293 1.1 augustss * Slots to examine:
2294 1.1 augustss * npoll
2295 1.1 augustss * 1 0
2296 1.1 augustss * 2 1 2
2297 1.1 augustss * 4 3 4 5 6
2298 1.1 augustss * 8 7 8 9 10 11 12 13 14
2299 1.1 augustss * N (N-1) .. (N-1+N-1)
2300 1.1 augustss */
2301 1.1 augustss slow = npoll-1;
2302 1.1 augustss shigh = slow + npoll;
2303 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2304 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2305 1.1 augustss bw = 0;
2306 1.1 augustss for (j = 0; j < nslots; j++)
2307 1.1 augustss bw += sc->sc_bws[i * nslots + j];
2308 1.1 augustss if (bw < bestbw) {
2309 1.1 augustss best = i;
2310 1.1 augustss bestbw = bw;
2311 1.1 augustss }
2312 1.1 augustss }
2313 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2314 1.1 augustss best, slow, shigh, bestbw));
2315 1.1 augustss
2316 1.1 augustss s = splusb();
2317 1.1 augustss hsed = sc->sc_eds[best];
2318 1.1 augustss sed->next = hsed->next;
2319 1.1 augustss sed->ed->ed_nexted = hsed->ed->ed_nexted;
2320 1.1 augustss hsed->next = sed;
2321 1.16 augustss hsed->ed->ed_nexted = LE(sed->physaddr);
2322 1.1 augustss splx(s);
2323 1.1 augustss
2324 1.1 augustss for (j = 0; j < nslots; j++)
2325 1.1 augustss ++sc->sc_bws[best * nslots + j];
2326 1.1 augustss opipe->u.intr.nslots = nslots;
2327 1.1 augustss opipe->u.intr.pos = best;
2328 1.1 augustss
2329 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2330 1.1 augustss return (USBD_NORMAL_COMPLETION);
2331 1.1 augustss }
2332 1.1 augustss
2333