ohci.c revision 1.230 1 1.230 jmcneill /* $NetBSD: ohci.c,v 1.230 2013/01/13 01:10:59 jmcneill Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.224 mrg * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
9 1.224 mrg * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
10 1.224 mrg * and Matthew R. Green (mrg (at) eterna.com.au).
11 1.157 mycroft * This code is derived from software contributed to The NetBSD Foundation
12 1.157 mycroft * by Charles M. Hannum.
13 1.1 augustss *
14 1.1 augustss * Redistribution and use in source and binary forms, with or without
15 1.1 augustss * modification, are permitted provided that the following conditions
16 1.1 augustss * are met:
17 1.1 augustss * 1. Redistributions of source code must retain the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer.
19 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 augustss * notice, this list of conditions and the following disclaimer in the
21 1.1 augustss * documentation and/or other materials provided with the distribution.
22 1.1 augustss *
23 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /*
37 1.1 augustss * USB Open Host Controller driver.
38 1.1 augustss *
39 1.96 augustss * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
40 1.201 uebayasi * USB spec: http://www.usb.org/developers/docs/
41 1.1 augustss */
42 1.108 lukem
43 1.108 lukem #include <sys/cdefs.h>
44 1.230 jmcneill __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.230 2013/01/13 01:10:59 jmcneill Exp $");
45 1.1 augustss
46 1.1 augustss #include <sys/param.h>
47 1.1 augustss #include <sys/systm.h>
48 1.224 mrg #include <sys/kmem.h>
49 1.55 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/device.h>
51 1.55 augustss #include <sys/select.h>
52 1.1 augustss #include <sys/proc.h>
53 1.1 augustss #include <sys/queue.h>
54 1.223 mrg #include <sys/cpu.h>
55 1.1 augustss
56 1.16 augustss #include <machine/endian.h>
57 1.4 augustss
58 1.1 augustss #include <dev/usb/usb.h>
59 1.1 augustss #include <dev/usb/usbdi.h>
60 1.1 augustss #include <dev/usb/usbdivar.h>
61 1.38 augustss #include <dev/usb/usb_mem.h>
62 1.1 augustss #include <dev/usb/usb_quirks.h>
63 1.1 augustss
64 1.1 augustss #include <dev/usb/ohcireg.h>
65 1.1 augustss #include <dev/usb/ohcivar.h>
66 1.186 drochner #include <dev/usb/usbroothub_subr.h>
67 1.1 augustss
68 1.1 augustss
69 1.36 augustss
70 1.52 augustss #ifdef OHCI_DEBUG
71 1.209 dyoung #define DPRINTF(x) if (ohcidebug) printf x
72 1.209 dyoung #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x
73 1.52 augustss int ohcidebug = 0;
74 1.52 augustss #else
75 1.52 augustss #define DPRINTF(x)
76 1.52 augustss #define DPRINTFN(n,x)
77 1.52 augustss #endif
78 1.52 augustss
79 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
80 1.169 tron #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
81 1.16 augustss #else
82 1.169 tron #define SWAP_ENDIAN OHCI_BIG_ENDIAN
83 1.16 augustss #endif
84 1.16 augustss
85 1.169 tron #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
86 1.169 tron #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
87 1.169 tron #define HTOO16(val) O16TOH(val)
88 1.169 tron #define HTOO32(val) O32TOH(val)
89 1.168 augustss
90 1.1 augustss struct ohci_pipe;
91 1.1 augustss
92 1.91 augustss Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
93 1.91 augustss Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
94 1.1 augustss
95 1.91 augustss Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
96 1.91 augustss Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
97 1.1 augustss
98 1.91 augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
99 1.91 augustss Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
100 1.60 augustss
101 1.53 augustss #if 0
102 1.91 augustss Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
103 1.91 augustss ohci_soft_td_t *);
104 1.53 augustss #endif
105 1.91 augustss Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
106 1.77 augustss ohci_softc_t *, int, int, usbd_xfer_handle,
107 1.91 augustss ohci_soft_td_t *, ohci_soft_td_t **);
108 1.53 augustss
109 1.91 augustss Static usbd_status ohci_open(usbd_pipe_handle);
110 1.91 augustss Static void ohci_poll(struct usbd_bus *);
111 1.99 augustss Static void ohci_softintr(void *);
112 1.91 augustss Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
113 1.91 augustss Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
114 1.224 mrg Static void ohci_rhsc_softint(void *arg);
115 1.91 augustss
116 1.91 augustss Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
117 1.168 augustss Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
118 1.168 augustss ohci_soft_ed_t *);
119 1.168 augustss
120 1.224 mrg Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
121 1.224 mrg ohci_soft_ed_t *);
122 1.91 augustss Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
123 1.91 augustss Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
124 1.91 augustss Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
125 1.91 augustss Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
126 1.91 augustss Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
127 1.91 augustss Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
128 1.91 augustss
129 1.91 augustss Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
130 1.91 augustss Static void ohci_device_isoc_enter(usbd_xfer_handle);
131 1.91 augustss
132 1.91 augustss Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
133 1.91 augustss Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
134 1.91 augustss
135 1.91 augustss Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
136 1.91 augustss Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
137 1.224 mrg Static void ohci_get_lock(struct usbd_bus *, kmutex_t **);
138 1.91 augustss
139 1.91 augustss Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
140 1.91 augustss Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
141 1.91 augustss Static void ohci_root_ctrl_abort(usbd_xfer_handle);
142 1.91 augustss Static void ohci_root_ctrl_close(usbd_pipe_handle);
143 1.91 augustss Static void ohci_root_ctrl_done(usbd_xfer_handle);
144 1.91 augustss
145 1.91 augustss Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
146 1.91 augustss Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
147 1.91 augustss Static void ohci_root_intr_abort(usbd_xfer_handle);
148 1.91 augustss Static void ohci_root_intr_close(usbd_pipe_handle);
149 1.91 augustss Static void ohci_root_intr_done(usbd_xfer_handle);
150 1.91 augustss
151 1.91 augustss Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
152 1.91 augustss Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
153 1.91 augustss Static void ohci_device_ctrl_abort(usbd_xfer_handle);
154 1.91 augustss Static void ohci_device_ctrl_close(usbd_pipe_handle);
155 1.91 augustss Static void ohci_device_ctrl_done(usbd_xfer_handle);
156 1.91 augustss
157 1.91 augustss Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
158 1.91 augustss Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
159 1.91 augustss Static void ohci_device_bulk_abort(usbd_xfer_handle);
160 1.91 augustss Static void ohci_device_bulk_close(usbd_pipe_handle);
161 1.91 augustss Static void ohci_device_bulk_done(usbd_xfer_handle);
162 1.91 augustss
163 1.91 augustss Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
164 1.91 augustss Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
165 1.91 augustss Static void ohci_device_intr_abort(usbd_xfer_handle);
166 1.91 augustss Static void ohci_device_intr_close(usbd_pipe_handle);
167 1.91 augustss Static void ohci_device_intr_done(usbd_xfer_handle);
168 1.91 augustss
169 1.91 augustss Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
170 1.91 augustss Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
171 1.91 augustss Static void ohci_device_isoc_abort(usbd_xfer_handle);
172 1.91 augustss Static void ohci_device_isoc_close(usbd_pipe_handle);
173 1.91 augustss Static void ohci_device_isoc_done(usbd_xfer_handle);
174 1.91 augustss
175 1.120 augustss Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
176 1.91 augustss struct ohci_pipe *pipe, int ival);
177 1.91 augustss
178 1.91 augustss Static void ohci_timeout(void *);
179 1.114 augustss Static void ohci_timeout_task(void *);
180 1.104 augustss Static void ohci_rhsc_enable(void *);
181 1.91 augustss
182 1.91 augustss Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
183 1.91 augustss Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
184 1.53 augustss
185 1.91 augustss Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
186 1.91 augustss Static void ohci_noop(usbd_pipe_handle pipe);
187 1.37 augustss
188 1.52 augustss #ifdef OHCI_DEBUG
189 1.91 augustss Static void ohci_dumpregs(ohci_softc_t *);
190 1.168 augustss Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
191 1.168 augustss Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
192 1.168 augustss Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
193 1.168 augustss Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
194 1.168 augustss Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
195 1.1 augustss #endif
196 1.1 augustss
197 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
198 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
199 1.88 augustss #define OWRITE1(sc, r, x) \
200 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
201 1.88 augustss #define OWRITE2(sc, r, x) \
202 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
203 1.88 augustss #define OWRITE4(sc, r, x) \
204 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
205 1.174 mrg static __inline uint8_t
206 1.174 mrg OREAD1(ohci_softc_t *sc, bus_size_t r)
207 1.174 mrg {
208 1.174 mrg
209 1.174 mrg OBARR(sc);
210 1.174 mrg return bus_space_read_1(sc->iot, sc->ioh, r);
211 1.174 mrg }
212 1.174 mrg
213 1.174 mrg static __inline uint16_t
214 1.174 mrg OREAD2(ohci_softc_t *sc, bus_size_t r)
215 1.174 mrg {
216 1.174 mrg
217 1.174 mrg OBARR(sc);
218 1.174 mrg return bus_space_read_2(sc->iot, sc->ioh, r);
219 1.174 mrg }
220 1.174 mrg
221 1.174 mrg static __inline uint32_t
222 1.174 mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
223 1.174 mrg {
224 1.174 mrg
225 1.174 mrg OBARR(sc);
226 1.174 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
227 1.174 mrg }
228 1.1 augustss
229 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
230 1.120 augustss Static u_int8_t revbits[OHCI_NO_INTRS] =
231 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
232 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
233 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
234 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
235 1.1 augustss
236 1.1 augustss struct ohci_pipe {
237 1.1 augustss struct usbd_pipe pipe;
238 1.1 augustss ohci_soft_ed_t *sed;
239 1.60 augustss union {
240 1.60 augustss ohci_soft_td_t *td;
241 1.60 augustss ohci_soft_itd_t *itd;
242 1.60 augustss } tail;
243 1.1 augustss /* Info needed for different pipe kinds. */
244 1.1 augustss union {
245 1.1 augustss /* Control pipe */
246 1.1 augustss struct {
247 1.4 augustss usb_dma_t reqdma;
248 1.1 augustss u_int length;
249 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
250 1.1 augustss } ctl;
251 1.1 augustss /* Interrupt pipe */
252 1.1 augustss struct {
253 1.1 augustss int nslots;
254 1.1 augustss int pos;
255 1.1 augustss } intr;
256 1.3 augustss /* Bulk pipe */
257 1.3 augustss struct {
258 1.3 augustss u_int length;
259 1.32 augustss int isread;
260 1.3 augustss } bulk;
261 1.43 augustss /* Iso pipe */
262 1.43 augustss struct iso {
263 1.60 augustss int next, inuse;
264 1.43 augustss } iso;
265 1.1 augustss } u;
266 1.1 augustss };
267 1.1 augustss
268 1.1 augustss #define OHCI_INTR_ENDPT 1
269 1.1 augustss
270 1.182 drochner Static const struct usbd_bus_methods ohci_bus_methods = {
271 1.221 mrg .open_pipe = ohci_open,
272 1.221 mrg .soft_intr = ohci_softintr,
273 1.221 mrg .do_poll = ohci_poll,
274 1.221 mrg .allocm = ohci_allocm,
275 1.221 mrg .freem = ohci_freem,
276 1.221 mrg .allocx = ohci_allocx,
277 1.221 mrg .freex = ohci_freex,
278 1.224 mrg .get_lock = ohci_get_lock,
279 1.42 augustss };
280 1.42 augustss
281 1.182 drochner Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
282 1.221 mrg .transfer = ohci_root_ctrl_transfer,
283 1.221 mrg .start = ohci_root_ctrl_start,
284 1.221 mrg .abort = ohci_root_ctrl_abort,
285 1.221 mrg .close = ohci_root_ctrl_close,
286 1.221 mrg .cleartoggle = ohci_noop,
287 1.221 mrg .done = ohci_root_ctrl_done,
288 1.1 augustss };
289 1.1 augustss
290 1.182 drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
291 1.221 mrg .transfer = ohci_root_intr_transfer,
292 1.221 mrg .start = ohci_root_intr_start,
293 1.221 mrg .abort = ohci_root_intr_abort,
294 1.221 mrg .close = ohci_root_intr_close,
295 1.221 mrg .cleartoggle = ohci_noop,
296 1.221 mrg .done = ohci_root_intr_done,
297 1.1 augustss };
298 1.1 augustss
299 1.182 drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
300 1.221 mrg .transfer = ohci_device_ctrl_transfer,
301 1.221 mrg .start = ohci_device_ctrl_start,
302 1.221 mrg .abort = ohci_device_ctrl_abort,
303 1.221 mrg .close = ohci_device_ctrl_close,
304 1.221 mrg .cleartoggle = ohci_noop,
305 1.221 mrg .done = ohci_device_ctrl_done,
306 1.1 augustss };
307 1.1 augustss
308 1.182 drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
309 1.221 mrg .transfer = ohci_device_intr_transfer,
310 1.221 mrg .start = ohci_device_intr_start,
311 1.221 mrg .abort = ohci_device_intr_abort,
312 1.221 mrg .close = ohci_device_intr_close,
313 1.221 mrg .cleartoggle = ohci_device_clear_toggle,
314 1.221 mrg .done = ohci_device_intr_done,
315 1.1 augustss };
316 1.1 augustss
317 1.182 drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
318 1.221 mrg .transfer = ohci_device_bulk_transfer,
319 1.221 mrg .start = ohci_device_bulk_start,
320 1.221 mrg .abort = ohci_device_bulk_abort,
321 1.221 mrg .close = ohci_device_bulk_close,
322 1.221 mrg .cleartoggle = ohci_device_clear_toggle,
323 1.221 mrg .done = ohci_device_bulk_done,
324 1.3 augustss };
325 1.3 augustss
326 1.182 drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
327 1.221 mrg .transfer = ohci_device_isoc_transfer,
328 1.221 mrg .start = ohci_device_isoc_start,
329 1.221 mrg .abort = ohci_device_isoc_abort,
330 1.221 mrg .close = ohci_device_isoc_close,
331 1.221 mrg .cleartoggle = ohci_noop,
332 1.221 mrg .done = ohci_device_isoc_done,
333 1.43 augustss };
334 1.43 augustss
335 1.47 augustss int
336 1.189 dyoung ohci_activate(device_t self, enum devact act)
337 1.47 augustss {
338 1.189 dyoung struct ohci_softc *sc = device_private(self);
339 1.47 augustss
340 1.47 augustss switch (act) {
341 1.47 augustss case DVACT_DEACTIVATE:
342 1.183 kiyohara sc->sc_dying = 1;
343 1.203 dyoung return 0;
344 1.203 dyoung default:
345 1.203 dyoung return EOPNOTSUPP;
346 1.47 augustss }
347 1.47 augustss }
348 1.47 augustss
349 1.187 dyoung void
350 1.187 dyoung ohci_childdet(device_t self, device_t child)
351 1.187 dyoung {
352 1.187 dyoung struct ohci_softc *sc = device_private(self);
353 1.187 dyoung
354 1.187 dyoung KASSERT(sc->sc_child == child);
355 1.187 dyoung sc->sc_child = NULL;
356 1.187 dyoung }
357 1.187 dyoung
358 1.47 augustss int
359 1.91 augustss ohci_detach(struct ohci_softc *sc, int flags)
360 1.47 augustss {
361 1.47 augustss int rv = 0;
362 1.196 drochner usbd_xfer_handle xfer;
363 1.47 augustss
364 1.47 augustss if (sc->sc_child != NULL)
365 1.47 augustss rv = config_detach(sc->sc_child, flags);
366 1.120 augustss
367 1.47 augustss if (rv != 0)
368 1.47 augustss return (rv);
369 1.47 augustss
370 1.209 dyoung callout_stop(&sc->sc_tmo_rhsc);
371 1.104 augustss
372 1.116 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
373 1.209 dyoung callout_destroy(&sc->sc_tmo_rhsc);
374 1.116 augustss
375 1.224 mrg softint_disestablish(sc->sc_rhsc_si);
376 1.224 mrg
377 1.224 mrg cv_destroy(&sc->sc_softwake_cv);
378 1.224 mrg
379 1.224 mrg mutex_destroy(&sc->sc_lock);
380 1.224 mrg mutex_destroy(&sc->sc_intr_lock);
381 1.224 mrg
382 1.198 cegger if (sc->sc_hcca != NULL)
383 1.198 cegger usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
384 1.196 drochner while((xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers)) != NULL) {
385 1.196 drochner SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
386 1.224 mrg kmem_free(xfer, sizeof(struct ohci_xfer));
387 1.196 drochner }
388 1.47 augustss
389 1.47 augustss return (rv);
390 1.47 augustss }
391 1.47 augustss
392 1.1 augustss ohci_soft_ed_t *
393 1.91 augustss ohci_alloc_sed(ohci_softc_t *sc)
394 1.1 augustss {
395 1.1 augustss ohci_soft_ed_t *sed;
396 1.53 augustss usbd_status err;
397 1.1 augustss int i, offs;
398 1.4 augustss usb_dma_t dma;
399 1.1 augustss
400 1.53 augustss if (sc->sc_freeeds == NULL) {
401 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
402 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
403 1.53 augustss OHCI_ED_ALIGN, &dma);
404 1.53 augustss if (err)
405 1.39 augustss return (0);
406 1.225 skrll for (i = 0; i < OHCI_SED_CHUNK; i++) {
407 1.39 augustss offs = i * OHCI_SED_SIZE;
408 1.123 augustss sed = KERNADDR(&dma, offs);
409 1.125 augustss sed->physaddr = DMAADDR(&dma, offs);
410 1.195 bouyer sed->dma = dma;
411 1.195 bouyer sed->offs = offs;
412 1.1 augustss sed->next = sc->sc_freeeds;
413 1.1 augustss sc->sc_freeeds = sed;
414 1.1 augustss }
415 1.1 augustss }
416 1.1 augustss sed = sc->sc_freeeds;
417 1.1 augustss sc->sc_freeeds = sed->next;
418 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
419 1.1 augustss sed->next = 0;
420 1.39 augustss return (sed);
421 1.1 augustss }
422 1.1 augustss
423 1.1 augustss void
424 1.91 augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
425 1.1 augustss {
426 1.1 augustss sed->next = sc->sc_freeeds;
427 1.1 augustss sc->sc_freeeds = sed;
428 1.1 augustss }
429 1.1 augustss
430 1.1 augustss ohci_soft_td_t *
431 1.91 augustss ohci_alloc_std(ohci_softc_t *sc)
432 1.1 augustss {
433 1.1 augustss ohci_soft_td_t *std;
434 1.53 augustss usbd_status err;
435 1.1 augustss int i, offs;
436 1.4 augustss usb_dma_t dma;
437 1.1 augustss
438 1.53 augustss if (sc->sc_freetds == NULL) {
439 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
440 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
441 1.53 augustss OHCI_TD_ALIGN, &dma);
442 1.53 augustss if (err)
443 1.83 augustss return (NULL);
444 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
445 1.39 augustss offs = i * OHCI_STD_SIZE;
446 1.123 augustss std = KERNADDR(&dma, offs);
447 1.125 augustss std->physaddr = DMAADDR(&dma, offs);
448 1.195 bouyer std->dma = dma;
449 1.195 bouyer std->offs = offs;
450 1.1 augustss std->nexttd = sc->sc_freetds;
451 1.1 augustss sc->sc_freetds = std;
452 1.1 augustss }
453 1.1 augustss }
454 1.69 augustss
455 1.1 augustss std = sc->sc_freetds;
456 1.1 augustss sc->sc_freetds = std->nexttd;
457 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
458 1.83 augustss std->nexttd = NULL;
459 1.83 augustss std->xfer = NULL;
460 1.69 augustss ohci_hash_add_td(sc, std);
461 1.69 augustss
462 1.1 augustss return (std);
463 1.1 augustss }
464 1.1 augustss
465 1.1 augustss void
466 1.91 augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
467 1.1 augustss {
468 1.69 augustss
469 1.69 augustss ohci_hash_rem_td(sc, std);
470 1.1 augustss std->nexttd = sc->sc_freetds;
471 1.1 augustss sc->sc_freetds = std;
472 1.1 augustss }
473 1.1 augustss
474 1.1 augustss usbd_status
475 1.91 augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
476 1.91 augustss int alen, int rd, usbd_xfer_handle xfer,
477 1.91 augustss ohci_soft_td_t *sp, ohci_soft_td_t **ep)
478 1.48 augustss {
479 1.48 augustss ohci_soft_td_t *next, *cur;
480 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
481 1.77 augustss u_int32_t tdflags;
482 1.75 augustss int len, curlen;
483 1.77 augustss usb_dma_t *dma = &xfer->dmabuf;
484 1.77 augustss u_int16_t flags = xfer->flags;
485 1.48 augustss
486 1.75 augustss DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
487 1.75 augustss
488 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
489 1.224 mrg
490 1.75 augustss len = alen;
491 1.48 augustss cur = sp;
492 1.125 augustss dataphys = DMAADDR(dma, 0);
493 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
494 1.195 bouyer usb_syncmem(dma, 0, len,
495 1.195 bouyer rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
496 1.168 augustss tdflags = HTOO32(
497 1.120 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
498 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
499 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
500 1.61 augustss
501 1.48 augustss for (;;) {
502 1.48 augustss next = ohci_alloc_std(sc);
503 1.75 augustss if (next == NULL)
504 1.61 augustss goto nomem;
505 1.48 augustss
506 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
507 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
508 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
509 1.48 augustss /* we can handle it in this TD */
510 1.48 augustss curlen = len;
511 1.48 augustss } else {
512 1.48 augustss /* must use multiple TDs, fill as much as possible. */
513 1.120 augustss curlen = 2 * OHCI_PAGE_SIZE -
514 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
515 1.78 augustss /* the length must be a multiple of the max size */
516 1.78 augustss curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
517 1.78 augustss #ifdef DIAGNOSTIC
518 1.78 augustss if (curlen == 0)
519 1.128 provos panic("ohci_alloc_std: curlen == 0");
520 1.78 augustss #endif
521 1.48 augustss }
522 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
523 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
524 1.48 augustss dataphys, dataphysend,
525 1.48 augustss len, curlen));
526 1.48 augustss len -= curlen;
527 1.48 augustss
528 1.77 augustss cur->td.td_flags = tdflags;
529 1.168 augustss cur->td.td_cbp = HTOO32(dataphys);
530 1.48 augustss cur->nexttd = next;
531 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
532 1.168 augustss cur->td.td_be = HTOO32(dataphys + curlen - 1);
533 1.48 augustss cur->len = curlen;
534 1.48 augustss cur->flags = OHCI_ADD_LEN;
535 1.77 augustss cur->xfer = xfer;
536 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
537 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
538 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
539 1.48 augustss dataphys, dataphys + curlen - 1));
540 1.48 augustss if (len == 0)
541 1.48 augustss break;
542 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
543 1.48 augustss dataphys += curlen;
544 1.48 augustss cur = next;
545 1.48 augustss }
546 1.164 augustss if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
547 1.75 augustss alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
548 1.61 augustss /* Force a 0 length transfer at the end. */
549 1.75 augustss
550 1.75 augustss cur = next;
551 1.61 augustss next = ohci_alloc_std(sc);
552 1.75 augustss if (next == NULL)
553 1.61 augustss goto nomem;
554 1.61 augustss
555 1.77 augustss cur->td.td_flags = tdflags;
556 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
557 1.61 augustss cur->nexttd = next;
558 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
559 1.75 augustss cur->td.td_be = ~0;
560 1.61 augustss cur->len = 0;
561 1.61 augustss cur->flags = 0;
562 1.77 augustss cur->xfer = xfer;
563 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
564 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
565 1.61 augustss DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
566 1.61 augustss }
567 1.77 augustss *ep = cur;
568 1.48 augustss
569 1.48 augustss return (USBD_NORMAL_COMPLETION);
570 1.61 augustss
571 1.61 augustss nomem:
572 1.61 augustss /* XXX free chain */
573 1.61 augustss return (USBD_NOMEM);
574 1.48 augustss }
575 1.48 augustss
576 1.53 augustss #if 0
577 1.82 augustss Static void
578 1.120 augustss ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
579 1.91 augustss ohci_soft_td_t *stdend)
580 1.48 augustss {
581 1.48 augustss ohci_soft_td_t *p;
582 1.48 augustss
583 1.48 augustss for (; std != stdend; std = p) {
584 1.48 augustss p = std->nexttd;
585 1.48 augustss ohci_free_std(sc, std);
586 1.48 augustss }
587 1.48 augustss }
588 1.53 augustss #endif
589 1.48 augustss
590 1.60 augustss ohci_soft_itd_t *
591 1.91 augustss ohci_alloc_sitd(ohci_softc_t *sc)
592 1.60 augustss {
593 1.60 augustss ohci_soft_itd_t *sitd;
594 1.60 augustss usbd_status err;
595 1.224 mrg int i, offs;
596 1.60 augustss usb_dma_t dma;
597 1.60 augustss
598 1.60 augustss if (sc->sc_freeitds == NULL) {
599 1.60 augustss DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
600 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
601 1.83 augustss OHCI_ITD_ALIGN, &dma);
602 1.60 augustss if (err)
603 1.83 augustss return (NULL);
604 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
605 1.83 augustss offs = i * OHCI_SITD_SIZE;
606 1.123 augustss sitd = KERNADDR(&dma, offs);
607 1.125 augustss sitd->physaddr = DMAADDR(&dma, offs);
608 1.195 bouyer sitd->dma = dma;
609 1.195 bouyer sitd->offs = offs;
610 1.60 augustss sitd->nextitd = sc->sc_freeitds;
611 1.60 augustss sc->sc_freeitds = sitd;
612 1.60 augustss }
613 1.60 augustss }
614 1.83 augustss
615 1.60 augustss sitd = sc->sc_freeitds;
616 1.60 augustss sc->sc_freeitds = sitd->nextitd;
617 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
618 1.83 augustss sitd->nextitd = NULL;
619 1.83 augustss sitd->xfer = NULL;
620 1.83 augustss ohci_hash_add_itd(sc, sitd);
621 1.83 augustss
622 1.83 augustss #ifdef DIAGNOSTIC
623 1.83 augustss sitd->isdone = 0;
624 1.83 augustss #endif
625 1.83 augustss
626 1.60 augustss return (sitd);
627 1.60 augustss }
628 1.60 augustss
629 1.60 augustss void
630 1.91 augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
631 1.60 augustss {
632 1.83 augustss
633 1.83 augustss DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
634 1.83 augustss
635 1.83 augustss #ifdef DIAGNOSTIC
636 1.83 augustss if (!sitd->isdone) {
637 1.128 provos panic("ohci_free_sitd: sitd=%p not done", sitd);
638 1.83 augustss return;
639 1.83 augustss }
640 1.134 toshii /* Warn double free */
641 1.134 toshii sitd->isdone = 0;
642 1.83 augustss #endif
643 1.83 augustss
644 1.83 augustss ohci_hash_rem_itd(sc, sitd);
645 1.60 augustss sitd->nextitd = sc->sc_freeitds;
646 1.60 augustss sc->sc_freeitds = sitd;
647 1.60 augustss }
648 1.60 augustss
649 1.48 augustss usbd_status
650 1.91 augustss ohci_init(ohci_softc_t *sc)
651 1.1 augustss {
652 1.1 augustss ohci_soft_ed_t *sed, *psed;
653 1.53 augustss usbd_status err;
654 1.1 augustss int i;
655 1.161 augustss u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
656 1.16 augustss
657 1.1 augustss DPRINTF(("ohci_init: start\n"));
658 1.199 jmcneill aprint_normal_dev(sc->sc_dev, "");
659 1.199 jmcneill
660 1.198 cegger sc->sc_hcca = NULL;
661 1.224 mrg callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
662 1.224 mrg
663 1.224 mrg mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
664 1.224 mrg mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
665 1.224 mrg cv_init(&sc->sc_softwake_cv, "ohciab");
666 1.224 mrg
667 1.224 mrg sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
668 1.224 mrg ohci_rhsc_softint, sc);
669 1.198 cegger
670 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
671 1.198 cegger LIST_INIT(&sc->sc_hash_tds[i]);
672 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
673 1.198 cegger LIST_INIT(&sc->sc_hash_itds[i]);
674 1.198 cegger
675 1.198 cegger SIMPLEQ_INIT(&sc->sc_free_xfers);
676 1.198 cegger
677 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
678 1.200 enami aprint_normal("OHCI version %d.%d%s\n",
679 1.199 jmcneill OHCI_REV_HI(rev), OHCI_REV_LO(rev),
680 1.199 jmcneill OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
681 1.55 augustss
682 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
683 1.199 jmcneill aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
684 1.56 augustss sc->sc_bus.usbrev = USBREV_UNKNOWN;
685 1.1 augustss return (USBD_INVAL);
686 1.1 augustss }
687 1.56 augustss sc->sc_bus.usbrev = USBREV_1_0;
688 1.1 augustss
689 1.193 drochner usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
690 1.153 fvdl USB_MEM_RESERVE);
691 1.153 fvdl
692 1.73 augustss /* XXX determine alignment by R/W */
693 1.1 augustss /* Allocate the HCCA area. */
694 1.120 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
695 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
696 1.198 cegger if (err) {
697 1.198 cegger sc->sc_hcca = NULL;
698 1.198 cegger return err;
699 1.198 cegger }
700 1.123 augustss sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
701 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
702 1.1 augustss
703 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
704 1.1 augustss
705 1.60 augustss /* Allocate dummy ED that starts the control list. */
706 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
707 1.53 augustss if (sc->sc_ctrl_head == NULL) {
708 1.53 augustss err = USBD_NOMEM;
709 1.1 augustss goto bad1;
710 1.1 augustss }
711 1.168 augustss sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
712 1.34 augustss
713 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
714 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
715 1.53 augustss if (sc->sc_bulk_head == NULL) {
716 1.53 augustss err = USBD_NOMEM;
717 1.1 augustss goto bad2;
718 1.1 augustss }
719 1.168 augustss sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
720 1.195 bouyer usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
721 1.195 bouyer sizeof(sc->sc_bulk_head->ed),
722 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
723 1.1 augustss
724 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
725 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
726 1.60 augustss if (sc->sc_isoc_head == NULL) {
727 1.60 augustss err = USBD_NOMEM;
728 1.60 augustss goto bad3;
729 1.60 augustss }
730 1.168 augustss sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
731 1.195 bouyer usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
732 1.195 bouyer sizeof(sc->sc_isoc_head->ed),
733 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
734 1.60 augustss
735 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
736 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
737 1.1 augustss sed = ohci_alloc_sed(sc);
738 1.53 augustss if (sed == NULL) {
739 1.1 augustss while (--i >= 0)
740 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
741 1.53 augustss err = USBD_NOMEM;
742 1.60 augustss goto bad4;
743 1.1 augustss }
744 1.1 augustss /* All ED fields are set to 0. */
745 1.1 augustss sc->sc_eds[i] = sed;
746 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
747 1.60 augustss if (i != 0)
748 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
749 1.60 augustss else
750 1.60 augustss psed= sc->sc_isoc_head;
751 1.60 augustss sed->next = psed;
752 1.168 augustss sed->ed.ed_nexted = HTOO32(psed->physaddr);
753 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
754 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
755 1.1 augustss }
756 1.120 augustss /*
757 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
758 1.1 augustss * the tree set up properly to spread the interrupts.
759 1.1 augustss */
760 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
761 1.120 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
762 1.168 augustss HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
763 1.195 bouyer usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
764 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
765 1.1 augustss
766 1.73 augustss #ifdef OHCI_DEBUG
767 1.73 augustss if (ohcidebug > 15) {
768 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
769 1.73 augustss printf("ed#%d ", i);
770 1.168 augustss ohci_dump_ed(sc, sc->sc_eds[i]);
771 1.73 augustss }
772 1.73 augustss printf("iso ");
773 1.168 augustss ohci_dump_ed(sc, sc->sc_isoc_head);
774 1.73 augustss }
775 1.73 augustss #endif
776 1.73 augustss
777 1.161 augustss /* Preserve values programmed by SMM/BIOS but lost over reset. */
778 1.161 augustss ctl = OREAD4(sc, OHCI_CONTROL);
779 1.161 augustss rwc = ctl & OHCI_RWC;
780 1.161 augustss fm = OREAD4(sc, OHCI_FM_INTERVAL);
781 1.161 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
782 1.161 augustss descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
783 1.161 augustss
784 1.1 augustss /* Determine in what context we are running. */
785 1.1 augustss if (ctl & OHCI_IR) {
786 1.1 augustss /* SMM active, request change */
787 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
788 1.160 augustss if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
789 1.160 augustss (OHCI_OC | OHCI_MIE))
790 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
791 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
792 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
793 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
794 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
795 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
796 1.1 augustss }
797 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
798 1.1 augustss if ((ctl & OHCI_IR) == 0) {
799 1.199 jmcneill aprint_error_dev(sc->sc_dev,
800 1.199 jmcneill "SMM does not respond, resetting\n");
801 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
802 1.1 augustss goto reset;
803 1.1 augustss }
804 1.103 augustss #if 0
805 1.103 augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
806 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
807 1.1 augustss /* BIOS started controller. */
808 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
809 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
810 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
811 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
812 1.1 augustss }
813 1.103 augustss #endif
814 1.1 augustss } else {
815 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
816 1.1 augustss reset:
817 1.1 augustss /* Controller was cold started. */
818 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
819 1.1 augustss }
820 1.1 augustss
821 1.16 augustss /*
822 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
823 1.25 augustss * without it some controllers do not start.
824 1.16 augustss */
825 1.190 drochner DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
826 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
827 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
828 1.16 augustss
829 1.1 augustss /* We now own the host controller and the bus has been reset. */
830 1.1 augustss
831 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
832 1.1 augustss /* Nominal time for a reset is 10 us. */
833 1.1 augustss for (i = 0; i < 10; i++) {
834 1.1 augustss delay(10);
835 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
836 1.1 augustss if (!hcr)
837 1.1 augustss break;
838 1.1 augustss }
839 1.1 augustss if (hcr) {
840 1.199 jmcneill aprint_error_dev(sc->sc_dev, "reset timeout\n");
841 1.53 augustss err = USBD_IOERROR;
842 1.60 augustss goto bad5;
843 1.1 augustss }
844 1.52 augustss #ifdef OHCI_DEBUG
845 1.1 augustss if (ohcidebug > 15)
846 1.1 augustss ohci_dumpregs(sc);
847 1.1 augustss #endif
848 1.1 augustss
849 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
850 1.1 augustss
851 1.1 augustss /* Set up HC registers. */
852 1.125 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
853 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
854 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
855 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
856 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
857 1.55 augustss /* switch on desired functional features */
858 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
859 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
860 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
861 1.161 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
862 1.1 augustss /* And finally start it! */
863 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
864 1.1 augustss
865 1.1 augustss /*
866 1.1 augustss * The controller is now OPERATIONAL. Set a some final
867 1.1 augustss * registers that should be set earlier, but that the
868 1.1 augustss * controller ignores when in the SUSPEND state.
869 1.1 augustss */
870 1.161 augustss ival = OHCI_GET_IVAL(fm);
871 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
872 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
873 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
874 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
875 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
876 1.1 augustss
877 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
878 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
879 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
880 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
881 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
882 1.1 augustss
883 1.85 augustss /*
884 1.85 augustss * The AMD756 requires a delay before re-reading the register,
885 1.85 augustss * otherwise it will occasionally report 0 ports.
886 1.85 augustss */
887 1.145 augustss sc->sc_noport = 0;
888 1.145 augustss for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
889 1.145 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
890 1.145 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
891 1.145 augustss }
892 1.1 augustss
893 1.52 augustss #ifdef OHCI_DEBUG
894 1.1 augustss if (ohcidebug > 5)
895 1.1 augustss ohci_dumpregs(sc);
896 1.1 augustss #endif
897 1.120 augustss
898 1.1 augustss /* Set up the bus struct. */
899 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
900 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
901 1.1 augustss
902 1.101 minoura sc->sc_control = sc->sc_intre = 0;
903 1.59 augustss
904 1.167 augustss /* Finally, turn on interrupts. */
905 1.211 matt DPRINTFN(1,("ohci_init: enabling %#x\n", sc->sc_eintrs | OHCI_MIE));
906 1.167 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
907 1.167 augustss
908 1.1 augustss return (USBD_NORMAL_COMPLETION);
909 1.1 augustss
910 1.60 augustss bad5:
911 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
912 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
913 1.60 augustss bad4:
914 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
915 1.1 augustss bad3:
916 1.144 augustss ohci_free_sed(sc, sc->sc_bulk_head);
917 1.144 augustss bad2:
918 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
919 1.1 augustss bad1:
920 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
921 1.198 cegger sc->sc_hcca = NULL;
922 1.53 augustss return (err);
923 1.1 augustss }
924 1.1 augustss
925 1.42 augustss usbd_status
926 1.91 augustss ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
927 1.42 augustss {
928 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
929 1.153 fvdl usbd_status status;
930 1.42 augustss
931 1.153 fvdl status = usb_allocmem(&sc->sc_bus, size, 0, dma);
932 1.153 fvdl if (status == USBD_NOMEM)
933 1.153 fvdl status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
934 1.153 fvdl return status;
935 1.42 augustss }
936 1.42 augustss
937 1.42 augustss void
938 1.91 augustss ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
939 1.42 augustss {
940 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
941 1.153 fvdl if (dma->block->flags & USB_DMA_RESERVE) {
942 1.191 nakayama usb_reserve_freem(&sc->sc_dma_reserve, dma);
943 1.153 fvdl return;
944 1.153 fvdl }
945 1.44 augustss usb_freemem(&sc->sc_bus, dma);
946 1.62 augustss }
947 1.62 augustss
948 1.62 augustss usbd_xfer_handle
949 1.91 augustss ohci_allocx(struct usbd_bus *bus)
950 1.62 augustss {
951 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
952 1.62 augustss usbd_xfer_handle xfer;
953 1.62 augustss
954 1.62 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
955 1.118 augustss if (xfer != NULL) {
956 1.126 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, next);
957 1.118 augustss #ifdef DIAGNOSTIC
958 1.118 augustss if (xfer->busy_free != XFER_FREE) {
959 1.118 augustss printf("ohci_allocx: xfer=%p not free, 0x%08x\n", xfer,
960 1.118 augustss xfer->busy_free);
961 1.118 augustss }
962 1.118 augustss #endif
963 1.118 augustss } else {
964 1.224 mrg xfer = kmem_alloc(sizeof(struct ohci_xfer), KM_SLEEP);
965 1.118 augustss }
966 1.118 augustss if (xfer != NULL) {
967 1.215 tsutsui memset(xfer, 0, sizeof (struct ohci_xfer));
968 1.118 augustss #ifdef DIAGNOSTIC
969 1.118 augustss xfer->busy_free = XFER_BUSY;
970 1.118 augustss #endif
971 1.118 augustss }
972 1.62 augustss return (xfer);
973 1.62 augustss }
974 1.62 augustss
975 1.62 augustss void
976 1.91 augustss ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
977 1.62 augustss {
978 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
979 1.62 augustss
980 1.118 augustss #ifdef DIAGNOSTIC
981 1.118 augustss if (xfer->busy_free != XFER_BUSY) {
982 1.118 augustss printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
983 1.118 augustss xfer->busy_free);
984 1.118 augustss }
985 1.118 augustss xfer->busy_free = XFER_FREE;
986 1.118 augustss #endif
987 1.62 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
988 1.42 augustss }
989 1.42 augustss
990 1.224 mrg Static void
991 1.224 mrg ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
992 1.224 mrg {
993 1.224 mrg struct ohci_softc *sc = bus->hci_private;
994 1.224 mrg
995 1.224 mrg *lock = &sc->sc_lock;
996 1.224 mrg }
997 1.224 mrg
998 1.59 augustss /*
999 1.59 augustss * Shut down the controller when the system is going down.
1000 1.59 augustss */
1001 1.188 dyoung bool
1002 1.188 dyoung ohci_shutdown(device_t self, int flags)
1003 1.59 augustss {
1004 1.188 dyoung ohci_softc_t *sc = device_private(self);
1005 1.59 augustss
1006 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
1007 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1008 1.188 dyoung return true;
1009 1.59 augustss }
1010 1.59 augustss
1011 1.185 jmcneill bool
1012 1.206 dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
1013 1.33 augustss {
1014 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1015 1.185 jmcneill uint32_t ctl;
1016 1.33 augustss
1017 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1018 1.185 jmcneill sc->sc_bus.use_polling++;
1019 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1020 1.224 mrg
1021 1.185 jmcneill /* Some broken BIOSes do not recover these values */
1022 1.185 jmcneill OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1023 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1024 1.185 jmcneill sc->sc_ctrl_head->physaddr);
1025 1.185 jmcneill OWRITE4(sc, OHCI_BULK_HEAD_ED,
1026 1.185 jmcneill sc->sc_bulk_head->physaddr);
1027 1.185 jmcneill if (sc->sc_intre)
1028 1.185 jmcneill OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1029 1.185 jmcneill (OHCI_ALL_INTRS | OHCI_MIE));
1030 1.185 jmcneill if (sc->sc_control)
1031 1.185 jmcneill ctl = sc->sc_control;
1032 1.185 jmcneill else
1033 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL);
1034 1.185 jmcneill ctl |= OHCI_HCFS_RESUME;
1035 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1036 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1037 1.185 jmcneill ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1038 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1039 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1040 1.185 jmcneill sc->sc_control = sc->sc_intre = 0;
1041 1.224 mrg
1042 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1043 1.185 jmcneill sc->sc_bus.use_polling--;
1044 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1045 1.185 jmcneill
1046 1.185 jmcneill return true;
1047 1.185 jmcneill }
1048 1.185 jmcneill
1049 1.185 jmcneill bool
1050 1.206 dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
1051 1.185 jmcneill {
1052 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1053 1.185 jmcneill uint32_t ctl;
1054 1.95 augustss
1055 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1056 1.185 jmcneill sc->sc_bus.use_polling++;
1057 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1058 1.224 mrg
1059 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1060 1.185 jmcneill if (sc->sc_control == 0) {
1061 1.185 jmcneill /*
1062 1.185 jmcneill * Preserve register values, in case that BIOS
1063 1.185 jmcneill * does not recover them.
1064 1.185 jmcneill */
1065 1.185 jmcneill sc->sc_control = ctl;
1066 1.185 jmcneill sc->sc_intre = OREAD4(sc,
1067 1.185 jmcneill OHCI_INTERRUPT_ENABLE);
1068 1.95 augustss }
1069 1.185 jmcneill ctl |= OHCI_HCFS_SUSPEND;
1070 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1071 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1072 1.224 mrg
1073 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1074 1.185 jmcneill sc->sc_bus.use_polling--;
1075 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1076 1.185 jmcneill
1077 1.185 jmcneill return true;
1078 1.33 augustss }
1079 1.33 augustss
1080 1.52 augustss #ifdef OHCI_DEBUG
1081 1.1 augustss void
1082 1.91 augustss ohci_dumpregs(ohci_softc_t *sc)
1083 1.1 augustss {
1084 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1085 1.41 augustss OREAD4(sc, OHCI_REVISION),
1086 1.41 augustss OREAD4(sc, OHCI_CONTROL),
1087 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1088 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1089 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
1090 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1091 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1092 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1093 1.41 augustss OREAD4(sc, OHCI_HCCA),
1094 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1095 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1096 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1097 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1098 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1099 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1100 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1101 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1102 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1103 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
1104 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1105 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1106 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1107 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
1108 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1109 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1110 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1111 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
1112 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
1113 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1114 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1115 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1116 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number),
1117 1.168 augustss O32TOH(sc->sc_hcca->hcca_done_head)));
1118 1.1 augustss }
1119 1.1 augustss #endif
1120 1.1 augustss
1121 1.91 augustss Static int ohci_intr1(ohci_softc_t *);
1122 1.53 augustss
1123 1.1 augustss int
1124 1.91 augustss ohci_intr(void *p)
1125 1.1 augustss {
1126 1.1 augustss ohci_softc_t *sc = p;
1127 1.224 mrg int ret = 0;
1128 1.111 augustss
1129 1.224 mrg if (sc == NULL)
1130 1.111 augustss return (0);
1131 1.53 augustss
1132 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1133 1.224 mrg
1134 1.224 mrg if (sc->sc_dying || !device_has_power(sc->sc_dev))
1135 1.224 mrg goto done;
1136 1.224 mrg
1137 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
1138 1.57 augustss if (sc->sc_bus.use_polling) {
1139 1.57 augustss #ifdef DIAGNOSTIC
1140 1.149 mycroft DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1141 1.57 augustss #endif
1142 1.154 joff /* for level triggered intrs, should do something to ack */
1143 1.155 perry OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1144 1.154 joff OREAD4(sc, OHCI_INTERRUPT_STATUS));
1145 1.155 perry
1146 1.224 mrg goto done;
1147 1.57 augustss }
1148 1.53 augustss
1149 1.224 mrg ret = ohci_intr1(sc);
1150 1.224 mrg
1151 1.224 mrg done:
1152 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1153 1.224 mrg return ret;
1154 1.53 augustss }
1155 1.53 augustss
1156 1.82 augustss Static int
1157 1.91 augustss ohci_intr1(ohci_softc_t *sc)
1158 1.53 augustss {
1159 1.1 augustss u_int32_t intrs, eintrs;
1160 1.1 augustss
1161 1.105 augustss DPRINTFN(14,("ohci_intr1: enter\n"));
1162 1.105 augustss
1163 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1164 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1165 1.15 augustss #ifdef DIAGNOSTIC
1166 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1167 1.15 augustss #endif
1168 1.15 augustss return (0);
1169 1.15 augustss }
1170 1.15 augustss
1171 1.224 mrg KASSERT(mutex_owned(&sc->sc_intr_lock));
1172 1.224 mrg
1173 1.157 mycroft intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1174 1.1 augustss if (!intrs)
1175 1.1 augustss return (0);
1176 1.55 augustss
1177 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1178 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1179 1.211 matt DPRINTFN(7, ("ohci_intr: sc=%p intrs=%#x(%#x) eintrs=%#x(%#x)\n",
1180 1.211 matt sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1181 1.211 matt (u_int)eintrs, sc->sc_eintrs));
1182 1.211 matt
1183 1.211 matt if (!eintrs) {
1184 1.1 augustss return (0);
1185 1.211 matt }
1186 1.1 augustss
1187 1.44 augustss sc->sc_bus.no_intrs++;
1188 1.1 augustss if (eintrs & OHCI_SO) {
1189 1.100 augustss sc->sc_overrun_cnt++;
1190 1.100 augustss if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1191 1.100 augustss printf("%s: %u scheduling overruns\n",
1192 1.190 drochner device_xname(sc->sc_dev), sc->sc_overrun_cnt);
1193 1.100 augustss sc->sc_overrun_cnt = 0;
1194 1.100 augustss }
1195 1.1 augustss /* XXX do what */
1196 1.106 augustss eintrs &= ~OHCI_SO;
1197 1.1 augustss }
1198 1.1 augustss if (eintrs & OHCI_WDH) {
1199 1.157 mycroft /*
1200 1.157 mycroft * We block the interrupt below, and reenable it later from
1201 1.157 mycroft * ohci_softintr().
1202 1.157 mycroft */
1203 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1204 1.1 augustss }
1205 1.1 augustss if (eintrs & OHCI_RD) {
1206 1.190 drochner printf("%s: resume detect\n", device_xname(sc->sc_dev));
1207 1.1 augustss /* XXX process resume detect */
1208 1.1 augustss }
1209 1.1 augustss if (eintrs & OHCI_UE) {
1210 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1211 1.190 drochner device_xname(sc->sc_dev));
1212 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1213 1.1 augustss /* XXX what else */
1214 1.1 augustss }
1215 1.1 augustss if (eintrs & OHCI_RHSC) {
1216 1.120 augustss /*
1217 1.157 mycroft * We block the interrupt below, and reenable it later from
1218 1.157 mycroft * a timeout.
1219 1.1 augustss */
1220 1.224 mrg softint_schedule(sc->sc_rhsc_si);
1221 1.1 augustss }
1222 1.1 augustss
1223 1.106 augustss if (eintrs != 0) {
1224 1.157 mycroft /* Block unprocessed interrupts. */
1225 1.106 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1226 1.106 augustss sc->sc_eintrs &= ~eintrs;
1227 1.157 mycroft DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1228 1.190 drochner device_xname(sc->sc_dev), eintrs));
1229 1.106 augustss }
1230 1.1 augustss
1231 1.1 augustss return (1);
1232 1.1 augustss }
1233 1.1 augustss
1234 1.1 augustss void
1235 1.104 augustss ohci_rhsc_enable(void *v_sc)
1236 1.104 augustss {
1237 1.104 augustss ohci_softc_t *sc = v_sc;
1238 1.104 augustss
1239 1.224 mrg DPRINTFN(1, ("%s: %s\n", __func__, device_xname(sc->sc_dev)));
1240 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1241 1.157 mycroft sc->sc_eintrs |= OHCI_RHSC;
1242 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1243 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1244 1.1 augustss }
1245 1.1 augustss
1246 1.52 augustss #ifdef OHCI_DEBUG
1247 1.166 drochner const char *ohci_cc_strs[] = {
1248 1.13 augustss "NO_ERROR",
1249 1.13 augustss "CRC",
1250 1.13 augustss "BIT_STUFFING",
1251 1.13 augustss "DATA_TOGGLE_MISMATCH",
1252 1.13 augustss "STALL",
1253 1.13 augustss "DEVICE_NOT_RESPONDING",
1254 1.13 augustss "PID_CHECK_FAILURE",
1255 1.13 augustss "UNEXPECTED_PID",
1256 1.13 augustss "DATA_OVERRUN",
1257 1.13 augustss "DATA_UNDERRUN",
1258 1.13 augustss "BUFFER_OVERRUN",
1259 1.13 augustss "BUFFER_UNDERRUN",
1260 1.67 augustss "reserved",
1261 1.67 augustss "reserved",
1262 1.67 augustss "NOT_ACCESSED",
1263 1.13 augustss "NOT_ACCESSED",
1264 1.13 augustss };
1265 1.13 augustss #endif
1266 1.13 augustss
1267 1.1 augustss void
1268 1.157 mycroft ohci_softintr(void *v)
1269 1.83 augustss {
1270 1.190 drochner struct usbd_bus *bus = v;
1271 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1272 1.157 mycroft ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1273 1.157 mycroft ohci_soft_td_t *std, *sdone, *stdnext;
1274 1.157 mycroft usbd_xfer_handle xfer;
1275 1.157 mycroft struct ohci_pipe *opipe;
1276 1.224 mrg int len, cc;
1277 1.157 mycroft int i, j, actlen, iframes, uedir;
1278 1.157 mycroft ohci_physaddr_t done;
1279 1.157 mycroft
1280 1.224 mrg KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
1281 1.224 mrg
1282 1.157 mycroft DPRINTFN(10,("ohci_softintr: enter\n"));
1283 1.157 mycroft
1284 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1285 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1286 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1287 1.168 augustss done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1288 1.157 mycroft sc->sc_hcca->hcca_done_head = 0;
1289 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1290 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1291 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1292 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1293 1.157 mycroft sc->sc_eintrs |= OHCI_WDH;
1294 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1295 1.83 augustss
1296 1.83 augustss /* Reverse the done list. */
1297 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1298 1.83 augustss std = ohci_hash_find_td(sc, done);
1299 1.83 augustss if (std != NULL) {
1300 1.195 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1301 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1302 1.83 augustss std->dnext = sdone;
1303 1.168 augustss done = O32TOH(std->td.td_nexttd);
1304 1.83 augustss sdone = std;
1305 1.83 augustss DPRINTFN(10,("add TD %p\n", std));
1306 1.83 augustss continue;
1307 1.83 augustss }
1308 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1309 1.83 augustss if (sitd != NULL) {
1310 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1311 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1312 1.83 augustss sitd->dnext = sidone;
1313 1.168 augustss done = O32TOH(sitd->itd.itd_nextitd);
1314 1.83 augustss sidone = sitd;
1315 1.83 augustss DPRINTFN(5,("add ITD %p\n", sitd));
1316 1.83 augustss continue;
1317 1.83 augustss }
1318 1.218 jmcneill device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
1319 1.218 jmcneill (u_long)done);
1320 1.218 jmcneill break;
1321 1.83 augustss }
1322 1.83 augustss
1323 1.105 augustss DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1324 1.1 augustss
1325 1.52 augustss #ifdef OHCI_DEBUG
1326 1.1 augustss if (ohcidebug > 10) {
1327 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1328 1.168 augustss ohci_dump_tds(sc, sdone);
1329 1.1 augustss }
1330 1.1 augustss #endif
1331 1.1 augustss
1332 1.48 augustss for (std = sdone; std; std = stdnext) {
1333 1.53 augustss xfer = std->xfer;
1334 1.48 augustss stdnext = std->dnext;
1335 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1336 1.69 augustss std, xfer, xfer ? xfer->hcpriv : 0));
1337 1.71 augustss if (xfer == NULL) {
1338 1.117 augustss /*
1339 1.117 augustss * xfer == NULL: There seems to be no xfer associated
1340 1.71 augustss * with this TD. It is tailp that happened to end up on
1341 1.71 augustss * the done queue.
1342 1.117 augustss * Shouldn't happen, but some chips are broken(?).
1343 1.71 augustss */
1344 1.71 augustss continue;
1345 1.71 augustss }
1346 1.53 augustss if (xfer->status == USBD_CANCELLED ||
1347 1.53 augustss xfer->status == USBD_TIMEOUT) {
1348 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1349 1.53 augustss xfer));
1350 1.38 augustss /* Handled by abort routine. */
1351 1.83 augustss continue;
1352 1.83 augustss }
1353 1.209 dyoung callout_stop(&xfer->timeout_handle);
1354 1.141 mycroft
1355 1.141 mycroft len = std->len;
1356 1.141 mycroft if (std->td.td_cbp != 0)
1357 1.168 augustss len -= O32TOH(std->td.td_be) -
1358 1.168 augustss O32TOH(std->td.td_cbp) + 1;
1359 1.141 mycroft DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1360 1.141 mycroft std->flags));
1361 1.141 mycroft if (std->flags & OHCI_ADD_LEN)
1362 1.141 mycroft xfer->actlen += len;
1363 1.141 mycroft
1364 1.168 augustss cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1365 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1366 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1367 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1368 1.53 augustss usb_transfer_complete(xfer);
1369 1.21 augustss }
1370 1.48 augustss ohci_free_std(sc, std);
1371 1.1 augustss } else {
1372 1.48 augustss /*
1373 1.48 augustss * Endpoint is halted. First unlink all the TDs
1374 1.48 augustss * belonging to the failed transfer, and then restart
1375 1.48 augustss * the endpoint.
1376 1.48 augustss */
1377 1.1 augustss ohci_soft_td_t *p, *n;
1378 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1379 1.48 augustss
1380 1.71 augustss DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1381 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1382 1.168 augustss ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1383 1.48 augustss
1384 1.48 augustss /* remove TDs */
1385 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1386 1.1 augustss n = p->nexttd;
1387 1.1 augustss ohci_free_std(sc, p);
1388 1.1 augustss }
1389 1.48 augustss
1390 1.16 augustss /* clear halt */
1391 1.168 augustss opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1392 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1393 1.48 augustss
1394 1.1 augustss if (cc == OHCI_CC_STALL)
1395 1.53 augustss xfer->status = USBD_STALLED;
1396 1.1 augustss else
1397 1.53 augustss xfer->status = USBD_IOERROR;
1398 1.53 augustss usb_transfer_complete(xfer);
1399 1.1 augustss }
1400 1.1 augustss }
1401 1.72 augustss
1402 1.83 augustss #ifdef OHCI_DEBUG
1403 1.83 augustss if (ohcidebug > 10) {
1404 1.105 augustss DPRINTF(("ohci_softintr: ITD done:\n"));
1405 1.168 augustss ohci_dump_itds(sc, sidone);
1406 1.83 augustss }
1407 1.83 augustss #endif
1408 1.83 augustss
1409 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1410 1.83 augustss xfer = sitd->xfer;
1411 1.83 augustss sitdnext = sitd->dnext;
1412 1.83 augustss DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1413 1.83 augustss sitd, xfer, xfer ? xfer->hcpriv : 0));
1414 1.83 augustss if (xfer == NULL)
1415 1.83 augustss continue;
1416 1.83 augustss if (xfer->status == USBD_CANCELLED ||
1417 1.83 augustss xfer->status == USBD_TIMEOUT) {
1418 1.83 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1419 1.83 augustss xfer));
1420 1.83 augustss /* Handled by abort routine. */
1421 1.83 augustss continue;
1422 1.83 augustss }
1423 1.83 augustss #ifdef DIAGNOSTIC
1424 1.83 augustss if (sitd->isdone)
1425 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1426 1.83 augustss sitd->isdone = 1;
1427 1.83 augustss #endif
1428 1.134 toshii if (sitd->flags & OHCI_CALL_DONE) {
1429 1.134 toshii ohci_soft_itd_t *next;
1430 1.134 toshii
1431 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1432 1.134 toshii opipe->u.iso.inuse -= xfer->nframes;
1433 1.134 toshii uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1434 1.134 toshii bEndpointAddress);
1435 1.134 toshii xfer->status = USBD_NORMAL_COMPLETION;
1436 1.134 toshii actlen = 0;
1437 1.137 simonb for (i = 0, sitd = xfer->hcpriv;;
1438 1.134 toshii sitd = next) {
1439 1.134 toshii next = sitd->nextitd;
1440 1.168 augustss if (OHCI_ITD_GET_CC(O32TOH(sitd->
1441 1.135 toshii itd.itd_flags)) != OHCI_CC_NO_ERROR)
1442 1.134 toshii xfer->status = USBD_IOERROR;
1443 1.134 toshii /* For input, update frlengths with actual */
1444 1.134 toshii /* XXX anything necessary for output? */
1445 1.134 toshii if (uedir == UE_DIR_IN &&
1446 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION) {
1447 1.168 augustss iframes = OHCI_ITD_GET_FC(O32TOH(
1448 1.135 toshii sitd->itd.itd_flags));
1449 1.134 toshii for (j = 0; j < iframes; i++, j++) {
1450 1.168 augustss len = O16TOH(sitd->
1451 1.134 toshii itd.itd_offset[j]);
1452 1.158 toshii if ((OHCI_ITD_PSW_GET_CC(len) &
1453 1.158 toshii OHCI_CC_NOT_ACCESSED_MASK)
1454 1.158 toshii == OHCI_CC_NOT_ACCESSED)
1455 1.158 toshii len = 0;
1456 1.158 toshii else
1457 1.158 toshii len = OHCI_ITD_PSW_LENGTH(len);
1458 1.134 toshii xfer->frlengths[i] = len;
1459 1.134 toshii actlen += len;
1460 1.134 toshii }
1461 1.134 toshii }
1462 1.134 toshii if (sitd->flags & OHCI_CALL_DONE)
1463 1.134 toshii break;
1464 1.134 toshii ohci_free_sitd(sc, sitd);
1465 1.83 augustss }
1466 1.134 toshii ohci_free_sitd(sc, sitd);
1467 1.134 toshii if (uedir == UE_DIR_IN &&
1468 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION)
1469 1.134 toshii xfer->actlen = actlen;
1470 1.151 mycroft xfer->hcpriv = NULL;
1471 1.134 toshii
1472 1.83 augustss usb_transfer_complete(xfer);
1473 1.83 augustss }
1474 1.83 augustss }
1475 1.83 augustss
1476 1.119 augustss if (sc->sc_softwake) {
1477 1.119 augustss sc->sc_softwake = 0;
1478 1.224 mrg cv_broadcast(&sc->sc_softwake_cv);
1479 1.119 augustss }
1480 1.119 augustss
1481 1.105 augustss DPRINTFN(10,("ohci_softintr: done:\n"));
1482 1.1 augustss }
1483 1.1 augustss
1484 1.1 augustss void
1485 1.179 christos ohci_device_ctrl_done(usbd_xfer_handle xfer)
1486 1.1 augustss {
1487 1.195 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1488 1.224 mrg #ifdef DIAGNOSTIC
1489 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
1490 1.224 mrg #endif
1491 1.195 bouyer int len = UGETW(xfer->request.wLength);
1492 1.195 bouyer int isread = (xfer->request.bmRequestType & UT_READ);
1493 1.195 bouyer
1494 1.140 gson DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1495 1.1 augustss
1496 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1497 1.224 mrg
1498 1.38 augustss #ifdef DIAGNOSTIC
1499 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1500 1.140 gson panic("ohci_device_ctrl_done: not a request");
1501 1.1 augustss }
1502 1.38 augustss #endif
1503 1.195 bouyer if (len)
1504 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, len,
1505 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1506 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0,
1507 1.195 bouyer sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1508 1.1 augustss }
1509 1.1 augustss
1510 1.1 augustss void
1511 1.91 augustss ohci_device_intr_done(usbd_xfer_handle xfer)
1512 1.1 augustss {
1513 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1514 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1515 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1516 1.48 augustss ohci_soft_td_t *data, *tail;
1517 1.195 bouyer int isread =
1518 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1519 1.1 augustss
1520 1.140 gson DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1521 1.53 augustss xfer, xfer->actlen));
1522 1.1 augustss
1523 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1524 1.224 mrg
1525 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1526 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1527 1.53 augustss if (xfer->pipe->repeat) {
1528 1.60 augustss data = opipe->tail.td;
1529 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1530 1.53 augustss if (tail == NULL) {
1531 1.53 augustss xfer->status = USBD_NOMEM;
1532 1.1 augustss return;
1533 1.1 augustss }
1534 1.55 augustss tail->xfer = NULL;
1535 1.120 augustss
1536 1.168 augustss data->td.td_flags = HTOO32(
1537 1.120 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1538 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1539 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1540 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
1541 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1542 1.48 augustss data->nexttd = tail;
1543 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
1544 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1545 1.76 tsutsui xfer->length - 1);
1546 1.53 augustss data->len = xfer->length;
1547 1.53 augustss data->xfer = xfer;
1548 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1549 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
1550 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1551 1.53 augustss xfer->hcpriv = data;
1552 1.53 augustss xfer->actlen = 0;
1553 1.1 augustss
1554 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1555 1.195 bouyer usb_syncmem(&sed->dma,
1556 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1557 1.195 bouyer sizeof(sed->ed.ed_tailp),
1558 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1559 1.60 augustss opipe->tail.td = tail;
1560 1.1 augustss }
1561 1.1 augustss }
1562 1.1 augustss
1563 1.1 augustss void
1564 1.179 christos ohci_device_bulk_done(usbd_xfer_handle xfer)
1565 1.3 augustss {
1566 1.224 mrg #ifdef DIAGNOSTIC
1567 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
1568 1.224 mrg #endif
1569 1.195 bouyer int isread =
1570 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1571 1.195 bouyer
1572 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1573 1.224 mrg
1574 1.140 gson DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1575 1.53 augustss xfer, xfer->actlen));
1576 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1577 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1578 1.3 augustss }
1579 1.3 augustss
1580 1.224 mrg Static void
1581 1.224 mrg ohci_rhsc_softint(void *arg)
1582 1.224 mrg {
1583 1.224 mrg ohci_softc_t *sc = arg;
1584 1.224 mrg
1585 1.224 mrg mutex_enter(&sc->sc_lock);
1586 1.224 mrg
1587 1.224 mrg ohci_rhsc(sc, sc->sc_intrxfer);
1588 1.224 mrg
1589 1.224 mrg /* Do not allow RHSC interrupts > 1 per second */
1590 1.224 mrg callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1591 1.224 mrg
1592 1.224 mrg mutex_exit(&sc->sc_lock);
1593 1.224 mrg }
1594 1.224 mrg
1595 1.3 augustss void
1596 1.91 augustss ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1597 1.1 augustss {
1598 1.1 augustss usbd_pipe_handle pipe;
1599 1.1 augustss u_char *p;
1600 1.1 augustss int i, m;
1601 1.1 augustss int hstatus;
1602 1.1 augustss
1603 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1604 1.224 mrg
1605 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1606 1.120 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1607 1.53 augustss sc, xfer, hstatus));
1608 1.1 augustss
1609 1.53 augustss if (xfer == NULL) {
1610 1.1 augustss /* Just ignore the change. */
1611 1.1 augustss return;
1612 1.1 augustss }
1613 1.1 augustss
1614 1.53 augustss pipe = xfer->pipe;
1615 1.1 augustss
1616 1.123 augustss p = KERNADDR(&xfer->dmabuf, 0);
1617 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1618 1.53 augustss memset(p, 0, xfer->length);
1619 1.1 augustss for (i = 1; i <= m; i++) {
1620 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1621 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1622 1.1 augustss p[i/8] |= 1 << (i%8);
1623 1.1 augustss }
1624 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1625 1.53 augustss xfer->actlen = xfer->length;
1626 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1627 1.1 augustss
1628 1.53 augustss usb_transfer_complete(xfer);
1629 1.38 augustss }
1630 1.38 augustss
1631 1.38 augustss void
1632 1.179 christos ohci_root_intr_done(usbd_xfer_handle xfer)
1633 1.65 augustss {
1634 1.65 augustss }
1635 1.65 augustss
1636 1.65 augustss void
1637 1.179 christos ohci_root_ctrl_done(usbd_xfer_handle xfer)
1638 1.38 augustss {
1639 1.1 augustss }
1640 1.1 augustss
1641 1.1 augustss /*
1642 1.1 augustss * Wait here until controller claims to have an interrupt.
1643 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1644 1.1 augustss * too long.
1645 1.1 augustss */
1646 1.1 augustss void
1647 1.91 augustss ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1648 1.1 augustss {
1649 1.163 augustss int timo;
1650 1.1 augustss u_int32_t intrs;
1651 1.1 augustss
1652 1.224 mrg mutex_enter(&sc->sc_lock);
1653 1.224 mrg
1654 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1655 1.163 augustss for (timo = xfer->timeout; timo >= 0; timo--) {
1656 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1657 1.116 augustss if (sc->sc_dying)
1658 1.116 augustss break;
1659 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1660 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1661 1.52 augustss #ifdef OHCI_DEBUG
1662 1.1 augustss if (ohcidebug > 15)
1663 1.1 augustss ohci_dumpregs(sc);
1664 1.1 augustss #endif
1665 1.1 augustss if (intrs) {
1666 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1667 1.53 augustss ohci_intr1(sc);
1668 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1669 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1670 1.230 jmcneill goto done;
1671 1.1 augustss }
1672 1.1 augustss }
1673 1.15 augustss
1674 1.15 augustss /* Timeout */
1675 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1676 1.53 augustss xfer->status = USBD_TIMEOUT;
1677 1.53 augustss usb_transfer_complete(xfer);
1678 1.224 mrg
1679 1.15 augustss /* XXX should free TD */
1680 1.224 mrg
1681 1.230 jmcneill done:
1682 1.224 mrg mutex_exit(&sc->sc_lock);
1683 1.5 augustss }
1684 1.5 augustss
1685 1.5 augustss void
1686 1.91 augustss ohci_poll(struct usbd_bus *bus)
1687 1.5 augustss {
1688 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1689 1.105 augustss #ifdef OHCI_DEBUG
1690 1.105 augustss static int last;
1691 1.105 augustss int new;
1692 1.105 augustss new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1693 1.105 augustss if (new != last) {
1694 1.105 augustss DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1695 1.105 augustss last = new;
1696 1.105 augustss }
1697 1.105 augustss #endif
1698 1.5 augustss
1699 1.217 jmcneill sc->sc_eintrs |= OHCI_WDH;
1700 1.224 mrg if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
1701 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1702 1.53 augustss ohci_intr1(sc);
1703 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1704 1.224 mrg }
1705 1.1 augustss }
1706 1.1 augustss
1707 1.1 augustss usbd_status
1708 1.91 augustss ohci_device_request(usbd_xfer_handle xfer)
1709 1.1 augustss {
1710 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1711 1.53 augustss usb_device_request_t *req = &xfer->request;
1712 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1713 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
1714 1.1 augustss int addr = dev->address;
1715 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1716 1.1 augustss ohci_soft_ed_t *sed;
1717 1.1 augustss int isread;
1718 1.1 augustss int len;
1719 1.53 augustss usbd_status err;
1720 1.224 mrg
1721 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1722 1.1 augustss
1723 1.1 augustss isread = req->bmRequestType & UT_READ;
1724 1.1 augustss len = UGETW(req->wLength);
1725 1.1 augustss
1726 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1727 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1728 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1729 1.120 augustss UGETW(req->wIndex), len, addr,
1730 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1731 1.1 augustss
1732 1.60 augustss setup = opipe->tail.td;
1733 1.1 augustss stat = ohci_alloc_std(sc);
1734 1.53 augustss if (stat == NULL) {
1735 1.53 augustss err = USBD_NOMEM;
1736 1.1 augustss goto bad1;
1737 1.1 augustss }
1738 1.1 augustss tail = ohci_alloc_std(sc);
1739 1.53 augustss if (tail == NULL) {
1740 1.53 augustss err = USBD_NOMEM;
1741 1.1 augustss goto bad2;
1742 1.1 augustss }
1743 1.55 augustss tail->xfer = NULL;
1744 1.1 augustss
1745 1.1 augustss sed = opipe->sed;
1746 1.1 augustss opipe->u.ctl.length = len;
1747 1.1 augustss
1748 1.148 mycroft /* Update device address and length since they may have changed
1749 1.148 mycroft during the setup of the control pipe in usbd_new_device(). */
1750 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1751 1.77 augustss /* XXXX Should not touch ED here! */
1752 1.195 bouyer
1753 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1754 1.195 bouyer sizeof(sed->ed.ed_flags),
1755 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1756 1.168 augustss sed->ed.ed_flags = HTOO32(
1757 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1758 1.16 augustss OHCI_ED_SET_FA(addr) |
1759 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1760 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1761 1.195 bouyer sizeof(sed->ed.ed_flags),
1762 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1763 1.1 augustss
1764 1.77 augustss next = stat;
1765 1.77 augustss
1766 1.1 augustss /* Set up data transaction */
1767 1.1 augustss if (len != 0) {
1768 1.77 augustss ohci_soft_td_t *std = stat;
1769 1.77 augustss
1770 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1771 1.77 augustss std, &stat);
1772 1.77 augustss stat = stat->nexttd; /* point at free TD */
1773 1.77 augustss if (err)
1774 1.1 augustss goto bad3;
1775 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1776 1.168 augustss std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1777 1.168 augustss std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1778 1.195 bouyer usb_syncmem(&std->dma,
1779 1.195 bouyer std->offs + offsetof(ohci_td_t, td_flags),
1780 1.195 bouyer sizeof(std->td.td_flags),
1781 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1782 1.34 augustss }
1783 1.1 augustss
1784 1.123 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1785 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
1786 1.1 augustss
1787 1.168 augustss setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1788 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1789 1.168 augustss setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1790 1.1 augustss setup->nexttd = next;
1791 1.168 augustss setup->td.td_nexttd = HTOO32(next->physaddr);
1792 1.168 augustss setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1793 1.77 augustss setup->len = 0;
1794 1.53 augustss setup->xfer = xfer;
1795 1.34 augustss setup->flags = 0;
1796 1.53 augustss xfer->hcpriv = setup;
1797 1.195 bouyer usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
1798 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1799 1.1 augustss
1800 1.168 augustss stat->td.td_flags = HTOO32(
1801 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1802 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1803 1.39 augustss stat->td.td_cbp = 0;
1804 1.1 augustss stat->nexttd = tail;
1805 1.168 augustss stat->td.td_nexttd = HTOO32(tail->physaddr);
1806 1.39 augustss stat->td.td_be = 0;
1807 1.77 augustss stat->flags = OHCI_CALL_DONE;
1808 1.1 augustss stat->len = 0;
1809 1.53 augustss stat->xfer = xfer;
1810 1.195 bouyer usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
1811 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1812 1.1 augustss
1813 1.52 augustss #ifdef OHCI_DEBUG
1814 1.1 augustss if (ohcidebug > 5) {
1815 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1816 1.168 augustss ohci_dump_ed(sc, sed);
1817 1.168 augustss ohci_dump_tds(sc, setup);
1818 1.1 augustss }
1819 1.1 augustss #endif
1820 1.1 augustss
1821 1.1 augustss /* Insert ED in schedule */
1822 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1823 1.195 bouyer usb_syncmem(&sed->dma,
1824 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1825 1.195 bouyer sizeof(sed->ed.ed_tailp),
1826 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1827 1.60 augustss opipe->tail.td = tail;
1828 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1829 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1830 1.209 dyoung callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
1831 1.80 augustss ohci_timeout, xfer);
1832 1.15 augustss }
1833 1.1 augustss
1834 1.115 itojun #ifdef OHCI_DEBUG
1835 1.113 augustss if (ohcidebug > 20) {
1836 1.77 augustss delay(10000);
1837 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1838 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1839 1.113 augustss ohci_dumpregs(sc);
1840 1.113 augustss printf("ctrl head:\n");
1841 1.168 augustss ohci_dump_ed(sc, sc->sc_ctrl_head);
1842 1.113 augustss printf("sed:\n");
1843 1.168 augustss ohci_dump_ed(sc, sed);
1844 1.168 augustss ohci_dump_tds(sc, setup);
1845 1.1 augustss }
1846 1.1 augustss #endif
1847 1.1 augustss
1848 1.1 augustss return (USBD_NORMAL_COMPLETION);
1849 1.1 augustss
1850 1.1 augustss bad3:
1851 1.1 augustss ohci_free_std(sc, tail);
1852 1.1 augustss bad2:
1853 1.1 augustss ohci_free_std(sc, stat);
1854 1.1 augustss bad1:
1855 1.53 augustss return (err);
1856 1.1 augustss }
1857 1.1 augustss
1858 1.1 augustss /*
1859 1.224 mrg * Add an ED to the schedule. Called with USB lock held.
1860 1.1 augustss */
1861 1.224 mrg Static void
1862 1.168 augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1863 1.1 augustss {
1864 1.113 augustss DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1865 1.113 augustss
1866 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1867 1.224 mrg
1868 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1869 1.195 bouyer sizeof(head->ed.ed_nexted),
1870 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1871 1.1 augustss sed->next = head->next;
1872 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1873 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1874 1.195 bouyer sizeof(sed->ed.ed_nexted),
1875 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1876 1.1 augustss head->next = sed;
1877 1.168 augustss head->ed.ed_nexted = HTOO32(sed->physaddr);
1878 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1879 1.195 bouyer sizeof(head->ed.ed_nexted),
1880 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1881 1.1 augustss }
1882 1.1 augustss
1883 1.1 augustss /*
1884 1.224 mrg * Remove an ED from the schedule. Called with USB lock held.
1885 1.3 augustss */
1886 1.224 mrg Static void
1887 1.224 mrg ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1888 1.3 augustss {
1889 1.120 augustss ohci_soft_ed_t *p;
1890 1.3 augustss
1891 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1892 1.224 mrg
1893 1.3 augustss /* XXX */
1894 1.133 toshii for (p = head; p != NULL && p->next != sed; p = p->next)
1895 1.3 augustss ;
1896 1.55 augustss if (p == NULL)
1897 1.128 provos panic("ohci_rem_ed: ED not found");
1898 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1899 1.195 bouyer sizeof(sed->ed.ed_nexted),
1900 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1901 1.3 augustss p->next = sed->next;
1902 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1903 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1904 1.195 bouyer sizeof(p->ed.ed_nexted),
1905 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1906 1.3 augustss }
1907 1.3 augustss
1908 1.3 augustss /*
1909 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1910 1.1 augustss * the host controller. This queue is the processed by software.
1911 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1912 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1913 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1914 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1915 1.1 augustss * hash value.
1916 1.1 augustss */
1917 1.1 augustss
1918 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1919 1.224 mrg /* Called with USB lock held. */
1920 1.1 augustss void
1921 1.91 augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1922 1.1 augustss {
1923 1.1 augustss int h = HASH(std->physaddr);
1924 1.1 augustss
1925 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1926 1.224 mrg
1927 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1928 1.1 augustss }
1929 1.1 augustss
1930 1.224 mrg /* Called with USB lock held. */
1931 1.1 augustss void
1932 1.179 christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1933 1.1 augustss {
1934 1.46 augustss
1935 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1936 1.224 mrg
1937 1.1 augustss LIST_REMOVE(std, hnext);
1938 1.1 augustss }
1939 1.1 augustss
1940 1.1 augustss ohci_soft_td_t *
1941 1.91 augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1942 1.1 augustss {
1943 1.1 augustss int h = HASH(a);
1944 1.1 augustss ohci_soft_td_t *std;
1945 1.1 augustss
1946 1.120 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1947 1.53 augustss std != NULL;
1948 1.1 augustss std = LIST_NEXT(std, hnext))
1949 1.1 augustss if (std->physaddr == a)
1950 1.1 augustss return (std);
1951 1.83 augustss return (NULL);
1952 1.83 augustss }
1953 1.83 augustss
1954 1.224 mrg /* Called with USB lock held. */
1955 1.83 augustss void
1956 1.91 augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1957 1.83 augustss {
1958 1.83 augustss int h = HASH(sitd->physaddr);
1959 1.83 augustss
1960 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1961 1.224 mrg
1962 1.120 augustss DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1963 1.83 augustss sitd, (u_long)sitd->physaddr));
1964 1.83 augustss
1965 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1966 1.83 augustss }
1967 1.83 augustss
1968 1.224 mrg /* Called with USB lock held. */
1969 1.83 augustss void
1970 1.179 christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1971 1.83 augustss {
1972 1.83 augustss
1973 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1974 1.224 mrg
1975 1.120 augustss DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1976 1.83 augustss sitd, (u_long)sitd->physaddr));
1977 1.83 augustss
1978 1.83 augustss LIST_REMOVE(sitd, hnext);
1979 1.83 augustss }
1980 1.83 augustss
1981 1.83 augustss ohci_soft_itd_t *
1982 1.91 augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1983 1.83 augustss {
1984 1.83 augustss int h = HASH(a);
1985 1.83 augustss ohci_soft_itd_t *sitd;
1986 1.83 augustss
1987 1.120 augustss for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1988 1.83 augustss sitd != NULL;
1989 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1990 1.83 augustss if (sitd->physaddr == a)
1991 1.83 augustss return (sitd);
1992 1.83 augustss return (NULL);
1993 1.1 augustss }
1994 1.1 augustss
1995 1.1 augustss void
1996 1.91 augustss ohci_timeout(void *addr)
1997 1.1 augustss {
1998 1.114 augustss struct ohci_xfer *oxfer = addr;
1999 1.116 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
2000 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
2001 1.114 augustss
2002 1.114 augustss DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
2003 1.114 augustss
2004 1.116 augustss if (sc->sc_dying) {
2005 1.224 mrg mutex_enter(&sc->sc_lock);
2006 1.116 augustss ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
2007 1.224 mrg mutex_exit(&sc->sc_lock);
2008 1.116 augustss return;
2009 1.116 augustss }
2010 1.116 augustss
2011 1.114 augustss /* Execute the abort in a process context. */
2012 1.215 tsutsui usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr);
2013 1.178 joerg usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
2014 1.178 joerg USB_TASKQ_HC);
2015 1.114 augustss }
2016 1.114 augustss
2017 1.114 augustss void
2018 1.114 augustss ohci_timeout_task(void *addr)
2019 1.114 augustss {
2020 1.53 augustss usbd_xfer_handle xfer = addr;
2021 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2022 1.1 augustss
2023 1.114 augustss DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
2024 1.45 augustss
2025 1.224 mrg mutex_enter(&sc->sc_lock);
2026 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
2027 1.224 mrg mutex_exit(&sc->sc_lock);
2028 1.1 augustss }
2029 1.1 augustss
2030 1.52 augustss #ifdef OHCI_DEBUG
2031 1.1 augustss void
2032 1.168 augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
2033 1.1 augustss {
2034 1.1 augustss for (; std; std = std->nexttd)
2035 1.168 augustss ohci_dump_td(sc, std);
2036 1.1 augustss }
2037 1.1 augustss
2038 1.1 augustss void
2039 1.168 augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
2040 1.1 augustss {
2041 1.92 tv char sbuf[128];
2042 1.92 tv
2043 1.204 martin usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2044 1.204 martin BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2045 1.197 christos snprintb(sbuf, sizeof(sbuf),
2046 1.197 christos "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
2047 1.197 christos (u_int32_t)O32TOH(std->td.td_flags));
2048 1.107 augustss printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2049 1.120 augustss "nexttd=0x%08lx be=0x%08lx\n",
2050 1.107 augustss std, (u_long)std->physaddr, sbuf,
2051 1.168 augustss OHCI_TD_GET_DI(O32TOH(std->td.td_flags)),
2052 1.168 augustss OHCI_TD_GET_EC(O32TOH(std->td.td_flags)),
2053 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
2054 1.168 augustss (u_long)O32TOH(std->td.td_cbp),
2055 1.168 augustss (u_long)O32TOH(std->td.td_nexttd),
2056 1.168 augustss (u_long)O32TOH(std->td.td_be));
2057 1.1 augustss }
2058 1.1 augustss
2059 1.1 augustss void
2060 1.168 augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2061 1.83 augustss {
2062 1.83 augustss int i;
2063 1.83 augustss
2064 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
2065 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2066 1.107 augustss printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2067 1.120 augustss "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2068 1.107 augustss sitd, (u_long)sitd->physaddr,
2069 1.168 augustss OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
2070 1.168 augustss OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
2071 1.168 augustss OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
2072 1.168 augustss OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
2073 1.168 augustss (u_long)O32TOH(sitd->itd.itd_bp0),
2074 1.168 augustss (u_long)O32TOH(sitd->itd.itd_nextitd),
2075 1.168 augustss (u_long)O32TOH(sitd->itd.itd_be));
2076 1.83 augustss for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2077 1.107 augustss printf("offs[%d]=0x%04x ", i,
2078 1.168 augustss (u_int)O16TOH(sitd->itd.itd_offset[i]));
2079 1.107 augustss printf("\n");
2080 1.83 augustss }
2081 1.83 augustss
2082 1.83 augustss void
2083 1.168 augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2084 1.83 augustss {
2085 1.83 augustss for (; sitd; sitd = sitd->nextitd)
2086 1.168 augustss ohci_dump_itd(sc, sitd);
2087 1.83 augustss }
2088 1.83 augustss
2089 1.83 augustss void
2090 1.168 augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2091 1.1 augustss {
2092 1.92 tv char sbuf[128], sbuf2[128];
2093 1.92 tv
2094 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2095 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2096 1.197 christos snprintb(sbuf, sizeof(sbuf),
2097 1.197 christos "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2098 1.197 christos (u_int32_t)O32TOH(sed->ed.ed_flags));
2099 1.197 christos snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY",
2100 1.197 christos (u_int32_t)O32TOH(sed->ed.ed_headp));
2101 1.92 tv
2102 1.107 augustss printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2103 1.92 tv "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2104 1.120 augustss sed, (u_long)sed->physaddr,
2105 1.168 augustss OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
2106 1.168 augustss OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
2107 1.168 augustss OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
2108 1.168 augustss (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
2109 1.168 augustss (u_long)O32TOH(sed->ed.ed_headp),
2110 1.168 augustss (u_long)O32TOH(sed->ed.ed_nexted));
2111 1.1 augustss }
2112 1.1 augustss #endif
2113 1.1 augustss
2114 1.1 augustss usbd_status
2115 1.91 augustss ohci_open(usbd_pipe_handle pipe)
2116 1.1 augustss {
2117 1.1 augustss usbd_device_handle dev = pipe->device;
2118 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
2119 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2120 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2121 1.1 augustss u_int8_t addr = dev->address;
2122 1.60 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2123 1.1 augustss ohci_soft_ed_t *sed;
2124 1.1 augustss ohci_soft_td_t *std;
2125 1.60 augustss ohci_soft_itd_t *sitd;
2126 1.60 augustss ohci_physaddr_t tdphys;
2127 1.60 augustss u_int32_t fmt;
2128 1.224 mrg usbd_status err = USBD_NOMEM;
2129 1.64 augustss int ival;
2130 1.1 augustss
2131 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2132 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2133 1.81 augustss
2134 1.224 mrg if (sc->sc_dying) {
2135 1.224 mrg err = USBD_IOERROR;
2136 1.224 mrg goto bad0;
2137 1.224 mrg }
2138 1.116 augustss
2139 1.90 thorpej std = NULL;
2140 1.90 thorpej sed = NULL;
2141 1.90 thorpej
2142 1.1 augustss if (addr == sc->sc_addr) {
2143 1.1 augustss switch (ed->bEndpointAddress) {
2144 1.1 augustss case USB_CONTROL_ENDPOINT:
2145 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
2146 1.1 augustss break;
2147 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
2148 1.1 augustss pipe->methods = &ohci_root_intr_methods;
2149 1.1 augustss break;
2150 1.1 augustss default:
2151 1.224 mrg err = USBD_INVAL;
2152 1.224 mrg goto bad0;
2153 1.1 augustss }
2154 1.1 augustss } else {
2155 1.1 augustss sed = ohci_alloc_sed(sc);
2156 1.53 augustss if (sed == NULL)
2157 1.1 augustss goto bad0;
2158 1.1 augustss opipe->sed = sed;
2159 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
2160 1.224 mrg mutex_enter(&sc->sc_lock);
2161 1.60 augustss sitd = ohci_alloc_sitd(sc);
2162 1.224 mrg mutex_exit(&sc->sc_lock);
2163 1.127 augustss if (sitd == NULL)
2164 1.60 augustss goto bad1;
2165 1.60 augustss opipe->tail.itd = sitd;
2166 1.76 tsutsui tdphys = sitd->physaddr;
2167 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
2168 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2169 1.83 augustss fmt |= OHCI_ED_DIR_IN;
2170 1.83 augustss else
2171 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
2172 1.60 augustss } else {
2173 1.224 mrg mutex_enter(&sc->sc_lock);
2174 1.60 augustss std = ohci_alloc_std(sc);
2175 1.224 mrg mutex_exit(&sc->sc_lock);
2176 1.127 augustss if (std == NULL)
2177 1.60 augustss goto bad1;
2178 1.60 augustss opipe->tail.td = std;
2179 1.76 tsutsui tdphys = std->physaddr;
2180 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2181 1.60 augustss }
2182 1.168 augustss sed->ed.ed_flags = HTOO32(
2183 1.120 augustss OHCI_ED_SET_FA(addr) |
2184 1.147 mycroft OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2185 1.109 augustss (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2186 1.109 augustss fmt |
2187 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2188 1.214 jakllsch sed->ed.ed_headp = HTOO32(tdphys |
2189 1.214 jakllsch (pipe->endpoint->datatoggle ? OHCI_TOGGLECARRY : 0));
2190 1.214 jakllsch sed->ed.ed_tailp = HTOO32(tdphys);
2191 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2192 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2193 1.1 augustss
2194 1.60 augustss switch (xfertype) {
2195 1.1 augustss case UE_CONTROL:
2196 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
2197 1.120 augustss err = usb_allocmem(&sc->sc_bus,
2198 1.120 augustss sizeof(usb_device_request_t),
2199 1.53 augustss 0, &opipe->u.ctl.reqdma);
2200 1.53 augustss if (err)
2201 1.1 augustss goto bad;
2202 1.224 mrg mutex_enter(&sc->sc_lock);
2203 1.168 augustss ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2204 1.224 mrg mutex_exit(&sc->sc_lock);
2205 1.1 augustss break;
2206 1.1 augustss case UE_INTERRUPT:
2207 1.1 augustss pipe->methods = &ohci_device_intr_methods;
2208 1.64 augustss ival = pipe->interval;
2209 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
2210 1.64 augustss ival = ed->bInterval;
2211 1.226 skrll err = ohci_device_setintr(sc, opipe, ival);
2212 1.226 skrll if (err)
2213 1.226 skrll goto bad;
2214 1.226 skrll break;
2215 1.1 augustss case UE_ISOCHRONOUS:
2216 1.60 augustss pipe->methods = &ohci_device_isoc_methods;
2217 1.60 augustss return (ohci_setup_isoc(pipe));
2218 1.1 augustss case UE_BULK:
2219 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
2220 1.224 mrg mutex_enter(&sc->sc_lock);
2221 1.168 augustss ohci_add_ed(sc, sed, sc->sc_bulk_head);
2222 1.224 mrg mutex_exit(&sc->sc_lock);
2223 1.3 augustss break;
2224 1.1 augustss }
2225 1.1 augustss }
2226 1.224 mrg
2227 1.224 mrg return USBD_NORMAL_COMPLETION;
2228 1.1 augustss
2229 1.1 augustss bad:
2230 1.90 thorpej if (std != NULL)
2231 1.90 thorpej ohci_free_std(sc, std);
2232 1.1 augustss bad1:
2233 1.90 thorpej if (sed != NULL)
2234 1.90 thorpej ohci_free_sed(sc, sed);
2235 1.1 augustss bad0:
2236 1.224 mrg return err;
2237 1.120 augustss
2238 1.1 augustss }
2239 1.1 augustss
2240 1.1 augustss /*
2241 1.34 augustss * Close a reqular pipe.
2242 1.34 augustss * Assumes that there are no pending transactions.
2243 1.34 augustss */
2244 1.34 augustss void
2245 1.91 augustss ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2246 1.34 augustss {
2247 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2248 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2249 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
2250 1.34 augustss
2251 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2252 1.224 mrg
2253 1.34 augustss #ifdef DIAGNOSTIC
2254 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2255 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2256 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2257 1.34 augustss ohci_soft_td_t *std;
2258 1.168 augustss std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2259 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2260 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
2261 1.168 augustss (int)O32TOH(sed->ed.ed_headp),
2262 1.168 augustss (int)O32TOH(sed->ed.ed_tailp),
2263 1.34 augustss pipe, std);
2264 1.229 christos #ifdef OHCI_DEBUG
2265 1.107 augustss usbd_dump_pipe(&opipe->pipe);
2266 1.168 augustss ohci_dump_ed(sc, sed);
2267 1.106 augustss if (std)
2268 1.168 augustss ohci_dump_td(sc, std);
2269 1.106 augustss #endif
2270 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
2271 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2272 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2273 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
2274 1.34 augustss }
2275 1.34 augustss #endif
2276 1.224 mrg ohci_rem_ed(sc, sed, head);
2277 1.133 toshii /* Make sure the host controller is not touching this ED */
2278 1.133 toshii usb_delay_ms(&sc->sc_bus, 1);
2279 1.214 jakllsch pipe->endpoint->datatoggle =
2280 1.214 jakllsch (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2281 1.34 augustss ohci_free_sed(sc, opipe->sed);
2282 1.34 augustss }
2283 1.34 augustss
2284 1.120 augustss /*
2285 1.34 augustss * Abort a device request.
2286 1.34 augustss * If this routine is called at splusb() it guarantees that the request
2287 1.34 augustss * will be removed from the hardware scheduling and that the callback
2288 1.34 augustss * for it will be called with USBD_CANCELLED status.
2289 1.34 augustss * It's impossible to guarantee that the requested transfer will not
2290 1.34 augustss * have happened since the hardware runs concurrently.
2291 1.34 augustss * If the transaction has already happened we rely on the ordinary
2292 1.34 augustss * interrupt processing to process it.
2293 1.224 mrg * XXX This is most probably wrong.
2294 1.224 mrg * XXXMRG this doesn't make sense anymore.
2295 1.34 augustss */
2296 1.34 augustss void
2297 1.91 augustss ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2298 1.34 augustss {
2299 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2300 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
2301 1.106 augustss ohci_soft_ed_t *sed = opipe->sed;
2302 1.106 augustss ohci_soft_td_t *p, *n;
2303 1.106 augustss ohci_physaddr_t headp;
2304 1.224 mrg int hit;
2305 1.159 augustss int wake;
2306 1.34 augustss
2307 1.106 augustss DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2308 1.34 augustss
2309 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2310 1.224 mrg
2311 1.116 augustss if (sc->sc_dying) {
2312 1.116 augustss /* If we're dying, just do the software part. */
2313 1.116 augustss xfer->status = status; /* make software ignore it */
2314 1.224 mrg callout_halt(&xfer->timeout_handle, &sc->sc_lock);
2315 1.116 augustss usb_transfer_complete(xfer);
2316 1.170 christos return;
2317 1.116 augustss }
2318 1.116 augustss
2319 1.223 mrg if (cpu_intr_p() || cpu_softintr_p())
2320 1.128 provos panic("ohci_abort_xfer: not in process context");
2321 1.34 augustss
2322 1.106 augustss /*
2323 1.159 augustss * If an abort is already in progress then just wait for it to
2324 1.159 augustss * complete and return.
2325 1.159 augustss */
2326 1.159 augustss if (xfer->hcflags & UXFER_ABORTING) {
2327 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2328 1.159 augustss #ifdef DIAGNOSTIC
2329 1.159 augustss if (status == USBD_TIMEOUT)
2330 1.159 augustss printf("0hci_abort_xfer: TIMEOUT while aborting\n");
2331 1.159 augustss #endif
2332 1.159 augustss /* Override the status which might be USBD_TIMEOUT. */
2333 1.159 augustss xfer->status = status;
2334 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2335 1.159 augustss xfer->hcflags |= UXFER_ABORTWAIT;
2336 1.159 augustss while (xfer->hcflags & UXFER_ABORTING)
2337 1.224 mrg cv_wait(&xfer->hccv, &sc->sc_lock);
2338 1.224 mrg goto done;
2339 1.159 augustss return;
2340 1.159 augustss }
2341 1.159 augustss xfer->hcflags |= UXFER_ABORTING;
2342 1.159 augustss
2343 1.159 augustss /*
2344 1.106 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2345 1.106 augustss */
2346 1.106 augustss xfer->status = status; /* make software ignore it */
2347 1.209 dyoung callout_stop(&xfer->timeout_handle);
2348 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2349 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2350 1.195 bouyer sizeof(sed->ed.ed_flags),
2351 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2352 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2353 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2354 1.195 bouyer sizeof(sed->ed.ed_flags),
2355 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2356 1.34 augustss
2357 1.120 augustss /*
2358 1.106 augustss * Step 2: Wait until we know hardware has finished any possible
2359 1.106 augustss * use of the xfer. Also make sure the soft interrupt routine
2360 1.106 augustss * has run.
2361 1.106 augustss */
2362 1.224 mrg /* Hardware finishes in 1ms */
2363 1.224 mrg usb_delay_ms_locked(opipe->pipe.device->bus, 20, &sc->sc_lock);
2364 1.119 augustss sc->sc_softwake = 1;
2365 1.119 augustss usb_schedsoftintr(&sc->sc_bus);
2366 1.224 mrg cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
2367 1.119 augustss
2368 1.120 augustss /*
2369 1.106 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2370 1.106 augustss * The complication here is that the hardware may have executed
2371 1.106 augustss * beyond the xfer we're trying to abort. So as we're scanning
2372 1.106 augustss * the TDs of this xfer we check if the hardware points to
2373 1.106 augustss * any of them.
2374 1.106 augustss */
2375 1.53 augustss p = xfer->hcpriv;
2376 1.34 augustss #ifdef DIAGNOSTIC
2377 1.55 augustss if (p == NULL) {
2378 1.159 augustss xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2379 1.106 augustss printf("ohci_abort_xfer: hcpriv is NULL\n");
2380 1.224 mrg goto done;
2381 1.38 augustss }
2382 1.34 augustss #endif
2383 1.106 augustss #ifdef OHCI_DEBUG
2384 1.106 augustss if (ohcidebug > 1) {
2385 1.106 augustss DPRINTF(("ohci_abort_xfer: sed=\n"));
2386 1.168 augustss ohci_dump_ed(sc, sed);
2387 1.168 augustss ohci_dump_tds(sc, p);
2388 1.106 augustss }
2389 1.106 augustss #endif
2390 1.168 augustss headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2391 1.106 augustss hit = 0;
2392 1.53 augustss for (; p->xfer == xfer; p = n) {
2393 1.106 augustss hit |= headp == p->physaddr;
2394 1.38 augustss n = p->nexttd;
2395 1.38 augustss ohci_free_std(sc, p);
2396 1.34 augustss }
2397 1.106 augustss /* Zap headp register if hardware pointed inside the xfer. */
2398 1.106 augustss if (hit) {
2399 1.150 mycroft DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2400 1.168 augustss (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2401 1.168 augustss sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2402 1.195 bouyer usb_syncmem(&sed->dma,
2403 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_headp),
2404 1.195 bouyer sizeof(sed->ed.ed_headp),
2405 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2406 1.106 augustss } else {
2407 1.106 augustss DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2408 1.106 augustss }
2409 1.34 augustss
2410 1.106 augustss /*
2411 1.106 augustss * Step 4: Turn on hardware again.
2412 1.106 augustss */
2413 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2414 1.195 bouyer sizeof(sed->ed.ed_flags),
2415 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2416 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2417 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2418 1.195 bouyer sizeof(sed->ed.ed_flags),
2419 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2420 1.38 augustss
2421 1.106 augustss /*
2422 1.106 augustss * Step 5: Execute callback.
2423 1.106 augustss */
2424 1.159 augustss wake = xfer->hcflags & UXFER_ABORTWAIT;
2425 1.159 augustss xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2426 1.53 augustss usb_transfer_complete(xfer);
2427 1.159 augustss if (wake)
2428 1.224 mrg cv_broadcast(&xfer->hccv);
2429 1.38 augustss
2430 1.224 mrg done:
2431 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2432 1.34 augustss }
2433 1.34 augustss
2434 1.34 augustss /*
2435 1.1 augustss * Data structures and routines to emulate the root hub.
2436 1.1 augustss */
2437 1.82 augustss Static usb_device_descriptor_t ohci_devd = {
2438 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2439 1.1 augustss UDESC_DEVICE, /* type */
2440 1.1 augustss {0x00, 0x01}, /* USB version */
2441 1.74 augustss UDCLASS_HUB, /* class */
2442 1.74 augustss UDSUBCLASS_HUB, /* subclass */
2443 1.202 uebayasi UDPROTO_FSHUB, /* protocol */
2444 1.1 augustss 64, /* max packet */
2445 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2446 1.1 augustss 1,2,0, /* string indicies */
2447 1.1 augustss 1 /* # of configurations */
2448 1.1 augustss };
2449 1.1 augustss
2450 1.182 drochner Static const usb_config_descriptor_t ohci_confd = {
2451 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2452 1.1 augustss UDESC_CONFIG,
2453 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2454 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2455 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2456 1.1 augustss 1,
2457 1.1 augustss 1,
2458 1.1 augustss 0,
2459 1.180 drochner UC_ATTR_MBO | UC_SELF_POWERED,
2460 1.1 augustss 0 /* max power */
2461 1.1 augustss };
2462 1.1 augustss
2463 1.182 drochner Static const usb_interface_descriptor_t ohci_ifcd = {
2464 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2465 1.1 augustss UDESC_INTERFACE,
2466 1.1 augustss 0,
2467 1.1 augustss 0,
2468 1.1 augustss 1,
2469 1.74 augustss UICLASS_HUB,
2470 1.74 augustss UISUBCLASS_HUB,
2471 1.109 augustss UIPROTO_FSHUB,
2472 1.1 augustss 0
2473 1.1 augustss };
2474 1.1 augustss
2475 1.182 drochner Static const usb_endpoint_descriptor_t ohci_endpd = {
2476 1.175 christos .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2477 1.175 christos .bDescriptorType = UDESC_ENDPOINT,
2478 1.175 christos .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2479 1.175 christos .bmAttributes = UE_INTERRUPT,
2480 1.175 christos .wMaxPacketSize = {8, 0}, /* max packet */
2481 1.175 christos .bInterval = 255,
2482 1.1 augustss };
2483 1.1 augustss
2484 1.182 drochner Static const usb_hub_descriptor_t ohci_hubd = {
2485 1.175 christos .bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2486 1.175 christos .bDescriptorType = UDESC_HUB,
2487 1.1 augustss };
2488 1.1 augustss
2489 1.1 augustss /*
2490 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2491 1.1 augustss */
2492 1.82 augustss Static usbd_status
2493 1.91 augustss ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2494 1.1 augustss {
2495 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2496 1.53 augustss usbd_status err;
2497 1.17 augustss
2498 1.46 augustss /* Insert last in queue. */
2499 1.224 mrg mutex_enter(&sc->sc_lock);
2500 1.53 augustss err = usb_insert_transfer(xfer);
2501 1.224 mrg mutex_exit(&sc->sc_lock);
2502 1.53 augustss if (err)
2503 1.53 augustss return (err);
2504 1.46 augustss
2505 1.46 augustss /* Pipe isn't running, start first */
2506 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2507 1.17 augustss }
2508 1.17 augustss
2509 1.82 augustss Static usbd_status
2510 1.91 augustss ohci_root_ctrl_start(usbd_xfer_handle xfer)
2511 1.17 augustss {
2512 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2513 1.1 augustss usb_device_request_t *req;
2514 1.52 augustss void *buf = NULL;
2515 1.1 augustss int port, i;
2516 1.224 mrg int len, value, index, l, totlen = 0;
2517 1.1 augustss usb_port_status_t ps;
2518 1.1 augustss usb_hub_descriptor_t hubd;
2519 1.53 augustss usbd_status err;
2520 1.1 augustss u_int32_t v;
2521 1.1 augustss
2522 1.83 augustss if (sc->sc_dying)
2523 1.83 augustss return (USBD_IOERROR);
2524 1.83 augustss
2525 1.42 augustss #ifdef DIAGNOSTIC
2526 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
2527 1.1 augustss /* XXX panic */
2528 1.1 augustss return (USBD_INVAL);
2529 1.42 augustss #endif
2530 1.53 augustss req = &xfer->request;
2531 1.1 augustss
2532 1.120 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2533 1.1 augustss req->bmRequestType, req->bRequest));
2534 1.1 augustss
2535 1.1 augustss len = UGETW(req->wLength);
2536 1.1 augustss value = UGETW(req->wValue);
2537 1.1 augustss index = UGETW(req->wIndex);
2538 1.43 augustss
2539 1.43 augustss if (len != 0)
2540 1.123 augustss buf = KERNADDR(&xfer->dmabuf, 0);
2541 1.43 augustss
2542 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2543 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2544 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2545 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2546 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2547 1.120 augustss /*
2548 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2549 1.1 augustss * for the integrated root hub.
2550 1.1 augustss */
2551 1.1 augustss break;
2552 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2553 1.1 augustss if (len > 0) {
2554 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2555 1.1 augustss totlen = 1;
2556 1.1 augustss }
2557 1.1 augustss break;
2558 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2559 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2560 1.171 christos if (len == 0)
2561 1.171 christos break;
2562 1.1 augustss switch(value >> 8) {
2563 1.1 augustss case UDESC_DEVICE:
2564 1.1 augustss if ((value & 0xff) != 0) {
2565 1.53 augustss err = USBD_IOERROR;
2566 1.1 augustss goto ret;
2567 1.1 augustss }
2568 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2569 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2570 1.1 augustss memcpy(buf, &ohci_devd, l);
2571 1.1 augustss break;
2572 1.1 augustss case UDESC_CONFIG:
2573 1.1 augustss if ((value & 0xff) != 0) {
2574 1.53 augustss err = USBD_IOERROR;
2575 1.1 augustss goto ret;
2576 1.1 augustss }
2577 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2578 1.1 augustss memcpy(buf, &ohci_confd, l);
2579 1.1 augustss buf = (char *)buf + l;
2580 1.1 augustss len -= l;
2581 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2582 1.1 augustss totlen += l;
2583 1.1 augustss memcpy(buf, &ohci_ifcd, l);
2584 1.1 augustss buf = (char *)buf + l;
2585 1.1 augustss len -= l;
2586 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2587 1.1 augustss totlen += l;
2588 1.1 augustss memcpy(buf, &ohci_endpd, l);
2589 1.1 augustss break;
2590 1.1 augustss case UDESC_STRING:
2591 1.186 drochner #define sd ((usb_string_descriptor_t *)buf)
2592 1.1 augustss switch (value & 0xff) {
2593 1.152 augustss case 0: /* Language table */
2594 1.186 drochner totlen = usb_makelangtbl(sd, len);
2595 1.152 augustss break;
2596 1.1 augustss case 1: /* Vendor */
2597 1.186 drochner totlen = usb_makestrdesc(sd, len,
2598 1.186 drochner sc->sc_vendor);
2599 1.1 augustss break;
2600 1.1 augustss case 2: /* Product */
2601 1.186 drochner totlen = usb_makestrdesc(sd, len,
2602 1.186 drochner "OHCI root hub");
2603 1.1 augustss break;
2604 1.1 augustss }
2605 1.186 drochner #undef sd
2606 1.1 augustss break;
2607 1.1 augustss default:
2608 1.53 augustss err = USBD_IOERROR;
2609 1.1 augustss goto ret;
2610 1.1 augustss }
2611 1.1 augustss break;
2612 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2613 1.1 augustss if (len > 0) {
2614 1.1 augustss *(u_int8_t *)buf = 0;
2615 1.1 augustss totlen = 1;
2616 1.1 augustss }
2617 1.1 augustss break;
2618 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2619 1.1 augustss if (len > 1) {
2620 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2621 1.1 augustss totlen = 2;
2622 1.1 augustss }
2623 1.1 augustss break;
2624 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2625 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2626 1.1 augustss if (len > 1) {
2627 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2628 1.1 augustss totlen = 2;
2629 1.1 augustss }
2630 1.1 augustss break;
2631 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2632 1.1 augustss if (value >= USB_MAX_DEVICES) {
2633 1.53 augustss err = USBD_IOERROR;
2634 1.1 augustss goto ret;
2635 1.1 augustss }
2636 1.1 augustss sc->sc_addr = value;
2637 1.1 augustss break;
2638 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2639 1.1 augustss if (value != 0 && value != 1) {
2640 1.53 augustss err = USBD_IOERROR;
2641 1.1 augustss goto ret;
2642 1.1 augustss }
2643 1.1 augustss sc->sc_conf = value;
2644 1.1 augustss break;
2645 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2646 1.1 augustss break;
2647 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2648 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2649 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2650 1.53 augustss err = USBD_IOERROR;
2651 1.1 augustss goto ret;
2652 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2653 1.1 augustss break;
2654 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2655 1.1 augustss break;
2656 1.1 augustss /* Hub requests */
2657 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2658 1.1 augustss break;
2659 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2660 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2661 1.14 augustss "port=%d feature=%d\n",
2662 1.1 augustss index, value));
2663 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2664 1.53 augustss err = USBD_IOERROR;
2665 1.1 augustss goto ret;
2666 1.1 augustss }
2667 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2668 1.1 augustss switch(value) {
2669 1.1 augustss case UHF_PORT_ENABLE:
2670 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2671 1.1 augustss break;
2672 1.1 augustss case UHF_PORT_SUSPEND:
2673 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2674 1.1 augustss break;
2675 1.1 augustss case UHF_PORT_POWER:
2676 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2677 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2678 1.1 augustss break;
2679 1.1 augustss case UHF_C_PORT_CONNECTION:
2680 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2681 1.1 augustss break;
2682 1.1 augustss case UHF_C_PORT_ENABLE:
2683 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2684 1.1 augustss break;
2685 1.1 augustss case UHF_C_PORT_SUSPEND:
2686 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2687 1.1 augustss break;
2688 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2689 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2690 1.1 augustss break;
2691 1.1 augustss case UHF_C_PORT_RESET:
2692 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2693 1.1 augustss break;
2694 1.1 augustss default:
2695 1.53 augustss err = USBD_IOERROR;
2696 1.1 augustss goto ret;
2697 1.1 augustss }
2698 1.1 augustss switch(value) {
2699 1.1 augustss case UHF_C_PORT_CONNECTION:
2700 1.1 augustss case UHF_C_PORT_ENABLE:
2701 1.1 augustss case UHF_C_PORT_SUSPEND:
2702 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2703 1.1 augustss case UHF_C_PORT_RESET:
2704 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2705 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2706 1.157 mycroft ohci_rhsc_enable(sc);
2707 1.1 augustss break;
2708 1.1 augustss default:
2709 1.1 augustss break;
2710 1.1 augustss }
2711 1.1 augustss break;
2712 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2713 1.171 christos if (len == 0)
2714 1.171 christos break;
2715 1.146 toshii if ((value & 0xff) != 0) {
2716 1.53 augustss err = USBD_IOERROR;
2717 1.1 augustss goto ret;
2718 1.1 augustss }
2719 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2720 1.1 augustss hubd = ohci_hubd;
2721 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2722 1.15 augustss USETW(hubd.wHubCharacteristics,
2723 1.120 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2724 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2725 1.1 augustss /* XXX overcurrent */
2726 1.1 augustss );
2727 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2728 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2729 1.120 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2730 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
2731 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2732 1.1 augustss l = min(len, hubd.bDescLength);
2733 1.1 augustss totlen = l;
2734 1.1 augustss memcpy(buf, &hubd, l);
2735 1.1 augustss break;
2736 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2737 1.1 augustss if (len != 4) {
2738 1.53 augustss err = USBD_IOERROR;
2739 1.1 augustss goto ret;
2740 1.1 augustss }
2741 1.1 augustss memset(buf, 0, len); /* ? XXX */
2742 1.1 augustss totlen = len;
2743 1.1 augustss break;
2744 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2745 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2746 1.1 augustss index));
2747 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2748 1.53 augustss err = USBD_IOERROR;
2749 1.1 augustss goto ret;
2750 1.1 augustss }
2751 1.1 augustss if (len != 4) {
2752 1.53 augustss err = USBD_IOERROR;
2753 1.1 augustss goto ret;
2754 1.1 augustss }
2755 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2756 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2757 1.1 augustss v));
2758 1.1 augustss USETW(ps.wPortStatus, v);
2759 1.1 augustss USETW(ps.wPortChange, v >> 16);
2760 1.1 augustss l = min(len, sizeof ps);
2761 1.1 augustss memcpy(buf, &ps, l);
2762 1.1 augustss totlen = l;
2763 1.1 augustss break;
2764 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2765 1.53 augustss err = USBD_IOERROR;
2766 1.1 augustss goto ret;
2767 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2768 1.1 augustss break;
2769 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2770 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2771 1.53 augustss err = USBD_IOERROR;
2772 1.1 augustss goto ret;
2773 1.1 augustss }
2774 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2775 1.1 augustss switch(value) {
2776 1.1 augustss case UHF_PORT_ENABLE:
2777 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2778 1.1 augustss break;
2779 1.1 augustss case UHF_PORT_SUSPEND:
2780 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2781 1.1 augustss break;
2782 1.1 augustss case UHF_PORT_RESET:
2783 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2784 1.14 augustss index));
2785 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2786 1.110 augustss for (i = 0; i < 5; i++) {
2787 1.110 augustss usb_delay_ms(&sc->sc_bus,
2788 1.110 augustss USB_PORT_ROOT_RESET_DELAY);
2789 1.116 augustss if (sc->sc_dying) {
2790 1.116 augustss err = USBD_IOERROR;
2791 1.116 augustss goto ret;
2792 1.116 augustss }
2793 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2794 1.1 augustss break;
2795 1.1 augustss }
2796 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2797 1.1 augustss index, OREAD4(sc, port)));
2798 1.1 augustss break;
2799 1.1 augustss case UHF_PORT_POWER:
2800 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2801 1.14 augustss "%d\n", index));
2802 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2803 1.1 augustss break;
2804 1.1 augustss default:
2805 1.53 augustss err = USBD_IOERROR;
2806 1.1 augustss goto ret;
2807 1.1 augustss }
2808 1.1 augustss break;
2809 1.1 augustss default:
2810 1.53 augustss err = USBD_IOERROR;
2811 1.1 augustss goto ret;
2812 1.1 augustss }
2813 1.53 augustss xfer->actlen = totlen;
2814 1.53 augustss err = USBD_NORMAL_COMPLETION;
2815 1.1 augustss ret:
2816 1.53 augustss xfer->status = err;
2817 1.224 mrg mutex_enter(&sc->sc_lock);
2818 1.53 augustss usb_transfer_complete(xfer);
2819 1.224 mrg mutex_exit(&sc->sc_lock);
2820 1.1 augustss return (USBD_IN_PROGRESS);
2821 1.1 augustss }
2822 1.1 augustss
2823 1.1 augustss /* Abort a root control request. */
2824 1.82 augustss Static void
2825 1.179 christos ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2826 1.1 augustss {
2827 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2828 1.1 augustss }
2829 1.1 augustss
2830 1.1 augustss /* Close the root pipe. */
2831 1.82 augustss Static void
2832 1.179 christos ohci_root_ctrl_close(usbd_pipe_handle pipe)
2833 1.1 augustss {
2834 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2835 1.34 augustss /* Nothing to do. */
2836 1.1 augustss }
2837 1.1 augustss
2838 1.82 augustss Static usbd_status
2839 1.91 augustss ohci_root_intr_transfer(usbd_xfer_handle xfer)
2840 1.1 augustss {
2841 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2842 1.53 augustss usbd_status err;
2843 1.17 augustss
2844 1.46 augustss /* Insert last in queue. */
2845 1.224 mrg mutex_enter(&sc->sc_lock);
2846 1.53 augustss err = usb_insert_transfer(xfer);
2847 1.224 mrg mutex_exit(&sc->sc_lock);
2848 1.53 augustss if (err)
2849 1.53 augustss return (err);
2850 1.46 augustss
2851 1.46 augustss /* Pipe isn't running, start first */
2852 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2853 1.17 augustss }
2854 1.17 augustss
2855 1.82 augustss Static usbd_status
2856 1.91 augustss ohci_root_intr_start(usbd_xfer_handle xfer)
2857 1.17 augustss {
2858 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2859 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2860 1.1 augustss
2861 1.83 augustss if (sc->sc_dying)
2862 1.83 augustss return (USBD_IOERROR);
2863 1.83 augustss
2864 1.224 mrg mutex_enter(&sc->sc_lock);
2865 1.224 mrg KASSERT(sc->sc_intrxfer == NULL);
2866 1.53 augustss sc->sc_intrxfer = xfer;
2867 1.224 mrg mutex_exit(&sc->sc_lock);
2868 1.1 augustss
2869 1.1 augustss return (USBD_IN_PROGRESS);
2870 1.1 augustss }
2871 1.1 augustss
2872 1.3 augustss /* Abort a root interrupt request. */
2873 1.82 augustss Static void
2874 1.91 augustss ohci_root_intr_abort(usbd_xfer_handle xfer)
2875 1.1 augustss {
2876 1.224 mrg #ifdef DIAGNOSTIC
2877 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2878 1.224 mrg #endif
2879 1.224 mrg
2880 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2881 1.53 augustss
2882 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2883 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2884 1.53 augustss xfer->pipe->intrxfer = NULL;
2885 1.51 augustss }
2886 1.53 augustss xfer->status = USBD_CANCELLED;
2887 1.53 augustss usb_transfer_complete(xfer);
2888 1.1 augustss }
2889 1.1 augustss
2890 1.1 augustss /* Close the root pipe. */
2891 1.82 augustss Static void
2892 1.91 augustss ohci_root_intr_close(usbd_pipe_handle pipe)
2893 1.1 augustss {
2894 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2895 1.120 augustss
2896 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2897 1.224 mrg
2898 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2899 1.34 augustss
2900 1.53 augustss sc->sc_intrxfer = NULL;
2901 1.1 augustss }
2902 1.1 augustss
2903 1.1 augustss /************************/
2904 1.1 augustss
2905 1.82 augustss Static usbd_status
2906 1.91 augustss ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2907 1.1 augustss {
2908 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2909 1.53 augustss usbd_status err;
2910 1.17 augustss
2911 1.46 augustss /* Insert last in queue. */
2912 1.224 mrg mutex_enter(&sc->sc_lock);
2913 1.53 augustss err = usb_insert_transfer(xfer);
2914 1.224 mrg mutex_exit(&sc->sc_lock);
2915 1.53 augustss if (err)
2916 1.53 augustss return (err);
2917 1.46 augustss
2918 1.46 augustss /* Pipe isn't running, start first */
2919 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2920 1.17 augustss }
2921 1.17 augustss
2922 1.82 augustss Static usbd_status
2923 1.91 augustss ohci_device_ctrl_start(usbd_xfer_handle xfer)
2924 1.17 augustss {
2925 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2926 1.53 augustss usbd_status err;
2927 1.1 augustss
2928 1.83 augustss if (sc->sc_dying)
2929 1.83 augustss return (USBD_IOERROR);
2930 1.83 augustss
2931 1.42 augustss #ifdef DIAGNOSTIC
2932 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2933 1.1 augustss /* XXX panic */
2934 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2935 1.1 augustss return (USBD_INVAL);
2936 1.1 augustss }
2937 1.42 augustss #endif
2938 1.1 augustss
2939 1.224 mrg mutex_enter(&sc->sc_lock);
2940 1.53 augustss err = ohci_device_request(xfer);
2941 1.224 mrg mutex_exit(&sc->sc_lock);
2942 1.53 augustss if (err)
2943 1.53 augustss return (err);
2944 1.1 augustss
2945 1.6 augustss if (sc->sc_bus.use_polling)
2946 1.53 augustss ohci_waitintr(sc, xfer);
2947 1.1 augustss return (USBD_IN_PROGRESS);
2948 1.1 augustss }
2949 1.1 augustss
2950 1.1 augustss /* Abort a device control request. */
2951 1.82 augustss Static void
2952 1.91 augustss ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2953 1.1 augustss {
2954 1.224 mrg #ifdef DIAGNOSTIC
2955 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2956 1.224 mrg #endif
2957 1.224 mrg
2958 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2959 1.224 mrg
2960 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2961 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2962 1.1 augustss }
2963 1.1 augustss
2964 1.1 augustss /* Close a device control pipe. */
2965 1.82 augustss Static void
2966 1.91 augustss ohci_device_ctrl_close(usbd_pipe_handle pipe)
2967 1.1 augustss {
2968 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2969 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2970 1.1 augustss
2971 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2972 1.224 mrg
2973 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2974 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2975 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2976 1.3 augustss }
2977 1.3 augustss
2978 1.3 augustss /************************/
2979 1.37 augustss
2980 1.82 augustss Static void
2981 1.91 augustss ohci_device_clear_toggle(usbd_pipe_handle pipe)
2982 1.37 augustss {
2983 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2984 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2985 1.37 augustss
2986 1.168 augustss opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2987 1.37 augustss }
2988 1.37 augustss
2989 1.82 augustss Static void
2990 1.179 christos ohci_noop(usbd_pipe_handle pipe)
2991 1.37 augustss {
2992 1.37 augustss }
2993 1.3 augustss
2994 1.82 augustss Static usbd_status
2995 1.91 augustss ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2996 1.3 augustss {
2997 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2998 1.53 augustss usbd_status err;
2999 1.17 augustss
3000 1.46 augustss /* Insert last in queue. */
3001 1.224 mrg mutex_enter(&sc->sc_lock);
3002 1.53 augustss err = usb_insert_transfer(xfer);
3003 1.224 mrg mutex_exit(&sc->sc_lock);
3004 1.53 augustss if (err)
3005 1.53 augustss return (err);
3006 1.46 augustss
3007 1.46 augustss /* Pipe isn't running, start first */
3008 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3009 1.17 augustss }
3010 1.17 augustss
3011 1.82 augustss Static usbd_status
3012 1.91 augustss ohci_device_bulk_start(usbd_xfer_handle xfer)
3013 1.17 augustss {
3014 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3015 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
3016 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3017 1.3 augustss int addr = dev->address;
3018 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
3019 1.3 augustss ohci_soft_ed_t *sed;
3020 1.224 mrg int len, isread, endpt;
3021 1.53 augustss usbd_status err;
3022 1.3 augustss
3023 1.83 augustss if (sc->sc_dying)
3024 1.83 augustss return (USBD_IOERROR);
3025 1.83 augustss
3026 1.34 augustss #ifdef DIAGNOSTIC
3027 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
3028 1.3 augustss /* XXX panic */
3029 1.34 augustss printf("ohci_device_bulk_start: a request\n");
3030 1.3 augustss return (USBD_INVAL);
3031 1.3 augustss }
3032 1.34 augustss #endif
3033 1.3 augustss
3034 1.224 mrg mutex_enter(&sc->sc_lock);
3035 1.224 mrg
3036 1.53 augustss len = xfer->length;
3037 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3038 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3039 1.3 augustss sed = opipe->sed;
3040 1.3 augustss
3041 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
3042 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
3043 1.40 augustss endpt));
3044 1.34 augustss
3045 1.32 augustss opipe->u.bulk.isread = isread;
3046 1.3 augustss opipe->u.bulk.length = len;
3047 1.3 augustss
3048 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3049 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3050 1.3 augustss /* Update device address */
3051 1.168 augustss sed->ed.ed_flags = HTOO32(
3052 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
3053 1.16 augustss OHCI_ED_SET_FA(addr));
3054 1.3 augustss
3055 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
3056 1.60 augustss data = opipe->tail.td;
3057 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
3058 1.77 augustss data, &tail);
3059 1.77 augustss /* We want interrupt at the end of the transfer. */
3060 1.168 augustss tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
3061 1.168 augustss tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
3062 1.77 augustss tail->flags |= OHCI_CALL_DONE;
3063 1.77 augustss tail = tail->nexttd; /* point at sentinel */
3064 1.195 bouyer usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
3065 1.195 bouyer sizeof(tail->td.td_flags),
3066 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3067 1.224 mrg if (err) {
3068 1.224 mrg mutex_exit(&sc->sc_lock);
3069 1.53 augustss return (err);
3070 1.224 mrg }
3071 1.48 augustss
3072 1.53 augustss tail->xfer = NULL;
3073 1.53 augustss xfer->hcpriv = data;
3074 1.3 augustss
3075 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
3076 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
3077 1.168 augustss (int)O32TOH(sed->ed.ed_flags),
3078 1.168 augustss (int)O32TOH(data->td.td_flags),
3079 1.168 augustss (int)O32TOH(data->td.td_cbp),
3080 1.168 augustss (int)O32TOH(data->td.td_be)));
3081 1.34 augustss
3082 1.52 augustss #ifdef OHCI_DEBUG
3083 1.75 augustss if (ohcidebug > 5) {
3084 1.168 augustss ohci_dump_ed(sc, sed);
3085 1.168 augustss ohci_dump_tds(sc, data);
3086 1.34 augustss }
3087 1.34 augustss #endif
3088 1.34 augustss
3089 1.3 augustss /* Insert ED in schedule */
3090 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
3091 1.53 augustss tdp->xfer = xfer;
3092 1.48 augustss }
3093 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3094 1.60 augustss opipe->tail.td = tail;
3095 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3096 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3097 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3098 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3099 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
3100 1.209 dyoung callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
3101 1.80 augustss ohci_timeout, xfer);
3102 1.15 augustss }
3103 1.224 mrg mutex_exit(&sc->sc_lock);
3104 1.34 augustss
3105 1.52 augustss #if 0
3106 1.52 augustss /* This goes wrong if we are too slow. */
3107 1.75 augustss if (ohcidebug > 10) {
3108 1.75 augustss delay(10000);
3109 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3110 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3111 1.168 augustss ohci_dump_ed(sc, sed);
3112 1.168 augustss ohci_dump_tds(sc, data);
3113 1.34 augustss }
3114 1.34 augustss #endif
3115 1.34 augustss
3116 1.3 augustss return (USBD_IN_PROGRESS);
3117 1.3 augustss }
3118 1.3 augustss
3119 1.82 augustss Static void
3120 1.91 augustss ohci_device_bulk_abort(usbd_xfer_handle xfer)
3121 1.3 augustss {
3122 1.224 mrg #ifdef DIAGNOSTIC
3123 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3124 1.224 mrg #endif
3125 1.224 mrg
3126 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3127 1.224 mrg
3128 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3129 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3130 1.3 augustss }
3131 1.3 augustss
3132 1.120 augustss /*
3133 1.34 augustss * Close a device bulk pipe.
3134 1.34 augustss */
3135 1.82 augustss Static void
3136 1.91 augustss ohci_device_bulk_close(usbd_pipe_handle pipe)
3137 1.3 augustss {
3138 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3139 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3140 1.3 augustss
3141 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3142 1.224 mrg
3143 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3144 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
3145 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3146 1.1 augustss }
3147 1.1 augustss
3148 1.1 augustss /************************/
3149 1.1 augustss
3150 1.82 augustss Static usbd_status
3151 1.91 augustss ohci_device_intr_transfer(usbd_xfer_handle xfer)
3152 1.17 augustss {
3153 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3154 1.53 augustss usbd_status err;
3155 1.17 augustss
3156 1.46 augustss /* Insert last in queue. */
3157 1.224 mrg mutex_enter(&sc->sc_lock);
3158 1.53 augustss err = usb_insert_transfer(xfer);
3159 1.224 mrg mutex_exit(&sc->sc_lock);
3160 1.53 augustss if (err)
3161 1.53 augustss return (err);
3162 1.46 augustss
3163 1.46 augustss /* Pipe isn't running, start first */
3164 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3165 1.17 augustss }
3166 1.17 augustss
3167 1.82 augustss Static usbd_status
3168 1.91 augustss ohci_device_intr_start(usbd_xfer_handle xfer)
3169 1.1 augustss {
3170 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3171 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
3172 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3173 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
3174 1.48 augustss ohci_soft_td_t *data, *tail;
3175 1.224 mrg int len, isread, endpt;
3176 1.1 augustss
3177 1.83 augustss if (sc->sc_dying)
3178 1.83 augustss return (USBD_IOERROR);
3179 1.83 augustss
3180 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3181 1.14 augustss "flags=%d priv=%p\n",
3182 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
3183 1.1 augustss
3184 1.42 augustss #ifdef DIAGNOSTIC
3185 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
3186 1.128 provos panic("ohci_device_intr_transfer: a request");
3187 1.42 augustss #endif
3188 1.1 augustss
3189 1.53 augustss len = xfer->length;
3190 1.165 skrll endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3191 1.165 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3192 1.1 augustss
3193 1.60 augustss data = opipe->tail.td;
3194 1.224 mrg mutex_enter(&sc->sc_lock);
3195 1.1 augustss tail = ohci_alloc_std(sc);
3196 1.224 mrg mutex_exit(&sc->sc_lock);
3197 1.55 augustss if (tail == NULL)
3198 1.43 augustss return (USBD_NOMEM);
3199 1.53 augustss tail->xfer = NULL;
3200 1.1 augustss
3201 1.168 augustss data->td.td_flags = HTOO32(
3202 1.165 skrll isread ? OHCI_TD_IN : OHCI_TD_OUT |
3203 1.165 skrll OHCI_TD_NOCC |
3204 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3205 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
3206 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
3207 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3208 1.48 augustss data->nexttd = tail;
3209 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
3210 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3211 1.48 augustss data->len = len;
3212 1.53 augustss data->xfer = xfer;
3213 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3214 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
3215 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3216 1.53 augustss xfer->hcpriv = data;
3217 1.1 augustss
3218 1.52 augustss #ifdef OHCI_DEBUG
3219 1.1 augustss if (ohcidebug > 5) {
3220 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
3221 1.168 augustss ohci_dump_ed(sc, sed);
3222 1.168 augustss ohci_dump_tds(sc, data);
3223 1.1 augustss }
3224 1.1 augustss #endif
3225 1.1 augustss
3226 1.1 augustss /* Insert ED in schedule */
3227 1.224 mrg mutex_enter(&sc->sc_lock);
3228 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3229 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3230 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3231 1.60 augustss opipe->tail.td = tail;
3232 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3233 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3234 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3235 1.1 augustss
3236 1.52 augustss #if 0
3237 1.52 augustss /*
3238 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
3239 1.52 augustss * because false references are followed due to the fact that the
3240 1.52 augustss * TD is gone.
3241 1.52 augustss */
3242 1.1 augustss if (ohcidebug > 5) {
3243 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock);
3244 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3245 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3246 1.168 augustss ohci_dump_ed(sc, sed);
3247 1.168 augustss ohci_dump_tds(sc, data);
3248 1.1 augustss }
3249 1.1 augustss #endif
3250 1.224 mrg mutex_exit(&sc->sc_lock);
3251 1.1 augustss
3252 1.1 augustss return (USBD_IN_PROGRESS);
3253 1.1 augustss }
3254 1.1 augustss
3255 1.227 skrll /* Abort a device interrupt request. */
3256 1.82 augustss Static void
3257 1.91 augustss ohci_device_intr_abort(usbd_xfer_handle xfer)
3258 1.1 augustss {
3259 1.224 mrg #ifdef DIAGNOSTIC
3260 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3261 1.224 mrg #endif
3262 1.224 mrg
3263 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3264 1.224 mrg
3265 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
3266 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
3267 1.55 augustss xfer->pipe->intrxfer = NULL;
3268 1.1 augustss }
3269 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3270 1.1 augustss }
3271 1.1 augustss
3272 1.1 augustss /* Close a device interrupt pipe. */
3273 1.82 augustss Static void
3274 1.91 augustss ohci_device_intr_close(usbd_pipe_handle pipe)
3275 1.1 augustss {
3276 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3277 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3278 1.1 augustss int nslots = opipe->u.intr.nslots;
3279 1.1 augustss int pos = opipe->u.intr.pos;
3280 1.1 augustss int j;
3281 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
3282 1.224 mrg
3283 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3284 1.1 augustss
3285 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3286 1.1 augustss pipe, nslots, pos));
3287 1.195 bouyer usb_syncmem(&sed->dma, sed->offs,
3288 1.195 bouyer sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3289 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3290 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3291 1.195 bouyer sizeof(sed->ed.ed_flags),
3292 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3293 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3294 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3295 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
3296 1.1 augustss
3297 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3298 1.172 christos continue;
3299 1.53 augustss #ifdef DIAGNOSTIC
3300 1.173 christos if (p == NULL)
3301 1.128 provos panic("ohci_device_intr_close: ED not found");
3302 1.53 augustss #endif
3303 1.173 christos p->next = sed->next;
3304 1.173 christos p->ed.ed_nexted = sed->ed.ed_nexted;
3305 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3306 1.195 bouyer sizeof(p->ed.ed_nexted),
3307 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3308 1.1 augustss
3309 1.1 augustss for (j = 0; j < nslots; j++)
3310 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3311 1.1 augustss
3312 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3313 1.1 augustss ohci_free_sed(sc, opipe->sed);
3314 1.1 augustss }
3315 1.1 augustss
3316 1.82 augustss Static usbd_status
3317 1.91 augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3318 1.1 augustss {
3319 1.224 mrg int i, j, best;
3320 1.1 augustss u_int npoll, slow, shigh, nslots;
3321 1.1 augustss u_int bestbw, bw;
3322 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
3323 1.1 augustss
3324 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3325 1.1 augustss if (ival == 0) {
3326 1.1 augustss printf("ohci_setintr: 0 interval\n");
3327 1.1 augustss return (USBD_INVAL);
3328 1.1 augustss }
3329 1.1 augustss
3330 1.1 augustss npoll = OHCI_NO_INTRS;
3331 1.1 augustss while (npoll > ival)
3332 1.1 augustss npoll /= 2;
3333 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3334 1.1 augustss
3335 1.1 augustss /*
3336 1.1 augustss * We now know which level in the tree the ED must go into.
3337 1.1 augustss * Figure out which slot has most bandwidth left over.
3338 1.1 augustss * Slots to examine:
3339 1.1 augustss * npoll
3340 1.1 augustss * 1 0
3341 1.1 augustss * 2 1 2
3342 1.1 augustss * 4 3 4 5 6
3343 1.1 augustss * 8 7 8 9 10 11 12 13 14
3344 1.1 augustss * N (N-1) .. (N-1+N-1)
3345 1.1 augustss */
3346 1.1 augustss slow = npoll-1;
3347 1.1 augustss shigh = slow + npoll;
3348 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
3349 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3350 1.1 augustss bw = 0;
3351 1.1 augustss for (j = 0; j < nslots; j++)
3352 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3353 1.1 augustss if (bw < bestbw) {
3354 1.1 augustss best = i;
3355 1.1 augustss bestbw = bw;
3356 1.1 augustss }
3357 1.1 augustss }
3358 1.120 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3359 1.1 augustss best, slow, shigh, bestbw));
3360 1.1 augustss
3361 1.224 mrg mutex_enter(&sc->sc_lock);
3362 1.1 augustss hsed = sc->sc_eds[best];
3363 1.1 augustss sed->next = hsed->next;
3364 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3365 1.195 bouyer sizeof(hsed->ed.ed_flags),
3366 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3367 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
3368 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3369 1.195 bouyer sizeof(sed->ed.ed_flags),
3370 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3371 1.1 augustss hsed->next = sed;
3372 1.168 augustss hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3373 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3374 1.195 bouyer sizeof(hsed->ed.ed_flags),
3375 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3376 1.224 mrg mutex_exit(&sc->sc_lock);
3377 1.1 augustss
3378 1.1 augustss for (j = 0; j < nslots; j++)
3379 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3380 1.1 augustss opipe->u.intr.nslots = nslots;
3381 1.1 augustss opipe->u.intr.pos = best;
3382 1.1 augustss
3383 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3384 1.1 augustss return (USBD_NORMAL_COMPLETION);
3385 1.60 augustss }
3386 1.60 augustss
3387 1.60 augustss /***********************/
3388 1.60 augustss
3389 1.60 augustss usbd_status
3390 1.91 augustss ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3391 1.60 augustss {
3392 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3393 1.60 augustss usbd_status err;
3394 1.60 augustss
3395 1.60 augustss DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3396 1.60 augustss
3397 1.60 augustss /* Put it on our queue, */
3398 1.224 mrg mutex_enter(&sc->sc_lock);
3399 1.60 augustss err = usb_insert_transfer(xfer);
3400 1.224 mrg mutex_exit(&sc->sc_lock);
3401 1.60 augustss
3402 1.60 augustss /* bail out on error, */
3403 1.60 augustss if (err && err != USBD_IN_PROGRESS)
3404 1.60 augustss return (err);
3405 1.60 augustss
3406 1.60 augustss /* XXX should check inuse here */
3407 1.60 augustss
3408 1.60 augustss /* insert into schedule, */
3409 1.60 augustss ohci_device_isoc_enter(xfer);
3410 1.60 augustss
3411 1.83 augustss /* and start if the pipe wasn't running */
3412 1.60 augustss if (!err)
3413 1.60 augustss ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3414 1.60 augustss
3415 1.60 augustss return (err);
3416 1.60 augustss }
3417 1.60 augustss
3418 1.60 augustss void
3419 1.91 augustss ohci_device_isoc_enter(usbd_xfer_handle xfer)
3420 1.60 augustss {
3421 1.61 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3422 1.61 augustss usbd_device_handle dev = opipe->pipe.device;
3423 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3424 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
3425 1.61 augustss struct iso *iso = &opipe->u.iso;
3426 1.120 augustss ohci_soft_itd_t *sitd, *nsitd;
3427 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
3428 1.61 augustss int i, ncur, nframes;
3429 1.61 augustss
3430 1.83 augustss DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3431 1.83 augustss "nframes=%d\n",
3432 1.83 augustss iso->inuse, iso->next, xfer, xfer->nframes));
3433 1.83 augustss
3434 1.83 augustss if (sc->sc_dying)
3435 1.83 augustss return;
3436 1.83 augustss
3437 1.83 augustss if (iso->next == -1) {
3438 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
3439 1.168 augustss iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3440 1.120 augustss DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3441 1.83 augustss iso->next));
3442 1.83 augustss }
3443 1.83 augustss
3444 1.61 augustss sitd = opipe->tail.itd;
3445 1.125 augustss buf = DMAADDR(&xfer->dmabuf, 0);
3446 1.83 augustss bp0 = OHCI_PAGE(buf);
3447 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
3448 1.61 augustss nframes = xfer->nframes;
3449 1.83 augustss xfer->hcpriv = sitd;
3450 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
3451 1.83 augustss noffs = offs + xfer->frlengths[i];
3452 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3453 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3454 1.120 augustss
3455 1.83 augustss /* Allocate next ITD */
3456 1.224 mrg mutex_enter(&sc->sc_lock);
3457 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3458 1.224 mrg mutex_exit(&sc->sc_lock);
3459 1.61 augustss if (nsitd == NULL) {
3460 1.61 augustss /* XXX what now? */
3461 1.83 augustss printf("%s: isoc TD alloc failed\n",
3462 1.190 drochner device_xname(sc->sc_dev));
3463 1.61 augustss return;
3464 1.61 augustss }
3465 1.83 augustss
3466 1.83 augustss /* Fill current ITD */
3467 1.168 augustss sitd->itd.itd_flags = HTOO32(
3468 1.120 augustss OHCI_ITD_NOCC |
3469 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3470 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
3471 1.83 augustss OHCI_ITD_SET_FC(ncur));
3472 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3473 1.83 augustss sitd->nextitd = nsitd;
3474 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3475 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3476 1.83 augustss sitd->xfer = xfer;
3477 1.83 augustss sitd->flags = 0;
3478 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3479 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3480 1.83 augustss
3481 1.61 augustss sitd = nsitd;
3482 1.120 augustss iso->next = iso->next + ncur;
3483 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
3484 1.61 augustss ncur = 0;
3485 1.61 augustss }
3486 1.168 augustss sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3487 1.83 augustss offs = noffs;
3488 1.61 augustss }
3489 1.224 mrg mutex_enter(&sc->sc_lock);
3490 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3491 1.224 mrg mutex_exit(&sc->sc_lock);
3492 1.61 augustss if (nsitd == NULL) {
3493 1.61 augustss /* XXX what now? */
3494 1.120 augustss printf("%s: isoc TD alloc failed\n",
3495 1.190 drochner device_xname(sc->sc_dev));
3496 1.61 augustss return;
3497 1.61 augustss }
3498 1.83 augustss /* Fixup last used ITD */
3499 1.168 augustss sitd->itd.itd_flags = HTOO32(
3500 1.120 augustss OHCI_ITD_NOCC |
3501 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3502 1.61 augustss OHCI_ITD_SET_DI(0) |
3503 1.61 augustss OHCI_ITD_SET_FC(ncur));
3504 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3505 1.83 augustss sitd->nextitd = nsitd;
3506 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3507 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3508 1.83 augustss sitd->xfer = xfer;
3509 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3510 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3511 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3512 1.83 augustss
3513 1.61 augustss iso->next = iso->next + ncur;
3514 1.83 augustss iso->inuse += nframes;
3515 1.83 augustss
3516 1.83 augustss xfer->actlen = offs; /* XXX pretend we did it all */
3517 1.83 augustss
3518 1.83 augustss xfer->status = USBD_IN_PROGRESS;
3519 1.83 augustss
3520 1.83 augustss #ifdef OHCI_DEBUG
3521 1.83 augustss if (ohcidebug > 5) {
3522 1.83 augustss DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3523 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3524 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3525 1.168 augustss ohci_dump_ed(sc, sed);
3526 1.83 augustss }
3527 1.83 augustss #endif
3528 1.61 augustss
3529 1.224 mrg mutex_enter(&sc->sc_lock);
3530 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3531 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3532 1.168 augustss sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3533 1.61 augustss opipe->tail.itd = nsitd;
3534 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3535 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3536 1.195 bouyer sizeof(sed->ed.ed_flags),
3537 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3538 1.224 mrg mutex_exit(&sc->sc_lock);
3539 1.83 augustss
3540 1.83 augustss #ifdef OHCI_DEBUG
3541 1.83 augustss if (ohcidebug > 5) {
3542 1.83 augustss delay(150000);
3543 1.83 augustss DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3544 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3545 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3546 1.168 augustss ohci_dump_ed(sc, sed);
3547 1.83 augustss }
3548 1.83 augustss #endif
3549 1.60 augustss }
3550 1.60 augustss
3551 1.60 augustss usbd_status
3552 1.91 augustss ohci_device_isoc_start(usbd_xfer_handle xfer)
3553 1.60 augustss {
3554 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3555 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3556 1.83 augustss
3557 1.83 augustss DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3558 1.83 augustss
3559 1.224 mrg mutex_enter(&sc->sc_lock);
3560 1.224 mrg
3561 1.224 mrg if (sc->sc_dying) {
3562 1.224 mrg mutex_exit(&sc->sc_lock);
3563 1.83 augustss return (USBD_IOERROR);
3564 1.224 mrg }
3565 1.83 augustss
3566 1.83 augustss #ifdef DIAGNOSTIC
3567 1.83 augustss if (xfer->status != USBD_IN_PROGRESS)
3568 1.121 tsutsui printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3569 1.83 augustss #endif
3570 1.83 augustss
3571 1.83 augustss /* XXX anything to do? */
3572 1.83 augustss
3573 1.224 mrg mutex_exit(&sc->sc_lock);
3574 1.224 mrg
3575 1.83 augustss return (USBD_IN_PROGRESS);
3576 1.60 augustss }
3577 1.60 augustss
3578 1.60 augustss void
3579 1.91 augustss ohci_device_isoc_abort(usbd_xfer_handle xfer)
3580 1.60 augustss {
3581 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3582 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3583 1.83 augustss ohci_soft_ed_t *sed;
3584 1.83 augustss ohci_soft_itd_t *sitd;
3585 1.83 augustss
3586 1.224 mrg DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p lock=%p\n", xfer, &sc->sc_lock));
3587 1.83 augustss
3588 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3589 1.83 augustss
3590 1.83 augustss /* Transfer is already done. */
3591 1.120 augustss if (xfer->status != USBD_NOT_STARTED &&
3592 1.83 augustss xfer->status != USBD_IN_PROGRESS) {
3593 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3594 1.224 mrg goto done;
3595 1.83 augustss }
3596 1.83 augustss
3597 1.83 augustss /* Give xfer the requested abort code. */
3598 1.83 augustss xfer->status = USBD_CANCELLED;
3599 1.83 augustss
3600 1.83 augustss sed = opipe->sed;
3601 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3602 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3603 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3604 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3605 1.195 bouyer sizeof(sed->ed.ed_flags),
3606 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3607 1.83 augustss
3608 1.83 augustss sitd = xfer->hcpriv;
3609 1.83 augustss #ifdef DIAGNOSTIC
3610 1.83 augustss if (sitd == NULL) {
3611 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3612 1.224 mrg goto done;
3613 1.83 augustss }
3614 1.83 augustss #endif
3615 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3616 1.83 augustss #ifdef DIAGNOSTIC
3617 1.83 augustss DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3618 1.83 augustss sitd->isdone = 1;
3619 1.83 augustss #endif
3620 1.83 augustss }
3621 1.83 augustss
3622 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
3623 1.83 augustss
3624 1.83 augustss /* Run callback. */
3625 1.83 augustss usb_transfer_complete(xfer);
3626 1.83 augustss
3627 1.168 augustss sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3628 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3629 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3630 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3631 1.83 augustss
3632 1.224 mrg done:
3633 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3634 1.60 augustss }
3635 1.60 augustss
3636 1.60 augustss void
3637 1.179 christos ohci_device_isoc_done(usbd_xfer_handle xfer)
3638 1.60 augustss {
3639 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3640 1.60 augustss }
3641 1.60 augustss
3642 1.60 augustss usbd_status
3643 1.91 augustss ohci_setup_isoc(usbd_pipe_handle pipe)
3644 1.60 augustss {
3645 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3646 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3647 1.60 augustss struct iso *iso = &opipe->u.iso;
3648 1.60 augustss
3649 1.60 augustss iso->next = -1;
3650 1.60 augustss iso->inuse = 0;
3651 1.60 augustss
3652 1.224 mrg mutex_enter(&sc->sc_lock);
3653 1.168 augustss ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3654 1.224 mrg mutex_exit(&sc->sc_lock);
3655 1.83 augustss
3656 1.60 augustss return (USBD_NORMAL_COMPLETION);
3657 1.60 augustss }
3658 1.60 augustss
3659 1.60 augustss void
3660 1.91 augustss ohci_device_isoc_close(usbd_pipe_handle pipe)
3661 1.60 augustss {
3662 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3663 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3664 1.60 augustss
3665 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3666 1.224 mrg
3667 1.60 augustss DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3668 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3669 1.83 augustss #ifdef DIAGNOSTIC
3670 1.83 augustss opipe->tail.itd->isdone = 1;
3671 1.83 augustss #endif
3672 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3673 1.1 augustss }
3674