ohci.c revision 1.235 1 1.235 skrll /* $NetBSD: ohci.c,v 1.235 2013/03/22 13:28:11 skrll Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.224 mrg * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
9 1.224 mrg * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
10 1.224 mrg * and Matthew R. Green (mrg (at) eterna.com.au).
11 1.157 mycroft * This code is derived from software contributed to The NetBSD Foundation
12 1.157 mycroft * by Charles M. Hannum.
13 1.1 augustss *
14 1.1 augustss * Redistribution and use in source and binary forms, with or without
15 1.1 augustss * modification, are permitted provided that the following conditions
16 1.1 augustss * are met:
17 1.1 augustss * 1. Redistributions of source code must retain the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer.
19 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 augustss * notice, this list of conditions and the following disclaimer in the
21 1.1 augustss * documentation and/or other materials provided with the distribution.
22 1.1 augustss *
23 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /*
37 1.1 augustss * USB Open Host Controller driver.
38 1.1 augustss *
39 1.96 augustss * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
40 1.201 uebayasi * USB spec: http://www.usb.org/developers/docs/
41 1.1 augustss */
42 1.108 lukem
43 1.108 lukem #include <sys/cdefs.h>
44 1.235 skrll __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.235 2013/03/22 13:28:11 skrll Exp $");
45 1.1 augustss
46 1.1 augustss #include <sys/param.h>
47 1.1 augustss #include <sys/systm.h>
48 1.224 mrg #include <sys/kmem.h>
49 1.55 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/device.h>
51 1.55 augustss #include <sys/select.h>
52 1.1 augustss #include <sys/proc.h>
53 1.1 augustss #include <sys/queue.h>
54 1.223 mrg #include <sys/cpu.h>
55 1.1 augustss
56 1.16 augustss #include <machine/endian.h>
57 1.4 augustss
58 1.1 augustss #include <dev/usb/usb.h>
59 1.1 augustss #include <dev/usb/usbdi.h>
60 1.1 augustss #include <dev/usb/usbdivar.h>
61 1.38 augustss #include <dev/usb/usb_mem.h>
62 1.1 augustss #include <dev/usb/usb_quirks.h>
63 1.1 augustss
64 1.1 augustss #include <dev/usb/ohcireg.h>
65 1.1 augustss #include <dev/usb/ohcivar.h>
66 1.186 drochner #include <dev/usb/usbroothub_subr.h>
67 1.1 augustss
68 1.1 augustss
69 1.36 augustss
70 1.52 augustss #ifdef OHCI_DEBUG
71 1.209 dyoung #define DPRINTF(x) if (ohcidebug) printf x
72 1.209 dyoung #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x
73 1.52 augustss int ohcidebug = 0;
74 1.52 augustss #else
75 1.52 augustss #define DPRINTF(x)
76 1.52 augustss #define DPRINTFN(n,x)
77 1.52 augustss #endif
78 1.52 augustss
79 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
80 1.169 tron #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
81 1.16 augustss #else
82 1.169 tron #define SWAP_ENDIAN OHCI_BIG_ENDIAN
83 1.16 augustss #endif
84 1.16 augustss
85 1.169 tron #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
86 1.169 tron #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
87 1.169 tron #define HTOO16(val) O16TOH(val)
88 1.169 tron #define HTOO32(val) O32TOH(val)
89 1.168 augustss
90 1.1 augustss struct ohci_pipe;
91 1.1 augustss
92 1.91 augustss Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
93 1.91 augustss Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
94 1.1 augustss
95 1.91 augustss Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
96 1.91 augustss Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
97 1.1 augustss
98 1.91 augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
99 1.91 augustss Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
100 1.60 augustss
101 1.53 augustss #if 0
102 1.91 augustss Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
103 1.91 augustss ohci_soft_td_t *);
104 1.53 augustss #endif
105 1.91 augustss Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
106 1.77 augustss ohci_softc_t *, int, int, usbd_xfer_handle,
107 1.91 augustss ohci_soft_td_t *, ohci_soft_td_t **);
108 1.53 augustss
109 1.91 augustss Static usbd_status ohci_open(usbd_pipe_handle);
110 1.91 augustss Static void ohci_poll(struct usbd_bus *);
111 1.99 augustss Static void ohci_softintr(void *);
112 1.91 augustss Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
113 1.91 augustss Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
114 1.224 mrg Static void ohci_rhsc_softint(void *arg);
115 1.91 augustss
116 1.91 augustss Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
117 1.168 augustss Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
118 1.168 augustss ohci_soft_ed_t *);
119 1.168 augustss
120 1.224 mrg Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
121 1.224 mrg ohci_soft_ed_t *);
122 1.91 augustss Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
123 1.91 augustss Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
124 1.91 augustss Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
125 1.91 augustss Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
126 1.91 augustss Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
127 1.91 augustss Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
128 1.91 augustss
129 1.91 augustss Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
130 1.91 augustss Static void ohci_device_isoc_enter(usbd_xfer_handle);
131 1.91 augustss
132 1.91 augustss Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
133 1.91 augustss Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
134 1.91 augustss
135 1.91 augustss Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
136 1.91 augustss Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
137 1.224 mrg Static void ohci_get_lock(struct usbd_bus *, kmutex_t **);
138 1.91 augustss
139 1.91 augustss Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
140 1.91 augustss Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
141 1.91 augustss Static void ohci_root_ctrl_abort(usbd_xfer_handle);
142 1.91 augustss Static void ohci_root_ctrl_close(usbd_pipe_handle);
143 1.91 augustss Static void ohci_root_ctrl_done(usbd_xfer_handle);
144 1.91 augustss
145 1.91 augustss Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
146 1.91 augustss Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
147 1.91 augustss Static void ohci_root_intr_abort(usbd_xfer_handle);
148 1.91 augustss Static void ohci_root_intr_close(usbd_pipe_handle);
149 1.91 augustss Static void ohci_root_intr_done(usbd_xfer_handle);
150 1.91 augustss
151 1.91 augustss Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
152 1.91 augustss Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
153 1.91 augustss Static void ohci_device_ctrl_abort(usbd_xfer_handle);
154 1.91 augustss Static void ohci_device_ctrl_close(usbd_pipe_handle);
155 1.91 augustss Static void ohci_device_ctrl_done(usbd_xfer_handle);
156 1.91 augustss
157 1.91 augustss Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
158 1.91 augustss Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
159 1.91 augustss Static void ohci_device_bulk_abort(usbd_xfer_handle);
160 1.91 augustss Static void ohci_device_bulk_close(usbd_pipe_handle);
161 1.91 augustss Static void ohci_device_bulk_done(usbd_xfer_handle);
162 1.91 augustss
163 1.91 augustss Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
164 1.91 augustss Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
165 1.91 augustss Static void ohci_device_intr_abort(usbd_xfer_handle);
166 1.91 augustss Static void ohci_device_intr_close(usbd_pipe_handle);
167 1.91 augustss Static void ohci_device_intr_done(usbd_xfer_handle);
168 1.91 augustss
169 1.91 augustss Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
170 1.91 augustss Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
171 1.91 augustss Static void ohci_device_isoc_abort(usbd_xfer_handle);
172 1.91 augustss Static void ohci_device_isoc_close(usbd_pipe_handle);
173 1.91 augustss Static void ohci_device_isoc_done(usbd_xfer_handle);
174 1.91 augustss
175 1.120 augustss Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
176 1.91 augustss struct ohci_pipe *pipe, int ival);
177 1.91 augustss
178 1.91 augustss Static void ohci_timeout(void *);
179 1.114 augustss Static void ohci_timeout_task(void *);
180 1.104 augustss Static void ohci_rhsc_enable(void *);
181 1.91 augustss
182 1.91 augustss Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
183 1.91 augustss Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
184 1.53 augustss
185 1.91 augustss Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
186 1.91 augustss Static void ohci_noop(usbd_pipe_handle pipe);
187 1.37 augustss
188 1.52 augustss #ifdef OHCI_DEBUG
189 1.91 augustss Static void ohci_dumpregs(ohci_softc_t *);
190 1.168 augustss Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
191 1.168 augustss Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
192 1.168 augustss Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
193 1.168 augustss Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
194 1.168 augustss Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
195 1.1 augustss #endif
196 1.1 augustss
197 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
198 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
199 1.88 augustss #define OWRITE1(sc, r, x) \
200 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
201 1.88 augustss #define OWRITE2(sc, r, x) \
202 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
203 1.88 augustss #define OWRITE4(sc, r, x) \
204 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
205 1.174 mrg static __inline uint8_t
206 1.174 mrg OREAD1(ohci_softc_t *sc, bus_size_t r)
207 1.174 mrg {
208 1.174 mrg
209 1.174 mrg OBARR(sc);
210 1.174 mrg return bus_space_read_1(sc->iot, sc->ioh, r);
211 1.174 mrg }
212 1.174 mrg
213 1.174 mrg static __inline uint16_t
214 1.174 mrg OREAD2(ohci_softc_t *sc, bus_size_t r)
215 1.174 mrg {
216 1.174 mrg
217 1.174 mrg OBARR(sc);
218 1.174 mrg return bus_space_read_2(sc->iot, sc->ioh, r);
219 1.174 mrg }
220 1.174 mrg
221 1.174 mrg static __inline uint32_t
222 1.174 mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
223 1.174 mrg {
224 1.174 mrg
225 1.174 mrg OBARR(sc);
226 1.174 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
227 1.174 mrg }
228 1.1 augustss
229 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
230 1.120 augustss Static u_int8_t revbits[OHCI_NO_INTRS] =
231 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
232 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
233 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
234 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
235 1.1 augustss
236 1.1 augustss struct ohci_pipe {
237 1.1 augustss struct usbd_pipe pipe;
238 1.1 augustss ohci_soft_ed_t *sed;
239 1.60 augustss union {
240 1.60 augustss ohci_soft_td_t *td;
241 1.60 augustss ohci_soft_itd_t *itd;
242 1.60 augustss } tail;
243 1.1 augustss /* Info needed for different pipe kinds. */
244 1.1 augustss union {
245 1.1 augustss /* Control pipe */
246 1.1 augustss struct {
247 1.4 augustss usb_dma_t reqdma;
248 1.1 augustss u_int length;
249 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
250 1.1 augustss } ctl;
251 1.1 augustss /* Interrupt pipe */
252 1.1 augustss struct {
253 1.1 augustss int nslots;
254 1.1 augustss int pos;
255 1.1 augustss } intr;
256 1.3 augustss /* Bulk pipe */
257 1.3 augustss struct {
258 1.3 augustss u_int length;
259 1.32 augustss int isread;
260 1.3 augustss } bulk;
261 1.43 augustss /* Iso pipe */
262 1.43 augustss struct iso {
263 1.60 augustss int next, inuse;
264 1.43 augustss } iso;
265 1.1 augustss } u;
266 1.1 augustss };
267 1.1 augustss
268 1.1 augustss #define OHCI_INTR_ENDPT 1
269 1.1 augustss
270 1.182 drochner Static const struct usbd_bus_methods ohci_bus_methods = {
271 1.221 mrg .open_pipe = ohci_open,
272 1.221 mrg .soft_intr = ohci_softintr,
273 1.221 mrg .do_poll = ohci_poll,
274 1.221 mrg .allocm = ohci_allocm,
275 1.221 mrg .freem = ohci_freem,
276 1.221 mrg .allocx = ohci_allocx,
277 1.221 mrg .freex = ohci_freex,
278 1.224 mrg .get_lock = ohci_get_lock,
279 1.42 augustss };
280 1.42 augustss
281 1.182 drochner Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
282 1.221 mrg .transfer = ohci_root_ctrl_transfer,
283 1.221 mrg .start = ohci_root_ctrl_start,
284 1.221 mrg .abort = ohci_root_ctrl_abort,
285 1.221 mrg .close = ohci_root_ctrl_close,
286 1.221 mrg .cleartoggle = ohci_noop,
287 1.221 mrg .done = ohci_root_ctrl_done,
288 1.1 augustss };
289 1.1 augustss
290 1.182 drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
291 1.221 mrg .transfer = ohci_root_intr_transfer,
292 1.221 mrg .start = ohci_root_intr_start,
293 1.221 mrg .abort = ohci_root_intr_abort,
294 1.221 mrg .close = ohci_root_intr_close,
295 1.221 mrg .cleartoggle = ohci_noop,
296 1.221 mrg .done = ohci_root_intr_done,
297 1.1 augustss };
298 1.1 augustss
299 1.182 drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
300 1.221 mrg .transfer = ohci_device_ctrl_transfer,
301 1.221 mrg .start = ohci_device_ctrl_start,
302 1.221 mrg .abort = ohci_device_ctrl_abort,
303 1.221 mrg .close = ohci_device_ctrl_close,
304 1.221 mrg .cleartoggle = ohci_noop,
305 1.221 mrg .done = ohci_device_ctrl_done,
306 1.1 augustss };
307 1.1 augustss
308 1.182 drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
309 1.221 mrg .transfer = ohci_device_intr_transfer,
310 1.221 mrg .start = ohci_device_intr_start,
311 1.221 mrg .abort = ohci_device_intr_abort,
312 1.221 mrg .close = ohci_device_intr_close,
313 1.221 mrg .cleartoggle = ohci_device_clear_toggle,
314 1.221 mrg .done = ohci_device_intr_done,
315 1.1 augustss };
316 1.1 augustss
317 1.182 drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
318 1.221 mrg .transfer = ohci_device_bulk_transfer,
319 1.221 mrg .start = ohci_device_bulk_start,
320 1.221 mrg .abort = ohci_device_bulk_abort,
321 1.221 mrg .close = ohci_device_bulk_close,
322 1.221 mrg .cleartoggle = ohci_device_clear_toggle,
323 1.221 mrg .done = ohci_device_bulk_done,
324 1.3 augustss };
325 1.3 augustss
326 1.182 drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
327 1.221 mrg .transfer = ohci_device_isoc_transfer,
328 1.221 mrg .start = ohci_device_isoc_start,
329 1.221 mrg .abort = ohci_device_isoc_abort,
330 1.221 mrg .close = ohci_device_isoc_close,
331 1.221 mrg .cleartoggle = ohci_noop,
332 1.221 mrg .done = ohci_device_isoc_done,
333 1.43 augustss };
334 1.43 augustss
335 1.47 augustss int
336 1.189 dyoung ohci_activate(device_t self, enum devact act)
337 1.47 augustss {
338 1.189 dyoung struct ohci_softc *sc = device_private(self);
339 1.47 augustss
340 1.47 augustss switch (act) {
341 1.47 augustss case DVACT_DEACTIVATE:
342 1.183 kiyohara sc->sc_dying = 1;
343 1.203 dyoung return 0;
344 1.203 dyoung default:
345 1.203 dyoung return EOPNOTSUPP;
346 1.47 augustss }
347 1.47 augustss }
348 1.47 augustss
349 1.187 dyoung void
350 1.187 dyoung ohci_childdet(device_t self, device_t child)
351 1.187 dyoung {
352 1.187 dyoung struct ohci_softc *sc = device_private(self);
353 1.187 dyoung
354 1.187 dyoung KASSERT(sc->sc_child == child);
355 1.187 dyoung sc->sc_child = NULL;
356 1.187 dyoung }
357 1.187 dyoung
358 1.47 augustss int
359 1.91 augustss ohci_detach(struct ohci_softc *sc, int flags)
360 1.47 augustss {
361 1.47 augustss int rv = 0;
362 1.47 augustss
363 1.47 augustss if (sc->sc_child != NULL)
364 1.47 augustss rv = config_detach(sc->sc_child, flags);
365 1.120 augustss
366 1.47 augustss if (rv != 0)
367 1.47 augustss return (rv);
368 1.47 augustss
369 1.209 dyoung callout_stop(&sc->sc_tmo_rhsc);
370 1.104 augustss
371 1.116 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
372 1.209 dyoung callout_destroy(&sc->sc_tmo_rhsc);
373 1.116 augustss
374 1.224 mrg softint_disestablish(sc->sc_rhsc_si);
375 1.224 mrg
376 1.224 mrg cv_destroy(&sc->sc_softwake_cv);
377 1.224 mrg
378 1.224 mrg mutex_destroy(&sc->sc_lock);
379 1.224 mrg mutex_destroy(&sc->sc_intr_lock);
380 1.224 mrg
381 1.198 cegger if (sc->sc_hcca != NULL)
382 1.198 cegger usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
383 1.232 christos pool_cache_destroy(sc->sc_xferpool);
384 1.47 augustss
385 1.47 augustss return (rv);
386 1.47 augustss }
387 1.47 augustss
388 1.1 augustss ohci_soft_ed_t *
389 1.91 augustss ohci_alloc_sed(ohci_softc_t *sc)
390 1.1 augustss {
391 1.1 augustss ohci_soft_ed_t *sed;
392 1.53 augustss usbd_status err;
393 1.1 augustss int i, offs;
394 1.4 augustss usb_dma_t dma;
395 1.1 augustss
396 1.53 augustss if (sc->sc_freeeds == NULL) {
397 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
398 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
399 1.53 augustss OHCI_ED_ALIGN, &dma);
400 1.53 augustss if (err)
401 1.39 augustss return (0);
402 1.225 skrll for (i = 0; i < OHCI_SED_CHUNK; i++) {
403 1.39 augustss offs = i * OHCI_SED_SIZE;
404 1.123 augustss sed = KERNADDR(&dma, offs);
405 1.125 augustss sed->physaddr = DMAADDR(&dma, offs);
406 1.195 bouyer sed->dma = dma;
407 1.195 bouyer sed->offs = offs;
408 1.1 augustss sed->next = sc->sc_freeeds;
409 1.1 augustss sc->sc_freeeds = sed;
410 1.1 augustss }
411 1.1 augustss }
412 1.1 augustss sed = sc->sc_freeeds;
413 1.1 augustss sc->sc_freeeds = sed->next;
414 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
415 1.1 augustss sed->next = 0;
416 1.39 augustss return (sed);
417 1.1 augustss }
418 1.1 augustss
419 1.1 augustss void
420 1.91 augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
421 1.1 augustss {
422 1.1 augustss sed->next = sc->sc_freeeds;
423 1.1 augustss sc->sc_freeeds = sed;
424 1.1 augustss }
425 1.1 augustss
426 1.1 augustss ohci_soft_td_t *
427 1.91 augustss ohci_alloc_std(ohci_softc_t *sc)
428 1.1 augustss {
429 1.1 augustss ohci_soft_td_t *std;
430 1.53 augustss usbd_status err;
431 1.1 augustss int i, offs;
432 1.4 augustss usb_dma_t dma;
433 1.1 augustss
434 1.53 augustss if (sc->sc_freetds == NULL) {
435 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
436 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
437 1.53 augustss OHCI_TD_ALIGN, &dma);
438 1.53 augustss if (err)
439 1.83 augustss return (NULL);
440 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
441 1.39 augustss offs = i * OHCI_STD_SIZE;
442 1.123 augustss std = KERNADDR(&dma, offs);
443 1.125 augustss std->physaddr = DMAADDR(&dma, offs);
444 1.195 bouyer std->dma = dma;
445 1.195 bouyer std->offs = offs;
446 1.1 augustss std->nexttd = sc->sc_freetds;
447 1.1 augustss sc->sc_freetds = std;
448 1.1 augustss }
449 1.1 augustss }
450 1.69 augustss
451 1.1 augustss std = sc->sc_freetds;
452 1.1 augustss sc->sc_freetds = std->nexttd;
453 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
454 1.83 augustss std->nexttd = NULL;
455 1.83 augustss std->xfer = NULL;
456 1.69 augustss ohci_hash_add_td(sc, std);
457 1.69 augustss
458 1.1 augustss return (std);
459 1.1 augustss }
460 1.1 augustss
461 1.1 augustss void
462 1.91 augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
463 1.1 augustss {
464 1.69 augustss
465 1.69 augustss ohci_hash_rem_td(sc, std);
466 1.1 augustss std->nexttd = sc->sc_freetds;
467 1.1 augustss sc->sc_freetds = std;
468 1.1 augustss }
469 1.1 augustss
470 1.1 augustss usbd_status
471 1.91 augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
472 1.91 augustss int alen, int rd, usbd_xfer_handle xfer,
473 1.91 augustss ohci_soft_td_t *sp, ohci_soft_td_t **ep)
474 1.48 augustss {
475 1.48 augustss ohci_soft_td_t *next, *cur;
476 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
477 1.77 augustss u_int32_t tdflags;
478 1.75 augustss int len, curlen;
479 1.77 augustss usb_dma_t *dma = &xfer->dmabuf;
480 1.77 augustss u_int16_t flags = xfer->flags;
481 1.48 augustss
482 1.75 augustss DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
483 1.75 augustss
484 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
485 1.224 mrg
486 1.75 augustss len = alen;
487 1.48 augustss cur = sp;
488 1.125 augustss dataphys = DMAADDR(dma, 0);
489 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
490 1.195 bouyer usb_syncmem(dma, 0, len,
491 1.195 bouyer rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
492 1.168 augustss tdflags = HTOO32(
493 1.120 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
494 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
495 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
496 1.61 augustss
497 1.48 augustss for (;;) {
498 1.48 augustss next = ohci_alloc_std(sc);
499 1.75 augustss if (next == NULL)
500 1.61 augustss goto nomem;
501 1.48 augustss
502 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
503 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
504 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
505 1.48 augustss /* we can handle it in this TD */
506 1.48 augustss curlen = len;
507 1.48 augustss } else {
508 1.48 augustss /* must use multiple TDs, fill as much as possible. */
509 1.120 augustss curlen = 2 * OHCI_PAGE_SIZE -
510 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
511 1.78 augustss /* the length must be a multiple of the max size */
512 1.78 augustss curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
513 1.78 augustss #ifdef DIAGNOSTIC
514 1.78 augustss if (curlen == 0)
515 1.128 provos panic("ohci_alloc_std: curlen == 0");
516 1.78 augustss #endif
517 1.48 augustss }
518 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
519 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
520 1.48 augustss dataphys, dataphysend,
521 1.48 augustss len, curlen));
522 1.48 augustss len -= curlen;
523 1.48 augustss
524 1.77 augustss cur->td.td_flags = tdflags;
525 1.168 augustss cur->td.td_cbp = HTOO32(dataphys);
526 1.48 augustss cur->nexttd = next;
527 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
528 1.168 augustss cur->td.td_be = HTOO32(dataphys + curlen - 1);
529 1.48 augustss cur->len = curlen;
530 1.48 augustss cur->flags = OHCI_ADD_LEN;
531 1.77 augustss cur->xfer = xfer;
532 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
533 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
534 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
535 1.48 augustss dataphys, dataphys + curlen - 1));
536 1.48 augustss if (len == 0)
537 1.48 augustss break;
538 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
539 1.48 augustss dataphys += curlen;
540 1.48 augustss cur = next;
541 1.48 augustss }
542 1.164 augustss if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
543 1.75 augustss alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
544 1.61 augustss /* Force a 0 length transfer at the end. */
545 1.75 augustss
546 1.75 augustss cur = next;
547 1.61 augustss next = ohci_alloc_std(sc);
548 1.75 augustss if (next == NULL)
549 1.61 augustss goto nomem;
550 1.61 augustss
551 1.77 augustss cur->td.td_flags = tdflags;
552 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
553 1.61 augustss cur->nexttd = next;
554 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
555 1.75 augustss cur->td.td_be = ~0;
556 1.61 augustss cur->len = 0;
557 1.61 augustss cur->flags = 0;
558 1.77 augustss cur->xfer = xfer;
559 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
560 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
561 1.61 augustss DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
562 1.61 augustss }
563 1.77 augustss *ep = cur;
564 1.48 augustss
565 1.48 augustss return (USBD_NORMAL_COMPLETION);
566 1.61 augustss
567 1.61 augustss nomem:
568 1.61 augustss /* XXX free chain */
569 1.61 augustss return (USBD_NOMEM);
570 1.48 augustss }
571 1.48 augustss
572 1.53 augustss #if 0
573 1.82 augustss Static void
574 1.120 augustss ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
575 1.91 augustss ohci_soft_td_t *stdend)
576 1.48 augustss {
577 1.48 augustss ohci_soft_td_t *p;
578 1.48 augustss
579 1.48 augustss for (; std != stdend; std = p) {
580 1.48 augustss p = std->nexttd;
581 1.48 augustss ohci_free_std(sc, std);
582 1.48 augustss }
583 1.48 augustss }
584 1.53 augustss #endif
585 1.48 augustss
586 1.60 augustss ohci_soft_itd_t *
587 1.91 augustss ohci_alloc_sitd(ohci_softc_t *sc)
588 1.60 augustss {
589 1.60 augustss ohci_soft_itd_t *sitd;
590 1.60 augustss usbd_status err;
591 1.224 mrg int i, offs;
592 1.60 augustss usb_dma_t dma;
593 1.60 augustss
594 1.60 augustss if (sc->sc_freeitds == NULL) {
595 1.60 augustss DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
596 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
597 1.83 augustss OHCI_ITD_ALIGN, &dma);
598 1.60 augustss if (err)
599 1.83 augustss return (NULL);
600 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
601 1.83 augustss offs = i * OHCI_SITD_SIZE;
602 1.123 augustss sitd = KERNADDR(&dma, offs);
603 1.125 augustss sitd->physaddr = DMAADDR(&dma, offs);
604 1.195 bouyer sitd->dma = dma;
605 1.195 bouyer sitd->offs = offs;
606 1.60 augustss sitd->nextitd = sc->sc_freeitds;
607 1.60 augustss sc->sc_freeitds = sitd;
608 1.60 augustss }
609 1.60 augustss }
610 1.83 augustss
611 1.60 augustss sitd = sc->sc_freeitds;
612 1.60 augustss sc->sc_freeitds = sitd->nextitd;
613 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
614 1.83 augustss sitd->nextitd = NULL;
615 1.83 augustss sitd->xfer = NULL;
616 1.83 augustss ohci_hash_add_itd(sc, sitd);
617 1.83 augustss
618 1.83 augustss #ifdef DIAGNOSTIC
619 1.83 augustss sitd->isdone = 0;
620 1.83 augustss #endif
621 1.83 augustss
622 1.60 augustss return (sitd);
623 1.60 augustss }
624 1.60 augustss
625 1.60 augustss void
626 1.91 augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
627 1.60 augustss {
628 1.83 augustss
629 1.83 augustss DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
630 1.83 augustss
631 1.83 augustss #ifdef DIAGNOSTIC
632 1.83 augustss if (!sitd->isdone) {
633 1.128 provos panic("ohci_free_sitd: sitd=%p not done", sitd);
634 1.83 augustss return;
635 1.83 augustss }
636 1.134 toshii /* Warn double free */
637 1.134 toshii sitd->isdone = 0;
638 1.83 augustss #endif
639 1.83 augustss
640 1.83 augustss ohci_hash_rem_itd(sc, sitd);
641 1.60 augustss sitd->nextitd = sc->sc_freeitds;
642 1.60 augustss sc->sc_freeitds = sitd;
643 1.60 augustss }
644 1.60 augustss
645 1.48 augustss usbd_status
646 1.91 augustss ohci_init(ohci_softc_t *sc)
647 1.1 augustss {
648 1.1 augustss ohci_soft_ed_t *sed, *psed;
649 1.53 augustss usbd_status err;
650 1.1 augustss int i;
651 1.161 augustss u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
652 1.16 augustss
653 1.1 augustss DPRINTF(("ohci_init: start\n"));
654 1.199 jmcneill aprint_normal_dev(sc->sc_dev, "");
655 1.199 jmcneill
656 1.198 cegger sc->sc_hcca = NULL;
657 1.224 mrg callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
658 1.224 mrg
659 1.224 mrg mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
660 1.224 mrg mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
661 1.224 mrg cv_init(&sc->sc_softwake_cv, "ohciab");
662 1.224 mrg
663 1.224 mrg sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
664 1.224 mrg ohci_rhsc_softint, sc);
665 1.198 cegger
666 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
667 1.198 cegger LIST_INIT(&sc->sc_hash_tds[i]);
668 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
669 1.198 cegger LIST_INIT(&sc->sc_hash_itds[i]);
670 1.198 cegger
671 1.232 christos sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
672 1.232 christos "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
673 1.198 cegger
674 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
675 1.200 enami aprint_normal("OHCI version %d.%d%s\n",
676 1.199 jmcneill OHCI_REV_HI(rev), OHCI_REV_LO(rev),
677 1.199 jmcneill OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
678 1.55 augustss
679 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
680 1.199 jmcneill aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
681 1.56 augustss sc->sc_bus.usbrev = USBREV_UNKNOWN;
682 1.1 augustss return (USBD_INVAL);
683 1.1 augustss }
684 1.56 augustss sc->sc_bus.usbrev = USBREV_1_0;
685 1.1 augustss
686 1.193 drochner usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
687 1.153 fvdl USB_MEM_RESERVE);
688 1.153 fvdl
689 1.73 augustss /* XXX determine alignment by R/W */
690 1.1 augustss /* Allocate the HCCA area. */
691 1.120 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
692 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
693 1.198 cegger if (err) {
694 1.198 cegger sc->sc_hcca = NULL;
695 1.198 cegger return err;
696 1.198 cegger }
697 1.123 augustss sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
698 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
699 1.1 augustss
700 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
701 1.1 augustss
702 1.60 augustss /* Allocate dummy ED that starts the control list. */
703 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
704 1.53 augustss if (sc->sc_ctrl_head == NULL) {
705 1.53 augustss err = USBD_NOMEM;
706 1.1 augustss goto bad1;
707 1.1 augustss }
708 1.168 augustss sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
709 1.34 augustss
710 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
711 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
712 1.53 augustss if (sc->sc_bulk_head == NULL) {
713 1.53 augustss err = USBD_NOMEM;
714 1.1 augustss goto bad2;
715 1.1 augustss }
716 1.168 augustss sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
717 1.195 bouyer usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
718 1.195 bouyer sizeof(sc->sc_bulk_head->ed),
719 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
720 1.1 augustss
721 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
722 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
723 1.60 augustss if (sc->sc_isoc_head == NULL) {
724 1.60 augustss err = USBD_NOMEM;
725 1.60 augustss goto bad3;
726 1.60 augustss }
727 1.168 augustss sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
728 1.195 bouyer usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
729 1.195 bouyer sizeof(sc->sc_isoc_head->ed),
730 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
731 1.60 augustss
732 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
733 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
734 1.1 augustss sed = ohci_alloc_sed(sc);
735 1.53 augustss if (sed == NULL) {
736 1.1 augustss while (--i >= 0)
737 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
738 1.53 augustss err = USBD_NOMEM;
739 1.60 augustss goto bad4;
740 1.1 augustss }
741 1.1 augustss /* All ED fields are set to 0. */
742 1.1 augustss sc->sc_eds[i] = sed;
743 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
744 1.60 augustss if (i != 0)
745 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
746 1.60 augustss else
747 1.60 augustss psed= sc->sc_isoc_head;
748 1.60 augustss sed->next = psed;
749 1.168 augustss sed->ed.ed_nexted = HTOO32(psed->physaddr);
750 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
751 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
752 1.1 augustss }
753 1.120 augustss /*
754 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
755 1.1 augustss * the tree set up properly to spread the interrupts.
756 1.1 augustss */
757 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
758 1.120 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
759 1.168 augustss HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
760 1.195 bouyer usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
761 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
762 1.1 augustss
763 1.73 augustss #ifdef OHCI_DEBUG
764 1.73 augustss if (ohcidebug > 15) {
765 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
766 1.73 augustss printf("ed#%d ", i);
767 1.168 augustss ohci_dump_ed(sc, sc->sc_eds[i]);
768 1.73 augustss }
769 1.73 augustss printf("iso ");
770 1.168 augustss ohci_dump_ed(sc, sc->sc_isoc_head);
771 1.73 augustss }
772 1.73 augustss #endif
773 1.73 augustss
774 1.161 augustss /* Preserve values programmed by SMM/BIOS but lost over reset. */
775 1.161 augustss ctl = OREAD4(sc, OHCI_CONTROL);
776 1.161 augustss rwc = ctl & OHCI_RWC;
777 1.161 augustss fm = OREAD4(sc, OHCI_FM_INTERVAL);
778 1.161 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
779 1.161 augustss descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
780 1.161 augustss
781 1.1 augustss /* Determine in what context we are running. */
782 1.1 augustss if (ctl & OHCI_IR) {
783 1.1 augustss /* SMM active, request change */
784 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
785 1.160 augustss if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
786 1.160 augustss (OHCI_OC | OHCI_MIE))
787 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
788 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
789 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
790 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
791 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
792 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
793 1.1 augustss }
794 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
795 1.1 augustss if ((ctl & OHCI_IR) == 0) {
796 1.199 jmcneill aprint_error_dev(sc->sc_dev,
797 1.199 jmcneill "SMM does not respond, resetting\n");
798 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
799 1.1 augustss goto reset;
800 1.1 augustss }
801 1.103 augustss #if 0
802 1.103 augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
803 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
804 1.1 augustss /* BIOS started controller. */
805 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
806 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
807 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
808 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
809 1.1 augustss }
810 1.103 augustss #endif
811 1.1 augustss } else {
812 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
813 1.1 augustss reset:
814 1.1 augustss /* Controller was cold started. */
815 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
816 1.1 augustss }
817 1.1 augustss
818 1.16 augustss /*
819 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
820 1.25 augustss * without it some controllers do not start.
821 1.16 augustss */
822 1.190 drochner DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
823 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
824 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
825 1.16 augustss
826 1.1 augustss /* We now own the host controller and the bus has been reset. */
827 1.1 augustss
828 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
829 1.1 augustss /* Nominal time for a reset is 10 us. */
830 1.1 augustss for (i = 0; i < 10; i++) {
831 1.1 augustss delay(10);
832 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
833 1.1 augustss if (!hcr)
834 1.1 augustss break;
835 1.1 augustss }
836 1.1 augustss if (hcr) {
837 1.199 jmcneill aprint_error_dev(sc->sc_dev, "reset timeout\n");
838 1.53 augustss err = USBD_IOERROR;
839 1.60 augustss goto bad5;
840 1.1 augustss }
841 1.52 augustss #ifdef OHCI_DEBUG
842 1.1 augustss if (ohcidebug > 15)
843 1.1 augustss ohci_dumpregs(sc);
844 1.1 augustss #endif
845 1.1 augustss
846 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
847 1.1 augustss
848 1.1 augustss /* Set up HC registers. */
849 1.125 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
850 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
851 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
852 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
853 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
854 1.55 augustss /* switch on desired functional features */
855 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
856 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
857 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
858 1.161 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
859 1.1 augustss /* And finally start it! */
860 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
861 1.1 augustss
862 1.1 augustss /*
863 1.1 augustss * The controller is now OPERATIONAL. Set a some final
864 1.1 augustss * registers that should be set earlier, but that the
865 1.1 augustss * controller ignores when in the SUSPEND state.
866 1.1 augustss */
867 1.161 augustss ival = OHCI_GET_IVAL(fm);
868 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
869 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
870 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
871 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
872 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
873 1.1 augustss
874 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
875 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
876 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
877 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
878 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
879 1.1 augustss
880 1.85 augustss /*
881 1.85 augustss * The AMD756 requires a delay before re-reading the register,
882 1.85 augustss * otherwise it will occasionally report 0 ports.
883 1.85 augustss */
884 1.145 augustss sc->sc_noport = 0;
885 1.145 augustss for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
886 1.145 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
887 1.145 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
888 1.145 augustss }
889 1.1 augustss
890 1.52 augustss #ifdef OHCI_DEBUG
891 1.1 augustss if (ohcidebug > 5)
892 1.1 augustss ohci_dumpregs(sc);
893 1.1 augustss #endif
894 1.120 augustss
895 1.1 augustss /* Set up the bus struct. */
896 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
897 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
898 1.1 augustss
899 1.101 minoura sc->sc_control = sc->sc_intre = 0;
900 1.59 augustss
901 1.167 augustss /* Finally, turn on interrupts. */
902 1.211 matt DPRINTFN(1,("ohci_init: enabling %#x\n", sc->sc_eintrs | OHCI_MIE));
903 1.167 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
904 1.167 augustss
905 1.1 augustss return (USBD_NORMAL_COMPLETION);
906 1.1 augustss
907 1.60 augustss bad5:
908 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
909 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
910 1.60 augustss bad4:
911 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
912 1.1 augustss bad3:
913 1.144 augustss ohci_free_sed(sc, sc->sc_bulk_head);
914 1.144 augustss bad2:
915 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
916 1.1 augustss bad1:
917 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
918 1.198 cegger sc->sc_hcca = NULL;
919 1.53 augustss return (err);
920 1.1 augustss }
921 1.1 augustss
922 1.42 augustss usbd_status
923 1.91 augustss ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
924 1.42 augustss {
925 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
926 1.153 fvdl usbd_status status;
927 1.42 augustss
928 1.153 fvdl status = usb_allocmem(&sc->sc_bus, size, 0, dma);
929 1.153 fvdl if (status == USBD_NOMEM)
930 1.153 fvdl status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
931 1.153 fvdl return status;
932 1.42 augustss }
933 1.42 augustss
934 1.42 augustss void
935 1.91 augustss ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
936 1.42 augustss {
937 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
938 1.153 fvdl if (dma->block->flags & USB_DMA_RESERVE) {
939 1.191 nakayama usb_reserve_freem(&sc->sc_dma_reserve, dma);
940 1.153 fvdl return;
941 1.153 fvdl }
942 1.44 augustss usb_freemem(&sc->sc_bus, dma);
943 1.62 augustss }
944 1.62 augustss
945 1.62 augustss usbd_xfer_handle
946 1.91 augustss ohci_allocx(struct usbd_bus *bus)
947 1.62 augustss {
948 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
949 1.62 augustss usbd_xfer_handle xfer;
950 1.62 augustss
951 1.232 christos xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
952 1.118 augustss if (xfer != NULL) {
953 1.232 christos memset(xfer, 0, sizeof(struct ohci_xfer));
954 1.118 augustss #ifdef DIAGNOSTIC
955 1.118 augustss xfer->busy_free = XFER_BUSY;
956 1.118 augustss #endif
957 1.118 augustss }
958 1.62 augustss return (xfer);
959 1.62 augustss }
960 1.62 augustss
961 1.62 augustss void
962 1.91 augustss ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
963 1.62 augustss {
964 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
965 1.62 augustss
966 1.118 augustss #ifdef DIAGNOSTIC
967 1.118 augustss if (xfer->busy_free != XFER_BUSY) {
968 1.118 augustss printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
969 1.118 augustss xfer->busy_free);
970 1.118 augustss }
971 1.118 augustss xfer->busy_free = XFER_FREE;
972 1.118 augustss #endif
973 1.232 christos pool_cache_put(sc->sc_xferpool, xfer);
974 1.42 augustss }
975 1.42 augustss
976 1.224 mrg Static void
977 1.224 mrg ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
978 1.224 mrg {
979 1.224 mrg struct ohci_softc *sc = bus->hci_private;
980 1.224 mrg
981 1.224 mrg *lock = &sc->sc_lock;
982 1.224 mrg }
983 1.224 mrg
984 1.59 augustss /*
985 1.59 augustss * Shut down the controller when the system is going down.
986 1.59 augustss */
987 1.188 dyoung bool
988 1.188 dyoung ohci_shutdown(device_t self, int flags)
989 1.59 augustss {
990 1.188 dyoung ohci_softc_t *sc = device_private(self);
991 1.59 augustss
992 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
993 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
994 1.188 dyoung return true;
995 1.59 augustss }
996 1.59 augustss
997 1.185 jmcneill bool
998 1.206 dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
999 1.33 augustss {
1000 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1001 1.185 jmcneill uint32_t ctl;
1002 1.33 augustss
1003 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1004 1.185 jmcneill sc->sc_bus.use_polling++;
1005 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1006 1.224 mrg
1007 1.185 jmcneill /* Some broken BIOSes do not recover these values */
1008 1.185 jmcneill OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1009 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1010 1.185 jmcneill sc->sc_ctrl_head->physaddr);
1011 1.185 jmcneill OWRITE4(sc, OHCI_BULK_HEAD_ED,
1012 1.185 jmcneill sc->sc_bulk_head->physaddr);
1013 1.185 jmcneill if (sc->sc_intre)
1014 1.185 jmcneill OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1015 1.185 jmcneill (OHCI_ALL_INTRS | OHCI_MIE));
1016 1.185 jmcneill if (sc->sc_control)
1017 1.185 jmcneill ctl = sc->sc_control;
1018 1.185 jmcneill else
1019 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL);
1020 1.185 jmcneill ctl |= OHCI_HCFS_RESUME;
1021 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1022 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1023 1.185 jmcneill ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1024 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1025 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1026 1.185 jmcneill sc->sc_control = sc->sc_intre = 0;
1027 1.224 mrg
1028 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1029 1.185 jmcneill sc->sc_bus.use_polling--;
1030 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1031 1.185 jmcneill
1032 1.185 jmcneill return true;
1033 1.185 jmcneill }
1034 1.185 jmcneill
1035 1.185 jmcneill bool
1036 1.206 dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
1037 1.185 jmcneill {
1038 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1039 1.185 jmcneill uint32_t ctl;
1040 1.95 augustss
1041 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1042 1.185 jmcneill sc->sc_bus.use_polling++;
1043 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1044 1.224 mrg
1045 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1046 1.185 jmcneill if (sc->sc_control == 0) {
1047 1.185 jmcneill /*
1048 1.185 jmcneill * Preserve register values, in case that BIOS
1049 1.185 jmcneill * does not recover them.
1050 1.185 jmcneill */
1051 1.185 jmcneill sc->sc_control = ctl;
1052 1.185 jmcneill sc->sc_intre = OREAD4(sc,
1053 1.185 jmcneill OHCI_INTERRUPT_ENABLE);
1054 1.95 augustss }
1055 1.185 jmcneill ctl |= OHCI_HCFS_SUSPEND;
1056 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1057 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1058 1.224 mrg
1059 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1060 1.185 jmcneill sc->sc_bus.use_polling--;
1061 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1062 1.185 jmcneill
1063 1.185 jmcneill return true;
1064 1.33 augustss }
1065 1.33 augustss
1066 1.52 augustss #ifdef OHCI_DEBUG
1067 1.1 augustss void
1068 1.91 augustss ohci_dumpregs(ohci_softc_t *sc)
1069 1.1 augustss {
1070 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1071 1.41 augustss OREAD4(sc, OHCI_REVISION),
1072 1.41 augustss OREAD4(sc, OHCI_CONTROL),
1073 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1074 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1075 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
1076 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1077 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1078 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1079 1.41 augustss OREAD4(sc, OHCI_HCCA),
1080 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1081 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1082 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1083 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1084 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1085 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1086 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1087 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1088 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1089 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
1090 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1091 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1092 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1093 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
1094 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1095 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1096 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1097 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
1098 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
1099 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1100 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1101 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1102 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number),
1103 1.168 augustss O32TOH(sc->sc_hcca->hcca_done_head)));
1104 1.1 augustss }
1105 1.1 augustss #endif
1106 1.1 augustss
1107 1.91 augustss Static int ohci_intr1(ohci_softc_t *);
1108 1.53 augustss
1109 1.1 augustss int
1110 1.91 augustss ohci_intr(void *p)
1111 1.1 augustss {
1112 1.1 augustss ohci_softc_t *sc = p;
1113 1.224 mrg int ret = 0;
1114 1.111 augustss
1115 1.224 mrg if (sc == NULL)
1116 1.111 augustss return (0);
1117 1.53 augustss
1118 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1119 1.224 mrg
1120 1.224 mrg if (sc->sc_dying || !device_has_power(sc->sc_dev))
1121 1.224 mrg goto done;
1122 1.224 mrg
1123 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
1124 1.57 augustss if (sc->sc_bus.use_polling) {
1125 1.57 augustss #ifdef DIAGNOSTIC
1126 1.149 mycroft DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1127 1.57 augustss #endif
1128 1.154 joff /* for level triggered intrs, should do something to ack */
1129 1.155 perry OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1130 1.154 joff OREAD4(sc, OHCI_INTERRUPT_STATUS));
1131 1.155 perry
1132 1.224 mrg goto done;
1133 1.57 augustss }
1134 1.53 augustss
1135 1.224 mrg ret = ohci_intr1(sc);
1136 1.224 mrg
1137 1.224 mrg done:
1138 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1139 1.224 mrg return ret;
1140 1.53 augustss }
1141 1.53 augustss
1142 1.82 augustss Static int
1143 1.91 augustss ohci_intr1(ohci_softc_t *sc)
1144 1.53 augustss {
1145 1.1 augustss u_int32_t intrs, eintrs;
1146 1.1 augustss
1147 1.105 augustss DPRINTFN(14,("ohci_intr1: enter\n"));
1148 1.105 augustss
1149 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1150 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1151 1.15 augustss #ifdef DIAGNOSTIC
1152 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1153 1.15 augustss #endif
1154 1.15 augustss return (0);
1155 1.15 augustss }
1156 1.15 augustss
1157 1.224 mrg KASSERT(mutex_owned(&sc->sc_intr_lock));
1158 1.224 mrg
1159 1.157 mycroft intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1160 1.1 augustss if (!intrs)
1161 1.1 augustss return (0);
1162 1.55 augustss
1163 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1164 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1165 1.211 matt DPRINTFN(7, ("ohci_intr: sc=%p intrs=%#x(%#x) eintrs=%#x(%#x)\n",
1166 1.211 matt sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1167 1.211 matt (u_int)eintrs, sc->sc_eintrs));
1168 1.211 matt
1169 1.211 matt if (!eintrs) {
1170 1.1 augustss return (0);
1171 1.211 matt }
1172 1.1 augustss
1173 1.44 augustss sc->sc_bus.no_intrs++;
1174 1.1 augustss if (eintrs & OHCI_SO) {
1175 1.100 augustss sc->sc_overrun_cnt++;
1176 1.100 augustss if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1177 1.100 augustss printf("%s: %u scheduling overruns\n",
1178 1.190 drochner device_xname(sc->sc_dev), sc->sc_overrun_cnt);
1179 1.100 augustss sc->sc_overrun_cnt = 0;
1180 1.100 augustss }
1181 1.1 augustss /* XXX do what */
1182 1.106 augustss eintrs &= ~OHCI_SO;
1183 1.1 augustss }
1184 1.1 augustss if (eintrs & OHCI_WDH) {
1185 1.157 mycroft /*
1186 1.157 mycroft * We block the interrupt below, and reenable it later from
1187 1.157 mycroft * ohci_softintr().
1188 1.157 mycroft */
1189 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1190 1.1 augustss }
1191 1.1 augustss if (eintrs & OHCI_RD) {
1192 1.190 drochner printf("%s: resume detect\n", device_xname(sc->sc_dev));
1193 1.1 augustss /* XXX process resume detect */
1194 1.1 augustss }
1195 1.1 augustss if (eintrs & OHCI_UE) {
1196 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1197 1.190 drochner device_xname(sc->sc_dev));
1198 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1199 1.1 augustss /* XXX what else */
1200 1.1 augustss }
1201 1.1 augustss if (eintrs & OHCI_RHSC) {
1202 1.120 augustss /*
1203 1.157 mycroft * We block the interrupt below, and reenable it later from
1204 1.157 mycroft * a timeout.
1205 1.1 augustss */
1206 1.224 mrg softint_schedule(sc->sc_rhsc_si);
1207 1.1 augustss }
1208 1.1 augustss
1209 1.106 augustss if (eintrs != 0) {
1210 1.157 mycroft /* Block unprocessed interrupts. */
1211 1.106 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1212 1.106 augustss sc->sc_eintrs &= ~eintrs;
1213 1.157 mycroft DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1214 1.190 drochner device_xname(sc->sc_dev), eintrs));
1215 1.106 augustss }
1216 1.1 augustss
1217 1.1 augustss return (1);
1218 1.1 augustss }
1219 1.1 augustss
1220 1.1 augustss void
1221 1.104 augustss ohci_rhsc_enable(void *v_sc)
1222 1.104 augustss {
1223 1.104 augustss ohci_softc_t *sc = v_sc;
1224 1.104 augustss
1225 1.224 mrg DPRINTFN(1, ("%s: %s\n", __func__, device_xname(sc->sc_dev)));
1226 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1227 1.157 mycroft sc->sc_eintrs |= OHCI_RHSC;
1228 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1229 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1230 1.1 augustss }
1231 1.1 augustss
1232 1.52 augustss #ifdef OHCI_DEBUG
1233 1.166 drochner const char *ohci_cc_strs[] = {
1234 1.13 augustss "NO_ERROR",
1235 1.13 augustss "CRC",
1236 1.13 augustss "BIT_STUFFING",
1237 1.13 augustss "DATA_TOGGLE_MISMATCH",
1238 1.13 augustss "STALL",
1239 1.13 augustss "DEVICE_NOT_RESPONDING",
1240 1.13 augustss "PID_CHECK_FAILURE",
1241 1.13 augustss "UNEXPECTED_PID",
1242 1.13 augustss "DATA_OVERRUN",
1243 1.13 augustss "DATA_UNDERRUN",
1244 1.13 augustss "BUFFER_OVERRUN",
1245 1.13 augustss "BUFFER_UNDERRUN",
1246 1.67 augustss "reserved",
1247 1.67 augustss "reserved",
1248 1.67 augustss "NOT_ACCESSED",
1249 1.13 augustss "NOT_ACCESSED",
1250 1.13 augustss };
1251 1.13 augustss #endif
1252 1.13 augustss
1253 1.1 augustss void
1254 1.157 mycroft ohci_softintr(void *v)
1255 1.83 augustss {
1256 1.190 drochner struct usbd_bus *bus = v;
1257 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1258 1.157 mycroft ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1259 1.157 mycroft ohci_soft_td_t *std, *sdone, *stdnext;
1260 1.157 mycroft usbd_xfer_handle xfer;
1261 1.157 mycroft struct ohci_pipe *opipe;
1262 1.224 mrg int len, cc;
1263 1.157 mycroft int i, j, actlen, iframes, uedir;
1264 1.157 mycroft ohci_physaddr_t done;
1265 1.157 mycroft
1266 1.224 mrg KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
1267 1.224 mrg
1268 1.157 mycroft DPRINTFN(10,("ohci_softintr: enter\n"));
1269 1.157 mycroft
1270 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1271 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1272 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1273 1.168 augustss done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1274 1.157 mycroft sc->sc_hcca->hcca_done_head = 0;
1275 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1276 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1277 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1278 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1279 1.157 mycroft sc->sc_eintrs |= OHCI_WDH;
1280 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1281 1.83 augustss
1282 1.83 augustss /* Reverse the done list. */
1283 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1284 1.83 augustss std = ohci_hash_find_td(sc, done);
1285 1.83 augustss if (std != NULL) {
1286 1.195 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1287 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1288 1.83 augustss std->dnext = sdone;
1289 1.168 augustss done = O32TOH(std->td.td_nexttd);
1290 1.83 augustss sdone = std;
1291 1.83 augustss DPRINTFN(10,("add TD %p\n", std));
1292 1.83 augustss continue;
1293 1.83 augustss }
1294 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1295 1.83 augustss if (sitd != NULL) {
1296 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1297 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1298 1.83 augustss sitd->dnext = sidone;
1299 1.168 augustss done = O32TOH(sitd->itd.itd_nextitd);
1300 1.83 augustss sidone = sitd;
1301 1.83 augustss DPRINTFN(5,("add ITD %p\n", sitd));
1302 1.83 augustss continue;
1303 1.83 augustss }
1304 1.218 jmcneill device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
1305 1.218 jmcneill (u_long)done);
1306 1.218 jmcneill break;
1307 1.83 augustss }
1308 1.83 augustss
1309 1.105 augustss DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1310 1.1 augustss
1311 1.52 augustss #ifdef OHCI_DEBUG
1312 1.1 augustss if (ohcidebug > 10) {
1313 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1314 1.234 skrll for (std = sdone; std; std = std->dnext)
1315 1.234 skrll ohci_dump_td(sc, std);
1316 1.1 augustss }
1317 1.1 augustss #endif
1318 1.1 augustss
1319 1.48 augustss for (std = sdone; std; std = stdnext) {
1320 1.53 augustss xfer = std->xfer;
1321 1.48 augustss stdnext = std->dnext;
1322 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1323 1.69 augustss std, xfer, xfer ? xfer->hcpriv : 0));
1324 1.71 augustss if (xfer == NULL) {
1325 1.117 augustss /*
1326 1.117 augustss * xfer == NULL: There seems to be no xfer associated
1327 1.71 augustss * with this TD. It is tailp that happened to end up on
1328 1.71 augustss * the done queue.
1329 1.117 augustss * Shouldn't happen, but some chips are broken(?).
1330 1.71 augustss */
1331 1.71 augustss continue;
1332 1.71 augustss }
1333 1.53 augustss if (xfer->status == USBD_CANCELLED ||
1334 1.53 augustss xfer->status == USBD_TIMEOUT) {
1335 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1336 1.53 augustss xfer));
1337 1.38 augustss /* Handled by abort routine. */
1338 1.83 augustss continue;
1339 1.83 augustss }
1340 1.209 dyoung callout_stop(&xfer->timeout_handle);
1341 1.141 mycroft
1342 1.141 mycroft len = std->len;
1343 1.141 mycroft if (std->td.td_cbp != 0)
1344 1.168 augustss len -= O32TOH(std->td.td_be) -
1345 1.168 augustss O32TOH(std->td.td_cbp) + 1;
1346 1.141 mycroft DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1347 1.141 mycroft std->flags));
1348 1.141 mycroft if (std->flags & OHCI_ADD_LEN)
1349 1.141 mycroft xfer->actlen += len;
1350 1.141 mycroft
1351 1.168 augustss cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1352 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1353 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1354 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1355 1.53 augustss usb_transfer_complete(xfer);
1356 1.21 augustss }
1357 1.48 augustss ohci_free_std(sc, std);
1358 1.1 augustss } else {
1359 1.48 augustss /*
1360 1.48 augustss * Endpoint is halted. First unlink all the TDs
1361 1.48 augustss * belonging to the failed transfer, and then restart
1362 1.48 augustss * the endpoint.
1363 1.48 augustss */
1364 1.1 augustss ohci_soft_td_t *p, *n;
1365 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1366 1.48 augustss
1367 1.71 augustss DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1368 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1369 1.168 augustss ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1370 1.48 augustss
1371 1.48 augustss /* remove TDs */
1372 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1373 1.1 augustss n = p->nexttd;
1374 1.1 augustss ohci_free_std(sc, p);
1375 1.1 augustss }
1376 1.48 augustss
1377 1.16 augustss /* clear halt */
1378 1.168 augustss opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1379 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1380 1.48 augustss
1381 1.1 augustss if (cc == OHCI_CC_STALL)
1382 1.53 augustss xfer->status = USBD_STALLED;
1383 1.1 augustss else
1384 1.53 augustss xfer->status = USBD_IOERROR;
1385 1.53 augustss usb_transfer_complete(xfer);
1386 1.1 augustss }
1387 1.1 augustss }
1388 1.72 augustss
1389 1.83 augustss #ifdef OHCI_DEBUG
1390 1.83 augustss if (ohcidebug > 10) {
1391 1.105 augustss DPRINTF(("ohci_softintr: ITD done:\n"));
1392 1.234 skrll for (sitd = sidone; sitd; sitd = sitd->dnext)
1393 1.234 skrll ohci_dump_itd(sc, sitd);
1394 1.83 augustss }
1395 1.83 augustss #endif
1396 1.83 augustss
1397 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1398 1.83 augustss xfer = sitd->xfer;
1399 1.83 augustss sitdnext = sitd->dnext;
1400 1.83 augustss DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1401 1.83 augustss sitd, xfer, xfer ? xfer->hcpriv : 0));
1402 1.83 augustss if (xfer == NULL)
1403 1.83 augustss continue;
1404 1.83 augustss if (xfer->status == USBD_CANCELLED ||
1405 1.83 augustss xfer->status == USBD_TIMEOUT) {
1406 1.83 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1407 1.83 augustss xfer));
1408 1.83 augustss /* Handled by abort routine. */
1409 1.83 augustss continue;
1410 1.83 augustss }
1411 1.83 augustss #ifdef DIAGNOSTIC
1412 1.83 augustss if (sitd->isdone)
1413 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1414 1.83 augustss sitd->isdone = 1;
1415 1.83 augustss #endif
1416 1.134 toshii if (sitd->flags & OHCI_CALL_DONE) {
1417 1.134 toshii ohci_soft_itd_t *next;
1418 1.134 toshii
1419 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1420 1.134 toshii opipe->u.iso.inuse -= xfer->nframes;
1421 1.134 toshii uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1422 1.134 toshii bEndpointAddress);
1423 1.134 toshii xfer->status = USBD_NORMAL_COMPLETION;
1424 1.134 toshii actlen = 0;
1425 1.137 simonb for (i = 0, sitd = xfer->hcpriv;;
1426 1.134 toshii sitd = next) {
1427 1.134 toshii next = sitd->nextitd;
1428 1.168 augustss if (OHCI_ITD_GET_CC(O32TOH(sitd->
1429 1.135 toshii itd.itd_flags)) != OHCI_CC_NO_ERROR)
1430 1.134 toshii xfer->status = USBD_IOERROR;
1431 1.134 toshii /* For input, update frlengths with actual */
1432 1.134 toshii /* XXX anything necessary for output? */
1433 1.134 toshii if (uedir == UE_DIR_IN &&
1434 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION) {
1435 1.168 augustss iframes = OHCI_ITD_GET_FC(O32TOH(
1436 1.135 toshii sitd->itd.itd_flags));
1437 1.134 toshii for (j = 0; j < iframes; i++, j++) {
1438 1.168 augustss len = O16TOH(sitd->
1439 1.134 toshii itd.itd_offset[j]);
1440 1.158 toshii if ((OHCI_ITD_PSW_GET_CC(len) &
1441 1.158 toshii OHCI_CC_NOT_ACCESSED_MASK)
1442 1.158 toshii == OHCI_CC_NOT_ACCESSED)
1443 1.158 toshii len = 0;
1444 1.158 toshii else
1445 1.158 toshii len = OHCI_ITD_PSW_LENGTH(len);
1446 1.134 toshii xfer->frlengths[i] = len;
1447 1.134 toshii actlen += len;
1448 1.134 toshii }
1449 1.134 toshii }
1450 1.134 toshii if (sitd->flags & OHCI_CALL_DONE)
1451 1.134 toshii break;
1452 1.134 toshii ohci_free_sitd(sc, sitd);
1453 1.83 augustss }
1454 1.134 toshii ohci_free_sitd(sc, sitd);
1455 1.134 toshii if (uedir == UE_DIR_IN &&
1456 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION)
1457 1.134 toshii xfer->actlen = actlen;
1458 1.151 mycroft xfer->hcpriv = NULL;
1459 1.134 toshii
1460 1.83 augustss usb_transfer_complete(xfer);
1461 1.83 augustss }
1462 1.83 augustss }
1463 1.83 augustss
1464 1.119 augustss if (sc->sc_softwake) {
1465 1.119 augustss sc->sc_softwake = 0;
1466 1.224 mrg cv_broadcast(&sc->sc_softwake_cv);
1467 1.119 augustss }
1468 1.119 augustss
1469 1.105 augustss DPRINTFN(10,("ohci_softintr: done:\n"));
1470 1.1 augustss }
1471 1.1 augustss
1472 1.1 augustss void
1473 1.179 christos ohci_device_ctrl_done(usbd_xfer_handle xfer)
1474 1.1 augustss {
1475 1.195 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1476 1.224 mrg #ifdef DIAGNOSTIC
1477 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
1478 1.224 mrg #endif
1479 1.195 bouyer int len = UGETW(xfer->request.wLength);
1480 1.195 bouyer int isread = (xfer->request.bmRequestType & UT_READ);
1481 1.195 bouyer
1482 1.140 gson DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1483 1.1 augustss
1484 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1485 1.224 mrg
1486 1.38 augustss #ifdef DIAGNOSTIC
1487 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1488 1.140 gson panic("ohci_device_ctrl_done: not a request");
1489 1.1 augustss }
1490 1.38 augustss #endif
1491 1.195 bouyer if (len)
1492 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, len,
1493 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1494 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0,
1495 1.195 bouyer sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1496 1.1 augustss }
1497 1.1 augustss
1498 1.1 augustss void
1499 1.91 augustss ohci_device_intr_done(usbd_xfer_handle xfer)
1500 1.1 augustss {
1501 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1502 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1503 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1504 1.48 augustss ohci_soft_td_t *data, *tail;
1505 1.195 bouyer int isread =
1506 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1507 1.1 augustss
1508 1.140 gson DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1509 1.53 augustss xfer, xfer->actlen));
1510 1.1 augustss
1511 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1512 1.224 mrg
1513 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1514 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1515 1.53 augustss if (xfer->pipe->repeat) {
1516 1.60 augustss data = opipe->tail.td;
1517 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1518 1.53 augustss if (tail == NULL) {
1519 1.53 augustss xfer->status = USBD_NOMEM;
1520 1.1 augustss return;
1521 1.1 augustss }
1522 1.55 augustss tail->xfer = NULL;
1523 1.120 augustss
1524 1.168 augustss data->td.td_flags = HTOO32(
1525 1.120 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1526 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1527 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1528 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
1529 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1530 1.48 augustss data->nexttd = tail;
1531 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
1532 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1533 1.76 tsutsui xfer->length - 1);
1534 1.53 augustss data->len = xfer->length;
1535 1.53 augustss data->xfer = xfer;
1536 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1537 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
1538 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1539 1.53 augustss xfer->hcpriv = data;
1540 1.53 augustss xfer->actlen = 0;
1541 1.1 augustss
1542 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1543 1.195 bouyer usb_syncmem(&sed->dma,
1544 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1545 1.195 bouyer sizeof(sed->ed.ed_tailp),
1546 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1547 1.60 augustss opipe->tail.td = tail;
1548 1.1 augustss }
1549 1.1 augustss }
1550 1.1 augustss
1551 1.1 augustss void
1552 1.179 christos ohci_device_bulk_done(usbd_xfer_handle xfer)
1553 1.3 augustss {
1554 1.224 mrg #ifdef DIAGNOSTIC
1555 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
1556 1.224 mrg #endif
1557 1.195 bouyer int isread =
1558 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1559 1.195 bouyer
1560 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1561 1.224 mrg
1562 1.140 gson DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1563 1.53 augustss xfer, xfer->actlen));
1564 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1565 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1566 1.3 augustss }
1567 1.3 augustss
1568 1.224 mrg Static void
1569 1.224 mrg ohci_rhsc_softint(void *arg)
1570 1.224 mrg {
1571 1.224 mrg ohci_softc_t *sc = arg;
1572 1.224 mrg
1573 1.224 mrg mutex_enter(&sc->sc_lock);
1574 1.224 mrg
1575 1.224 mrg ohci_rhsc(sc, sc->sc_intrxfer);
1576 1.224 mrg
1577 1.224 mrg /* Do not allow RHSC interrupts > 1 per second */
1578 1.224 mrg callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1579 1.224 mrg
1580 1.224 mrg mutex_exit(&sc->sc_lock);
1581 1.224 mrg }
1582 1.224 mrg
1583 1.3 augustss void
1584 1.91 augustss ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1585 1.1 augustss {
1586 1.1 augustss usbd_pipe_handle pipe;
1587 1.1 augustss u_char *p;
1588 1.1 augustss int i, m;
1589 1.1 augustss int hstatus;
1590 1.1 augustss
1591 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1592 1.224 mrg
1593 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1594 1.120 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1595 1.53 augustss sc, xfer, hstatus));
1596 1.1 augustss
1597 1.53 augustss if (xfer == NULL) {
1598 1.1 augustss /* Just ignore the change. */
1599 1.1 augustss return;
1600 1.1 augustss }
1601 1.1 augustss
1602 1.53 augustss pipe = xfer->pipe;
1603 1.1 augustss
1604 1.123 augustss p = KERNADDR(&xfer->dmabuf, 0);
1605 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1606 1.53 augustss memset(p, 0, xfer->length);
1607 1.1 augustss for (i = 1; i <= m; i++) {
1608 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1609 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1610 1.1 augustss p[i/8] |= 1 << (i%8);
1611 1.1 augustss }
1612 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1613 1.53 augustss xfer->actlen = xfer->length;
1614 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1615 1.1 augustss
1616 1.53 augustss usb_transfer_complete(xfer);
1617 1.38 augustss }
1618 1.38 augustss
1619 1.38 augustss void
1620 1.179 christos ohci_root_intr_done(usbd_xfer_handle xfer)
1621 1.65 augustss {
1622 1.65 augustss }
1623 1.65 augustss
1624 1.65 augustss void
1625 1.179 christos ohci_root_ctrl_done(usbd_xfer_handle xfer)
1626 1.38 augustss {
1627 1.1 augustss }
1628 1.1 augustss
1629 1.1 augustss /*
1630 1.1 augustss * Wait here until controller claims to have an interrupt.
1631 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1632 1.1 augustss * too long.
1633 1.1 augustss */
1634 1.1 augustss void
1635 1.91 augustss ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1636 1.1 augustss {
1637 1.163 augustss int timo;
1638 1.1 augustss u_int32_t intrs;
1639 1.1 augustss
1640 1.224 mrg mutex_enter(&sc->sc_lock);
1641 1.224 mrg
1642 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1643 1.163 augustss for (timo = xfer->timeout; timo >= 0; timo--) {
1644 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1645 1.116 augustss if (sc->sc_dying)
1646 1.116 augustss break;
1647 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1648 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1649 1.52 augustss #ifdef OHCI_DEBUG
1650 1.1 augustss if (ohcidebug > 15)
1651 1.1 augustss ohci_dumpregs(sc);
1652 1.1 augustss #endif
1653 1.1 augustss if (intrs) {
1654 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1655 1.53 augustss ohci_intr1(sc);
1656 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1657 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1658 1.230 jmcneill goto done;
1659 1.1 augustss }
1660 1.1 augustss }
1661 1.15 augustss
1662 1.15 augustss /* Timeout */
1663 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1664 1.53 augustss xfer->status = USBD_TIMEOUT;
1665 1.53 augustss usb_transfer_complete(xfer);
1666 1.224 mrg
1667 1.15 augustss /* XXX should free TD */
1668 1.224 mrg
1669 1.230 jmcneill done:
1670 1.224 mrg mutex_exit(&sc->sc_lock);
1671 1.5 augustss }
1672 1.5 augustss
1673 1.5 augustss void
1674 1.91 augustss ohci_poll(struct usbd_bus *bus)
1675 1.5 augustss {
1676 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1677 1.105 augustss #ifdef OHCI_DEBUG
1678 1.105 augustss static int last;
1679 1.105 augustss int new;
1680 1.105 augustss new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1681 1.105 augustss if (new != last) {
1682 1.105 augustss DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1683 1.105 augustss last = new;
1684 1.105 augustss }
1685 1.105 augustss #endif
1686 1.5 augustss
1687 1.217 jmcneill sc->sc_eintrs |= OHCI_WDH;
1688 1.224 mrg if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
1689 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1690 1.53 augustss ohci_intr1(sc);
1691 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1692 1.224 mrg }
1693 1.1 augustss }
1694 1.1 augustss
1695 1.1 augustss usbd_status
1696 1.91 augustss ohci_device_request(usbd_xfer_handle xfer)
1697 1.1 augustss {
1698 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1699 1.53 augustss usb_device_request_t *req = &xfer->request;
1700 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1701 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
1702 1.1 augustss int addr = dev->address;
1703 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1704 1.1 augustss ohci_soft_ed_t *sed;
1705 1.1 augustss int isread;
1706 1.1 augustss int len;
1707 1.53 augustss usbd_status err;
1708 1.224 mrg
1709 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1710 1.1 augustss
1711 1.1 augustss isread = req->bmRequestType & UT_READ;
1712 1.1 augustss len = UGETW(req->wLength);
1713 1.1 augustss
1714 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1715 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1716 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1717 1.120 augustss UGETW(req->wIndex), len, addr,
1718 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1719 1.1 augustss
1720 1.60 augustss setup = opipe->tail.td;
1721 1.1 augustss stat = ohci_alloc_std(sc);
1722 1.53 augustss if (stat == NULL) {
1723 1.53 augustss err = USBD_NOMEM;
1724 1.1 augustss goto bad1;
1725 1.1 augustss }
1726 1.1 augustss tail = ohci_alloc_std(sc);
1727 1.53 augustss if (tail == NULL) {
1728 1.53 augustss err = USBD_NOMEM;
1729 1.1 augustss goto bad2;
1730 1.1 augustss }
1731 1.55 augustss tail->xfer = NULL;
1732 1.1 augustss
1733 1.1 augustss sed = opipe->sed;
1734 1.1 augustss opipe->u.ctl.length = len;
1735 1.1 augustss
1736 1.148 mycroft /* Update device address and length since they may have changed
1737 1.148 mycroft during the setup of the control pipe in usbd_new_device(). */
1738 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1739 1.77 augustss /* XXXX Should not touch ED here! */
1740 1.195 bouyer
1741 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1742 1.195 bouyer sizeof(sed->ed.ed_flags),
1743 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1744 1.168 augustss sed->ed.ed_flags = HTOO32(
1745 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1746 1.16 augustss OHCI_ED_SET_FA(addr) |
1747 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1748 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1749 1.195 bouyer sizeof(sed->ed.ed_flags),
1750 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1751 1.1 augustss
1752 1.77 augustss next = stat;
1753 1.77 augustss
1754 1.1 augustss /* Set up data transaction */
1755 1.1 augustss if (len != 0) {
1756 1.77 augustss ohci_soft_td_t *std = stat;
1757 1.77 augustss
1758 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1759 1.77 augustss std, &stat);
1760 1.77 augustss stat = stat->nexttd; /* point at free TD */
1761 1.77 augustss if (err)
1762 1.1 augustss goto bad3;
1763 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1764 1.168 augustss std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1765 1.168 augustss std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1766 1.195 bouyer usb_syncmem(&std->dma,
1767 1.195 bouyer std->offs + offsetof(ohci_td_t, td_flags),
1768 1.195 bouyer sizeof(std->td.td_flags),
1769 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1770 1.34 augustss }
1771 1.1 augustss
1772 1.123 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1773 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
1774 1.1 augustss
1775 1.168 augustss setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1776 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1777 1.168 augustss setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1778 1.1 augustss setup->nexttd = next;
1779 1.168 augustss setup->td.td_nexttd = HTOO32(next->physaddr);
1780 1.168 augustss setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1781 1.77 augustss setup->len = 0;
1782 1.53 augustss setup->xfer = xfer;
1783 1.34 augustss setup->flags = 0;
1784 1.53 augustss xfer->hcpriv = setup;
1785 1.195 bouyer usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
1786 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1787 1.1 augustss
1788 1.168 augustss stat->td.td_flags = HTOO32(
1789 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1790 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1791 1.39 augustss stat->td.td_cbp = 0;
1792 1.1 augustss stat->nexttd = tail;
1793 1.168 augustss stat->td.td_nexttd = HTOO32(tail->physaddr);
1794 1.39 augustss stat->td.td_be = 0;
1795 1.77 augustss stat->flags = OHCI_CALL_DONE;
1796 1.1 augustss stat->len = 0;
1797 1.53 augustss stat->xfer = xfer;
1798 1.195 bouyer usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
1799 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1800 1.1 augustss
1801 1.52 augustss #ifdef OHCI_DEBUG
1802 1.1 augustss if (ohcidebug > 5) {
1803 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1804 1.168 augustss ohci_dump_ed(sc, sed);
1805 1.168 augustss ohci_dump_tds(sc, setup);
1806 1.1 augustss }
1807 1.1 augustss #endif
1808 1.1 augustss
1809 1.1 augustss /* Insert ED in schedule */
1810 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1811 1.195 bouyer usb_syncmem(&sed->dma,
1812 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1813 1.195 bouyer sizeof(sed->ed.ed_tailp),
1814 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1815 1.60 augustss opipe->tail.td = tail;
1816 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1817 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1818 1.209 dyoung callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
1819 1.80 augustss ohci_timeout, xfer);
1820 1.15 augustss }
1821 1.1 augustss
1822 1.115 itojun #ifdef OHCI_DEBUG
1823 1.113 augustss if (ohcidebug > 20) {
1824 1.77 augustss delay(10000);
1825 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1826 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1827 1.113 augustss ohci_dumpregs(sc);
1828 1.113 augustss printf("ctrl head:\n");
1829 1.168 augustss ohci_dump_ed(sc, sc->sc_ctrl_head);
1830 1.113 augustss printf("sed:\n");
1831 1.168 augustss ohci_dump_ed(sc, sed);
1832 1.168 augustss ohci_dump_tds(sc, setup);
1833 1.1 augustss }
1834 1.1 augustss #endif
1835 1.1 augustss
1836 1.1 augustss return (USBD_NORMAL_COMPLETION);
1837 1.1 augustss
1838 1.1 augustss bad3:
1839 1.1 augustss ohci_free_std(sc, tail);
1840 1.1 augustss bad2:
1841 1.1 augustss ohci_free_std(sc, stat);
1842 1.1 augustss bad1:
1843 1.53 augustss return (err);
1844 1.1 augustss }
1845 1.1 augustss
1846 1.1 augustss /*
1847 1.224 mrg * Add an ED to the schedule. Called with USB lock held.
1848 1.1 augustss */
1849 1.224 mrg Static void
1850 1.168 augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1851 1.1 augustss {
1852 1.113 augustss DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1853 1.113 augustss
1854 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1855 1.224 mrg
1856 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1857 1.195 bouyer sizeof(head->ed.ed_nexted),
1858 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1859 1.1 augustss sed->next = head->next;
1860 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1861 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1862 1.195 bouyer sizeof(sed->ed.ed_nexted),
1863 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1864 1.1 augustss head->next = sed;
1865 1.168 augustss head->ed.ed_nexted = HTOO32(sed->physaddr);
1866 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1867 1.195 bouyer sizeof(head->ed.ed_nexted),
1868 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1869 1.1 augustss }
1870 1.1 augustss
1871 1.1 augustss /*
1872 1.224 mrg * Remove an ED from the schedule. Called with USB lock held.
1873 1.3 augustss */
1874 1.224 mrg Static void
1875 1.224 mrg ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1876 1.3 augustss {
1877 1.120 augustss ohci_soft_ed_t *p;
1878 1.3 augustss
1879 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1880 1.224 mrg
1881 1.3 augustss /* XXX */
1882 1.133 toshii for (p = head; p != NULL && p->next != sed; p = p->next)
1883 1.3 augustss ;
1884 1.55 augustss if (p == NULL)
1885 1.128 provos panic("ohci_rem_ed: ED not found");
1886 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1887 1.195 bouyer sizeof(sed->ed.ed_nexted),
1888 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1889 1.3 augustss p->next = sed->next;
1890 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1891 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1892 1.195 bouyer sizeof(p->ed.ed_nexted),
1893 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1894 1.3 augustss }
1895 1.3 augustss
1896 1.3 augustss /*
1897 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1898 1.1 augustss * the host controller. This queue is the processed by software.
1899 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1900 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1901 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1902 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1903 1.1 augustss * hash value.
1904 1.1 augustss */
1905 1.1 augustss
1906 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1907 1.224 mrg /* Called with USB lock held. */
1908 1.1 augustss void
1909 1.91 augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1910 1.1 augustss {
1911 1.1 augustss int h = HASH(std->physaddr);
1912 1.1 augustss
1913 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1914 1.224 mrg
1915 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1916 1.1 augustss }
1917 1.1 augustss
1918 1.224 mrg /* Called with USB lock held. */
1919 1.1 augustss void
1920 1.179 christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1921 1.1 augustss {
1922 1.46 augustss
1923 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1924 1.224 mrg
1925 1.1 augustss LIST_REMOVE(std, hnext);
1926 1.1 augustss }
1927 1.1 augustss
1928 1.1 augustss ohci_soft_td_t *
1929 1.91 augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1930 1.1 augustss {
1931 1.1 augustss int h = HASH(a);
1932 1.1 augustss ohci_soft_td_t *std;
1933 1.1 augustss
1934 1.120 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1935 1.53 augustss std != NULL;
1936 1.1 augustss std = LIST_NEXT(std, hnext))
1937 1.1 augustss if (std->physaddr == a)
1938 1.1 augustss return (std);
1939 1.83 augustss return (NULL);
1940 1.83 augustss }
1941 1.83 augustss
1942 1.224 mrg /* Called with USB lock held. */
1943 1.83 augustss void
1944 1.91 augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1945 1.83 augustss {
1946 1.83 augustss int h = HASH(sitd->physaddr);
1947 1.83 augustss
1948 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1949 1.224 mrg
1950 1.120 augustss DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1951 1.83 augustss sitd, (u_long)sitd->physaddr));
1952 1.83 augustss
1953 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1954 1.83 augustss }
1955 1.83 augustss
1956 1.224 mrg /* Called with USB lock held. */
1957 1.83 augustss void
1958 1.179 christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1959 1.83 augustss {
1960 1.83 augustss
1961 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1962 1.224 mrg
1963 1.120 augustss DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1964 1.83 augustss sitd, (u_long)sitd->physaddr));
1965 1.83 augustss
1966 1.83 augustss LIST_REMOVE(sitd, hnext);
1967 1.83 augustss }
1968 1.83 augustss
1969 1.83 augustss ohci_soft_itd_t *
1970 1.91 augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1971 1.83 augustss {
1972 1.83 augustss int h = HASH(a);
1973 1.83 augustss ohci_soft_itd_t *sitd;
1974 1.83 augustss
1975 1.120 augustss for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1976 1.83 augustss sitd != NULL;
1977 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1978 1.83 augustss if (sitd->physaddr == a)
1979 1.83 augustss return (sitd);
1980 1.83 augustss return (NULL);
1981 1.1 augustss }
1982 1.1 augustss
1983 1.1 augustss void
1984 1.91 augustss ohci_timeout(void *addr)
1985 1.1 augustss {
1986 1.114 augustss struct ohci_xfer *oxfer = addr;
1987 1.116 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1988 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1989 1.114 augustss
1990 1.114 augustss DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1991 1.114 augustss
1992 1.116 augustss if (sc->sc_dying) {
1993 1.224 mrg mutex_enter(&sc->sc_lock);
1994 1.116 augustss ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1995 1.224 mrg mutex_exit(&sc->sc_lock);
1996 1.116 augustss return;
1997 1.116 augustss }
1998 1.116 augustss
1999 1.114 augustss /* Execute the abort in a process context. */
2000 1.231 jmcneill usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr,
2001 1.231 jmcneill USB_TASKQ_MPSAFE);
2002 1.178 joerg usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
2003 1.178 joerg USB_TASKQ_HC);
2004 1.114 augustss }
2005 1.114 augustss
2006 1.114 augustss void
2007 1.114 augustss ohci_timeout_task(void *addr)
2008 1.114 augustss {
2009 1.53 augustss usbd_xfer_handle xfer = addr;
2010 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2011 1.1 augustss
2012 1.114 augustss DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
2013 1.45 augustss
2014 1.224 mrg mutex_enter(&sc->sc_lock);
2015 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
2016 1.224 mrg mutex_exit(&sc->sc_lock);
2017 1.1 augustss }
2018 1.1 augustss
2019 1.52 augustss #ifdef OHCI_DEBUG
2020 1.1 augustss void
2021 1.168 augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
2022 1.1 augustss {
2023 1.1 augustss for (; std; std = std->nexttd)
2024 1.168 augustss ohci_dump_td(sc, std);
2025 1.1 augustss }
2026 1.1 augustss
2027 1.1 augustss void
2028 1.168 augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
2029 1.1 augustss {
2030 1.92 tv char sbuf[128];
2031 1.92 tv
2032 1.204 martin usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2033 1.204 martin BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2034 1.197 christos snprintb(sbuf, sizeof(sbuf),
2035 1.197 christos "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
2036 1.197 christos (u_int32_t)O32TOH(std->td.td_flags));
2037 1.107 augustss printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
2038 1.120 augustss "nexttd=0x%08lx be=0x%08lx\n",
2039 1.107 augustss std, (u_long)std->physaddr, sbuf,
2040 1.168 augustss OHCI_TD_GET_DI(O32TOH(std->td.td_flags)),
2041 1.168 augustss OHCI_TD_GET_EC(O32TOH(std->td.td_flags)),
2042 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
2043 1.168 augustss (u_long)O32TOH(std->td.td_cbp),
2044 1.168 augustss (u_long)O32TOH(std->td.td_nexttd),
2045 1.168 augustss (u_long)O32TOH(std->td.td_be));
2046 1.1 augustss }
2047 1.1 augustss
2048 1.1 augustss void
2049 1.168 augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2050 1.83 augustss {
2051 1.83 augustss int i;
2052 1.83 augustss
2053 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
2054 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2055 1.107 augustss printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2056 1.120 augustss "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2057 1.107 augustss sitd, (u_long)sitd->physaddr,
2058 1.168 augustss OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
2059 1.168 augustss OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
2060 1.168 augustss OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
2061 1.168 augustss OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
2062 1.168 augustss (u_long)O32TOH(sitd->itd.itd_bp0),
2063 1.168 augustss (u_long)O32TOH(sitd->itd.itd_nextitd),
2064 1.168 augustss (u_long)O32TOH(sitd->itd.itd_be));
2065 1.83 augustss for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2066 1.107 augustss printf("offs[%d]=0x%04x ", i,
2067 1.168 augustss (u_int)O16TOH(sitd->itd.itd_offset[i]));
2068 1.107 augustss printf("\n");
2069 1.83 augustss }
2070 1.83 augustss
2071 1.83 augustss void
2072 1.168 augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2073 1.83 augustss {
2074 1.83 augustss for (; sitd; sitd = sitd->nextitd)
2075 1.168 augustss ohci_dump_itd(sc, sitd);
2076 1.83 augustss }
2077 1.83 augustss
2078 1.83 augustss void
2079 1.168 augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2080 1.1 augustss {
2081 1.92 tv char sbuf[128], sbuf2[128];
2082 1.92 tv
2083 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2084 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2085 1.197 christos snprintb(sbuf, sizeof(sbuf),
2086 1.197 christos "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2087 1.197 christos (u_int32_t)O32TOH(sed->ed.ed_flags));
2088 1.197 christos snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY",
2089 1.197 christos (u_int32_t)O32TOH(sed->ed.ed_headp));
2090 1.92 tv
2091 1.107 augustss printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2092 1.92 tv "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2093 1.120 augustss sed, (u_long)sed->physaddr,
2094 1.168 augustss OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
2095 1.168 augustss OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
2096 1.168 augustss OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
2097 1.168 augustss (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
2098 1.168 augustss (u_long)O32TOH(sed->ed.ed_headp),
2099 1.168 augustss (u_long)O32TOH(sed->ed.ed_nexted));
2100 1.1 augustss }
2101 1.1 augustss #endif
2102 1.1 augustss
2103 1.1 augustss usbd_status
2104 1.91 augustss ohci_open(usbd_pipe_handle pipe)
2105 1.1 augustss {
2106 1.1 augustss usbd_device_handle dev = pipe->device;
2107 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
2108 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2109 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2110 1.1 augustss u_int8_t addr = dev->address;
2111 1.60 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2112 1.1 augustss ohci_soft_ed_t *sed;
2113 1.1 augustss ohci_soft_td_t *std;
2114 1.60 augustss ohci_soft_itd_t *sitd;
2115 1.60 augustss ohci_physaddr_t tdphys;
2116 1.60 augustss u_int32_t fmt;
2117 1.224 mrg usbd_status err = USBD_NOMEM;
2118 1.64 augustss int ival;
2119 1.1 augustss
2120 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2121 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2122 1.81 augustss
2123 1.224 mrg if (sc->sc_dying) {
2124 1.224 mrg err = USBD_IOERROR;
2125 1.224 mrg goto bad0;
2126 1.224 mrg }
2127 1.116 augustss
2128 1.90 thorpej std = NULL;
2129 1.90 thorpej sed = NULL;
2130 1.90 thorpej
2131 1.1 augustss if (addr == sc->sc_addr) {
2132 1.1 augustss switch (ed->bEndpointAddress) {
2133 1.1 augustss case USB_CONTROL_ENDPOINT:
2134 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
2135 1.1 augustss break;
2136 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
2137 1.1 augustss pipe->methods = &ohci_root_intr_methods;
2138 1.1 augustss break;
2139 1.1 augustss default:
2140 1.224 mrg err = USBD_INVAL;
2141 1.224 mrg goto bad0;
2142 1.1 augustss }
2143 1.1 augustss } else {
2144 1.1 augustss sed = ohci_alloc_sed(sc);
2145 1.53 augustss if (sed == NULL)
2146 1.1 augustss goto bad0;
2147 1.1 augustss opipe->sed = sed;
2148 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
2149 1.224 mrg mutex_enter(&sc->sc_lock);
2150 1.60 augustss sitd = ohci_alloc_sitd(sc);
2151 1.224 mrg mutex_exit(&sc->sc_lock);
2152 1.127 augustss if (sitd == NULL)
2153 1.60 augustss goto bad1;
2154 1.60 augustss opipe->tail.itd = sitd;
2155 1.76 tsutsui tdphys = sitd->physaddr;
2156 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
2157 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2158 1.83 augustss fmt |= OHCI_ED_DIR_IN;
2159 1.83 augustss else
2160 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
2161 1.60 augustss } else {
2162 1.224 mrg mutex_enter(&sc->sc_lock);
2163 1.60 augustss std = ohci_alloc_std(sc);
2164 1.224 mrg mutex_exit(&sc->sc_lock);
2165 1.127 augustss if (std == NULL)
2166 1.60 augustss goto bad1;
2167 1.60 augustss opipe->tail.td = std;
2168 1.76 tsutsui tdphys = std->physaddr;
2169 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2170 1.60 augustss }
2171 1.168 augustss sed->ed.ed_flags = HTOO32(
2172 1.120 augustss OHCI_ED_SET_FA(addr) |
2173 1.147 mycroft OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2174 1.109 augustss (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2175 1.109 augustss fmt |
2176 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2177 1.214 jakllsch sed->ed.ed_headp = HTOO32(tdphys |
2178 1.214 jakllsch (pipe->endpoint->datatoggle ? OHCI_TOGGLECARRY : 0));
2179 1.214 jakllsch sed->ed.ed_tailp = HTOO32(tdphys);
2180 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2181 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2182 1.1 augustss
2183 1.60 augustss switch (xfertype) {
2184 1.1 augustss case UE_CONTROL:
2185 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
2186 1.120 augustss err = usb_allocmem(&sc->sc_bus,
2187 1.120 augustss sizeof(usb_device_request_t),
2188 1.53 augustss 0, &opipe->u.ctl.reqdma);
2189 1.53 augustss if (err)
2190 1.1 augustss goto bad;
2191 1.224 mrg mutex_enter(&sc->sc_lock);
2192 1.168 augustss ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2193 1.224 mrg mutex_exit(&sc->sc_lock);
2194 1.1 augustss break;
2195 1.1 augustss case UE_INTERRUPT:
2196 1.1 augustss pipe->methods = &ohci_device_intr_methods;
2197 1.64 augustss ival = pipe->interval;
2198 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
2199 1.64 augustss ival = ed->bInterval;
2200 1.226 skrll err = ohci_device_setintr(sc, opipe, ival);
2201 1.226 skrll if (err)
2202 1.226 skrll goto bad;
2203 1.226 skrll break;
2204 1.1 augustss case UE_ISOCHRONOUS:
2205 1.60 augustss pipe->methods = &ohci_device_isoc_methods;
2206 1.60 augustss return (ohci_setup_isoc(pipe));
2207 1.1 augustss case UE_BULK:
2208 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
2209 1.224 mrg mutex_enter(&sc->sc_lock);
2210 1.168 augustss ohci_add_ed(sc, sed, sc->sc_bulk_head);
2211 1.224 mrg mutex_exit(&sc->sc_lock);
2212 1.3 augustss break;
2213 1.1 augustss }
2214 1.1 augustss }
2215 1.224 mrg
2216 1.224 mrg return USBD_NORMAL_COMPLETION;
2217 1.1 augustss
2218 1.1 augustss bad:
2219 1.90 thorpej if (std != NULL)
2220 1.90 thorpej ohci_free_std(sc, std);
2221 1.1 augustss bad1:
2222 1.90 thorpej if (sed != NULL)
2223 1.90 thorpej ohci_free_sed(sc, sed);
2224 1.1 augustss bad0:
2225 1.224 mrg return err;
2226 1.120 augustss
2227 1.1 augustss }
2228 1.1 augustss
2229 1.1 augustss /*
2230 1.34 augustss * Close a reqular pipe.
2231 1.34 augustss * Assumes that there are no pending transactions.
2232 1.34 augustss */
2233 1.34 augustss void
2234 1.91 augustss ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2235 1.34 augustss {
2236 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2237 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2238 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
2239 1.34 augustss
2240 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2241 1.224 mrg
2242 1.34 augustss #ifdef DIAGNOSTIC
2243 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2244 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2245 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2246 1.34 augustss ohci_soft_td_t *std;
2247 1.168 augustss std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2248 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2249 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
2250 1.168 augustss (int)O32TOH(sed->ed.ed_headp),
2251 1.168 augustss (int)O32TOH(sed->ed.ed_tailp),
2252 1.34 augustss pipe, std);
2253 1.229 christos #ifdef OHCI_DEBUG
2254 1.107 augustss usbd_dump_pipe(&opipe->pipe);
2255 1.168 augustss ohci_dump_ed(sc, sed);
2256 1.106 augustss if (std)
2257 1.168 augustss ohci_dump_td(sc, std);
2258 1.106 augustss #endif
2259 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
2260 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2261 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2262 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
2263 1.34 augustss }
2264 1.34 augustss #endif
2265 1.224 mrg ohci_rem_ed(sc, sed, head);
2266 1.133 toshii /* Make sure the host controller is not touching this ED */
2267 1.133 toshii usb_delay_ms(&sc->sc_bus, 1);
2268 1.214 jakllsch pipe->endpoint->datatoggle =
2269 1.214 jakllsch (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2270 1.34 augustss ohci_free_sed(sc, opipe->sed);
2271 1.34 augustss }
2272 1.34 augustss
2273 1.120 augustss /*
2274 1.34 augustss * Abort a device request.
2275 1.34 augustss * If this routine is called at splusb() it guarantees that the request
2276 1.34 augustss * will be removed from the hardware scheduling and that the callback
2277 1.34 augustss * for it will be called with USBD_CANCELLED status.
2278 1.34 augustss * It's impossible to guarantee that the requested transfer will not
2279 1.34 augustss * have happened since the hardware runs concurrently.
2280 1.34 augustss * If the transaction has already happened we rely on the ordinary
2281 1.34 augustss * interrupt processing to process it.
2282 1.224 mrg * XXX This is most probably wrong.
2283 1.224 mrg * XXXMRG this doesn't make sense anymore.
2284 1.34 augustss */
2285 1.34 augustss void
2286 1.91 augustss ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2287 1.34 augustss {
2288 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2289 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
2290 1.106 augustss ohci_soft_ed_t *sed = opipe->sed;
2291 1.106 augustss ohci_soft_td_t *p, *n;
2292 1.106 augustss ohci_physaddr_t headp;
2293 1.224 mrg int hit;
2294 1.159 augustss int wake;
2295 1.34 augustss
2296 1.106 augustss DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2297 1.34 augustss
2298 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2299 1.224 mrg
2300 1.116 augustss if (sc->sc_dying) {
2301 1.116 augustss /* If we're dying, just do the software part. */
2302 1.116 augustss xfer->status = status; /* make software ignore it */
2303 1.224 mrg callout_halt(&xfer->timeout_handle, &sc->sc_lock);
2304 1.116 augustss usb_transfer_complete(xfer);
2305 1.170 christos return;
2306 1.116 augustss }
2307 1.116 augustss
2308 1.223 mrg if (cpu_intr_p() || cpu_softintr_p())
2309 1.128 provos panic("ohci_abort_xfer: not in process context");
2310 1.34 augustss
2311 1.106 augustss /*
2312 1.159 augustss * If an abort is already in progress then just wait for it to
2313 1.159 augustss * complete and return.
2314 1.159 augustss */
2315 1.159 augustss if (xfer->hcflags & UXFER_ABORTING) {
2316 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2317 1.159 augustss #ifdef DIAGNOSTIC
2318 1.159 augustss if (status == USBD_TIMEOUT)
2319 1.235 skrll printf("%s: TIMEOUT while aborting\n", __func__);
2320 1.159 augustss #endif
2321 1.159 augustss /* Override the status which might be USBD_TIMEOUT. */
2322 1.159 augustss xfer->status = status;
2323 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2324 1.159 augustss xfer->hcflags |= UXFER_ABORTWAIT;
2325 1.159 augustss while (xfer->hcflags & UXFER_ABORTING)
2326 1.224 mrg cv_wait(&xfer->hccv, &sc->sc_lock);
2327 1.224 mrg goto done;
2328 1.159 augustss }
2329 1.159 augustss xfer->hcflags |= UXFER_ABORTING;
2330 1.159 augustss
2331 1.159 augustss /*
2332 1.106 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2333 1.106 augustss */
2334 1.106 augustss xfer->status = status; /* make software ignore it */
2335 1.209 dyoung callout_stop(&xfer->timeout_handle);
2336 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2337 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2338 1.195 bouyer sizeof(sed->ed.ed_flags),
2339 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2340 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2341 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2342 1.195 bouyer sizeof(sed->ed.ed_flags),
2343 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2344 1.34 augustss
2345 1.120 augustss /*
2346 1.106 augustss * Step 2: Wait until we know hardware has finished any possible
2347 1.106 augustss * use of the xfer. Also make sure the soft interrupt routine
2348 1.106 augustss * has run.
2349 1.106 augustss */
2350 1.224 mrg /* Hardware finishes in 1ms */
2351 1.224 mrg usb_delay_ms_locked(opipe->pipe.device->bus, 20, &sc->sc_lock);
2352 1.119 augustss sc->sc_softwake = 1;
2353 1.119 augustss usb_schedsoftintr(&sc->sc_bus);
2354 1.224 mrg cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
2355 1.119 augustss
2356 1.120 augustss /*
2357 1.106 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2358 1.106 augustss * The complication here is that the hardware may have executed
2359 1.106 augustss * beyond the xfer we're trying to abort. So as we're scanning
2360 1.106 augustss * the TDs of this xfer we check if the hardware points to
2361 1.106 augustss * any of them.
2362 1.106 augustss */
2363 1.53 augustss p = xfer->hcpriv;
2364 1.34 augustss #ifdef DIAGNOSTIC
2365 1.55 augustss if (p == NULL) {
2366 1.159 augustss xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2367 1.106 augustss printf("ohci_abort_xfer: hcpriv is NULL\n");
2368 1.224 mrg goto done;
2369 1.38 augustss }
2370 1.34 augustss #endif
2371 1.106 augustss #ifdef OHCI_DEBUG
2372 1.106 augustss if (ohcidebug > 1) {
2373 1.106 augustss DPRINTF(("ohci_abort_xfer: sed=\n"));
2374 1.168 augustss ohci_dump_ed(sc, sed);
2375 1.168 augustss ohci_dump_tds(sc, p);
2376 1.106 augustss }
2377 1.106 augustss #endif
2378 1.168 augustss headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2379 1.106 augustss hit = 0;
2380 1.53 augustss for (; p->xfer == xfer; p = n) {
2381 1.106 augustss hit |= headp == p->physaddr;
2382 1.38 augustss n = p->nexttd;
2383 1.38 augustss ohci_free_std(sc, p);
2384 1.34 augustss }
2385 1.106 augustss /* Zap headp register if hardware pointed inside the xfer. */
2386 1.106 augustss if (hit) {
2387 1.150 mycroft DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2388 1.168 augustss (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2389 1.168 augustss sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2390 1.195 bouyer usb_syncmem(&sed->dma,
2391 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_headp),
2392 1.195 bouyer sizeof(sed->ed.ed_headp),
2393 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2394 1.106 augustss } else {
2395 1.106 augustss DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2396 1.106 augustss }
2397 1.34 augustss
2398 1.106 augustss /*
2399 1.106 augustss * Step 4: Turn on hardware again.
2400 1.106 augustss */
2401 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2402 1.195 bouyer sizeof(sed->ed.ed_flags),
2403 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2404 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2405 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2406 1.195 bouyer sizeof(sed->ed.ed_flags),
2407 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2408 1.38 augustss
2409 1.106 augustss /*
2410 1.106 augustss * Step 5: Execute callback.
2411 1.106 augustss */
2412 1.159 augustss wake = xfer->hcflags & UXFER_ABORTWAIT;
2413 1.159 augustss xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2414 1.53 augustss usb_transfer_complete(xfer);
2415 1.159 augustss if (wake)
2416 1.224 mrg cv_broadcast(&xfer->hccv);
2417 1.38 augustss
2418 1.224 mrg done:
2419 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2420 1.34 augustss }
2421 1.34 augustss
2422 1.34 augustss /*
2423 1.1 augustss * Data structures and routines to emulate the root hub.
2424 1.1 augustss */
2425 1.82 augustss Static usb_device_descriptor_t ohci_devd = {
2426 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2427 1.1 augustss UDESC_DEVICE, /* type */
2428 1.1 augustss {0x00, 0x01}, /* USB version */
2429 1.74 augustss UDCLASS_HUB, /* class */
2430 1.74 augustss UDSUBCLASS_HUB, /* subclass */
2431 1.202 uebayasi UDPROTO_FSHUB, /* protocol */
2432 1.1 augustss 64, /* max packet */
2433 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2434 1.1 augustss 1,2,0, /* string indicies */
2435 1.1 augustss 1 /* # of configurations */
2436 1.1 augustss };
2437 1.1 augustss
2438 1.182 drochner Static const usb_config_descriptor_t ohci_confd = {
2439 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2440 1.1 augustss UDESC_CONFIG,
2441 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2442 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2443 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2444 1.1 augustss 1,
2445 1.1 augustss 1,
2446 1.1 augustss 0,
2447 1.180 drochner UC_ATTR_MBO | UC_SELF_POWERED,
2448 1.1 augustss 0 /* max power */
2449 1.1 augustss };
2450 1.1 augustss
2451 1.182 drochner Static const usb_interface_descriptor_t ohci_ifcd = {
2452 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2453 1.1 augustss UDESC_INTERFACE,
2454 1.1 augustss 0,
2455 1.1 augustss 0,
2456 1.1 augustss 1,
2457 1.74 augustss UICLASS_HUB,
2458 1.74 augustss UISUBCLASS_HUB,
2459 1.109 augustss UIPROTO_FSHUB,
2460 1.1 augustss 0
2461 1.1 augustss };
2462 1.1 augustss
2463 1.182 drochner Static const usb_endpoint_descriptor_t ohci_endpd = {
2464 1.175 christos .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2465 1.175 christos .bDescriptorType = UDESC_ENDPOINT,
2466 1.175 christos .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2467 1.175 christos .bmAttributes = UE_INTERRUPT,
2468 1.175 christos .wMaxPacketSize = {8, 0}, /* max packet */
2469 1.175 christos .bInterval = 255,
2470 1.1 augustss };
2471 1.1 augustss
2472 1.182 drochner Static const usb_hub_descriptor_t ohci_hubd = {
2473 1.175 christos .bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2474 1.175 christos .bDescriptorType = UDESC_HUB,
2475 1.1 augustss };
2476 1.1 augustss
2477 1.1 augustss /*
2478 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2479 1.1 augustss */
2480 1.82 augustss Static usbd_status
2481 1.91 augustss ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2482 1.1 augustss {
2483 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2484 1.53 augustss usbd_status err;
2485 1.17 augustss
2486 1.46 augustss /* Insert last in queue. */
2487 1.224 mrg mutex_enter(&sc->sc_lock);
2488 1.53 augustss err = usb_insert_transfer(xfer);
2489 1.224 mrg mutex_exit(&sc->sc_lock);
2490 1.53 augustss if (err)
2491 1.53 augustss return (err);
2492 1.46 augustss
2493 1.46 augustss /* Pipe isn't running, start first */
2494 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2495 1.17 augustss }
2496 1.17 augustss
2497 1.82 augustss Static usbd_status
2498 1.91 augustss ohci_root_ctrl_start(usbd_xfer_handle xfer)
2499 1.17 augustss {
2500 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2501 1.1 augustss usb_device_request_t *req;
2502 1.52 augustss void *buf = NULL;
2503 1.1 augustss int port, i;
2504 1.224 mrg int len, value, index, l, totlen = 0;
2505 1.1 augustss usb_port_status_t ps;
2506 1.1 augustss usb_hub_descriptor_t hubd;
2507 1.53 augustss usbd_status err;
2508 1.1 augustss u_int32_t v;
2509 1.1 augustss
2510 1.83 augustss if (sc->sc_dying)
2511 1.83 augustss return (USBD_IOERROR);
2512 1.83 augustss
2513 1.42 augustss #ifdef DIAGNOSTIC
2514 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
2515 1.1 augustss /* XXX panic */
2516 1.1 augustss return (USBD_INVAL);
2517 1.42 augustss #endif
2518 1.53 augustss req = &xfer->request;
2519 1.1 augustss
2520 1.120 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2521 1.1 augustss req->bmRequestType, req->bRequest));
2522 1.1 augustss
2523 1.1 augustss len = UGETW(req->wLength);
2524 1.1 augustss value = UGETW(req->wValue);
2525 1.1 augustss index = UGETW(req->wIndex);
2526 1.43 augustss
2527 1.43 augustss if (len != 0)
2528 1.123 augustss buf = KERNADDR(&xfer->dmabuf, 0);
2529 1.43 augustss
2530 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2531 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2532 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2533 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2534 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2535 1.120 augustss /*
2536 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2537 1.1 augustss * for the integrated root hub.
2538 1.1 augustss */
2539 1.1 augustss break;
2540 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2541 1.1 augustss if (len > 0) {
2542 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2543 1.1 augustss totlen = 1;
2544 1.1 augustss }
2545 1.1 augustss break;
2546 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2547 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2548 1.171 christos if (len == 0)
2549 1.171 christos break;
2550 1.1 augustss switch(value >> 8) {
2551 1.1 augustss case UDESC_DEVICE:
2552 1.1 augustss if ((value & 0xff) != 0) {
2553 1.53 augustss err = USBD_IOERROR;
2554 1.1 augustss goto ret;
2555 1.1 augustss }
2556 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2557 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2558 1.1 augustss memcpy(buf, &ohci_devd, l);
2559 1.1 augustss break;
2560 1.1 augustss case UDESC_CONFIG:
2561 1.1 augustss if ((value & 0xff) != 0) {
2562 1.53 augustss err = USBD_IOERROR;
2563 1.1 augustss goto ret;
2564 1.1 augustss }
2565 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2566 1.1 augustss memcpy(buf, &ohci_confd, l);
2567 1.1 augustss buf = (char *)buf + l;
2568 1.1 augustss len -= l;
2569 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2570 1.1 augustss totlen += l;
2571 1.1 augustss memcpy(buf, &ohci_ifcd, l);
2572 1.1 augustss buf = (char *)buf + l;
2573 1.1 augustss len -= l;
2574 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2575 1.1 augustss totlen += l;
2576 1.1 augustss memcpy(buf, &ohci_endpd, l);
2577 1.1 augustss break;
2578 1.1 augustss case UDESC_STRING:
2579 1.186 drochner #define sd ((usb_string_descriptor_t *)buf)
2580 1.1 augustss switch (value & 0xff) {
2581 1.152 augustss case 0: /* Language table */
2582 1.186 drochner totlen = usb_makelangtbl(sd, len);
2583 1.152 augustss break;
2584 1.1 augustss case 1: /* Vendor */
2585 1.186 drochner totlen = usb_makestrdesc(sd, len,
2586 1.186 drochner sc->sc_vendor);
2587 1.1 augustss break;
2588 1.1 augustss case 2: /* Product */
2589 1.186 drochner totlen = usb_makestrdesc(sd, len,
2590 1.186 drochner "OHCI root hub");
2591 1.1 augustss break;
2592 1.1 augustss }
2593 1.186 drochner #undef sd
2594 1.1 augustss break;
2595 1.1 augustss default:
2596 1.53 augustss err = USBD_IOERROR;
2597 1.1 augustss goto ret;
2598 1.1 augustss }
2599 1.1 augustss break;
2600 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2601 1.1 augustss if (len > 0) {
2602 1.1 augustss *(u_int8_t *)buf = 0;
2603 1.1 augustss totlen = 1;
2604 1.1 augustss }
2605 1.1 augustss break;
2606 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2607 1.1 augustss if (len > 1) {
2608 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2609 1.1 augustss totlen = 2;
2610 1.1 augustss }
2611 1.1 augustss break;
2612 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2613 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2614 1.1 augustss if (len > 1) {
2615 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2616 1.1 augustss totlen = 2;
2617 1.1 augustss }
2618 1.1 augustss break;
2619 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2620 1.1 augustss if (value >= USB_MAX_DEVICES) {
2621 1.53 augustss err = USBD_IOERROR;
2622 1.1 augustss goto ret;
2623 1.1 augustss }
2624 1.1 augustss sc->sc_addr = value;
2625 1.1 augustss break;
2626 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2627 1.1 augustss if (value != 0 && value != 1) {
2628 1.53 augustss err = USBD_IOERROR;
2629 1.1 augustss goto ret;
2630 1.1 augustss }
2631 1.1 augustss sc->sc_conf = value;
2632 1.1 augustss break;
2633 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2634 1.1 augustss break;
2635 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2636 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2637 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2638 1.53 augustss err = USBD_IOERROR;
2639 1.1 augustss goto ret;
2640 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2641 1.1 augustss break;
2642 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2643 1.1 augustss break;
2644 1.1 augustss /* Hub requests */
2645 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2646 1.1 augustss break;
2647 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2648 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2649 1.14 augustss "port=%d feature=%d\n",
2650 1.1 augustss index, value));
2651 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2652 1.53 augustss err = USBD_IOERROR;
2653 1.1 augustss goto ret;
2654 1.1 augustss }
2655 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2656 1.1 augustss switch(value) {
2657 1.1 augustss case UHF_PORT_ENABLE:
2658 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2659 1.1 augustss break;
2660 1.1 augustss case UHF_PORT_SUSPEND:
2661 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2662 1.1 augustss break;
2663 1.1 augustss case UHF_PORT_POWER:
2664 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2665 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2666 1.1 augustss break;
2667 1.1 augustss case UHF_C_PORT_CONNECTION:
2668 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2669 1.1 augustss break;
2670 1.1 augustss case UHF_C_PORT_ENABLE:
2671 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2672 1.1 augustss break;
2673 1.1 augustss case UHF_C_PORT_SUSPEND:
2674 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2675 1.1 augustss break;
2676 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2677 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2678 1.1 augustss break;
2679 1.1 augustss case UHF_C_PORT_RESET:
2680 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2681 1.1 augustss break;
2682 1.1 augustss default:
2683 1.53 augustss err = USBD_IOERROR;
2684 1.1 augustss goto ret;
2685 1.1 augustss }
2686 1.1 augustss switch(value) {
2687 1.1 augustss case UHF_C_PORT_CONNECTION:
2688 1.1 augustss case UHF_C_PORT_ENABLE:
2689 1.1 augustss case UHF_C_PORT_SUSPEND:
2690 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2691 1.1 augustss case UHF_C_PORT_RESET:
2692 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2693 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2694 1.157 mycroft ohci_rhsc_enable(sc);
2695 1.1 augustss break;
2696 1.1 augustss default:
2697 1.1 augustss break;
2698 1.1 augustss }
2699 1.1 augustss break;
2700 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2701 1.171 christos if (len == 0)
2702 1.171 christos break;
2703 1.146 toshii if ((value & 0xff) != 0) {
2704 1.53 augustss err = USBD_IOERROR;
2705 1.1 augustss goto ret;
2706 1.1 augustss }
2707 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2708 1.1 augustss hubd = ohci_hubd;
2709 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2710 1.15 augustss USETW(hubd.wHubCharacteristics,
2711 1.120 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2712 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2713 1.1 augustss /* XXX overcurrent */
2714 1.1 augustss );
2715 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2716 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2717 1.120 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2718 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
2719 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2720 1.1 augustss l = min(len, hubd.bDescLength);
2721 1.1 augustss totlen = l;
2722 1.1 augustss memcpy(buf, &hubd, l);
2723 1.1 augustss break;
2724 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2725 1.1 augustss if (len != 4) {
2726 1.53 augustss err = USBD_IOERROR;
2727 1.1 augustss goto ret;
2728 1.1 augustss }
2729 1.1 augustss memset(buf, 0, len); /* ? XXX */
2730 1.1 augustss totlen = len;
2731 1.1 augustss break;
2732 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2733 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2734 1.1 augustss index));
2735 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2736 1.53 augustss err = USBD_IOERROR;
2737 1.1 augustss goto ret;
2738 1.1 augustss }
2739 1.1 augustss if (len != 4) {
2740 1.53 augustss err = USBD_IOERROR;
2741 1.1 augustss goto ret;
2742 1.1 augustss }
2743 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2744 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2745 1.1 augustss v));
2746 1.1 augustss USETW(ps.wPortStatus, v);
2747 1.1 augustss USETW(ps.wPortChange, v >> 16);
2748 1.1 augustss l = min(len, sizeof ps);
2749 1.1 augustss memcpy(buf, &ps, l);
2750 1.1 augustss totlen = l;
2751 1.1 augustss break;
2752 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2753 1.53 augustss err = USBD_IOERROR;
2754 1.1 augustss goto ret;
2755 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2756 1.1 augustss break;
2757 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2758 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2759 1.53 augustss err = USBD_IOERROR;
2760 1.1 augustss goto ret;
2761 1.1 augustss }
2762 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2763 1.1 augustss switch(value) {
2764 1.1 augustss case UHF_PORT_ENABLE:
2765 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2766 1.1 augustss break;
2767 1.1 augustss case UHF_PORT_SUSPEND:
2768 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2769 1.1 augustss break;
2770 1.1 augustss case UHF_PORT_RESET:
2771 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2772 1.14 augustss index));
2773 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2774 1.110 augustss for (i = 0; i < 5; i++) {
2775 1.110 augustss usb_delay_ms(&sc->sc_bus,
2776 1.110 augustss USB_PORT_ROOT_RESET_DELAY);
2777 1.116 augustss if (sc->sc_dying) {
2778 1.116 augustss err = USBD_IOERROR;
2779 1.116 augustss goto ret;
2780 1.116 augustss }
2781 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2782 1.1 augustss break;
2783 1.1 augustss }
2784 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2785 1.1 augustss index, OREAD4(sc, port)));
2786 1.1 augustss break;
2787 1.1 augustss case UHF_PORT_POWER:
2788 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2789 1.14 augustss "%d\n", index));
2790 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2791 1.1 augustss break;
2792 1.1 augustss default:
2793 1.53 augustss err = USBD_IOERROR;
2794 1.1 augustss goto ret;
2795 1.1 augustss }
2796 1.1 augustss break;
2797 1.1 augustss default:
2798 1.53 augustss err = USBD_IOERROR;
2799 1.1 augustss goto ret;
2800 1.1 augustss }
2801 1.53 augustss xfer->actlen = totlen;
2802 1.53 augustss err = USBD_NORMAL_COMPLETION;
2803 1.1 augustss ret:
2804 1.53 augustss xfer->status = err;
2805 1.224 mrg mutex_enter(&sc->sc_lock);
2806 1.53 augustss usb_transfer_complete(xfer);
2807 1.224 mrg mutex_exit(&sc->sc_lock);
2808 1.1 augustss return (USBD_IN_PROGRESS);
2809 1.1 augustss }
2810 1.1 augustss
2811 1.1 augustss /* Abort a root control request. */
2812 1.82 augustss Static void
2813 1.179 christos ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2814 1.1 augustss {
2815 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2816 1.1 augustss }
2817 1.1 augustss
2818 1.1 augustss /* Close the root pipe. */
2819 1.82 augustss Static void
2820 1.179 christos ohci_root_ctrl_close(usbd_pipe_handle pipe)
2821 1.1 augustss {
2822 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2823 1.34 augustss /* Nothing to do. */
2824 1.1 augustss }
2825 1.1 augustss
2826 1.82 augustss Static usbd_status
2827 1.91 augustss ohci_root_intr_transfer(usbd_xfer_handle xfer)
2828 1.1 augustss {
2829 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2830 1.53 augustss usbd_status err;
2831 1.17 augustss
2832 1.46 augustss /* Insert last in queue. */
2833 1.224 mrg mutex_enter(&sc->sc_lock);
2834 1.53 augustss err = usb_insert_transfer(xfer);
2835 1.224 mrg mutex_exit(&sc->sc_lock);
2836 1.53 augustss if (err)
2837 1.53 augustss return (err);
2838 1.46 augustss
2839 1.46 augustss /* Pipe isn't running, start first */
2840 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2841 1.17 augustss }
2842 1.17 augustss
2843 1.82 augustss Static usbd_status
2844 1.91 augustss ohci_root_intr_start(usbd_xfer_handle xfer)
2845 1.17 augustss {
2846 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2847 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2848 1.1 augustss
2849 1.83 augustss if (sc->sc_dying)
2850 1.83 augustss return (USBD_IOERROR);
2851 1.83 augustss
2852 1.224 mrg mutex_enter(&sc->sc_lock);
2853 1.224 mrg KASSERT(sc->sc_intrxfer == NULL);
2854 1.53 augustss sc->sc_intrxfer = xfer;
2855 1.224 mrg mutex_exit(&sc->sc_lock);
2856 1.1 augustss
2857 1.1 augustss return (USBD_IN_PROGRESS);
2858 1.1 augustss }
2859 1.1 augustss
2860 1.3 augustss /* Abort a root interrupt request. */
2861 1.82 augustss Static void
2862 1.91 augustss ohci_root_intr_abort(usbd_xfer_handle xfer)
2863 1.1 augustss {
2864 1.224 mrg #ifdef DIAGNOSTIC
2865 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2866 1.224 mrg #endif
2867 1.224 mrg
2868 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2869 1.53 augustss
2870 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2871 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2872 1.53 augustss xfer->pipe->intrxfer = NULL;
2873 1.51 augustss }
2874 1.53 augustss xfer->status = USBD_CANCELLED;
2875 1.53 augustss usb_transfer_complete(xfer);
2876 1.1 augustss }
2877 1.1 augustss
2878 1.1 augustss /* Close the root pipe. */
2879 1.82 augustss Static void
2880 1.91 augustss ohci_root_intr_close(usbd_pipe_handle pipe)
2881 1.1 augustss {
2882 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2883 1.120 augustss
2884 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2885 1.224 mrg
2886 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2887 1.34 augustss
2888 1.53 augustss sc->sc_intrxfer = NULL;
2889 1.1 augustss }
2890 1.1 augustss
2891 1.1 augustss /************************/
2892 1.1 augustss
2893 1.82 augustss Static usbd_status
2894 1.91 augustss ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2895 1.1 augustss {
2896 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2897 1.53 augustss usbd_status err;
2898 1.17 augustss
2899 1.46 augustss /* Insert last in queue. */
2900 1.224 mrg mutex_enter(&sc->sc_lock);
2901 1.53 augustss err = usb_insert_transfer(xfer);
2902 1.224 mrg mutex_exit(&sc->sc_lock);
2903 1.53 augustss if (err)
2904 1.53 augustss return (err);
2905 1.46 augustss
2906 1.46 augustss /* Pipe isn't running, start first */
2907 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2908 1.17 augustss }
2909 1.17 augustss
2910 1.82 augustss Static usbd_status
2911 1.91 augustss ohci_device_ctrl_start(usbd_xfer_handle xfer)
2912 1.17 augustss {
2913 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2914 1.53 augustss usbd_status err;
2915 1.1 augustss
2916 1.83 augustss if (sc->sc_dying)
2917 1.83 augustss return (USBD_IOERROR);
2918 1.83 augustss
2919 1.42 augustss #ifdef DIAGNOSTIC
2920 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2921 1.1 augustss /* XXX panic */
2922 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2923 1.1 augustss return (USBD_INVAL);
2924 1.1 augustss }
2925 1.42 augustss #endif
2926 1.1 augustss
2927 1.224 mrg mutex_enter(&sc->sc_lock);
2928 1.53 augustss err = ohci_device_request(xfer);
2929 1.224 mrg mutex_exit(&sc->sc_lock);
2930 1.53 augustss if (err)
2931 1.53 augustss return (err);
2932 1.1 augustss
2933 1.6 augustss if (sc->sc_bus.use_polling)
2934 1.53 augustss ohci_waitintr(sc, xfer);
2935 1.1 augustss return (USBD_IN_PROGRESS);
2936 1.1 augustss }
2937 1.1 augustss
2938 1.1 augustss /* Abort a device control request. */
2939 1.82 augustss Static void
2940 1.91 augustss ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2941 1.1 augustss {
2942 1.224 mrg #ifdef DIAGNOSTIC
2943 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2944 1.224 mrg #endif
2945 1.224 mrg
2946 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2947 1.224 mrg
2948 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2949 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2950 1.1 augustss }
2951 1.1 augustss
2952 1.1 augustss /* Close a device control pipe. */
2953 1.82 augustss Static void
2954 1.91 augustss ohci_device_ctrl_close(usbd_pipe_handle pipe)
2955 1.1 augustss {
2956 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2957 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2958 1.1 augustss
2959 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2960 1.224 mrg
2961 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2962 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2963 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2964 1.3 augustss }
2965 1.3 augustss
2966 1.3 augustss /************************/
2967 1.37 augustss
2968 1.82 augustss Static void
2969 1.91 augustss ohci_device_clear_toggle(usbd_pipe_handle pipe)
2970 1.37 augustss {
2971 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2972 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2973 1.37 augustss
2974 1.168 augustss opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2975 1.37 augustss }
2976 1.37 augustss
2977 1.82 augustss Static void
2978 1.179 christos ohci_noop(usbd_pipe_handle pipe)
2979 1.37 augustss {
2980 1.37 augustss }
2981 1.3 augustss
2982 1.82 augustss Static usbd_status
2983 1.91 augustss ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2984 1.3 augustss {
2985 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2986 1.53 augustss usbd_status err;
2987 1.17 augustss
2988 1.46 augustss /* Insert last in queue. */
2989 1.224 mrg mutex_enter(&sc->sc_lock);
2990 1.53 augustss err = usb_insert_transfer(xfer);
2991 1.224 mrg mutex_exit(&sc->sc_lock);
2992 1.53 augustss if (err)
2993 1.53 augustss return (err);
2994 1.46 augustss
2995 1.46 augustss /* Pipe isn't running, start first */
2996 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2997 1.17 augustss }
2998 1.17 augustss
2999 1.82 augustss Static usbd_status
3000 1.91 augustss ohci_device_bulk_start(usbd_xfer_handle xfer)
3001 1.17 augustss {
3002 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3003 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
3004 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3005 1.3 augustss int addr = dev->address;
3006 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
3007 1.3 augustss ohci_soft_ed_t *sed;
3008 1.224 mrg int len, isread, endpt;
3009 1.53 augustss usbd_status err;
3010 1.3 augustss
3011 1.83 augustss if (sc->sc_dying)
3012 1.83 augustss return (USBD_IOERROR);
3013 1.83 augustss
3014 1.34 augustss #ifdef DIAGNOSTIC
3015 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
3016 1.3 augustss /* XXX panic */
3017 1.34 augustss printf("ohci_device_bulk_start: a request\n");
3018 1.3 augustss return (USBD_INVAL);
3019 1.3 augustss }
3020 1.34 augustss #endif
3021 1.3 augustss
3022 1.224 mrg mutex_enter(&sc->sc_lock);
3023 1.224 mrg
3024 1.53 augustss len = xfer->length;
3025 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3026 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3027 1.3 augustss sed = opipe->sed;
3028 1.3 augustss
3029 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
3030 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
3031 1.40 augustss endpt));
3032 1.34 augustss
3033 1.32 augustss opipe->u.bulk.isread = isread;
3034 1.3 augustss opipe->u.bulk.length = len;
3035 1.3 augustss
3036 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3037 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3038 1.3 augustss /* Update device address */
3039 1.168 augustss sed->ed.ed_flags = HTOO32(
3040 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
3041 1.16 augustss OHCI_ED_SET_FA(addr));
3042 1.3 augustss
3043 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
3044 1.60 augustss data = opipe->tail.td;
3045 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
3046 1.77 augustss data, &tail);
3047 1.77 augustss /* We want interrupt at the end of the transfer. */
3048 1.168 augustss tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
3049 1.168 augustss tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
3050 1.77 augustss tail->flags |= OHCI_CALL_DONE;
3051 1.77 augustss tail = tail->nexttd; /* point at sentinel */
3052 1.195 bouyer usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
3053 1.195 bouyer sizeof(tail->td.td_flags),
3054 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3055 1.224 mrg if (err) {
3056 1.224 mrg mutex_exit(&sc->sc_lock);
3057 1.53 augustss return (err);
3058 1.224 mrg }
3059 1.48 augustss
3060 1.53 augustss tail->xfer = NULL;
3061 1.53 augustss xfer->hcpriv = data;
3062 1.3 augustss
3063 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
3064 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
3065 1.168 augustss (int)O32TOH(sed->ed.ed_flags),
3066 1.168 augustss (int)O32TOH(data->td.td_flags),
3067 1.168 augustss (int)O32TOH(data->td.td_cbp),
3068 1.168 augustss (int)O32TOH(data->td.td_be)));
3069 1.34 augustss
3070 1.52 augustss #ifdef OHCI_DEBUG
3071 1.75 augustss if (ohcidebug > 5) {
3072 1.168 augustss ohci_dump_ed(sc, sed);
3073 1.168 augustss ohci_dump_tds(sc, data);
3074 1.34 augustss }
3075 1.34 augustss #endif
3076 1.34 augustss
3077 1.3 augustss /* Insert ED in schedule */
3078 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
3079 1.53 augustss tdp->xfer = xfer;
3080 1.48 augustss }
3081 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3082 1.60 augustss opipe->tail.td = tail;
3083 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3084 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3085 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3086 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3087 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
3088 1.209 dyoung callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
3089 1.80 augustss ohci_timeout, xfer);
3090 1.15 augustss }
3091 1.224 mrg mutex_exit(&sc->sc_lock);
3092 1.34 augustss
3093 1.52 augustss #if 0
3094 1.52 augustss /* This goes wrong if we are too slow. */
3095 1.75 augustss if (ohcidebug > 10) {
3096 1.75 augustss delay(10000);
3097 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3098 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3099 1.168 augustss ohci_dump_ed(sc, sed);
3100 1.168 augustss ohci_dump_tds(sc, data);
3101 1.34 augustss }
3102 1.34 augustss #endif
3103 1.34 augustss
3104 1.3 augustss return (USBD_IN_PROGRESS);
3105 1.3 augustss }
3106 1.3 augustss
3107 1.82 augustss Static void
3108 1.91 augustss ohci_device_bulk_abort(usbd_xfer_handle xfer)
3109 1.3 augustss {
3110 1.224 mrg #ifdef DIAGNOSTIC
3111 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3112 1.224 mrg #endif
3113 1.224 mrg
3114 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3115 1.224 mrg
3116 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3117 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3118 1.3 augustss }
3119 1.3 augustss
3120 1.120 augustss /*
3121 1.34 augustss * Close a device bulk pipe.
3122 1.34 augustss */
3123 1.82 augustss Static void
3124 1.91 augustss ohci_device_bulk_close(usbd_pipe_handle pipe)
3125 1.3 augustss {
3126 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3127 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3128 1.3 augustss
3129 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3130 1.224 mrg
3131 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3132 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
3133 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3134 1.1 augustss }
3135 1.1 augustss
3136 1.1 augustss /************************/
3137 1.1 augustss
3138 1.82 augustss Static usbd_status
3139 1.91 augustss ohci_device_intr_transfer(usbd_xfer_handle xfer)
3140 1.17 augustss {
3141 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3142 1.53 augustss usbd_status err;
3143 1.17 augustss
3144 1.46 augustss /* Insert last in queue. */
3145 1.224 mrg mutex_enter(&sc->sc_lock);
3146 1.53 augustss err = usb_insert_transfer(xfer);
3147 1.224 mrg mutex_exit(&sc->sc_lock);
3148 1.53 augustss if (err)
3149 1.53 augustss return (err);
3150 1.46 augustss
3151 1.46 augustss /* Pipe isn't running, start first */
3152 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3153 1.17 augustss }
3154 1.17 augustss
3155 1.82 augustss Static usbd_status
3156 1.91 augustss ohci_device_intr_start(usbd_xfer_handle xfer)
3157 1.1 augustss {
3158 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3159 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
3160 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3161 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
3162 1.48 augustss ohci_soft_td_t *data, *tail;
3163 1.224 mrg int len, isread, endpt;
3164 1.1 augustss
3165 1.83 augustss if (sc->sc_dying)
3166 1.83 augustss return (USBD_IOERROR);
3167 1.83 augustss
3168 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3169 1.14 augustss "flags=%d priv=%p\n",
3170 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
3171 1.1 augustss
3172 1.42 augustss #ifdef DIAGNOSTIC
3173 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
3174 1.128 provos panic("ohci_device_intr_transfer: a request");
3175 1.42 augustss #endif
3176 1.1 augustss
3177 1.53 augustss len = xfer->length;
3178 1.165 skrll endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3179 1.165 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3180 1.1 augustss
3181 1.60 augustss data = opipe->tail.td;
3182 1.224 mrg mutex_enter(&sc->sc_lock);
3183 1.1 augustss tail = ohci_alloc_std(sc);
3184 1.224 mrg mutex_exit(&sc->sc_lock);
3185 1.55 augustss if (tail == NULL)
3186 1.43 augustss return (USBD_NOMEM);
3187 1.53 augustss tail->xfer = NULL;
3188 1.1 augustss
3189 1.168 augustss data->td.td_flags = HTOO32(
3190 1.165 skrll isread ? OHCI_TD_IN : OHCI_TD_OUT |
3191 1.165 skrll OHCI_TD_NOCC |
3192 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3193 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
3194 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
3195 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3196 1.48 augustss data->nexttd = tail;
3197 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
3198 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3199 1.48 augustss data->len = len;
3200 1.53 augustss data->xfer = xfer;
3201 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3202 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
3203 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3204 1.53 augustss xfer->hcpriv = data;
3205 1.1 augustss
3206 1.52 augustss #ifdef OHCI_DEBUG
3207 1.1 augustss if (ohcidebug > 5) {
3208 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
3209 1.168 augustss ohci_dump_ed(sc, sed);
3210 1.168 augustss ohci_dump_tds(sc, data);
3211 1.1 augustss }
3212 1.1 augustss #endif
3213 1.1 augustss
3214 1.1 augustss /* Insert ED in schedule */
3215 1.224 mrg mutex_enter(&sc->sc_lock);
3216 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3217 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3218 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3219 1.60 augustss opipe->tail.td = tail;
3220 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3221 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3222 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3223 1.1 augustss
3224 1.52 augustss #if 0
3225 1.52 augustss /*
3226 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
3227 1.52 augustss * because false references are followed due to the fact that the
3228 1.52 augustss * TD is gone.
3229 1.52 augustss */
3230 1.1 augustss if (ohcidebug > 5) {
3231 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock);
3232 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3233 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3234 1.168 augustss ohci_dump_ed(sc, sed);
3235 1.168 augustss ohci_dump_tds(sc, data);
3236 1.1 augustss }
3237 1.1 augustss #endif
3238 1.224 mrg mutex_exit(&sc->sc_lock);
3239 1.1 augustss
3240 1.1 augustss return (USBD_IN_PROGRESS);
3241 1.1 augustss }
3242 1.1 augustss
3243 1.227 skrll /* Abort a device interrupt request. */
3244 1.82 augustss Static void
3245 1.91 augustss ohci_device_intr_abort(usbd_xfer_handle xfer)
3246 1.1 augustss {
3247 1.224 mrg #ifdef DIAGNOSTIC
3248 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3249 1.224 mrg #endif
3250 1.224 mrg
3251 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3252 1.224 mrg
3253 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
3254 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
3255 1.55 augustss xfer->pipe->intrxfer = NULL;
3256 1.1 augustss }
3257 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3258 1.1 augustss }
3259 1.1 augustss
3260 1.1 augustss /* Close a device interrupt pipe. */
3261 1.82 augustss Static void
3262 1.91 augustss ohci_device_intr_close(usbd_pipe_handle pipe)
3263 1.1 augustss {
3264 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3265 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3266 1.1 augustss int nslots = opipe->u.intr.nslots;
3267 1.1 augustss int pos = opipe->u.intr.pos;
3268 1.1 augustss int j;
3269 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
3270 1.224 mrg
3271 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3272 1.1 augustss
3273 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3274 1.1 augustss pipe, nslots, pos));
3275 1.195 bouyer usb_syncmem(&sed->dma, sed->offs,
3276 1.195 bouyer sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3277 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3278 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3279 1.195 bouyer sizeof(sed->ed.ed_flags),
3280 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3281 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3282 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3283 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
3284 1.1 augustss
3285 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3286 1.172 christos continue;
3287 1.53 augustss #ifdef DIAGNOSTIC
3288 1.173 christos if (p == NULL)
3289 1.128 provos panic("ohci_device_intr_close: ED not found");
3290 1.53 augustss #endif
3291 1.173 christos p->next = sed->next;
3292 1.173 christos p->ed.ed_nexted = sed->ed.ed_nexted;
3293 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3294 1.195 bouyer sizeof(p->ed.ed_nexted),
3295 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3296 1.1 augustss
3297 1.1 augustss for (j = 0; j < nslots; j++)
3298 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3299 1.1 augustss
3300 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3301 1.1 augustss ohci_free_sed(sc, opipe->sed);
3302 1.1 augustss }
3303 1.1 augustss
3304 1.82 augustss Static usbd_status
3305 1.91 augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3306 1.1 augustss {
3307 1.224 mrg int i, j, best;
3308 1.1 augustss u_int npoll, slow, shigh, nslots;
3309 1.1 augustss u_int bestbw, bw;
3310 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
3311 1.1 augustss
3312 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3313 1.1 augustss if (ival == 0) {
3314 1.1 augustss printf("ohci_setintr: 0 interval\n");
3315 1.1 augustss return (USBD_INVAL);
3316 1.1 augustss }
3317 1.1 augustss
3318 1.1 augustss npoll = OHCI_NO_INTRS;
3319 1.1 augustss while (npoll > ival)
3320 1.1 augustss npoll /= 2;
3321 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3322 1.1 augustss
3323 1.1 augustss /*
3324 1.1 augustss * We now know which level in the tree the ED must go into.
3325 1.1 augustss * Figure out which slot has most bandwidth left over.
3326 1.1 augustss * Slots to examine:
3327 1.1 augustss * npoll
3328 1.1 augustss * 1 0
3329 1.1 augustss * 2 1 2
3330 1.1 augustss * 4 3 4 5 6
3331 1.1 augustss * 8 7 8 9 10 11 12 13 14
3332 1.1 augustss * N (N-1) .. (N-1+N-1)
3333 1.1 augustss */
3334 1.1 augustss slow = npoll-1;
3335 1.1 augustss shigh = slow + npoll;
3336 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
3337 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3338 1.1 augustss bw = 0;
3339 1.1 augustss for (j = 0; j < nslots; j++)
3340 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3341 1.1 augustss if (bw < bestbw) {
3342 1.1 augustss best = i;
3343 1.1 augustss bestbw = bw;
3344 1.1 augustss }
3345 1.1 augustss }
3346 1.120 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3347 1.1 augustss best, slow, shigh, bestbw));
3348 1.1 augustss
3349 1.224 mrg mutex_enter(&sc->sc_lock);
3350 1.1 augustss hsed = sc->sc_eds[best];
3351 1.1 augustss sed->next = hsed->next;
3352 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3353 1.195 bouyer sizeof(hsed->ed.ed_flags),
3354 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3355 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
3356 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3357 1.195 bouyer sizeof(sed->ed.ed_flags),
3358 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3359 1.1 augustss hsed->next = sed;
3360 1.168 augustss hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3361 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3362 1.195 bouyer sizeof(hsed->ed.ed_flags),
3363 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3364 1.224 mrg mutex_exit(&sc->sc_lock);
3365 1.1 augustss
3366 1.1 augustss for (j = 0; j < nslots; j++)
3367 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3368 1.1 augustss opipe->u.intr.nslots = nslots;
3369 1.1 augustss opipe->u.intr.pos = best;
3370 1.1 augustss
3371 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3372 1.1 augustss return (USBD_NORMAL_COMPLETION);
3373 1.60 augustss }
3374 1.60 augustss
3375 1.60 augustss /***********************/
3376 1.60 augustss
3377 1.60 augustss usbd_status
3378 1.91 augustss ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3379 1.60 augustss {
3380 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3381 1.60 augustss usbd_status err;
3382 1.60 augustss
3383 1.60 augustss DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3384 1.60 augustss
3385 1.60 augustss /* Put it on our queue, */
3386 1.224 mrg mutex_enter(&sc->sc_lock);
3387 1.60 augustss err = usb_insert_transfer(xfer);
3388 1.224 mrg mutex_exit(&sc->sc_lock);
3389 1.60 augustss
3390 1.60 augustss /* bail out on error, */
3391 1.60 augustss if (err && err != USBD_IN_PROGRESS)
3392 1.60 augustss return (err);
3393 1.60 augustss
3394 1.60 augustss /* XXX should check inuse here */
3395 1.60 augustss
3396 1.60 augustss /* insert into schedule, */
3397 1.60 augustss ohci_device_isoc_enter(xfer);
3398 1.60 augustss
3399 1.83 augustss /* and start if the pipe wasn't running */
3400 1.60 augustss if (!err)
3401 1.60 augustss ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3402 1.60 augustss
3403 1.60 augustss return (err);
3404 1.60 augustss }
3405 1.60 augustss
3406 1.60 augustss void
3407 1.91 augustss ohci_device_isoc_enter(usbd_xfer_handle xfer)
3408 1.60 augustss {
3409 1.61 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3410 1.61 augustss usbd_device_handle dev = opipe->pipe.device;
3411 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3412 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
3413 1.61 augustss struct iso *iso = &opipe->u.iso;
3414 1.120 augustss ohci_soft_itd_t *sitd, *nsitd;
3415 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
3416 1.61 augustss int i, ncur, nframes;
3417 1.61 augustss
3418 1.83 augustss DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3419 1.83 augustss "nframes=%d\n",
3420 1.83 augustss iso->inuse, iso->next, xfer, xfer->nframes));
3421 1.83 augustss
3422 1.83 augustss if (sc->sc_dying)
3423 1.83 augustss return;
3424 1.83 augustss
3425 1.83 augustss if (iso->next == -1) {
3426 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
3427 1.168 augustss iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3428 1.120 augustss DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3429 1.83 augustss iso->next));
3430 1.83 augustss }
3431 1.83 augustss
3432 1.61 augustss sitd = opipe->tail.itd;
3433 1.125 augustss buf = DMAADDR(&xfer->dmabuf, 0);
3434 1.83 augustss bp0 = OHCI_PAGE(buf);
3435 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
3436 1.61 augustss nframes = xfer->nframes;
3437 1.83 augustss xfer->hcpriv = sitd;
3438 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
3439 1.83 augustss noffs = offs + xfer->frlengths[i];
3440 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3441 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3442 1.120 augustss
3443 1.83 augustss /* Allocate next ITD */
3444 1.224 mrg mutex_enter(&sc->sc_lock);
3445 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3446 1.224 mrg mutex_exit(&sc->sc_lock);
3447 1.61 augustss if (nsitd == NULL) {
3448 1.61 augustss /* XXX what now? */
3449 1.83 augustss printf("%s: isoc TD alloc failed\n",
3450 1.190 drochner device_xname(sc->sc_dev));
3451 1.61 augustss return;
3452 1.61 augustss }
3453 1.83 augustss
3454 1.83 augustss /* Fill current ITD */
3455 1.168 augustss sitd->itd.itd_flags = HTOO32(
3456 1.120 augustss OHCI_ITD_NOCC |
3457 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3458 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
3459 1.83 augustss OHCI_ITD_SET_FC(ncur));
3460 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3461 1.83 augustss sitd->nextitd = nsitd;
3462 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3463 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3464 1.83 augustss sitd->xfer = xfer;
3465 1.83 augustss sitd->flags = 0;
3466 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3467 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3468 1.83 augustss
3469 1.61 augustss sitd = nsitd;
3470 1.120 augustss iso->next = iso->next + ncur;
3471 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
3472 1.61 augustss ncur = 0;
3473 1.61 augustss }
3474 1.168 augustss sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3475 1.83 augustss offs = noffs;
3476 1.61 augustss }
3477 1.224 mrg mutex_enter(&sc->sc_lock);
3478 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3479 1.224 mrg mutex_exit(&sc->sc_lock);
3480 1.61 augustss if (nsitd == NULL) {
3481 1.61 augustss /* XXX what now? */
3482 1.120 augustss printf("%s: isoc TD alloc failed\n",
3483 1.190 drochner device_xname(sc->sc_dev));
3484 1.61 augustss return;
3485 1.61 augustss }
3486 1.83 augustss /* Fixup last used ITD */
3487 1.168 augustss sitd->itd.itd_flags = HTOO32(
3488 1.120 augustss OHCI_ITD_NOCC |
3489 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3490 1.61 augustss OHCI_ITD_SET_DI(0) |
3491 1.61 augustss OHCI_ITD_SET_FC(ncur));
3492 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3493 1.83 augustss sitd->nextitd = nsitd;
3494 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3495 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3496 1.83 augustss sitd->xfer = xfer;
3497 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3498 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3499 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3500 1.83 augustss
3501 1.61 augustss iso->next = iso->next + ncur;
3502 1.83 augustss iso->inuse += nframes;
3503 1.83 augustss
3504 1.83 augustss xfer->actlen = offs; /* XXX pretend we did it all */
3505 1.83 augustss
3506 1.83 augustss xfer->status = USBD_IN_PROGRESS;
3507 1.83 augustss
3508 1.83 augustss #ifdef OHCI_DEBUG
3509 1.83 augustss if (ohcidebug > 5) {
3510 1.83 augustss DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3511 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3512 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3513 1.168 augustss ohci_dump_ed(sc, sed);
3514 1.83 augustss }
3515 1.83 augustss #endif
3516 1.61 augustss
3517 1.224 mrg mutex_enter(&sc->sc_lock);
3518 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3519 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3520 1.168 augustss sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3521 1.61 augustss opipe->tail.itd = nsitd;
3522 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3523 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3524 1.195 bouyer sizeof(sed->ed.ed_flags),
3525 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3526 1.224 mrg mutex_exit(&sc->sc_lock);
3527 1.83 augustss
3528 1.83 augustss #ifdef OHCI_DEBUG
3529 1.83 augustss if (ohcidebug > 5) {
3530 1.83 augustss delay(150000);
3531 1.83 augustss DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3532 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3533 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3534 1.168 augustss ohci_dump_ed(sc, sed);
3535 1.83 augustss }
3536 1.83 augustss #endif
3537 1.60 augustss }
3538 1.60 augustss
3539 1.60 augustss usbd_status
3540 1.91 augustss ohci_device_isoc_start(usbd_xfer_handle xfer)
3541 1.60 augustss {
3542 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3543 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3544 1.83 augustss
3545 1.83 augustss DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3546 1.83 augustss
3547 1.224 mrg mutex_enter(&sc->sc_lock);
3548 1.224 mrg
3549 1.224 mrg if (sc->sc_dying) {
3550 1.224 mrg mutex_exit(&sc->sc_lock);
3551 1.83 augustss return (USBD_IOERROR);
3552 1.224 mrg }
3553 1.83 augustss
3554 1.83 augustss #ifdef DIAGNOSTIC
3555 1.83 augustss if (xfer->status != USBD_IN_PROGRESS)
3556 1.121 tsutsui printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3557 1.83 augustss #endif
3558 1.83 augustss
3559 1.83 augustss /* XXX anything to do? */
3560 1.83 augustss
3561 1.224 mrg mutex_exit(&sc->sc_lock);
3562 1.224 mrg
3563 1.83 augustss return (USBD_IN_PROGRESS);
3564 1.60 augustss }
3565 1.60 augustss
3566 1.60 augustss void
3567 1.91 augustss ohci_device_isoc_abort(usbd_xfer_handle xfer)
3568 1.60 augustss {
3569 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3570 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3571 1.83 augustss ohci_soft_ed_t *sed;
3572 1.83 augustss ohci_soft_itd_t *sitd;
3573 1.83 augustss
3574 1.224 mrg DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p lock=%p\n", xfer, &sc->sc_lock));
3575 1.83 augustss
3576 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3577 1.83 augustss
3578 1.83 augustss /* Transfer is already done. */
3579 1.120 augustss if (xfer->status != USBD_NOT_STARTED &&
3580 1.83 augustss xfer->status != USBD_IN_PROGRESS) {
3581 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3582 1.224 mrg goto done;
3583 1.83 augustss }
3584 1.83 augustss
3585 1.83 augustss /* Give xfer the requested abort code. */
3586 1.83 augustss xfer->status = USBD_CANCELLED;
3587 1.83 augustss
3588 1.83 augustss sed = opipe->sed;
3589 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3590 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3591 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3592 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3593 1.195 bouyer sizeof(sed->ed.ed_flags),
3594 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3595 1.83 augustss
3596 1.83 augustss sitd = xfer->hcpriv;
3597 1.83 augustss #ifdef DIAGNOSTIC
3598 1.83 augustss if (sitd == NULL) {
3599 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3600 1.224 mrg goto done;
3601 1.83 augustss }
3602 1.83 augustss #endif
3603 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3604 1.83 augustss #ifdef DIAGNOSTIC
3605 1.83 augustss DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3606 1.83 augustss sitd->isdone = 1;
3607 1.83 augustss #endif
3608 1.83 augustss }
3609 1.83 augustss
3610 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
3611 1.83 augustss
3612 1.83 augustss /* Run callback. */
3613 1.83 augustss usb_transfer_complete(xfer);
3614 1.83 augustss
3615 1.168 augustss sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3616 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3617 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3618 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3619 1.83 augustss
3620 1.224 mrg done:
3621 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3622 1.60 augustss }
3623 1.60 augustss
3624 1.60 augustss void
3625 1.179 christos ohci_device_isoc_done(usbd_xfer_handle xfer)
3626 1.60 augustss {
3627 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3628 1.60 augustss }
3629 1.60 augustss
3630 1.60 augustss usbd_status
3631 1.91 augustss ohci_setup_isoc(usbd_pipe_handle pipe)
3632 1.60 augustss {
3633 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3634 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3635 1.60 augustss struct iso *iso = &opipe->u.iso;
3636 1.60 augustss
3637 1.60 augustss iso->next = -1;
3638 1.60 augustss iso->inuse = 0;
3639 1.60 augustss
3640 1.224 mrg mutex_enter(&sc->sc_lock);
3641 1.168 augustss ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3642 1.224 mrg mutex_exit(&sc->sc_lock);
3643 1.83 augustss
3644 1.60 augustss return (USBD_NORMAL_COMPLETION);
3645 1.60 augustss }
3646 1.60 augustss
3647 1.60 augustss void
3648 1.91 augustss ohci_device_isoc_close(usbd_pipe_handle pipe)
3649 1.60 augustss {
3650 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3651 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3652 1.60 augustss
3653 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3654 1.224 mrg
3655 1.60 augustss DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3656 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3657 1.83 augustss #ifdef DIAGNOSTIC
3658 1.83 augustss opipe->tail.itd->isdone = 1;
3659 1.83 augustss #endif
3660 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3661 1.1 augustss }
3662