ohci.c revision 1.240 1 1.240 skrll /* $NetBSD: ohci.c,v 1.240 2013/04/04 13:27:55 skrll Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.224 mrg * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
9 1.224 mrg * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
10 1.224 mrg * and Matthew R. Green (mrg (at) eterna.com.au).
11 1.157 mycroft * This code is derived from software contributed to The NetBSD Foundation
12 1.157 mycroft * by Charles M. Hannum.
13 1.1 augustss *
14 1.1 augustss * Redistribution and use in source and binary forms, with or without
15 1.1 augustss * modification, are permitted provided that the following conditions
16 1.1 augustss * are met:
17 1.1 augustss * 1. Redistributions of source code must retain the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer.
19 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 augustss * notice, this list of conditions and the following disclaimer in the
21 1.1 augustss * documentation and/or other materials provided with the distribution.
22 1.1 augustss *
23 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /*
37 1.1 augustss * USB Open Host Controller driver.
38 1.1 augustss *
39 1.96 augustss * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
40 1.201 uebayasi * USB spec: http://www.usb.org/developers/docs/
41 1.1 augustss */
42 1.108 lukem
43 1.108 lukem #include <sys/cdefs.h>
44 1.240 skrll __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.240 2013/04/04 13:27:55 skrll Exp $");
45 1.1 augustss
46 1.1 augustss #include <sys/param.h>
47 1.1 augustss #include <sys/systm.h>
48 1.224 mrg #include <sys/kmem.h>
49 1.55 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/device.h>
51 1.55 augustss #include <sys/select.h>
52 1.1 augustss #include <sys/proc.h>
53 1.1 augustss #include <sys/queue.h>
54 1.223 mrg #include <sys/cpu.h>
55 1.1 augustss
56 1.16 augustss #include <machine/endian.h>
57 1.4 augustss
58 1.1 augustss #include <dev/usb/usb.h>
59 1.1 augustss #include <dev/usb/usbdi.h>
60 1.1 augustss #include <dev/usb/usbdivar.h>
61 1.38 augustss #include <dev/usb/usb_mem.h>
62 1.1 augustss #include <dev/usb/usb_quirks.h>
63 1.1 augustss
64 1.1 augustss #include <dev/usb/ohcireg.h>
65 1.1 augustss #include <dev/usb/ohcivar.h>
66 1.186 drochner #include <dev/usb/usbroothub_subr.h>
67 1.1 augustss
68 1.1 augustss
69 1.36 augustss
70 1.52 augustss #ifdef OHCI_DEBUG
71 1.209 dyoung #define DPRINTF(x) if (ohcidebug) printf x
72 1.209 dyoung #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x
73 1.52 augustss int ohcidebug = 0;
74 1.52 augustss #else
75 1.52 augustss #define DPRINTF(x)
76 1.52 augustss #define DPRINTFN(n,x)
77 1.52 augustss #endif
78 1.52 augustss
79 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
80 1.169 tron #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
81 1.16 augustss #else
82 1.169 tron #define SWAP_ENDIAN OHCI_BIG_ENDIAN
83 1.16 augustss #endif
84 1.16 augustss
85 1.169 tron #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
86 1.169 tron #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
87 1.169 tron #define HTOO16(val) O16TOH(val)
88 1.169 tron #define HTOO32(val) O32TOH(val)
89 1.168 augustss
90 1.1 augustss struct ohci_pipe;
91 1.1 augustss
92 1.91 augustss Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
93 1.91 augustss Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
94 1.1 augustss
95 1.91 augustss Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
96 1.91 augustss Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
97 1.1 augustss
98 1.91 augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
99 1.91 augustss Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
100 1.60 augustss
101 1.91 augustss Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
102 1.91 augustss ohci_soft_td_t *);
103 1.91 augustss Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
104 1.77 augustss ohci_softc_t *, int, int, usbd_xfer_handle,
105 1.91 augustss ohci_soft_td_t *, ohci_soft_td_t **);
106 1.53 augustss
107 1.91 augustss Static usbd_status ohci_open(usbd_pipe_handle);
108 1.91 augustss Static void ohci_poll(struct usbd_bus *);
109 1.99 augustss Static void ohci_softintr(void *);
110 1.91 augustss Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
111 1.91 augustss Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
112 1.224 mrg Static void ohci_rhsc_softint(void *arg);
113 1.91 augustss
114 1.91 augustss Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
115 1.168 augustss Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
116 1.168 augustss ohci_soft_ed_t *);
117 1.168 augustss
118 1.224 mrg Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
119 1.224 mrg ohci_soft_ed_t *);
120 1.91 augustss Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
121 1.91 augustss Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
122 1.91 augustss Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
123 1.91 augustss Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
124 1.91 augustss Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
125 1.91 augustss Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
126 1.91 augustss
127 1.91 augustss Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
128 1.91 augustss Static void ohci_device_isoc_enter(usbd_xfer_handle);
129 1.91 augustss
130 1.91 augustss Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
131 1.91 augustss Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
132 1.91 augustss
133 1.91 augustss Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
134 1.91 augustss Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
135 1.224 mrg Static void ohci_get_lock(struct usbd_bus *, kmutex_t **);
136 1.91 augustss
137 1.91 augustss Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
138 1.91 augustss Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
139 1.91 augustss Static void ohci_root_ctrl_abort(usbd_xfer_handle);
140 1.91 augustss Static void ohci_root_ctrl_close(usbd_pipe_handle);
141 1.91 augustss Static void ohci_root_ctrl_done(usbd_xfer_handle);
142 1.91 augustss
143 1.91 augustss Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
144 1.91 augustss Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
145 1.91 augustss Static void ohci_root_intr_abort(usbd_xfer_handle);
146 1.91 augustss Static void ohci_root_intr_close(usbd_pipe_handle);
147 1.91 augustss Static void ohci_root_intr_done(usbd_xfer_handle);
148 1.91 augustss
149 1.91 augustss Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
150 1.91 augustss Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
151 1.91 augustss Static void ohci_device_ctrl_abort(usbd_xfer_handle);
152 1.91 augustss Static void ohci_device_ctrl_close(usbd_pipe_handle);
153 1.91 augustss Static void ohci_device_ctrl_done(usbd_xfer_handle);
154 1.91 augustss
155 1.91 augustss Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
156 1.91 augustss Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
157 1.91 augustss Static void ohci_device_bulk_abort(usbd_xfer_handle);
158 1.91 augustss Static void ohci_device_bulk_close(usbd_pipe_handle);
159 1.91 augustss Static void ohci_device_bulk_done(usbd_xfer_handle);
160 1.91 augustss
161 1.91 augustss Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
162 1.91 augustss Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
163 1.91 augustss Static void ohci_device_intr_abort(usbd_xfer_handle);
164 1.91 augustss Static void ohci_device_intr_close(usbd_pipe_handle);
165 1.91 augustss Static void ohci_device_intr_done(usbd_xfer_handle);
166 1.91 augustss
167 1.91 augustss Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
168 1.91 augustss Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
169 1.91 augustss Static void ohci_device_isoc_abort(usbd_xfer_handle);
170 1.91 augustss Static void ohci_device_isoc_close(usbd_pipe_handle);
171 1.91 augustss Static void ohci_device_isoc_done(usbd_xfer_handle);
172 1.91 augustss
173 1.120 augustss Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
174 1.91 augustss struct ohci_pipe *pipe, int ival);
175 1.91 augustss
176 1.91 augustss Static void ohci_timeout(void *);
177 1.114 augustss Static void ohci_timeout_task(void *);
178 1.104 augustss Static void ohci_rhsc_enable(void *);
179 1.91 augustss
180 1.91 augustss Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
181 1.91 augustss Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
182 1.53 augustss
183 1.91 augustss Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
184 1.91 augustss Static void ohci_noop(usbd_pipe_handle pipe);
185 1.37 augustss
186 1.52 augustss #ifdef OHCI_DEBUG
187 1.91 augustss Static void ohci_dumpregs(ohci_softc_t *);
188 1.168 augustss Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
189 1.168 augustss Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
190 1.168 augustss Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
191 1.168 augustss Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
192 1.168 augustss Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
193 1.1 augustss #endif
194 1.1 augustss
195 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
196 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
197 1.88 augustss #define OWRITE1(sc, r, x) \
198 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
199 1.88 augustss #define OWRITE2(sc, r, x) \
200 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
201 1.88 augustss #define OWRITE4(sc, r, x) \
202 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
203 1.174 mrg static __inline uint8_t
204 1.174 mrg OREAD1(ohci_softc_t *sc, bus_size_t r)
205 1.174 mrg {
206 1.174 mrg
207 1.174 mrg OBARR(sc);
208 1.174 mrg return bus_space_read_1(sc->iot, sc->ioh, r);
209 1.174 mrg }
210 1.174 mrg
211 1.174 mrg static __inline uint16_t
212 1.174 mrg OREAD2(ohci_softc_t *sc, bus_size_t r)
213 1.174 mrg {
214 1.174 mrg
215 1.174 mrg OBARR(sc);
216 1.174 mrg return bus_space_read_2(sc->iot, sc->ioh, r);
217 1.174 mrg }
218 1.174 mrg
219 1.174 mrg static __inline uint32_t
220 1.174 mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
221 1.174 mrg {
222 1.174 mrg
223 1.174 mrg OBARR(sc);
224 1.174 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
225 1.174 mrg }
226 1.1 augustss
227 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
228 1.120 augustss Static u_int8_t revbits[OHCI_NO_INTRS] =
229 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
230 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
231 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
232 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
233 1.1 augustss
234 1.1 augustss struct ohci_pipe {
235 1.1 augustss struct usbd_pipe pipe;
236 1.1 augustss ohci_soft_ed_t *sed;
237 1.60 augustss union {
238 1.60 augustss ohci_soft_td_t *td;
239 1.60 augustss ohci_soft_itd_t *itd;
240 1.60 augustss } tail;
241 1.1 augustss /* Info needed for different pipe kinds. */
242 1.1 augustss union {
243 1.1 augustss /* Control pipe */
244 1.1 augustss struct {
245 1.4 augustss usb_dma_t reqdma;
246 1.1 augustss u_int length;
247 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
248 1.1 augustss } ctl;
249 1.1 augustss /* Interrupt pipe */
250 1.1 augustss struct {
251 1.1 augustss int nslots;
252 1.1 augustss int pos;
253 1.1 augustss } intr;
254 1.3 augustss /* Bulk pipe */
255 1.3 augustss struct {
256 1.3 augustss u_int length;
257 1.32 augustss int isread;
258 1.3 augustss } bulk;
259 1.43 augustss /* Iso pipe */
260 1.43 augustss struct iso {
261 1.60 augustss int next, inuse;
262 1.43 augustss } iso;
263 1.1 augustss } u;
264 1.1 augustss };
265 1.1 augustss
266 1.1 augustss #define OHCI_INTR_ENDPT 1
267 1.1 augustss
268 1.182 drochner Static const struct usbd_bus_methods ohci_bus_methods = {
269 1.221 mrg .open_pipe = ohci_open,
270 1.221 mrg .soft_intr = ohci_softintr,
271 1.221 mrg .do_poll = ohci_poll,
272 1.221 mrg .allocm = ohci_allocm,
273 1.221 mrg .freem = ohci_freem,
274 1.221 mrg .allocx = ohci_allocx,
275 1.221 mrg .freex = ohci_freex,
276 1.224 mrg .get_lock = ohci_get_lock,
277 1.42 augustss };
278 1.42 augustss
279 1.182 drochner Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
280 1.221 mrg .transfer = ohci_root_ctrl_transfer,
281 1.221 mrg .start = ohci_root_ctrl_start,
282 1.221 mrg .abort = ohci_root_ctrl_abort,
283 1.221 mrg .close = ohci_root_ctrl_close,
284 1.221 mrg .cleartoggle = ohci_noop,
285 1.221 mrg .done = ohci_root_ctrl_done,
286 1.1 augustss };
287 1.1 augustss
288 1.182 drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
289 1.221 mrg .transfer = ohci_root_intr_transfer,
290 1.221 mrg .start = ohci_root_intr_start,
291 1.221 mrg .abort = ohci_root_intr_abort,
292 1.221 mrg .close = ohci_root_intr_close,
293 1.221 mrg .cleartoggle = ohci_noop,
294 1.221 mrg .done = ohci_root_intr_done,
295 1.1 augustss };
296 1.1 augustss
297 1.182 drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
298 1.221 mrg .transfer = ohci_device_ctrl_transfer,
299 1.221 mrg .start = ohci_device_ctrl_start,
300 1.221 mrg .abort = ohci_device_ctrl_abort,
301 1.221 mrg .close = ohci_device_ctrl_close,
302 1.221 mrg .cleartoggle = ohci_noop,
303 1.221 mrg .done = ohci_device_ctrl_done,
304 1.1 augustss };
305 1.1 augustss
306 1.182 drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
307 1.221 mrg .transfer = ohci_device_intr_transfer,
308 1.221 mrg .start = ohci_device_intr_start,
309 1.221 mrg .abort = ohci_device_intr_abort,
310 1.221 mrg .close = ohci_device_intr_close,
311 1.221 mrg .cleartoggle = ohci_device_clear_toggle,
312 1.221 mrg .done = ohci_device_intr_done,
313 1.1 augustss };
314 1.1 augustss
315 1.182 drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
316 1.221 mrg .transfer = ohci_device_bulk_transfer,
317 1.221 mrg .start = ohci_device_bulk_start,
318 1.221 mrg .abort = ohci_device_bulk_abort,
319 1.221 mrg .close = ohci_device_bulk_close,
320 1.221 mrg .cleartoggle = ohci_device_clear_toggle,
321 1.221 mrg .done = ohci_device_bulk_done,
322 1.3 augustss };
323 1.3 augustss
324 1.182 drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
325 1.221 mrg .transfer = ohci_device_isoc_transfer,
326 1.221 mrg .start = ohci_device_isoc_start,
327 1.221 mrg .abort = ohci_device_isoc_abort,
328 1.221 mrg .close = ohci_device_isoc_close,
329 1.221 mrg .cleartoggle = ohci_noop,
330 1.221 mrg .done = ohci_device_isoc_done,
331 1.43 augustss };
332 1.43 augustss
333 1.47 augustss int
334 1.189 dyoung ohci_activate(device_t self, enum devact act)
335 1.47 augustss {
336 1.189 dyoung struct ohci_softc *sc = device_private(self);
337 1.47 augustss
338 1.47 augustss switch (act) {
339 1.47 augustss case DVACT_DEACTIVATE:
340 1.183 kiyohara sc->sc_dying = 1;
341 1.203 dyoung return 0;
342 1.203 dyoung default:
343 1.203 dyoung return EOPNOTSUPP;
344 1.47 augustss }
345 1.47 augustss }
346 1.47 augustss
347 1.187 dyoung void
348 1.187 dyoung ohci_childdet(device_t self, device_t child)
349 1.187 dyoung {
350 1.187 dyoung struct ohci_softc *sc = device_private(self);
351 1.187 dyoung
352 1.187 dyoung KASSERT(sc->sc_child == child);
353 1.187 dyoung sc->sc_child = NULL;
354 1.187 dyoung }
355 1.187 dyoung
356 1.47 augustss int
357 1.91 augustss ohci_detach(struct ohci_softc *sc, int flags)
358 1.47 augustss {
359 1.47 augustss int rv = 0;
360 1.47 augustss
361 1.47 augustss if (sc->sc_child != NULL)
362 1.47 augustss rv = config_detach(sc->sc_child, flags);
363 1.120 augustss
364 1.47 augustss if (rv != 0)
365 1.47 augustss return (rv);
366 1.47 augustss
367 1.209 dyoung callout_stop(&sc->sc_tmo_rhsc);
368 1.104 augustss
369 1.116 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
370 1.209 dyoung callout_destroy(&sc->sc_tmo_rhsc);
371 1.116 augustss
372 1.224 mrg softint_disestablish(sc->sc_rhsc_si);
373 1.224 mrg
374 1.224 mrg cv_destroy(&sc->sc_softwake_cv);
375 1.224 mrg
376 1.224 mrg mutex_destroy(&sc->sc_lock);
377 1.224 mrg mutex_destroy(&sc->sc_intr_lock);
378 1.224 mrg
379 1.198 cegger if (sc->sc_hcca != NULL)
380 1.198 cegger usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
381 1.232 christos pool_cache_destroy(sc->sc_xferpool);
382 1.47 augustss
383 1.47 augustss return (rv);
384 1.47 augustss }
385 1.47 augustss
386 1.1 augustss ohci_soft_ed_t *
387 1.91 augustss ohci_alloc_sed(ohci_softc_t *sc)
388 1.1 augustss {
389 1.1 augustss ohci_soft_ed_t *sed;
390 1.53 augustss usbd_status err;
391 1.1 augustss int i, offs;
392 1.4 augustss usb_dma_t dma;
393 1.1 augustss
394 1.53 augustss if (sc->sc_freeeds == NULL) {
395 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
396 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
397 1.53 augustss OHCI_ED_ALIGN, &dma);
398 1.53 augustss if (err)
399 1.39 augustss return (0);
400 1.225 skrll for (i = 0; i < OHCI_SED_CHUNK; i++) {
401 1.39 augustss offs = i * OHCI_SED_SIZE;
402 1.123 augustss sed = KERNADDR(&dma, offs);
403 1.125 augustss sed->physaddr = DMAADDR(&dma, offs);
404 1.195 bouyer sed->dma = dma;
405 1.195 bouyer sed->offs = offs;
406 1.1 augustss sed->next = sc->sc_freeeds;
407 1.1 augustss sc->sc_freeeds = sed;
408 1.1 augustss }
409 1.1 augustss }
410 1.1 augustss sed = sc->sc_freeeds;
411 1.1 augustss sc->sc_freeeds = sed->next;
412 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
413 1.1 augustss sed->next = 0;
414 1.39 augustss return (sed);
415 1.1 augustss }
416 1.1 augustss
417 1.1 augustss void
418 1.91 augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
419 1.1 augustss {
420 1.1 augustss sed->next = sc->sc_freeeds;
421 1.1 augustss sc->sc_freeeds = sed;
422 1.1 augustss }
423 1.1 augustss
424 1.1 augustss ohci_soft_td_t *
425 1.91 augustss ohci_alloc_std(ohci_softc_t *sc)
426 1.1 augustss {
427 1.1 augustss ohci_soft_td_t *std;
428 1.53 augustss usbd_status err;
429 1.1 augustss int i, offs;
430 1.4 augustss usb_dma_t dma;
431 1.1 augustss
432 1.240 skrll KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
433 1.240 skrll
434 1.53 augustss if (sc->sc_freetds == NULL) {
435 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
436 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
437 1.53 augustss OHCI_TD_ALIGN, &dma);
438 1.53 augustss if (err)
439 1.83 augustss return (NULL);
440 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
441 1.39 augustss offs = i * OHCI_STD_SIZE;
442 1.123 augustss std = KERNADDR(&dma, offs);
443 1.125 augustss std->physaddr = DMAADDR(&dma, offs);
444 1.195 bouyer std->dma = dma;
445 1.195 bouyer std->offs = offs;
446 1.1 augustss std->nexttd = sc->sc_freetds;
447 1.1 augustss sc->sc_freetds = std;
448 1.1 augustss }
449 1.1 augustss }
450 1.69 augustss
451 1.1 augustss std = sc->sc_freetds;
452 1.1 augustss sc->sc_freetds = std->nexttd;
453 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
454 1.83 augustss std->nexttd = NULL;
455 1.83 augustss std->xfer = NULL;
456 1.69 augustss ohci_hash_add_td(sc, std);
457 1.69 augustss
458 1.1 augustss return (std);
459 1.1 augustss }
460 1.1 augustss
461 1.1 augustss void
462 1.91 augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
463 1.1 augustss {
464 1.240 skrll KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
465 1.240 skrll
466 1.69 augustss ohci_hash_rem_td(sc, std);
467 1.1 augustss std->nexttd = sc->sc_freetds;
468 1.1 augustss sc->sc_freetds = std;
469 1.1 augustss }
470 1.1 augustss
471 1.1 augustss usbd_status
472 1.91 augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
473 1.91 augustss int alen, int rd, usbd_xfer_handle xfer,
474 1.91 augustss ohci_soft_td_t *sp, ohci_soft_td_t **ep)
475 1.48 augustss {
476 1.48 augustss ohci_soft_td_t *next, *cur;
477 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
478 1.77 augustss u_int32_t tdflags;
479 1.75 augustss int len, curlen;
480 1.77 augustss usb_dma_t *dma = &xfer->dmabuf;
481 1.77 augustss u_int16_t flags = xfer->flags;
482 1.48 augustss
483 1.75 augustss DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
484 1.75 augustss
485 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
486 1.224 mrg
487 1.75 augustss len = alen;
488 1.48 augustss cur = sp;
489 1.125 augustss dataphys = DMAADDR(dma, 0);
490 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
491 1.195 bouyer usb_syncmem(dma, 0, len,
492 1.195 bouyer rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
493 1.168 augustss tdflags = HTOO32(
494 1.120 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
495 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
496 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
497 1.61 augustss
498 1.48 augustss for (;;) {
499 1.48 augustss next = ohci_alloc_std(sc);
500 1.75 augustss if (next == NULL)
501 1.61 augustss goto nomem;
502 1.48 augustss
503 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
504 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
505 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
506 1.48 augustss /* we can handle it in this TD */
507 1.48 augustss curlen = len;
508 1.48 augustss } else {
509 1.48 augustss /* must use multiple TDs, fill as much as possible. */
510 1.120 augustss curlen = 2 * OHCI_PAGE_SIZE -
511 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
512 1.78 augustss /* the length must be a multiple of the max size */
513 1.78 augustss curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
514 1.78 augustss #ifdef DIAGNOSTIC
515 1.78 augustss if (curlen == 0)
516 1.128 provos panic("ohci_alloc_std: curlen == 0");
517 1.78 augustss #endif
518 1.48 augustss }
519 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
520 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
521 1.48 augustss dataphys, dataphysend,
522 1.48 augustss len, curlen));
523 1.48 augustss len -= curlen;
524 1.48 augustss
525 1.77 augustss cur->td.td_flags = tdflags;
526 1.168 augustss cur->td.td_cbp = HTOO32(dataphys);
527 1.48 augustss cur->nexttd = next;
528 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
529 1.168 augustss cur->td.td_be = HTOO32(dataphys + curlen - 1);
530 1.48 augustss cur->len = curlen;
531 1.48 augustss cur->flags = OHCI_ADD_LEN;
532 1.77 augustss cur->xfer = xfer;
533 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
534 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
535 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
536 1.48 augustss dataphys, dataphys + curlen - 1));
537 1.48 augustss if (len == 0)
538 1.48 augustss break;
539 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
540 1.48 augustss dataphys += curlen;
541 1.48 augustss cur = next;
542 1.48 augustss }
543 1.164 augustss if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
544 1.75 augustss alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
545 1.61 augustss /* Force a 0 length transfer at the end. */
546 1.75 augustss
547 1.75 augustss cur = next;
548 1.61 augustss next = ohci_alloc_std(sc);
549 1.75 augustss if (next == NULL)
550 1.61 augustss goto nomem;
551 1.61 augustss
552 1.77 augustss cur->td.td_flags = tdflags;
553 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
554 1.61 augustss cur->nexttd = next;
555 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
556 1.75 augustss cur->td.td_be = ~0;
557 1.61 augustss cur->len = 0;
558 1.61 augustss cur->flags = 0;
559 1.77 augustss cur->xfer = xfer;
560 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
561 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
562 1.61 augustss DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
563 1.61 augustss }
564 1.77 augustss *ep = cur;
565 1.48 augustss
566 1.48 augustss return (USBD_NORMAL_COMPLETION);
567 1.61 augustss
568 1.61 augustss nomem:
569 1.236 skrll
570 1.236 skrll /* Don't free sp - let the caller do that */
571 1.236 skrll ohci_free_std_chain(sc, sp->nexttd, NULL);
572 1.236 skrll
573 1.61 augustss return (USBD_NOMEM);
574 1.48 augustss }
575 1.48 augustss
576 1.82 augustss Static void
577 1.120 augustss ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
578 1.91 augustss ohci_soft_td_t *stdend)
579 1.48 augustss {
580 1.48 augustss ohci_soft_td_t *p;
581 1.48 augustss
582 1.48 augustss for (; std != stdend; std = p) {
583 1.48 augustss p = std->nexttd;
584 1.48 augustss ohci_free_std(sc, std);
585 1.48 augustss }
586 1.48 augustss }
587 1.48 augustss
588 1.60 augustss ohci_soft_itd_t *
589 1.91 augustss ohci_alloc_sitd(ohci_softc_t *sc)
590 1.60 augustss {
591 1.60 augustss ohci_soft_itd_t *sitd;
592 1.60 augustss usbd_status err;
593 1.224 mrg int i, offs;
594 1.60 augustss usb_dma_t dma;
595 1.60 augustss
596 1.60 augustss if (sc->sc_freeitds == NULL) {
597 1.60 augustss DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
598 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
599 1.83 augustss OHCI_ITD_ALIGN, &dma);
600 1.60 augustss if (err)
601 1.83 augustss return (NULL);
602 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
603 1.83 augustss offs = i * OHCI_SITD_SIZE;
604 1.123 augustss sitd = KERNADDR(&dma, offs);
605 1.125 augustss sitd->physaddr = DMAADDR(&dma, offs);
606 1.195 bouyer sitd->dma = dma;
607 1.195 bouyer sitd->offs = offs;
608 1.60 augustss sitd->nextitd = sc->sc_freeitds;
609 1.60 augustss sc->sc_freeitds = sitd;
610 1.60 augustss }
611 1.60 augustss }
612 1.83 augustss
613 1.60 augustss sitd = sc->sc_freeitds;
614 1.60 augustss sc->sc_freeitds = sitd->nextitd;
615 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
616 1.83 augustss sitd->nextitd = NULL;
617 1.83 augustss sitd->xfer = NULL;
618 1.83 augustss ohci_hash_add_itd(sc, sitd);
619 1.83 augustss
620 1.83 augustss #ifdef DIAGNOSTIC
621 1.83 augustss sitd->isdone = 0;
622 1.83 augustss #endif
623 1.83 augustss
624 1.60 augustss return (sitd);
625 1.60 augustss }
626 1.60 augustss
627 1.60 augustss void
628 1.91 augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
629 1.60 augustss {
630 1.83 augustss
631 1.83 augustss DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
632 1.83 augustss
633 1.83 augustss #ifdef DIAGNOSTIC
634 1.83 augustss if (!sitd->isdone) {
635 1.128 provos panic("ohci_free_sitd: sitd=%p not done", sitd);
636 1.83 augustss return;
637 1.83 augustss }
638 1.134 toshii /* Warn double free */
639 1.134 toshii sitd->isdone = 0;
640 1.83 augustss #endif
641 1.83 augustss
642 1.83 augustss ohci_hash_rem_itd(sc, sitd);
643 1.60 augustss sitd->nextitd = sc->sc_freeitds;
644 1.60 augustss sc->sc_freeitds = sitd;
645 1.60 augustss }
646 1.60 augustss
647 1.48 augustss usbd_status
648 1.91 augustss ohci_init(ohci_softc_t *sc)
649 1.1 augustss {
650 1.1 augustss ohci_soft_ed_t *sed, *psed;
651 1.53 augustss usbd_status err;
652 1.1 augustss int i;
653 1.161 augustss u_int32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca, descb;
654 1.16 augustss
655 1.1 augustss DPRINTF(("ohci_init: start\n"));
656 1.199 jmcneill aprint_normal_dev(sc->sc_dev, "");
657 1.199 jmcneill
658 1.198 cegger sc->sc_hcca = NULL;
659 1.224 mrg callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
660 1.224 mrg
661 1.224 mrg mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
662 1.224 mrg mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
663 1.224 mrg cv_init(&sc->sc_softwake_cv, "ohciab");
664 1.224 mrg
665 1.224 mrg sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
666 1.224 mrg ohci_rhsc_softint, sc);
667 1.198 cegger
668 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
669 1.198 cegger LIST_INIT(&sc->sc_hash_tds[i]);
670 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
671 1.198 cegger LIST_INIT(&sc->sc_hash_itds[i]);
672 1.198 cegger
673 1.232 christos sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
674 1.232 christos "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
675 1.198 cegger
676 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
677 1.200 enami aprint_normal("OHCI version %d.%d%s\n",
678 1.199 jmcneill OHCI_REV_HI(rev), OHCI_REV_LO(rev),
679 1.199 jmcneill OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
680 1.55 augustss
681 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
682 1.199 jmcneill aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
683 1.56 augustss sc->sc_bus.usbrev = USBREV_UNKNOWN;
684 1.1 augustss return (USBD_INVAL);
685 1.1 augustss }
686 1.56 augustss sc->sc_bus.usbrev = USBREV_1_0;
687 1.1 augustss
688 1.193 drochner usb_setup_reserve(sc->sc_dev, &sc->sc_dma_reserve, sc->sc_bus.dmatag,
689 1.153 fvdl USB_MEM_RESERVE);
690 1.153 fvdl
691 1.73 augustss /* XXX determine alignment by R/W */
692 1.1 augustss /* Allocate the HCCA area. */
693 1.120 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
694 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
695 1.198 cegger if (err) {
696 1.198 cegger sc->sc_hcca = NULL;
697 1.198 cegger return err;
698 1.198 cegger }
699 1.123 augustss sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
700 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
701 1.1 augustss
702 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
703 1.1 augustss
704 1.60 augustss /* Allocate dummy ED that starts the control list. */
705 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
706 1.53 augustss if (sc->sc_ctrl_head == NULL) {
707 1.53 augustss err = USBD_NOMEM;
708 1.1 augustss goto bad1;
709 1.1 augustss }
710 1.168 augustss sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
711 1.34 augustss
712 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
713 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
714 1.53 augustss if (sc->sc_bulk_head == NULL) {
715 1.53 augustss err = USBD_NOMEM;
716 1.1 augustss goto bad2;
717 1.1 augustss }
718 1.168 augustss sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
719 1.195 bouyer usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
720 1.195 bouyer sizeof(sc->sc_bulk_head->ed),
721 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
722 1.1 augustss
723 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
724 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
725 1.60 augustss if (sc->sc_isoc_head == NULL) {
726 1.60 augustss err = USBD_NOMEM;
727 1.60 augustss goto bad3;
728 1.60 augustss }
729 1.168 augustss sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
730 1.195 bouyer usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
731 1.195 bouyer sizeof(sc->sc_isoc_head->ed),
732 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
733 1.60 augustss
734 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
735 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
736 1.1 augustss sed = ohci_alloc_sed(sc);
737 1.53 augustss if (sed == NULL) {
738 1.1 augustss while (--i >= 0)
739 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
740 1.53 augustss err = USBD_NOMEM;
741 1.60 augustss goto bad4;
742 1.1 augustss }
743 1.1 augustss /* All ED fields are set to 0. */
744 1.1 augustss sc->sc_eds[i] = sed;
745 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
746 1.60 augustss if (i != 0)
747 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
748 1.60 augustss else
749 1.60 augustss psed= sc->sc_isoc_head;
750 1.60 augustss sed->next = psed;
751 1.168 augustss sed->ed.ed_nexted = HTOO32(psed->physaddr);
752 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
753 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
754 1.1 augustss }
755 1.120 augustss /*
756 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
757 1.1 augustss * the tree set up properly to spread the interrupts.
758 1.1 augustss */
759 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
760 1.120 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
761 1.168 augustss HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
762 1.195 bouyer usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
763 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
764 1.1 augustss
765 1.73 augustss #ifdef OHCI_DEBUG
766 1.73 augustss if (ohcidebug > 15) {
767 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
768 1.73 augustss printf("ed#%d ", i);
769 1.168 augustss ohci_dump_ed(sc, sc->sc_eds[i]);
770 1.73 augustss }
771 1.73 augustss printf("iso ");
772 1.168 augustss ohci_dump_ed(sc, sc->sc_isoc_head);
773 1.73 augustss }
774 1.73 augustss #endif
775 1.73 augustss
776 1.161 augustss /* Preserve values programmed by SMM/BIOS but lost over reset. */
777 1.161 augustss ctl = OREAD4(sc, OHCI_CONTROL);
778 1.161 augustss rwc = ctl & OHCI_RWC;
779 1.161 augustss fm = OREAD4(sc, OHCI_FM_INTERVAL);
780 1.161 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
781 1.161 augustss descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
782 1.161 augustss
783 1.1 augustss /* Determine in what context we are running. */
784 1.1 augustss if (ctl & OHCI_IR) {
785 1.1 augustss /* SMM active, request change */
786 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
787 1.160 augustss if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
788 1.160 augustss (OHCI_OC | OHCI_MIE))
789 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
790 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
791 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
792 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
793 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
794 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
795 1.1 augustss }
796 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
797 1.1 augustss if ((ctl & OHCI_IR) == 0) {
798 1.199 jmcneill aprint_error_dev(sc->sc_dev,
799 1.199 jmcneill "SMM does not respond, resetting\n");
800 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
801 1.1 augustss goto reset;
802 1.1 augustss }
803 1.103 augustss #if 0
804 1.103 augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
805 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
806 1.1 augustss /* BIOS started controller. */
807 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
808 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
809 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
810 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
811 1.1 augustss }
812 1.103 augustss #endif
813 1.1 augustss } else {
814 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
815 1.1 augustss reset:
816 1.1 augustss /* Controller was cold started. */
817 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
818 1.1 augustss }
819 1.1 augustss
820 1.16 augustss /*
821 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
822 1.25 augustss * without it some controllers do not start.
823 1.16 augustss */
824 1.190 drochner DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
825 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
826 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
827 1.16 augustss
828 1.1 augustss /* We now own the host controller and the bus has been reset. */
829 1.1 augustss
830 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
831 1.1 augustss /* Nominal time for a reset is 10 us. */
832 1.1 augustss for (i = 0; i < 10; i++) {
833 1.1 augustss delay(10);
834 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
835 1.1 augustss if (!hcr)
836 1.1 augustss break;
837 1.1 augustss }
838 1.1 augustss if (hcr) {
839 1.199 jmcneill aprint_error_dev(sc->sc_dev, "reset timeout\n");
840 1.53 augustss err = USBD_IOERROR;
841 1.60 augustss goto bad5;
842 1.1 augustss }
843 1.52 augustss #ifdef OHCI_DEBUG
844 1.1 augustss if (ohcidebug > 15)
845 1.1 augustss ohci_dumpregs(sc);
846 1.1 augustss #endif
847 1.1 augustss
848 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
849 1.1 augustss
850 1.1 augustss /* Set up HC registers. */
851 1.125 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
852 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
853 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
854 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
855 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
856 1.55 augustss /* switch on desired functional features */
857 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
858 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
859 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
860 1.161 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
861 1.1 augustss /* And finally start it! */
862 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
863 1.1 augustss
864 1.1 augustss /*
865 1.1 augustss * The controller is now OPERATIONAL. Set a some final
866 1.1 augustss * registers that should be set earlier, but that the
867 1.1 augustss * controller ignores when in the SUSPEND state.
868 1.1 augustss */
869 1.161 augustss ival = OHCI_GET_IVAL(fm);
870 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
871 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
872 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
873 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
874 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
875 1.1 augustss
876 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
877 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
878 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
879 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
880 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
881 1.1 augustss
882 1.85 augustss /*
883 1.85 augustss * The AMD756 requires a delay before re-reading the register,
884 1.85 augustss * otherwise it will occasionally report 0 ports.
885 1.85 augustss */
886 1.145 augustss sc->sc_noport = 0;
887 1.145 augustss for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
888 1.145 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
889 1.145 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
890 1.145 augustss }
891 1.1 augustss
892 1.52 augustss #ifdef OHCI_DEBUG
893 1.1 augustss if (ohcidebug > 5)
894 1.1 augustss ohci_dumpregs(sc);
895 1.1 augustss #endif
896 1.120 augustss
897 1.1 augustss /* Set up the bus struct. */
898 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
899 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
900 1.1 augustss
901 1.101 minoura sc->sc_control = sc->sc_intre = 0;
902 1.59 augustss
903 1.167 augustss /* Finally, turn on interrupts. */
904 1.211 matt DPRINTFN(1,("ohci_init: enabling %#x\n", sc->sc_eintrs | OHCI_MIE));
905 1.167 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
906 1.167 augustss
907 1.1 augustss return (USBD_NORMAL_COMPLETION);
908 1.1 augustss
909 1.60 augustss bad5:
910 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
911 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
912 1.60 augustss bad4:
913 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
914 1.1 augustss bad3:
915 1.144 augustss ohci_free_sed(sc, sc->sc_bulk_head);
916 1.144 augustss bad2:
917 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
918 1.1 augustss bad1:
919 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
920 1.198 cegger sc->sc_hcca = NULL;
921 1.53 augustss return (err);
922 1.1 augustss }
923 1.1 augustss
924 1.42 augustss usbd_status
925 1.91 augustss ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
926 1.42 augustss {
927 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
928 1.153 fvdl usbd_status status;
929 1.42 augustss
930 1.153 fvdl status = usb_allocmem(&sc->sc_bus, size, 0, dma);
931 1.153 fvdl if (status == USBD_NOMEM)
932 1.153 fvdl status = usb_reserve_allocm(&sc->sc_dma_reserve, dma, size);
933 1.153 fvdl return status;
934 1.42 augustss }
935 1.42 augustss
936 1.42 augustss void
937 1.91 augustss ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
938 1.42 augustss {
939 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
940 1.153 fvdl if (dma->block->flags & USB_DMA_RESERVE) {
941 1.191 nakayama usb_reserve_freem(&sc->sc_dma_reserve, dma);
942 1.153 fvdl return;
943 1.153 fvdl }
944 1.44 augustss usb_freemem(&sc->sc_bus, dma);
945 1.62 augustss }
946 1.62 augustss
947 1.62 augustss usbd_xfer_handle
948 1.91 augustss ohci_allocx(struct usbd_bus *bus)
949 1.62 augustss {
950 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
951 1.62 augustss usbd_xfer_handle xfer;
952 1.62 augustss
953 1.232 christos xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
954 1.118 augustss if (xfer != NULL) {
955 1.232 christos memset(xfer, 0, sizeof(struct ohci_xfer));
956 1.118 augustss #ifdef DIAGNOSTIC
957 1.118 augustss xfer->busy_free = XFER_BUSY;
958 1.118 augustss #endif
959 1.118 augustss }
960 1.62 augustss return (xfer);
961 1.62 augustss }
962 1.62 augustss
963 1.62 augustss void
964 1.91 augustss ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
965 1.62 augustss {
966 1.191 nakayama struct ohci_softc *sc = bus->hci_private;
967 1.62 augustss
968 1.118 augustss #ifdef DIAGNOSTIC
969 1.118 augustss if (xfer->busy_free != XFER_BUSY) {
970 1.118 augustss printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
971 1.118 augustss xfer->busy_free);
972 1.118 augustss }
973 1.118 augustss xfer->busy_free = XFER_FREE;
974 1.118 augustss #endif
975 1.232 christos pool_cache_put(sc->sc_xferpool, xfer);
976 1.42 augustss }
977 1.42 augustss
978 1.224 mrg Static void
979 1.224 mrg ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
980 1.224 mrg {
981 1.224 mrg struct ohci_softc *sc = bus->hci_private;
982 1.224 mrg
983 1.224 mrg *lock = &sc->sc_lock;
984 1.224 mrg }
985 1.224 mrg
986 1.59 augustss /*
987 1.59 augustss * Shut down the controller when the system is going down.
988 1.59 augustss */
989 1.188 dyoung bool
990 1.188 dyoung ohci_shutdown(device_t self, int flags)
991 1.59 augustss {
992 1.188 dyoung ohci_softc_t *sc = device_private(self);
993 1.59 augustss
994 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
995 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
996 1.188 dyoung return true;
997 1.59 augustss }
998 1.59 augustss
999 1.185 jmcneill bool
1000 1.206 dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
1001 1.33 augustss {
1002 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1003 1.185 jmcneill uint32_t ctl;
1004 1.33 augustss
1005 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1006 1.185 jmcneill sc->sc_bus.use_polling++;
1007 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1008 1.224 mrg
1009 1.185 jmcneill /* Some broken BIOSes do not recover these values */
1010 1.185 jmcneill OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1011 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1012 1.185 jmcneill sc->sc_ctrl_head->physaddr);
1013 1.185 jmcneill OWRITE4(sc, OHCI_BULK_HEAD_ED,
1014 1.185 jmcneill sc->sc_bulk_head->physaddr);
1015 1.185 jmcneill if (sc->sc_intre)
1016 1.185 jmcneill OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1017 1.185 jmcneill (OHCI_ALL_INTRS | OHCI_MIE));
1018 1.185 jmcneill if (sc->sc_control)
1019 1.185 jmcneill ctl = sc->sc_control;
1020 1.185 jmcneill else
1021 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL);
1022 1.185 jmcneill ctl |= OHCI_HCFS_RESUME;
1023 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1024 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1025 1.185 jmcneill ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1026 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1027 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1028 1.185 jmcneill sc->sc_control = sc->sc_intre = 0;
1029 1.224 mrg
1030 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1031 1.185 jmcneill sc->sc_bus.use_polling--;
1032 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1033 1.185 jmcneill
1034 1.185 jmcneill return true;
1035 1.185 jmcneill }
1036 1.185 jmcneill
1037 1.185 jmcneill bool
1038 1.206 dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
1039 1.185 jmcneill {
1040 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1041 1.185 jmcneill uint32_t ctl;
1042 1.95 augustss
1043 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1044 1.185 jmcneill sc->sc_bus.use_polling++;
1045 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1046 1.224 mrg
1047 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1048 1.185 jmcneill if (sc->sc_control == 0) {
1049 1.185 jmcneill /*
1050 1.185 jmcneill * Preserve register values, in case that BIOS
1051 1.185 jmcneill * does not recover them.
1052 1.185 jmcneill */
1053 1.185 jmcneill sc->sc_control = ctl;
1054 1.185 jmcneill sc->sc_intre = OREAD4(sc,
1055 1.185 jmcneill OHCI_INTERRUPT_ENABLE);
1056 1.95 augustss }
1057 1.185 jmcneill ctl |= OHCI_HCFS_SUSPEND;
1058 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1059 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1060 1.224 mrg
1061 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1062 1.185 jmcneill sc->sc_bus.use_polling--;
1063 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1064 1.185 jmcneill
1065 1.185 jmcneill return true;
1066 1.33 augustss }
1067 1.33 augustss
1068 1.52 augustss #ifdef OHCI_DEBUG
1069 1.1 augustss void
1070 1.91 augustss ohci_dumpregs(ohci_softc_t *sc)
1071 1.1 augustss {
1072 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1073 1.41 augustss OREAD4(sc, OHCI_REVISION),
1074 1.41 augustss OREAD4(sc, OHCI_CONTROL),
1075 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1076 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1077 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
1078 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1079 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1080 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1081 1.41 augustss OREAD4(sc, OHCI_HCCA),
1082 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1083 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1084 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1085 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1086 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1087 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1088 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1089 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1090 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1091 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
1092 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1093 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1094 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1095 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
1096 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1097 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1098 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1099 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
1100 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
1101 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1102 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1103 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1104 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number),
1105 1.168 augustss O32TOH(sc->sc_hcca->hcca_done_head)));
1106 1.1 augustss }
1107 1.1 augustss #endif
1108 1.1 augustss
1109 1.91 augustss Static int ohci_intr1(ohci_softc_t *);
1110 1.53 augustss
1111 1.1 augustss int
1112 1.91 augustss ohci_intr(void *p)
1113 1.1 augustss {
1114 1.1 augustss ohci_softc_t *sc = p;
1115 1.224 mrg int ret = 0;
1116 1.111 augustss
1117 1.224 mrg if (sc == NULL)
1118 1.111 augustss return (0);
1119 1.53 augustss
1120 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1121 1.224 mrg
1122 1.224 mrg if (sc->sc_dying || !device_has_power(sc->sc_dev))
1123 1.224 mrg goto done;
1124 1.224 mrg
1125 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
1126 1.57 augustss if (sc->sc_bus.use_polling) {
1127 1.57 augustss #ifdef DIAGNOSTIC
1128 1.149 mycroft DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1129 1.57 augustss #endif
1130 1.154 joff /* for level triggered intrs, should do something to ack */
1131 1.155 perry OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1132 1.154 joff OREAD4(sc, OHCI_INTERRUPT_STATUS));
1133 1.155 perry
1134 1.224 mrg goto done;
1135 1.57 augustss }
1136 1.53 augustss
1137 1.224 mrg ret = ohci_intr1(sc);
1138 1.224 mrg
1139 1.224 mrg done:
1140 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1141 1.224 mrg return ret;
1142 1.53 augustss }
1143 1.53 augustss
1144 1.82 augustss Static int
1145 1.91 augustss ohci_intr1(ohci_softc_t *sc)
1146 1.53 augustss {
1147 1.1 augustss u_int32_t intrs, eintrs;
1148 1.1 augustss
1149 1.105 augustss DPRINTFN(14,("ohci_intr1: enter\n"));
1150 1.105 augustss
1151 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1152 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1153 1.15 augustss #ifdef DIAGNOSTIC
1154 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1155 1.15 augustss #endif
1156 1.15 augustss return (0);
1157 1.15 augustss }
1158 1.15 augustss
1159 1.224 mrg KASSERT(mutex_owned(&sc->sc_intr_lock));
1160 1.224 mrg
1161 1.157 mycroft intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1162 1.1 augustss if (!intrs)
1163 1.1 augustss return (0);
1164 1.55 augustss
1165 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1166 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1167 1.211 matt DPRINTFN(7, ("ohci_intr: sc=%p intrs=%#x(%#x) eintrs=%#x(%#x)\n",
1168 1.211 matt sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1169 1.211 matt (u_int)eintrs, sc->sc_eintrs));
1170 1.211 matt
1171 1.211 matt if (!eintrs) {
1172 1.1 augustss return (0);
1173 1.211 matt }
1174 1.1 augustss
1175 1.44 augustss sc->sc_bus.no_intrs++;
1176 1.1 augustss if (eintrs & OHCI_SO) {
1177 1.100 augustss sc->sc_overrun_cnt++;
1178 1.100 augustss if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1179 1.100 augustss printf("%s: %u scheduling overruns\n",
1180 1.190 drochner device_xname(sc->sc_dev), sc->sc_overrun_cnt);
1181 1.100 augustss sc->sc_overrun_cnt = 0;
1182 1.100 augustss }
1183 1.1 augustss /* XXX do what */
1184 1.106 augustss eintrs &= ~OHCI_SO;
1185 1.1 augustss }
1186 1.1 augustss if (eintrs & OHCI_WDH) {
1187 1.157 mycroft /*
1188 1.157 mycroft * We block the interrupt below, and reenable it later from
1189 1.157 mycroft * ohci_softintr().
1190 1.157 mycroft */
1191 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1192 1.1 augustss }
1193 1.1 augustss if (eintrs & OHCI_RD) {
1194 1.190 drochner printf("%s: resume detect\n", device_xname(sc->sc_dev));
1195 1.1 augustss /* XXX process resume detect */
1196 1.1 augustss }
1197 1.1 augustss if (eintrs & OHCI_UE) {
1198 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1199 1.190 drochner device_xname(sc->sc_dev));
1200 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1201 1.1 augustss /* XXX what else */
1202 1.1 augustss }
1203 1.1 augustss if (eintrs & OHCI_RHSC) {
1204 1.120 augustss /*
1205 1.157 mycroft * We block the interrupt below, and reenable it later from
1206 1.157 mycroft * a timeout.
1207 1.1 augustss */
1208 1.224 mrg softint_schedule(sc->sc_rhsc_si);
1209 1.1 augustss }
1210 1.1 augustss
1211 1.106 augustss if (eintrs != 0) {
1212 1.157 mycroft /* Block unprocessed interrupts. */
1213 1.106 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1214 1.106 augustss sc->sc_eintrs &= ~eintrs;
1215 1.157 mycroft DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1216 1.190 drochner device_xname(sc->sc_dev), eintrs));
1217 1.106 augustss }
1218 1.1 augustss
1219 1.1 augustss return (1);
1220 1.1 augustss }
1221 1.1 augustss
1222 1.1 augustss void
1223 1.104 augustss ohci_rhsc_enable(void *v_sc)
1224 1.104 augustss {
1225 1.104 augustss ohci_softc_t *sc = v_sc;
1226 1.104 augustss
1227 1.224 mrg DPRINTFN(1, ("%s: %s\n", __func__, device_xname(sc->sc_dev)));
1228 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1229 1.157 mycroft sc->sc_eintrs |= OHCI_RHSC;
1230 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1231 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1232 1.1 augustss }
1233 1.1 augustss
1234 1.52 augustss #ifdef OHCI_DEBUG
1235 1.166 drochner const char *ohci_cc_strs[] = {
1236 1.13 augustss "NO_ERROR",
1237 1.13 augustss "CRC",
1238 1.13 augustss "BIT_STUFFING",
1239 1.13 augustss "DATA_TOGGLE_MISMATCH",
1240 1.13 augustss "STALL",
1241 1.13 augustss "DEVICE_NOT_RESPONDING",
1242 1.13 augustss "PID_CHECK_FAILURE",
1243 1.13 augustss "UNEXPECTED_PID",
1244 1.13 augustss "DATA_OVERRUN",
1245 1.13 augustss "DATA_UNDERRUN",
1246 1.13 augustss "BUFFER_OVERRUN",
1247 1.13 augustss "BUFFER_UNDERRUN",
1248 1.67 augustss "reserved",
1249 1.67 augustss "reserved",
1250 1.67 augustss "NOT_ACCESSED",
1251 1.13 augustss "NOT_ACCESSED",
1252 1.13 augustss };
1253 1.13 augustss #endif
1254 1.13 augustss
1255 1.1 augustss void
1256 1.157 mycroft ohci_softintr(void *v)
1257 1.83 augustss {
1258 1.190 drochner struct usbd_bus *bus = v;
1259 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1260 1.157 mycroft ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1261 1.157 mycroft ohci_soft_td_t *std, *sdone, *stdnext;
1262 1.157 mycroft usbd_xfer_handle xfer;
1263 1.157 mycroft struct ohci_pipe *opipe;
1264 1.224 mrg int len, cc;
1265 1.157 mycroft int i, j, actlen, iframes, uedir;
1266 1.157 mycroft ohci_physaddr_t done;
1267 1.157 mycroft
1268 1.224 mrg KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
1269 1.224 mrg
1270 1.157 mycroft DPRINTFN(10,("ohci_softintr: enter\n"));
1271 1.157 mycroft
1272 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1273 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1274 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1275 1.168 augustss done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1276 1.157 mycroft sc->sc_hcca->hcca_done_head = 0;
1277 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1278 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1279 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1280 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1281 1.157 mycroft sc->sc_eintrs |= OHCI_WDH;
1282 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1283 1.83 augustss
1284 1.83 augustss /* Reverse the done list. */
1285 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1286 1.83 augustss std = ohci_hash_find_td(sc, done);
1287 1.83 augustss if (std != NULL) {
1288 1.195 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1289 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1290 1.83 augustss std->dnext = sdone;
1291 1.168 augustss done = O32TOH(std->td.td_nexttd);
1292 1.83 augustss sdone = std;
1293 1.83 augustss DPRINTFN(10,("add TD %p\n", std));
1294 1.83 augustss continue;
1295 1.83 augustss }
1296 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1297 1.83 augustss if (sitd != NULL) {
1298 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1299 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1300 1.83 augustss sitd->dnext = sidone;
1301 1.168 augustss done = O32TOH(sitd->itd.itd_nextitd);
1302 1.83 augustss sidone = sitd;
1303 1.83 augustss DPRINTFN(5,("add ITD %p\n", sitd));
1304 1.83 augustss continue;
1305 1.83 augustss }
1306 1.218 jmcneill device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
1307 1.218 jmcneill (u_long)done);
1308 1.218 jmcneill break;
1309 1.83 augustss }
1310 1.83 augustss
1311 1.105 augustss DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1312 1.1 augustss
1313 1.52 augustss #ifdef OHCI_DEBUG
1314 1.1 augustss if (ohcidebug > 10) {
1315 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1316 1.234 skrll for (std = sdone; std; std = std->dnext)
1317 1.234 skrll ohci_dump_td(sc, std);
1318 1.1 augustss }
1319 1.1 augustss #endif
1320 1.1 augustss
1321 1.48 augustss for (std = sdone; std; std = stdnext) {
1322 1.53 augustss xfer = std->xfer;
1323 1.48 augustss stdnext = std->dnext;
1324 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1325 1.69 augustss std, xfer, xfer ? xfer->hcpriv : 0));
1326 1.71 augustss if (xfer == NULL) {
1327 1.117 augustss /*
1328 1.117 augustss * xfer == NULL: There seems to be no xfer associated
1329 1.71 augustss * with this TD. It is tailp that happened to end up on
1330 1.71 augustss * the done queue.
1331 1.117 augustss * Shouldn't happen, but some chips are broken(?).
1332 1.71 augustss */
1333 1.71 augustss continue;
1334 1.71 augustss }
1335 1.53 augustss if (xfer->status == USBD_CANCELLED ||
1336 1.53 augustss xfer->status == USBD_TIMEOUT) {
1337 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1338 1.53 augustss xfer));
1339 1.38 augustss /* Handled by abort routine. */
1340 1.83 augustss continue;
1341 1.83 augustss }
1342 1.209 dyoung callout_stop(&xfer->timeout_handle);
1343 1.141 mycroft
1344 1.141 mycroft len = std->len;
1345 1.141 mycroft if (std->td.td_cbp != 0)
1346 1.168 augustss len -= O32TOH(std->td.td_be) -
1347 1.168 augustss O32TOH(std->td.td_cbp) + 1;
1348 1.141 mycroft DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1349 1.141 mycroft std->flags));
1350 1.141 mycroft if (std->flags & OHCI_ADD_LEN)
1351 1.141 mycroft xfer->actlen += len;
1352 1.141 mycroft
1353 1.168 augustss cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1354 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1355 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1356 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1357 1.53 augustss usb_transfer_complete(xfer);
1358 1.21 augustss }
1359 1.48 augustss ohci_free_std(sc, std);
1360 1.1 augustss } else {
1361 1.48 augustss /*
1362 1.48 augustss * Endpoint is halted. First unlink all the TDs
1363 1.48 augustss * belonging to the failed transfer, and then restart
1364 1.48 augustss * the endpoint.
1365 1.48 augustss */
1366 1.1 augustss ohci_soft_td_t *p, *n;
1367 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1368 1.48 augustss
1369 1.71 augustss DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1370 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1371 1.168 augustss ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1372 1.48 augustss
1373 1.48 augustss /* remove TDs */
1374 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1375 1.1 augustss n = p->nexttd;
1376 1.1 augustss ohci_free_std(sc, p);
1377 1.1 augustss }
1378 1.48 augustss
1379 1.16 augustss /* clear halt */
1380 1.168 augustss opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1381 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1382 1.48 augustss
1383 1.1 augustss if (cc == OHCI_CC_STALL)
1384 1.53 augustss xfer->status = USBD_STALLED;
1385 1.1 augustss else
1386 1.53 augustss xfer->status = USBD_IOERROR;
1387 1.53 augustss usb_transfer_complete(xfer);
1388 1.1 augustss }
1389 1.1 augustss }
1390 1.72 augustss
1391 1.83 augustss #ifdef OHCI_DEBUG
1392 1.83 augustss if (ohcidebug > 10) {
1393 1.105 augustss DPRINTF(("ohci_softintr: ITD done:\n"));
1394 1.234 skrll for (sitd = sidone; sitd; sitd = sitd->dnext)
1395 1.234 skrll ohci_dump_itd(sc, sitd);
1396 1.83 augustss }
1397 1.83 augustss #endif
1398 1.83 augustss
1399 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1400 1.83 augustss xfer = sitd->xfer;
1401 1.83 augustss sitdnext = sitd->dnext;
1402 1.83 augustss DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1403 1.83 augustss sitd, xfer, xfer ? xfer->hcpriv : 0));
1404 1.83 augustss if (xfer == NULL)
1405 1.83 augustss continue;
1406 1.83 augustss if (xfer->status == USBD_CANCELLED ||
1407 1.83 augustss xfer->status == USBD_TIMEOUT) {
1408 1.83 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1409 1.83 augustss xfer));
1410 1.83 augustss /* Handled by abort routine. */
1411 1.83 augustss continue;
1412 1.83 augustss }
1413 1.83 augustss #ifdef DIAGNOSTIC
1414 1.83 augustss if (sitd->isdone)
1415 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1416 1.83 augustss sitd->isdone = 1;
1417 1.83 augustss #endif
1418 1.134 toshii if (sitd->flags & OHCI_CALL_DONE) {
1419 1.134 toshii ohci_soft_itd_t *next;
1420 1.134 toshii
1421 1.134 toshii opipe = (struct ohci_pipe *)xfer->pipe;
1422 1.134 toshii opipe->u.iso.inuse -= xfer->nframes;
1423 1.134 toshii uedir = UE_GET_DIR(xfer->pipe->endpoint->edesc->
1424 1.134 toshii bEndpointAddress);
1425 1.134 toshii xfer->status = USBD_NORMAL_COMPLETION;
1426 1.134 toshii actlen = 0;
1427 1.137 simonb for (i = 0, sitd = xfer->hcpriv;;
1428 1.134 toshii sitd = next) {
1429 1.134 toshii next = sitd->nextitd;
1430 1.168 augustss if (OHCI_ITD_GET_CC(O32TOH(sitd->
1431 1.135 toshii itd.itd_flags)) != OHCI_CC_NO_ERROR)
1432 1.134 toshii xfer->status = USBD_IOERROR;
1433 1.134 toshii /* For input, update frlengths with actual */
1434 1.134 toshii /* XXX anything necessary for output? */
1435 1.134 toshii if (uedir == UE_DIR_IN &&
1436 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION) {
1437 1.168 augustss iframes = OHCI_ITD_GET_FC(O32TOH(
1438 1.135 toshii sitd->itd.itd_flags));
1439 1.134 toshii for (j = 0; j < iframes; i++, j++) {
1440 1.168 augustss len = O16TOH(sitd->
1441 1.134 toshii itd.itd_offset[j]);
1442 1.158 toshii if ((OHCI_ITD_PSW_GET_CC(len) &
1443 1.158 toshii OHCI_CC_NOT_ACCESSED_MASK)
1444 1.158 toshii == OHCI_CC_NOT_ACCESSED)
1445 1.158 toshii len = 0;
1446 1.158 toshii else
1447 1.158 toshii len = OHCI_ITD_PSW_LENGTH(len);
1448 1.134 toshii xfer->frlengths[i] = len;
1449 1.134 toshii actlen += len;
1450 1.134 toshii }
1451 1.134 toshii }
1452 1.134 toshii if (sitd->flags & OHCI_CALL_DONE)
1453 1.134 toshii break;
1454 1.134 toshii ohci_free_sitd(sc, sitd);
1455 1.83 augustss }
1456 1.134 toshii ohci_free_sitd(sc, sitd);
1457 1.134 toshii if (uedir == UE_DIR_IN &&
1458 1.134 toshii xfer->status == USBD_NORMAL_COMPLETION)
1459 1.134 toshii xfer->actlen = actlen;
1460 1.151 mycroft xfer->hcpriv = NULL;
1461 1.134 toshii
1462 1.83 augustss usb_transfer_complete(xfer);
1463 1.83 augustss }
1464 1.83 augustss }
1465 1.83 augustss
1466 1.119 augustss if (sc->sc_softwake) {
1467 1.119 augustss sc->sc_softwake = 0;
1468 1.224 mrg cv_broadcast(&sc->sc_softwake_cv);
1469 1.119 augustss }
1470 1.119 augustss
1471 1.105 augustss DPRINTFN(10,("ohci_softintr: done:\n"));
1472 1.1 augustss }
1473 1.1 augustss
1474 1.1 augustss void
1475 1.179 christos ohci_device_ctrl_done(usbd_xfer_handle xfer)
1476 1.1 augustss {
1477 1.195 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1478 1.224 mrg #ifdef DIAGNOSTIC
1479 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
1480 1.224 mrg #endif
1481 1.195 bouyer int len = UGETW(xfer->request.wLength);
1482 1.195 bouyer int isread = (xfer->request.bmRequestType & UT_READ);
1483 1.195 bouyer
1484 1.140 gson DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1485 1.1 augustss
1486 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1487 1.224 mrg
1488 1.38 augustss #ifdef DIAGNOSTIC
1489 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1490 1.140 gson panic("ohci_device_ctrl_done: not a request");
1491 1.1 augustss }
1492 1.38 augustss #endif
1493 1.195 bouyer if (len)
1494 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, len,
1495 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1496 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0,
1497 1.195 bouyer sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1498 1.1 augustss }
1499 1.1 augustss
1500 1.1 augustss void
1501 1.91 augustss ohci_device_intr_done(usbd_xfer_handle xfer)
1502 1.1 augustss {
1503 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1504 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1505 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1506 1.48 augustss ohci_soft_td_t *data, *tail;
1507 1.195 bouyer int isread =
1508 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1509 1.1 augustss
1510 1.140 gson DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1511 1.53 augustss xfer, xfer->actlen));
1512 1.1 augustss
1513 1.240 skrll KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
1514 1.224 mrg
1515 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1516 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1517 1.53 augustss if (xfer->pipe->repeat) {
1518 1.60 augustss data = opipe->tail.td;
1519 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1520 1.53 augustss if (tail == NULL) {
1521 1.53 augustss xfer->status = USBD_NOMEM;
1522 1.1 augustss return;
1523 1.1 augustss }
1524 1.55 augustss tail->xfer = NULL;
1525 1.120 augustss
1526 1.168 augustss data->td.td_flags = HTOO32(
1527 1.120 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1528 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1529 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1530 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
1531 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
1532 1.48 augustss data->nexttd = tail;
1533 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
1534 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1535 1.76 tsutsui xfer->length - 1);
1536 1.53 augustss data->len = xfer->length;
1537 1.53 augustss data->xfer = xfer;
1538 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1539 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
1540 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1541 1.53 augustss xfer->hcpriv = data;
1542 1.53 augustss xfer->actlen = 0;
1543 1.1 augustss
1544 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1545 1.195 bouyer usb_syncmem(&sed->dma,
1546 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1547 1.195 bouyer sizeof(sed->ed.ed_tailp),
1548 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1549 1.60 augustss opipe->tail.td = tail;
1550 1.1 augustss }
1551 1.1 augustss }
1552 1.1 augustss
1553 1.1 augustss void
1554 1.179 christos ohci_device_bulk_done(usbd_xfer_handle xfer)
1555 1.3 augustss {
1556 1.224 mrg #ifdef DIAGNOSTIC
1557 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
1558 1.224 mrg #endif
1559 1.195 bouyer int isread =
1560 1.195 bouyer (UE_GET_DIR(xfer->pipe->endpoint->edesc->bEndpointAddress) == UE_DIR_IN);
1561 1.195 bouyer
1562 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1563 1.224 mrg
1564 1.140 gson DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1565 1.53 augustss xfer, xfer->actlen));
1566 1.195 bouyer usb_syncmem(&xfer->dmabuf, 0, xfer->length,
1567 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1568 1.3 augustss }
1569 1.3 augustss
1570 1.224 mrg Static void
1571 1.224 mrg ohci_rhsc_softint(void *arg)
1572 1.224 mrg {
1573 1.224 mrg ohci_softc_t *sc = arg;
1574 1.224 mrg
1575 1.224 mrg mutex_enter(&sc->sc_lock);
1576 1.224 mrg
1577 1.224 mrg ohci_rhsc(sc, sc->sc_intrxfer);
1578 1.224 mrg
1579 1.224 mrg /* Do not allow RHSC interrupts > 1 per second */
1580 1.224 mrg callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1581 1.224 mrg
1582 1.224 mrg mutex_exit(&sc->sc_lock);
1583 1.224 mrg }
1584 1.224 mrg
1585 1.3 augustss void
1586 1.91 augustss ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1587 1.1 augustss {
1588 1.1 augustss usbd_pipe_handle pipe;
1589 1.1 augustss u_char *p;
1590 1.1 augustss int i, m;
1591 1.1 augustss int hstatus;
1592 1.1 augustss
1593 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1594 1.224 mrg
1595 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1596 1.120 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1597 1.53 augustss sc, xfer, hstatus));
1598 1.1 augustss
1599 1.53 augustss if (xfer == NULL) {
1600 1.1 augustss /* Just ignore the change. */
1601 1.1 augustss return;
1602 1.1 augustss }
1603 1.1 augustss
1604 1.53 augustss pipe = xfer->pipe;
1605 1.1 augustss
1606 1.123 augustss p = KERNADDR(&xfer->dmabuf, 0);
1607 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1608 1.53 augustss memset(p, 0, xfer->length);
1609 1.1 augustss for (i = 1; i <= m; i++) {
1610 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1611 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1612 1.1 augustss p[i/8] |= 1 << (i%8);
1613 1.1 augustss }
1614 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1615 1.53 augustss xfer->actlen = xfer->length;
1616 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1617 1.1 augustss
1618 1.53 augustss usb_transfer_complete(xfer);
1619 1.38 augustss }
1620 1.38 augustss
1621 1.38 augustss void
1622 1.179 christos ohci_root_intr_done(usbd_xfer_handle xfer)
1623 1.65 augustss {
1624 1.65 augustss }
1625 1.65 augustss
1626 1.65 augustss void
1627 1.179 christos ohci_root_ctrl_done(usbd_xfer_handle xfer)
1628 1.38 augustss {
1629 1.1 augustss }
1630 1.1 augustss
1631 1.1 augustss /*
1632 1.1 augustss * Wait here until controller claims to have an interrupt.
1633 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1634 1.1 augustss * too long.
1635 1.1 augustss */
1636 1.1 augustss void
1637 1.91 augustss ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1638 1.1 augustss {
1639 1.163 augustss int timo;
1640 1.1 augustss u_int32_t intrs;
1641 1.1 augustss
1642 1.224 mrg mutex_enter(&sc->sc_lock);
1643 1.224 mrg
1644 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1645 1.163 augustss for (timo = xfer->timeout; timo >= 0; timo--) {
1646 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1647 1.116 augustss if (sc->sc_dying)
1648 1.116 augustss break;
1649 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1650 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1651 1.52 augustss #ifdef OHCI_DEBUG
1652 1.1 augustss if (ohcidebug > 15)
1653 1.1 augustss ohci_dumpregs(sc);
1654 1.1 augustss #endif
1655 1.1 augustss if (intrs) {
1656 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1657 1.53 augustss ohci_intr1(sc);
1658 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1659 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1660 1.230 jmcneill goto done;
1661 1.1 augustss }
1662 1.1 augustss }
1663 1.15 augustss
1664 1.15 augustss /* Timeout */
1665 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1666 1.53 augustss xfer->status = USBD_TIMEOUT;
1667 1.53 augustss usb_transfer_complete(xfer);
1668 1.224 mrg
1669 1.15 augustss /* XXX should free TD */
1670 1.224 mrg
1671 1.230 jmcneill done:
1672 1.224 mrg mutex_exit(&sc->sc_lock);
1673 1.5 augustss }
1674 1.5 augustss
1675 1.5 augustss void
1676 1.91 augustss ohci_poll(struct usbd_bus *bus)
1677 1.5 augustss {
1678 1.190 drochner ohci_softc_t *sc = bus->hci_private;
1679 1.105 augustss #ifdef OHCI_DEBUG
1680 1.105 augustss static int last;
1681 1.105 augustss int new;
1682 1.105 augustss new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1683 1.105 augustss if (new != last) {
1684 1.105 augustss DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1685 1.105 augustss last = new;
1686 1.105 augustss }
1687 1.105 augustss #endif
1688 1.217 jmcneill sc->sc_eintrs |= OHCI_WDH;
1689 1.224 mrg if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
1690 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1691 1.53 augustss ohci_intr1(sc);
1692 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1693 1.224 mrg }
1694 1.1 augustss }
1695 1.1 augustss
1696 1.1 augustss usbd_status
1697 1.91 augustss ohci_device_request(usbd_xfer_handle xfer)
1698 1.1 augustss {
1699 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1700 1.53 augustss usb_device_request_t *req = &xfer->request;
1701 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1702 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
1703 1.1 augustss int addr = dev->address;
1704 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1705 1.1 augustss ohci_soft_ed_t *sed;
1706 1.1 augustss int isread;
1707 1.1 augustss int len;
1708 1.53 augustss usbd_status err;
1709 1.224 mrg
1710 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1711 1.1 augustss
1712 1.1 augustss isread = req->bmRequestType & UT_READ;
1713 1.1 augustss len = UGETW(req->wLength);
1714 1.1 augustss
1715 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1716 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1717 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1718 1.120 augustss UGETW(req->wIndex), len, addr,
1719 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1720 1.1 augustss
1721 1.60 augustss setup = opipe->tail.td;
1722 1.1 augustss stat = ohci_alloc_std(sc);
1723 1.53 augustss if (stat == NULL) {
1724 1.53 augustss err = USBD_NOMEM;
1725 1.1 augustss goto bad1;
1726 1.1 augustss }
1727 1.1 augustss tail = ohci_alloc_std(sc);
1728 1.53 augustss if (tail == NULL) {
1729 1.53 augustss err = USBD_NOMEM;
1730 1.1 augustss goto bad2;
1731 1.1 augustss }
1732 1.55 augustss tail->xfer = NULL;
1733 1.1 augustss
1734 1.1 augustss sed = opipe->sed;
1735 1.1 augustss opipe->u.ctl.length = len;
1736 1.1 augustss
1737 1.148 mycroft /* Update device address and length since they may have changed
1738 1.148 mycroft during the setup of the control pipe in usbd_new_device(). */
1739 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1740 1.77 augustss /* XXXX Should not touch ED here! */
1741 1.195 bouyer
1742 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1743 1.195 bouyer sizeof(sed->ed.ed_flags),
1744 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1745 1.168 augustss sed->ed.ed_flags = HTOO32(
1746 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1747 1.16 augustss OHCI_ED_SET_FA(addr) |
1748 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1749 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
1750 1.195 bouyer sizeof(sed->ed.ed_flags),
1751 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1752 1.1 augustss
1753 1.77 augustss next = stat;
1754 1.77 augustss
1755 1.1 augustss /* Set up data transaction */
1756 1.1 augustss if (len != 0) {
1757 1.77 augustss ohci_soft_td_t *std = stat;
1758 1.77 augustss
1759 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1760 1.77 augustss std, &stat);
1761 1.236 skrll if (err) {
1762 1.236 skrll /* stat is unchanged if error */
1763 1.236 skrll goto bad3;
1764 1.236 skrll }
1765 1.77 augustss stat = stat->nexttd; /* point at free TD */
1766 1.236 skrll
1767 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1768 1.168 augustss std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1769 1.168 augustss std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1770 1.195 bouyer usb_syncmem(&std->dma,
1771 1.195 bouyer std->offs + offsetof(ohci_td_t, td_flags),
1772 1.195 bouyer sizeof(std->td.td_flags),
1773 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1774 1.34 augustss }
1775 1.1 augustss
1776 1.123 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1777 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
1778 1.1 augustss
1779 1.168 augustss setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1780 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1781 1.168 augustss setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1782 1.1 augustss setup->nexttd = next;
1783 1.168 augustss setup->td.td_nexttd = HTOO32(next->physaddr);
1784 1.168 augustss setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1785 1.77 augustss setup->len = 0;
1786 1.53 augustss setup->xfer = xfer;
1787 1.34 augustss setup->flags = 0;
1788 1.53 augustss xfer->hcpriv = setup;
1789 1.195 bouyer usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
1790 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1791 1.1 augustss
1792 1.168 augustss stat->td.td_flags = HTOO32(
1793 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1794 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1795 1.39 augustss stat->td.td_cbp = 0;
1796 1.1 augustss stat->nexttd = tail;
1797 1.168 augustss stat->td.td_nexttd = HTOO32(tail->physaddr);
1798 1.39 augustss stat->td.td_be = 0;
1799 1.77 augustss stat->flags = OHCI_CALL_DONE;
1800 1.1 augustss stat->len = 0;
1801 1.53 augustss stat->xfer = xfer;
1802 1.195 bouyer usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
1803 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1804 1.1 augustss
1805 1.52 augustss #ifdef OHCI_DEBUG
1806 1.1 augustss if (ohcidebug > 5) {
1807 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1808 1.168 augustss ohci_dump_ed(sc, sed);
1809 1.168 augustss ohci_dump_tds(sc, setup);
1810 1.1 augustss }
1811 1.1 augustss #endif
1812 1.1 augustss
1813 1.1 augustss /* Insert ED in schedule */
1814 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1815 1.195 bouyer usb_syncmem(&sed->dma,
1816 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1817 1.195 bouyer sizeof(sed->ed.ed_tailp),
1818 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1819 1.60 augustss opipe->tail.td = tail;
1820 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1821 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1822 1.209 dyoung callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
1823 1.80 augustss ohci_timeout, xfer);
1824 1.15 augustss }
1825 1.1 augustss
1826 1.115 itojun #ifdef OHCI_DEBUG
1827 1.113 augustss if (ohcidebug > 20) {
1828 1.77 augustss delay(10000);
1829 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1830 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1831 1.113 augustss ohci_dumpregs(sc);
1832 1.113 augustss printf("ctrl head:\n");
1833 1.168 augustss ohci_dump_ed(sc, sc->sc_ctrl_head);
1834 1.113 augustss printf("sed:\n");
1835 1.168 augustss ohci_dump_ed(sc, sed);
1836 1.168 augustss ohci_dump_tds(sc, setup);
1837 1.1 augustss }
1838 1.1 augustss #endif
1839 1.1 augustss
1840 1.1 augustss return (USBD_NORMAL_COMPLETION);
1841 1.1 augustss
1842 1.1 augustss bad3:
1843 1.1 augustss ohci_free_std(sc, tail);
1844 1.1 augustss bad2:
1845 1.1 augustss ohci_free_std(sc, stat);
1846 1.1 augustss bad1:
1847 1.53 augustss return (err);
1848 1.1 augustss }
1849 1.1 augustss
1850 1.1 augustss /*
1851 1.224 mrg * Add an ED to the schedule. Called with USB lock held.
1852 1.1 augustss */
1853 1.224 mrg Static void
1854 1.168 augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1855 1.1 augustss {
1856 1.113 augustss DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1857 1.113 augustss
1858 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1859 1.224 mrg
1860 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1861 1.195 bouyer sizeof(head->ed.ed_nexted),
1862 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1863 1.1 augustss sed->next = head->next;
1864 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1865 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1866 1.195 bouyer sizeof(sed->ed.ed_nexted),
1867 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1868 1.1 augustss head->next = sed;
1869 1.168 augustss head->ed.ed_nexted = HTOO32(sed->physaddr);
1870 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1871 1.195 bouyer sizeof(head->ed.ed_nexted),
1872 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1873 1.1 augustss }
1874 1.1 augustss
1875 1.1 augustss /*
1876 1.224 mrg * Remove an ED from the schedule. Called with USB lock held.
1877 1.3 augustss */
1878 1.224 mrg Static void
1879 1.224 mrg ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1880 1.3 augustss {
1881 1.120 augustss ohci_soft_ed_t *p;
1882 1.3 augustss
1883 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1884 1.224 mrg
1885 1.3 augustss /* XXX */
1886 1.133 toshii for (p = head; p != NULL && p->next != sed; p = p->next)
1887 1.3 augustss ;
1888 1.55 augustss if (p == NULL)
1889 1.128 provos panic("ohci_rem_ed: ED not found");
1890 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1891 1.195 bouyer sizeof(sed->ed.ed_nexted),
1892 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1893 1.3 augustss p->next = sed->next;
1894 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1895 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1896 1.195 bouyer sizeof(p->ed.ed_nexted),
1897 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1898 1.3 augustss }
1899 1.3 augustss
1900 1.3 augustss /*
1901 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1902 1.1 augustss * the host controller. This queue is the processed by software.
1903 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1904 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1905 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1906 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1907 1.1 augustss * hash value.
1908 1.1 augustss */
1909 1.1 augustss
1910 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1911 1.224 mrg /* Called with USB lock held. */
1912 1.1 augustss void
1913 1.91 augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1914 1.1 augustss {
1915 1.1 augustss int h = HASH(std->physaddr);
1916 1.1 augustss
1917 1.240 skrll KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
1918 1.224 mrg
1919 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1920 1.1 augustss }
1921 1.1 augustss
1922 1.224 mrg /* Called with USB lock held. */
1923 1.1 augustss void
1924 1.179 christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1925 1.1 augustss {
1926 1.46 augustss
1927 1.240 skrll KASSERT(sc->sc_bus.use_polling || mutex_owned(&sc->sc_lock));
1928 1.224 mrg
1929 1.1 augustss LIST_REMOVE(std, hnext);
1930 1.1 augustss }
1931 1.1 augustss
1932 1.1 augustss ohci_soft_td_t *
1933 1.91 augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1934 1.1 augustss {
1935 1.1 augustss int h = HASH(a);
1936 1.1 augustss ohci_soft_td_t *std;
1937 1.1 augustss
1938 1.120 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1939 1.53 augustss std != NULL;
1940 1.1 augustss std = LIST_NEXT(std, hnext))
1941 1.1 augustss if (std->physaddr == a)
1942 1.1 augustss return (std);
1943 1.83 augustss return (NULL);
1944 1.83 augustss }
1945 1.83 augustss
1946 1.224 mrg /* Called with USB lock held. */
1947 1.83 augustss void
1948 1.91 augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1949 1.83 augustss {
1950 1.83 augustss int h = HASH(sitd->physaddr);
1951 1.83 augustss
1952 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1953 1.224 mrg
1954 1.120 augustss DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1955 1.83 augustss sitd, (u_long)sitd->physaddr));
1956 1.83 augustss
1957 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1958 1.83 augustss }
1959 1.83 augustss
1960 1.224 mrg /* Called with USB lock held. */
1961 1.83 augustss void
1962 1.179 christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1963 1.83 augustss {
1964 1.83 augustss
1965 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1966 1.224 mrg
1967 1.120 augustss DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1968 1.83 augustss sitd, (u_long)sitd->physaddr));
1969 1.83 augustss
1970 1.83 augustss LIST_REMOVE(sitd, hnext);
1971 1.83 augustss }
1972 1.83 augustss
1973 1.83 augustss ohci_soft_itd_t *
1974 1.91 augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1975 1.83 augustss {
1976 1.83 augustss int h = HASH(a);
1977 1.83 augustss ohci_soft_itd_t *sitd;
1978 1.83 augustss
1979 1.120 augustss for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1980 1.83 augustss sitd != NULL;
1981 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1982 1.83 augustss if (sitd->physaddr == a)
1983 1.83 augustss return (sitd);
1984 1.83 augustss return (NULL);
1985 1.1 augustss }
1986 1.1 augustss
1987 1.1 augustss void
1988 1.91 augustss ohci_timeout(void *addr)
1989 1.1 augustss {
1990 1.114 augustss struct ohci_xfer *oxfer = addr;
1991 1.116 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.pipe;
1992 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
1993 1.114 augustss
1994 1.114 augustss DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1995 1.114 augustss
1996 1.116 augustss if (sc->sc_dying) {
1997 1.224 mrg mutex_enter(&sc->sc_lock);
1998 1.116 augustss ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1999 1.224 mrg mutex_exit(&sc->sc_lock);
2000 1.116 augustss return;
2001 1.116 augustss }
2002 1.116 augustss
2003 1.114 augustss /* Execute the abort in a process context. */
2004 1.231 jmcneill usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr,
2005 1.231 jmcneill USB_TASKQ_MPSAFE);
2006 1.178 joerg usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task,
2007 1.178 joerg USB_TASKQ_HC);
2008 1.114 augustss }
2009 1.114 augustss
2010 1.114 augustss void
2011 1.114 augustss ohci_timeout_task(void *addr)
2012 1.114 augustss {
2013 1.53 augustss usbd_xfer_handle xfer = addr;
2014 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2015 1.1 augustss
2016 1.114 augustss DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
2017 1.45 augustss
2018 1.224 mrg mutex_enter(&sc->sc_lock);
2019 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
2020 1.224 mrg mutex_exit(&sc->sc_lock);
2021 1.1 augustss }
2022 1.1 augustss
2023 1.52 augustss #ifdef OHCI_DEBUG
2024 1.1 augustss void
2025 1.168 augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
2026 1.1 augustss {
2027 1.1 augustss for (; std; std = std->nexttd)
2028 1.168 augustss ohci_dump_td(sc, std);
2029 1.1 augustss }
2030 1.1 augustss
2031 1.1 augustss void
2032 1.168 augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
2033 1.1 augustss {
2034 1.92 tv char sbuf[128];
2035 1.92 tv
2036 1.204 martin usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2037 1.204 martin BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2038 1.197 christos snprintb(sbuf, sizeof(sbuf),
2039 1.237 skrll "\177\20"
2040 1.237 skrll "b\22R\0"
2041 1.237 skrll "f\23\02DP\0"
2042 1.237 skrll "=\x0" "setup\0"
2043 1.237 skrll "=\x1" "out\0"
2044 1.237 skrll "=\x2" "in\0"
2045 1.237 skrll "=\x3" "reserved\0"
2046 1.237 skrll "f\25\03DI\0"
2047 1.237 skrll "=\x07" "none\0"
2048 1.237 skrll "f\30\02T\0"
2049 1.237 skrll "=\x0" "carry\0"
2050 1.237 skrll "=\x1" "carry\0"
2051 1.237 skrll "=\x2" "0\0"
2052 1.237 skrll "=\x3" "1\0"
2053 1.237 skrll "f\32\02EC\0"
2054 1.237 skrll "f\34\04CC\0",
2055 1.197 christos (u_int32_t)O32TOH(std->td.td_flags));
2056 1.238 skrll printf("TD(%p) at %08lx:\n\tflags=%s\n\tcbp=0x%08lx nexttd=0x%08lx be=0x%08lx\n",
2057 1.107 augustss std, (u_long)std->physaddr, sbuf,
2058 1.168 augustss (u_long)O32TOH(std->td.td_cbp),
2059 1.168 augustss (u_long)O32TOH(std->td.td_nexttd),
2060 1.168 augustss (u_long)O32TOH(std->td.td_be));
2061 1.1 augustss }
2062 1.1 augustss
2063 1.1 augustss void
2064 1.168 augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2065 1.83 augustss {
2066 1.83 augustss int i;
2067 1.83 augustss
2068 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
2069 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2070 1.107 augustss printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2071 1.120 augustss "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2072 1.107 augustss sitd, (u_long)sitd->physaddr,
2073 1.168 augustss OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
2074 1.168 augustss OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
2075 1.168 augustss OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
2076 1.168 augustss OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
2077 1.168 augustss (u_long)O32TOH(sitd->itd.itd_bp0),
2078 1.168 augustss (u_long)O32TOH(sitd->itd.itd_nextitd),
2079 1.168 augustss (u_long)O32TOH(sitd->itd.itd_be));
2080 1.83 augustss for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2081 1.107 augustss printf("offs[%d]=0x%04x ", i,
2082 1.168 augustss (u_int)O16TOH(sitd->itd.itd_offset[i]));
2083 1.107 augustss printf("\n");
2084 1.83 augustss }
2085 1.83 augustss
2086 1.83 augustss void
2087 1.168 augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2088 1.83 augustss {
2089 1.83 augustss for (; sitd; sitd = sitd->nextitd)
2090 1.168 augustss ohci_dump_itd(sc, sitd);
2091 1.83 augustss }
2092 1.83 augustss
2093 1.83 augustss void
2094 1.168 augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2095 1.1 augustss {
2096 1.92 tv char sbuf[128], sbuf2[128];
2097 1.92 tv
2098 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2099 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2100 1.197 christos snprintb(sbuf, sizeof(sbuf),
2101 1.197 christos "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2102 1.197 christos (u_int32_t)O32TOH(sed->ed.ed_flags));
2103 1.197 christos snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY",
2104 1.197 christos (u_int32_t)O32TOH(sed->ed.ed_headp));
2105 1.92 tv
2106 1.107 augustss printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2107 1.92 tv "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2108 1.120 augustss sed, (u_long)sed->physaddr,
2109 1.168 augustss OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
2110 1.168 augustss OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
2111 1.168 augustss OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
2112 1.168 augustss (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
2113 1.168 augustss (u_long)O32TOH(sed->ed.ed_headp),
2114 1.168 augustss (u_long)O32TOH(sed->ed.ed_nexted));
2115 1.1 augustss }
2116 1.1 augustss #endif
2117 1.1 augustss
2118 1.1 augustss usbd_status
2119 1.91 augustss ohci_open(usbd_pipe_handle pipe)
2120 1.1 augustss {
2121 1.1 augustss usbd_device_handle dev = pipe->device;
2122 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
2123 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
2124 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2125 1.1 augustss u_int8_t addr = dev->address;
2126 1.60 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2127 1.1 augustss ohci_soft_ed_t *sed;
2128 1.1 augustss ohci_soft_td_t *std;
2129 1.60 augustss ohci_soft_itd_t *sitd;
2130 1.60 augustss ohci_physaddr_t tdphys;
2131 1.60 augustss u_int32_t fmt;
2132 1.224 mrg usbd_status err = USBD_NOMEM;
2133 1.64 augustss int ival;
2134 1.1 augustss
2135 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2136 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
2137 1.81 augustss
2138 1.224 mrg if (sc->sc_dying) {
2139 1.224 mrg err = USBD_IOERROR;
2140 1.224 mrg goto bad0;
2141 1.224 mrg }
2142 1.116 augustss
2143 1.90 thorpej std = NULL;
2144 1.90 thorpej sed = NULL;
2145 1.90 thorpej
2146 1.1 augustss if (addr == sc->sc_addr) {
2147 1.1 augustss switch (ed->bEndpointAddress) {
2148 1.1 augustss case USB_CONTROL_ENDPOINT:
2149 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
2150 1.1 augustss break;
2151 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
2152 1.1 augustss pipe->methods = &ohci_root_intr_methods;
2153 1.1 augustss break;
2154 1.1 augustss default:
2155 1.224 mrg err = USBD_INVAL;
2156 1.224 mrg goto bad0;
2157 1.1 augustss }
2158 1.1 augustss } else {
2159 1.1 augustss sed = ohci_alloc_sed(sc);
2160 1.53 augustss if (sed == NULL)
2161 1.1 augustss goto bad0;
2162 1.1 augustss opipe->sed = sed;
2163 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
2164 1.224 mrg mutex_enter(&sc->sc_lock);
2165 1.60 augustss sitd = ohci_alloc_sitd(sc);
2166 1.224 mrg mutex_exit(&sc->sc_lock);
2167 1.127 augustss if (sitd == NULL)
2168 1.60 augustss goto bad1;
2169 1.60 augustss opipe->tail.itd = sitd;
2170 1.76 tsutsui tdphys = sitd->physaddr;
2171 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
2172 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2173 1.83 augustss fmt |= OHCI_ED_DIR_IN;
2174 1.83 augustss else
2175 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
2176 1.60 augustss } else {
2177 1.224 mrg mutex_enter(&sc->sc_lock);
2178 1.60 augustss std = ohci_alloc_std(sc);
2179 1.224 mrg mutex_exit(&sc->sc_lock);
2180 1.127 augustss if (std == NULL)
2181 1.60 augustss goto bad1;
2182 1.60 augustss opipe->tail.td = std;
2183 1.76 tsutsui tdphys = std->physaddr;
2184 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2185 1.60 augustss }
2186 1.168 augustss sed->ed.ed_flags = HTOO32(
2187 1.120 augustss OHCI_ED_SET_FA(addr) |
2188 1.147 mycroft OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2189 1.109 augustss (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2190 1.109 augustss fmt |
2191 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2192 1.214 jakllsch sed->ed.ed_headp = HTOO32(tdphys |
2193 1.214 jakllsch (pipe->endpoint->datatoggle ? OHCI_TOGGLECARRY : 0));
2194 1.214 jakllsch sed->ed.ed_tailp = HTOO32(tdphys);
2195 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2196 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2197 1.1 augustss
2198 1.60 augustss switch (xfertype) {
2199 1.1 augustss case UE_CONTROL:
2200 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
2201 1.120 augustss err = usb_allocmem(&sc->sc_bus,
2202 1.120 augustss sizeof(usb_device_request_t),
2203 1.53 augustss 0, &opipe->u.ctl.reqdma);
2204 1.53 augustss if (err)
2205 1.1 augustss goto bad;
2206 1.224 mrg mutex_enter(&sc->sc_lock);
2207 1.168 augustss ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2208 1.224 mrg mutex_exit(&sc->sc_lock);
2209 1.1 augustss break;
2210 1.1 augustss case UE_INTERRUPT:
2211 1.1 augustss pipe->methods = &ohci_device_intr_methods;
2212 1.64 augustss ival = pipe->interval;
2213 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
2214 1.64 augustss ival = ed->bInterval;
2215 1.226 skrll err = ohci_device_setintr(sc, opipe, ival);
2216 1.226 skrll if (err)
2217 1.226 skrll goto bad;
2218 1.226 skrll break;
2219 1.1 augustss case UE_ISOCHRONOUS:
2220 1.60 augustss pipe->methods = &ohci_device_isoc_methods;
2221 1.60 augustss return (ohci_setup_isoc(pipe));
2222 1.1 augustss case UE_BULK:
2223 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
2224 1.224 mrg mutex_enter(&sc->sc_lock);
2225 1.168 augustss ohci_add_ed(sc, sed, sc->sc_bulk_head);
2226 1.224 mrg mutex_exit(&sc->sc_lock);
2227 1.3 augustss break;
2228 1.1 augustss }
2229 1.1 augustss }
2230 1.224 mrg
2231 1.224 mrg return USBD_NORMAL_COMPLETION;
2232 1.1 augustss
2233 1.1 augustss bad:
2234 1.90 thorpej if (std != NULL)
2235 1.90 thorpej ohci_free_std(sc, std);
2236 1.1 augustss bad1:
2237 1.90 thorpej if (sed != NULL)
2238 1.90 thorpej ohci_free_sed(sc, sed);
2239 1.1 augustss bad0:
2240 1.224 mrg return err;
2241 1.120 augustss
2242 1.1 augustss }
2243 1.1 augustss
2244 1.1 augustss /*
2245 1.34 augustss * Close a reqular pipe.
2246 1.34 augustss * Assumes that there are no pending transactions.
2247 1.34 augustss */
2248 1.34 augustss void
2249 1.91 augustss ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2250 1.34 augustss {
2251 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2252 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2253 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
2254 1.34 augustss
2255 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2256 1.224 mrg
2257 1.34 augustss #ifdef DIAGNOSTIC
2258 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2259 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2260 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2261 1.34 augustss ohci_soft_td_t *std;
2262 1.168 augustss std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2263 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2264 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
2265 1.168 augustss (int)O32TOH(sed->ed.ed_headp),
2266 1.168 augustss (int)O32TOH(sed->ed.ed_tailp),
2267 1.34 augustss pipe, std);
2268 1.229 christos #ifdef OHCI_DEBUG
2269 1.107 augustss usbd_dump_pipe(&opipe->pipe);
2270 1.168 augustss ohci_dump_ed(sc, sed);
2271 1.106 augustss if (std)
2272 1.168 augustss ohci_dump_td(sc, std);
2273 1.106 augustss #endif
2274 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
2275 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2276 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2277 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
2278 1.34 augustss }
2279 1.34 augustss #endif
2280 1.224 mrg ohci_rem_ed(sc, sed, head);
2281 1.133 toshii /* Make sure the host controller is not touching this ED */
2282 1.133 toshii usb_delay_ms(&sc->sc_bus, 1);
2283 1.214 jakllsch pipe->endpoint->datatoggle =
2284 1.214 jakllsch (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2285 1.34 augustss ohci_free_sed(sc, opipe->sed);
2286 1.34 augustss }
2287 1.34 augustss
2288 1.120 augustss /*
2289 1.34 augustss * Abort a device request.
2290 1.34 augustss * If this routine is called at splusb() it guarantees that the request
2291 1.34 augustss * will be removed from the hardware scheduling and that the callback
2292 1.34 augustss * for it will be called with USBD_CANCELLED status.
2293 1.34 augustss * It's impossible to guarantee that the requested transfer will not
2294 1.34 augustss * have happened since the hardware runs concurrently.
2295 1.34 augustss * If the transaction has already happened we rely on the ordinary
2296 1.34 augustss * interrupt processing to process it.
2297 1.224 mrg * XXX This is most probably wrong.
2298 1.224 mrg * XXXMRG this doesn't make sense anymore.
2299 1.34 augustss */
2300 1.34 augustss void
2301 1.91 augustss ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2302 1.34 augustss {
2303 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2304 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
2305 1.106 augustss ohci_soft_ed_t *sed = opipe->sed;
2306 1.106 augustss ohci_soft_td_t *p, *n;
2307 1.106 augustss ohci_physaddr_t headp;
2308 1.224 mrg int hit;
2309 1.159 augustss int wake;
2310 1.34 augustss
2311 1.106 augustss DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2312 1.34 augustss
2313 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2314 1.224 mrg
2315 1.116 augustss if (sc->sc_dying) {
2316 1.116 augustss /* If we're dying, just do the software part. */
2317 1.116 augustss xfer->status = status; /* make software ignore it */
2318 1.224 mrg callout_halt(&xfer->timeout_handle, &sc->sc_lock);
2319 1.116 augustss usb_transfer_complete(xfer);
2320 1.170 christos return;
2321 1.116 augustss }
2322 1.116 augustss
2323 1.223 mrg if (cpu_intr_p() || cpu_softintr_p())
2324 1.128 provos panic("ohci_abort_xfer: not in process context");
2325 1.34 augustss
2326 1.106 augustss /*
2327 1.159 augustss * If an abort is already in progress then just wait for it to
2328 1.159 augustss * complete and return.
2329 1.159 augustss */
2330 1.159 augustss if (xfer->hcflags & UXFER_ABORTING) {
2331 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2332 1.159 augustss #ifdef DIAGNOSTIC
2333 1.159 augustss if (status == USBD_TIMEOUT)
2334 1.235 skrll printf("%s: TIMEOUT while aborting\n", __func__);
2335 1.159 augustss #endif
2336 1.159 augustss /* Override the status which might be USBD_TIMEOUT. */
2337 1.159 augustss xfer->status = status;
2338 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2339 1.159 augustss xfer->hcflags |= UXFER_ABORTWAIT;
2340 1.159 augustss while (xfer->hcflags & UXFER_ABORTING)
2341 1.224 mrg cv_wait(&xfer->hccv, &sc->sc_lock);
2342 1.224 mrg goto done;
2343 1.159 augustss }
2344 1.159 augustss xfer->hcflags |= UXFER_ABORTING;
2345 1.159 augustss
2346 1.159 augustss /*
2347 1.106 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2348 1.106 augustss */
2349 1.106 augustss xfer->status = status; /* make software ignore it */
2350 1.209 dyoung callout_stop(&xfer->timeout_handle);
2351 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2352 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2353 1.195 bouyer sizeof(sed->ed.ed_flags),
2354 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2355 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2356 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2357 1.195 bouyer sizeof(sed->ed.ed_flags),
2358 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2359 1.34 augustss
2360 1.120 augustss /*
2361 1.106 augustss * Step 2: Wait until we know hardware has finished any possible
2362 1.106 augustss * use of the xfer. Also make sure the soft interrupt routine
2363 1.106 augustss * has run.
2364 1.106 augustss */
2365 1.224 mrg /* Hardware finishes in 1ms */
2366 1.224 mrg usb_delay_ms_locked(opipe->pipe.device->bus, 20, &sc->sc_lock);
2367 1.119 augustss sc->sc_softwake = 1;
2368 1.119 augustss usb_schedsoftintr(&sc->sc_bus);
2369 1.224 mrg cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
2370 1.119 augustss
2371 1.120 augustss /*
2372 1.106 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2373 1.106 augustss * The complication here is that the hardware may have executed
2374 1.106 augustss * beyond the xfer we're trying to abort. So as we're scanning
2375 1.106 augustss * the TDs of this xfer we check if the hardware points to
2376 1.106 augustss * any of them.
2377 1.106 augustss */
2378 1.53 augustss p = xfer->hcpriv;
2379 1.34 augustss #ifdef DIAGNOSTIC
2380 1.55 augustss if (p == NULL) {
2381 1.159 augustss xfer->hcflags &= ~UXFER_ABORTING; /* XXX */
2382 1.106 augustss printf("ohci_abort_xfer: hcpriv is NULL\n");
2383 1.224 mrg goto done;
2384 1.38 augustss }
2385 1.34 augustss #endif
2386 1.106 augustss #ifdef OHCI_DEBUG
2387 1.106 augustss if (ohcidebug > 1) {
2388 1.106 augustss DPRINTF(("ohci_abort_xfer: sed=\n"));
2389 1.168 augustss ohci_dump_ed(sc, sed);
2390 1.168 augustss ohci_dump_tds(sc, p);
2391 1.106 augustss }
2392 1.106 augustss #endif
2393 1.168 augustss headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2394 1.106 augustss hit = 0;
2395 1.53 augustss for (; p->xfer == xfer; p = n) {
2396 1.106 augustss hit |= headp == p->physaddr;
2397 1.38 augustss n = p->nexttd;
2398 1.38 augustss ohci_free_std(sc, p);
2399 1.34 augustss }
2400 1.106 augustss /* Zap headp register if hardware pointed inside the xfer. */
2401 1.106 augustss if (hit) {
2402 1.150 mycroft DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2403 1.168 augustss (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2404 1.168 augustss sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2405 1.195 bouyer usb_syncmem(&sed->dma,
2406 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_headp),
2407 1.195 bouyer sizeof(sed->ed.ed_headp),
2408 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2409 1.106 augustss } else {
2410 1.106 augustss DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2411 1.106 augustss }
2412 1.34 augustss
2413 1.106 augustss /*
2414 1.106 augustss * Step 4: Turn on hardware again.
2415 1.106 augustss */
2416 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2417 1.195 bouyer sizeof(sed->ed.ed_flags),
2418 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2419 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2420 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2421 1.195 bouyer sizeof(sed->ed.ed_flags),
2422 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2423 1.38 augustss
2424 1.106 augustss /*
2425 1.106 augustss * Step 5: Execute callback.
2426 1.106 augustss */
2427 1.159 augustss wake = xfer->hcflags & UXFER_ABORTWAIT;
2428 1.159 augustss xfer->hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2429 1.53 augustss usb_transfer_complete(xfer);
2430 1.159 augustss if (wake)
2431 1.224 mrg cv_broadcast(&xfer->hccv);
2432 1.38 augustss
2433 1.224 mrg done:
2434 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2435 1.34 augustss }
2436 1.34 augustss
2437 1.34 augustss /*
2438 1.1 augustss * Data structures and routines to emulate the root hub.
2439 1.1 augustss */
2440 1.82 augustss Static usb_device_descriptor_t ohci_devd = {
2441 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2442 1.1 augustss UDESC_DEVICE, /* type */
2443 1.1 augustss {0x00, 0x01}, /* USB version */
2444 1.74 augustss UDCLASS_HUB, /* class */
2445 1.74 augustss UDSUBCLASS_HUB, /* subclass */
2446 1.202 uebayasi UDPROTO_FSHUB, /* protocol */
2447 1.1 augustss 64, /* max packet */
2448 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2449 1.1 augustss 1,2,0, /* string indicies */
2450 1.1 augustss 1 /* # of configurations */
2451 1.1 augustss };
2452 1.1 augustss
2453 1.182 drochner Static const usb_config_descriptor_t ohci_confd = {
2454 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2455 1.1 augustss UDESC_CONFIG,
2456 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2457 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2458 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2459 1.1 augustss 1,
2460 1.1 augustss 1,
2461 1.1 augustss 0,
2462 1.180 drochner UC_ATTR_MBO | UC_SELF_POWERED,
2463 1.1 augustss 0 /* max power */
2464 1.1 augustss };
2465 1.1 augustss
2466 1.182 drochner Static const usb_interface_descriptor_t ohci_ifcd = {
2467 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2468 1.1 augustss UDESC_INTERFACE,
2469 1.1 augustss 0,
2470 1.1 augustss 0,
2471 1.1 augustss 1,
2472 1.74 augustss UICLASS_HUB,
2473 1.74 augustss UISUBCLASS_HUB,
2474 1.109 augustss UIPROTO_FSHUB,
2475 1.1 augustss 0
2476 1.1 augustss };
2477 1.1 augustss
2478 1.182 drochner Static const usb_endpoint_descriptor_t ohci_endpd = {
2479 1.175 christos .bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
2480 1.175 christos .bDescriptorType = UDESC_ENDPOINT,
2481 1.175 christos .bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
2482 1.175 christos .bmAttributes = UE_INTERRUPT,
2483 1.175 christos .wMaxPacketSize = {8, 0}, /* max packet */
2484 1.175 christos .bInterval = 255,
2485 1.1 augustss };
2486 1.1 augustss
2487 1.182 drochner Static const usb_hub_descriptor_t ohci_hubd = {
2488 1.175 christos .bDescLength = USB_HUB_DESCRIPTOR_SIZE,
2489 1.175 christos .bDescriptorType = UDESC_HUB,
2490 1.1 augustss };
2491 1.1 augustss
2492 1.1 augustss /*
2493 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2494 1.1 augustss */
2495 1.82 augustss Static usbd_status
2496 1.91 augustss ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2497 1.1 augustss {
2498 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2499 1.53 augustss usbd_status err;
2500 1.17 augustss
2501 1.46 augustss /* Insert last in queue. */
2502 1.224 mrg mutex_enter(&sc->sc_lock);
2503 1.53 augustss err = usb_insert_transfer(xfer);
2504 1.224 mrg mutex_exit(&sc->sc_lock);
2505 1.53 augustss if (err)
2506 1.53 augustss return (err);
2507 1.46 augustss
2508 1.46 augustss /* Pipe isn't running, start first */
2509 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2510 1.17 augustss }
2511 1.17 augustss
2512 1.82 augustss Static usbd_status
2513 1.91 augustss ohci_root_ctrl_start(usbd_xfer_handle xfer)
2514 1.17 augustss {
2515 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2516 1.1 augustss usb_device_request_t *req;
2517 1.52 augustss void *buf = NULL;
2518 1.1 augustss int port, i;
2519 1.224 mrg int len, value, index, l, totlen = 0;
2520 1.1 augustss usb_port_status_t ps;
2521 1.1 augustss usb_hub_descriptor_t hubd;
2522 1.53 augustss usbd_status err;
2523 1.1 augustss u_int32_t v;
2524 1.1 augustss
2525 1.83 augustss if (sc->sc_dying)
2526 1.83 augustss return (USBD_IOERROR);
2527 1.83 augustss
2528 1.42 augustss #ifdef DIAGNOSTIC
2529 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
2530 1.1 augustss /* XXX panic */
2531 1.1 augustss return (USBD_INVAL);
2532 1.42 augustss #endif
2533 1.53 augustss req = &xfer->request;
2534 1.1 augustss
2535 1.120 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2536 1.1 augustss req->bmRequestType, req->bRequest));
2537 1.1 augustss
2538 1.1 augustss len = UGETW(req->wLength);
2539 1.1 augustss value = UGETW(req->wValue);
2540 1.1 augustss index = UGETW(req->wIndex);
2541 1.43 augustss
2542 1.43 augustss if (len != 0)
2543 1.123 augustss buf = KERNADDR(&xfer->dmabuf, 0);
2544 1.43 augustss
2545 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2546 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2547 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2548 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2549 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2550 1.120 augustss /*
2551 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2552 1.1 augustss * for the integrated root hub.
2553 1.1 augustss */
2554 1.1 augustss break;
2555 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2556 1.1 augustss if (len > 0) {
2557 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2558 1.1 augustss totlen = 1;
2559 1.1 augustss }
2560 1.1 augustss break;
2561 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2562 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2563 1.171 christos if (len == 0)
2564 1.171 christos break;
2565 1.1 augustss switch(value >> 8) {
2566 1.1 augustss case UDESC_DEVICE:
2567 1.1 augustss if ((value & 0xff) != 0) {
2568 1.53 augustss err = USBD_IOERROR;
2569 1.1 augustss goto ret;
2570 1.1 augustss }
2571 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2572 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2573 1.1 augustss memcpy(buf, &ohci_devd, l);
2574 1.1 augustss break;
2575 1.1 augustss case UDESC_CONFIG:
2576 1.1 augustss if ((value & 0xff) != 0) {
2577 1.53 augustss err = USBD_IOERROR;
2578 1.1 augustss goto ret;
2579 1.1 augustss }
2580 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2581 1.1 augustss memcpy(buf, &ohci_confd, l);
2582 1.1 augustss buf = (char *)buf + l;
2583 1.1 augustss len -= l;
2584 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2585 1.1 augustss totlen += l;
2586 1.1 augustss memcpy(buf, &ohci_ifcd, l);
2587 1.1 augustss buf = (char *)buf + l;
2588 1.1 augustss len -= l;
2589 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2590 1.1 augustss totlen += l;
2591 1.1 augustss memcpy(buf, &ohci_endpd, l);
2592 1.1 augustss break;
2593 1.1 augustss case UDESC_STRING:
2594 1.186 drochner #define sd ((usb_string_descriptor_t *)buf)
2595 1.1 augustss switch (value & 0xff) {
2596 1.152 augustss case 0: /* Language table */
2597 1.186 drochner totlen = usb_makelangtbl(sd, len);
2598 1.152 augustss break;
2599 1.1 augustss case 1: /* Vendor */
2600 1.186 drochner totlen = usb_makestrdesc(sd, len,
2601 1.186 drochner sc->sc_vendor);
2602 1.1 augustss break;
2603 1.1 augustss case 2: /* Product */
2604 1.186 drochner totlen = usb_makestrdesc(sd, len,
2605 1.186 drochner "OHCI root hub");
2606 1.1 augustss break;
2607 1.1 augustss }
2608 1.186 drochner #undef sd
2609 1.1 augustss break;
2610 1.1 augustss default:
2611 1.53 augustss err = USBD_IOERROR;
2612 1.1 augustss goto ret;
2613 1.1 augustss }
2614 1.1 augustss break;
2615 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2616 1.1 augustss if (len > 0) {
2617 1.1 augustss *(u_int8_t *)buf = 0;
2618 1.1 augustss totlen = 1;
2619 1.1 augustss }
2620 1.1 augustss break;
2621 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2622 1.1 augustss if (len > 1) {
2623 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2624 1.1 augustss totlen = 2;
2625 1.1 augustss }
2626 1.1 augustss break;
2627 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2628 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2629 1.1 augustss if (len > 1) {
2630 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2631 1.1 augustss totlen = 2;
2632 1.1 augustss }
2633 1.1 augustss break;
2634 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2635 1.1 augustss if (value >= USB_MAX_DEVICES) {
2636 1.53 augustss err = USBD_IOERROR;
2637 1.1 augustss goto ret;
2638 1.1 augustss }
2639 1.1 augustss sc->sc_addr = value;
2640 1.1 augustss break;
2641 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2642 1.1 augustss if (value != 0 && value != 1) {
2643 1.53 augustss err = USBD_IOERROR;
2644 1.1 augustss goto ret;
2645 1.1 augustss }
2646 1.1 augustss sc->sc_conf = value;
2647 1.1 augustss break;
2648 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2649 1.1 augustss break;
2650 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2651 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2652 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2653 1.53 augustss err = USBD_IOERROR;
2654 1.1 augustss goto ret;
2655 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2656 1.1 augustss break;
2657 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2658 1.1 augustss break;
2659 1.1 augustss /* Hub requests */
2660 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2661 1.1 augustss break;
2662 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2663 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2664 1.14 augustss "port=%d feature=%d\n",
2665 1.1 augustss index, value));
2666 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2667 1.53 augustss err = USBD_IOERROR;
2668 1.1 augustss goto ret;
2669 1.1 augustss }
2670 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2671 1.1 augustss switch(value) {
2672 1.1 augustss case UHF_PORT_ENABLE:
2673 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2674 1.1 augustss break;
2675 1.1 augustss case UHF_PORT_SUSPEND:
2676 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2677 1.1 augustss break;
2678 1.1 augustss case UHF_PORT_POWER:
2679 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2680 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2681 1.1 augustss break;
2682 1.1 augustss case UHF_C_PORT_CONNECTION:
2683 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2684 1.1 augustss break;
2685 1.1 augustss case UHF_C_PORT_ENABLE:
2686 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2687 1.1 augustss break;
2688 1.1 augustss case UHF_C_PORT_SUSPEND:
2689 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2690 1.1 augustss break;
2691 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2692 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2693 1.1 augustss break;
2694 1.1 augustss case UHF_C_PORT_RESET:
2695 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2696 1.1 augustss break;
2697 1.1 augustss default:
2698 1.53 augustss err = USBD_IOERROR;
2699 1.1 augustss goto ret;
2700 1.1 augustss }
2701 1.1 augustss switch(value) {
2702 1.1 augustss case UHF_C_PORT_CONNECTION:
2703 1.1 augustss case UHF_C_PORT_ENABLE:
2704 1.1 augustss case UHF_C_PORT_SUSPEND:
2705 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2706 1.1 augustss case UHF_C_PORT_RESET:
2707 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2708 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2709 1.157 mycroft ohci_rhsc_enable(sc);
2710 1.1 augustss break;
2711 1.1 augustss default:
2712 1.1 augustss break;
2713 1.1 augustss }
2714 1.1 augustss break;
2715 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2716 1.171 christos if (len == 0)
2717 1.171 christos break;
2718 1.146 toshii if ((value & 0xff) != 0) {
2719 1.53 augustss err = USBD_IOERROR;
2720 1.1 augustss goto ret;
2721 1.1 augustss }
2722 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2723 1.1 augustss hubd = ohci_hubd;
2724 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2725 1.15 augustss USETW(hubd.wHubCharacteristics,
2726 1.120 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2727 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2728 1.1 augustss /* XXX overcurrent */
2729 1.1 augustss );
2730 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2731 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2732 1.120 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2733 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
2734 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2735 1.1 augustss l = min(len, hubd.bDescLength);
2736 1.1 augustss totlen = l;
2737 1.1 augustss memcpy(buf, &hubd, l);
2738 1.1 augustss break;
2739 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2740 1.1 augustss if (len != 4) {
2741 1.53 augustss err = USBD_IOERROR;
2742 1.1 augustss goto ret;
2743 1.1 augustss }
2744 1.1 augustss memset(buf, 0, len); /* ? XXX */
2745 1.1 augustss totlen = len;
2746 1.1 augustss break;
2747 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2748 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2749 1.1 augustss index));
2750 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2751 1.53 augustss err = USBD_IOERROR;
2752 1.1 augustss goto ret;
2753 1.1 augustss }
2754 1.1 augustss if (len != 4) {
2755 1.53 augustss err = USBD_IOERROR;
2756 1.1 augustss goto ret;
2757 1.1 augustss }
2758 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2759 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2760 1.1 augustss v));
2761 1.1 augustss USETW(ps.wPortStatus, v);
2762 1.1 augustss USETW(ps.wPortChange, v >> 16);
2763 1.1 augustss l = min(len, sizeof ps);
2764 1.1 augustss memcpy(buf, &ps, l);
2765 1.1 augustss totlen = l;
2766 1.1 augustss break;
2767 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2768 1.53 augustss err = USBD_IOERROR;
2769 1.1 augustss goto ret;
2770 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2771 1.1 augustss break;
2772 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2773 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2774 1.53 augustss err = USBD_IOERROR;
2775 1.1 augustss goto ret;
2776 1.1 augustss }
2777 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2778 1.1 augustss switch(value) {
2779 1.1 augustss case UHF_PORT_ENABLE:
2780 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2781 1.1 augustss break;
2782 1.1 augustss case UHF_PORT_SUSPEND:
2783 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2784 1.1 augustss break;
2785 1.1 augustss case UHF_PORT_RESET:
2786 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2787 1.14 augustss index));
2788 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2789 1.110 augustss for (i = 0; i < 5; i++) {
2790 1.110 augustss usb_delay_ms(&sc->sc_bus,
2791 1.110 augustss USB_PORT_ROOT_RESET_DELAY);
2792 1.116 augustss if (sc->sc_dying) {
2793 1.116 augustss err = USBD_IOERROR;
2794 1.116 augustss goto ret;
2795 1.116 augustss }
2796 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2797 1.1 augustss break;
2798 1.1 augustss }
2799 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2800 1.1 augustss index, OREAD4(sc, port)));
2801 1.1 augustss break;
2802 1.1 augustss case UHF_PORT_POWER:
2803 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2804 1.14 augustss "%d\n", index));
2805 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2806 1.1 augustss break;
2807 1.1 augustss default:
2808 1.53 augustss err = USBD_IOERROR;
2809 1.1 augustss goto ret;
2810 1.1 augustss }
2811 1.1 augustss break;
2812 1.1 augustss default:
2813 1.53 augustss err = USBD_IOERROR;
2814 1.1 augustss goto ret;
2815 1.1 augustss }
2816 1.53 augustss xfer->actlen = totlen;
2817 1.53 augustss err = USBD_NORMAL_COMPLETION;
2818 1.1 augustss ret:
2819 1.53 augustss xfer->status = err;
2820 1.224 mrg mutex_enter(&sc->sc_lock);
2821 1.53 augustss usb_transfer_complete(xfer);
2822 1.224 mrg mutex_exit(&sc->sc_lock);
2823 1.1 augustss return (USBD_IN_PROGRESS);
2824 1.1 augustss }
2825 1.1 augustss
2826 1.1 augustss /* Abort a root control request. */
2827 1.82 augustss Static void
2828 1.179 christos ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2829 1.1 augustss {
2830 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2831 1.1 augustss }
2832 1.1 augustss
2833 1.1 augustss /* Close the root pipe. */
2834 1.82 augustss Static void
2835 1.179 christos ohci_root_ctrl_close(usbd_pipe_handle pipe)
2836 1.1 augustss {
2837 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2838 1.34 augustss /* Nothing to do. */
2839 1.1 augustss }
2840 1.1 augustss
2841 1.82 augustss Static usbd_status
2842 1.91 augustss ohci_root_intr_transfer(usbd_xfer_handle xfer)
2843 1.1 augustss {
2844 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2845 1.53 augustss usbd_status err;
2846 1.17 augustss
2847 1.46 augustss /* Insert last in queue. */
2848 1.224 mrg mutex_enter(&sc->sc_lock);
2849 1.53 augustss err = usb_insert_transfer(xfer);
2850 1.224 mrg mutex_exit(&sc->sc_lock);
2851 1.53 augustss if (err)
2852 1.53 augustss return (err);
2853 1.46 augustss
2854 1.46 augustss /* Pipe isn't running, start first */
2855 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2856 1.17 augustss }
2857 1.17 augustss
2858 1.82 augustss Static usbd_status
2859 1.91 augustss ohci_root_intr_start(usbd_xfer_handle xfer)
2860 1.17 augustss {
2861 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2862 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2863 1.1 augustss
2864 1.83 augustss if (sc->sc_dying)
2865 1.83 augustss return (USBD_IOERROR);
2866 1.83 augustss
2867 1.224 mrg mutex_enter(&sc->sc_lock);
2868 1.224 mrg KASSERT(sc->sc_intrxfer == NULL);
2869 1.53 augustss sc->sc_intrxfer = xfer;
2870 1.224 mrg mutex_exit(&sc->sc_lock);
2871 1.1 augustss
2872 1.1 augustss return (USBD_IN_PROGRESS);
2873 1.1 augustss }
2874 1.1 augustss
2875 1.3 augustss /* Abort a root interrupt request. */
2876 1.82 augustss Static void
2877 1.91 augustss ohci_root_intr_abort(usbd_xfer_handle xfer)
2878 1.1 augustss {
2879 1.224 mrg #ifdef DIAGNOSTIC
2880 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2881 1.224 mrg #endif
2882 1.224 mrg
2883 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2884 1.53 augustss
2885 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2886 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2887 1.53 augustss xfer->pipe->intrxfer = NULL;
2888 1.51 augustss }
2889 1.53 augustss xfer->status = USBD_CANCELLED;
2890 1.53 augustss usb_transfer_complete(xfer);
2891 1.1 augustss }
2892 1.1 augustss
2893 1.1 augustss /* Close the root pipe. */
2894 1.82 augustss Static void
2895 1.91 augustss ohci_root_intr_close(usbd_pipe_handle pipe)
2896 1.1 augustss {
2897 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2898 1.120 augustss
2899 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2900 1.224 mrg
2901 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2902 1.34 augustss
2903 1.53 augustss sc->sc_intrxfer = NULL;
2904 1.1 augustss }
2905 1.1 augustss
2906 1.1 augustss /************************/
2907 1.1 augustss
2908 1.82 augustss Static usbd_status
2909 1.91 augustss ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2910 1.1 augustss {
2911 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2912 1.53 augustss usbd_status err;
2913 1.17 augustss
2914 1.46 augustss /* Insert last in queue. */
2915 1.224 mrg mutex_enter(&sc->sc_lock);
2916 1.53 augustss err = usb_insert_transfer(xfer);
2917 1.224 mrg mutex_exit(&sc->sc_lock);
2918 1.53 augustss if (err)
2919 1.53 augustss return (err);
2920 1.46 augustss
2921 1.46 augustss /* Pipe isn't running, start first */
2922 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2923 1.17 augustss }
2924 1.17 augustss
2925 1.82 augustss Static usbd_status
2926 1.91 augustss ohci_device_ctrl_start(usbd_xfer_handle xfer)
2927 1.17 augustss {
2928 1.190 drochner ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2929 1.53 augustss usbd_status err;
2930 1.1 augustss
2931 1.83 augustss if (sc->sc_dying)
2932 1.83 augustss return (USBD_IOERROR);
2933 1.83 augustss
2934 1.42 augustss #ifdef DIAGNOSTIC
2935 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2936 1.1 augustss /* XXX panic */
2937 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2938 1.1 augustss return (USBD_INVAL);
2939 1.1 augustss }
2940 1.42 augustss #endif
2941 1.1 augustss
2942 1.224 mrg mutex_enter(&sc->sc_lock);
2943 1.53 augustss err = ohci_device_request(xfer);
2944 1.224 mrg mutex_exit(&sc->sc_lock);
2945 1.53 augustss if (err)
2946 1.53 augustss return (err);
2947 1.1 augustss
2948 1.6 augustss if (sc->sc_bus.use_polling)
2949 1.53 augustss ohci_waitintr(sc, xfer);
2950 1.1 augustss return (USBD_IN_PROGRESS);
2951 1.1 augustss }
2952 1.1 augustss
2953 1.1 augustss /* Abort a device control request. */
2954 1.82 augustss Static void
2955 1.91 augustss ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2956 1.1 augustss {
2957 1.224 mrg #ifdef DIAGNOSTIC
2958 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
2959 1.224 mrg #endif
2960 1.224 mrg
2961 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2962 1.224 mrg
2963 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2964 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2965 1.1 augustss }
2966 1.1 augustss
2967 1.1 augustss /* Close a device control pipe. */
2968 1.82 augustss Static void
2969 1.91 augustss ohci_device_ctrl_close(usbd_pipe_handle pipe)
2970 1.1 augustss {
2971 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2972 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2973 1.1 augustss
2974 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2975 1.224 mrg
2976 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2977 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2978 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2979 1.3 augustss }
2980 1.3 augustss
2981 1.3 augustss /************************/
2982 1.37 augustss
2983 1.82 augustss Static void
2984 1.91 augustss ohci_device_clear_toggle(usbd_pipe_handle pipe)
2985 1.37 augustss {
2986 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2987 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
2988 1.37 augustss
2989 1.168 augustss opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2990 1.37 augustss }
2991 1.37 augustss
2992 1.82 augustss Static void
2993 1.179 christos ohci_noop(usbd_pipe_handle pipe)
2994 1.37 augustss {
2995 1.37 augustss }
2996 1.3 augustss
2997 1.82 augustss Static usbd_status
2998 1.91 augustss ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2999 1.3 augustss {
3000 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3001 1.53 augustss usbd_status err;
3002 1.17 augustss
3003 1.46 augustss /* Insert last in queue. */
3004 1.224 mrg mutex_enter(&sc->sc_lock);
3005 1.53 augustss err = usb_insert_transfer(xfer);
3006 1.224 mrg mutex_exit(&sc->sc_lock);
3007 1.53 augustss if (err)
3008 1.53 augustss return (err);
3009 1.46 augustss
3010 1.46 augustss /* Pipe isn't running, start first */
3011 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3012 1.17 augustss }
3013 1.17 augustss
3014 1.82 augustss Static usbd_status
3015 1.91 augustss ohci_device_bulk_start(usbd_xfer_handle xfer)
3016 1.17 augustss {
3017 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3018 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
3019 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3020 1.3 augustss int addr = dev->address;
3021 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
3022 1.3 augustss ohci_soft_ed_t *sed;
3023 1.224 mrg int len, isread, endpt;
3024 1.53 augustss usbd_status err;
3025 1.3 augustss
3026 1.83 augustss if (sc->sc_dying)
3027 1.83 augustss return (USBD_IOERROR);
3028 1.83 augustss
3029 1.34 augustss #ifdef DIAGNOSTIC
3030 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
3031 1.3 augustss /* XXX panic */
3032 1.34 augustss printf("ohci_device_bulk_start: a request\n");
3033 1.3 augustss return (USBD_INVAL);
3034 1.3 augustss }
3035 1.34 augustss #endif
3036 1.3 augustss
3037 1.224 mrg mutex_enter(&sc->sc_lock);
3038 1.224 mrg
3039 1.53 augustss len = xfer->length;
3040 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3041 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3042 1.3 augustss sed = opipe->sed;
3043 1.3 augustss
3044 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
3045 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
3046 1.40 augustss endpt));
3047 1.34 augustss
3048 1.32 augustss opipe->u.bulk.isread = isread;
3049 1.3 augustss opipe->u.bulk.length = len;
3050 1.3 augustss
3051 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3052 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3053 1.3 augustss /* Update device address */
3054 1.168 augustss sed->ed.ed_flags = HTOO32(
3055 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
3056 1.16 augustss OHCI_ED_SET_FA(addr));
3057 1.3 augustss
3058 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
3059 1.60 augustss data = opipe->tail.td;
3060 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
3061 1.77 augustss data, &tail);
3062 1.236 skrll if (err)
3063 1.236 skrll return err;
3064 1.236 skrll
3065 1.77 augustss /* We want interrupt at the end of the transfer. */
3066 1.168 augustss tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
3067 1.168 augustss tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
3068 1.77 augustss tail->flags |= OHCI_CALL_DONE;
3069 1.77 augustss tail = tail->nexttd; /* point at sentinel */
3070 1.195 bouyer usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
3071 1.195 bouyer sizeof(tail->td.td_flags),
3072 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3073 1.224 mrg if (err) {
3074 1.224 mrg mutex_exit(&sc->sc_lock);
3075 1.53 augustss return (err);
3076 1.224 mrg }
3077 1.48 augustss
3078 1.53 augustss tail->xfer = NULL;
3079 1.53 augustss xfer->hcpriv = data;
3080 1.3 augustss
3081 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
3082 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
3083 1.168 augustss (int)O32TOH(sed->ed.ed_flags),
3084 1.168 augustss (int)O32TOH(data->td.td_flags),
3085 1.168 augustss (int)O32TOH(data->td.td_cbp),
3086 1.168 augustss (int)O32TOH(data->td.td_be)));
3087 1.34 augustss
3088 1.52 augustss #ifdef OHCI_DEBUG
3089 1.75 augustss if (ohcidebug > 5) {
3090 1.168 augustss ohci_dump_ed(sc, sed);
3091 1.168 augustss ohci_dump_tds(sc, data);
3092 1.34 augustss }
3093 1.34 augustss #endif
3094 1.34 augustss
3095 1.3 augustss /* Insert ED in schedule */
3096 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
3097 1.53 augustss tdp->xfer = xfer;
3098 1.48 augustss }
3099 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3100 1.60 augustss opipe->tail.td = tail;
3101 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3102 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3103 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3104 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
3105 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
3106 1.209 dyoung callout_reset(&xfer->timeout_handle, mstohz(xfer->timeout),
3107 1.80 augustss ohci_timeout, xfer);
3108 1.15 augustss }
3109 1.224 mrg mutex_exit(&sc->sc_lock);
3110 1.34 augustss
3111 1.52 augustss #if 0
3112 1.52 augustss /* This goes wrong if we are too slow. */
3113 1.75 augustss if (ohcidebug > 10) {
3114 1.75 augustss delay(10000);
3115 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3116 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3117 1.168 augustss ohci_dump_ed(sc, sed);
3118 1.168 augustss ohci_dump_tds(sc, data);
3119 1.34 augustss }
3120 1.34 augustss #endif
3121 1.34 augustss
3122 1.3 augustss return (USBD_IN_PROGRESS);
3123 1.3 augustss }
3124 1.3 augustss
3125 1.82 augustss Static void
3126 1.91 augustss ohci_device_bulk_abort(usbd_xfer_handle xfer)
3127 1.3 augustss {
3128 1.224 mrg #ifdef DIAGNOSTIC
3129 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3130 1.224 mrg #endif
3131 1.224 mrg
3132 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3133 1.224 mrg
3134 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
3135 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3136 1.3 augustss }
3137 1.3 augustss
3138 1.120 augustss /*
3139 1.34 augustss * Close a device bulk pipe.
3140 1.34 augustss */
3141 1.82 augustss Static void
3142 1.91 augustss ohci_device_bulk_close(usbd_pipe_handle pipe)
3143 1.3 augustss {
3144 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3145 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3146 1.3 augustss
3147 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3148 1.224 mrg
3149 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
3150 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
3151 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3152 1.1 augustss }
3153 1.1 augustss
3154 1.1 augustss /************************/
3155 1.1 augustss
3156 1.82 augustss Static usbd_status
3157 1.91 augustss ohci_device_intr_transfer(usbd_xfer_handle xfer)
3158 1.17 augustss {
3159 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3160 1.53 augustss usbd_status err;
3161 1.17 augustss
3162 1.46 augustss /* Insert last in queue. */
3163 1.224 mrg mutex_enter(&sc->sc_lock);
3164 1.53 augustss err = usb_insert_transfer(xfer);
3165 1.224 mrg mutex_exit(&sc->sc_lock);
3166 1.53 augustss if (err)
3167 1.53 augustss return (err);
3168 1.46 augustss
3169 1.46 augustss /* Pipe isn't running, start first */
3170 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
3171 1.17 augustss }
3172 1.17 augustss
3173 1.82 augustss Static usbd_status
3174 1.91 augustss ohci_device_intr_start(usbd_xfer_handle xfer)
3175 1.1 augustss {
3176 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3177 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
3178 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3179 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
3180 1.48 augustss ohci_soft_td_t *data, *tail;
3181 1.224 mrg int len, isread, endpt;
3182 1.1 augustss
3183 1.83 augustss if (sc->sc_dying)
3184 1.83 augustss return (USBD_IOERROR);
3185 1.83 augustss
3186 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
3187 1.14 augustss "flags=%d priv=%p\n",
3188 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
3189 1.1 augustss
3190 1.42 augustss #ifdef DIAGNOSTIC
3191 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
3192 1.128 provos panic("ohci_device_intr_transfer: a request");
3193 1.42 augustss #endif
3194 1.1 augustss
3195 1.53 augustss len = xfer->length;
3196 1.165 skrll endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
3197 1.165 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3198 1.1 augustss
3199 1.60 augustss data = opipe->tail.td;
3200 1.224 mrg mutex_enter(&sc->sc_lock);
3201 1.1 augustss tail = ohci_alloc_std(sc);
3202 1.224 mrg mutex_exit(&sc->sc_lock);
3203 1.55 augustss if (tail == NULL)
3204 1.43 augustss return (USBD_NOMEM);
3205 1.53 augustss tail->xfer = NULL;
3206 1.1 augustss
3207 1.168 augustss data->td.td_flags = HTOO32(
3208 1.165 skrll isread ? OHCI_TD_IN : OHCI_TD_OUT |
3209 1.165 skrll OHCI_TD_NOCC |
3210 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3211 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
3212 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
3213 1.168 augustss data->td.td_cbp = HTOO32(DMAADDR(&xfer->dmabuf, 0));
3214 1.48 augustss data->nexttd = tail;
3215 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
3216 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3217 1.48 augustss data->len = len;
3218 1.53 augustss data->xfer = xfer;
3219 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3220 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
3221 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3222 1.53 augustss xfer->hcpriv = data;
3223 1.1 augustss
3224 1.52 augustss #ifdef OHCI_DEBUG
3225 1.1 augustss if (ohcidebug > 5) {
3226 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
3227 1.168 augustss ohci_dump_ed(sc, sed);
3228 1.168 augustss ohci_dump_tds(sc, data);
3229 1.1 augustss }
3230 1.1 augustss #endif
3231 1.1 augustss
3232 1.1 augustss /* Insert ED in schedule */
3233 1.224 mrg mutex_enter(&sc->sc_lock);
3234 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3235 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3236 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3237 1.60 augustss opipe->tail.td = tail;
3238 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3239 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3240 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3241 1.1 augustss
3242 1.52 augustss #if 0
3243 1.52 augustss /*
3244 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
3245 1.52 augustss * because false references are followed due to the fact that the
3246 1.52 augustss * TD is gone.
3247 1.52 augustss */
3248 1.1 augustss if (ohcidebug > 5) {
3249 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock);
3250 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
3251 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
3252 1.168 augustss ohci_dump_ed(sc, sed);
3253 1.168 augustss ohci_dump_tds(sc, data);
3254 1.1 augustss }
3255 1.1 augustss #endif
3256 1.224 mrg mutex_exit(&sc->sc_lock);
3257 1.1 augustss
3258 1.1 augustss return (USBD_IN_PROGRESS);
3259 1.1 augustss }
3260 1.1 augustss
3261 1.227 skrll /* Abort a device interrupt request. */
3262 1.82 augustss Static void
3263 1.91 augustss ohci_device_intr_abort(usbd_xfer_handle xfer)
3264 1.1 augustss {
3265 1.224 mrg #ifdef DIAGNOSTIC
3266 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3267 1.224 mrg #endif
3268 1.224 mrg
3269 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3270 1.224 mrg
3271 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
3272 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
3273 1.55 augustss xfer->pipe->intrxfer = NULL;
3274 1.1 augustss }
3275 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3276 1.1 augustss }
3277 1.1 augustss
3278 1.1 augustss /* Close a device interrupt pipe. */
3279 1.82 augustss Static void
3280 1.91 augustss ohci_device_intr_close(usbd_pipe_handle pipe)
3281 1.1 augustss {
3282 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3283 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3284 1.1 augustss int nslots = opipe->u.intr.nslots;
3285 1.1 augustss int pos = opipe->u.intr.pos;
3286 1.1 augustss int j;
3287 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
3288 1.224 mrg
3289 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3290 1.1 augustss
3291 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3292 1.1 augustss pipe, nslots, pos));
3293 1.195 bouyer usb_syncmem(&sed->dma, sed->offs,
3294 1.195 bouyer sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3295 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3296 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3297 1.195 bouyer sizeof(sed->ed.ed_flags),
3298 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3299 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3300 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3301 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
3302 1.1 augustss
3303 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3304 1.172 christos continue;
3305 1.53 augustss #ifdef DIAGNOSTIC
3306 1.173 christos if (p == NULL)
3307 1.128 provos panic("ohci_device_intr_close: ED not found");
3308 1.53 augustss #endif
3309 1.173 christos p->next = sed->next;
3310 1.173 christos p->ed.ed_nexted = sed->ed.ed_nexted;
3311 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3312 1.195 bouyer sizeof(p->ed.ed_nexted),
3313 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3314 1.1 augustss
3315 1.1 augustss for (j = 0; j < nslots; j++)
3316 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3317 1.1 augustss
3318 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3319 1.1 augustss ohci_free_sed(sc, opipe->sed);
3320 1.1 augustss }
3321 1.1 augustss
3322 1.82 augustss Static usbd_status
3323 1.91 augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3324 1.1 augustss {
3325 1.224 mrg int i, j, best;
3326 1.1 augustss u_int npoll, slow, shigh, nslots;
3327 1.1 augustss u_int bestbw, bw;
3328 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
3329 1.1 augustss
3330 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3331 1.1 augustss if (ival == 0) {
3332 1.1 augustss printf("ohci_setintr: 0 interval\n");
3333 1.1 augustss return (USBD_INVAL);
3334 1.1 augustss }
3335 1.1 augustss
3336 1.1 augustss npoll = OHCI_NO_INTRS;
3337 1.1 augustss while (npoll > ival)
3338 1.1 augustss npoll /= 2;
3339 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3340 1.1 augustss
3341 1.1 augustss /*
3342 1.1 augustss * We now know which level in the tree the ED must go into.
3343 1.1 augustss * Figure out which slot has most bandwidth left over.
3344 1.1 augustss * Slots to examine:
3345 1.1 augustss * npoll
3346 1.1 augustss * 1 0
3347 1.1 augustss * 2 1 2
3348 1.1 augustss * 4 3 4 5 6
3349 1.1 augustss * 8 7 8 9 10 11 12 13 14
3350 1.1 augustss * N (N-1) .. (N-1+N-1)
3351 1.1 augustss */
3352 1.1 augustss slow = npoll-1;
3353 1.1 augustss shigh = slow + npoll;
3354 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
3355 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3356 1.1 augustss bw = 0;
3357 1.1 augustss for (j = 0; j < nslots; j++)
3358 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3359 1.1 augustss if (bw < bestbw) {
3360 1.1 augustss best = i;
3361 1.1 augustss bestbw = bw;
3362 1.1 augustss }
3363 1.1 augustss }
3364 1.120 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3365 1.1 augustss best, slow, shigh, bestbw));
3366 1.1 augustss
3367 1.224 mrg mutex_enter(&sc->sc_lock);
3368 1.1 augustss hsed = sc->sc_eds[best];
3369 1.1 augustss sed->next = hsed->next;
3370 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3371 1.195 bouyer sizeof(hsed->ed.ed_flags),
3372 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3373 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
3374 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3375 1.195 bouyer sizeof(sed->ed.ed_flags),
3376 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3377 1.1 augustss hsed->next = sed;
3378 1.168 augustss hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3379 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3380 1.195 bouyer sizeof(hsed->ed.ed_flags),
3381 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3382 1.224 mrg mutex_exit(&sc->sc_lock);
3383 1.1 augustss
3384 1.1 augustss for (j = 0; j < nslots; j++)
3385 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3386 1.1 augustss opipe->u.intr.nslots = nslots;
3387 1.1 augustss opipe->u.intr.pos = best;
3388 1.1 augustss
3389 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3390 1.1 augustss return (USBD_NORMAL_COMPLETION);
3391 1.60 augustss }
3392 1.60 augustss
3393 1.60 augustss /***********************/
3394 1.60 augustss
3395 1.60 augustss usbd_status
3396 1.91 augustss ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3397 1.60 augustss {
3398 1.224 mrg ohci_softc_t *sc = xfer->pipe->device->bus->hci_private;
3399 1.60 augustss usbd_status err;
3400 1.60 augustss
3401 1.60 augustss DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3402 1.60 augustss
3403 1.60 augustss /* Put it on our queue, */
3404 1.224 mrg mutex_enter(&sc->sc_lock);
3405 1.60 augustss err = usb_insert_transfer(xfer);
3406 1.224 mrg mutex_exit(&sc->sc_lock);
3407 1.60 augustss
3408 1.60 augustss /* bail out on error, */
3409 1.60 augustss if (err && err != USBD_IN_PROGRESS)
3410 1.60 augustss return (err);
3411 1.60 augustss
3412 1.60 augustss /* XXX should check inuse here */
3413 1.60 augustss
3414 1.60 augustss /* insert into schedule, */
3415 1.60 augustss ohci_device_isoc_enter(xfer);
3416 1.60 augustss
3417 1.83 augustss /* and start if the pipe wasn't running */
3418 1.60 augustss if (!err)
3419 1.60 augustss ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
3420 1.60 augustss
3421 1.60 augustss return (err);
3422 1.60 augustss }
3423 1.60 augustss
3424 1.60 augustss void
3425 1.91 augustss ohci_device_isoc_enter(usbd_xfer_handle xfer)
3426 1.60 augustss {
3427 1.61 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3428 1.61 augustss usbd_device_handle dev = opipe->pipe.device;
3429 1.190 drochner ohci_softc_t *sc = dev->bus->hci_private;
3430 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
3431 1.61 augustss struct iso *iso = &opipe->u.iso;
3432 1.120 augustss ohci_soft_itd_t *sitd, *nsitd;
3433 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
3434 1.61 augustss int i, ncur, nframes;
3435 1.61 augustss
3436 1.83 augustss DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3437 1.83 augustss "nframes=%d\n",
3438 1.83 augustss iso->inuse, iso->next, xfer, xfer->nframes));
3439 1.83 augustss
3440 1.83 augustss if (sc->sc_dying)
3441 1.83 augustss return;
3442 1.83 augustss
3443 1.83 augustss if (iso->next == -1) {
3444 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
3445 1.168 augustss iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3446 1.120 augustss DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3447 1.83 augustss iso->next));
3448 1.83 augustss }
3449 1.83 augustss
3450 1.61 augustss sitd = opipe->tail.itd;
3451 1.125 augustss buf = DMAADDR(&xfer->dmabuf, 0);
3452 1.83 augustss bp0 = OHCI_PAGE(buf);
3453 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
3454 1.61 augustss nframes = xfer->nframes;
3455 1.83 augustss xfer->hcpriv = sitd;
3456 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
3457 1.83 augustss noffs = offs + xfer->frlengths[i];
3458 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3459 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3460 1.120 augustss
3461 1.83 augustss /* Allocate next ITD */
3462 1.224 mrg mutex_enter(&sc->sc_lock);
3463 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3464 1.224 mrg mutex_exit(&sc->sc_lock);
3465 1.61 augustss if (nsitd == NULL) {
3466 1.61 augustss /* XXX what now? */
3467 1.83 augustss printf("%s: isoc TD alloc failed\n",
3468 1.190 drochner device_xname(sc->sc_dev));
3469 1.61 augustss return;
3470 1.61 augustss }
3471 1.83 augustss
3472 1.83 augustss /* Fill current ITD */
3473 1.168 augustss sitd->itd.itd_flags = HTOO32(
3474 1.120 augustss OHCI_ITD_NOCC |
3475 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3476 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
3477 1.83 augustss OHCI_ITD_SET_FC(ncur));
3478 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3479 1.83 augustss sitd->nextitd = nsitd;
3480 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3481 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3482 1.83 augustss sitd->xfer = xfer;
3483 1.83 augustss sitd->flags = 0;
3484 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3485 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3486 1.83 augustss
3487 1.61 augustss sitd = nsitd;
3488 1.120 augustss iso->next = iso->next + ncur;
3489 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
3490 1.61 augustss ncur = 0;
3491 1.61 augustss }
3492 1.168 augustss sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3493 1.83 augustss offs = noffs;
3494 1.61 augustss }
3495 1.224 mrg mutex_enter(&sc->sc_lock);
3496 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3497 1.224 mrg mutex_exit(&sc->sc_lock);
3498 1.61 augustss if (nsitd == NULL) {
3499 1.61 augustss /* XXX what now? */
3500 1.120 augustss printf("%s: isoc TD alloc failed\n",
3501 1.190 drochner device_xname(sc->sc_dev));
3502 1.61 augustss return;
3503 1.61 augustss }
3504 1.83 augustss /* Fixup last used ITD */
3505 1.168 augustss sitd->itd.itd_flags = HTOO32(
3506 1.120 augustss OHCI_ITD_NOCC |
3507 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3508 1.61 augustss OHCI_ITD_SET_DI(0) |
3509 1.61 augustss OHCI_ITD_SET_FC(ncur));
3510 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3511 1.83 augustss sitd->nextitd = nsitd;
3512 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3513 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3514 1.83 augustss sitd->xfer = xfer;
3515 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3516 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3517 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3518 1.83 augustss
3519 1.61 augustss iso->next = iso->next + ncur;
3520 1.83 augustss iso->inuse += nframes;
3521 1.83 augustss
3522 1.83 augustss xfer->actlen = offs; /* XXX pretend we did it all */
3523 1.83 augustss
3524 1.83 augustss xfer->status = USBD_IN_PROGRESS;
3525 1.83 augustss
3526 1.83 augustss #ifdef OHCI_DEBUG
3527 1.83 augustss if (ohcidebug > 5) {
3528 1.83 augustss DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3529 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3530 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3531 1.168 augustss ohci_dump_ed(sc, sed);
3532 1.83 augustss }
3533 1.83 augustss #endif
3534 1.61 augustss
3535 1.224 mrg mutex_enter(&sc->sc_lock);
3536 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3537 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3538 1.168 augustss sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3539 1.61 augustss opipe->tail.itd = nsitd;
3540 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3541 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3542 1.195 bouyer sizeof(sed->ed.ed_flags),
3543 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3544 1.224 mrg mutex_exit(&sc->sc_lock);
3545 1.83 augustss
3546 1.83 augustss #ifdef OHCI_DEBUG
3547 1.83 augustss if (ohcidebug > 5) {
3548 1.83 augustss delay(150000);
3549 1.83 augustss DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3550 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3551 1.168 augustss ohci_dump_itds(sc, xfer->hcpriv);
3552 1.168 augustss ohci_dump_ed(sc, sed);
3553 1.83 augustss }
3554 1.83 augustss #endif
3555 1.60 augustss }
3556 1.60 augustss
3557 1.60 augustss usbd_status
3558 1.91 augustss ohci_device_isoc_start(usbd_xfer_handle xfer)
3559 1.60 augustss {
3560 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3561 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3562 1.83 augustss
3563 1.83 augustss DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3564 1.83 augustss
3565 1.224 mrg mutex_enter(&sc->sc_lock);
3566 1.224 mrg
3567 1.224 mrg if (sc->sc_dying) {
3568 1.224 mrg mutex_exit(&sc->sc_lock);
3569 1.83 augustss return (USBD_IOERROR);
3570 1.224 mrg }
3571 1.83 augustss
3572 1.83 augustss #ifdef DIAGNOSTIC
3573 1.83 augustss if (xfer->status != USBD_IN_PROGRESS)
3574 1.121 tsutsui printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3575 1.83 augustss #endif
3576 1.83 augustss
3577 1.83 augustss /* XXX anything to do? */
3578 1.83 augustss
3579 1.224 mrg mutex_exit(&sc->sc_lock);
3580 1.224 mrg
3581 1.83 augustss return (USBD_IN_PROGRESS);
3582 1.60 augustss }
3583 1.60 augustss
3584 1.60 augustss void
3585 1.91 augustss ohci_device_isoc_abort(usbd_xfer_handle xfer)
3586 1.60 augustss {
3587 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3588 1.190 drochner ohci_softc_t *sc = opipe->pipe.device->bus->hci_private;
3589 1.83 augustss ohci_soft_ed_t *sed;
3590 1.83 augustss ohci_soft_itd_t *sitd;
3591 1.83 augustss
3592 1.224 mrg DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p lock=%p\n", xfer, &sc->sc_lock));
3593 1.83 augustss
3594 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3595 1.83 augustss
3596 1.83 augustss /* Transfer is already done. */
3597 1.120 augustss if (xfer->status != USBD_NOT_STARTED &&
3598 1.83 augustss xfer->status != USBD_IN_PROGRESS) {
3599 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3600 1.224 mrg goto done;
3601 1.83 augustss }
3602 1.83 augustss
3603 1.83 augustss /* Give xfer the requested abort code. */
3604 1.83 augustss xfer->status = USBD_CANCELLED;
3605 1.83 augustss
3606 1.83 augustss sed = opipe->sed;
3607 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3608 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3609 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3610 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3611 1.195 bouyer sizeof(sed->ed.ed_flags),
3612 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3613 1.83 augustss
3614 1.83 augustss sitd = xfer->hcpriv;
3615 1.83 augustss #ifdef DIAGNOSTIC
3616 1.83 augustss if (sitd == NULL) {
3617 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3618 1.224 mrg goto done;
3619 1.83 augustss }
3620 1.83 augustss #endif
3621 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3622 1.83 augustss #ifdef DIAGNOSTIC
3623 1.83 augustss DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3624 1.83 augustss sitd->isdone = 1;
3625 1.83 augustss #endif
3626 1.83 augustss }
3627 1.83 augustss
3628 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
3629 1.83 augustss
3630 1.83 augustss /* Run callback. */
3631 1.83 augustss usb_transfer_complete(xfer);
3632 1.83 augustss
3633 1.168 augustss sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3634 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3635 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3636 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3637 1.83 augustss
3638 1.224 mrg done:
3639 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3640 1.60 augustss }
3641 1.60 augustss
3642 1.60 augustss void
3643 1.179 christos ohci_device_isoc_done(usbd_xfer_handle xfer)
3644 1.60 augustss {
3645 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3646 1.60 augustss }
3647 1.60 augustss
3648 1.60 augustss usbd_status
3649 1.91 augustss ohci_setup_isoc(usbd_pipe_handle pipe)
3650 1.60 augustss {
3651 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3652 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3653 1.60 augustss struct iso *iso = &opipe->u.iso;
3654 1.60 augustss
3655 1.60 augustss iso->next = -1;
3656 1.60 augustss iso->inuse = 0;
3657 1.60 augustss
3658 1.224 mrg mutex_enter(&sc->sc_lock);
3659 1.168 augustss ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3660 1.224 mrg mutex_exit(&sc->sc_lock);
3661 1.83 augustss
3662 1.60 augustss return (USBD_NORMAL_COMPLETION);
3663 1.60 augustss }
3664 1.60 augustss
3665 1.60 augustss void
3666 1.91 augustss ohci_device_isoc_close(usbd_pipe_handle pipe)
3667 1.60 augustss {
3668 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3669 1.190 drochner ohci_softc_t *sc = pipe->device->bus->hci_private;
3670 1.60 augustss
3671 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3672 1.224 mrg
3673 1.60 augustss DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3674 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3675 1.83 augustss #ifdef DIAGNOSTIC
3676 1.83 augustss opipe->tail.itd->isdone = 1;
3677 1.83 augustss #endif
3678 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3679 1.1 augustss }
3680