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ohci.c revision 1.254.2.10
      1  1.254.2.10     skrll /*	$NetBSD: ohci.c,v 1.254.2.10 2014/12/03 22:40:55 skrll Exp $	*/
      2         1.1  augustss 
      3         1.1  augustss /*
      4       1.224       mrg  * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
      5         1.1  augustss  * All rights reserved.
      6         1.1  augustss  *
      7        1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8        1.89  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9       1.224       mrg  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10       1.224       mrg  * and Matthew R. Green (mrg (at) eterna.com.au).
     11       1.157   mycroft  * This code is derived from software contributed to The NetBSD Foundation
     12       1.157   mycroft  * by Charles M. Hannum.
     13         1.1  augustss  *
     14         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     15         1.1  augustss  * modification, are permitted provided that the following conditions
     16         1.1  augustss  * are met:
     17         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     18         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     19         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     20         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     21         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     22         1.1  augustss  *
     23         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     34         1.1  augustss  */
     35         1.1  augustss 
     36         1.1  augustss /*
     37         1.1  augustss  * USB Open Host Controller driver.
     38         1.1  augustss  *
     39        1.96  augustss  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
     40       1.201  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     41         1.1  augustss  */
     42       1.108     lukem 
     43       1.108     lukem #include <sys/cdefs.h>
     44  1.254.2.10     skrll __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.10 2014/12/03 22:40:55 skrll Exp $");
     45         1.1  augustss 
     46         1.1  augustss #include <sys/param.h>
     47         1.1  augustss #include <sys/systm.h>
     48       1.224       mrg #include <sys/kmem.h>
     49        1.55  augustss #include <sys/kernel.h>
     50         1.1  augustss #include <sys/device.h>
     51        1.55  augustss #include <sys/select.h>
     52         1.1  augustss #include <sys/proc.h>
     53         1.1  augustss #include <sys/queue.h>
     54       1.223       mrg #include <sys/cpu.h>
     55         1.1  augustss 
     56        1.16  augustss #include <machine/endian.h>
     57         1.4  augustss 
     58         1.1  augustss #include <dev/usb/usb.h>
     59         1.1  augustss #include <dev/usb/usbdi.h>
     60         1.1  augustss #include <dev/usb/usbdivar.h>
     61        1.38  augustss #include <dev/usb/usb_mem.h>
     62         1.1  augustss #include <dev/usb/usb_quirks.h>
     63         1.1  augustss 
     64         1.1  augustss #include <dev/usb/ohcireg.h>
     65         1.1  augustss #include <dev/usb/ohcivar.h>
     66       1.186  drochner #include <dev/usb/usbroothub_subr.h>
     67         1.1  augustss 
     68         1.1  augustss 
     69        1.36  augustss 
     70        1.52  augustss #ifdef OHCI_DEBUG
     71       1.209    dyoung #define DPRINTF(x)	if (ohcidebug) printf x
     72       1.209    dyoung #define DPRINTFN(n,x)	if (ohcidebug>(n)) printf x
     73        1.52  augustss int ohcidebug = 0;
     74        1.52  augustss #else
     75        1.52  augustss #define DPRINTF(x)
     76        1.52  augustss #define DPRINTFN(n,x)
     77        1.52  augustss #endif
     78        1.52  augustss 
     79        1.16  augustss #if BYTE_ORDER == BIG_ENDIAN
     80       1.169      tron #define	SWAP_ENDIAN	OHCI_LITTLE_ENDIAN
     81        1.16  augustss #else
     82       1.169      tron #define	SWAP_ENDIAN	OHCI_BIG_ENDIAN
     83        1.16  augustss #endif
     84        1.16  augustss 
     85       1.169      tron #define	O16TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
     86       1.169      tron #define	O32TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
     87       1.169      tron #define	HTOO16(val)	O16TOH(val)
     88       1.169      tron #define	HTOO32(val)	O32TOH(val)
     89       1.168  augustss 
     90         1.1  augustss struct ohci_pipe;
     91         1.1  augustss 
     92        1.91  augustss Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
     93        1.91  augustss Static void		ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
     94         1.1  augustss 
     95        1.91  augustss Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
     96        1.91  augustss Static void		ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
     97         1.1  augustss 
     98        1.91  augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
     99        1.91  augustss Static void		ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
    100        1.60  augustss 
    101        1.91  augustss Static void		ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
    102        1.91  augustss 					    ohci_soft_td_t *);
    103        1.91  augustss Static usbd_status	ohci_alloc_std_chain(struct ohci_pipe *,
    104        1.77  augustss 			    ohci_softc_t *, int, int, usbd_xfer_handle,
    105        1.91  augustss 			    ohci_soft_td_t *, ohci_soft_td_t **);
    106        1.53  augustss 
    107        1.91  augustss Static usbd_status	ohci_open(usbd_pipe_handle);
    108        1.91  augustss Static void		ohci_poll(struct usbd_bus *);
    109        1.99  augustss Static void		ohci_softintr(void *);
    110        1.91  augustss Static void		ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
    111        1.91  augustss Static void		ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
    112       1.224       mrg Static void		ohci_rhsc_softint(void *arg);
    113        1.91  augustss 
    114        1.91  augustss Static usbd_status	ohci_device_request(usbd_xfer_handle xfer);
    115       1.168  augustss Static void		ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
    116       1.168  augustss 			    ohci_soft_ed_t *);
    117       1.168  augustss 
    118       1.224       mrg Static void		ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
    119       1.224       mrg 				    ohci_soft_ed_t *);
    120        1.91  augustss Static void		ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
    121        1.91  augustss Static void		ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
    122        1.91  augustss Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
    123        1.91  augustss Static void		ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
    124        1.91  augustss Static void		ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
    125        1.91  augustss Static ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
    126        1.91  augustss 
    127        1.91  augustss Static usbd_status	ohci_setup_isoc(usbd_pipe_handle pipe);
    128        1.91  augustss Static void		ohci_device_isoc_enter(usbd_xfer_handle);
    129        1.91  augustss 
    130        1.91  augustss Static usbd_xfer_handle	ohci_allocx(struct usbd_bus *);
    131        1.91  augustss Static void		ohci_freex(struct usbd_bus *, usbd_xfer_handle);
    132       1.224       mrg Static void		ohci_get_lock(struct usbd_bus *, kmutex_t **);
    133        1.91  augustss 
    134        1.91  augustss Static usbd_status	ohci_root_ctrl_transfer(usbd_xfer_handle);
    135        1.91  augustss Static usbd_status	ohci_root_ctrl_start(usbd_xfer_handle);
    136        1.91  augustss Static void		ohci_root_ctrl_abort(usbd_xfer_handle);
    137        1.91  augustss Static void		ohci_root_ctrl_close(usbd_pipe_handle);
    138        1.91  augustss Static void		ohci_root_ctrl_done(usbd_xfer_handle);
    139        1.91  augustss 
    140        1.91  augustss Static usbd_status	ohci_root_intr_transfer(usbd_xfer_handle);
    141        1.91  augustss Static usbd_status	ohci_root_intr_start(usbd_xfer_handle);
    142        1.91  augustss Static void		ohci_root_intr_abort(usbd_xfer_handle);
    143        1.91  augustss Static void		ohci_root_intr_close(usbd_pipe_handle);
    144        1.91  augustss Static void		ohci_root_intr_done(usbd_xfer_handle);
    145        1.91  augustss 
    146        1.91  augustss Static usbd_status	ohci_device_ctrl_transfer(usbd_xfer_handle);
    147        1.91  augustss Static usbd_status	ohci_device_ctrl_start(usbd_xfer_handle);
    148        1.91  augustss Static void		ohci_device_ctrl_abort(usbd_xfer_handle);
    149        1.91  augustss Static void		ohci_device_ctrl_close(usbd_pipe_handle);
    150        1.91  augustss Static void		ohci_device_ctrl_done(usbd_xfer_handle);
    151        1.91  augustss 
    152        1.91  augustss Static usbd_status	ohci_device_bulk_transfer(usbd_xfer_handle);
    153        1.91  augustss Static usbd_status	ohci_device_bulk_start(usbd_xfer_handle);
    154        1.91  augustss Static void		ohci_device_bulk_abort(usbd_xfer_handle);
    155        1.91  augustss Static void		ohci_device_bulk_close(usbd_pipe_handle);
    156        1.91  augustss Static void		ohci_device_bulk_done(usbd_xfer_handle);
    157        1.91  augustss 
    158        1.91  augustss Static usbd_status	ohci_device_intr_transfer(usbd_xfer_handle);
    159        1.91  augustss Static usbd_status	ohci_device_intr_start(usbd_xfer_handle);
    160        1.91  augustss Static void		ohci_device_intr_abort(usbd_xfer_handle);
    161        1.91  augustss Static void		ohci_device_intr_close(usbd_pipe_handle);
    162        1.91  augustss Static void		ohci_device_intr_done(usbd_xfer_handle);
    163        1.91  augustss 
    164        1.91  augustss Static usbd_status	ohci_device_isoc_transfer(usbd_xfer_handle);
    165        1.91  augustss Static usbd_status	ohci_device_isoc_start(usbd_xfer_handle);
    166        1.91  augustss Static void		ohci_device_isoc_abort(usbd_xfer_handle);
    167        1.91  augustss Static void		ohci_device_isoc_close(usbd_pipe_handle);
    168        1.91  augustss Static void		ohci_device_isoc_done(usbd_xfer_handle);
    169        1.91  augustss 
    170       1.120  augustss Static usbd_status	ohci_device_setintr(ohci_softc_t *sc,
    171        1.91  augustss 			    struct ohci_pipe *pipe, int ival);
    172        1.91  augustss 
    173        1.91  augustss Static void		ohci_timeout(void *);
    174       1.114  augustss Static void		ohci_timeout_task(void *);
    175       1.104  augustss Static void		ohci_rhsc_enable(void *);
    176        1.91  augustss 
    177        1.91  augustss Static void		ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
    178        1.91  augustss Static void		ohci_abort_xfer(usbd_xfer_handle, usbd_status);
    179        1.53  augustss 
    180        1.91  augustss Static void		ohci_device_clear_toggle(usbd_pipe_handle pipe);
    181        1.91  augustss Static void		ohci_noop(usbd_pipe_handle pipe);
    182        1.37  augustss 
    183        1.52  augustss #ifdef OHCI_DEBUG
    184        1.91  augustss Static void		ohci_dumpregs(ohci_softc_t *);
    185       1.168  augustss Static void		ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
    186       1.168  augustss Static void		ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
    187       1.168  augustss Static void		ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
    188       1.168  augustss Static void		ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
    189       1.168  augustss Static void		ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
    190         1.1  augustss #endif
    191         1.1  augustss 
    192        1.88  augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    193        1.88  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    194        1.88  augustss #define OWRITE1(sc, r, x) \
    195        1.88  augustss  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    196        1.88  augustss #define OWRITE2(sc, r, x) \
    197        1.88  augustss  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    198        1.88  augustss #define OWRITE4(sc, r, x) \
    199        1.88  augustss  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    200       1.174       mrg 
    201       1.174       mrg static __inline uint32_t
    202       1.174       mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
    203       1.174       mrg {
    204       1.174       mrg 
    205       1.174       mrg 	OBARR(sc);
    206       1.174       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    207       1.174       mrg }
    208         1.1  augustss 
    209         1.1  augustss /* Reverse the bits in a value 0 .. 31 */
    210   1.254.2.1     skrll Static uint8_t revbits[OHCI_NO_INTRS] =
    211         1.1  augustss   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
    212         1.1  augustss     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
    213         1.1  augustss     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
    214         1.1  augustss     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
    215         1.1  augustss 
    216         1.1  augustss struct ohci_pipe {
    217         1.1  augustss 	struct usbd_pipe pipe;
    218         1.1  augustss 	ohci_soft_ed_t *sed;
    219        1.60  augustss 	union {
    220        1.60  augustss 		ohci_soft_td_t *td;
    221        1.60  augustss 		ohci_soft_itd_t *itd;
    222        1.60  augustss 	} tail;
    223         1.1  augustss 	/* Info needed for different pipe kinds. */
    224         1.1  augustss 	union {
    225         1.1  augustss 		/* Control pipe */
    226         1.1  augustss 		struct {
    227         1.4  augustss 			usb_dma_t reqdma;
    228         1.1  augustss 			u_int length;
    229        1.48  augustss 			ohci_soft_td_t *setup, *data, *stat;
    230         1.1  augustss 		} ctl;
    231         1.1  augustss 		/* Interrupt pipe */
    232         1.1  augustss 		struct {
    233         1.1  augustss 			int nslots;
    234         1.1  augustss 			int pos;
    235         1.1  augustss 		} intr;
    236         1.3  augustss 		/* Bulk pipe */
    237         1.3  augustss 		struct {
    238         1.3  augustss 			u_int length;
    239        1.32  augustss 			int isread;
    240         1.3  augustss 		} bulk;
    241        1.43  augustss 		/* Iso pipe */
    242        1.43  augustss 		struct iso {
    243        1.60  augustss 			int next, inuse;
    244        1.43  augustss 		} iso;
    245         1.1  augustss 	} u;
    246         1.1  augustss };
    247         1.1  augustss 
    248         1.1  augustss #define OHCI_INTR_ENDPT 1
    249         1.1  augustss 
    250       1.182  drochner Static const struct usbd_bus_methods ohci_bus_methods = {
    251   1.254.2.5     skrll 	.ubm_open =	ohci_open,
    252   1.254.2.5     skrll 	.ubm_softint =	ohci_softintr,
    253   1.254.2.5     skrll 	.ubm_dopoll =	ohci_poll,
    254   1.254.2.5     skrll 	.ubm_allocx =	ohci_allocx,
    255   1.254.2.5     skrll 	.ubm_freex =	ohci_freex,
    256   1.254.2.5     skrll 	.ubm_getlock =	ohci_get_lock,
    257   1.254.2.5     skrll 	.ubm_newdev =	NULL,
    258        1.42  augustss };
    259        1.42  augustss 
    260       1.182  drochner Static const struct usbd_pipe_methods ohci_root_ctrl_methods = {
    261   1.254.2.5     skrll 	.upm_transfer =	ohci_root_ctrl_transfer,
    262   1.254.2.5     skrll 	.upm_start =	ohci_root_ctrl_start,
    263   1.254.2.5     skrll 	.upm_abort =	ohci_root_ctrl_abort,
    264   1.254.2.5     skrll 	.upm_close =	ohci_root_ctrl_close,
    265   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_noop,
    266   1.254.2.5     skrll 	.upm_done =	ohci_root_ctrl_done,
    267         1.1  augustss };
    268         1.1  augustss 
    269       1.182  drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
    270   1.254.2.5     skrll 	.upm_transfer =	ohci_root_intr_transfer,
    271   1.254.2.5     skrll 	.upm_start =	ohci_root_intr_start,
    272   1.254.2.5     skrll 	.upm_abort =	ohci_root_intr_abort,
    273   1.254.2.5     skrll 	.upm_close =	ohci_root_intr_close,
    274   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_noop,
    275   1.254.2.5     skrll 	.upm_done =	ohci_root_intr_done,
    276         1.1  augustss };
    277         1.1  augustss 
    278       1.182  drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
    279   1.254.2.5     skrll 	.upm_transfer =	ohci_device_ctrl_transfer,
    280   1.254.2.5     skrll 	.upm_start =	ohci_device_ctrl_start,
    281   1.254.2.5     skrll 	.upm_abort =	ohci_device_ctrl_abort,
    282   1.254.2.5     skrll 	.upm_close =	ohci_device_ctrl_close,
    283   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_noop,
    284   1.254.2.5     skrll 	.upm_done =	ohci_device_ctrl_done,
    285         1.1  augustss };
    286         1.1  augustss 
    287       1.182  drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
    288   1.254.2.5     skrll 	.upm_transfer =	ohci_device_intr_transfer,
    289   1.254.2.5     skrll 	.upm_start =	ohci_device_intr_start,
    290   1.254.2.5     skrll 	.upm_abort =	ohci_device_intr_abort,
    291   1.254.2.5     skrll 	.upm_close =	ohci_device_intr_close,
    292   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_device_clear_toggle,
    293   1.254.2.5     skrll 	.upm_done =	ohci_device_intr_done,
    294         1.1  augustss };
    295         1.1  augustss 
    296       1.182  drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
    297   1.254.2.5     skrll 	.upm_transfer =	ohci_device_bulk_transfer,
    298   1.254.2.5     skrll 	.upm_start =	ohci_device_bulk_start,
    299   1.254.2.5     skrll 	.upm_abort =	ohci_device_bulk_abort,
    300   1.254.2.5     skrll 	.upm_close =	ohci_device_bulk_close,
    301   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_device_clear_toggle,
    302   1.254.2.5     skrll 	.upm_done =	ohci_device_bulk_done,
    303         1.3  augustss };
    304         1.3  augustss 
    305       1.182  drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
    306   1.254.2.5     skrll 	.upm_transfer =	ohci_device_isoc_transfer,
    307   1.254.2.5     skrll 	.upm_start =	ohci_device_isoc_start,
    308   1.254.2.5     skrll 	.upm_abort =	ohci_device_isoc_abort,
    309   1.254.2.5     skrll 	.upm_close =	ohci_device_isoc_close,
    310   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_noop,
    311   1.254.2.5     skrll 	.upm_done =	ohci_device_isoc_done,
    312        1.43  augustss };
    313        1.43  augustss 
    314        1.47  augustss int
    315       1.189    dyoung ohci_activate(device_t self, enum devact act)
    316        1.47  augustss {
    317       1.189    dyoung 	struct ohci_softc *sc = device_private(self);
    318        1.47  augustss 
    319        1.47  augustss 	switch (act) {
    320        1.47  augustss 	case DVACT_DEACTIVATE:
    321       1.183  kiyohara 		sc->sc_dying = 1;
    322       1.203    dyoung 		return 0;
    323       1.203    dyoung 	default:
    324       1.203    dyoung 		return EOPNOTSUPP;
    325        1.47  augustss 	}
    326        1.47  augustss }
    327        1.47  augustss 
    328       1.187    dyoung void
    329       1.187    dyoung ohci_childdet(device_t self, device_t child)
    330       1.187    dyoung {
    331       1.187    dyoung 	struct ohci_softc *sc = device_private(self);
    332       1.187    dyoung 
    333       1.187    dyoung 	KASSERT(sc->sc_child == child);
    334       1.187    dyoung 	sc->sc_child = NULL;
    335       1.187    dyoung }
    336       1.187    dyoung 
    337        1.47  augustss int
    338        1.91  augustss ohci_detach(struct ohci_softc *sc, int flags)
    339        1.47  augustss {
    340        1.47  augustss 	int rv = 0;
    341        1.47  augustss 
    342        1.47  augustss 	if (sc->sc_child != NULL)
    343        1.47  augustss 		rv = config_detach(sc->sc_child, flags);
    344       1.120  augustss 
    345        1.47  augustss 	if (rv != 0)
    346        1.47  augustss 		return (rv);
    347        1.47  augustss 
    348       1.254     ozaki 	callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock);
    349       1.104  augustss 
    350       1.116  augustss 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
    351       1.209    dyoung 	callout_destroy(&sc->sc_tmo_rhsc);
    352       1.116  augustss 
    353       1.224       mrg 	softint_disestablish(sc->sc_rhsc_si);
    354       1.224       mrg 
    355       1.224       mrg 	cv_destroy(&sc->sc_softwake_cv);
    356       1.224       mrg 
    357       1.224       mrg 	mutex_destroy(&sc->sc_lock);
    358       1.224       mrg 	mutex_destroy(&sc->sc_intr_lock);
    359       1.224       mrg 
    360       1.198    cegger 	if (sc->sc_hcca != NULL)
    361       1.198    cegger 		usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
    362       1.232  christos 	pool_cache_destroy(sc->sc_xferpool);
    363        1.47  augustss 
    364        1.47  augustss 	return (rv);
    365        1.47  augustss }
    366        1.47  augustss 
    367         1.1  augustss ohci_soft_ed_t *
    368        1.91  augustss ohci_alloc_sed(ohci_softc_t *sc)
    369         1.1  augustss {
    370         1.1  augustss 	ohci_soft_ed_t *sed;
    371        1.53  augustss 	usbd_status err;
    372         1.1  augustss 	int i, offs;
    373         1.4  augustss 	usb_dma_t dma;
    374         1.1  augustss 
    375        1.53  augustss 	if (sc->sc_freeeds == NULL) {
    376         1.1  augustss 		DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
    377        1.53  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
    378        1.53  augustss 			  OHCI_ED_ALIGN, &dma);
    379        1.53  augustss 		if (err)
    380        1.39  augustss 			return (0);
    381       1.225     skrll 		for (i = 0; i < OHCI_SED_CHUNK; i++) {
    382        1.39  augustss 			offs = i * OHCI_SED_SIZE;
    383       1.123  augustss 			sed = KERNADDR(&dma, offs);
    384       1.125  augustss 			sed->physaddr = DMAADDR(&dma, offs);
    385       1.195    bouyer 			sed->dma = dma;
    386       1.195    bouyer 			sed->offs = offs;
    387         1.1  augustss 			sed->next = sc->sc_freeeds;
    388         1.1  augustss 			sc->sc_freeeds = sed;
    389         1.1  augustss 		}
    390         1.1  augustss 	}
    391         1.1  augustss 	sed = sc->sc_freeeds;
    392         1.1  augustss 	sc->sc_freeeds = sed->next;
    393        1.39  augustss 	memset(&sed->ed, 0, sizeof(ohci_ed_t));
    394         1.1  augustss 	sed->next = 0;
    395        1.39  augustss 	return (sed);
    396         1.1  augustss }
    397         1.1  augustss 
    398         1.1  augustss void
    399        1.91  augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    400         1.1  augustss {
    401         1.1  augustss 	sed->next = sc->sc_freeeds;
    402         1.1  augustss 	sc->sc_freeeds = sed;
    403         1.1  augustss }
    404         1.1  augustss 
    405         1.1  augustss ohci_soft_td_t *
    406        1.91  augustss ohci_alloc_std(ohci_softc_t *sc)
    407         1.1  augustss {
    408         1.1  augustss 	ohci_soft_td_t *std;
    409        1.53  augustss 	usbd_status err;
    410         1.1  augustss 	int i, offs;
    411         1.4  augustss 	usb_dma_t dma;
    412         1.1  augustss 
    413   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    414       1.240     skrll 
    415        1.53  augustss 	if (sc->sc_freetds == NULL) {
    416         1.1  augustss 		DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
    417        1.53  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
    418        1.53  augustss 			  OHCI_TD_ALIGN, &dma);
    419        1.53  augustss 		if (err)
    420        1.83  augustss 			return (NULL);
    421        1.39  augustss 		for(i = 0; i < OHCI_STD_CHUNK; i++) {
    422        1.39  augustss 			offs = i * OHCI_STD_SIZE;
    423       1.123  augustss 			std = KERNADDR(&dma, offs);
    424       1.125  augustss 			std->physaddr = DMAADDR(&dma, offs);
    425       1.195    bouyer 			std->dma = dma;
    426       1.195    bouyer 			std->offs = offs;
    427         1.1  augustss 			std->nexttd = sc->sc_freetds;
    428         1.1  augustss 			sc->sc_freetds = std;
    429         1.1  augustss 		}
    430         1.1  augustss 	}
    431        1.69  augustss 
    432         1.1  augustss 	std = sc->sc_freetds;
    433         1.1  augustss 	sc->sc_freetds = std->nexttd;
    434        1.39  augustss 	memset(&std->td, 0, sizeof(ohci_td_t));
    435        1.83  augustss 	std->nexttd = NULL;
    436        1.83  augustss 	std->xfer = NULL;
    437        1.69  augustss 	ohci_hash_add_td(sc, std);
    438        1.69  augustss 
    439         1.1  augustss 	return (std);
    440         1.1  augustss }
    441         1.1  augustss 
    442         1.1  augustss void
    443        1.91  augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
    444         1.1  augustss {
    445   1.254.2.7     skrll 
    446   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    447   1.254.2.1     skrll 
    448        1.69  augustss 	ohci_hash_rem_td(sc, std);
    449         1.1  augustss 	std->nexttd = sc->sc_freetds;
    450         1.1  augustss 	sc->sc_freetds = std;
    451         1.1  augustss }
    452         1.1  augustss 
    453         1.1  augustss usbd_status
    454        1.91  augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
    455        1.91  augustss 		     int alen, int rd, usbd_xfer_handle xfer,
    456        1.91  augustss 		     ohci_soft_td_t *sp, ohci_soft_td_t **ep)
    457        1.48  augustss {
    458        1.48  augustss 	ohci_soft_td_t *next, *cur;
    459        1.48  augustss 	ohci_physaddr_t dataphys, dataphysend;
    460   1.254.2.1     skrll 	uint32_t tdflags;
    461        1.75  augustss 	int len, curlen;
    462   1.254.2.7     skrll 	usb_dma_t *dma = &xfer->ux_dmabuf;
    463   1.254.2.7     skrll 	uint16_t flags = xfer->ux_flags;
    464        1.48  augustss 
    465        1.75  augustss 	DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
    466        1.75  augustss 
    467       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
    468       1.224       mrg 
    469        1.75  augustss 	len = alen;
    470        1.48  augustss 	cur = sp;
    471       1.125  augustss 	dataphys = DMAADDR(dma, 0);
    472        1.48  augustss 	dataphysend = OHCI_PAGE(dataphys + len - 1);
    473       1.195    bouyer 	usb_syncmem(dma, 0, len,
    474       1.195    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
    475       1.168  augustss 	tdflags = HTOO32(
    476       1.120  augustss 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
    477        1.77  augustss 	    (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
    478        1.77  augustss 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
    479        1.61  augustss 
    480        1.48  augustss 	for (;;) {
    481        1.48  augustss 		next = ohci_alloc_std(sc);
    482        1.75  augustss 		if (next == NULL)
    483        1.61  augustss 			goto nomem;
    484        1.48  augustss 
    485        1.48  augustss 		/* The OHCI hardware can handle at most one page crossing. */
    486        1.48  augustss 		if (OHCI_PAGE(dataphys) == dataphysend ||
    487        1.48  augustss 		    OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
    488        1.48  augustss 			/* we can handle it in this TD */
    489        1.48  augustss 			curlen = len;
    490        1.48  augustss 		} else {
    491        1.48  augustss 			/* must use multiple TDs, fill as much as possible. */
    492       1.120  augustss 			curlen = 2 * OHCI_PAGE_SIZE -
    493        1.48  augustss 				 (dataphys & (OHCI_PAGE_SIZE-1));
    494        1.78  augustss 			/* the length must be a multiple of the max size */
    495   1.254.2.7     skrll 			curlen -= curlen % UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize);
    496        1.78  augustss #ifdef DIAGNOSTIC
    497        1.78  augustss 			if (curlen == 0)
    498       1.128    provos 				panic("ohci_alloc_std: curlen == 0");
    499        1.78  augustss #endif
    500        1.48  augustss 		}
    501        1.48  augustss 		DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
    502        1.48  augustss 			    "dataphysend=0x%08x len=%d curlen=%d\n",
    503        1.48  augustss 			    dataphys, dataphysend,
    504        1.48  augustss 			    len, curlen));
    505        1.48  augustss 		len -= curlen;
    506        1.48  augustss 
    507        1.77  augustss 		cur->td.td_flags = tdflags;
    508       1.168  augustss 		cur->td.td_cbp = HTOO32(dataphys);
    509        1.48  augustss 		cur->nexttd = next;
    510       1.168  augustss 		cur->td.td_nexttd = HTOO32(next->physaddr);
    511       1.168  augustss 		cur->td.td_be = HTOO32(dataphys + curlen - 1);
    512        1.48  augustss 		cur->len = curlen;
    513        1.48  augustss 		cur->flags = OHCI_ADD_LEN;
    514        1.77  augustss 		cur->xfer = xfer;
    515       1.195    bouyer 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    516       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    517        1.48  augustss 		DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
    518        1.48  augustss 			    dataphys, dataphys + curlen - 1));
    519        1.48  augustss 		if (len == 0)
    520        1.48  augustss 			break;
    521        1.48  augustss 		DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
    522        1.48  augustss 		dataphys += curlen;
    523        1.48  augustss 		cur = next;
    524        1.48  augustss 	}
    525       1.164  augustss 	if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
    526   1.254.2.7     skrll 	    alen % UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize) == 0) {
    527        1.61  augustss 		/* Force a 0 length transfer at the end. */
    528        1.75  augustss 
    529        1.75  augustss 		cur = next;
    530        1.61  augustss 		next = ohci_alloc_std(sc);
    531        1.75  augustss 		if (next == NULL)
    532        1.61  augustss 			goto nomem;
    533        1.61  augustss 
    534        1.77  augustss 		cur->td.td_flags = tdflags;
    535        1.61  augustss 		cur->td.td_cbp = 0; /* indicate 0 length packet */
    536        1.61  augustss 		cur->nexttd = next;
    537       1.168  augustss 		cur->td.td_nexttd = HTOO32(next->physaddr);
    538        1.75  augustss 		cur->td.td_be = ~0;
    539        1.61  augustss 		cur->len = 0;
    540        1.61  augustss 		cur->flags = 0;
    541        1.77  augustss 		cur->xfer = xfer;
    542       1.195    bouyer 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    543       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    544        1.61  augustss 		DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
    545        1.61  augustss 	}
    546        1.77  augustss 	*ep = cur;
    547        1.48  augustss 
    548        1.48  augustss 	return (USBD_NORMAL_COMPLETION);
    549        1.61  augustss 
    550        1.61  augustss  nomem:
    551       1.236     skrll 
    552       1.236     skrll 	/* Don't free sp - let the caller do that */
    553       1.236     skrll 	ohci_free_std_chain(sc, sp->nexttd, NULL);
    554       1.236     skrll 
    555        1.61  augustss 	return (USBD_NOMEM);
    556        1.48  augustss }
    557        1.48  augustss 
    558        1.82  augustss Static void
    559       1.120  augustss ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
    560        1.91  augustss 		    ohci_soft_td_t *stdend)
    561        1.48  augustss {
    562        1.48  augustss 	ohci_soft_td_t *p;
    563        1.48  augustss 
    564        1.48  augustss 	for (; std != stdend; std = p) {
    565        1.48  augustss 		p = std->nexttd;
    566        1.48  augustss 		ohci_free_std(sc, std);
    567        1.48  augustss 	}
    568        1.48  augustss }
    569        1.48  augustss 
    570        1.60  augustss ohci_soft_itd_t *
    571        1.91  augustss ohci_alloc_sitd(ohci_softc_t *sc)
    572        1.60  augustss {
    573        1.60  augustss 	ohci_soft_itd_t *sitd;
    574        1.60  augustss 	usbd_status err;
    575       1.224       mrg 	int i, offs;
    576        1.60  augustss 	usb_dma_t dma;
    577        1.60  augustss 
    578        1.60  augustss 	if (sc->sc_freeitds == NULL) {
    579        1.60  augustss 		DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
    580        1.83  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
    581        1.83  augustss 			  OHCI_ITD_ALIGN, &dma);
    582        1.60  augustss 		if (err)
    583        1.83  augustss 			return (NULL);
    584        1.83  augustss 		for(i = 0; i < OHCI_SITD_CHUNK; i++) {
    585        1.83  augustss 			offs = i * OHCI_SITD_SIZE;
    586       1.123  augustss 			sitd = KERNADDR(&dma, offs);
    587       1.125  augustss 			sitd->physaddr = DMAADDR(&dma, offs);
    588       1.195    bouyer 			sitd->dma = dma;
    589       1.195    bouyer 			sitd->offs = offs;
    590        1.60  augustss 			sitd->nextitd = sc->sc_freeitds;
    591        1.60  augustss 			sc->sc_freeitds = sitd;
    592        1.60  augustss 		}
    593        1.60  augustss 	}
    594        1.83  augustss 
    595        1.60  augustss 	sitd = sc->sc_freeitds;
    596        1.60  augustss 	sc->sc_freeitds = sitd->nextitd;
    597        1.60  augustss 	memset(&sitd->itd, 0, sizeof(ohci_itd_t));
    598        1.83  augustss 	sitd->nextitd = NULL;
    599        1.83  augustss 	sitd->xfer = NULL;
    600        1.83  augustss 	ohci_hash_add_itd(sc, sitd);
    601        1.83  augustss 
    602        1.83  augustss #ifdef DIAGNOSTIC
    603        1.83  augustss 	sitd->isdone = 0;
    604        1.83  augustss #endif
    605        1.83  augustss 
    606        1.60  augustss 	return (sitd);
    607        1.60  augustss }
    608        1.60  augustss 
    609        1.60  augustss void
    610        1.91  augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    611        1.60  augustss {
    612        1.83  augustss 
    613        1.83  augustss 	DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
    614        1.83  augustss 
    615        1.83  augustss #ifdef DIAGNOSTIC
    616        1.83  augustss 	if (!sitd->isdone) {
    617       1.128    provos 		panic("ohci_free_sitd: sitd=%p not done", sitd);
    618        1.83  augustss 		return;
    619        1.83  augustss 	}
    620       1.134    toshii 	/* Warn double free */
    621       1.134    toshii 	sitd->isdone = 0;
    622        1.83  augustss #endif
    623        1.83  augustss 
    624        1.83  augustss 	ohci_hash_rem_itd(sc, sitd);
    625        1.60  augustss 	sitd->nextitd = sc->sc_freeitds;
    626        1.60  augustss 	sc->sc_freeitds = sitd;
    627        1.60  augustss }
    628        1.60  augustss 
    629        1.48  augustss usbd_status
    630        1.91  augustss ohci_init(ohci_softc_t *sc)
    631         1.1  augustss {
    632         1.1  augustss 	ohci_soft_ed_t *sed, *psed;
    633        1.53  augustss 	usbd_status err;
    634         1.1  augustss 	int i;
    635   1.254.2.1     skrll 	uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */;
    636        1.16  augustss 
    637         1.1  augustss 	DPRINTF(("ohci_init: start\n"));
    638       1.199  jmcneill 	aprint_normal_dev(sc->sc_dev, "");
    639       1.199  jmcneill 
    640       1.198    cegger 	sc->sc_hcca = NULL;
    641       1.224       mrg 	callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
    642       1.224       mrg 
    643       1.224       mrg 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    644       1.224       mrg 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
    645       1.224       mrg 	cv_init(&sc->sc_softwake_cv, "ohciab");
    646       1.224       mrg 
    647       1.224       mrg 	sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
    648       1.224       mrg 	    ohci_rhsc_softint, sc);
    649       1.198    cegger 
    650       1.198    cegger 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    651       1.198    cegger 		LIST_INIT(&sc->sc_hash_tds[i]);
    652       1.198    cegger 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    653       1.198    cegger 		LIST_INIT(&sc->sc_hash_itds[i]);
    654       1.198    cegger 
    655       1.232  christos 	sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
    656       1.232  christos 	    "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    657       1.198    cegger 
    658        1.56  augustss 	rev = OREAD4(sc, OHCI_REVISION);
    659       1.200     enami 	aprint_normal("OHCI version %d.%d%s\n",
    660       1.199  jmcneill 	    OHCI_REV_HI(rev), OHCI_REV_LO(rev),
    661       1.199  jmcneill 	    OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
    662        1.55  augustss 
    663         1.1  augustss 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
    664       1.199  jmcneill 		aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
    665   1.254.2.7     skrll 		sc->sc_bus.ub_revision = USBREV_UNKNOWN;
    666         1.1  augustss 		return (USBD_INVAL);
    667         1.1  augustss 	}
    668   1.254.2.7     skrll 	sc->sc_bus.ub_revision = USBREV_1_0;
    669   1.254.2.7     skrll 	sc->sc_bus.ub_usedma = true;
    670       1.153      fvdl 
    671        1.73  augustss 	/* XXX determine alignment by R/W */
    672         1.1  augustss 	/* Allocate the HCCA area. */
    673       1.120  augustss 	err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
    674         1.4  augustss 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
    675       1.198    cegger 	if (err) {
    676       1.198    cegger 		sc->sc_hcca = NULL;
    677       1.198    cegger 		return err;
    678       1.198    cegger 	}
    679       1.123  augustss 	sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
    680         1.1  augustss 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
    681         1.1  augustss 
    682         1.1  augustss 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
    683         1.1  augustss 
    684        1.60  augustss 	/* Allocate dummy ED that starts the control list. */
    685         1.1  augustss 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
    686        1.53  augustss 	if (sc->sc_ctrl_head == NULL) {
    687        1.53  augustss 		err = USBD_NOMEM;
    688         1.1  augustss 		goto bad1;
    689         1.1  augustss 	}
    690       1.168  augustss 	sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    691        1.34  augustss 
    692        1.60  augustss 	/* Allocate dummy ED that starts the bulk list. */
    693         1.1  augustss 	sc->sc_bulk_head = ohci_alloc_sed(sc);
    694        1.53  augustss 	if (sc->sc_bulk_head == NULL) {
    695        1.53  augustss 		err = USBD_NOMEM;
    696         1.1  augustss 		goto bad2;
    697         1.1  augustss 	}
    698       1.168  augustss 	sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    699       1.195    bouyer 	usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
    700       1.195    bouyer 	    sizeof(sc->sc_bulk_head->ed),
    701       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    702         1.1  augustss 
    703        1.60  augustss 	/* Allocate dummy ED that starts the isochronous list. */
    704        1.60  augustss 	sc->sc_isoc_head = ohci_alloc_sed(sc);
    705        1.60  augustss 	if (sc->sc_isoc_head == NULL) {
    706        1.60  augustss 		err = USBD_NOMEM;
    707        1.60  augustss 		goto bad3;
    708        1.60  augustss 	}
    709       1.168  augustss 	sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    710       1.195    bouyer 	usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
    711       1.195    bouyer 	    sizeof(sc->sc_isoc_head->ed),
    712       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    713        1.60  augustss 
    714         1.1  augustss 	/* Allocate all the dummy EDs that make up the interrupt tree. */
    715         1.1  augustss 	for (i = 0; i < OHCI_NO_EDS; i++) {
    716         1.1  augustss 		sed = ohci_alloc_sed(sc);
    717        1.53  augustss 		if (sed == NULL) {
    718         1.1  augustss 			while (--i >= 0)
    719         1.1  augustss 				ohci_free_sed(sc, sc->sc_eds[i]);
    720        1.53  augustss 			err = USBD_NOMEM;
    721        1.60  augustss 			goto bad4;
    722         1.1  augustss 		}
    723         1.1  augustss 		/* All ED fields are set to 0. */
    724         1.1  augustss 		sc->sc_eds[i] = sed;
    725       1.168  augustss 		sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    726        1.60  augustss 		if (i != 0)
    727         1.1  augustss 			psed = sc->sc_eds[(i-1) / 2];
    728        1.60  augustss 		else
    729        1.60  augustss 			psed= sc->sc_isoc_head;
    730        1.60  augustss 		sed->next = psed;
    731       1.168  augustss 		sed->ed.ed_nexted = HTOO32(psed->physaddr);
    732       1.195    bouyer 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
    733       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    734         1.1  augustss 	}
    735       1.120  augustss 	/*
    736         1.1  augustss 	 * Fill HCCA interrupt table.  The bit reversal is to get
    737         1.1  augustss 	 * the tree set up properly to spread the interrupts.
    738         1.1  augustss 	 */
    739         1.1  augustss 	for (i = 0; i < OHCI_NO_INTRS; i++)
    740       1.120  augustss 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
    741       1.168  augustss 		    HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
    742       1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
    743       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    744         1.1  augustss 
    745        1.73  augustss #ifdef OHCI_DEBUG
    746        1.73  augustss 	if (ohcidebug > 15) {
    747        1.73  augustss 		for (i = 0; i < OHCI_NO_EDS; i++) {
    748        1.73  augustss 			printf("ed#%d ", i);
    749       1.168  augustss 			ohci_dump_ed(sc, sc->sc_eds[i]);
    750        1.73  augustss 		}
    751        1.73  augustss 		printf("iso ");
    752       1.168  augustss 		ohci_dump_ed(sc, sc->sc_isoc_head);
    753        1.73  augustss 	}
    754        1.73  augustss #endif
    755        1.73  augustss 
    756       1.161  augustss 	/* Preserve values programmed by SMM/BIOS but lost over reset. */
    757       1.161  augustss 	ctl = OREAD4(sc, OHCI_CONTROL);
    758       1.161  augustss 	rwc = ctl & OHCI_RWC;
    759       1.161  augustss 	fm = OREAD4(sc, OHCI_FM_INTERVAL);
    760       1.161  augustss 	desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
    761       1.243    martin 	/* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */
    762       1.161  augustss 
    763         1.1  augustss 	/* Determine in what context we are running. */
    764         1.1  augustss 	if (ctl & OHCI_IR) {
    765         1.1  augustss 		/* SMM active, request change */
    766         1.1  augustss 		DPRINTF(("ohci_init: SMM active, request owner change\n"));
    767       1.160  augustss 		if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
    768       1.160  augustss 		    (OHCI_OC | OHCI_MIE))
    769       1.160  augustss 			OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
    770         1.1  augustss 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
    771         1.1  augustss 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
    772         1.1  augustss 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
    773        1.53  augustss 			usb_delay_ms(&sc->sc_bus, 1);
    774         1.1  augustss 			ctl = OREAD4(sc, OHCI_CONTROL);
    775         1.1  augustss 		}
    776       1.160  augustss 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
    777         1.1  augustss 		if ((ctl & OHCI_IR) == 0) {
    778       1.199  jmcneill 			aprint_error_dev(sc->sc_dev,
    779       1.199  jmcneill 			    "SMM does not respond, resetting\n");
    780       1.161  augustss 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    781         1.1  augustss 			goto reset;
    782         1.1  augustss 		}
    783       1.103  augustss #if 0
    784       1.103  augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
    785         1.1  augustss 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
    786         1.1  augustss 		/* BIOS started controller. */
    787         1.1  augustss 		DPRINTF(("ohci_init: BIOS active\n"));
    788         1.1  augustss 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
    789       1.161  augustss 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
    790        1.53  augustss 			usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    791         1.1  augustss 		}
    792       1.103  augustss #endif
    793         1.1  augustss 	} else {
    794         1.1  augustss 		DPRINTF(("ohci_init: cold started\n"));
    795         1.1  augustss 	reset:
    796         1.1  augustss 		/* Controller was cold started. */
    797        1.53  augustss 		usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
    798         1.1  augustss 	}
    799         1.1  augustss 
    800        1.16  augustss 	/*
    801        1.25  augustss 	 * This reset should not be necessary according to the OHCI spec, but
    802        1.25  augustss 	 * without it some controllers do not start.
    803        1.16  augustss 	 */
    804       1.190  drochner 	DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
    805       1.161  augustss 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    806        1.55  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
    807        1.16  augustss 
    808         1.1  augustss 	/* We now own the host controller and the bus has been reset. */
    809         1.1  augustss 
    810         1.1  augustss 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
    811         1.1  augustss 	/* Nominal time for a reset is 10 us. */
    812         1.1  augustss 	for (i = 0; i < 10; i++) {
    813         1.1  augustss 		delay(10);
    814         1.1  augustss 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
    815         1.1  augustss 		if (!hcr)
    816         1.1  augustss 			break;
    817         1.1  augustss 	}
    818         1.1  augustss 	if (hcr) {
    819       1.199  jmcneill 		aprint_error_dev(sc->sc_dev, "reset timeout\n");
    820        1.53  augustss 		err = USBD_IOERROR;
    821        1.60  augustss 		goto bad5;
    822         1.1  augustss 	}
    823        1.52  augustss #ifdef OHCI_DEBUG
    824         1.1  augustss 	if (ohcidebug > 15)
    825         1.1  augustss 		ohci_dumpregs(sc);
    826         1.1  augustss #endif
    827         1.1  augustss 
    828        1.60  augustss 	/* The controller is now in SUSPEND state, we have 2ms to finish. */
    829         1.1  augustss 
    830         1.1  augustss 	/* Set up HC registers. */
    831       1.125  augustss 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
    832         1.1  augustss 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
    833         1.1  augustss 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
    834        1.55  augustss 	/* disable all interrupts and then switch on all desired interrupts */
    835         1.1  augustss 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
    836        1.55  augustss 	/* switch on desired functional features */
    837         1.1  augustss 	ctl = OREAD4(sc, OHCI_CONTROL);
    838         1.1  augustss 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
    839         1.1  augustss 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
    840       1.161  augustss 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
    841         1.1  augustss 	/* And finally start it! */
    842         1.1  augustss 	OWRITE4(sc, OHCI_CONTROL, ctl);
    843         1.1  augustss 
    844         1.1  augustss 	/*
    845         1.1  augustss 	 * The controller is now OPERATIONAL.  Set a some final
    846         1.1  augustss 	 * registers that should be set earlier, but that the
    847         1.1  augustss 	 * controller ignores when in the SUSPEND state.
    848         1.1  augustss 	 */
    849       1.161  augustss 	ival = OHCI_GET_IVAL(fm);
    850         1.1  augustss 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
    851         1.1  augustss 	fm |= OHCI_FSMPS(ival) | ival;
    852         1.1  augustss 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
    853         1.1  augustss 	per = OHCI_PERIODIC(ival); /* 90% periodic */
    854         1.1  augustss 	OWRITE4(sc, OHCI_PERIODIC_START, per);
    855         1.1  augustss 
    856       1.249     skrll 	if (sc->sc_flags & OHCIF_SUPERIO) {
    857       1.249     skrll 		/* no overcurrent protection */
    858       1.249     skrll 		desca |= OHCI_NOCP;
    859       1.249     skrll 		/*
    860       1.249     skrll 		 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning
    861       1.249     skrll 		 * that
    862       1.249     skrll 		 *  - ports are always power switched
    863       1.249     skrll 		 *  - don't wait for powered root hub port
    864       1.249     skrll 		 */
    865       1.249     skrll 		desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS);
    866       1.249     skrll 	}
    867       1.249     skrll 
    868        1.68  augustss 	/* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
    869        1.68  augustss 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
    870        1.68  augustss 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
    871        1.85  augustss 	usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
    872        1.68  augustss 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
    873         1.1  augustss 
    874        1.85  augustss 	/*
    875        1.85  augustss 	 * The AMD756 requires a delay before re-reading the register,
    876        1.85  augustss 	 * otherwise it will occasionally report 0 ports.
    877        1.85  augustss 	 */
    878       1.145  augustss 	sc->sc_noport = 0;
    879       1.145  augustss 	for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
    880       1.145  augustss 		usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
    881       1.145  augustss 		sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
    882       1.145  augustss 	}
    883         1.1  augustss 
    884        1.52  augustss #ifdef OHCI_DEBUG
    885         1.1  augustss 	if (ohcidebug > 5)
    886         1.1  augustss 		ohci_dumpregs(sc);
    887         1.1  augustss #endif
    888       1.120  augustss 
    889         1.1  augustss 	/* Set up the bus struct. */
    890   1.254.2.7     skrll 	sc->sc_bus.ub_methods = &ohci_bus_methods;
    891   1.254.2.7     skrll 	sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe);
    892         1.1  augustss 
    893       1.101   minoura 	sc->sc_control = sc->sc_intre = 0;
    894        1.59  augustss 
    895       1.167  augustss 	/* Finally, turn on interrupts. */
    896       1.211      matt 	DPRINTFN(1,("ohci_init: enabling %#x\n", sc->sc_eintrs | OHCI_MIE));
    897       1.167  augustss 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
    898       1.167  augustss 
    899         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
    900         1.1  augustss 
    901        1.60  augustss  bad5:
    902        1.60  augustss 	for (i = 0; i < OHCI_NO_EDS; i++)
    903        1.60  augustss 		ohci_free_sed(sc, sc->sc_eds[i]);
    904        1.60  augustss  bad4:
    905        1.60  augustss 	ohci_free_sed(sc, sc->sc_isoc_head);
    906         1.1  augustss  bad3:
    907       1.144  augustss 	ohci_free_sed(sc, sc->sc_bulk_head);
    908       1.144  augustss  bad2:
    909         1.1  augustss 	ohci_free_sed(sc, sc->sc_ctrl_head);
    910         1.1  augustss  bad1:
    911        1.44  augustss 	usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
    912       1.198    cegger 	sc->sc_hcca = NULL;
    913        1.53  augustss 	return (err);
    914         1.1  augustss }
    915         1.1  augustss 
    916        1.62  augustss usbd_xfer_handle
    917        1.91  augustss ohci_allocx(struct usbd_bus *bus)
    918        1.62  augustss {
    919   1.254.2.7     skrll 	struct ohci_softc *sc = bus->ub_hcpriv;
    920        1.62  augustss 	usbd_xfer_handle xfer;
    921        1.62  augustss 
    922       1.232  christos 	xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
    923       1.118  augustss 	if (xfer != NULL) {
    924       1.232  christos 		memset(xfer, 0, sizeof(struct ohci_xfer));
    925       1.118  augustss #ifdef DIAGNOSTIC
    926   1.254.2.7     skrll 		xfer->ux_state = XFER_BUSY;
    927       1.118  augustss #endif
    928       1.118  augustss 	}
    929        1.62  augustss 	return (xfer);
    930        1.62  augustss }
    931        1.62  augustss 
    932        1.62  augustss void
    933        1.91  augustss ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
    934        1.62  augustss {
    935   1.254.2.7     skrll 	struct ohci_softc *sc = bus->ub_hcpriv;
    936        1.62  augustss 
    937       1.118  augustss #ifdef DIAGNOSTIC
    938   1.254.2.7     skrll 	if (xfer->ux_state != XFER_BUSY) {
    939       1.118  augustss 		printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
    940   1.254.2.7     skrll 		       xfer->ux_state);
    941       1.118  augustss 	}
    942   1.254.2.7     skrll 	xfer->ux_state = XFER_FREE;
    943       1.118  augustss #endif
    944       1.232  christos 	pool_cache_put(sc->sc_xferpool, xfer);
    945        1.42  augustss }
    946        1.42  augustss 
    947       1.224       mrg Static void
    948       1.224       mrg ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
    949       1.224       mrg {
    950   1.254.2.7     skrll 	struct ohci_softc *sc = bus->ub_hcpriv;
    951       1.224       mrg 
    952       1.224       mrg 	*lock = &sc->sc_lock;
    953       1.224       mrg }
    954       1.224       mrg 
    955        1.59  augustss /*
    956        1.59  augustss  * Shut down the controller when the system is going down.
    957        1.59  augustss  */
    958       1.188    dyoung bool
    959       1.188    dyoung ohci_shutdown(device_t self, int flags)
    960        1.59  augustss {
    961       1.188    dyoung 	ohci_softc_t *sc = device_private(self);
    962        1.59  augustss 
    963        1.59  augustss 	DPRINTF(("ohci_shutdown: stopping the HC\n"));
    964        1.59  augustss 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
    965       1.188    dyoung 	return true;
    966        1.59  augustss }
    967        1.59  augustss 
    968       1.185  jmcneill bool
    969       1.206    dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
    970        1.33  augustss {
    971       1.185  jmcneill 	ohci_softc_t *sc = device_private(dv);
    972       1.185  jmcneill 	uint32_t ctl;
    973        1.33  augustss 
    974       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
    975   1.254.2.7     skrll 	sc->sc_bus.ub_usepolling++;
    976       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
    977       1.224       mrg 
    978       1.185  jmcneill 	/* Some broken BIOSes do not recover these values */
    979       1.185  jmcneill 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
    980       1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
    981       1.185  jmcneill 	    sc->sc_ctrl_head->physaddr);
    982       1.185  jmcneill 	OWRITE4(sc, OHCI_BULK_HEAD_ED,
    983       1.185  jmcneill 	    sc->sc_bulk_head->physaddr);
    984       1.185  jmcneill 	if (sc->sc_intre)
    985       1.185  jmcneill 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
    986       1.185  jmcneill 		    (OHCI_ALL_INTRS | OHCI_MIE));
    987       1.185  jmcneill 	if (sc->sc_control)
    988       1.185  jmcneill 		ctl = sc->sc_control;
    989       1.185  jmcneill 	else
    990       1.185  jmcneill 		ctl = OREAD4(sc, OHCI_CONTROL);
    991       1.185  jmcneill 	ctl |= OHCI_HCFS_RESUME;
    992       1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
    993       1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    994       1.185  jmcneill 	ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
    995       1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
    996       1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
    997       1.185  jmcneill 	sc->sc_control = sc->sc_intre = 0;
    998       1.224       mrg 
    999       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1000   1.254.2.7     skrll 	sc->sc_bus.ub_usepolling--;
   1001       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1002       1.185  jmcneill 
   1003       1.185  jmcneill 	return true;
   1004       1.185  jmcneill }
   1005       1.185  jmcneill 
   1006       1.185  jmcneill bool
   1007       1.206    dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
   1008       1.185  jmcneill {
   1009       1.185  jmcneill 	ohci_softc_t *sc = device_private(dv);
   1010       1.185  jmcneill 	uint32_t ctl;
   1011        1.95  augustss 
   1012       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1013   1.254.2.7     skrll 	sc->sc_bus.ub_usepolling++;
   1014       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1015       1.224       mrg 
   1016       1.185  jmcneill 	ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
   1017       1.185  jmcneill 	if (sc->sc_control == 0) {
   1018       1.185  jmcneill 		/*
   1019       1.185  jmcneill 		 * Preserve register values, in case that BIOS
   1020       1.185  jmcneill 		 * does not recover them.
   1021       1.185  jmcneill 		 */
   1022       1.185  jmcneill 		sc->sc_control = ctl;
   1023       1.185  jmcneill 		sc->sc_intre = OREAD4(sc,
   1024       1.185  jmcneill 		    OHCI_INTERRUPT_ENABLE);
   1025        1.95  augustss 	}
   1026       1.185  jmcneill 	ctl |= OHCI_HCFS_SUSPEND;
   1027       1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1028       1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1029       1.224       mrg 
   1030       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1031   1.254.2.7     skrll 	sc->sc_bus.ub_usepolling--;
   1032       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1033       1.185  jmcneill 
   1034       1.185  jmcneill 	return true;
   1035        1.33  augustss }
   1036        1.33  augustss 
   1037        1.52  augustss #ifdef OHCI_DEBUG
   1038         1.1  augustss void
   1039        1.91  augustss ohci_dumpregs(ohci_softc_t *sc)
   1040         1.1  augustss {
   1041        1.41  augustss 	DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
   1042        1.41  augustss 		 OREAD4(sc, OHCI_REVISION),
   1043        1.41  augustss 		 OREAD4(sc, OHCI_CONTROL),
   1044        1.41  augustss 		 OREAD4(sc, OHCI_COMMAND_STATUS)));
   1045        1.41  augustss 	DPRINTF(("               intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
   1046        1.41  augustss 		 OREAD4(sc, OHCI_INTERRUPT_STATUS),
   1047        1.41  augustss 		 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
   1048        1.41  augustss 		 OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
   1049        1.41  augustss 	DPRINTF(("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
   1050        1.41  augustss 		 OREAD4(sc, OHCI_HCCA),
   1051        1.41  augustss 		 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
   1052        1.41  augustss 		 OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
   1053        1.41  augustss 	DPRINTF(("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
   1054        1.41  augustss 		 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
   1055        1.41  augustss 		 OREAD4(sc, OHCI_BULK_HEAD_ED),
   1056        1.41  augustss 		 OREAD4(sc, OHCI_BULK_CURRENT_ED)));
   1057        1.41  augustss 	DPRINTF(("               done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
   1058        1.41  augustss 		 OREAD4(sc, OHCI_DONE_HEAD),
   1059        1.41  augustss 		 OREAD4(sc, OHCI_FM_INTERVAL),
   1060        1.41  augustss 		 OREAD4(sc, OHCI_FM_REMAINING)));
   1061        1.41  augustss 	DPRINTF(("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
   1062        1.41  augustss 		 OREAD4(sc, OHCI_FM_NUMBER),
   1063        1.41  augustss 		 OREAD4(sc, OHCI_PERIODIC_START),
   1064        1.41  augustss 		 OREAD4(sc, OHCI_LS_THRESHOLD)));
   1065        1.41  augustss 	DPRINTF(("               desca=0x%08x descb=0x%08x stat=0x%08x\n",
   1066        1.41  augustss 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
   1067        1.41  augustss 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
   1068        1.41  augustss 		 OREAD4(sc, OHCI_RH_STATUS)));
   1069        1.41  augustss 	DPRINTF(("               port1=0x%08x port2=0x%08x\n",
   1070        1.41  augustss 		 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
   1071        1.41  augustss 		 OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
   1072        1.41  augustss 	DPRINTF(("         HCCA: frame_number=0x%04x done_head=0x%08x\n",
   1073       1.168  augustss 		 O32TOH(sc->sc_hcca->hcca_frame_number),
   1074       1.168  augustss 		 O32TOH(sc->sc_hcca->hcca_done_head)));
   1075         1.1  augustss }
   1076         1.1  augustss #endif
   1077         1.1  augustss 
   1078        1.91  augustss Static int ohci_intr1(ohci_softc_t *);
   1079        1.53  augustss 
   1080         1.1  augustss int
   1081        1.91  augustss ohci_intr(void *p)
   1082         1.1  augustss {
   1083         1.1  augustss 	ohci_softc_t *sc = p;
   1084       1.224       mrg 	int ret = 0;
   1085       1.111  augustss 
   1086       1.224       mrg 	if (sc == NULL)
   1087       1.111  augustss 		return (0);
   1088        1.53  augustss 
   1089       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1090       1.224       mrg 
   1091       1.224       mrg 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1092       1.224       mrg 		goto done;
   1093       1.224       mrg 
   1094        1.53  augustss 	/* If we get an interrupt while polling, then just ignore it. */
   1095   1.254.2.7     skrll 	if (sc->sc_bus.ub_usepolling) {
   1096        1.57  augustss #ifdef DIAGNOSTIC
   1097       1.149   mycroft 		DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
   1098        1.57  augustss #endif
   1099       1.154      joff 		/* for level triggered intrs, should do something to ack */
   1100       1.155     perry 		OWRITE4(sc, OHCI_INTERRUPT_STATUS,
   1101       1.154      joff 			OREAD4(sc, OHCI_INTERRUPT_STATUS));
   1102       1.155     perry 
   1103       1.224       mrg 		goto done;
   1104        1.57  augustss 	}
   1105        1.53  augustss 
   1106       1.224       mrg 	ret = ohci_intr1(sc);
   1107       1.224       mrg 
   1108       1.224       mrg done:
   1109       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1110       1.224       mrg 	return ret;
   1111        1.53  augustss }
   1112        1.53  augustss 
   1113        1.82  augustss Static int
   1114        1.91  augustss ohci_intr1(ohci_softc_t *sc)
   1115        1.53  augustss {
   1116   1.254.2.1     skrll 	uint32_t intrs, eintrs;
   1117         1.1  augustss 
   1118       1.105  augustss 	DPRINTFN(14,("ohci_intr1: enter\n"));
   1119       1.105  augustss 
   1120        1.15  augustss 	/* In case the interrupt occurs before initialization has completed. */
   1121        1.34  augustss 	if (sc == NULL || sc->sc_hcca == NULL) {
   1122        1.15  augustss #ifdef DIAGNOSTIC
   1123        1.15  augustss 		printf("ohci_intr: sc->sc_hcca == NULL\n");
   1124        1.15  augustss #endif
   1125        1.15  augustss 		return (0);
   1126        1.15  augustss 	}
   1127        1.15  augustss 
   1128       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1129       1.224       mrg 
   1130       1.157   mycroft 	intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1131         1.1  augustss 	if (!intrs)
   1132         1.1  augustss 		return (0);
   1133        1.55  augustss 
   1134       1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
   1135         1.1  augustss 	eintrs = intrs & sc->sc_eintrs;
   1136       1.211      matt 	DPRINTFN(7, ("ohci_intr: sc=%p intrs=%#x(%#x) eintrs=%#x(%#x)\n",
   1137       1.211      matt 		     sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
   1138       1.211      matt 		     (u_int)eintrs, sc->sc_eintrs));
   1139       1.211      matt 
   1140       1.211      matt 	if (!eintrs) {
   1141         1.1  augustss 		return (0);
   1142       1.211      matt 	}
   1143         1.1  augustss 
   1144         1.1  augustss 	if (eintrs & OHCI_SO) {
   1145       1.100  augustss 		sc->sc_overrun_cnt++;
   1146       1.100  augustss 		if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
   1147       1.100  augustss 			printf("%s: %u scheduling overruns\n",
   1148       1.190  drochner 			    device_xname(sc->sc_dev), sc->sc_overrun_cnt);
   1149       1.100  augustss 			sc->sc_overrun_cnt = 0;
   1150       1.100  augustss 		}
   1151         1.1  augustss 		/* XXX do what */
   1152       1.106  augustss 		eintrs &= ~OHCI_SO;
   1153         1.1  augustss 	}
   1154         1.1  augustss 	if (eintrs & OHCI_WDH) {
   1155       1.157   mycroft 		/*
   1156       1.157   mycroft 		 * We block the interrupt below, and reenable it later from
   1157       1.157   mycroft 		 * ohci_softintr().
   1158       1.157   mycroft 		 */
   1159        1.72  augustss 		usb_schedsoftintr(&sc->sc_bus);
   1160         1.1  augustss 	}
   1161         1.1  augustss 	if (eintrs & OHCI_RD) {
   1162       1.190  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1163         1.1  augustss 		/* XXX process resume detect */
   1164         1.1  augustss 	}
   1165         1.1  augustss 	if (eintrs & OHCI_UE) {
   1166        1.15  augustss 		printf("%s: unrecoverable error, controller halted\n",
   1167       1.190  drochner 		       device_xname(sc->sc_dev));
   1168         1.1  augustss 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1169         1.1  augustss 		/* XXX what else */
   1170         1.1  augustss 	}
   1171         1.1  augustss 	if (eintrs & OHCI_RHSC) {
   1172       1.120  augustss 		/*
   1173       1.157   mycroft 		 * We block the interrupt below, and reenable it later from
   1174       1.157   mycroft 		 * a timeout.
   1175         1.1  augustss 		 */
   1176       1.224       mrg 		softint_schedule(sc->sc_rhsc_si);
   1177         1.1  augustss 	}
   1178         1.1  augustss 
   1179       1.106  augustss 	if (eintrs != 0) {
   1180       1.157   mycroft 		/* Block unprocessed interrupts. */
   1181       1.106  augustss 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
   1182       1.106  augustss 		sc->sc_eintrs &= ~eintrs;
   1183       1.157   mycroft 		DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
   1184       1.190  drochner 		    device_xname(sc->sc_dev), eintrs));
   1185       1.106  augustss 	}
   1186         1.1  augustss 
   1187         1.1  augustss 	return (1);
   1188         1.1  augustss }
   1189         1.1  augustss 
   1190         1.1  augustss void
   1191       1.104  augustss ohci_rhsc_enable(void *v_sc)
   1192       1.104  augustss {
   1193       1.104  augustss 	ohci_softc_t *sc = v_sc;
   1194       1.104  augustss 
   1195       1.224       mrg 	DPRINTFN(1, ("%s: %s\n", __func__, device_xname(sc->sc_dev)));
   1196       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1197       1.157   mycroft 	sc->sc_eintrs |= OHCI_RHSC;
   1198       1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
   1199       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1200         1.1  augustss }
   1201         1.1  augustss 
   1202        1.52  augustss #ifdef OHCI_DEBUG
   1203       1.166  drochner const char *ohci_cc_strs[] = {
   1204        1.13  augustss 	"NO_ERROR",
   1205        1.13  augustss 	"CRC",
   1206        1.13  augustss 	"BIT_STUFFING",
   1207        1.13  augustss 	"DATA_TOGGLE_MISMATCH",
   1208        1.13  augustss 	"STALL",
   1209        1.13  augustss 	"DEVICE_NOT_RESPONDING",
   1210        1.13  augustss 	"PID_CHECK_FAILURE",
   1211        1.13  augustss 	"UNEXPECTED_PID",
   1212        1.13  augustss 	"DATA_OVERRUN",
   1213        1.13  augustss 	"DATA_UNDERRUN",
   1214        1.13  augustss 	"BUFFER_OVERRUN",
   1215        1.13  augustss 	"BUFFER_UNDERRUN",
   1216        1.67  augustss 	"reserved",
   1217        1.67  augustss 	"reserved",
   1218        1.67  augustss 	"NOT_ACCESSED",
   1219        1.13  augustss 	"NOT_ACCESSED",
   1220        1.13  augustss };
   1221        1.13  augustss #endif
   1222        1.13  augustss 
   1223         1.1  augustss void
   1224       1.157   mycroft ohci_softintr(void *v)
   1225        1.83  augustss {
   1226       1.190  drochner 	struct usbd_bus *bus = v;
   1227   1.254.2.7     skrll 	ohci_softc_t *sc = bus->ub_hcpriv;
   1228       1.157   mycroft 	ohci_soft_itd_t *sitd, *sidone, *sitdnext;
   1229       1.157   mycroft 	ohci_soft_td_t  *std,  *sdone,  *stdnext;
   1230       1.157   mycroft 	usbd_xfer_handle xfer;
   1231       1.157   mycroft 	struct ohci_pipe *opipe;
   1232       1.224       mrg 	int len, cc;
   1233       1.157   mycroft 	int i, j, actlen, iframes, uedir;
   1234       1.157   mycroft 	ohci_physaddr_t done;
   1235       1.157   mycroft 
   1236   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1237       1.224       mrg 
   1238       1.157   mycroft 	DPRINTFN(10,("ohci_softintr: enter\n"));
   1239       1.157   mycroft 
   1240       1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1241       1.195    bouyer 	    sizeof(sc->sc_hcca->hcca_done_head),
   1242       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1243       1.168  augustss 	done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
   1244       1.157   mycroft 	sc->sc_hcca->hcca_done_head = 0;
   1245       1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1246       1.195    bouyer 	    sizeof(sc->sc_hcca->hcca_done_head),
   1247       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1248       1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
   1249       1.157   mycroft 	sc->sc_eintrs |= OHCI_WDH;
   1250       1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
   1251        1.83  augustss 
   1252        1.83  augustss 	/* Reverse the done list. */
   1253        1.83  augustss 	for (sdone = NULL, sidone = NULL; done != 0; ) {
   1254        1.83  augustss 		std = ohci_hash_find_td(sc, done);
   1255        1.83  augustss 		if (std != NULL) {
   1256       1.195    bouyer 			usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1257       1.195    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1258        1.83  augustss 			std->dnext = sdone;
   1259       1.168  augustss 			done = O32TOH(std->td.td_nexttd);
   1260        1.83  augustss 			sdone = std;
   1261        1.83  augustss 			DPRINTFN(10,("add TD %p\n", std));
   1262        1.83  augustss 			continue;
   1263        1.83  augustss 		}
   1264        1.83  augustss 		sitd = ohci_hash_find_itd(sc, done);
   1265        1.83  augustss 		if (sitd != NULL) {
   1266       1.195    bouyer 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   1267       1.195    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1268        1.83  augustss 			sitd->dnext = sidone;
   1269       1.168  augustss 			done = O32TOH(sitd->itd.itd_nextitd);
   1270        1.83  augustss 			sidone = sitd;
   1271        1.83  augustss 			DPRINTFN(5,("add ITD %p\n", sitd));
   1272        1.83  augustss 			continue;
   1273        1.83  augustss 		}
   1274       1.218  jmcneill 		device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
   1275       1.218  jmcneill 		    (u_long)done);
   1276       1.218  jmcneill 		break;
   1277        1.83  augustss 	}
   1278        1.83  augustss 
   1279       1.105  augustss 	DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
   1280         1.1  augustss 
   1281        1.52  augustss #ifdef OHCI_DEBUG
   1282         1.1  augustss 	if (ohcidebug > 10) {
   1283        1.41  augustss 		DPRINTF(("ohci_process_done: TD done:\n"));
   1284       1.234     skrll 		for (std = sdone; std; std = std->dnext)
   1285   1.254.2.1     skrll 			ohci_dump_td(sc, std);
   1286         1.1  augustss 	}
   1287         1.1  augustss #endif
   1288         1.1  augustss 
   1289        1.48  augustss 	for (std = sdone; std; std = stdnext) {
   1290        1.53  augustss 		xfer = std->xfer;
   1291        1.48  augustss 		stdnext = std->dnext;
   1292        1.53  augustss 		DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
   1293   1.254.2.7     skrll 				std, xfer, xfer ? xfer->ux_hcpriv : 0));
   1294        1.71  augustss 		if (xfer == NULL) {
   1295       1.117  augustss 			/*
   1296       1.117  augustss 			 * xfer == NULL: There seems to be no xfer associated
   1297        1.71  augustss 			 * with this TD. It is tailp that happened to end up on
   1298        1.71  augustss 			 * the done queue.
   1299       1.117  augustss 			 * Shouldn't happen, but some chips are broken(?).
   1300        1.71  augustss 			 */
   1301        1.71  augustss 			continue;
   1302        1.71  augustss 		}
   1303   1.254.2.7     skrll 		if (xfer->ux_status == USBD_CANCELLED ||
   1304   1.254.2.7     skrll 		    xfer->ux_status == USBD_TIMEOUT) {
   1305        1.34  augustss 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
   1306        1.53  augustss 				 xfer));
   1307        1.38  augustss 			/* Handled by abort routine. */
   1308        1.83  augustss 			continue;
   1309        1.83  augustss 		}
   1310   1.254.2.7     skrll 		callout_stop(&xfer->ux_callout);
   1311       1.141   mycroft 
   1312       1.141   mycroft 		len = std->len;
   1313       1.141   mycroft 		if (std->td.td_cbp != 0)
   1314       1.168  augustss 			len -= O32TOH(std->td.td_be) -
   1315       1.168  augustss 			       O32TOH(std->td.td_cbp) + 1;
   1316       1.141   mycroft 		DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
   1317       1.141   mycroft 		    std->flags));
   1318       1.141   mycroft 		if (std->flags & OHCI_ADD_LEN)
   1319   1.254.2.7     skrll 			xfer->ux_actlen += len;
   1320       1.141   mycroft 
   1321       1.168  augustss 		cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
   1322        1.83  augustss 		if (cc == OHCI_CC_NO_ERROR) {
   1323        1.34  augustss 			if (std->flags & OHCI_CALL_DONE) {
   1324   1.254.2.7     skrll 				xfer->ux_status = USBD_NORMAL_COMPLETION;
   1325        1.53  augustss 				usb_transfer_complete(xfer);
   1326        1.21  augustss 			}
   1327        1.48  augustss 			ohci_free_std(sc, std);
   1328         1.1  augustss 		} else {
   1329        1.48  augustss 			/*
   1330        1.48  augustss 			 * Endpoint is halted.  First unlink all the TDs
   1331        1.48  augustss 			 * belonging to the failed transfer, and then restart
   1332        1.48  augustss 			 * the endpoint.
   1333        1.48  augustss 			 */
   1334         1.1  augustss 			ohci_soft_td_t *p, *n;
   1335   1.254.2.7     skrll 			opipe = (struct ohci_pipe *)xfer->ux_pipe;
   1336        1.48  augustss 
   1337        1.71  augustss 			DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
   1338       1.168  augustss 			  OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
   1339       1.168  augustss 			  ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
   1340        1.48  augustss 
   1341        1.48  augustss 			/* remove TDs */
   1342        1.53  augustss 			for (p = std; p->xfer == xfer; p = n) {
   1343         1.1  augustss 				n = p->nexttd;
   1344         1.1  augustss 				ohci_free_std(sc, p);
   1345         1.1  augustss 			}
   1346        1.48  augustss 
   1347        1.16  augustss 			/* clear halt */
   1348       1.168  augustss 			opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
   1349         1.1  augustss 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1350        1.48  augustss 
   1351         1.1  augustss 			if (cc == OHCI_CC_STALL)
   1352   1.254.2.7     skrll 				xfer->ux_status = USBD_STALLED;
   1353         1.1  augustss 			else
   1354   1.254.2.7     skrll 				xfer->ux_status = USBD_IOERROR;
   1355        1.53  augustss 			usb_transfer_complete(xfer);
   1356         1.1  augustss 		}
   1357         1.1  augustss 	}
   1358        1.72  augustss 
   1359        1.83  augustss #ifdef OHCI_DEBUG
   1360        1.83  augustss 	if (ohcidebug > 10) {
   1361       1.105  augustss 		DPRINTF(("ohci_softintr: ITD done:\n"));
   1362       1.234     skrll 		for (sitd = sidone; sitd; sitd = sitd->dnext)
   1363   1.254.2.1     skrll 			ohci_dump_itd(sc, sitd);
   1364        1.83  augustss 	}
   1365        1.83  augustss #endif
   1366        1.83  augustss 
   1367        1.83  augustss 	for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
   1368        1.83  augustss 		xfer = sitd->xfer;
   1369        1.83  augustss 		sitdnext = sitd->dnext;
   1370        1.83  augustss 		DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
   1371   1.254.2.7     skrll 			     sitd, xfer, xfer ? xfer->ux_hcpriv : 0));
   1372        1.83  augustss 		if (xfer == NULL)
   1373        1.83  augustss 			continue;
   1374   1.254.2.7     skrll 		if (xfer->ux_status == USBD_CANCELLED ||
   1375   1.254.2.7     skrll 		    xfer->ux_status == USBD_TIMEOUT) {
   1376        1.83  augustss 			DPRINTF(("ohci_process_done: cancel/timeout %p\n",
   1377        1.83  augustss 				 xfer));
   1378        1.83  augustss 			/* Handled by abort routine. */
   1379        1.83  augustss 			continue;
   1380        1.83  augustss 		}
   1381        1.83  augustss #ifdef DIAGNOSTIC
   1382        1.83  augustss 		if (sitd->isdone)
   1383        1.83  augustss 			printf("ohci_softintr: sitd=%p is done\n", sitd);
   1384        1.83  augustss 		sitd->isdone = 1;
   1385        1.83  augustss #endif
   1386       1.134    toshii 		if (sitd->flags & OHCI_CALL_DONE) {
   1387       1.134    toshii 			ohci_soft_itd_t *next;
   1388       1.134    toshii 
   1389   1.254.2.7     skrll 			opipe = (struct ohci_pipe *)xfer->ux_pipe;
   1390   1.254.2.7     skrll 			opipe->u.iso.inuse -= xfer->ux_nframes;
   1391   1.254.2.7     skrll 			uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->
   1392       1.134    toshii 			    bEndpointAddress);
   1393   1.254.2.7     skrll 			xfer->ux_status = USBD_NORMAL_COMPLETION;
   1394       1.134    toshii 			actlen = 0;
   1395   1.254.2.7     skrll 			for (i = 0, sitd = xfer->ux_hcpriv;;
   1396       1.134    toshii 			    sitd = next) {
   1397       1.134    toshii 				next = sitd->nextitd;
   1398       1.168  augustss 				if (OHCI_ITD_GET_CC(O32TOH(sitd->
   1399       1.135    toshii 				    itd.itd_flags)) != OHCI_CC_NO_ERROR)
   1400   1.254.2.7     skrll 					xfer->ux_status = USBD_IOERROR;
   1401       1.134    toshii 				/* For input, update frlengths with actual */
   1402       1.134    toshii 				/* XXX anything necessary for output? */
   1403       1.134    toshii 				if (uedir == UE_DIR_IN &&
   1404   1.254.2.7     skrll 				    xfer->ux_status == USBD_NORMAL_COMPLETION) {
   1405       1.168  augustss 					iframes = OHCI_ITD_GET_FC(O32TOH(
   1406       1.135    toshii 					    sitd->itd.itd_flags));
   1407       1.134    toshii 					for (j = 0; j < iframes; i++, j++) {
   1408       1.168  augustss 						len = O16TOH(sitd->
   1409       1.134    toshii 						    itd.itd_offset[j]);
   1410       1.158    toshii 						if ((OHCI_ITD_PSW_GET_CC(len) &
   1411       1.158    toshii 						    OHCI_CC_NOT_ACCESSED_MASK)
   1412       1.158    toshii 						    == OHCI_CC_NOT_ACCESSED)
   1413       1.158    toshii 							len = 0;
   1414       1.158    toshii 						else
   1415       1.158    toshii 							len = OHCI_ITD_PSW_LENGTH(len);
   1416   1.254.2.7     skrll 						xfer->ux_frlengths[i] = len;
   1417       1.134    toshii 						actlen += len;
   1418       1.134    toshii 					}
   1419       1.134    toshii 				}
   1420       1.134    toshii 				if (sitd->flags & OHCI_CALL_DONE)
   1421       1.134    toshii 					break;
   1422       1.134    toshii 				ohci_free_sitd(sc, sitd);
   1423        1.83  augustss 			}
   1424       1.134    toshii 			ohci_free_sitd(sc, sitd);
   1425       1.134    toshii 			if (uedir == UE_DIR_IN &&
   1426   1.254.2.7     skrll 			    xfer->ux_status == USBD_NORMAL_COMPLETION)
   1427   1.254.2.7     skrll 				xfer->ux_actlen = actlen;
   1428   1.254.2.7     skrll 			xfer->ux_hcpriv = NULL;
   1429       1.134    toshii 
   1430        1.83  augustss 			usb_transfer_complete(xfer);
   1431        1.83  augustss 		}
   1432        1.83  augustss 	}
   1433        1.83  augustss 
   1434       1.119  augustss 	if (sc->sc_softwake) {
   1435       1.119  augustss 		sc->sc_softwake = 0;
   1436       1.224       mrg 		cv_broadcast(&sc->sc_softwake_cv);
   1437       1.119  augustss 	}
   1438       1.119  augustss 
   1439       1.105  augustss 	DPRINTFN(10,("ohci_softintr: done:\n"));
   1440         1.1  augustss }
   1441         1.1  augustss 
   1442         1.1  augustss void
   1443       1.179  christos ohci_device_ctrl_done(usbd_xfer_handle xfer)
   1444         1.1  augustss {
   1445   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
   1446       1.224       mrg #ifdef DIAGNOSTIC
   1447   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   1448       1.224       mrg #endif
   1449   1.254.2.7     skrll 	int len = UGETW(xfer->ux_request.wLength);
   1450   1.254.2.7     skrll 	int isread = (xfer->ux_request.bmRequestType & UT_READ);
   1451       1.195    bouyer 
   1452       1.140      gson 	DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
   1453         1.1  augustss 
   1454   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1455       1.224       mrg 
   1456        1.38  augustss #ifdef DIAGNOSTIC
   1457   1.254.2.7     skrll 	if (!(xfer->ux_rqflags & URQ_REQUEST)) {
   1458       1.140      gson 		panic("ohci_device_ctrl_done: not a request");
   1459         1.1  augustss 	}
   1460        1.38  augustss #endif
   1461       1.195    bouyer 	if (len)
   1462   1.254.2.7     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   1463       1.195    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1464       1.195    bouyer 	 usb_syncmem(&opipe->u.ctl.reqdma, 0,
   1465       1.195    bouyer 	     sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   1466         1.1  augustss }
   1467         1.1  augustss 
   1468         1.1  augustss void
   1469        1.91  augustss ohci_device_intr_done(usbd_xfer_handle xfer)
   1470         1.1  augustss {
   1471   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
   1472   1.254.2.7     skrll 	ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
   1473         1.1  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   1474        1.48  augustss 	ohci_soft_td_t *data, *tail;
   1475       1.195    bouyer 	int isread =
   1476   1.254.2.7     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1477         1.1  augustss 
   1478       1.140      gson 	DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
   1479   1.254.2.7     skrll 		     xfer, xfer->ux_actlen));
   1480         1.1  augustss 
   1481   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1482       1.224       mrg 
   1483   1.254.2.7     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1484       1.195    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1485   1.254.2.7     skrll 	if (xfer->ux_pipe->up_repeat) {
   1486        1.60  augustss 		data = opipe->tail.td;
   1487         1.1  augustss 		tail = ohci_alloc_std(sc); /* XXX should reuse TD */
   1488        1.53  augustss 		if (tail == NULL) {
   1489   1.254.2.7     skrll 			xfer->ux_status = USBD_NOMEM;
   1490         1.1  augustss 			return;
   1491         1.1  augustss 		}
   1492        1.55  augustss 		tail->xfer = NULL;
   1493       1.120  augustss 
   1494       1.168  augustss 		data->td.td_flags = HTOO32(
   1495       1.120  augustss 			OHCI_TD_IN | OHCI_TD_NOCC |
   1496        1.16  augustss 			OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
   1497   1.254.2.7     skrll 		if (xfer->ux_flags & USBD_SHORT_XFER_OK)
   1498       1.168  augustss 			data->td.td_flags |= HTOO32(OHCI_TD_R);
   1499   1.254.2.7     skrll 		data->td.td_cbp = HTOO32(DMAADDR(&xfer->ux_dmabuf, 0));
   1500        1.48  augustss 		data->nexttd = tail;
   1501       1.168  augustss 		data->td.td_nexttd = HTOO32(tail->physaddr);
   1502       1.168  augustss 		data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
   1503   1.254.2.7     skrll 			xfer->ux_length - 1);
   1504   1.254.2.7     skrll 		data->len = xfer->ux_length;
   1505        1.53  augustss 		data->xfer = xfer;
   1506        1.48  augustss 		data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
   1507       1.195    bouyer 		usb_syncmem(&data->dma, data->offs, sizeof(data->td),
   1508       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1509   1.254.2.7     skrll 		xfer->ux_hcpriv = data;
   1510   1.254.2.7     skrll 		xfer->ux_actlen = 0;
   1511         1.1  augustss 
   1512       1.168  augustss 		sed->ed.ed_tailp = HTOO32(tail->physaddr);
   1513       1.195    bouyer 		usb_syncmem(&sed->dma,
   1514       1.195    bouyer 		    sed->offs + offsetof(ohci_ed_t, ed_tailp),
   1515       1.195    bouyer 		    sizeof(sed->ed.ed_tailp),
   1516       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1517        1.60  augustss 		opipe->tail.td = tail;
   1518         1.1  augustss 	}
   1519         1.1  augustss }
   1520         1.1  augustss 
   1521         1.1  augustss void
   1522       1.179  christos ohci_device_bulk_done(usbd_xfer_handle xfer)
   1523         1.3  augustss {
   1524       1.224       mrg #ifdef DIAGNOSTIC
   1525   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   1526       1.224       mrg #endif
   1527       1.195    bouyer 	int isread =
   1528   1.254.2.7     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1529       1.195    bouyer 
   1530       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1531       1.224       mrg 
   1532       1.140      gson 	DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
   1533   1.254.2.7     skrll 		     xfer, xfer->ux_actlen));
   1534   1.254.2.7     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1535       1.195    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1536         1.3  augustss }
   1537         1.3  augustss 
   1538       1.224       mrg Static void
   1539       1.224       mrg ohci_rhsc_softint(void *arg)
   1540       1.224       mrg {
   1541       1.224       mrg 	ohci_softc_t *sc = arg;
   1542       1.224       mrg 
   1543       1.224       mrg 	mutex_enter(&sc->sc_lock);
   1544       1.224       mrg 
   1545       1.224       mrg 	ohci_rhsc(sc, sc->sc_intrxfer);
   1546       1.224       mrg 
   1547       1.224       mrg 	/* Do not allow RHSC interrupts > 1 per second */
   1548       1.224       mrg 	callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
   1549       1.224       mrg 
   1550       1.224       mrg 	mutex_exit(&sc->sc_lock);
   1551       1.224       mrg }
   1552       1.224       mrg 
   1553         1.3  augustss void
   1554        1.91  augustss ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
   1555         1.1  augustss {
   1556         1.1  augustss 	u_char *p;
   1557         1.1  augustss 	int i, m;
   1558       1.243    martin 	int hstatus __unused;
   1559         1.1  augustss 
   1560       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1561       1.224       mrg 
   1562         1.1  augustss 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
   1563       1.120  augustss 	DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
   1564        1.53  augustss 		 sc, xfer, hstatus));
   1565         1.1  augustss 
   1566        1.53  augustss 	if (xfer == NULL) {
   1567         1.1  augustss 		/* Just ignore the change. */
   1568         1.1  augustss 		return;
   1569         1.1  augustss 	}
   1570         1.1  augustss 
   1571   1.254.2.7     skrll 	p = xfer->ux_buf;
   1572   1.254.2.7     skrll 	m = min(sc->sc_noport, xfer->ux_length * 8 - 1);
   1573   1.254.2.7     skrll 	memset(p, 0, xfer->ux_length);
   1574         1.1  augustss 	for (i = 1; i <= m; i++) {
   1575        1.87  augustss 		/* Pick out CHANGE bits from the status reg. */
   1576         1.1  augustss 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
   1577         1.1  augustss 			p[i/8] |= 1 << (i%8);
   1578         1.1  augustss 	}
   1579         1.1  augustss 	DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
   1580   1.254.2.7     skrll 	xfer->ux_actlen = xfer->ux_length;
   1581   1.254.2.7     skrll 	xfer->ux_status = USBD_NORMAL_COMPLETION;
   1582         1.1  augustss 
   1583        1.53  augustss 	usb_transfer_complete(xfer);
   1584        1.38  augustss }
   1585        1.38  augustss 
   1586        1.38  augustss void
   1587       1.179  christos ohci_root_intr_done(usbd_xfer_handle xfer)
   1588        1.65  augustss {
   1589        1.65  augustss }
   1590        1.65  augustss 
   1591        1.65  augustss void
   1592       1.179  christos ohci_root_ctrl_done(usbd_xfer_handle xfer)
   1593        1.38  augustss {
   1594         1.1  augustss }
   1595         1.1  augustss 
   1596         1.1  augustss /*
   1597         1.1  augustss  * Wait here until controller claims to have an interrupt.
   1598         1.1  augustss  * Then call ohci_intr and return.  Use timeout to avoid waiting
   1599         1.1  augustss  * too long.
   1600         1.1  augustss  */
   1601         1.1  augustss void
   1602        1.91  augustss ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
   1603         1.1  augustss {
   1604       1.163  augustss 	int timo;
   1605   1.254.2.1     skrll 	uint32_t intrs;
   1606         1.1  augustss 
   1607       1.224       mrg 	mutex_enter(&sc->sc_lock);
   1608       1.224       mrg 
   1609   1.254.2.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   1610   1.254.2.7     skrll 	for (timo = xfer->ux_timeout; timo >= 0; timo--) {
   1611        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1612       1.116  augustss 		if (sc->sc_dying)
   1613       1.116  augustss 			break;
   1614         1.1  augustss 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
   1615        1.27  augustss 		DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
   1616        1.52  augustss #ifdef OHCI_DEBUG
   1617         1.1  augustss 		if (ohcidebug > 15)
   1618         1.1  augustss 			ohci_dumpregs(sc);
   1619         1.1  augustss #endif
   1620         1.1  augustss 		if (intrs) {
   1621       1.224       mrg 			mutex_spin_enter(&sc->sc_intr_lock);
   1622        1.53  augustss 			ohci_intr1(sc);
   1623       1.224       mrg 			mutex_spin_exit(&sc->sc_intr_lock);
   1624   1.254.2.7     skrll 			if (xfer->ux_status != USBD_IN_PROGRESS)
   1625       1.230  jmcneill 				goto done;
   1626         1.1  augustss 		}
   1627         1.1  augustss 	}
   1628        1.15  augustss 
   1629        1.15  augustss 	/* Timeout */
   1630         1.1  augustss 	DPRINTF(("ohci_waitintr: timeout\n"));
   1631   1.254.2.7     skrll 	xfer->ux_status = USBD_TIMEOUT;
   1632        1.53  augustss 	usb_transfer_complete(xfer);
   1633       1.224       mrg 
   1634        1.15  augustss 	/* XXX should free TD */
   1635       1.224       mrg 
   1636       1.230  jmcneill done:
   1637       1.224       mrg 	mutex_exit(&sc->sc_lock);
   1638         1.5  augustss }
   1639         1.5  augustss 
   1640         1.5  augustss void
   1641        1.91  augustss ohci_poll(struct usbd_bus *bus)
   1642         1.5  augustss {
   1643   1.254.2.7     skrll 	ohci_softc_t *sc = bus->ub_hcpriv;
   1644       1.105  augustss #ifdef OHCI_DEBUG
   1645       1.105  augustss 	static int last;
   1646       1.105  augustss 	int new;
   1647       1.105  augustss 	new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1648       1.105  augustss 	if (new != last) {
   1649       1.105  augustss 		DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
   1650       1.105  augustss 		last = new;
   1651       1.105  augustss 	}
   1652       1.105  augustss #endif
   1653       1.217  jmcneill 	sc->sc_eintrs |= OHCI_WDH;
   1654       1.224       mrg 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
   1655       1.224       mrg 		mutex_spin_enter(&sc->sc_intr_lock);
   1656        1.53  augustss 		ohci_intr1(sc);
   1657       1.224       mrg 		mutex_spin_exit(&sc->sc_intr_lock);
   1658       1.224       mrg 	}
   1659         1.1  augustss }
   1660         1.1  augustss 
   1661         1.1  augustss usbd_status
   1662        1.91  augustss ohci_device_request(usbd_xfer_handle xfer)
   1663         1.1  augustss {
   1664   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
   1665   1.254.2.7     skrll 	usb_device_request_t *req = &xfer->ux_request;
   1666   1.254.2.7     skrll 	usbd_device_handle dev = opipe->pipe.up_dev;
   1667   1.254.2.7     skrll 	ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   1668        1.77  augustss 	ohci_soft_td_t *setup, *stat, *next, *tail;
   1669         1.1  augustss 	ohci_soft_ed_t *sed;
   1670         1.1  augustss 	int isread;
   1671         1.1  augustss 	int len;
   1672        1.53  augustss 	usbd_status err;
   1673       1.224       mrg 
   1674       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1675         1.1  augustss 
   1676         1.1  augustss 	isread = req->bmRequestType & UT_READ;
   1677         1.1  augustss 	len = UGETW(req->wLength);
   1678         1.1  augustss 
   1679        1.14  augustss 	DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
   1680        1.14  augustss 		    "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
   1681         1.1  augustss 		    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   1682   1.254.2.7     skrll 		    UGETW(req->wIndex), len, dev->ud_addr,
   1683   1.254.2.7     skrll 		    opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress));
   1684         1.1  augustss 
   1685        1.60  augustss 	setup = opipe->tail.td;
   1686         1.1  augustss 	stat = ohci_alloc_std(sc);
   1687        1.53  augustss 	if (stat == NULL) {
   1688        1.53  augustss 		err = USBD_NOMEM;
   1689         1.1  augustss 		goto bad1;
   1690         1.1  augustss 	}
   1691         1.1  augustss 	tail = ohci_alloc_std(sc);
   1692        1.53  augustss 	if (tail == NULL) {
   1693        1.53  augustss 		err = USBD_NOMEM;
   1694         1.1  augustss 		goto bad2;
   1695         1.1  augustss 	}
   1696        1.55  augustss 	tail->xfer = NULL;
   1697         1.1  augustss 
   1698         1.1  augustss 	sed = opipe->sed;
   1699         1.1  augustss 	opipe->u.ctl.length = len;
   1700         1.1  augustss 
   1701   1.254.2.7     skrll 	KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr,
   1702       1.250     skrll 	    "address ED %d pipe %d\n",
   1703   1.254.2.7     skrll 	    OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr);
   1704   1.254.2.2     skrll 	KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) ==
   1705   1.254.2.7     skrll 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize),
   1706       1.250     skrll 	    "MPL ED %d pipe %d\n",
   1707       1.250     skrll 	    OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)),
   1708   1.254.2.7     skrll 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize));
   1709         1.1  augustss 
   1710        1.77  augustss 	next = stat;
   1711        1.77  augustss 
   1712         1.1  augustss 	/* Set up data transaction */
   1713         1.1  augustss 	if (len != 0) {
   1714        1.77  augustss 		ohci_soft_td_t *std = stat;
   1715        1.77  augustss 
   1716        1.77  augustss 		err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
   1717        1.77  augustss 			  std, &stat);
   1718       1.236     skrll 		if (err) {
   1719       1.236     skrll 			/* stat is unchanged if error */
   1720       1.236     skrll 			goto bad3;
   1721       1.236     skrll 		}
   1722        1.77  augustss 		stat = stat->nexttd; /* point at free TD */
   1723       1.236     skrll 
   1724        1.77  augustss 		/* Start toggle at 1 and then use the carried toggle. */
   1725       1.168  augustss 		std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
   1726       1.168  augustss 		std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
   1727       1.195    bouyer 		usb_syncmem(&std->dma,
   1728       1.195    bouyer 		    std->offs + offsetof(ohci_td_t, td_flags),
   1729       1.195    bouyer 		    sizeof(std->td.td_flags),
   1730       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1731        1.34  augustss 	}
   1732         1.1  augustss 
   1733       1.123  augustss 	memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
   1734       1.195    bouyer 	usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
   1735         1.1  augustss 
   1736       1.168  augustss 	setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
   1737        1.76   tsutsui 				     OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
   1738       1.168  augustss 	setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
   1739         1.1  augustss 	setup->nexttd = next;
   1740       1.168  augustss 	setup->td.td_nexttd = HTOO32(next->physaddr);
   1741       1.168  augustss 	setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
   1742        1.77  augustss 	setup->len = 0;
   1743        1.53  augustss 	setup->xfer = xfer;
   1744        1.34  augustss 	setup->flags = 0;
   1745   1.254.2.7     skrll 	xfer->ux_hcpriv = setup;
   1746       1.195    bouyer 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   1747       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1748         1.1  augustss 
   1749       1.168  augustss 	stat->td.td_flags = HTOO32(
   1750        1.77  augustss 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) |
   1751        1.77  augustss 		OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
   1752        1.39  augustss 	stat->td.td_cbp = 0;
   1753         1.1  augustss 	stat->nexttd = tail;
   1754       1.168  augustss 	stat->td.td_nexttd = HTOO32(tail->physaddr);
   1755        1.39  augustss 	stat->td.td_be = 0;
   1756        1.77  augustss 	stat->flags = OHCI_CALL_DONE;
   1757         1.1  augustss 	stat->len = 0;
   1758        1.53  augustss 	stat->xfer = xfer;
   1759       1.195    bouyer 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   1760       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1761         1.1  augustss 
   1762        1.52  augustss #ifdef OHCI_DEBUG
   1763         1.1  augustss 	if (ohcidebug > 5) {
   1764        1.41  augustss 		DPRINTF(("ohci_device_request:\n"));
   1765       1.168  augustss 		ohci_dump_ed(sc, sed);
   1766       1.168  augustss 		ohci_dump_tds(sc, setup);
   1767         1.1  augustss 	}
   1768         1.1  augustss #endif
   1769         1.1  augustss 
   1770         1.1  augustss 	/* Insert ED in schedule */
   1771       1.168  augustss 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   1772       1.195    bouyer 	usb_syncmem(&sed->dma,
   1773       1.195    bouyer 	    sed->offs + offsetof(ohci_ed_t, ed_tailp),
   1774       1.195    bouyer 	    sizeof(sed->ed.ed_tailp),
   1775       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1776        1.60  augustss 	opipe->tail.td = tail;
   1777         1.1  augustss 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1778   1.254.2.7     skrll 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   1779   1.254.2.7     skrll 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   1780        1.80  augustss 			    ohci_timeout, xfer);
   1781        1.15  augustss 	}
   1782         1.1  augustss 
   1783       1.115    itojun #ifdef OHCI_DEBUG
   1784       1.113  augustss 	if (ohcidebug > 20) {
   1785        1.77  augustss 		delay(10000);
   1786        1.41  augustss 		DPRINTF(("ohci_device_request: status=%x\n",
   1787        1.41  augustss 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
   1788       1.113  augustss 		ohci_dumpregs(sc);
   1789       1.113  augustss 		printf("ctrl head:\n");
   1790       1.168  augustss 		ohci_dump_ed(sc, sc->sc_ctrl_head);
   1791       1.113  augustss 		printf("sed:\n");
   1792       1.168  augustss 		ohci_dump_ed(sc, sed);
   1793       1.168  augustss 		ohci_dump_tds(sc, setup);
   1794         1.1  augustss 	}
   1795         1.1  augustss #endif
   1796         1.1  augustss 
   1797         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   1798         1.1  augustss 
   1799         1.1  augustss  bad3:
   1800         1.1  augustss 	ohci_free_std(sc, tail);
   1801         1.1  augustss  bad2:
   1802         1.1  augustss 	ohci_free_std(sc, stat);
   1803         1.1  augustss  bad1:
   1804        1.53  augustss 	return (err);
   1805         1.1  augustss }
   1806         1.1  augustss 
   1807         1.1  augustss /*
   1808       1.224       mrg  * Add an ED to the schedule.  Called with USB lock held.
   1809         1.1  augustss  */
   1810       1.224       mrg Static void
   1811       1.168  augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1812         1.1  augustss {
   1813       1.113  augustss 	DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
   1814       1.113  augustss 
   1815       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1816       1.224       mrg 
   1817       1.195    bouyer 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1818       1.195    bouyer 	    sizeof(head->ed.ed_nexted),
   1819       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1820         1.1  augustss 	sed->next = head->next;
   1821        1.39  augustss 	sed->ed.ed_nexted = head->ed.ed_nexted;
   1822       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1823       1.195    bouyer 	    sizeof(sed->ed.ed_nexted),
   1824       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1825         1.1  augustss 	head->next = sed;
   1826       1.168  augustss 	head->ed.ed_nexted = HTOO32(sed->physaddr);
   1827       1.195    bouyer 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1828       1.195    bouyer 	    sizeof(head->ed.ed_nexted),
   1829       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1830         1.1  augustss }
   1831         1.1  augustss 
   1832         1.1  augustss /*
   1833       1.224       mrg  * Remove an ED from the schedule.  Called with USB lock held.
   1834         1.3  augustss  */
   1835       1.224       mrg Static void
   1836       1.224       mrg ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1837         1.3  augustss {
   1838       1.120  augustss 	ohci_soft_ed_t *p;
   1839         1.3  augustss 
   1840       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1841       1.224       mrg 
   1842         1.3  augustss 	/* XXX */
   1843       1.133    toshii 	for (p = head; p != NULL && p->next != sed; p = p->next)
   1844         1.3  augustss 		;
   1845        1.55  augustss 	if (p == NULL)
   1846       1.128    provos 		panic("ohci_rem_ed: ED not found");
   1847       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1848       1.195    bouyer 	    sizeof(sed->ed.ed_nexted),
   1849       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1850         1.3  augustss 	p->next = sed->next;
   1851        1.39  augustss 	p->ed.ed_nexted = sed->ed.ed_nexted;
   1852       1.195    bouyer 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   1853       1.195    bouyer 	    sizeof(p->ed.ed_nexted),
   1854       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1855         1.3  augustss }
   1856         1.3  augustss 
   1857         1.3  augustss /*
   1858         1.1  augustss  * When a transfer is completed the TD is added to the done queue by
   1859         1.1  augustss  * the host controller.  This queue is the processed by software.
   1860         1.1  augustss  * Unfortunately the queue contains the physical address of the TD
   1861         1.9  augustss  * and we have no simple way to translate this back to a kernel address.
   1862         1.1  augustss  * To make the translation possible (and fast) we use a hash table of
   1863         1.1  augustss  * TDs currently in the schedule.  The physical address is used as the
   1864         1.1  augustss  * hash value.
   1865         1.1  augustss  */
   1866         1.1  augustss 
   1867         1.1  augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
   1868       1.224       mrg /* Called with USB lock held. */
   1869         1.1  augustss void
   1870        1.91  augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1871         1.1  augustss {
   1872         1.1  augustss 	int h = HASH(std->physaddr);
   1873         1.1  augustss 
   1874   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1875       1.224       mrg 
   1876         1.1  augustss 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
   1877         1.1  augustss }
   1878         1.1  augustss 
   1879       1.224       mrg /* Called with USB lock held. */
   1880         1.1  augustss void
   1881       1.179  christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1882         1.1  augustss {
   1883        1.46  augustss 
   1884   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1885       1.224       mrg 
   1886         1.1  augustss 	LIST_REMOVE(std, hnext);
   1887         1.1  augustss }
   1888         1.1  augustss 
   1889         1.1  augustss ohci_soft_td_t *
   1890        1.91  augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
   1891         1.1  augustss {
   1892         1.1  augustss 	int h = HASH(a);
   1893         1.1  augustss 	ohci_soft_td_t *std;
   1894         1.1  augustss 
   1895       1.120  augustss 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
   1896        1.53  augustss 	     std != NULL;
   1897         1.1  augustss 	     std = LIST_NEXT(std, hnext))
   1898         1.1  augustss 		if (std->physaddr == a)
   1899         1.1  augustss 			return (std);
   1900        1.83  augustss 	return (NULL);
   1901        1.83  augustss }
   1902        1.83  augustss 
   1903       1.224       mrg /* Called with USB lock held. */
   1904        1.83  augustss void
   1905        1.91  augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1906        1.83  augustss {
   1907        1.83  augustss 	int h = HASH(sitd->physaddr);
   1908        1.83  augustss 
   1909       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1910       1.224       mrg 
   1911       1.120  augustss 	DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
   1912        1.83  augustss 		    sitd, (u_long)sitd->physaddr));
   1913        1.83  augustss 
   1914        1.83  augustss 	LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
   1915        1.83  augustss }
   1916        1.83  augustss 
   1917       1.224       mrg /* Called with USB lock held. */
   1918        1.83  augustss void
   1919       1.179  christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1920        1.83  augustss {
   1921        1.83  augustss 
   1922       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1923       1.224       mrg 
   1924       1.120  augustss 	DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
   1925        1.83  augustss 		    sitd, (u_long)sitd->physaddr));
   1926        1.83  augustss 
   1927        1.83  augustss 	LIST_REMOVE(sitd, hnext);
   1928        1.83  augustss }
   1929        1.83  augustss 
   1930        1.83  augustss ohci_soft_itd_t *
   1931        1.91  augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
   1932        1.83  augustss {
   1933        1.83  augustss 	int h = HASH(a);
   1934        1.83  augustss 	ohci_soft_itd_t *sitd;
   1935        1.83  augustss 
   1936       1.120  augustss 	for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
   1937        1.83  augustss 	     sitd != NULL;
   1938        1.83  augustss 	     sitd = LIST_NEXT(sitd, hnext))
   1939        1.83  augustss 		if (sitd->physaddr == a)
   1940        1.83  augustss 			return (sitd);
   1941        1.83  augustss 	return (NULL);
   1942         1.1  augustss }
   1943         1.1  augustss 
   1944         1.1  augustss void
   1945        1.91  augustss ohci_timeout(void *addr)
   1946         1.1  augustss {
   1947       1.114  augustss 	struct ohci_xfer *oxfer = addr;
   1948   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.ux_pipe;
   1949   1.254.2.7     skrll 	ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
   1950       1.114  augustss 
   1951       1.114  augustss 	DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
   1952       1.114  augustss 
   1953       1.116  augustss 	if (sc->sc_dying) {
   1954       1.224       mrg 		mutex_enter(&sc->sc_lock);
   1955       1.116  augustss 		ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
   1956       1.224       mrg 		mutex_exit(&sc->sc_lock);
   1957       1.116  augustss 		return;
   1958       1.116  augustss 	}
   1959       1.116  augustss 
   1960       1.114  augustss 	/* Execute the abort in a process context. */
   1961       1.231  jmcneill 	usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr,
   1962       1.231  jmcneill 	    USB_TASKQ_MPSAFE);
   1963   1.254.2.7     skrll 	usb_add_task(oxfer->xfer.ux_pipe->up_dev, &oxfer->abort_task,
   1964       1.178     joerg 	    USB_TASKQ_HC);
   1965       1.114  augustss }
   1966       1.114  augustss 
   1967       1.114  augustss void
   1968       1.114  augustss ohci_timeout_task(void *addr)
   1969       1.114  augustss {
   1970        1.53  augustss 	usbd_xfer_handle xfer = addr;
   1971   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   1972         1.1  augustss 
   1973       1.114  augustss 	DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
   1974        1.45  augustss 
   1975       1.224       mrg 	mutex_enter(&sc->sc_lock);
   1976        1.54  augustss 	ohci_abort_xfer(xfer, USBD_TIMEOUT);
   1977       1.224       mrg 	mutex_exit(&sc->sc_lock);
   1978         1.1  augustss }
   1979         1.1  augustss 
   1980        1.52  augustss #ifdef OHCI_DEBUG
   1981         1.1  augustss void
   1982       1.168  augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
   1983         1.1  augustss {
   1984         1.1  augustss 	for (; std; std = std->nexttd)
   1985       1.168  augustss 		ohci_dump_td(sc, std);
   1986         1.1  augustss }
   1987         1.1  augustss 
   1988         1.1  augustss void
   1989       1.168  augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1990         1.1  augustss {
   1991        1.92        tv 	char sbuf[128];
   1992        1.92        tv 
   1993       1.204    martin 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1994       1.204    martin 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1995       1.197  christos 	snprintb(sbuf, sizeof(sbuf),
   1996       1.237     skrll 	    "\177\20"
   1997       1.237     skrll 	    "b\22R\0"
   1998       1.237     skrll 	    "f\23\02DP\0"
   1999       1.237     skrll 		"=\x0" "setup\0"
   2000       1.237     skrll 		"=\x1" "out\0"
   2001       1.237     skrll 		"=\x2" "in\0"
   2002       1.237     skrll 		"=\x3" "reserved\0"
   2003       1.237     skrll 	    "f\25\03DI\0"
   2004       1.237     skrll 		"=\x07" "none\0"
   2005       1.237     skrll 	    "f\30\02T\0"
   2006       1.237     skrll 		"=\x0" "carry\0"
   2007       1.237     skrll 		"=\x1" "carry\0"
   2008       1.237     skrll 		"=\x2" "0\0"
   2009       1.237     skrll 		"=\x3" "1\0"
   2010       1.237     skrll 	    "f\32\02EC\0"
   2011       1.237     skrll 	    "f\34\04CC\0",
   2012   1.254.2.1     skrll 	    (uint32_t)O32TOH(std->td.td_flags));
   2013       1.238     skrll 	printf("TD(%p) at %08lx:\n\tflags=%s\n\tcbp=0x%08lx nexttd=0x%08lx be=0x%08lx\n",
   2014       1.107  augustss 	       std, (u_long)std->physaddr, sbuf,
   2015       1.168  augustss 	       (u_long)O32TOH(std->td.td_cbp),
   2016       1.168  augustss 	       (u_long)O32TOH(std->td.td_nexttd),
   2017       1.168  augustss 	       (u_long)O32TOH(std->td.td_be));
   2018         1.1  augustss }
   2019         1.1  augustss 
   2020         1.1  augustss void
   2021       1.168  augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   2022        1.83  augustss {
   2023        1.83  augustss 	int i;
   2024        1.83  augustss 
   2025       1.195    bouyer 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   2026       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2027       1.107  augustss 	printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
   2028       1.120  augustss 	       "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
   2029       1.107  augustss 	       sitd, (u_long)sitd->physaddr,
   2030       1.168  augustss 	       OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
   2031       1.168  augustss 	       OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
   2032       1.168  augustss 	       OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
   2033       1.168  augustss 	       OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
   2034       1.168  augustss 	       (u_long)O32TOH(sitd->itd.itd_bp0),
   2035       1.168  augustss 	       (u_long)O32TOH(sitd->itd.itd_nextitd),
   2036       1.168  augustss 	       (u_long)O32TOH(sitd->itd.itd_be));
   2037        1.83  augustss 	for (i = 0; i < OHCI_ITD_NOFFSET; i++)
   2038       1.107  augustss 		printf("offs[%d]=0x%04x ", i,
   2039       1.168  augustss 		       (u_int)O16TOH(sitd->itd.itd_offset[i]));
   2040       1.107  augustss 	printf("\n");
   2041        1.83  augustss }
   2042        1.83  augustss 
   2043        1.83  augustss void
   2044       1.168  augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   2045        1.83  augustss {
   2046        1.83  augustss 	for (; sitd; sitd = sitd->nextitd)
   2047       1.168  augustss 		ohci_dump_itd(sc, sitd);
   2048        1.83  augustss }
   2049        1.83  augustss 
   2050        1.83  augustss void
   2051       1.168  augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
   2052         1.1  augustss {
   2053        1.92        tv 	char sbuf[128], sbuf2[128];
   2054        1.92        tv 
   2055       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2056       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2057       1.197  christos 	snprintb(sbuf, sizeof(sbuf),
   2058       1.197  christos 	    "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
   2059   1.254.2.1     skrll 	    (uint32_t)O32TOH(sed->ed.ed_flags));
   2060       1.197  christos 	snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY",
   2061   1.254.2.1     skrll 	    (uint32_t)O32TOH(sed->ed.ed_headp));
   2062        1.92        tv 
   2063       1.107  augustss 	printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
   2064        1.92        tv 		 "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
   2065       1.120  augustss 		 sed, (u_long)sed->physaddr,
   2066       1.168  augustss 		 OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
   2067       1.168  augustss 		 OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
   2068       1.168  augustss 		 OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
   2069       1.168  augustss 		 (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
   2070       1.168  augustss 		 (u_long)O32TOH(sed->ed.ed_headp),
   2071       1.168  augustss 		 (u_long)O32TOH(sed->ed.ed_nexted));
   2072         1.1  augustss }
   2073         1.1  augustss #endif
   2074         1.1  augustss 
   2075         1.1  augustss usbd_status
   2076        1.91  augustss ohci_open(usbd_pipe_handle pipe)
   2077         1.1  augustss {
   2078   1.254.2.7     skrll 	usbd_device_handle dev = pipe->up_dev;
   2079   1.254.2.7     skrll 	ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2080   1.254.2.7     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
   2081         1.1  augustss 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2082   1.254.2.7     skrll 	uint8_t addr = dev->ud_addr;
   2083   1.254.2.1     skrll 	uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   2084         1.1  augustss 	ohci_soft_ed_t *sed;
   2085         1.1  augustss 	ohci_soft_td_t *std;
   2086        1.60  augustss 	ohci_soft_itd_t *sitd;
   2087        1.60  augustss 	ohci_physaddr_t tdphys;
   2088   1.254.2.1     skrll 	uint32_t fmt;
   2089       1.224       mrg 	usbd_status err = USBD_NOMEM;
   2090        1.64  augustss 	int ival;
   2091         1.1  augustss 
   2092         1.1  augustss 	DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
   2093         1.1  augustss 		     pipe, addr, ed->bEndpointAddress, sc->sc_addr));
   2094        1.81  augustss 
   2095       1.224       mrg 	if (sc->sc_dying) {
   2096       1.241     skrll 		return USBD_IOERROR;
   2097       1.224       mrg 	}
   2098       1.116  augustss 
   2099        1.90   thorpej 	std = NULL;
   2100        1.90   thorpej 	sed = NULL;
   2101        1.90   thorpej 
   2102         1.1  augustss 	if (addr == sc->sc_addr) {
   2103         1.1  augustss 		switch (ed->bEndpointAddress) {
   2104         1.1  augustss 		case USB_CONTROL_ENDPOINT:
   2105   1.254.2.7     skrll 			pipe->up_methods = &ohci_root_ctrl_methods;
   2106         1.1  augustss 			break;
   2107        1.40  augustss 		case UE_DIR_IN | OHCI_INTR_ENDPT:
   2108   1.254.2.7     skrll 			pipe->up_methods = &ohci_root_intr_methods;
   2109         1.1  augustss 			break;
   2110         1.1  augustss 		default:
   2111       1.224       mrg 			err = USBD_INVAL;
   2112       1.241     skrll 			goto bad;
   2113         1.1  augustss 		}
   2114         1.1  augustss 	} else {
   2115         1.1  augustss 		sed = ohci_alloc_sed(sc);
   2116        1.53  augustss 		if (sed == NULL)
   2117       1.241     skrll 			goto bad;
   2118         1.1  augustss 		opipe->sed = sed;
   2119        1.60  augustss 		if (xfertype == UE_ISOCHRONOUS) {
   2120       1.224       mrg 			mutex_enter(&sc->sc_lock);
   2121        1.60  augustss 			sitd = ohci_alloc_sitd(sc);
   2122       1.224       mrg 			mutex_exit(&sc->sc_lock);
   2123       1.127  augustss 			if (sitd == NULL)
   2124       1.241     skrll 				goto bad;
   2125       1.241     skrll 
   2126        1.60  augustss 			opipe->tail.itd = sitd;
   2127        1.76   tsutsui 			tdphys = sitd->physaddr;
   2128        1.60  augustss 			fmt = OHCI_ED_FORMAT_ISO;
   2129        1.83  augustss 			if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
   2130        1.83  augustss 				fmt |= OHCI_ED_DIR_IN;
   2131        1.83  augustss 			else
   2132        1.83  augustss 				fmt |= OHCI_ED_DIR_OUT;
   2133        1.60  augustss 		} else {
   2134       1.224       mrg 			mutex_enter(&sc->sc_lock);
   2135        1.60  augustss 			std = ohci_alloc_std(sc);
   2136       1.224       mrg 			mutex_exit(&sc->sc_lock);
   2137       1.127  augustss 			if (std == NULL)
   2138       1.241     skrll 				goto bad;
   2139       1.241     skrll 
   2140        1.60  augustss 			opipe->tail.td = std;
   2141        1.76   tsutsui 			tdphys = std->physaddr;
   2142        1.83  augustss 			fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
   2143        1.60  augustss 		}
   2144       1.168  augustss 		sed->ed.ed_flags = HTOO32(
   2145       1.120  augustss 			OHCI_ED_SET_FA(addr) |
   2146       1.147   mycroft 			OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
   2147   1.254.2.7     skrll 			(dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
   2148       1.109  augustss 			fmt |
   2149        1.16  augustss 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
   2150       1.214  jakllsch 		sed->ed.ed_headp = HTOO32(tdphys |
   2151   1.254.2.7     skrll 		    (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0));
   2152       1.214  jakllsch 		sed->ed.ed_tailp = HTOO32(tdphys);
   2153       1.195    bouyer 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2154       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2155         1.1  augustss 
   2156        1.60  augustss 		switch (xfertype) {
   2157         1.1  augustss 		case UE_CONTROL:
   2158   1.254.2.7     skrll 			pipe->up_methods = &ohci_device_ctrl_methods;
   2159       1.120  augustss 			err = usb_allocmem(&sc->sc_bus,
   2160       1.120  augustss 				  sizeof(usb_device_request_t),
   2161        1.53  augustss 				  0, &opipe->u.ctl.reqdma);
   2162        1.53  augustss 			if (err)
   2163         1.1  augustss 				goto bad;
   2164       1.224       mrg 			mutex_enter(&sc->sc_lock);
   2165       1.168  augustss 			ohci_add_ed(sc, sed, sc->sc_ctrl_head);
   2166       1.224       mrg 			mutex_exit(&sc->sc_lock);
   2167         1.1  augustss 			break;
   2168         1.1  augustss 		case UE_INTERRUPT:
   2169   1.254.2.7     skrll 			pipe->up_methods = &ohci_device_intr_methods;
   2170   1.254.2.7     skrll 			ival = pipe->up_interval;
   2171        1.64  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   2172        1.64  augustss 				ival = ed->bInterval;
   2173       1.226     skrll 			err = ohci_device_setintr(sc, opipe, ival);
   2174       1.226     skrll 			if (err)
   2175       1.226     skrll 				goto bad;
   2176       1.226     skrll 			break;
   2177         1.1  augustss 		case UE_ISOCHRONOUS:
   2178   1.254.2.7     skrll 			pipe->up_methods = &ohci_device_isoc_methods;
   2179        1.60  augustss 			return (ohci_setup_isoc(pipe));
   2180         1.1  augustss 		case UE_BULK:
   2181   1.254.2.7     skrll 			pipe->up_methods = &ohci_device_bulk_methods;
   2182       1.224       mrg 			mutex_enter(&sc->sc_lock);
   2183       1.168  augustss 			ohci_add_ed(sc, sed, sc->sc_bulk_head);
   2184       1.224       mrg 			mutex_exit(&sc->sc_lock);
   2185         1.3  augustss 			break;
   2186         1.1  augustss 		}
   2187         1.1  augustss 	}
   2188       1.224       mrg 
   2189       1.224       mrg 	return USBD_NORMAL_COMPLETION;
   2190         1.1  augustss 
   2191         1.1  augustss  bad:
   2192       1.241     skrll 	if (std != NULL) {
   2193       1.241     skrll 		mutex_enter(&sc->sc_lock);
   2194        1.90   thorpej 		ohci_free_std(sc, std);
   2195       1.241     skrll 		mutex_exit(&sc->sc_lock);
   2196       1.241     skrll 	}
   2197        1.90   thorpej 	if (sed != NULL)
   2198        1.90   thorpej 		ohci_free_sed(sc, sed);
   2199       1.224       mrg 	return err;
   2200       1.120  augustss 
   2201         1.1  augustss }
   2202         1.1  augustss 
   2203         1.1  augustss /*
   2204        1.34  augustss  * Close a reqular pipe.
   2205        1.34  augustss  * Assumes that there are no pending transactions.
   2206        1.34  augustss  */
   2207        1.34  augustss void
   2208        1.91  augustss ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
   2209        1.34  augustss {
   2210        1.34  augustss 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2211   1.254.2.7     skrll 	ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   2212        1.34  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   2213        1.34  augustss 
   2214       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2215       1.224       mrg 
   2216        1.34  augustss #ifdef DIAGNOSTIC
   2217       1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   2218       1.168  augustss 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2219       1.168  augustss 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
   2220        1.34  augustss 		ohci_soft_td_t *std;
   2221       1.168  augustss 		std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
   2222        1.34  augustss 		printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
   2223        1.34  augustss 		       "tl=0x%x pipe=%p, std=%p\n", sed,
   2224       1.168  augustss 		       (int)O32TOH(sed->ed.ed_headp),
   2225       1.168  augustss 		       (int)O32TOH(sed->ed.ed_tailp),
   2226        1.34  augustss 		       pipe, std);
   2227       1.229  christos #ifdef OHCI_DEBUG
   2228       1.107  augustss 		usbd_dump_pipe(&opipe->pipe);
   2229       1.168  augustss 		ohci_dump_ed(sc, sed);
   2230       1.106  augustss 		if (std)
   2231       1.168  augustss 			ohci_dump_td(sc, std);
   2232       1.106  augustss #endif
   2233        1.34  augustss 		usb_delay_ms(&sc->sc_bus, 2);
   2234       1.168  augustss 		if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2235       1.168  augustss 		    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   2236        1.34  augustss 			printf("ohci_close_pipe: pipe still not empty\n");
   2237        1.34  augustss 	}
   2238        1.34  augustss #endif
   2239       1.224       mrg 	ohci_rem_ed(sc, sed, head);
   2240       1.133    toshii 	/* Make sure the host controller is not touching this ED */
   2241       1.133    toshii 	usb_delay_ms(&sc->sc_bus, 1);
   2242   1.254.2.7     skrll 	pipe->up_endpoint->ue_toggle =
   2243       1.214  jakllsch 	    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
   2244        1.34  augustss 	ohci_free_sed(sc, opipe->sed);
   2245        1.34  augustss }
   2246        1.34  augustss 
   2247       1.120  augustss /*
   2248        1.34  augustss  * Abort a device request.
   2249        1.34  augustss  * If this routine is called at splusb() it guarantees that the request
   2250        1.34  augustss  * will be removed from the hardware scheduling and that the callback
   2251        1.34  augustss  * for it will be called with USBD_CANCELLED status.
   2252        1.34  augustss  * It's impossible to guarantee that the requested transfer will not
   2253        1.34  augustss  * have happened since the hardware runs concurrently.
   2254        1.34  augustss  * If the transaction has already happened we rely on the ordinary
   2255        1.34  augustss  * interrupt processing to process it.
   2256       1.224       mrg  * XXX This is most probably wrong.
   2257       1.224       mrg  * XXXMRG this doesn't make sense anymore.
   2258        1.34  augustss  */
   2259        1.34  augustss void
   2260        1.91  augustss ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
   2261        1.34  augustss {
   2262   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
   2263   1.254.2.7     skrll 	ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
   2264       1.106  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   2265       1.106  augustss 	ohci_soft_td_t *p, *n;
   2266       1.106  augustss 	ohci_physaddr_t headp;
   2267       1.224       mrg 	int hit;
   2268       1.159  augustss 	int wake;
   2269        1.34  augustss 
   2270       1.106  augustss 	DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
   2271        1.34  augustss 
   2272       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2273   1.254.2.3     skrll 	ASSERT_SLEEPABLE();
   2274       1.224       mrg 
   2275       1.116  augustss 	if (sc->sc_dying) {
   2276       1.116  augustss 		/* If we're dying, just do the software part. */
   2277   1.254.2.7     skrll 		xfer->ux_status = status;	/* make software ignore it */
   2278   1.254.2.7     skrll 		callout_halt(&xfer->ux_callout, &sc->sc_lock);
   2279       1.116  augustss 		usb_transfer_complete(xfer);
   2280       1.170  christos 		return;
   2281       1.116  augustss 	}
   2282       1.116  augustss 
   2283       1.106  augustss 	/*
   2284       1.159  augustss 	 * If an abort is already in progress then just wait for it to
   2285       1.159  augustss 	 * complete and return.
   2286       1.159  augustss 	 */
   2287   1.254.2.7     skrll 	if (xfer->ux_hcflags & UXFER_ABORTING) {
   2288       1.159  augustss 		DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
   2289       1.159  augustss #ifdef DIAGNOSTIC
   2290       1.159  augustss 		if (status == USBD_TIMEOUT)
   2291       1.235     skrll 			printf("%s: TIMEOUT while aborting\n", __func__);
   2292       1.159  augustss #endif
   2293       1.159  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2294   1.254.2.7     skrll 		xfer->ux_status = status;
   2295       1.159  augustss 		DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
   2296   1.254.2.7     skrll 		xfer->ux_hcflags |= UXFER_ABORTWAIT;
   2297   1.254.2.7     skrll 		while (xfer->ux_hcflags & UXFER_ABORTING)
   2298   1.254.2.7     skrll 			cv_wait(&xfer->ux_hccv, &sc->sc_lock);
   2299       1.224       mrg 		goto done;
   2300       1.159  augustss 	}
   2301   1.254.2.7     skrll 	xfer->ux_hcflags |= UXFER_ABORTING;
   2302       1.159  augustss 
   2303       1.159  augustss 	/*
   2304       1.106  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2305       1.106  augustss 	 */
   2306   1.254.2.7     skrll 	xfer->ux_status = status;	/* make software ignore it */
   2307   1.254.2.7     skrll 	callout_stop(&xfer->ux_callout);
   2308        1.54  augustss 	DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
   2309       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2310       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2311       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2312       1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   2313       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2314       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2315       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2316        1.34  augustss 
   2317       1.120  augustss 	/*
   2318       1.106  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2319       1.106  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2320       1.106  augustss 	 * has run.
   2321       1.106  augustss 	 */
   2322       1.224       mrg 	/* Hardware finishes in 1ms */
   2323   1.254.2.7     skrll 	usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock);
   2324       1.119  augustss 	sc->sc_softwake = 1;
   2325       1.119  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2326       1.224       mrg 	cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
   2327       1.119  augustss 
   2328       1.120  augustss 	/*
   2329       1.106  augustss 	 * Step 3: Remove any vestiges of the xfer from the hardware.
   2330       1.106  augustss 	 * The complication here is that the hardware may have executed
   2331       1.106  augustss 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2332       1.106  augustss 	 * the TDs of this xfer we check if the hardware points to
   2333       1.106  augustss 	 * any of them.
   2334       1.106  augustss 	 */
   2335   1.254.2.7     skrll 	p = xfer->ux_hcpriv;
   2336        1.34  augustss #ifdef DIAGNOSTIC
   2337        1.55  augustss 	if (p == NULL) {
   2338   1.254.2.7     skrll 		xfer->ux_hcflags &= ~UXFER_ABORTING; /* XXX */
   2339       1.106  augustss 		printf("ohci_abort_xfer: hcpriv is NULL\n");
   2340       1.224       mrg 		goto done;
   2341        1.38  augustss 	}
   2342        1.34  augustss #endif
   2343       1.106  augustss #ifdef OHCI_DEBUG
   2344       1.106  augustss 	if (ohcidebug > 1) {
   2345       1.106  augustss 		DPRINTF(("ohci_abort_xfer: sed=\n"));
   2346       1.168  augustss 		ohci_dump_ed(sc, sed);
   2347       1.168  augustss 		ohci_dump_tds(sc, p);
   2348       1.106  augustss 	}
   2349       1.106  augustss #endif
   2350       1.168  augustss 	headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
   2351       1.106  augustss 	hit = 0;
   2352        1.53  augustss 	for (; p->xfer == xfer; p = n) {
   2353       1.106  augustss 		hit |= headp == p->physaddr;
   2354        1.38  augustss 		n = p->nexttd;
   2355        1.38  augustss 		ohci_free_std(sc, p);
   2356        1.34  augustss 	}
   2357       1.106  augustss 	/* Zap headp register if hardware pointed inside the xfer. */
   2358       1.106  augustss 	if (hit) {
   2359       1.150   mycroft 		DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
   2360       1.168  augustss 			    (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
   2361       1.168  augustss 		sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
   2362       1.195    bouyer 		usb_syncmem(&sed->dma,
   2363       1.195    bouyer 		    sed->offs + offsetof(ohci_ed_t, ed_headp),
   2364       1.195    bouyer 		    sizeof(sed->ed.ed_headp),
   2365       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2366       1.106  augustss 	} else {
   2367       1.106  augustss 		DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
   2368       1.106  augustss 	}
   2369        1.34  augustss 
   2370       1.106  augustss 	/*
   2371       1.106  augustss 	 * Step 4: Turn on hardware again.
   2372       1.106  augustss 	 */
   2373       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2374       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2375       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2376       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   2377       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2378       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2379       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2380        1.38  augustss 
   2381       1.106  augustss 	/*
   2382       1.106  augustss 	 * Step 5: Execute callback.
   2383       1.106  augustss 	 */
   2384   1.254.2.7     skrll 	wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
   2385   1.254.2.7     skrll 	xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2386        1.53  augustss 	usb_transfer_complete(xfer);
   2387       1.159  augustss 	if (wake)
   2388   1.254.2.7     skrll 		cv_broadcast(&xfer->ux_hccv);
   2389        1.38  augustss 
   2390       1.224       mrg done:
   2391       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2392        1.34  augustss }
   2393        1.34  augustss 
   2394        1.34  augustss /*
   2395         1.1  augustss  * Data structures and routines to emulate the root hub.
   2396         1.1  augustss  */
   2397        1.82  augustss Static usb_device_descriptor_t ohci_devd = {
   2398   1.254.2.8     skrll 	.bLength = USB_DEVICE_DESCRIPTOR_SIZE,
   2399   1.254.2.8     skrll 	.bDescriptorType = UDESC_DEVICE,
   2400   1.254.2.8     skrll 	.bcdUSB = {0x00, 0x01},
   2401   1.254.2.8     skrll 	.bDeviceClass = UDCLASS_HUB,
   2402   1.254.2.8     skrll 	.bDeviceSubClass = UDSUBCLASS_HUB,
   2403   1.254.2.8     skrll 	.bDeviceProtocol = UDPROTO_FSHUB,
   2404   1.254.2.8     skrll 	.bMaxPacketSize = 64,
   2405   1.254.2.8     skrll 	.idVendor = {0},
   2406   1.254.2.8     skrll 	.idProduct = {0},
   2407   1.254.2.8     skrll 	.bcdDevice = {0x00,0x01},
   2408   1.254.2.8     skrll 	.iManufacturer = 1,
   2409   1.254.2.8     skrll 	.iProduct = 2,
   2410   1.254.2.8     skrll 	.iSerialNumber = 0,
   2411   1.254.2.8     skrll 	.bNumConfigurations = 1
   2412         1.1  augustss };
   2413         1.1  augustss 
   2414       1.182  drochner Static const usb_config_descriptor_t ohci_confd = {
   2415   1.254.2.9     skrll 	.bLength = USB_CONFIG_DESCRIPTOR_SIZE,
   2416   1.254.2.9     skrll 	.bDescriptorType = UDESC_CONFIG,
   2417  1.254.2.10     skrll 	.wTotalLength = USETWD(
   2418  1.254.2.10     skrll 	    USB_CONFIG_DESCRIPTOR_SIZE +
   2419  1.254.2.10     skrll 	    USB_INTERFACE_DESCRIPTOR_SIZE +
   2420  1.254.2.10     skrll 	    USB_ENDPOINT_DESCRIPTOR_SIZE),
   2421   1.254.2.9     skrll 	.bNumInterface = 1,
   2422   1.254.2.9     skrll 	.bConfigurationValue = 1,
   2423   1.254.2.9     skrll 	.iConfiguration = 0,
   2424   1.254.2.9     skrll 	.bmAttributes = UC_ATTR_MBO | UC_SELF_POWERED,
   2425   1.254.2.9     skrll 	.bMaxPower = 0
   2426         1.1  augustss };
   2427         1.1  augustss 
   2428       1.182  drochner Static const usb_interface_descriptor_t ohci_ifcd = {
   2429   1.254.2.9     skrll 	.bLength = USB_INTERFACE_DESCRIPTOR_SIZE,
   2430   1.254.2.9     skrll 	.bDescriptorType = UDESC_INTERFACE,
   2431   1.254.2.9     skrll 	.bInterfaceNumber = 0,
   2432   1.254.2.9     skrll 	.bAlternateSetting = 0,
   2433   1.254.2.9     skrll 	.bNumEndpoints = 1,
   2434   1.254.2.9     skrll 	.bInterfaceClass = UICLASS_HUB,
   2435   1.254.2.9     skrll 	.bInterfaceSubClass = UISUBCLASS_HUB,
   2436   1.254.2.9     skrll 	.bInterfaceProtocol = UIPROTO_FSHUB,
   2437   1.254.2.9     skrll 	.iInterface = 0
   2438         1.1  augustss };
   2439         1.1  augustss 
   2440       1.182  drochner Static const usb_endpoint_descriptor_t ohci_endpd = {
   2441       1.175  christos 	.bLength = USB_ENDPOINT_DESCRIPTOR_SIZE,
   2442       1.175  christos 	.bDescriptorType = UDESC_ENDPOINT,
   2443       1.175  christos 	.bEndpointAddress = UE_DIR_IN | OHCI_INTR_ENDPT,
   2444       1.175  christos 	.bmAttributes = UE_INTERRUPT,
   2445  1.254.2.10     skrll 	.wMaxPacketSize = USETWD(8),
   2446       1.175  christos 	.bInterval = 255,
   2447         1.1  augustss };
   2448         1.1  augustss 
   2449       1.182  drochner Static const usb_hub_descriptor_t ohci_hubd = {
   2450       1.175  christos 	.bDescLength = USB_HUB_DESCRIPTOR_SIZE,
   2451       1.175  christos 	.bDescriptorType = UDESC_HUB,
   2452         1.1  augustss };
   2453         1.1  augustss 
   2454         1.1  augustss /*
   2455         1.1  augustss  * Simulate a hardware hub by handling all the necessary requests.
   2456         1.1  augustss  */
   2457        1.82  augustss Static usbd_status
   2458        1.91  augustss ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
   2459         1.1  augustss {
   2460   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2461        1.53  augustss 	usbd_status err;
   2462        1.17  augustss 
   2463        1.46  augustss 	/* Insert last in queue. */
   2464       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2465        1.53  augustss 	err = usb_insert_transfer(xfer);
   2466       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2467        1.53  augustss 	if (err)
   2468        1.53  augustss 		return (err);
   2469        1.46  augustss 
   2470        1.46  augustss 	/* Pipe isn't running, start first */
   2471   1.254.2.7     skrll 	return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   2472        1.17  augustss }
   2473        1.17  augustss 
   2474        1.82  augustss Static usbd_status
   2475        1.91  augustss ohci_root_ctrl_start(usbd_xfer_handle xfer)
   2476        1.17  augustss {
   2477   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2478         1.1  augustss 	usb_device_request_t *req;
   2479        1.52  augustss 	void *buf = NULL;
   2480         1.1  augustss 	int port, i;
   2481       1.224       mrg 	int len, value, index, l, totlen = 0;
   2482         1.1  augustss 	usb_port_status_t ps;
   2483         1.1  augustss 	usb_hub_descriptor_t hubd;
   2484        1.53  augustss 	usbd_status err;
   2485   1.254.2.1     skrll 	uint32_t v;
   2486         1.1  augustss 
   2487        1.83  augustss 	if (sc->sc_dying)
   2488        1.83  augustss 		return (USBD_IOERROR);
   2489        1.83  augustss 
   2490        1.42  augustss #ifdef DIAGNOSTIC
   2491   1.254.2.7     skrll 	if (!(xfer->ux_rqflags & URQ_REQUEST))
   2492         1.1  augustss 		/* XXX panic */
   2493         1.1  augustss 		return (USBD_INVAL);
   2494        1.42  augustss #endif
   2495   1.254.2.7     skrll 	req = &xfer->ux_request;
   2496         1.1  augustss 
   2497       1.120  augustss 	DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
   2498         1.1  augustss 		    req->bmRequestType, req->bRequest));
   2499         1.1  augustss 
   2500         1.1  augustss 	len = UGETW(req->wLength);
   2501         1.1  augustss 	value = UGETW(req->wValue);
   2502         1.1  augustss 	index = UGETW(req->wIndex);
   2503        1.43  augustss 
   2504        1.43  augustss 	if (len != 0)
   2505   1.254.2.7     skrll 		buf = xfer->ux_buf;
   2506        1.43  augustss 
   2507         1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   2508         1.1  augustss 	switch(C(req->bRequest, req->bmRequestType)) {
   2509         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
   2510         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
   2511         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
   2512       1.120  augustss 		/*
   2513        1.15  augustss 		 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
   2514         1.1  augustss 		 * for the integrated root hub.
   2515         1.1  augustss 		 */
   2516         1.1  augustss 		break;
   2517         1.1  augustss 	case C(UR_GET_CONFIG, UT_READ_DEVICE):
   2518         1.1  augustss 		if (len > 0) {
   2519   1.254.2.1     skrll 			*(uint8_t *)buf = sc->sc_conf;
   2520         1.1  augustss 			totlen = 1;
   2521         1.1  augustss 		}
   2522         1.1  augustss 		break;
   2523         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   2524         1.1  augustss 		DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
   2525       1.171  christos 		if (len == 0)
   2526       1.171  christos 			break;
   2527         1.1  augustss 		switch(value >> 8) {
   2528         1.1  augustss 		case UDESC_DEVICE:
   2529         1.1  augustss 			if ((value & 0xff) != 0) {
   2530        1.53  augustss 				err = USBD_IOERROR;
   2531         1.1  augustss 				goto ret;
   2532         1.1  augustss 			}
   2533         1.1  augustss 			totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
   2534        1.29  augustss 			USETW(ohci_devd.idVendor, sc->sc_id_vendor);
   2535         1.1  augustss 			memcpy(buf, &ohci_devd, l);
   2536         1.1  augustss 			break;
   2537         1.1  augustss 		case UDESC_CONFIG:
   2538         1.1  augustss 			if ((value & 0xff) != 0) {
   2539        1.53  augustss 				err = USBD_IOERROR;
   2540         1.1  augustss 				goto ret;
   2541         1.1  augustss 			}
   2542         1.1  augustss 			totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
   2543         1.1  augustss 			memcpy(buf, &ohci_confd, l);
   2544         1.1  augustss 			buf = (char *)buf + l;
   2545         1.1  augustss 			len -= l;
   2546         1.1  augustss 			l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
   2547         1.1  augustss 			totlen += l;
   2548         1.1  augustss 			memcpy(buf, &ohci_ifcd, l);
   2549         1.1  augustss 			buf = (char *)buf + l;
   2550         1.1  augustss 			len -= l;
   2551         1.1  augustss 			l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
   2552         1.1  augustss 			totlen += l;
   2553         1.1  augustss 			memcpy(buf, &ohci_endpd, l);
   2554         1.1  augustss 			break;
   2555         1.1  augustss 		case UDESC_STRING:
   2556       1.186  drochner #define sd ((usb_string_descriptor_t *)buf)
   2557         1.1  augustss 			switch (value & 0xff) {
   2558       1.152  augustss 			case 0: /* Language table */
   2559       1.186  drochner 				totlen = usb_makelangtbl(sd, len);
   2560       1.152  augustss 				break;
   2561         1.1  augustss 			case 1: /* Vendor */
   2562       1.186  drochner 				totlen = usb_makestrdesc(sd, len,
   2563       1.186  drochner 							 sc->sc_vendor);
   2564         1.1  augustss 				break;
   2565         1.1  augustss 			case 2: /* Product */
   2566       1.186  drochner 				totlen = usb_makestrdesc(sd, len,
   2567       1.186  drochner 							 "OHCI root hub");
   2568         1.1  augustss 				break;
   2569         1.1  augustss 			}
   2570       1.186  drochner #undef sd
   2571         1.1  augustss 			break;
   2572         1.1  augustss 		default:
   2573        1.53  augustss 			err = USBD_IOERROR;
   2574         1.1  augustss 			goto ret;
   2575         1.1  augustss 		}
   2576         1.1  augustss 		break;
   2577         1.1  augustss 	case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
   2578         1.1  augustss 		if (len > 0) {
   2579   1.254.2.1     skrll 			*(uint8_t *)buf = 0;
   2580         1.1  augustss 			totlen = 1;
   2581         1.1  augustss 		}
   2582         1.1  augustss 		break;
   2583         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_DEVICE):
   2584         1.1  augustss 		if (len > 1) {
   2585         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
   2586         1.1  augustss 			totlen = 2;
   2587         1.1  augustss 		}
   2588         1.1  augustss 		break;
   2589         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_INTERFACE):
   2590         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_ENDPOINT):
   2591         1.1  augustss 		if (len > 1) {
   2592         1.1  augustss 			USETW(((usb_status_t *)buf)->wStatus, 0);
   2593         1.1  augustss 			totlen = 2;
   2594         1.1  augustss 		}
   2595         1.1  augustss 		break;
   2596         1.1  augustss 	case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
   2597         1.1  augustss 		if (value >= USB_MAX_DEVICES) {
   2598        1.53  augustss 			err = USBD_IOERROR;
   2599         1.1  augustss 			goto ret;
   2600         1.1  augustss 		}
   2601         1.1  augustss 		sc->sc_addr = value;
   2602         1.1  augustss 		break;
   2603         1.1  augustss 	case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
   2604         1.1  augustss 		if (value != 0 && value != 1) {
   2605        1.53  augustss 			err = USBD_IOERROR;
   2606         1.1  augustss 			goto ret;
   2607         1.1  augustss 		}
   2608         1.1  augustss 		sc->sc_conf = value;
   2609         1.1  augustss 		break;
   2610         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
   2611         1.1  augustss 		break;
   2612         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
   2613         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
   2614         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
   2615        1.53  augustss 		err = USBD_IOERROR;
   2616         1.1  augustss 		goto ret;
   2617         1.1  augustss 	case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
   2618         1.1  augustss 		break;
   2619         1.1  augustss 	case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
   2620         1.1  augustss 		break;
   2621         1.1  augustss 	/* Hub requests */
   2622         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   2623         1.1  augustss 		break;
   2624         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   2625        1.14  augustss 		DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
   2626        1.14  augustss 			     "port=%d feature=%d\n",
   2627         1.1  augustss 			     index, value));
   2628         1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2629        1.53  augustss 			err = USBD_IOERROR;
   2630         1.1  augustss 			goto ret;
   2631         1.1  augustss 		}
   2632         1.1  augustss 		port = OHCI_RH_PORT_STATUS(index);
   2633         1.1  augustss 		switch(value) {
   2634         1.1  augustss 		case UHF_PORT_ENABLE:
   2635         1.1  augustss 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
   2636         1.1  augustss 			break;
   2637         1.1  augustss 		case UHF_PORT_SUSPEND:
   2638         1.1  augustss 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
   2639         1.1  augustss 			break;
   2640         1.1  augustss 		case UHF_PORT_POWER:
   2641        1.86  augustss 			/* Yes, writing to the LOW_SPEED bit clears power. */
   2642         1.1  augustss 			OWRITE4(sc, port, UPS_LOW_SPEED);
   2643         1.1  augustss 			break;
   2644         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2645         1.1  augustss 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
   2646         1.1  augustss 			break;
   2647         1.1  augustss 		case UHF_C_PORT_ENABLE:
   2648         1.1  augustss 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
   2649         1.1  augustss 			break;
   2650         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2651         1.1  augustss 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
   2652         1.1  augustss 			break;
   2653         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2654         1.1  augustss 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
   2655         1.1  augustss 			break;
   2656         1.1  augustss 		case UHF_C_PORT_RESET:
   2657         1.1  augustss 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
   2658         1.1  augustss 			break;
   2659         1.1  augustss 		default:
   2660        1.53  augustss 			err = USBD_IOERROR;
   2661         1.1  augustss 			goto ret;
   2662         1.1  augustss 		}
   2663         1.1  augustss 		switch(value) {
   2664         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2665         1.1  augustss 		case UHF_C_PORT_ENABLE:
   2666         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2667         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2668         1.1  augustss 		case UHF_C_PORT_RESET:
   2669         1.1  augustss 			/* Enable RHSC interrupt if condition is cleared. */
   2670         1.1  augustss 			if ((OREAD4(sc, port) >> 16) == 0)
   2671       1.157   mycroft 				ohci_rhsc_enable(sc);
   2672         1.1  augustss 			break;
   2673         1.1  augustss 		default:
   2674         1.1  augustss 			break;
   2675         1.1  augustss 		}
   2676         1.1  augustss 		break;
   2677         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   2678       1.171  christos 		if (len == 0)
   2679       1.171  christos 			break;
   2680       1.146    toshii 		if ((value & 0xff) != 0) {
   2681        1.53  augustss 			err = USBD_IOERROR;
   2682         1.1  augustss 			goto ret;
   2683         1.1  augustss 		}
   2684         1.1  augustss 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
   2685         1.1  augustss 		hubd = ohci_hubd;
   2686         1.1  augustss 		hubd.bNbrPorts = sc->sc_noport;
   2687        1.15  augustss 		USETW(hubd.wHubCharacteristics,
   2688       1.120  augustss 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
   2689         1.1  augustss 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
   2690         1.1  augustss 		      /* XXX overcurrent */
   2691         1.1  augustss 		      );
   2692         1.1  augustss 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
   2693         1.1  augustss 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
   2694       1.120  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   2695   1.254.2.1     skrll 			hubd.DeviceRemovable[i++] = (uint8_t)v;
   2696        1.15  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   2697         1.1  augustss 		l = min(len, hubd.bDescLength);
   2698         1.1  augustss 		totlen = l;
   2699         1.1  augustss 		memcpy(buf, &hubd, l);
   2700         1.1  augustss 		break;
   2701         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   2702         1.1  augustss 		if (len != 4) {
   2703        1.53  augustss 			err = USBD_IOERROR;
   2704         1.1  augustss 			goto ret;
   2705         1.1  augustss 		}
   2706         1.1  augustss 		memset(buf, 0, len); /* ? XXX */
   2707         1.1  augustss 		totlen = len;
   2708         1.1  augustss 		break;
   2709         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   2710         1.1  augustss 		DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
   2711         1.1  augustss 			    index));
   2712         1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2713        1.53  augustss 			err = USBD_IOERROR;
   2714         1.1  augustss 			goto ret;
   2715         1.1  augustss 		}
   2716         1.1  augustss 		if (len != 4) {
   2717        1.53  augustss 			err = USBD_IOERROR;
   2718         1.1  augustss 			goto ret;
   2719         1.1  augustss 		}
   2720         1.1  augustss 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
   2721         1.1  augustss 		DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
   2722         1.1  augustss 			    v));
   2723         1.1  augustss 		USETW(ps.wPortStatus, v);
   2724         1.1  augustss 		USETW(ps.wPortChange, v >> 16);
   2725         1.1  augustss 		l = min(len, sizeof ps);
   2726         1.1  augustss 		memcpy(buf, &ps, l);
   2727         1.1  augustss 		totlen = l;
   2728         1.1  augustss 		break;
   2729         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   2730        1.53  augustss 		err = USBD_IOERROR;
   2731         1.1  augustss 		goto ret;
   2732         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   2733         1.1  augustss 		break;
   2734         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   2735         1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2736        1.53  augustss 			err = USBD_IOERROR;
   2737         1.1  augustss 			goto ret;
   2738         1.1  augustss 		}
   2739         1.1  augustss 		port = OHCI_RH_PORT_STATUS(index);
   2740         1.1  augustss 		switch(value) {
   2741         1.1  augustss 		case UHF_PORT_ENABLE:
   2742         1.1  augustss 			OWRITE4(sc, port, UPS_PORT_ENABLED);
   2743         1.1  augustss 			break;
   2744         1.1  augustss 		case UHF_PORT_SUSPEND:
   2745         1.1  augustss 			OWRITE4(sc, port, UPS_SUSPEND);
   2746         1.1  augustss 			break;
   2747         1.1  augustss 		case UHF_PORT_RESET:
   2748        1.14  augustss 			DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
   2749        1.14  augustss 				    index));
   2750         1.1  augustss 			OWRITE4(sc, port, UPS_RESET);
   2751       1.110  augustss 			for (i = 0; i < 5; i++) {
   2752       1.110  augustss 				usb_delay_ms(&sc->sc_bus,
   2753       1.110  augustss 					     USB_PORT_ROOT_RESET_DELAY);
   2754       1.116  augustss 				if (sc->sc_dying) {
   2755       1.116  augustss 					err = USBD_IOERROR;
   2756       1.116  augustss 					goto ret;
   2757       1.116  augustss 				}
   2758         1.1  augustss 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
   2759         1.1  augustss 					break;
   2760         1.1  augustss 			}
   2761         1.1  augustss 			DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
   2762         1.1  augustss 				    index, OREAD4(sc, port)));
   2763         1.1  augustss 			break;
   2764         1.1  augustss 		case UHF_PORT_POWER:
   2765        1.14  augustss 			DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
   2766        1.14  augustss 				    "%d\n", index));
   2767         1.1  augustss 			OWRITE4(sc, port, UPS_PORT_POWER);
   2768         1.1  augustss 			break;
   2769         1.1  augustss 		default:
   2770        1.53  augustss 			err = USBD_IOERROR;
   2771         1.1  augustss 			goto ret;
   2772         1.1  augustss 		}
   2773         1.1  augustss 		break;
   2774         1.1  augustss 	default:
   2775        1.53  augustss 		err = USBD_IOERROR;
   2776         1.1  augustss 		goto ret;
   2777         1.1  augustss 	}
   2778   1.254.2.7     skrll 	xfer->ux_actlen = totlen;
   2779        1.53  augustss 	err = USBD_NORMAL_COMPLETION;
   2780         1.1  augustss  ret:
   2781   1.254.2.7     skrll 	xfer->ux_status = err;
   2782       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2783        1.53  augustss 	usb_transfer_complete(xfer);
   2784       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2785         1.1  augustss 	return (USBD_IN_PROGRESS);
   2786         1.1  augustss }
   2787         1.1  augustss 
   2788         1.1  augustss /* Abort a root control request. */
   2789        1.82  augustss Static void
   2790       1.179  christos ohci_root_ctrl_abort(usbd_xfer_handle xfer)
   2791         1.1  augustss {
   2792         1.9  augustss 	/* Nothing to do, all transfers are synchronous. */
   2793         1.1  augustss }
   2794         1.1  augustss 
   2795         1.1  augustss /* Close the root pipe. */
   2796        1.82  augustss Static void
   2797       1.179  christos ohci_root_ctrl_close(usbd_pipe_handle pipe)
   2798         1.1  augustss {
   2799         1.1  augustss 	DPRINTF(("ohci_root_ctrl_close\n"));
   2800        1.34  augustss 	/* Nothing to do. */
   2801         1.1  augustss }
   2802         1.1  augustss 
   2803        1.82  augustss Static usbd_status
   2804        1.91  augustss ohci_root_intr_transfer(usbd_xfer_handle xfer)
   2805         1.1  augustss {
   2806   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2807        1.53  augustss 	usbd_status err;
   2808        1.17  augustss 
   2809        1.46  augustss 	/* Insert last in queue. */
   2810       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2811        1.53  augustss 	err = usb_insert_transfer(xfer);
   2812       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2813        1.53  augustss 	if (err)
   2814        1.53  augustss 		return (err);
   2815        1.46  augustss 
   2816        1.46  augustss 	/* Pipe isn't running, start first */
   2817   1.254.2.7     skrll 	return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   2818        1.17  augustss }
   2819        1.17  augustss 
   2820        1.82  augustss Static usbd_status
   2821        1.91  augustss ohci_root_intr_start(usbd_xfer_handle xfer)
   2822        1.17  augustss {
   2823   1.254.2.7     skrll 	usbd_pipe_handle pipe = xfer->ux_pipe;
   2824   1.254.2.7     skrll 	ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   2825         1.1  augustss 
   2826        1.83  augustss 	if (sc->sc_dying)
   2827        1.83  augustss 		return (USBD_IOERROR);
   2828        1.83  augustss 
   2829       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2830       1.224       mrg 	KASSERT(sc->sc_intrxfer == NULL);
   2831        1.53  augustss 	sc->sc_intrxfer = xfer;
   2832       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2833         1.1  augustss 
   2834         1.1  augustss 	return (USBD_IN_PROGRESS);
   2835         1.1  augustss }
   2836         1.1  augustss 
   2837         1.3  augustss /* Abort a root interrupt request. */
   2838        1.82  augustss Static void
   2839        1.91  augustss ohci_root_intr_abort(usbd_xfer_handle xfer)
   2840         1.1  augustss {
   2841   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2842       1.224       mrg 
   2843       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2844   1.254.2.7     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   2845        1.53  augustss 
   2846       1.252     skrll 	sc->sc_intrxfer = NULL;
   2847       1.252     skrll 
   2848   1.254.2.7     skrll 	xfer->ux_status = USBD_CANCELLED;
   2849        1.53  augustss 	usb_transfer_complete(xfer);
   2850         1.1  augustss }
   2851         1.1  augustss 
   2852         1.1  augustss /* Close the root pipe. */
   2853        1.82  augustss Static void
   2854        1.91  augustss ohci_root_intr_close(usbd_pipe_handle pipe)
   2855         1.1  augustss {
   2856   1.254.2.7     skrll 	ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   2857       1.120  augustss 
   2858       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2859       1.224       mrg 
   2860         1.1  augustss 	DPRINTF(("ohci_root_intr_close\n"));
   2861        1.34  augustss 
   2862        1.53  augustss 	sc->sc_intrxfer = NULL;
   2863         1.1  augustss }
   2864         1.1  augustss 
   2865         1.1  augustss /************************/
   2866         1.1  augustss 
   2867        1.82  augustss Static usbd_status
   2868        1.91  augustss ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
   2869         1.1  augustss {
   2870   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2871        1.53  augustss 	usbd_status err;
   2872        1.17  augustss 
   2873        1.46  augustss 	/* Insert last in queue. */
   2874       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2875        1.53  augustss 	err = usb_insert_transfer(xfer);
   2876       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2877        1.53  augustss 	if (err)
   2878        1.53  augustss 		return (err);
   2879        1.46  augustss 
   2880        1.46  augustss 	/* Pipe isn't running, start first */
   2881   1.254.2.7     skrll 	return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   2882        1.17  augustss }
   2883        1.17  augustss 
   2884        1.82  augustss Static usbd_status
   2885        1.91  augustss ohci_device_ctrl_start(usbd_xfer_handle xfer)
   2886        1.17  augustss {
   2887   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2888        1.53  augustss 	usbd_status err;
   2889         1.1  augustss 
   2890        1.83  augustss 	if (sc->sc_dying)
   2891        1.83  augustss 		return (USBD_IOERROR);
   2892        1.83  augustss 
   2893        1.42  augustss #ifdef DIAGNOSTIC
   2894   1.254.2.7     skrll 	if (!(xfer->ux_rqflags & URQ_REQUEST)) {
   2895         1.1  augustss 		/* XXX panic */
   2896         1.1  augustss 		printf("ohci_device_ctrl_transfer: not a request\n");
   2897         1.1  augustss 		return (USBD_INVAL);
   2898         1.1  augustss 	}
   2899        1.42  augustss #endif
   2900         1.1  augustss 
   2901       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2902        1.53  augustss 	err = ohci_device_request(xfer);
   2903       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2904        1.53  augustss 	if (err)
   2905        1.53  augustss 		return (err);
   2906         1.1  augustss 
   2907   1.254.2.7     skrll 	if (sc->sc_bus.ub_usepolling)
   2908        1.53  augustss 		ohci_waitintr(sc, xfer);
   2909         1.1  augustss 	return (USBD_IN_PROGRESS);
   2910         1.1  augustss }
   2911         1.1  augustss 
   2912         1.1  augustss /* Abort a device control request. */
   2913        1.82  augustss Static void
   2914        1.91  augustss ohci_device_ctrl_abort(usbd_xfer_handle xfer)
   2915         1.1  augustss {
   2916       1.224       mrg #ifdef DIAGNOSTIC
   2917   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2918       1.224       mrg #endif
   2919       1.224       mrg 
   2920       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2921       1.224       mrg 
   2922        1.53  augustss 	DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
   2923        1.54  augustss 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   2924         1.1  augustss }
   2925         1.1  augustss 
   2926         1.1  augustss /* Close a device control pipe. */
   2927        1.82  augustss Static void
   2928        1.91  augustss ohci_device_ctrl_close(usbd_pipe_handle pipe)
   2929         1.1  augustss {
   2930        1.60  augustss 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2931   1.254.2.7     skrll 	ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   2932         1.1  augustss 
   2933       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2934       1.224       mrg 
   2935        1.34  augustss 	DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
   2936        1.34  augustss 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
   2937        1.60  augustss 	ohci_free_std(sc, opipe->tail.td);
   2938         1.3  augustss }
   2939         1.3  augustss 
   2940         1.3  augustss /************************/
   2941        1.37  augustss 
   2942        1.82  augustss Static void
   2943        1.91  augustss ohci_device_clear_toggle(usbd_pipe_handle pipe)
   2944        1.37  augustss {
   2945        1.37  augustss 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   2946   1.254.2.7     skrll 	ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   2947        1.37  augustss 
   2948       1.168  augustss 	opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
   2949        1.37  augustss }
   2950        1.37  augustss 
   2951        1.82  augustss Static void
   2952       1.179  christos ohci_noop(usbd_pipe_handle pipe)
   2953        1.37  augustss {
   2954        1.37  augustss }
   2955         1.3  augustss 
   2956        1.82  augustss Static usbd_status
   2957        1.91  augustss ohci_device_bulk_transfer(usbd_xfer_handle xfer)
   2958         1.3  augustss {
   2959   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   2960        1.53  augustss 	usbd_status err;
   2961        1.17  augustss 
   2962        1.46  augustss 	/* Insert last in queue. */
   2963       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2964        1.53  augustss 	err = usb_insert_transfer(xfer);
   2965       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2966        1.53  augustss 	if (err)
   2967        1.53  augustss 		return (err);
   2968        1.46  augustss 
   2969        1.46  augustss 	/* Pipe isn't running, start first */
   2970   1.254.2.7     skrll 	return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   2971        1.17  augustss }
   2972        1.17  augustss 
   2973        1.82  augustss Static usbd_status
   2974        1.91  augustss ohci_device_bulk_start(usbd_xfer_handle xfer)
   2975        1.17  augustss {
   2976   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
   2977   1.254.2.7     skrll 	usbd_device_handle dev = opipe->pipe.up_dev;
   2978   1.254.2.7     skrll 	ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   2979   1.254.2.7     skrll 	int addr = dev->ud_addr;
   2980        1.48  augustss 	ohci_soft_td_t *data, *tail, *tdp;
   2981         1.3  augustss 	ohci_soft_ed_t *sed;
   2982       1.224       mrg 	int len, isread, endpt;
   2983        1.53  augustss 	usbd_status err;
   2984         1.3  augustss 
   2985        1.83  augustss 	if (sc->sc_dying)
   2986        1.83  augustss 		return (USBD_IOERROR);
   2987        1.83  augustss 
   2988        1.34  augustss #ifdef DIAGNOSTIC
   2989   1.254.2.7     skrll 	if (xfer->ux_rqflags & URQ_REQUEST) {
   2990         1.3  augustss 		/* XXX panic */
   2991        1.34  augustss 		printf("ohci_device_bulk_start: a request\n");
   2992         1.3  augustss 		return (USBD_INVAL);
   2993         1.3  augustss 	}
   2994        1.34  augustss #endif
   2995         1.3  augustss 
   2996       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2997       1.224       mrg 
   2998   1.254.2.7     skrll 	len = xfer->ux_length;
   2999   1.254.2.7     skrll 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3000        1.40  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3001         1.3  augustss 	sed = opipe->sed;
   3002         1.3  augustss 
   3003        1.53  augustss 	DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
   3004   1.254.2.7     skrll 		    "flags=%d endpt=%d\n", xfer, len, isread, xfer->ux_flags,
   3005        1.40  augustss 		    endpt));
   3006        1.34  augustss 
   3007        1.32  augustss 	opipe->u.bulk.isread = isread;
   3008         1.3  augustss 	opipe->u.bulk.length = len;
   3009         1.3  augustss 
   3010       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3011       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3012         1.3  augustss 	/* Update device address */
   3013       1.168  augustss 	sed->ed.ed_flags = HTOO32(
   3014       1.168  augustss 		(O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
   3015        1.16  augustss 		OHCI_ED_SET_FA(addr));
   3016         1.3  augustss 
   3017        1.48  augustss 	/* Allocate a chain of new TDs (including a new tail). */
   3018        1.60  augustss 	data = opipe->tail.td;
   3019        1.77  augustss 	err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
   3020        1.77  augustss 		  data, &tail);
   3021       1.236     skrll 	if (err)
   3022       1.236     skrll 		return err;
   3023   1.254.2.1     skrll 
   3024        1.77  augustss 	/* We want interrupt at the end of the transfer. */
   3025       1.168  augustss 	tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   3026       1.168  augustss 	tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   3027        1.77  augustss 	tail->flags |= OHCI_CALL_DONE;
   3028        1.77  augustss 	tail = tail->nexttd;	/* point at sentinel */
   3029       1.195    bouyer 	usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
   3030       1.195    bouyer 	    sizeof(tail->td.td_flags),
   3031       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3032       1.224       mrg 	if (err) {
   3033       1.224       mrg 		mutex_exit(&sc->sc_lock);
   3034        1.53  augustss 		return (err);
   3035       1.224       mrg 	}
   3036        1.48  augustss 
   3037        1.53  augustss 	tail->xfer = NULL;
   3038   1.254.2.7     skrll 	xfer->ux_hcpriv = data;
   3039         1.3  augustss 
   3040        1.34  augustss 	DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
   3041        1.34  augustss 		    "td_cbp=0x%08x td_be=0x%08x\n",
   3042       1.168  augustss 		    (int)O32TOH(sed->ed.ed_flags),
   3043       1.168  augustss 		    (int)O32TOH(data->td.td_flags),
   3044       1.168  augustss 		    (int)O32TOH(data->td.td_cbp),
   3045       1.168  augustss 		    (int)O32TOH(data->td.td_be)));
   3046        1.34  augustss 
   3047        1.52  augustss #ifdef OHCI_DEBUG
   3048        1.75  augustss 	if (ohcidebug > 5) {
   3049       1.168  augustss 		ohci_dump_ed(sc, sed);
   3050       1.168  augustss 		ohci_dump_tds(sc, data);
   3051        1.34  augustss 	}
   3052        1.34  augustss #endif
   3053        1.34  augustss 
   3054         1.3  augustss 	/* Insert ED in schedule */
   3055        1.48  augustss 	for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
   3056        1.53  augustss 		tdp->xfer = xfer;
   3057        1.48  augustss 	}
   3058       1.168  augustss 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3059        1.60  augustss 	opipe->tail.td = tail;
   3060       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3061       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3062       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3063         1.3  augustss 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
   3064   1.254.2.7     skrll 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   3065   1.254.2.7     skrll 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   3066        1.80  augustss 			    ohci_timeout, xfer);
   3067        1.15  augustss 	}
   3068       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3069        1.34  augustss 
   3070        1.52  augustss #if 0
   3071        1.52  augustss /* This goes wrong if we are too slow. */
   3072        1.75  augustss 	if (ohcidebug > 10) {
   3073        1.75  augustss 		delay(10000);
   3074        1.41  augustss 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
   3075        1.41  augustss 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
   3076       1.168  augustss 		ohci_dump_ed(sc, sed);
   3077       1.168  augustss 		ohci_dump_tds(sc, data);
   3078        1.34  augustss 	}
   3079        1.34  augustss #endif
   3080        1.34  augustss 
   3081         1.3  augustss 	return (USBD_IN_PROGRESS);
   3082         1.3  augustss }
   3083         1.3  augustss 
   3084        1.82  augustss Static void
   3085        1.91  augustss ohci_device_bulk_abort(usbd_xfer_handle xfer)
   3086         1.3  augustss {
   3087       1.224       mrg #ifdef DIAGNOSTIC
   3088   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3089       1.224       mrg #endif
   3090       1.224       mrg 
   3091       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3092       1.224       mrg 
   3093        1.53  augustss 	DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
   3094        1.54  augustss 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   3095         1.3  augustss }
   3096         1.3  augustss 
   3097       1.120  augustss /*
   3098        1.34  augustss  * Close a device bulk pipe.
   3099        1.34  augustss  */
   3100        1.82  augustss Static void
   3101        1.91  augustss ohci_device_bulk_close(usbd_pipe_handle pipe)
   3102         1.3  augustss {
   3103        1.60  augustss 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   3104   1.254.2.7     skrll 	ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3105         1.3  augustss 
   3106       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3107       1.224       mrg 
   3108        1.34  augustss 	DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
   3109        1.34  augustss 	ohci_close_pipe(pipe, sc->sc_bulk_head);
   3110        1.60  augustss 	ohci_free_std(sc, opipe->tail.td);
   3111         1.1  augustss }
   3112         1.1  augustss 
   3113         1.1  augustss /************************/
   3114         1.1  augustss 
   3115        1.82  augustss Static usbd_status
   3116        1.91  augustss ohci_device_intr_transfer(usbd_xfer_handle xfer)
   3117        1.17  augustss {
   3118   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3119        1.53  augustss 	usbd_status err;
   3120        1.17  augustss 
   3121        1.46  augustss 	/* Insert last in queue. */
   3122       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3123        1.53  augustss 	err = usb_insert_transfer(xfer);
   3124       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3125        1.53  augustss 	if (err)
   3126        1.53  augustss 		return (err);
   3127        1.46  augustss 
   3128        1.46  augustss 	/* Pipe isn't running, start first */
   3129   1.254.2.7     skrll 	return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue)));
   3130        1.17  augustss }
   3131        1.17  augustss 
   3132        1.82  augustss Static usbd_status
   3133        1.91  augustss ohci_device_intr_start(usbd_xfer_handle xfer)
   3134         1.1  augustss {
   3135   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
   3136   1.254.2.7     skrll 	usbd_device_handle dev = opipe->pipe.up_dev;
   3137   1.254.2.7     skrll 	ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   3138         1.1  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   3139        1.48  augustss 	ohci_soft_td_t *data, *tail;
   3140       1.224       mrg 	int len, isread, endpt;
   3141         1.1  augustss 
   3142        1.83  augustss 	if (sc->sc_dying)
   3143        1.83  augustss 		return (USBD_IOERROR);
   3144        1.83  augustss 
   3145        1.53  augustss 	DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
   3146        1.14  augustss 		     "flags=%d priv=%p\n",
   3147   1.254.2.7     skrll 		     xfer, xfer->ux_length, xfer->ux_flags, xfer->ux_priv));
   3148         1.1  augustss 
   3149        1.42  augustss #ifdef DIAGNOSTIC
   3150   1.254.2.7     skrll 	if (xfer->ux_rqflags & URQ_REQUEST)
   3151       1.128    provos 		panic("ohci_device_intr_transfer: a request");
   3152        1.42  augustss #endif
   3153         1.1  augustss 
   3154   1.254.2.7     skrll 	len = xfer->ux_length;
   3155   1.254.2.7     skrll 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3156       1.165     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3157         1.1  augustss 
   3158        1.60  augustss 	data = opipe->tail.td;
   3159       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3160         1.1  augustss 	tail = ohci_alloc_std(sc);
   3161       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3162        1.55  augustss 	if (tail == NULL)
   3163        1.43  augustss 		return (USBD_NOMEM);
   3164        1.53  augustss 	tail->xfer = NULL;
   3165         1.1  augustss 
   3166       1.168  augustss 	data->td.td_flags = HTOO32(
   3167       1.165     skrll 		isread ? OHCI_TD_IN : OHCI_TD_OUT |
   3168       1.165     skrll 		OHCI_TD_NOCC |
   3169        1.16  augustss 		OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
   3170   1.254.2.7     skrll 	if (xfer->ux_flags & USBD_SHORT_XFER_OK)
   3171       1.168  augustss 		data->td.td_flags |= HTOO32(OHCI_TD_R);
   3172   1.254.2.7     skrll 	data->td.td_cbp = HTOO32(DMAADDR(&xfer->ux_dmabuf, 0));
   3173        1.48  augustss 	data->nexttd = tail;
   3174       1.168  augustss 	data->td.td_nexttd = HTOO32(tail->physaddr);
   3175       1.168  augustss 	data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
   3176        1.48  augustss 	data->len = len;
   3177        1.53  augustss 	data->xfer = xfer;
   3178        1.48  augustss 	data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
   3179       1.195    bouyer 	usb_syncmem(&data->dma, data->offs, sizeof(data->td),
   3180       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3181   1.254.2.7     skrll 	xfer->ux_hcpriv = data;
   3182         1.1  augustss 
   3183        1.52  augustss #ifdef OHCI_DEBUG
   3184         1.1  augustss 	if (ohcidebug > 5) {
   3185        1.41  augustss 		DPRINTF(("ohci_device_intr_transfer:\n"));
   3186       1.168  augustss 		ohci_dump_ed(sc, sed);
   3187       1.168  augustss 		ohci_dump_tds(sc, data);
   3188         1.1  augustss 	}
   3189         1.1  augustss #endif
   3190         1.1  augustss 
   3191         1.1  augustss 	/* Insert ED in schedule */
   3192       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3193       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3194       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3195       1.168  augustss 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3196        1.60  augustss 	opipe->tail.td = tail;
   3197       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3198       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3199       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3200         1.1  augustss 
   3201        1.52  augustss #if 0
   3202        1.52  augustss /*
   3203        1.52  augustss  * This goes horribly wrong, printing thousands of descriptors,
   3204        1.52  augustss  * because false references are followed due to the fact that the
   3205        1.52  augustss  * TD is gone.
   3206        1.52  augustss  */
   3207         1.1  augustss 	if (ohcidebug > 5) {
   3208       1.224       mrg 		usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock);
   3209        1.41  augustss 		DPRINTF(("ohci_device_intr_transfer: status=%x\n",
   3210        1.41  augustss 			 OREAD4(sc, OHCI_COMMAND_STATUS)));
   3211       1.168  augustss 		ohci_dump_ed(sc, sed);
   3212       1.168  augustss 		ohci_dump_tds(sc, data);
   3213         1.1  augustss 	}
   3214         1.1  augustss #endif
   3215       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3216         1.1  augustss 
   3217         1.1  augustss 	return (USBD_IN_PROGRESS);
   3218         1.1  augustss }
   3219         1.1  augustss 
   3220       1.227     skrll /* Abort a device interrupt request. */
   3221        1.82  augustss Static void
   3222        1.91  augustss ohci_device_intr_abort(usbd_xfer_handle xfer)
   3223         1.1  augustss {
   3224       1.224       mrg #ifdef DIAGNOSTIC
   3225   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3226       1.224       mrg #endif
   3227       1.224       mrg 
   3228       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3229   1.254.2.7     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   3230       1.224       mrg 
   3231        1.54  augustss 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   3232         1.1  augustss }
   3233         1.1  augustss 
   3234         1.1  augustss /* Close a device interrupt pipe. */
   3235        1.82  augustss Static void
   3236        1.91  augustss ohci_device_intr_close(usbd_pipe_handle pipe)
   3237         1.1  augustss {
   3238         1.1  augustss 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   3239   1.254.2.7     skrll 	ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3240         1.1  augustss 	int nslots = opipe->u.intr.nslots;
   3241         1.1  augustss 	int pos = opipe->u.intr.pos;
   3242         1.1  augustss 	int j;
   3243         1.1  augustss 	ohci_soft_ed_t *p, *sed = opipe->sed;
   3244       1.224       mrg 
   3245       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3246         1.1  augustss 
   3247         1.1  augustss 	DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
   3248         1.1  augustss 		    pipe, nslots, pos));
   3249       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs,
   3250       1.195    bouyer 	    sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3251       1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   3252       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3253       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3254       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3255       1.168  augustss 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   3256       1.168  augustss 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   3257       1.224       mrg 		usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   3258         1.1  augustss 
   3259         1.1  augustss 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
   3260       1.172  christos 		continue;
   3261        1.53  augustss #ifdef DIAGNOSTIC
   3262       1.173  christos 	if (p == NULL)
   3263       1.128    provos 		panic("ohci_device_intr_close: ED not found");
   3264        1.53  augustss #endif
   3265       1.173  christos 	p->next = sed->next;
   3266       1.173  christos 	p->ed.ed_nexted = sed->ed.ed_nexted;
   3267       1.195    bouyer 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   3268       1.195    bouyer 	    sizeof(p->ed.ed_nexted),
   3269       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3270         1.1  augustss 
   3271         1.1  augustss 	for (j = 0; j < nslots; j++)
   3272        1.31  wrstuden 		--sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
   3273         1.1  augustss 
   3274        1.60  augustss 	ohci_free_std(sc, opipe->tail.td);
   3275         1.1  augustss 	ohci_free_sed(sc, opipe->sed);
   3276         1.1  augustss }
   3277         1.1  augustss 
   3278        1.82  augustss Static usbd_status
   3279        1.91  augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
   3280         1.1  augustss {
   3281       1.224       mrg 	int i, j, best;
   3282         1.1  augustss 	u_int npoll, slow, shigh, nslots;
   3283         1.1  augustss 	u_int bestbw, bw;
   3284         1.1  augustss 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
   3285         1.1  augustss 
   3286         1.1  augustss 	DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
   3287         1.1  augustss 	if (ival == 0) {
   3288         1.1  augustss 		printf("ohci_setintr: 0 interval\n");
   3289         1.1  augustss 		return (USBD_INVAL);
   3290         1.1  augustss 	}
   3291         1.1  augustss 
   3292         1.1  augustss 	npoll = OHCI_NO_INTRS;
   3293         1.1  augustss 	while (npoll > ival)
   3294         1.1  augustss 		npoll /= 2;
   3295         1.1  augustss 	DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
   3296         1.1  augustss 
   3297         1.1  augustss 	/*
   3298         1.1  augustss 	 * We now know which level in the tree the ED must go into.
   3299         1.1  augustss 	 * Figure out which slot has most bandwidth left over.
   3300         1.1  augustss 	 * Slots to examine:
   3301         1.1  augustss 	 * npoll
   3302         1.1  augustss 	 * 1	0
   3303         1.1  augustss 	 * 2	1 2
   3304         1.1  augustss 	 * 4	3 4 5 6
   3305         1.1  augustss 	 * 8	7 8 9 10 11 12 13 14
   3306         1.1  augustss 	 * N    (N-1) .. (N-1+N-1)
   3307         1.1  augustss 	 */
   3308         1.1  augustss 	slow = npoll-1;
   3309         1.1  augustss 	shigh = slow + npoll;
   3310         1.1  augustss 	nslots = OHCI_NO_INTRS / npoll;
   3311         1.1  augustss 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
   3312         1.1  augustss 		bw = 0;
   3313         1.1  augustss 		for (j = 0; j < nslots; j++)
   3314        1.28  augustss 			bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
   3315         1.1  augustss 		if (bw < bestbw) {
   3316         1.1  augustss 			best = i;
   3317         1.1  augustss 			bestbw = bw;
   3318         1.1  augustss 		}
   3319         1.1  augustss 	}
   3320       1.120  augustss 	DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
   3321         1.1  augustss 		     best, slow, shigh, bestbw));
   3322         1.1  augustss 
   3323       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3324         1.1  augustss 	hsed = sc->sc_eds[best];
   3325         1.1  augustss 	sed->next = hsed->next;
   3326       1.195    bouyer 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3327       1.195    bouyer 	    sizeof(hsed->ed.ed_flags),
   3328       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3329        1.39  augustss 	sed->ed.ed_nexted = hsed->ed.ed_nexted;
   3330       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3331       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3332       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3333         1.1  augustss 	hsed->next = sed;
   3334       1.168  augustss 	hsed->ed.ed_nexted = HTOO32(sed->physaddr);
   3335       1.195    bouyer 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3336       1.195    bouyer 	    sizeof(hsed->ed.ed_flags),
   3337       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3338       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3339         1.1  augustss 
   3340         1.1  augustss 	for (j = 0; j < nslots; j++)
   3341        1.28  augustss 		++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
   3342         1.1  augustss 	opipe->u.intr.nslots = nslots;
   3343         1.1  augustss 	opipe->u.intr.pos = best;
   3344         1.1  augustss 
   3345         1.1  augustss 	DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
   3346         1.1  augustss 	return (USBD_NORMAL_COMPLETION);
   3347        1.60  augustss }
   3348        1.60  augustss 
   3349        1.60  augustss /***********************/
   3350        1.60  augustss 
   3351        1.60  augustss usbd_status
   3352        1.91  augustss ohci_device_isoc_transfer(usbd_xfer_handle xfer)
   3353        1.60  augustss {
   3354   1.254.2.7     skrll 	ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
   3355        1.60  augustss 	usbd_status err;
   3356        1.60  augustss 
   3357        1.60  augustss 	DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
   3358        1.60  augustss 
   3359        1.60  augustss 	/* Put it on our queue, */
   3360       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3361        1.60  augustss 	err = usb_insert_transfer(xfer);
   3362       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3363        1.60  augustss 
   3364        1.60  augustss 	/* bail out on error, */
   3365        1.60  augustss 	if (err && err != USBD_IN_PROGRESS)
   3366        1.60  augustss 		return (err);
   3367        1.60  augustss 
   3368        1.60  augustss 	/* XXX should check inuse here */
   3369        1.60  augustss 
   3370        1.60  augustss 	/* insert into schedule, */
   3371        1.60  augustss 	ohci_device_isoc_enter(xfer);
   3372        1.60  augustss 
   3373        1.83  augustss 	/* and start if the pipe wasn't running */
   3374        1.60  augustss 	if (!err)
   3375   1.254.2.7     skrll 		ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3376        1.60  augustss 
   3377        1.60  augustss 	return (err);
   3378        1.60  augustss }
   3379        1.60  augustss 
   3380        1.60  augustss void
   3381        1.91  augustss ohci_device_isoc_enter(usbd_xfer_handle xfer)
   3382        1.60  augustss {
   3383   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
   3384   1.254.2.7     skrll 	usbd_device_handle dev = opipe->pipe.up_dev;
   3385   1.254.2.7     skrll 	ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
   3386        1.61  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   3387        1.61  augustss 	struct iso *iso = &opipe->u.iso;
   3388       1.120  augustss 	ohci_soft_itd_t *sitd, *nsitd;
   3389        1.83  augustss 	ohci_physaddr_t buf, offs, noffs, bp0;
   3390        1.61  augustss 	int i, ncur, nframes;
   3391        1.61  augustss 
   3392        1.83  augustss 	DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
   3393        1.83  augustss 		    "nframes=%d\n",
   3394   1.254.2.7     skrll 		    iso->inuse, iso->next, xfer, xfer->ux_nframes));
   3395        1.83  augustss 
   3396        1.83  augustss 	if (sc->sc_dying)
   3397        1.83  augustss 		return;
   3398        1.83  augustss 
   3399        1.83  augustss 	if (iso->next == -1) {
   3400        1.83  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   3401       1.168  augustss 		iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
   3402       1.120  augustss 		DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
   3403        1.83  augustss 			    iso->next));
   3404        1.83  augustss 	}
   3405        1.83  augustss 
   3406        1.61  augustss 	sitd = opipe->tail.itd;
   3407   1.254.2.7     skrll 	buf = DMAADDR(&xfer->ux_dmabuf, 0);
   3408        1.83  augustss 	bp0 = OHCI_PAGE(buf);
   3409        1.83  augustss 	offs = OHCI_PAGE_OFFSET(buf);
   3410   1.254.2.7     skrll 	nframes = xfer->ux_nframes;
   3411   1.254.2.7     skrll 	xfer->ux_hcpriv = sitd;
   3412        1.61  augustss 	for (i = ncur = 0; i < nframes; i++, ncur++) {
   3413   1.254.2.7     skrll 		noffs = offs + xfer->ux_frlengths[i];
   3414        1.61  augustss 		if (ncur == OHCI_ITD_NOFFSET ||	/* all offsets used */
   3415        1.83  augustss 		    OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
   3416       1.120  augustss 
   3417        1.83  augustss 			/* Allocate next ITD */
   3418       1.224       mrg 			mutex_enter(&sc->sc_lock);
   3419        1.61  augustss 			nsitd = ohci_alloc_sitd(sc);
   3420       1.224       mrg 			mutex_exit(&sc->sc_lock);
   3421        1.61  augustss 			if (nsitd == NULL) {
   3422        1.61  augustss 				/* XXX what now? */
   3423        1.83  augustss 				printf("%s: isoc TD alloc failed\n",
   3424       1.190  drochner 				       device_xname(sc->sc_dev));
   3425        1.61  augustss 				return;
   3426        1.61  augustss 			}
   3427        1.83  augustss 
   3428        1.83  augustss 			/* Fill current ITD */
   3429       1.168  augustss 			sitd->itd.itd_flags = HTOO32(
   3430       1.120  augustss 				OHCI_ITD_NOCC |
   3431        1.61  augustss 				OHCI_ITD_SET_SF(iso->next) |
   3432        1.83  augustss 				OHCI_ITD_SET_DI(6) | /* delay intr a little */
   3433        1.83  augustss 				OHCI_ITD_SET_FC(ncur));
   3434       1.168  augustss 			sitd->itd.itd_bp0 = HTOO32(bp0);
   3435        1.83  augustss 			sitd->nextitd = nsitd;
   3436       1.168  augustss 			sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
   3437       1.168  augustss 			sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3438        1.83  augustss 			sitd->xfer = xfer;
   3439        1.83  augustss 			sitd->flags = 0;
   3440       1.195    bouyer 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3441       1.195    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3442        1.83  augustss 
   3443        1.61  augustss 			sitd = nsitd;
   3444       1.120  augustss 			iso->next = iso->next + ncur;
   3445        1.83  augustss 			bp0 = OHCI_PAGE(buf + offs);
   3446        1.61  augustss 			ncur = 0;
   3447        1.61  augustss 		}
   3448       1.168  augustss 		sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
   3449        1.83  augustss 		offs = noffs;
   3450        1.61  augustss 	}
   3451       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3452        1.61  augustss 	nsitd = ohci_alloc_sitd(sc);
   3453       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3454        1.61  augustss 	if (nsitd == NULL) {
   3455        1.61  augustss 		/* XXX what now? */
   3456       1.120  augustss 		printf("%s: isoc TD alloc failed\n",
   3457       1.190  drochner 		       device_xname(sc->sc_dev));
   3458        1.61  augustss 		return;
   3459        1.61  augustss 	}
   3460        1.83  augustss 	/* Fixup last used ITD */
   3461       1.168  augustss 	sitd->itd.itd_flags = HTOO32(
   3462       1.120  augustss 		OHCI_ITD_NOCC |
   3463        1.61  augustss 		OHCI_ITD_SET_SF(iso->next) |
   3464        1.61  augustss 		OHCI_ITD_SET_DI(0) |
   3465        1.61  augustss 		OHCI_ITD_SET_FC(ncur));
   3466       1.168  augustss 	sitd->itd.itd_bp0 = HTOO32(bp0);
   3467        1.83  augustss 	sitd->nextitd = nsitd;
   3468       1.168  augustss 	sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
   3469       1.168  augustss 	sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3470        1.83  augustss 	sitd->xfer = xfer;
   3471        1.83  augustss 	sitd->flags = OHCI_CALL_DONE;
   3472       1.195    bouyer 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3473       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3474        1.83  augustss 
   3475        1.61  augustss 	iso->next = iso->next + ncur;
   3476        1.83  augustss 	iso->inuse += nframes;
   3477        1.83  augustss 
   3478   1.254.2.7     skrll 	xfer->ux_actlen = offs;	/* XXX pretend we did it all */
   3479        1.83  augustss 
   3480   1.254.2.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   3481        1.83  augustss 
   3482        1.83  augustss #ifdef OHCI_DEBUG
   3483        1.83  augustss 	if (ohcidebug > 5) {
   3484        1.83  augustss 		DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
   3485       1.168  augustss 			 O32TOH(sc->sc_hcca->hcca_frame_number)));
   3486   1.254.2.7     skrll 		ohci_dump_itds(sc, xfer->ux_hcpriv);
   3487       1.168  augustss 		ohci_dump_ed(sc, sed);
   3488        1.83  augustss 	}
   3489        1.83  augustss #endif
   3490        1.61  augustss 
   3491       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3492       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3493       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3494       1.168  augustss 	sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
   3495        1.61  augustss 	opipe->tail.itd = nsitd;
   3496       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3497       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3498       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3499       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3500       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3501        1.83  augustss 
   3502        1.83  augustss #ifdef OHCI_DEBUG
   3503        1.83  augustss 	if (ohcidebug > 5) {
   3504        1.83  augustss 		delay(150000);
   3505        1.83  augustss 		DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
   3506       1.168  augustss 			 O32TOH(sc->sc_hcca->hcca_frame_number)));
   3507   1.254.2.7     skrll 		ohci_dump_itds(sc, xfer->ux_hcpriv);
   3508       1.168  augustss 		ohci_dump_ed(sc, sed);
   3509        1.83  augustss 	}
   3510        1.83  augustss #endif
   3511        1.60  augustss }
   3512        1.60  augustss 
   3513        1.60  augustss usbd_status
   3514        1.91  augustss ohci_device_isoc_start(usbd_xfer_handle xfer)
   3515        1.60  augustss {
   3516   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
   3517   1.254.2.7     skrll 	ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
   3518        1.83  augustss 
   3519        1.83  augustss 	DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
   3520        1.83  augustss 
   3521       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3522       1.224       mrg 
   3523       1.224       mrg 	if (sc->sc_dying) {
   3524       1.224       mrg 		mutex_exit(&sc->sc_lock);
   3525        1.83  augustss 		return (USBD_IOERROR);
   3526       1.224       mrg 	}
   3527        1.83  augustss 
   3528        1.83  augustss #ifdef DIAGNOSTIC
   3529   1.254.2.7     skrll 	if (xfer->ux_status != USBD_IN_PROGRESS)
   3530       1.121   tsutsui 		printf("ohci_device_isoc_start: not in progress %p\n", xfer);
   3531        1.83  augustss #endif
   3532        1.83  augustss 
   3533        1.83  augustss 	/* XXX anything to do? */
   3534        1.83  augustss 
   3535       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3536       1.224       mrg 
   3537        1.83  augustss 	return (USBD_IN_PROGRESS);
   3538        1.60  augustss }
   3539        1.60  augustss 
   3540        1.60  augustss void
   3541        1.91  augustss ohci_device_isoc_abort(usbd_xfer_handle xfer)
   3542        1.60  augustss {
   3543   1.254.2.7     skrll 	struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
   3544   1.254.2.7     skrll 	ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
   3545        1.83  augustss 	ohci_soft_ed_t *sed;
   3546        1.83  augustss 	ohci_soft_itd_t *sitd;
   3547        1.83  augustss 
   3548       1.224       mrg 	DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p lock=%p\n", xfer, &sc->sc_lock));
   3549        1.83  augustss 
   3550       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3551        1.83  augustss 
   3552        1.83  augustss 	/* Transfer is already done. */
   3553   1.254.2.7     skrll 	if (xfer->ux_status != USBD_NOT_STARTED &&
   3554   1.254.2.7     skrll 	    xfer->ux_status != USBD_IN_PROGRESS) {
   3555        1.83  augustss 		printf("ohci_device_isoc_abort: early return\n");
   3556       1.224       mrg 		goto done;
   3557        1.83  augustss 	}
   3558        1.83  augustss 
   3559        1.83  augustss 	/* Give xfer the requested abort code. */
   3560   1.254.2.7     skrll 	xfer->ux_status = USBD_CANCELLED;
   3561        1.83  augustss 
   3562        1.83  augustss 	sed = opipe->sed;
   3563       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3564       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3565       1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   3566       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3567       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3568       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3569        1.83  augustss 
   3570   1.254.2.7     skrll 	sitd = xfer->ux_hcpriv;
   3571        1.83  augustss #ifdef DIAGNOSTIC
   3572        1.83  augustss 	if (sitd == NULL) {
   3573        1.83  augustss 		printf("ohci_device_isoc_abort: hcpriv==0\n");
   3574       1.224       mrg 		goto done;
   3575        1.83  augustss 	}
   3576        1.83  augustss #endif
   3577        1.83  augustss 	for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
   3578        1.83  augustss #ifdef DIAGNOSTIC
   3579        1.83  augustss 		DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
   3580        1.83  augustss 		sitd->isdone = 1;
   3581        1.83  augustss #endif
   3582        1.83  augustss 	}
   3583        1.83  augustss 
   3584       1.224       mrg 	usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
   3585        1.83  augustss 
   3586        1.83  augustss 	/* Run callback. */
   3587        1.83  augustss 	usb_transfer_complete(xfer);
   3588        1.83  augustss 
   3589       1.168  augustss 	sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
   3590       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   3591       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3592       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3593        1.83  augustss 
   3594       1.224       mrg  done:
   3595       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3596        1.60  augustss }
   3597        1.60  augustss 
   3598        1.60  augustss void
   3599       1.179  christos ohci_device_isoc_done(usbd_xfer_handle xfer)
   3600        1.60  augustss {
   3601        1.83  augustss 	DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
   3602        1.60  augustss }
   3603        1.60  augustss 
   3604        1.60  augustss usbd_status
   3605        1.91  augustss ohci_setup_isoc(usbd_pipe_handle pipe)
   3606        1.60  augustss {
   3607        1.60  augustss 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   3608   1.254.2.7     skrll 	ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3609        1.60  augustss 	struct iso *iso = &opipe->u.iso;
   3610        1.60  augustss 
   3611        1.60  augustss 	iso->next = -1;
   3612        1.60  augustss 	iso->inuse = 0;
   3613        1.60  augustss 
   3614       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3615       1.168  augustss 	ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
   3616       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3617        1.83  augustss 
   3618        1.60  augustss 	return (USBD_NORMAL_COMPLETION);
   3619        1.60  augustss }
   3620        1.60  augustss 
   3621        1.60  augustss void
   3622        1.91  augustss ohci_device_isoc_close(usbd_pipe_handle pipe)
   3623        1.60  augustss {
   3624        1.60  augustss 	struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
   3625   1.254.2.7     skrll 	ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
   3626        1.60  augustss 
   3627       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3628       1.224       mrg 
   3629        1.60  augustss 	DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
   3630        1.60  augustss 	ohci_close_pipe(pipe, sc->sc_isoc_head);
   3631        1.83  augustss #ifdef DIAGNOSTIC
   3632        1.83  augustss 	opipe->tail.itd->isdone = 1;
   3633        1.83  augustss #endif
   3634        1.60  augustss 	ohci_free_sitd(sc, opipe->tail.itd);
   3635         1.1  augustss }
   3636