ohci.c revision 1.254.2.15 1 1.254.2.15 skrll /* $NetBSD: ohci.c,v 1.254.2.15 2014/12/06 08:27:23 skrll Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.224 mrg * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
9 1.224 mrg * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
10 1.224 mrg * and Matthew R. Green (mrg (at) eterna.com.au).
11 1.157 mycroft * This code is derived from software contributed to The NetBSD Foundation
12 1.157 mycroft * by Charles M. Hannum.
13 1.1 augustss *
14 1.1 augustss * Redistribution and use in source and binary forms, with or without
15 1.1 augustss * modification, are permitted provided that the following conditions
16 1.1 augustss * are met:
17 1.1 augustss * 1. Redistributions of source code must retain the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer.
19 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 augustss * notice, this list of conditions and the following disclaimer in the
21 1.1 augustss * documentation and/or other materials provided with the distribution.
22 1.1 augustss *
23 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /*
37 1.1 augustss * USB Open Host Controller driver.
38 1.1 augustss *
39 1.96 augustss * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
40 1.201 uebayasi * USB spec: http://www.usb.org/developers/docs/
41 1.1 augustss */
42 1.108 lukem
43 1.108 lukem #include <sys/cdefs.h>
44 1.254.2.15 skrll __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.15 2014/12/06 08:27:23 skrll Exp $");
45 1.1 augustss
46 1.1 augustss #include <sys/param.h>
47 1.1 augustss #include <sys/systm.h>
48 1.224 mrg #include <sys/kmem.h>
49 1.55 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/device.h>
51 1.55 augustss #include <sys/select.h>
52 1.1 augustss #include <sys/proc.h>
53 1.1 augustss #include <sys/queue.h>
54 1.223 mrg #include <sys/cpu.h>
55 1.1 augustss
56 1.16 augustss #include <machine/endian.h>
57 1.4 augustss
58 1.1 augustss #include <dev/usb/usb.h>
59 1.1 augustss #include <dev/usb/usbdi.h>
60 1.1 augustss #include <dev/usb/usbdivar.h>
61 1.38 augustss #include <dev/usb/usb_mem.h>
62 1.1 augustss #include <dev/usb/usb_quirks.h>
63 1.1 augustss
64 1.1 augustss #include <dev/usb/ohcireg.h>
65 1.1 augustss #include <dev/usb/ohcivar.h>
66 1.254.2.11 skrll #include <dev/usb/usbroothub.h>
67 1.1 augustss
68 1.1 augustss
69 1.36 augustss
70 1.52 augustss #ifdef OHCI_DEBUG
71 1.209 dyoung #define DPRINTF(x) if (ohcidebug) printf x
72 1.209 dyoung #define DPRINTFN(n,x) if (ohcidebug>(n)) printf x
73 1.52 augustss int ohcidebug = 0;
74 1.52 augustss #else
75 1.52 augustss #define DPRINTF(x)
76 1.52 augustss #define DPRINTFN(n,x)
77 1.52 augustss #endif
78 1.52 augustss
79 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
80 1.169 tron #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
81 1.16 augustss #else
82 1.169 tron #define SWAP_ENDIAN OHCI_BIG_ENDIAN
83 1.16 augustss #endif
84 1.16 augustss
85 1.169 tron #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
86 1.169 tron #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
87 1.169 tron #define HTOO16(val) O16TOH(val)
88 1.169 tron #define HTOO32(val) O32TOH(val)
89 1.168 augustss
90 1.1 augustss struct ohci_pipe;
91 1.1 augustss
92 1.91 augustss Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
93 1.91 augustss Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
94 1.1 augustss
95 1.91 augustss Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
96 1.91 augustss Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
97 1.1 augustss
98 1.91 augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
99 1.91 augustss Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
100 1.60 augustss
101 1.91 augustss Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
102 1.91 augustss ohci_soft_td_t *);
103 1.91 augustss Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
104 1.77 augustss ohci_softc_t *, int, int, usbd_xfer_handle,
105 1.91 augustss ohci_soft_td_t *, ohci_soft_td_t **);
106 1.53 augustss
107 1.91 augustss Static usbd_status ohci_open(usbd_pipe_handle);
108 1.91 augustss Static void ohci_poll(struct usbd_bus *);
109 1.99 augustss Static void ohci_softintr(void *);
110 1.91 augustss Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
111 1.91 augustss Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
112 1.254.2.15 skrll Static void ohci_rhsc_softint(void *);
113 1.91 augustss
114 1.91 augustss Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
115 1.168 augustss Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
116 1.168 augustss ohci_soft_ed_t *);
117 1.168 augustss
118 1.224 mrg Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
119 1.224 mrg ohci_soft_ed_t *);
120 1.91 augustss Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
121 1.91 augustss Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
122 1.91 augustss Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
123 1.91 augustss Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
124 1.91 augustss Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
125 1.91 augustss Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
126 1.91 augustss
127 1.254.2.15 skrll Static usbd_status ohci_setup_isoc(usbd_pipe_handle);
128 1.91 augustss Static void ohci_device_isoc_enter(usbd_xfer_handle);
129 1.91 augustss
130 1.91 augustss Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
131 1.91 augustss Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
132 1.224 mrg Static void ohci_get_lock(struct usbd_bus *, kmutex_t **);
133 1.254.2.13 skrll Static int ohci_roothub_ctrl(struct usbd_bus *,
134 1.254.2.12 skrll usb_device_request_t *, void *, int);
135 1.91 augustss
136 1.91 augustss Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
137 1.91 augustss Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
138 1.91 augustss Static void ohci_root_intr_abort(usbd_xfer_handle);
139 1.91 augustss Static void ohci_root_intr_close(usbd_pipe_handle);
140 1.91 augustss Static void ohci_root_intr_done(usbd_xfer_handle);
141 1.91 augustss
142 1.91 augustss Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
143 1.91 augustss Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
144 1.91 augustss Static void ohci_device_ctrl_abort(usbd_xfer_handle);
145 1.91 augustss Static void ohci_device_ctrl_close(usbd_pipe_handle);
146 1.91 augustss Static void ohci_device_ctrl_done(usbd_xfer_handle);
147 1.91 augustss
148 1.91 augustss Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
149 1.91 augustss Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
150 1.91 augustss Static void ohci_device_bulk_abort(usbd_xfer_handle);
151 1.91 augustss Static void ohci_device_bulk_close(usbd_pipe_handle);
152 1.91 augustss Static void ohci_device_bulk_done(usbd_xfer_handle);
153 1.91 augustss
154 1.91 augustss Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
155 1.91 augustss Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
156 1.91 augustss Static void ohci_device_intr_abort(usbd_xfer_handle);
157 1.91 augustss Static void ohci_device_intr_close(usbd_pipe_handle);
158 1.91 augustss Static void ohci_device_intr_done(usbd_xfer_handle);
159 1.91 augustss
160 1.91 augustss Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
161 1.91 augustss Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
162 1.91 augustss Static void ohci_device_isoc_abort(usbd_xfer_handle);
163 1.91 augustss Static void ohci_device_isoc_close(usbd_pipe_handle);
164 1.91 augustss Static void ohci_device_isoc_done(usbd_xfer_handle);
165 1.91 augustss
166 1.254.2.15 skrll Static usbd_status ohci_device_setintr(ohci_softc_t *,
167 1.254.2.15 skrll struct ohci_pipe *, int);
168 1.91 augustss
169 1.91 augustss Static void ohci_timeout(void *);
170 1.114 augustss Static void ohci_timeout_task(void *);
171 1.104 augustss Static void ohci_rhsc_enable(void *);
172 1.91 augustss
173 1.91 augustss Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
174 1.91 augustss Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
175 1.53 augustss
176 1.254.2.15 skrll Static void ohci_device_clear_toggle(usbd_pipe_handle);
177 1.254.2.15 skrll Static void ohci_noop(usbd_pipe_handle);
178 1.37 augustss
179 1.52 augustss #ifdef OHCI_DEBUG
180 1.91 augustss Static void ohci_dumpregs(ohci_softc_t *);
181 1.168 augustss Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
182 1.168 augustss Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
183 1.168 augustss Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
184 1.168 augustss Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
185 1.168 augustss Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
186 1.1 augustss #endif
187 1.1 augustss
188 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
189 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
190 1.88 augustss #define OWRITE1(sc, r, x) \
191 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
192 1.88 augustss #define OWRITE2(sc, r, x) \
193 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
194 1.88 augustss #define OWRITE4(sc, r, x) \
195 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
196 1.174 mrg
197 1.174 mrg static __inline uint32_t
198 1.174 mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
199 1.174 mrg {
200 1.174 mrg
201 1.174 mrg OBARR(sc);
202 1.174 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
203 1.174 mrg }
204 1.1 augustss
205 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
206 1.254.2.1 skrll Static uint8_t revbits[OHCI_NO_INTRS] =
207 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
208 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
209 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
210 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
211 1.1 augustss
212 1.1 augustss struct ohci_pipe {
213 1.1 augustss struct usbd_pipe pipe;
214 1.1 augustss ohci_soft_ed_t *sed;
215 1.60 augustss union {
216 1.60 augustss ohci_soft_td_t *td;
217 1.60 augustss ohci_soft_itd_t *itd;
218 1.60 augustss } tail;
219 1.1 augustss /* Info needed for different pipe kinds. */
220 1.1 augustss union {
221 1.1 augustss /* Control pipe */
222 1.1 augustss struct {
223 1.4 augustss usb_dma_t reqdma;
224 1.1 augustss u_int length;
225 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
226 1.1 augustss } ctl;
227 1.1 augustss /* Interrupt pipe */
228 1.1 augustss struct {
229 1.1 augustss int nslots;
230 1.1 augustss int pos;
231 1.1 augustss } intr;
232 1.3 augustss /* Bulk pipe */
233 1.3 augustss struct {
234 1.3 augustss u_int length;
235 1.32 augustss int isread;
236 1.3 augustss } bulk;
237 1.43 augustss /* Iso pipe */
238 1.43 augustss struct iso {
239 1.60 augustss int next, inuse;
240 1.43 augustss } iso;
241 1.1 augustss } u;
242 1.1 augustss };
243 1.1 augustss
244 1.182 drochner Static const struct usbd_bus_methods ohci_bus_methods = {
245 1.254.2.5 skrll .ubm_open = ohci_open,
246 1.254.2.5 skrll .ubm_softint = ohci_softintr,
247 1.254.2.5 skrll .ubm_dopoll = ohci_poll,
248 1.254.2.5 skrll .ubm_allocx = ohci_allocx,
249 1.254.2.5 skrll .ubm_freex = ohci_freex,
250 1.254.2.5 skrll .ubm_getlock = ohci_get_lock,
251 1.254.2.12 skrll .ubm_rhctrl = ohci_roothub_ctrl,
252 1.1 augustss };
253 1.1 augustss
254 1.182 drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
255 1.254.2.5 skrll .upm_transfer = ohci_root_intr_transfer,
256 1.254.2.5 skrll .upm_start = ohci_root_intr_start,
257 1.254.2.5 skrll .upm_abort = ohci_root_intr_abort,
258 1.254.2.5 skrll .upm_close = ohci_root_intr_close,
259 1.254.2.5 skrll .upm_cleartoggle = ohci_noop,
260 1.254.2.5 skrll .upm_done = ohci_root_intr_done,
261 1.1 augustss };
262 1.1 augustss
263 1.182 drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
264 1.254.2.5 skrll .upm_transfer = ohci_device_ctrl_transfer,
265 1.254.2.5 skrll .upm_start = ohci_device_ctrl_start,
266 1.254.2.5 skrll .upm_abort = ohci_device_ctrl_abort,
267 1.254.2.5 skrll .upm_close = ohci_device_ctrl_close,
268 1.254.2.5 skrll .upm_cleartoggle = ohci_noop,
269 1.254.2.5 skrll .upm_done = ohci_device_ctrl_done,
270 1.1 augustss };
271 1.1 augustss
272 1.182 drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
273 1.254.2.5 skrll .upm_transfer = ohci_device_intr_transfer,
274 1.254.2.5 skrll .upm_start = ohci_device_intr_start,
275 1.254.2.5 skrll .upm_abort = ohci_device_intr_abort,
276 1.254.2.5 skrll .upm_close = ohci_device_intr_close,
277 1.254.2.5 skrll .upm_cleartoggle = ohci_device_clear_toggle,
278 1.254.2.5 skrll .upm_done = ohci_device_intr_done,
279 1.1 augustss };
280 1.1 augustss
281 1.182 drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
282 1.254.2.5 skrll .upm_transfer = ohci_device_bulk_transfer,
283 1.254.2.5 skrll .upm_start = ohci_device_bulk_start,
284 1.254.2.5 skrll .upm_abort = ohci_device_bulk_abort,
285 1.254.2.5 skrll .upm_close = ohci_device_bulk_close,
286 1.254.2.5 skrll .upm_cleartoggle = ohci_device_clear_toggle,
287 1.254.2.5 skrll .upm_done = ohci_device_bulk_done,
288 1.3 augustss };
289 1.3 augustss
290 1.182 drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
291 1.254.2.5 skrll .upm_transfer = ohci_device_isoc_transfer,
292 1.254.2.5 skrll .upm_start = ohci_device_isoc_start,
293 1.254.2.5 skrll .upm_abort = ohci_device_isoc_abort,
294 1.254.2.5 skrll .upm_close = ohci_device_isoc_close,
295 1.254.2.5 skrll .upm_cleartoggle = ohci_noop,
296 1.254.2.5 skrll .upm_done = ohci_device_isoc_done,
297 1.43 augustss };
298 1.43 augustss
299 1.47 augustss int
300 1.189 dyoung ohci_activate(device_t self, enum devact act)
301 1.47 augustss {
302 1.189 dyoung struct ohci_softc *sc = device_private(self);
303 1.47 augustss
304 1.47 augustss switch (act) {
305 1.47 augustss case DVACT_DEACTIVATE:
306 1.183 kiyohara sc->sc_dying = 1;
307 1.203 dyoung return 0;
308 1.203 dyoung default:
309 1.203 dyoung return EOPNOTSUPP;
310 1.47 augustss }
311 1.47 augustss }
312 1.47 augustss
313 1.187 dyoung void
314 1.187 dyoung ohci_childdet(device_t self, device_t child)
315 1.187 dyoung {
316 1.187 dyoung struct ohci_softc *sc = device_private(self);
317 1.187 dyoung
318 1.187 dyoung KASSERT(sc->sc_child == child);
319 1.187 dyoung sc->sc_child = NULL;
320 1.187 dyoung }
321 1.187 dyoung
322 1.47 augustss int
323 1.91 augustss ohci_detach(struct ohci_softc *sc, int flags)
324 1.47 augustss {
325 1.47 augustss int rv = 0;
326 1.47 augustss
327 1.47 augustss if (sc->sc_child != NULL)
328 1.47 augustss rv = config_detach(sc->sc_child, flags);
329 1.120 augustss
330 1.47 augustss if (rv != 0)
331 1.254.2.13 skrll return rv;
332 1.47 augustss
333 1.254 ozaki callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock);
334 1.104 augustss
335 1.116 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
336 1.209 dyoung callout_destroy(&sc->sc_tmo_rhsc);
337 1.116 augustss
338 1.224 mrg softint_disestablish(sc->sc_rhsc_si);
339 1.224 mrg
340 1.224 mrg cv_destroy(&sc->sc_softwake_cv);
341 1.224 mrg
342 1.224 mrg mutex_destroy(&sc->sc_lock);
343 1.224 mrg mutex_destroy(&sc->sc_intr_lock);
344 1.224 mrg
345 1.198 cegger if (sc->sc_hcca != NULL)
346 1.198 cegger usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
347 1.232 christos pool_cache_destroy(sc->sc_xferpool);
348 1.47 augustss
349 1.254.2.13 skrll return rv;
350 1.47 augustss }
351 1.47 augustss
352 1.1 augustss ohci_soft_ed_t *
353 1.91 augustss ohci_alloc_sed(ohci_softc_t *sc)
354 1.1 augustss {
355 1.1 augustss ohci_soft_ed_t *sed;
356 1.53 augustss usbd_status err;
357 1.1 augustss int i, offs;
358 1.4 augustss usb_dma_t dma;
359 1.1 augustss
360 1.53 augustss if (sc->sc_freeeds == NULL) {
361 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
362 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
363 1.53 augustss OHCI_ED_ALIGN, &dma);
364 1.53 augustss if (err)
365 1.254.2.13 skrll return 0;
366 1.225 skrll for (i = 0; i < OHCI_SED_CHUNK; i++) {
367 1.39 augustss offs = i * OHCI_SED_SIZE;
368 1.123 augustss sed = KERNADDR(&dma, offs);
369 1.125 augustss sed->physaddr = DMAADDR(&dma, offs);
370 1.195 bouyer sed->dma = dma;
371 1.195 bouyer sed->offs = offs;
372 1.1 augustss sed->next = sc->sc_freeeds;
373 1.1 augustss sc->sc_freeeds = sed;
374 1.1 augustss }
375 1.1 augustss }
376 1.1 augustss sed = sc->sc_freeeds;
377 1.1 augustss sc->sc_freeeds = sed->next;
378 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
379 1.1 augustss sed->next = 0;
380 1.254.2.13 skrll return sed;
381 1.1 augustss }
382 1.1 augustss
383 1.1 augustss void
384 1.91 augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
385 1.1 augustss {
386 1.1 augustss sed->next = sc->sc_freeeds;
387 1.1 augustss sc->sc_freeeds = sed;
388 1.1 augustss }
389 1.1 augustss
390 1.1 augustss ohci_soft_td_t *
391 1.91 augustss ohci_alloc_std(ohci_softc_t *sc)
392 1.1 augustss {
393 1.1 augustss ohci_soft_td_t *std;
394 1.53 augustss usbd_status err;
395 1.1 augustss int i, offs;
396 1.4 augustss usb_dma_t dma;
397 1.1 augustss
398 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
399 1.240 skrll
400 1.53 augustss if (sc->sc_freetds == NULL) {
401 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
402 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
403 1.53 augustss OHCI_TD_ALIGN, &dma);
404 1.53 augustss if (err)
405 1.254.2.13 skrll return NULL;
406 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
407 1.39 augustss offs = i * OHCI_STD_SIZE;
408 1.123 augustss std = KERNADDR(&dma, offs);
409 1.125 augustss std->physaddr = DMAADDR(&dma, offs);
410 1.195 bouyer std->dma = dma;
411 1.195 bouyer std->offs = offs;
412 1.1 augustss std->nexttd = sc->sc_freetds;
413 1.1 augustss sc->sc_freetds = std;
414 1.1 augustss }
415 1.1 augustss }
416 1.69 augustss
417 1.1 augustss std = sc->sc_freetds;
418 1.1 augustss sc->sc_freetds = std->nexttd;
419 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
420 1.83 augustss std->nexttd = NULL;
421 1.83 augustss std->xfer = NULL;
422 1.69 augustss ohci_hash_add_td(sc, std);
423 1.69 augustss
424 1.254.2.13 skrll return std;
425 1.1 augustss }
426 1.1 augustss
427 1.1 augustss void
428 1.91 augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
429 1.1 augustss {
430 1.254.2.7 skrll
431 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
432 1.254.2.1 skrll
433 1.69 augustss ohci_hash_rem_td(sc, std);
434 1.1 augustss std->nexttd = sc->sc_freetds;
435 1.1 augustss sc->sc_freetds = std;
436 1.1 augustss }
437 1.1 augustss
438 1.1 augustss usbd_status
439 1.91 augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
440 1.91 augustss int alen, int rd, usbd_xfer_handle xfer,
441 1.91 augustss ohci_soft_td_t *sp, ohci_soft_td_t **ep)
442 1.48 augustss {
443 1.48 augustss ohci_soft_td_t *next, *cur;
444 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
445 1.254.2.1 skrll uint32_t tdflags;
446 1.75 augustss int len, curlen;
447 1.254.2.7 skrll usb_dma_t *dma = &xfer->ux_dmabuf;
448 1.254.2.7 skrll uint16_t flags = xfer->ux_flags;
449 1.48 augustss
450 1.75 augustss DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
451 1.75 augustss
452 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
453 1.224 mrg
454 1.75 augustss len = alen;
455 1.48 augustss cur = sp;
456 1.125 augustss dataphys = DMAADDR(dma, 0);
457 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
458 1.195 bouyer usb_syncmem(dma, 0, len,
459 1.195 bouyer rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
460 1.168 augustss tdflags = HTOO32(
461 1.120 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
462 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
463 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
464 1.61 augustss
465 1.48 augustss for (;;) {
466 1.48 augustss next = ohci_alloc_std(sc);
467 1.75 augustss if (next == NULL)
468 1.61 augustss goto nomem;
469 1.48 augustss
470 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
471 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
472 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
473 1.48 augustss /* we can handle it in this TD */
474 1.48 augustss curlen = len;
475 1.48 augustss } else {
476 1.48 augustss /* must use multiple TDs, fill as much as possible. */
477 1.120 augustss curlen = 2 * OHCI_PAGE_SIZE -
478 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
479 1.78 augustss /* the length must be a multiple of the max size */
480 1.254.2.7 skrll curlen -= curlen % UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize);
481 1.78 augustss #ifdef DIAGNOSTIC
482 1.78 augustss if (curlen == 0)
483 1.128 provos panic("ohci_alloc_std: curlen == 0");
484 1.78 augustss #endif
485 1.48 augustss }
486 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
487 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
488 1.48 augustss dataphys, dataphysend,
489 1.48 augustss len, curlen));
490 1.48 augustss len -= curlen;
491 1.48 augustss
492 1.77 augustss cur->td.td_flags = tdflags;
493 1.168 augustss cur->td.td_cbp = HTOO32(dataphys);
494 1.48 augustss cur->nexttd = next;
495 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
496 1.168 augustss cur->td.td_be = HTOO32(dataphys + curlen - 1);
497 1.48 augustss cur->len = curlen;
498 1.48 augustss cur->flags = OHCI_ADD_LEN;
499 1.77 augustss cur->xfer = xfer;
500 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
501 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
502 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
503 1.48 augustss dataphys, dataphys + curlen - 1));
504 1.48 augustss if (len == 0)
505 1.48 augustss break;
506 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
507 1.48 augustss dataphys += curlen;
508 1.48 augustss cur = next;
509 1.48 augustss }
510 1.164 augustss if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
511 1.254.2.7 skrll alen % UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize) == 0) {
512 1.61 augustss /* Force a 0 length transfer at the end. */
513 1.75 augustss
514 1.75 augustss cur = next;
515 1.61 augustss next = ohci_alloc_std(sc);
516 1.75 augustss if (next == NULL)
517 1.61 augustss goto nomem;
518 1.61 augustss
519 1.77 augustss cur->td.td_flags = tdflags;
520 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
521 1.61 augustss cur->nexttd = next;
522 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
523 1.75 augustss cur->td.td_be = ~0;
524 1.61 augustss cur->len = 0;
525 1.61 augustss cur->flags = 0;
526 1.77 augustss cur->xfer = xfer;
527 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
528 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
529 1.61 augustss DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
530 1.61 augustss }
531 1.77 augustss *ep = cur;
532 1.48 augustss
533 1.254.2.13 skrll return USBD_NORMAL_COMPLETION;
534 1.61 augustss
535 1.61 augustss nomem:
536 1.236 skrll
537 1.236 skrll /* Don't free sp - let the caller do that */
538 1.236 skrll ohci_free_std_chain(sc, sp->nexttd, NULL);
539 1.236 skrll
540 1.254.2.13 skrll return USBD_NOMEM;
541 1.48 augustss }
542 1.48 augustss
543 1.82 augustss Static void
544 1.120 augustss ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
545 1.91 augustss ohci_soft_td_t *stdend)
546 1.48 augustss {
547 1.48 augustss ohci_soft_td_t *p;
548 1.48 augustss
549 1.48 augustss for (; std != stdend; std = p) {
550 1.48 augustss p = std->nexttd;
551 1.48 augustss ohci_free_std(sc, std);
552 1.48 augustss }
553 1.48 augustss }
554 1.48 augustss
555 1.60 augustss ohci_soft_itd_t *
556 1.91 augustss ohci_alloc_sitd(ohci_softc_t *sc)
557 1.60 augustss {
558 1.60 augustss ohci_soft_itd_t *sitd;
559 1.60 augustss usbd_status err;
560 1.224 mrg int i, offs;
561 1.60 augustss usb_dma_t dma;
562 1.60 augustss
563 1.60 augustss if (sc->sc_freeitds == NULL) {
564 1.60 augustss DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
565 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
566 1.83 augustss OHCI_ITD_ALIGN, &dma);
567 1.60 augustss if (err)
568 1.254.2.13 skrll return NULL;
569 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
570 1.83 augustss offs = i * OHCI_SITD_SIZE;
571 1.123 augustss sitd = KERNADDR(&dma, offs);
572 1.125 augustss sitd->physaddr = DMAADDR(&dma, offs);
573 1.195 bouyer sitd->dma = dma;
574 1.195 bouyer sitd->offs = offs;
575 1.60 augustss sitd->nextitd = sc->sc_freeitds;
576 1.60 augustss sc->sc_freeitds = sitd;
577 1.60 augustss }
578 1.60 augustss }
579 1.83 augustss
580 1.60 augustss sitd = sc->sc_freeitds;
581 1.60 augustss sc->sc_freeitds = sitd->nextitd;
582 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
583 1.83 augustss sitd->nextitd = NULL;
584 1.83 augustss sitd->xfer = NULL;
585 1.83 augustss ohci_hash_add_itd(sc, sitd);
586 1.83 augustss
587 1.83 augustss #ifdef DIAGNOSTIC
588 1.83 augustss sitd->isdone = 0;
589 1.83 augustss #endif
590 1.83 augustss
591 1.254.2.13 skrll return sitd;
592 1.60 augustss }
593 1.60 augustss
594 1.60 augustss void
595 1.91 augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
596 1.60 augustss {
597 1.83 augustss
598 1.83 augustss DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
599 1.83 augustss
600 1.83 augustss #ifdef DIAGNOSTIC
601 1.83 augustss if (!sitd->isdone) {
602 1.128 provos panic("ohci_free_sitd: sitd=%p not done", sitd);
603 1.83 augustss return;
604 1.83 augustss }
605 1.134 toshii /* Warn double free */
606 1.134 toshii sitd->isdone = 0;
607 1.83 augustss #endif
608 1.83 augustss
609 1.83 augustss ohci_hash_rem_itd(sc, sitd);
610 1.60 augustss sitd->nextitd = sc->sc_freeitds;
611 1.60 augustss sc->sc_freeitds = sitd;
612 1.60 augustss }
613 1.60 augustss
614 1.254.2.14 skrll int
615 1.91 augustss ohci_init(ohci_softc_t *sc)
616 1.1 augustss {
617 1.1 augustss ohci_soft_ed_t *sed, *psed;
618 1.53 augustss usbd_status err;
619 1.1 augustss int i;
620 1.254.2.1 skrll uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */;
621 1.16 augustss
622 1.1 augustss DPRINTF(("ohci_init: start\n"));
623 1.199 jmcneill aprint_normal_dev(sc->sc_dev, "");
624 1.199 jmcneill
625 1.198 cegger sc->sc_hcca = NULL;
626 1.224 mrg callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
627 1.224 mrg
628 1.224 mrg mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
629 1.224 mrg mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
630 1.224 mrg cv_init(&sc->sc_softwake_cv, "ohciab");
631 1.224 mrg
632 1.224 mrg sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
633 1.224 mrg ohci_rhsc_softint, sc);
634 1.198 cegger
635 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
636 1.198 cegger LIST_INIT(&sc->sc_hash_tds[i]);
637 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
638 1.198 cegger LIST_INIT(&sc->sc_hash_itds[i]);
639 1.198 cegger
640 1.232 christos sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
641 1.232 christos "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
642 1.198 cegger
643 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
644 1.200 enami aprint_normal("OHCI version %d.%d%s\n",
645 1.199 jmcneill OHCI_REV_HI(rev), OHCI_REV_LO(rev),
646 1.199 jmcneill OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
647 1.55 augustss
648 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
649 1.199 jmcneill aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
650 1.254.2.7 skrll sc->sc_bus.ub_revision = USBREV_UNKNOWN;
651 1.254.2.14 skrll return -1;
652 1.1 augustss }
653 1.254.2.7 skrll sc->sc_bus.ub_revision = USBREV_1_0;
654 1.254.2.7 skrll sc->sc_bus.ub_usedma = true;
655 1.153 fvdl
656 1.73 augustss /* XXX determine alignment by R/W */
657 1.1 augustss /* Allocate the HCCA area. */
658 1.120 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
659 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
660 1.198 cegger if (err) {
661 1.198 cegger sc->sc_hcca = NULL;
662 1.198 cegger return err;
663 1.198 cegger }
664 1.123 augustss sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
665 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
666 1.1 augustss
667 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
668 1.1 augustss
669 1.60 augustss /* Allocate dummy ED that starts the control list. */
670 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
671 1.53 augustss if (sc->sc_ctrl_head == NULL) {
672 1.254.2.14 skrll err = ENOMEM;
673 1.1 augustss goto bad1;
674 1.1 augustss }
675 1.168 augustss sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
676 1.34 augustss
677 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
678 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
679 1.53 augustss if (sc->sc_bulk_head == NULL) {
680 1.254.2.14 skrll err = ENOMEM;
681 1.1 augustss goto bad2;
682 1.1 augustss }
683 1.168 augustss sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
684 1.195 bouyer usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
685 1.195 bouyer sizeof(sc->sc_bulk_head->ed),
686 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
687 1.1 augustss
688 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
689 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
690 1.60 augustss if (sc->sc_isoc_head == NULL) {
691 1.254.2.14 skrll err = ENOMEM;
692 1.60 augustss goto bad3;
693 1.60 augustss }
694 1.168 augustss sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
695 1.195 bouyer usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
696 1.195 bouyer sizeof(sc->sc_isoc_head->ed),
697 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
698 1.60 augustss
699 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
700 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
701 1.1 augustss sed = ohci_alloc_sed(sc);
702 1.53 augustss if (sed == NULL) {
703 1.1 augustss while (--i >= 0)
704 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
705 1.254.2.14 skrll err = ENOMEM;
706 1.60 augustss goto bad4;
707 1.1 augustss }
708 1.1 augustss /* All ED fields are set to 0. */
709 1.1 augustss sc->sc_eds[i] = sed;
710 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
711 1.60 augustss if (i != 0)
712 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
713 1.60 augustss else
714 1.60 augustss psed= sc->sc_isoc_head;
715 1.60 augustss sed->next = psed;
716 1.168 augustss sed->ed.ed_nexted = HTOO32(psed->physaddr);
717 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
718 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
719 1.1 augustss }
720 1.120 augustss /*
721 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
722 1.1 augustss * the tree set up properly to spread the interrupts.
723 1.1 augustss */
724 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
725 1.120 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
726 1.168 augustss HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
727 1.195 bouyer usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
728 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
729 1.1 augustss
730 1.73 augustss #ifdef OHCI_DEBUG
731 1.73 augustss if (ohcidebug > 15) {
732 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
733 1.73 augustss printf("ed#%d ", i);
734 1.168 augustss ohci_dump_ed(sc, sc->sc_eds[i]);
735 1.73 augustss }
736 1.73 augustss printf("iso ");
737 1.168 augustss ohci_dump_ed(sc, sc->sc_isoc_head);
738 1.73 augustss }
739 1.73 augustss #endif
740 1.73 augustss
741 1.161 augustss /* Preserve values programmed by SMM/BIOS but lost over reset. */
742 1.161 augustss ctl = OREAD4(sc, OHCI_CONTROL);
743 1.161 augustss rwc = ctl & OHCI_RWC;
744 1.161 augustss fm = OREAD4(sc, OHCI_FM_INTERVAL);
745 1.161 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
746 1.243 martin /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */
747 1.161 augustss
748 1.1 augustss /* Determine in what context we are running. */
749 1.1 augustss if (ctl & OHCI_IR) {
750 1.1 augustss /* SMM active, request change */
751 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
752 1.160 augustss if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
753 1.160 augustss (OHCI_OC | OHCI_MIE))
754 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
755 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
756 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
757 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
758 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
759 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
760 1.1 augustss }
761 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
762 1.1 augustss if ((ctl & OHCI_IR) == 0) {
763 1.199 jmcneill aprint_error_dev(sc->sc_dev,
764 1.199 jmcneill "SMM does not respond, resetting\n");
765 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
766 1.1 augustss goto reset;
767 1.1 augustss }
768 1.103 augustss #if 0
769 1.103 augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
770 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
771 1.1 augustss /* BIOS started controller. */
772 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
773 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
774 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
775 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
776 1.1 augustss }
777 1.103 augustss #endif
778 1.1 augustss } else {
779 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
780 1.1 augustss reset:
781 1.1 augustss /* Controller was cold started. */
782 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
783 1.1 augustss }
784 1.1 augustss
785 1.16 augustss /*
786 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
787 1.25 augustss * without it some controllers do not start.
788 1.16 augustss */
789 1.190 drochner DPRINTF(("%s: resetting\n", device_xname(sc->sc_dev)));
790 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
791 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
792 1.16 augustss
793 1.1 augustss /* We now own the host controller and the bus has been reset. */
794 1.1 augustss
795 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
796 1.1 augustss /* Nominal time for a reset is 10 us. */
797 1.1 augustss for (i = 0; i < 10; i++) {
798 1.1 augustss delay(10);
799 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
800 1.1 augustss if (!hcr)
801 1.1 augustss break;
802 1.1 augustss }
803 1.1 augustss if (hcr) {
804 1.199 jmcneill aprint_error_dev(sc->sc_dev, "reset timeout\n");
805 1.254.2.14 skrll err = EIO;
806 1.60 augustss goto bad5;
807 1.1 augustss }
808 1.52 augustss #ifdef OHCI_DEBUG
809 1.1 augustss if (ohcidebug > 15)
810 1.1 augustss ohci_dumpregs(sc);
811 1.1 augustss #endif
812 1.1 augustss
813 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
814 1.1 augustss
815 1.1 augustss /* Set up HC registers. */
816 1.125 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
817 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
818 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
819 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
820 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
821 1.55 augustss /* switch on desired functional features */
822 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
823 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
824 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
825 1.161 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
826 1.1 augustss /* And finally start it! */
827 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
828 1.1 augustss
829 1.1 augustss /*
830 1.1 augustss * The controller is now OPERATIONAL. Set a some final
831 1.1 augustss * registers that should be set earlier, but that the
832 1.1 augustss * controller ignores when in the SUSPEND state.
833 1.1 augustss */
834 1.161 augustss ival = OHCI_GET_IVAL(fm);
835 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
836 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
837 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
838 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
839 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
840 1.1 augustss
841 1.249 skrll if (sc->sc_flags & OHCIF_SUPERIO) {
842 1.249 skrll /* no overcurrent protection */
843 1.249 skrll desca |= OHCI_NOCP;
844 1.249 skrll /*
845 1.249 skrll * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning
846 1.249 skrll * that
847 1.249 skrll * - ports are always power switched
848 1.249 skrll * - don't wait for powered root hub port
849 1.249 skrll */
850 1.249 skrll desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS);
851 1.249 skrll }
852 1.249 skrll
853 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
854 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
855 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
856 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
857 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
858 1.1 augustss
859 1.85 augustss /*
860 1.85 augustss * The AMD756 requires a delay before re-reading the register,
861 1.85 augustss * otherwise it will occasionally report 0 ports.
862 1.85 augustss */
863 1.145 augustss sc->sc_noport = 0;
864 1.145 augustss for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
865 1.145 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
866 1.145 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
867 1.145 augustss }
868 1.1 augustss
869 1.52 augustss #ifdef OHCI_DEBUG
870 1.1 augustss if (ohcidebug > 5)
871 1.1 augustss ohci_dumpregs(sc);
872 1.1 augustss #endif
873 1.120 augustss
874 1.1 augustss /* Set up the bus struct. */
875 1.254.2.7 skrll sc->sc_bus.ub_methods = &ohci_bus_methods;
876 1.254.2.7 skrll sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe);
877 1.1 augustss
878 1.101 minoura sc->sc_control = sc->sc_intre = 0;
879 1.59 augustss
880 1.167 augustss /* Finally, turn on interrupts. */
881 1.211 matt DPRINTFN(1,("ohci_init: enabling %#x\n", sc->sc_eintrs | OHCI_MIE));
882 1.167 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
883 1.167 augustss
884 1.254.2.14 skrll return 0;
885 1.1 augustss
886 1.60 augustss bad5:
887 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
888 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
889 1.60 augustss bad4:
890 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
891 1.1 augustss bad3:
892 1.144 augustss ohci_free_sed(sc, sc->sc_bulk_head);
893 1.144 augustss bad2:
894 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
895 1.1 augustss bad1:
896 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
897 1.198 cegger sc->sc_hcca = NULL;
898 1.254.2.13 skrll return err;
899 1.1 augustss }
900 1.1 augustss
901 1.62 augustss usbd_xfer_handle
902 1.91 augustss ohci_allocx(struct usbd_bus *bus)
903 1.62 augustss {
904 1.254.2.7 skrll struct ohci_softc *sc = bus->ub_hcpriv;
905 1.62 augustss usbd_xfer_handle xfer;
906 1.62 augustss
907 1.232 christos xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
908 1.118 augustss if (xfer != NULL) {
909 1.232 christos memset(xfer, 0, sizeof(struct ohci_xfer));
910 1.118 augustss #ifdef DIAGNOSTIC
911 1.254.2.7 skrll xfer->ux_state = XFER_BUSY;
912 1.118 augustss #endif
913 1.118 augustss }
914 1.254.2.13 skrll return xfer;
915 1.62 augustss }
916 1.62 augustss
917 1.62 augustss void
918 1.91 augustss ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
919 1.62 augustss {
920 1.254.2.7 skrll struct ohci_softc *sc = bus->ub_hcpriv;
921 1.62 augustss
922 1.118 augustss #ifdef DIAGNOSTIC
923 1.254.2.7 skrll if (xfer->ux_state != XFER_BUSY) {
924 1.118 augustss printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
925 1.254.2.7 skrll xfer->ux_state);
926 1.118 augustss }
927 1.254.2.7 skrll xfer->ux_state = XFER_FREE;
928 1.118 augustss #endif
929 1.232 christos pool_cache_put(sc->sc_xferpool, xfer);
930 1.42 augustss }
931 1.42 augustss
932 1.224 mrg Static void
933 1.224 mrg ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
934 1.224 mrg {
935 1.254.2.7 skrll struct ohci_softc *sc = bus->ub_hcpriv;
936 1.224 mrg
937 1.224 mrg *lock = &sc->sc_lock;
938 1.224 mrg }
939 1.224 mrg
940 1.59 augustss /*
941 1.59 augustss * Shut down the controller when the system is going down.
942 1.59 augustss */
943 1.188 dyoung bool
944 1.188 dyoung ohci_shutdown(device_t self, int flags)
945 1.59 augustss {
946 1.188 dyoung ohci_softc_t *sc = device_private(self);
947 1.59 augustss
948 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
949 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
950 1.188 dyoung return true;
951 1.59 augustss }
952 1.59 augustss
953 1.185 jmcneill bool
954 1.206 dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
955 1.33 augustss {
956 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
957 1.185 jmcneill uint32_t ctl;
958 1.33 augustss
959 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
960 1.254.2.7 skrll sc->sc_bus.ub_usepolling++;
961 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
962 1.224 mrg
963 1.185 jmcneill /* Some broken BIOSes do not recover these values */
964 1.185 jmcneill OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
965 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
966 1.185 jmcneill sc->sc_ctrl_head->physaddr);
967 1.185 jmcneill OWRITE4(sc, OHCI_BULK_HEAD_ED,
968 1.185 jmcneill sc->sc_bulk_head->physaddr);
969 1.185 jmcneill if (sc->sc_intre)
970 1.185 jmcneill OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
971 1.185 jmcneill (OHCI_ALL_INTRS | OHCI_MIE));
972 1.185 jmcneill if (sc->sc_control)
973 1.185 jmcneill ctl = sc->sc_control;
974 1.185 jmcneill else
975 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL);
976 1.185 jmcneill ctl |= OHCI_HCFS_RESUME;
977 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
978 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
979 1.185 jmcneill ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
980 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
981 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
982 1.185 jmcneill sc->sc_control = sc->sc_intre = 0;
983 1.224 mrg
984 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
985 1.254.2.7 skrll sc->sc_bus.ub_usepolling--;
986 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
987 1.185 jmcneill
988 1.185 jmcneill return true;
989 1.185 jmcneill }
990 1.185 jmcneill
991 1.185 jmcneill bool
992 1.206 dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
993 1.185 jmcneill {
994 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
995 1.185 jmcneill uint32_t ctl;
996 1.95 augustss
997 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
998 1.254.2.7 skrll sc->sc_bus.ub_usepolling++;
999 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1000 1.224 mrg
1001 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1002 1.185 jmcneill if (sc->sc_control == 0) {
1003 1.185 jmcneill /*
1004 1.185 jmcneill * Preserve register values, in case that BIOS
1005 1.185 jmcneill * does not recover them.
1006 1.185 jmcneill */
1007 1.185 jmcneill sc->sc_control = ctl;
1008 1.185 jmcneill sc->sc_intre = OREAD4(sc,
1009 1.185 jmcneill OHCI_INTERRUPT_ENABLE);
1010 1.95 augustss }
1011 1.185 jmcneill ctl |= OHCI_HCFS_SUSPEND;
1012 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1013 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1014 1.224 mrg
1015 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1016 1.254.2.7 skrll sc->sc_bus.ub_usepolling--;
1017 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1018 1.185 jmcneill
1019 1.185 jmcneill return true;
1020 1.33 augustss }
1021 1.33 augustss
1022 1.52 augustss #ifdef OHCI_DEBUG
1023 1.1 augustss void
1024 1.91 augustss ohci_dumpregs(ohci_softc_t *sc)
1025 1.1 augustss {
1026 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
1027 1.41 augustss OREAD4(sc, OHCI_REVISION),
1028 1.41 augustss OREAD4(sc, OHCI_CONTROL),
1029 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1030 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
1031 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
1032 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1033 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
1034 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
1035 1.41 augustss OREAD4(sc, OHCI_HCCA),
1036 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1037 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
1038 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
1039 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1040 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1041 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1042 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1043 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1044 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1045 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
1046 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1047 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1048 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1049 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
1050 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1051 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1052 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1053 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
1054 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
1055 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1056 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1057 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1058 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number),
1059 1.168 augustss O32TOH(sc->sc_hcca->hcca_done_head)));
1060 1.1 augustss }
1061 1.1 augustss #endif
1062 1.1 augustss
1063 1.91 augustss Static int ohci_intr1(ohci_softc_t *);
1064 1.53 augustss
1065 1.1 augustss int
1066 1.91 augustss ohci_intr(void *p)
1067 1.1 augustss {
1068 1.1 augustss ohci_softc_t *sc = p;
1069 1.224 mrg int ret = 0;
1070 1.111 augustss
1071 1.224 mrg if (sc == NULL)
1072 1.254.2.13 skrll return 0;
1073 1.53 augustss
1074 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1075 1.224 mrg
1076 1.224 mrg if (sc->sc_dying || !device_has_power(sc->sc_dev))
1077 1.224 mrg goto done;
1078 1.224 mrg
1079 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
1080 1.254.2.7 skrll if (sc->sc_bus.ub_usepolling) {
1081 1.57 augustss #ifdef DIAGNOSTIC
1082 1.149 mycroft DPRINTFN(16, ("ohci_intr: ignored interrupt while polling\n"));
1083 1.57 augustss #endif
1084 1.154 joff /* for level triggered intrs, should do something to ack */
1085 1.155 perry OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1086 1.154 joff OREAD4(sc, OHCI_INTERRUPT_STATUS));
1087 1.155 perry
1088 1.224 mrg goto done;
1089 1.57 augustss }
1090 1.53 augustss
1091 1.224 mrg ret = ohci_intr1(sc);
1092 1.224 mrg
1093 1.224 mrg done:
1094 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1095 1.224 mrg return ret;
1096 1.53 augustss }
1097 1.53 augustss
1098 1.82 augustss Static int
1099 1.91 augustss ohci_intr1(ohci_softc_t *sc)
1100 1.53 augustss {
1101 1.254.2.1 skrll uint32_t intrs, eintrs;
1102 1.1 augustss
1103 1.105 augustss DPRINTFN(14,("ohci_intr1: enter\n"));
1104 1.105 augustss
1105 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1106 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1107 1.15 augustss #ifdef DIAGNOSTIC
1108 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1109 1.15 augustss #endif
1110 1.254.2.13 skrll return 0;
1111 1.15 augustss }
1112 1.15 augustss
1113 1.224 mrg KASSERT(mutex_owned(&sc->sc_intr_lock));
1114 1.224 mrg
1115 1.157 mycroft intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1116 1.1 augustss if (!intrs)
1117 1.254.2.13 skrll return 0;
1118 1.55 augustss
1119 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1120 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1121 1.211 matt DPRINTFN(7, ("ohci_intr: sc=%p intrs=%#x(%#x) eintrs=%#x(%#x)\n",
1122 1.211 matt sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1123 1.211 matt (u_int)eintrs, sc->sc_eintrs));
1124 1.211 matt
1125 1.211 matt if (!eintrs) {
1126 1.254.2.13 skrll return 0;
1127 1.211 matt }
1128 1.1 augustss
1129 1.1 augustss if (eintrs & OHCI_SO) {
1130 1.100 augustss sc->sc_overrun_cnt++;
1131 1.100 augustss if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1132 1.100 augustss printf("%s: %u scheduling overruns\n",
1133 1.190 drochner device_xname(sc->sc_dev), sc->sc_overrun_cnt);
1134 1.100 augustss sc->sc_overrun_cnt = 0;
1135 1.100 augustss }
1136 1.1 augustss /* XXX do what */
1137 1.106 augustss eintrs &= ~OHCI_SO;
1138 1.1 augustss }
1139 1.1 augustss if (eintrs & OHCI_WDH) {
1140 1.157 mycroft /*
1141 1.157 mycroft * We block the interrupt below, and reenable it later from
1142 1.157 mycroft * ohci_softintr().
1143 1.157 mycroft */
1144 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1145 1.1 augustss }
1146 1.1 augustss if (eintrs & OHCI_RD) {
1147 1.190 drochner printf("%s: resume detect\n", device_xname(sc->sc_dev));
1148 1.1 augustss /* XXX process resume detect */
1149 1.1 augustss }
1150 1.1 augustss if (eintrs & OHCI_UE) {
1151 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1152 1.190 drochner device_xname(sc->sc_dev));
1153 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1154 1.1 augustss /* XXX what else */
1155 1.1 augustss }
1156 1.1 augustss if (eintrs & OHCI_RHSC) {
1157 1.120 augustss /*
1158 1.157 mycroft * We block the interrupt below, and reenable it later from
1159 1.157 mycroft * a timeout.
1160 1.1 augustss */
1161 1.224 mrg softint_schedule(sc->sc_rhsc_si);
1162 1.1 augustss }
1163 1.1 augustss
1164 1.106 augustss if (eintrs != 0) {
1165 1.157 mycroft /* Block unprocessed interrupts. */
1166 1.106 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1167 1.106 augustss sc->sc_eintrs &= ~eintrs;
1168 1.157 mycroft DPRINTFN(1, ("%s: blocking intrs 0x%x\n",
1169 1.190 drochner device_xname(sc->sc_dev), eintrs));
1170 1.106 augustss }
1171 1.1 augustss
1172 1.254.2.13 skrll return 1;
1173 1.1 augustss }
1174 1.1 augustss
1175 1.1 augustss void
1176 1.104 augustss ohci_rhsc_enable(void *v_sc)
1177 1.104 augustss {
1178 1.104 augustss ohci_softc_t *sc = v_sc;
1179 1.104 augustss
1180 1.224 mrg DPRINTFN(1, ("%s: %s\n", __func__, device_xname(sc->sc_dev)));
1181 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1182 1.157 mycroft sc->sc_eintrs |= OHCI_RHSC;
1183 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1184 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1185 1.1 augustss }
1186 1.1 augustss
1187 1.52 augustss #ifdef OHCI_DEBUG
1188 1.166 drochner const char *ohci_cc_strs[] = {
1189 1.13 augustss "NO_ERROR",
1190 1.13 augustss "CRC",
1191 1.13 augustss "BIT_STUFFING",
1192 1.13 augustss "DATA_TOGGLE_MISMATCH",
1193 1.13 augustss "STALL",
1194 1.13 augustss "DEVICE_NOT_RESPONDING",
1195 1.13 augustss "PID_CHECK_FAILURE",
1196 1.13 augustss "UNEXPECTED_PID",
1197 1.13 augustss "DATA_OVERRUN",
1198 1.13 augustss "DATA_UNDERRUN",
1199 1.13 augustss "BUFFER_OVERRUN",
1200 1.13 augustss "BUFFER_UNDERRUN",
1201 1.67 augustss "reserved",
1202 1.67 augustss "reserved",
1203 1.67 augustss "NOT_ACCESSED",
1204 1.13 augustss "NOT_ACCESSED",
1205 1.13 augustss };
1206 1.13 augustss #endif
1207 1.13 augustss
1208 1.1 augustss void
1209 1.157 mycroft ohci_softintr(void *v)
1210 1.83 augustss {
1211 1.190 drochner struct usbd_bus *bus = v;
1212 1.254.2.7 skrll ohci_softc_t *sc = bus->ub_hcpriv;
1213 1.157 mycroft ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1214 1.157 mycroft ohci_soft_td_t *std, *sdone, *stdnext;
1215 1.157 mycroft usbd_xfer_handle xfer;
1216 1.157 mycroft struct ohci_pipe *opipe;
1217 1.224 mrg int len, cc;
1218 1.157 mycroft int i, j, actlen, iframes, uedir;
1219 1.157 mycroft ohci_physaddr_t done;
1220 1.157 mycroft
1221 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1222 1.224 mrg
1223 1.157 mycroft DPRINTFN(10,("ohci_softintr: enter\n"));
1224 1.157 mycroft
1225 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1226 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1227 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1228 1.168 augustss done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1229 1.157 mycroft sc->sc_hcca->hcca_done_head = 0;
1230 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1231 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1232 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1233 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1234 1.157 mycroft sc->sc_eintrs |= OHCI_WDH;
1235 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1236 1.83 augustss
1237 1.83 augustss /* Reverse the done list. */
1238 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1239 1.83 augustss std = ohci_hash_find_td(sc, done);
1240 1.83 augustss if (std != NULL) {
1241 1.195 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1242 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1243 1.83 augustss std->dnext = sdone;
1244 1.168 augustss done = O32TOH(std->td.td_nexttd);
1245 1.83 augustss sdone = std;
1246 1.83 augustss DPRINTFN(10,("add TD %p\n", std));
1247 1.83 augustss continue;
1248 1.83 augustss }
1249 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1250 1.83 augustss if (sitd != NULL) {
1251 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1252 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1253 1.83 augustss sitd->dnext = sidone;
1254 1.168 augustss done = O32TOH(sitd->itd.itd_nextitd);
1255 1.83 augustss sidone = sitd;
1256 1.83 augustss DPRINTFN(5,("add ITD %p\n", sitd));
1257 1.83 augustss continue;
1258 1.83 augustss }
1259 1.218 jmcneill device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
1260 1.218 jmcneill (u_long)done);
1261 1.218 jmcneill break;
1262 1.83 augustss }
1263 1.83 augustss
1264 1.105 augustss DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone));
1265 1.1 augustss
1266 1.52 augustss #ifdef OHCI_DEBUG
1267 1.1 augustss if (ohcidebug > 10) {
1268 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1269 1.234 skrll for (std = sdone; std; std = std->dnext)
1270 1.254.2.1 skrll ohci_dump_td(sc, std);
1271 1.1 augustss }
1272 1.1 augustss #endif
1273 1.1 augustss
1274 1.48 augustss for (std = sdone; std; std = stdnext) {
1275 1.53 augustss xfer = std->xfer;
1276 1.48 augustss stdnext = std->dnext;
1277 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1278 1.254.2.7 skrll std, xfer, xfer ? xfer->ux_hcpriv : 0));
1279 1.71 augustss if (xfer == NULL) {
1280 1.117 augustss /*
1281 1.117 augustss * xfer == NULL: There seems to be no xfer associated
1282 1.71 augustss * with this TD. It is tailp that happened to end up on
1283 1.71 augustss * the done queue.
1284 1.117 augustss * Shouldn't happen, but some chips are broken(?).
1285 1.71 augustss */
1286 1.71 augustss continue;
1287 1.71 augustss }
1288 1.254.2.7 skrll if (xfer->ux_status == USBD_CANCELLED ||
1289 1.254.2.7 skrll xfer->ux_status == USBD_TIMEOUT) {
1290 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1291 1.53 augustss xfer));
1292 1.38 augustss /* Handled by abort routine. */
1293 1.83 augustss continue;
1294 1.83 augustss }
1295 1.254.2.7 skrll callout_stop(&xfer->ux_callout);
1296 1.141 mycroft
1297 1.141 mycroft len = std->len;
1298 1.141 mycroft if (std->td.td_cbp != 0)
1299 1.168 augustss len -= O32TOH(std->td.td_be) -
1300 1.168 augustss O32TOH(std->td.td_cbp) + 1;
1301 1.141 mycroft DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", len,
1302 1.141 mycroft std->flags));
1303 1.141 mycroft if (std->flags & OHCI_ADD_LEN)
1304 1.254.2.7 skrll xfer->ux_actlen += len;
1305 1.141 mycroft
1306 1.168 augustss cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1307 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1308 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1309 1.254.2.7 skrll xfer->ux_status = USBD_NORMAL_COMPLETION;
1310 1.53 augustss usb_transfer_complete(xfer);
1311 1.21 augustss }
1312 1.48 augustss ohci_free_std(sc, std);
1313 1.1 augustss } else {
1314 1.48 augustss /*
1315 1.48 augustss * Endpoint is halted. First unlink all the TDs
1316 1.48 augustss * belonging to the failed transfer, and then restart
1317 1.48 augustss * the endpoint.
1318 1.48 augustss */
1319 1.1 augustss ohci_soft_td_t *p, *n;
1320 1.254.2.7 skrll opipe = (struct ohci_pipe *)xfer->ux_pipe;
1321 1.48 augustss
1322 1.71 augustss DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1323 1.168 augustss OHCI_TD_GET_CC(O32TOH(std->td.td_flags)),
1324 1.168 augustss ohci_cc_strs[OHCI_TD_GET_CC(O32TOH(std->td.td_flags))]));
1325 1.48 augustss
1326 1.48 augustss /* remove TDs */
1327 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1328 1.1 augustss n = p->nexttd;
1329 1.1 augustss ohci_free_std(sc, p);
1330 1.1 augustss }
1331 1.48 augustss
1332 1.16 augustss /* clear halt */
1333 1.168 augustss opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1334 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1335 1.48 augustss
1336 1.1 augustss if (cc == OHCI_CC_STALL)
1337 1.254.2.7 skrll xfer->ux_status = USBD_STALLED;
1338 1.1 augustss else
1339 1.254.2.7 skrll xfer->ux_status = USBD_IOERROR;
1340 1.53 augustss usb_transfer_complete(xfer);
1341 1.1 augustss }
1342 1.1 augustss }
1343 1.72 augustss
1344 1.83 augustss #ifdef OHCI_DEBUG
1345 1.83 augustss if (ohcidebug > 10) {
1346 1.105 augustss DPRINTF(("ohci_softintr: ITD done:\n"));
1347 1.234 skrll for (sitd = sidone; sitd; sitd = sitd->dnext)
1348 1.254.2.1 skrll ohci_dump_itd(sc, sitd);
1349 1.83 augustss }
1350 1.83 augustss #endif
1351 1.83 augustss
1352 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1353 1.83 augustss xfer = sitd->xfer;
1354 1.83 augustss sitdnext = sitd->dnext;
1355 1.83 augustss DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1356 1.254.2.7 skrll sitd, xfer, xfer ? xfer->ux_hcpriv : 0));
1357 1.83 augustss if (xfer == NULL)
1358 1.83 augustss continue;
1359 1.254.2.7 skrll if (xfer->ux_status == USBD_CANCELLED ||
1360 1.254.2.7 skrll xfer->ux_status == USBD_TIMEOUT) {
1361 1.83 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1362 1.83 augustss xfer));
1363 1.83 augustss /* Handled by abort routine. */
1364 1.83 augustss continue;
1365 1.83 augustss }
1366 1.83 augustss #ifdef DIAGNOSTIC
1367 1.83 augustss if (sitd->isdone)
1368 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1369 1.83 augustss sitd->isdone = 1;
1370 1.83 augustss #endif
1371 1.134 toshii if (sitd->flags & OHCI_CALL_DONE) {
1372 1.134 toshii ohci_soft_itd_t *next;
1373 1.134 toshii
1374 1.254.2.7 skrll opipe = (struct ohci_pipe *)xfer->ux_pipe;
1375 1.254.2.7 skrll opipe->u.iso.inuse -= xfer->ux_nframes;
1376 1.254.2.7 skrll uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->
1377 1.134 toshii bEndpointAddress);
1378 1.254.2.7 skrll xfer->ux_status = USBD_NORMAL_COMPLETION;
1379 1.134 toshii actlen = 0;
1380 1.254.2.7 skrll for (i = 0, sitd = xfer->ux_hcpriv;;
1381 1.134 toshii sitd = next) {
1382 1.134 toshii next = sitd->nextitd;
1383 1.168 augustss if (OHCI_ITD_GET_CC(O32TOH(sitd->
1384 1.135 toshii itd.itd_flags)) != OHCI_CC_NO_ERROR)
1385 1.254.2.7 skrll xfer->ux_status = USBD_IOERROR;
1386 1.134 toshii /* For input, update frlengths with actual */
1387 1.134 toshii /* XXX anything necessary for output? */
1388 1.134 toshii if (uedir == UE_DIR_IN &&
1389 1.254.2.7 skrll xfer->ux_status == USBD_NORMAL_COMPLETION) {
1390 1.168 augustss iframes = OHCI_ITD_GET_FC(O32TOH(
1391 1.135 toshii sitd->itd.itd_flags));
1392 1.134 toshii for (j = 0; j < iframes; i++, j++) {
1393 1.168 augustss len = O16TOH(sitd->
1394 1.134 toshii itd.itd_offset[j]);
1395 1.158 toshii if ((OHCI_ITD_PSW_GET_CC(len) &
1396 1.158 toshii OHCI_CC_NOT_ACCESSED_MASK)
1397 1.158 toshii == OHCI_CC_NOT_ACCESSED)
1398 1.158 toshii len = 0;
1399 1.158 toshii else
1400 1.158 toshii len = OHCI_ITD_PSW_LENGTH(len);
1401 1.254.2.7 skrll xfer->ux_frlengths[i] = len;
1402 1.134 toshii actlen += len;
1403 1.134 toshii }
1404 1.134 toshii }
1405 1.134 toshii if (sitd->flags & OHCI_CALL_DONE)
1406 1.134 toshii break;
1407 1.134 toshii ohci_free_sitd(sc, sitd);
1408 1.83 augustss }
1409 1.134 toshii ohci_free_sitd(sc, sitd);
1410 1.134 toshii if (uedir == UE_DIR_IN &&
1411 1.254.2.7 skrll xfer->ux_status == USBD_NORMAL_COMPLETION)
1412 1.254.2.7 skrll xfer->ux_actlen = actlen;
1413 1.254.2.7 skrll xfer->ux_hcpriv = NULL;
1414 1.134 toshii
1415 1.83 augustss usb_transfer_complete(xfer);
1416 1.83 augustss }
1417 1.83 augustss }
1418 1.83 augustss
1419 1.119 augustss if (sc->sc_softwake) {
1420 1.119 augustss sc->sc_softwake = 0;
1421 1.224 mrg cv_broadcast(&sc->sc_softwake_cv);
1422 1.119 augustss }
1423 1.119 augustss
1424 1.105 augustss DPRINTFN(10,("ohci_softintr: done:\n"));
1425 1.1 augustss }
1426 1.1 augustss
1427 1.1 augustss void
1428 1.179 christos ohci_device_ctrl_done(usbd_xfer_handle xfer)
1429 1.1 augustss {
1430 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
1431 1.224 mrg #ifdef DIAGNOSTIC
1432 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
1433 1.224 mrg #endif
1434 1.254.2.7 skrll int len = UGETW(xfer->ux_request.wLength);
1435 1.254.2.7 skrll int isread = (xfer->ux_request.bmRequestType & UT_READ);
1436 1.195 bouyer
1437 1.140 gson DPRINTFN(10,("ohci_device_ctrl_done: xfer=%p\n", xfer));
1438 1.1 augustss
1439 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1440 1.224 mrg
1441 1.38 augustss #ifdef DIAGNOSTIC
1442 1.254.2.7 skrll if (!(xfer->ux_rqflags & URQ_REQUEST)) {
1443 1.140 gson panic("ohci_device_ctrl_done: not a request");
1444 1.1 augustss }
1445 1.38 augustss #endif
1446 1.195 bouyer if (len)
1447 1.254.2.7 skrll usb_syncmem(&xfer->ux_dmabuf, 0, len,
1448 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1449 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0,
1450 1.195 bouyer sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1451 1.1 augustss }
1452 1.1 augustss
1453 1.1 augustss void
1454 1.91 augustss ohci_device_intr_done(usbd_xfer_handle xfer)
1455 1.1 augustss {
1456 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
1457 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
1458 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1459 1.48 augustss ohci_soft_td_t *data, *tail;
1460 1.195 bouyer int isread =
1461 1.254.2.7 skrll (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
1462 1.1 augustss
1463 1.140 gson DPRINTFN(10,("ohci_device_intr_done: xfer=%p, actlen=%d\n",
1464 1.254.2.7 skrll xfer, xfer->ux_actlen));
1465 1.1 augustss
1466 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1467 1.224 mrg
1468 1.254.2.7 skrll usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
1469 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1470 1.254.2.7 skrll if (xfer->ux_pipe->up_repeat) {
1471 1.60 augustss data = opipe->tail.td;
1472 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1473 1.53 augustss if (tail == NULL) {
1474 1.254.2.7 skrll xfer->ux_status = USBD_NOMEM;
1475 1.1 augustss return;
1476 1.1 augustss }
1477 1.55 augustss tail->xfer = NULL;
1478 1.120 augustss
1479 1.168 augustss data->td.td_flags = HTOO32(
1480 1.120 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1481 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1482 1.254.2.7 skrll if (xfer->ux_flags & USBD_SHORT_XFER_OK)
1483 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
1484 1.254.2.7 skrll data->td.td_cbp = HTOO32(DMAADDR(&xfer->ux_dmabuf, 0));
1485 1.48 augustss data->nexttd = tail;
1486 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
1487 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1488 1.254.2.7 skrll xfer->ux_length - 1);
1489 1.254.2.7 skrll data->len = xfer->ux_length;
1490 1.53 augustss data->xfer = xfer;
1491 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1492 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
1493 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1494 1.254.2.7 skrll xfer->ux_hcpriv = data;
1495 1.254.2.7 skrll xfer->ux_actlen = 0;
1496 1.1 augustss
1497 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1498 1.195 bouyer usb_syncmem(&sed->dma,
1499 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1500 1.195 bouyer sizeof(sed->ed.ed_tailp),
1501 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1502 1.60 augustss opipe->tail.td = tail;
1503 1.1 augustss }
1504 1.1 augustss }
1505 1.1 augustss
1506 1.1 augustss void
1507 1.179 christos ohci_device_bulk_done(usbd_xfer_handle xfer)
1508 1.3 augustss {
1509 1.224 mrg #ifdef DIAGNOSTIC
1510 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
1511 1.224 mrg #endif
1512 1.195 bouyer int isread =
1513 1.254.2.7 skrll (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
1514 1.195 bouyer
1515 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1516 1.224 mrg
1517 1.140 gson DPRINTFN(10,("ohci_device_bulk_done: xfer=%p, actlen=%d\n",
1518 1.254.2.7 skrll xfer, xfer->ux_actlen));
1519 1.254.2.7 skrll usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
1520 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1521 1.3 augustss }
1522 1.3 augustss
1523 1.224 mrg Static void
1524 1.224 mrg ohci_rhsc_softint(void *arg)
1525 1.224 mrg {
1526 1.224 mrg ohci_softc_t *sc = arg;
1527 1.224 mrg
1528 1.224 mrg mutex_enter(&sc->sc_lock);
1529 1.224 mrg
1530 1.224 mrg ohci_rhsc(sc, sc->sc_intrxfer);
1531 1.224 mrg
1532 1.224 mrg /* Do not allow RHSC interrupts > 1 per second */
1533 1.224 mrg callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1534 1.224 mrg
1535 1.224 mrg mutex_exit(&sc->sc_lock);
1536 1.224 mrg }
1537 1.224 mrg
1538 1.3 augustss void
1539 1.91 augustss ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1540 1.1 augustss {
1541 1.1 augustss u_char *p;
1542 1.1 augustss int i, m;
1543 1.243 martin int hstatus __unused;
1544 1.1 augustss
1545 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1546 1.224 mrg
1547 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1548 1.120 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1549 1.53 augustss sc, xfer, hstatus));
1550 1.1 augustss
1551 1.53 augustss if (xfer == NULL) {
1552 1.1 augustss /* Just ignore the change. */
1553 1.1 augustss return;
1554 1.1 augustss }
1555 1.1 augustss
1556 1.254.2.7 skrll p = xfer->ux_buf;
1557 1.254.2.7 skrll m = min(sc->sc_noport, xfer->ux_length * 8 - 1);
1558 1.254.2.7 skrll memset(p, 0, xfer->ux_length);
1559 1.1 augustss for (i = 1; i <= m; i++) {
1560 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1561 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1562 1.1 augustss p[i/8] |= 1 << (i%8);
1563 1.1 augustss }
1564 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1565 1.254.2.7 skrll xfer->ux_actlen = xfer->ux_length;
1566 1.254.2.7 skrll xfer->ux_status = USBD_NORMAL_COMPLETION;
1567 1.1 augustss
1568 1.53 augustss usb_transfer_complete(xfer);
1569 1.38 augustss }
1570 1.38 augustss
1571 1.38 augustss void
1572 1.179 christos ohci_root_intr_done(usbd_xfer_handle xfer)
1573 1.65 augustss {
1574 1.65 augustss }
1575 1.65 augustss
1576 1.1 augustss /*
1577 1.1 augustss * Wait here until controller claims to have an interrupt.
1578 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1579 1.1 augustss * too long.
1580 1.1 augustss */
1581 1.1 augustss void
1582 1.91 augustss ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1583 1.1 augustss {
1584 1.163 augustss int timo;
1585 1.254.2.1 skrll uint32_t intrs;
1586 1.1 augustss
1587 1.224 mrg mutex_enter(&sc->sc_lock);
1588 1.224 mrg
1589 1.254.2.7 skrll xfer->ux_status = USBD_IN_PROGRESS;
1590 1.254.2.7 skrll for (timo = xfer->ux_timeout; timo >= 0; timo--) {
1591 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1592 1.116 augustss if (sc->sc_dying)
1593 1.116 augustss break;
1594 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1595 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1596 1.52 augustss #ifdef OHCI_DEBUG
1597 1.1 augustss if (ohcidebug > 15)
1598 1.1 augustss ohci_dumpregs(sc);
1599 1.1 augustss #endif
1600 1.1 augustss if (intrs) {
1601 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1602 1.53 augustss ohci_intr1(sc);
1603 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1604 1.254.2.7 skrll if (xfer->ux_status != USBD_IN_PROGRESS)
1605 1.230 jmcneill goto done;
1606 1.1 augustss }
1607 1.1 augustss }
1608 1.15 augustss
1609 1.15 augustss /* Timeout */
1610 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1611 1.254.2.7 skrll xfer->ux_status = USBD_TIMEOUT;
1612 1.53 augustss usb_transfer_complete(xfer);
1613 1.224 mrg
1614 1.15 augustss /* XXX should free TD */
1615 1.224 mrg
1616 1.230 jmcneill done:
1617 1.224 mrg mutex_exit(&sc->sc_lock);
1618 1.5 augustss }
1619 1.5 augustss
1620 1.5 augustss void
1621 1.91 augustss ohci_poll(struct usbd_bus *bus)
1622 1.5 augustss {
1623 1.254.2.7 skrll ohci_softc_t *sc = bus->ub_hcpriv;
1624 1.105 augustss #ifdef OHCI_DEBUG
1625 1.105 augustss static int last;
1626 1.105 augustss int new;
1627 1.105 augustss new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1628 1.105 augustss if (new != last) {
1629 1.105 augustss DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new));
1630 1.105 augustss last = new;
1631 1.105 augustss }
1632 1.105 augustss #endif
1633 1.217 jmcneill sc->sc_eintrs |= OHCI_WDH;
1634 1.224 mrg if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
1635 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1636 1.53 augustss ohci_intr1(sc);
1637 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1638 1.224 mrg }
1639 1.1 augustss }
1640 1.1 augustss
1641 1.1 augustss usbd_status
1642 1.91 augustss ohci_device_request(usbd_xfer_handle xfer)
1643 1.1 augustss {
1644 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
1645 1.254.2.7 skrll usb_device_request_t *req = &xfer->ux_request;
1646 1.254.2.7 skrll usbd_device_handle dev = opipe->pipe.up_dev;
1647 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
1648 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1649 1.1 augustss ohci_soft_ed_t *sed;
1650 1.1 augustss int isread;
1651 1.1 augustss int len;
1652 1.53 augustss usbd_status err;
1653 1.224 mrg
1654 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1655 1.1 augustss
1656 1.1 augustss isread = req->bmRequestType & UT_READ;
1657 1.1 augustss len = UGETW(req->wLength);
1658 1.1 augustss
1659 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1660 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1661 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1662 1.254.2.7 skrll UGETW(req->wIndex), len, dev->ud_addr,
1663 1.254.2.7 skrll opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress));
1664 1.1 augustss
1665 1.60 augustss setup = opipe->tail.td;
1666 1.1 augustss stat = ohci_alloc_std(sc);
1667 1.53 augustss if (stat == NULL) {
1668 1.53 augustss err = USBD_NOMEM;
1669 1.1 augustss goto bad1;
1670 1.1 augustss }
1671 1.1 augustss tail = ohci_alloc_std(sc);
1672 1.53 augustss if (tail == NULL) {
1673 1.53 augustss err = USBD_NOMEM;
1674 1.1 augustss goto bad2;
1675 1.1 augustss }
1676 1.55 augustss tail->xfer = NULL;
1677 1.1 augustss
1678 1.1 augustss sed = opipe->sed;
1679 1.1 augustss opipe->u.ctl.length = len;
1680 1.1 augustss
1681 1.254.2.7 skrll KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr,
1682 1.250 skrll "address ED %d pipe %d\n",
1683 1.254.2.7 skrll OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr);
1684 1.254.2.2 skrll KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) ==
1685 1.254.2.7 skrll UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize),
1686 1.250 skrll "MPL ED %d pipe %d\n",
1687 1.250 skrll OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)),
1688 1.254.2.7 skrll UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize));
1689 1.1 augustss
1690 1.77 augustss next = stat;
1691 1.77 augustss
1692 1.1 augustss /* Set up data transaction */
1693 1.1 augustss if (len != 0) {
1694 1.77 augustss ohci_soft_td_t *std = stat;
1695 1.77 augustss
1696 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1697 1.77 augustss std, &stat);
1698 1.236 skrll if (err) {
1699 1.236 skrll /* stat is unchanged if error */
1700 1.236 skrll goto bad3;
1701 1.236 skrll }
1702 1.77 augustss stat = stat->nexttd; /* point at free TD */
1703 1.236 skrll
1704 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1705 1.168 augustss std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1706 1.168 augustss std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1707 1.195 bouyer usb_syncmem(&std->dma,
1708 1.195 bouyer std->offs + offsetof(ohci_td_t, td_flags),
1709 1.195 bouyer sizeof(std->td.td_flags),
1710 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1711 1.34 augustss }
1712 1.1 augustss
1713 1.123 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof *req);
1714 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof *req, BUS_DMASYNC_PREWRITE);
1715 1.1 augustss
1716 1.168 augustss setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1717 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1718 1.168 augustss setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1719 1.1 augustss setup->nexttd = next;
1720 1.168 augustss setup->td.td_nexttd = HTOO32(next->physaddr);
1721 1.168 augustss setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof *req - 1);
1722 1.77 augustss setup->len = 0;
1723 1.53 augustss setup->xfer = xfer;
1724 1.34 augustss setup->flags = 0;
1725 1.254.2.7 skrll xfer->ux_hcpriv = setup;
1726 1.195 bouyer usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
1727 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1728 1.1 augustss
1729 1.168 augustss stat->td.td_flags = HTOO32(
1730 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1731 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1732 1.39 augustss stat->td.td_cbp = 0;
1733 1.1 augustss stat->nexttd = tail;
1734 1.168 augustss stat->td.td_nexttd = HTOO32(tail->physaddr);
1735 1.39 augustss stat->td.td_be = 0;
1736 1.77 augustss stat->flags = OHCI_CALL_DONE;
1737 1.1 augustss stat->len = 0;
1738 1.53 augustss stat->xfer = xfer;
1739 1.195 bouyer usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
1740 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1741 1.1 augustss
1742 1.52 augustss #ifdef OHCI_DEBUG
1743 1.1 augustss if (ohcidebug > 5) {
1744 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1745 1.168 augustss ohci_dump_ed(sc, sed);
1746 1.168 augustss ohci_dump_tds(sc, setup);
1747 1.1 augustss }
1748 1.1 augustss #endif
1749 1.1 augustss
1750 1.1 augustss /* Insert ED in schedule */
1751 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1752 1.195 bouyer usb_syncmem(&sed->dma,
1753 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1754 1.195 bouyer sizeof(sed->ed.ed_tailp),
1755 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1756 1.60 augustss opipe->tail.td = tail;
1757 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1758 1.254.2.7 skrll if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
1759 1.254.2.7 skrll callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
1760 1.80 augustss ohci_timeout, xfer);
1761 1.15 augustss }
1762 1.1 augustss
1763 1.115 itojun #ifdef OHCI_DEBUG
1764 1.113 augustss if (ohcidebug > 20) {
1765 1.77 augustss delay(10000);
1766 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1767 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1768 1.113 augustss ohci_dumpregs(sc);
1769 1.113 augustss printf("ctrl head:\n");
1770 1.168 augustss ohci_dump_ed(sc, sc->sc_ctrl_head);
1771 1.113 augustss printf("sed:\n");
1772 1.168 augustss ohci_dump_ed(sc, sed);
1773 1.168 augustss ohci_dump_tds(sc, setup);
1774 1.1 augustss }
1775 1.1 augustss #endif
1776 1.1 augustss
1777 1.254.2.13 skrll return USBD_NORMAL_COMPLETION;
1778 1.1 augustss
1779 1.1 augustss bad3:
1780 1.1 augustss ohci_free_std(sc, tail);
1781 1.1 augustss bad2:
1782 1.1 augustss ohci_free_std(sc, stat);
1783 1.1 augustss bad1:
1784 1.254.2.13 skrll return err;
1785 1.1 augustss }
1786 1.1 augustss
1787 1.1 augustss /*
1788 1.224 mrg * Add an ED to the schedule. Called with USB lock held.
1789 1.1 augustss */
1790 1.224 mrg Static void
1791 1.168 augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1792 1.1 augustss {
1793 1.113 augustss DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head));
1794 1.113 augustss
1795 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1796 1.224 mrg
1797 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1798 1.195 bouyer sizeof(head->ed.ed_nexted),
1799 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1800 1.1 augustss sed->next = head->next;
1801 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1802 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1803 1.195 bouyer sizeof(sed->ed.ed_nexted),
1804 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1805 1.1 augustss head->next = sed;
1806 1.168 augustss head->ed.ed_nexted = HTOO32(sed->physaddr);
1807 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1808 1.195 bouyer sizeof(head->ed.ed_nexted),
1809 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1810 1.1 augustss }
1811 1.1 augustss
1812 1.1 augustss /*
1813 1.224 mrg * Remove an ED from the schedule. Called with USB lock held.
1814 1.3 augustss */
1815 1.224 mrg Static void
1816 1.224 mrg ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1817 1.3 augustss {
1818 1.120 augustss ohci_soft_ed_t *p;
1819 1.3 augustss
1820 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1821 1.224 mrg
1822 1.3 augustss /* XXX */
1823 1.133 toshii for (p = head; p != NULL && p->next != sed; p = p->next)
1824 1.3 augustss ;
1825 1.55 augustss if (p == NULL)
1826 1.128 provos panic("ohci_rem_ed: ED not found");
1827 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1828 1.195 bouyer sizeof(sed->ed.ed_nexted),
1829 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1830 1.3 augustss p->next = sed->next;
1831 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1832 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1833 1.195 bouyer sizeof(p->ed.ed_nexted),
1834 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1835 1.3 augustss }
1836 1.3 augustss
1837 1.3 augustss /*
1838 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1839 1.1 augustss * the host controller. This queue is the processed by software.
1840 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1841 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1842 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1843 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1844 1.1 augustss * hash value.
1845 1.1 augustss */
1846 1.1 augustss
1847 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1848 1.224 mrg /* Called with USB lock held. */
1849 1.1 augustss void
1850 1.91 augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1851 1.1 augustss {
1852 1.1 augustss int h = HASH(std->physaddr);
1853 1.1 augustss
1854 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1855 1.224 mrg
1856 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1857 1.1 augustss }
1858 1.1 augustss
1859 1.224 mrg /* Called with USB lock held. */
1860 1.1 augustss void
1861 1.179 christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1862 1.1 augustss {
1863 1.46 augustss
1864 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1865 1.224 mrg
1866 1.1 augustss LIST_REMOVE(std, hnext);
1867 1.1 augustss }
1868 1.1 augustss
1869 1.1 augustss ohci_soft_td_t *
1870 1.91 augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1871 1.1 augustss {
1872 1.1 augustss int h = HASH(a);
1873 1.1 augustss ohci_soft_td_t *std;
1874 1.1 augustss
1875 1.120 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1876 1.53 augustss std != NULL;
1877 1.1 augustss std = LIST_NEXT(std, hnext))
1878 1.1 augustss if (std->physaddr == a)
1879 1.254.2.13 skrll return std;
1880 1.254.2.13 skrll return NULL;
1881 1.83 augustss }
1882 1.83 augustss
1883 1.224 mrg /* Called with USB lock held. */
1884 1.83 augustss void
1885 1.91 augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1886 1.83 augustss {
1887 1.83 augustss int h = HASH(sitd->physaddr);
1888 1.83 augustss
1889 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1890 1.224 mrg
1891 1.120 augustss DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1892 1.83 augustss sitd, (u_long)sitd->physaddr));
1893 1.83 augustss
1894 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1895 1.83 augustss }
1896 1.83 augustss
1897 1.224 mrg /* Called with USB lock held. */
1898 1.83 augustss void
1899 1.179 christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1900 1.83 augustss {
1901 1.83 augustss
1902 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1903 1.224 mrg
1904 1.120 augustss DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1905 1.83 augustss sitd, (u_long)sitd->physaddr));
1906 1.83 augustss
1907 1.83 augustss LIST_REMOVE(sitd, hnext);
1908 1.83 augustss }
1909 1.83 augustss
1910 1.83 augustss ohci_soft_itd_t *
1911 1.91 augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1912 1.83 augustss {
1913 1.83 augustss int h = HASH(a);
1914 1.83 augustss ohci_soft_itd_t *sitd;
1915 1.83 augustss
1916 1.120 augustss for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1917 1.83 augustss sitd != NULL;
1918 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1919 1.83 augustss if (sitd->physaddr == a)
1920 1.254.2.13 skrll return sitd;
1921 1.254.2.13 skrll return NULL;
1922 1.1 augustss }
1923 1.1 augustss
1924 1.1 augustss void
1925 1.91 augustss ohci_timeout(void *addr)
1926 1.1 augustss {
1927 1.114 augustss struct ohci_xfer *oxfer = addr;
1928 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.ux_pipe;
1929 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
1930 1.114 augustss
1931 1.114 augustss DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer));
1932 1.114 augustss
1933 1.116 augustss if (sc->sc_dying) {
1934 1.224 mrg mutex_enter(&sc->sc_lock);
1935 1.116 augustss ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
1936 1.224 mrg mutex_exit(&sc->sc_lock);
1937 1.116 augustss return;
1938 1.116 augustss }
1939 1.116 augustss
1940 1.114 augustss /* Execute the abort in a process context. */
1941 1.231 jmcneill usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr,
1942 1.231 jmcneill USB_TASKQ_MPSAFE);
1943 1.254.2.7 skrll usb_add_task(oxfer->xfer.ux_pipe->up_dev, &oxfer->abort_task,
1944 1.178 joerg USB_TASKQ_HC);
1945 1.114 augustss }
1946 1.114 augustss
1947 1.114 augustss void
1948 1.114 augustss ohci_timeout_task(void *addr)
1949 1.114 augustss {
1950 1.53 augustss usbd_xfer_handle xfer = addr;
1951 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
1952 1.1 augustss
1953 1.114 augustss DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer));
1954 1.45 augustss
1955 1.224 mrg mutex_enter(&sc->sc_lock);
1956 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
1957 1.224 mrg mutex_exit(&sc->sc_lock);
1958 1.1 augustss }
1959 1.1 augustss
1960 1.52 augustss #ifdef OHCI_DEBUG
1961 1.1 augustss void
1962 1.168 augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
1963 1.1 augustss {
1964 1.1 augustss for (; std; std = std->nexttd)
1965 1.168 augustss ohci_dump_td(sc, std);
1966 1.1 augustss }
1967 1.1 augustss
1968 1.1 augustss void
1969 1.168 augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1970 1.1 augustss {
1971 1.92 tv char sbuf[128];
1972 1.92 tv
1973 1.204 martin usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1974 1.204 martin BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1975 1.197 christos snprintb(sbuf, sizeof(sbuf),
1976 1.237 skrll "\177\20"
1977 1.237 skrll "b\22R\0"
1978 1.237 skrll "f\23\02DP\0"
1979 1.237 skrll "=\x0" "setup\0"
1980 1.237 skrll "=\x1" "out\0"
1981 1.237 skrll "=\x2" "in\0"
1982 1.237 skrll "=\x3" "reserved\0"
1983 1.237 skrll "f\25\03DI\0"
1984 1.237 skrll "=\x07" "none\0"
1985 1.237 skrll "f\30\02T\0"
1986 1.237 skrll "=\x0" "carry\0"
1987 1.237 skrll "=\x1" "carry\0"
1988 1.237 skrll "=\x2" "0\0"
1989 1.237 skrll "=\x3" "1\0"
1990 1.237 skrll "f\32\02EC\0"
1991 1.237 skrll "f\34\04CC\0",
1992 1.254.2.1 skrll (uint32_t)O32TOH(std->td.td_flags));
1993 1.238 skrll printf("TD(%p) at %08lx:\n\tflags=%s\n\tcbp=0x%08lx nexttd=0x%08lx be=0x%08lx\n",
1994 1.107 augustss std, (u_long)std->physaddr, sbuf,
1995 1.168 augustss (u_long)O32TOH(std->td.td_cbp),
1996 1.168 augustss (u_long)O32TOH(std->td.td_nexttd),
1997 1.168 augustss (u_long)O32TOH(std->td.td_be));
1998 1.1 augustss }
1999 1.1 augustss
2000 1.1 augustss void
2001 1.168 augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2002 1.83 augustss {
2003 1.83 augustss int i;
2004 1.83 augustss
2005 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
2006 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2007 1.107 augustss printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
2008 1.120 augustss "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
2009 1.107 augustss sitd, (u_long)sitd->physaddr,
2010 1.168 augustss OHCI_ITD_GET_SF(O32TOH(sitd->itd.itd_flags)),
2011 1.168 augustss OHCI_ITD_GET_DI(O32TOH(sitd->itd.itd_flags)),
2012 1.168 augustss OHCI_ITD_GET_FC(O32TOH(sitd->itd.itd_flags)),
2013 1.168 augustss OHCI_ITD_GET_CC(O32TOH(sitd->itd.itd_flags)),
2014 1.168 augustss (u_long)O32TOH(sitd->itd.itd_bp0),
2015 1.168 augustss (u_long)O32TOH(sitd->itd.itd_nextitd),
2016 1.168 augustss (u_long)O32TOH(sitd->itd.itd_be));
2017 1.83 augustss for (i = 0; i < OHCI_ITD_NOFFSET; i++)
2018 1.107 augustss printf("offs[%d]=0x%04x ", i,
2019 1.168 augustss (u_int)O16TOH(sitd->itd.itd_offset[i]));
2020 1.107 augustss printf("\n");
2021 1.83 augustss }
2022 1.83 augustss
2023 1.83 augustss void
2024 1.168 augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2025 1.83 augustss {
2026 1.83 augustss for (; sitd; sitd = sitd->nextitd)
2027 1.168 augustss ohci_dump_itd(sc, sitd);
2028 1.83 augustss }
2029 1.83 augustss
2030 1.83 augustss void
2031 1.168 augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2032 1.1 augustss {
2033 1.92 tv char sbuf[128], sbuf2[128];
2034 1.92 tv
2035 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2036 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2037 1.197 christos snprintb(sbuf, sizeof(sbuf),
2038 1.197 christos "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
2039 1.254.2.1 skrll (uint32_t)O32TOH(sed->ed.ed_flags));
2040 1.197 christos snprintb(sbuf2, sizeof(sbuf2), "\20\1HALT\2CARRY",
2041 1.254.2.1 skrll (uint32_t)O32TOH(sed->ed.ed_headp));
2042 1.92 tv
2043 1.107 augustss printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx "
2044 1.92 tv "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
2045 1.120 augustss sed, (u_long)sed->physaddr,
2046 1.168 augustss OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)),
2047 1.168 augustss OHCI_ED_GET_EN(O32TOH(sed->ed.ed_flags)),
2048 1.168 augustss OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)), sbuf,
2049 1.168 augustss (u_long)O32TOH(sed->ed.ed_tailp), sbuf2,
2050 1.168 augustss (u_long)O32TOH(sed->ed.ed_headp),
2051 1.168 augustss (u_long)O32TOH(sed->ed.ed_nexted));
2052 1.1 augustss }
2053 1.1 augustss #endif
2054 1.1 augustss
2055 1.1 augustss usbd_status
2056 1.91 augustss ohci_open(usbd_pipe_handle pipe)
2057 1.1 augustss {
2058 1.254.2.7 skrll usbd_device_handle dev = pipe->up_dev;
2059 1.254.2.12 skrll struct usbd_bus *bus = dev->ud_bus;
2060 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
2061 1.254.2.7 skrll usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
2062 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2063 1.254.2.7 skrll uint8_t addr = dev->ud_addr;
2064 1.254.2.1 skrll uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2065 1.1 augustss ohci_soft_ed_t *sed;
2066 1.1 augustss ohci_soft_td_t *std;
2067 1.60 augustss ohci_soft_itd_t *sitd;
2068 1.60 augustss ohci_physaddr_t tdphys;
2069 1.254.2.1 skrll uint32_t fmt;
2070 1.224 mrg usbd_status err = USBD_NOMEM;
2071 1.64 augustss int ival;
2072 1.1 augustss
2073 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
2074 1.254.2.12 skrll pipe, addr, ed->bEndpointAddress, bus->ub_rhaddr));
2075 1.81 augustss
2076 1.224 mrg if (sc->sc_dying) {
2077 1.241 skrll return USBD_IOERROR;
2078 1.224 mrg }
2079 1.116 augustss
2080 1.90 thorpej std = NULL;
2081 1.90 thorpej sed = NULL;
2082 1.90 thorpej
2083 1.254.2.12 skrll if (addr == bus->ub_rhaddr) {
2084 1.1 augustss switch (ed->bEndpointAddress) {
2085 1.1 augustss case USB_CONTROL_ENDPOINT:
2086 1.254.2.12 skrll pipe->up_methods = &roothub_ctrl_methods;
2087 1.1 augustss break;
2088 1.254.2.12 skrll case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
2089 1.254.2.7 skrll pipe->up_methods = &ohci_root_intr_methods;
2090 1.1 augustss break;
2091 1.1 augustss default:
2092 1.224 mrg err = USBD_INVAL;
2093 1.241 skrll goto bad;
2094 1.1 augustss }
2095 1.1 augustss } else {
2096 1.1 augustss sed = ohci_alloc_sed(sc);
2097 1.53 augustss if (sed == NULL)
2098 1.241 skrll goto bad;
2099 1.1 augustss opipe->sed = sed;
2100 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
2101 1.224 mrg mutex_enter(&sc->sc_lock);
2102 1.60 augustss sitd = ohci_alloc_sitd(sc);
2103 1.224 mrg mutex_exit(&sc->sc_lock);
2104 1.127 augustss if (sitd == NULL)
2105 1.241 skrll goto bad;
2106 1.241 skrll
2107 1.60 augustss opipe->tail.itd = sitd;
2108 1.76 tsutsui tdphys = sitd->physaddr;
2109 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
2110 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2111 1.83 augustss fmt |= OHCI_ED_DIR_IN;
2112 1.83 augustss else
2113 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
2114 1.60 augustss } else {
2115 1.224 mrg mutex_enter(&sc->sc_lock);
2116 1.60 augustss std = ohci_alloc_std(sc);
2117 1.224 mrg mutex_exit(&sc->sc_lock);
2118 1.127 augustss if (std == NULL)
2119 1.241 skrll goto bad;
2120 1.241 skrll
2121 1.60 augustss opipe->tail.td = std;
2122 1.76 tsutsui tdphys = std->physaddr;
2123 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2124 1.60 augustss }
2125 1.168 augustss sed->ed.ed_flags = HTOO32(
2126 1.120 augustss OHCI_ED_SET_FA(addr) |
2127 1.147 mycroft OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2128 1.254.2.7 skrll (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2129 1.109 augustss fmt |
2130 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2131 1.214 jakllsch sed->ed.ed_headp = HTOO32(tdphys |
2132 1.254.2.7 skrll (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0));
2133 1.214 jakllsch sed->ed.ed_tailp = HTOO32(tdphys);
2134 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2135 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2136 1.1 augustss
2137 1.60 augustss switch (xfertype) {
2138 1.1 augustss case UE_CONTROL:
2139 1.254.2.7 skrll pipe->up_methods = &ohci_device_ctrl_methods;
2140 1.120 augustss err = usb_allocmem(&sc->sc_bus,
2141 1.120 augustss sizeof(usb_device_request_t),
2142 1.53 augustss 0, &opipe->u.ctl.reqdma);
2143 1.53 augustss if (err)
2144 1.1 augustss goto bad;
2145 1.224 mrg mutex_enter(&sc->sc_lock);
2146 1.168 augustss ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2147 1.224 mrg mutex_exit(&sc->sc_lock);
2148 1.1 augustss break;
2149 1.1 augustss case UE_INTERRUPT:
2150 1.254.2.7 skrll pipe->up_methods = &ohci_device_intr_methods;
2151 1.254.2.7 skrll ival = pipe->up_interval;
2152 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
2153 1.64 augustss ival = ed->bInterval;
2154 1.226 skrll err = ohci_device_setintr(sc, opipe, ival);
2155 1.226 skrll if (err)
2156 1.226 skrll goto bad;
2157 1.226 skrll break;
2158 1.1 augustss case UE_ISOCHRONOUS:
2159 1.254.2.7 skrll pipe->up_methods = &ohci_device_isoc_methods;
2160 1.254.2.13 skrll return ohci_setup_isoc(pipe);
2161 1.1 augustss case UE_BULK:
2162 1.254.2.7 skrll pipe->up_methods = &ohci_device_bulk_methods;
2163 1.224 mrg mutex_enter(&sc->sc_lock);
2164 1.168 augustss ohci_add_ed(sc, sed, sc->sc_bulk_head);
2165 1.224 mrg mutex_exit(&sc->sc_lock);
2166 1.3 augustss break;
2167 1.1 augustss }
2168 1.1 augustss }
2169 1.224 mrg
2170 1.224 mrg return USBD_NORMAL_COMPLETION;
2171 1.1 augustss
2172 1.1 augustss bad:
2173 1.241 skrll if (std != NULL) {
2174 1.241 skrll mutex_enter(&sc->sc_lock);
2175 1.90 thorpej ohci_free_std(sc, std);
2176 1.241 skrll mutex_exit(&sc->sc_lock);
2177 1.241 skrll }
2178 1.90 thorpej if (sed != NULL)
2179 1.90 thorpej ohci_free_sed(sc, sed);
2180 1.224 mrg return err;
2181 1.120 augustss
2182 1.1 augustss }
2183 1.1 augustss
2184 1.1 augustss /*
2185 1.34 augustss * Close a reqular pipe.
2186 1.34 augustss * Assumes that there are no pending transactions.
2187 1.34 augustss */
2188 1.34 augustss void
2189 1.91 augustss ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
2190 1.34 augustss {
2191 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2192 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2193 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
2194 1.34 augustss
2195 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2196 1.224 mrg
2197 1.34 augustss #ifdef DIAGNOSTIC
2198 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2199 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2200 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2201 1.34 augustss ohci_soft_td_t *std;
2202 1.168 augustss std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2203 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2204 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
2205 1.168 augustss (int)O32TOH(sed->ed.ed_headp),
2206 1.168 augustss (int)O32TOH(sed->ed.ed_tailp),
2207 1.34 augustss pipe, std);
2208 1.229 christos #ifdef OHCI_DEBUG
2209 1.107 augustss usbd_dump_pipe(&opipe->pipe);
2210 1.168 augustss ohci_dump_ed(sc, sed);
2211 1.106 augustss if (std)
2212 1.168 augustss ohci_dump_td(sc, std);
2213 1.106 augustss #endif
2214 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
2215 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2216 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2217 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
2218 1.34 augustss }
2219 1.34 augustss #endif
2220 1.224 mrg ohci_rem_ed(sc, sed, head);
2221 1.133 toshii /* Make sure the host controller is not touching this ED */
2222 1.133 toshii usb_delay_ms(&sc->sc_bus, 1);
2223 1.254.2.7 skrll pipe->up_endpoint->ue_toggle =
2224 1.214 jakllsch (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2225 1.34 augustss ohci_free_sed(sc, opipe->sed);
2226 1.34 augustss }
2227 1.34 augustss
2228 1.120 augustss /*
2229 1.34 augustss * Abort a device request.
2230 1.34 augustss * If this routine is called at splusb() it guarantees that the request
2231 1.34 augustss * will be removed from the hardware scheduling and that the callback
2232 1.34 augustss * for it will be called with USBD_CANCELLED status.
2233 1.34 augustss * It's impossible to guarantee that the requested transfer will not
2234 1.34 augustss * have happened since the hardware runs concurrently.
2235 1.34 augustss * If the transaction has already happened we rely on the ordinary
2236 1.34 augustss * interrupt processing to process it.
2237 1.224 mrg * XXX This is most probably wrong.
2238 1.224 mrg * XXXMRG this doesn't make sense anymore.
2239 1.34 augustss */
2240 1.34 augustss void
2241 1.91 augustss ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
2242 1.34 augustss {
2243 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
2244 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
2245 1.106 augustss ohci_soft_ed_t *sed = opipe->sed;
2246 1.106 augustss ohci_soft_td_t *p, *n;
2247 1.106 augustss ohci_physaddr_t headp;
2248 1.224 mrg int hit;
2249 1.159 augustss int wake;
2250 1.34 augustss
2251 1.106 augustss DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed));
2252 1.34 augustss
2253 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2254 1.254.2.3 skrll ASSERT_SLEEPABLE();
2255 1.224 mrg
2256 1.116 augustss if (sc->sc_dying) {
2257 1.116 augustss /* If we're dying, just do the software part. */
2258 1.254.2.7 skrll xfer->ux_status = status; /* make software ignore it */
2259 1.254.2.7 skrll callout_halt(&xfer->ux_callout, &sc->sc_lock);
2260 1.116 augustss usb_transfer_complete(xfer);
2261 1.170 christos return;
2262 1.116 augustss }
2263 1.116 augustss
2264 1.106 augustss /*
2265 1.159 augustss * If an abort is already in progress then just wait for it to
2266 1.159 augustss * complete and return.
2267 1.159 augustss */
2268 1.254.2.7 skrll if (xfer->ux_hcflags & UXFER_ABORTING) {
2269 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: already aborting\n"));
2270 1.159 augustss #ifdef DIAGNOSTIC
2271 1.159 augustss if (status == USBD_TIMEOUT)
2272 1.235 skrll printf("%s: TIMEOUT while aborting\n", __func__);
2273 1.159 augustss #endif
2274 1.159 augustss /* Override the status which might be USBD_TIMEOUT. */
2275 1.254.2.7 skrll xfer->ux_status = status;
2276 1.159 augustss DPRINTFN(2, ("ohci_abort_xfer: waiting for abort to finish\n"));
2277 1.254.2.7 skrll xfer->ux_hcflags |= UXFER_ABORTWAIT;
2278 1.254.2.7 skrll while (xfer->ux_hcflags & UXFER_ABORTING)
2279 1.254.2.7 skrll cv_wait(&xfer->ux_hccv, &sc->sc_lock);
2280 1.224 mrg goto done;
2281 1.159 augustss }
2282 1.254.2.7 skrll xfer->ux_hcflags |= UXFER_ABORTING;
2283 1.159 augustss
2284 1.159 augustss /*
2285 1.106 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2286 1.106 augustss */
2287 1.254.2.7 skrll xfer->ux_status = status; /* make software ignore it */
2288 1.254.2.7 skrll callout_stop(&xfer->ux_callout);
2289 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2290 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2291 1.195 bouyer sizeof(sed->ed.ed_flags),
2292 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2293 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2294 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2295 1.195 bouyer sizeof(sed->ed.ed_flags),
2296 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2297 1.34 augustss
2298 1.120 augustss /*
2299 1.106 augustss * Step 2: Wait until we know hardware has finished any possible
2300 1.106 augustss * use of the xfer. Also make sure the soft interrupt routine
2301 1.106 augustss * has run.
2302 1.106 augustss */
2303 1.224 mrg /* Hardware finishes in 1ms */
2304 1.254.2.7 skrll usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock);
2305 1.119 augustss sc->sc_softwake = 1;
2306 1.119 augustss usb_schedsoftintr(&sc->sc_bus);
2307 1.224 mrg cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
2308 1.119 augustss
2309 1.120 augustss /*
2310 1.106 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2311 1.106 augustss * The complication here is that the hardware may have executed
2312 1.106 augustss * beyond the xfer we're trying to abort. So as we're scanning
2313 1.106 augustss * the TDs of this xfer we check if the hardware points to
2314 1.106 augustss * any of them.
2315 1.106 augustss */
2316 1.254.2.7 skrll p = xfer->ux_hcpriv;
2317 1.34 augustss #ifdef DIAGNOSTIC
2318 1.55 augustss if (p == NULL) {
2319 1.254.2.7 skrll xfer->ux_hcflags &= ~UXFER_ABORTING; /* XXX */
2320 1.106 augustss printf("ohci_abort_xfer: hcpriv is NULL\n");
2321 1.224 mrg goto done;
2322 1.38 augustss }
2323 1.34 augustss #endif
2324 1.106 augustss #ifdef OHCI_DEBUG
2325 1.106 augustss if (ohcidebug > 1) {
2326 1.106 augustss DPRINTF(("ohci_abort_xfer: sed=\n"));
2327 1.168 augustss ohci_dump_ed(sc, sed);
2328 1.168 augustss ohci_dump_tds(sc, p);
2329 1.106 augustss }
2330 1.106 augustss #endif
2331 1.168 augustss headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2332 1.106 augustss hit = 0;
2333 1.53 augustss for (; p->xfer == xfer; p = n) {
2334 1.106 augustss hit |= headp == p->physaddr;
2335 1.38 augustss n = p->nexttd;
2336 1.38 augustss ohci_free_std(sc, p);
2337 1.34 augustss }
2338 1.106 augustss /* Zap headp register if hardware pointed inside the xfer. */
2339 1.106 augustss if (hit) {
2340 1.150 mycroft DPRINTFN(1,("ohci_abort_xfer: set hd=0x%08x, tl=0x%08x\n",
2341 1.168 augustss (int)p->physaddr, (int)O32TOH(sed->ed.ed_tailp)));
2342 1.168 augustss sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2343 1.195 bouyer usb_syncmem(&sed->dma,
2344 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_headp),
2345 1.195 bouyer sizeof(sed->ed.ed_headp),
2346 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2347 1.106 augustss } else {
2348 1.106 augustss DPRINTFN(1,("ohci_abort_xfer: no hit\n"));
2349 1.106 augustss }
2350 1.34 augustss
2351 1.106 augustss /*
2352 1.106 augustss * Step 4: Turn on hardware again.
2353 1.106 augustss */
2354 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2355 1.195 bouyer sizeof(sed->ed.ed_flags),
2356 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2357 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2358 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2359 1.195 bouyer sizeof(sed->ed.ed_flags),
2360 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2361 1.38 augustss
2362 1.106 augustss /*
2363 1.106 augustss * Step 5: Execute callback.
2364 1.106 augustss */
2365 1.254.2.7 skrll wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
2366 1.254.2.7 skrll xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2367 1.53 augustss usb_transfer_complete(xfer);
2368 1.159 augustss if (wake)
2369 1.254.2.7 skrll cv_broadcast(&xfer->ux_hccv);
2370 1.38 augustss
2371 1.224 mrg done:
2372 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2373 1.34 augustss }
2374 1.34 augustss
2375 1.34 augustss /*
2376 1.1 augustss * Data structures and routines to emulate the root hub.
2377 1.1 augustss */
2378 1.254.2.12 skrll Static int
2379 1.254.2.12 skrll ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
2380 1.254.2.12 skrll void *buf, int buflen)
2381 1.17 augustss {
2382 1.254.2.12 skrll ohci_softc_t *sc = bus->ub_hcpriv;
2383 1.1 augustss usb_port_status_t ps;
2384 1.254.2.12 skrll uint16_t len, value, index;
2385 1.254.2.12 skrll int l, totlen = 0;
2386 1.254.2.12 skrll int port, i;
2387 1.254.2.1 skrll uint32_t v;
2388 1.1 augustss
2389 1.83 augustss if (sc->sc_dying)
2390 1.254.2.12 skrll return -1;
2391 1.1 augustss
2392 1.254.2.12 skrll DPRINTFN(4,("%s: type=0x%02x request=%02x\n", __func__,
2393 1.254.2.12 skrll req->bmRequestType, req->bRequest));
2394 1.1 augustss
2395 1.1 augustss len = UGETW(req->wLength);
2396 1.1 augustss value = UGETW(req->wValue);
2397 1.1 augustss index = UGETW(req->wIndex);
2398 1.43 augustss
2399 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2400 1.254.2.12 skrll switch (C(req->bRequest, req->bmRequestType)) {
2401 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2402 1.254.2.12 skrll DPRINTFN(8,("%s: wValue=0x%04x\n", __func__, value));
2403 1.171 christos if (len == 0)
2404 1.171 christos break;
2405 1.254.2.12 skrll switch (value) {
2406 1.254.2.12 skrll case C(0, UDESC_DEVICE): {
2407 1.254.2.12 skrll usb_device_descriptor_t devd;
2408 1.254.2.12 skrll
2409 1.254.2.12 skrll totlen = min(buflen, sizeof(devd));
2410 1.254.2.12 skrll memcpy(&devd, buf, totlen);
2411 1.254.2.12 skrll USETW(devd.idVendor, sc->sc_id_vendor);
2412 1.254.2.12 skrll memcpy(buf, &devd, totlen);
2413 1.1 augustss break;
2414 1.254.2.12 skrll }
2415 1.254.2.12 skrll case C(1, UDESC_STRING):
2416 1.186 drochner #define sd ((usb_string_descriptor_t *)buf)
2417 1.254.2.12 skrll /* Vendor */
2418 1.254.2.12 skrll totlen = usb_makestrdesc(sd, len, sc->sc_vendor);
2419 1.254.2.12 skrll break;
2420 1.254.2.12 skrll case C(2, UDESC_STRING):
2421 1.254.2.12 skrll /* Product */
2422 1.254.2.12 skrll totlen = usb_makestrdesc(sd, len, "OHCI root hub");
2423 1.1 augustss break;
2424 1.254.2.12 skrll #undef sd
2425 1.1 augustss default:
2426 1.254.2.12 skrll /* default from usbroothub */
2427 1.254.2.12 skrll return buflen;
2428 1.1 augustss }
2429 1.1 augustss break;
2430 1.254.2.12 skrll
2431 1.1 augustss /* Hub requests */
2432 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2433 1.1 augustss break;
2434 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2435 1.254.2.12 skrll DPRINTFN(8, ("%s: UR_CLEAR_PORT_FEATURE "
2436 1.254.2.12 skrll "port=%d feature=%d\n", __func__,
2437 1.1 augustss index, value));
2438 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2439 1.254.2.12 skrll return -1;
2440 1.1 augustss }
2441 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2442 1.1 augustss switch(value) {
2443 1.1 augustss case UHF_PORT_ENABLE:
2444 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2445 1.1 augustss break;
2446 1.1 augustss case UHF_PORT_SUSPEND:
2447 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2448 1.1 augustss break;
2449 1.1 augustss case UHF_PORT_POWER:
2450 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2451 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2452 1.1 augustss break;
2453 1.1 augustss case UHF_C_PORT_CONNECTION:
2454 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2455 1.1 augustss break;
2456 1.1 augustss case UHF_C_PORT_ENABLE:
2457 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2458 1.1 augustss break;
2459 1.1 augustss case UHF_C_PORT_SUSPEND:
2460 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2461 1.1 augustss break;
2462 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2463 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2464 1.1 augustss break;
2465 1.1 augustss case UHF_C_PORT_RESET:
2466 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2467 1.1 augustss break;
2468 1.1 augustss default:
2469 1.254.2.12 skrll return -1;
2470 1.1 augustss }
2471 1.1 augustss switch(value) {
2472 1.1 augustss case UHF_C_PORT_CONNECTION:
2473 1.1 augustss case UHF_C_PORT_ENABLE:
2474 1.1 augustss case UHF_C_PORT_SUSPEND:
2475 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2476 1.1 augustss case UHF_C_PORT_RESET:
2477 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2478 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2479 1.157 mycroft ohci_rhsc_enable(sc);
2480 1.1 augustss break;
2481 1.1 augustss default:
2482 1.1 augustss break;
2483 1.1 augustss }
2484 1.1 augustss break;
2485 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2486 1.171 christos if (len == 0)
2487 1.171 christos break;
2488 1.146 toshii if ((value & 0xff) != 0) {
2489 1.254.2.12 skrll return -1;
2490 1.1 augustss }
2491 1.254.2.12 skrll usb_hub_descriptor_t hubd;
2492 1.254.2.12 skrll
2493 1.254.2.12 skrll totlen = min(buflen, sizeof(hubd));
2494 1.254.2.12 skrll memcpy(&hubd, buf, totlen);
2495 1.254.2.12 skrll
2496 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2497 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2498 1.15 augustss USETW(hubd.wHubCharacteristics,
2499 1.120 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2500 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2501 1.1 augustss /* XXX overcurrent */
2502 1.1 augustss );
2503 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2504 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2505 1.120 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2506 1.254.2.1 skrll hubd.DeviceRemovable[i++] = (uint8_t)v;
2507 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2508 1.254.2.12 skrll totlen = min(totlen, hubd.bDescLength);
2509 1.254.2.12 skrll memcpy(buf, &hubd, totlen);
2510 1.1 augustss break;
2511 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2512 1.1 augustss if (len != 4) {
2513 1.254.2.12 skrll return -1;
2514 1.1 augustss }
2515 1.1 augustss memset(buf, 0, len); /* ? XXX */
2516 1.1 augustss totlen = len;
2517 1.1 augustss break;
2518 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2519 1.254.2.12 skrll DPRINTFN(8,("%s: get port status i=%d\n", __func__,
2520 1.1 augustss index));
2521 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2522 1.254.2.12 skrll return -1;
2523 1.1 augustss }
2524 1.1 augustss if (len != 4) {
2525 1.254.2.12 skrll return -1;
2526 1.254.2.12 skrll }
2527 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2528 1.254.2.12 skrll DPRINTFN(8,("%s: port status=0x%04x\n", __func__,
2529 1.1 augustss v));
2530 1.1 augustss USETW(ps.wPortStatus, v);
2531 1.1 augustss USETW(ps.wPortChange, v >> 16);
2532 1.254.2.12 skrll totlen = min(len, sizeof(ps));
2533 1.254.2.12 skrll memcpy(buf, &ps, totlen);
2534 1.1 augustss break;
2535 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2536 1.254.2.12 skrll return -1;
2537 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2538 1.1 augustss break;
2539 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2540 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2541 1.254.2.12 skrll return -1;
2542 1.1 augustss }
2543 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2544 1.1 augustss switch(value) {
2545 1.1 augustss case UHF_PORT_ENABLE:
2546 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2547 1.1 augustss break;
2548 1.1 augustss case UHF_PORT_SUSPEND:
2549 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2550 1.1 augustss break;
2551 1.1 augustss case UHF_PORT_RESET:
2552 1.254.2.12 skrll DPRINTFN(5,("%s: reset port %d\n", __func__,
2553 1.14 augustss index));
2554 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2555 1.110 augustss for (i = 0; i < 5; i++) {
2556 1.110 augustss usb_delay_ms(&sc->sc_bus,
2557 1.110 augustss USB_PORT_ROOT_RESET_DELAY);
2558 1.116 augustss if (sc->sc_dying) {
2559 1.254.2.12 skrll return -1;
2560 1.116 augustss }
2561 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2562 1.1 augustss break;
2563 1.1 augustss }
2564 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2565 1.1 augustss index, OREAD4(sc, port)));
2566 1.1 augustss break;
2567 1.1 augustss case UHF_PORT_POWER:
2568 1.254.2.12 skrll DPRINTFN(2,("%s: set port power "
2569 1.254.2.12 skrll "%d\n", __func__, index));
2570 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2571 1.1 augustss break;
2572 1.1 augustss default:
2573 1.254.2.12 skrll return -1;
2574 1.1 augustss }
2575 1.1 augustss break;
2576 1.1 augustss default:
2577 1.254.2.12 skrll /* default from usbroothub */
2578 1.254.2.12 skrll return buflen;
2579 1.1 augustss }
2580 1.1 augustss
2581 1.254.2.12 skrll return totlen;
2582 1.1 augustss }
2583 1.1 augustss
2584 1.82 augustss Static usbd_status
2585 1.91 augustss ohci_root_intr_transfer(usbd_xfer_handle xfer)
2586 1.1 augustss {
2587 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2588 1.53 augustss usbd_status err;
2589 1.17 augustss
2590 1.46 augustss /* Insert last in queue. */
2591 1.224 mrg mutex_enter(&sc->sc_lock);
2592 1.53 augustss err = usb_insert_transfer(xfer);
2593 1.224 mrg mutex_exit(&sc->sc_lock);
2594 1.53 augustss if (err)
2595 1.254.2.13 skrll return err;
2596 1.46 augustss
2597 1.46 augustss /* Pipe isn't running, start first */
2598 1.254.2.13 skrll return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2599 1.17 augustss }
2600 1.17 augustss
2601 1.82 augustss Static usbd_status
2602 1.91 augustss ohci_root_intr_start(usbd_xfer_handle xfer)
2603 1.17 augustss {
2604 1.254.2.7 skrll usbd_pipe_handle pipe = xfer->ux_pipe;
2605 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2606 1.1 augustss
2607 1.83 augustss if (sc->sc_dying)
2608 1.254.2.13 skrll return USBD_IOERROR;
2609 1.83 augustss
2610 1.224 mrg mutex_enter(&sc->sc_lock);
2611 1.224 mrg KASSERT(sc->sc_intrxfer == NULL);
2612 1.53 augustss sc->sc_intrxfer = xfer;
2613 1.224 mrg mutex_exit(&sc->sc_lock);
2614 1.1 augustss
2615 1.254.2.13 skrll return USBD_IN_PROGRESS;
2616 1.1 augustss }
2617 1.1 augustss
2618 1.3 augustss /* Abort a root interrupt request. */
2619 1.82 augustss Static void
2620 1.91 augustss ohci_root_intr_abort(usbd_xfer_handle xfer)
2621 1.1 augustss {
2622 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2623 1.224 mrg
2624 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2625 1.254.2.7 skrll KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
2626 1.53 augustss
2627 1.252 skrll sc->sc_intrxfer = NULL;
2628 1.252 skrll
2629 1.254.2.7 skrll xfer->ux_status = USBD_CANCELLED;
2630 1.53 augustss usb_transfer_complete(xfer);
2631 1.1 augustss }
2632 1.1 augustss
2633 1.1 augustss /* Close the root pipe. */
2634 1.82 augustss Static void
2635 1.91 augustss ohci_root_intr_close(usbd_pipe_handle pipe)
2636 1.1 augustss {
2637 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2638 1.120 augustss
2639 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2640 1.224 mrg
2641 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2642 1.34 augustss
2643 1.53 augustss sc->sc_intrxfer = NULL;
2644 1.1 augustss }
2645 1.1 augustss
2646 1.1 augustss /************************/
2647 1.1 augustss
2648 1.82 augustss Static usbd_status
2649 1.91 augustss ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2650 1.1 augustss {
2651 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2652 1.53 augustss usbd_status err;
2653 1.17 augustss
2654 1.46 augustss /* Insert last in queue. */
2655 1.224 mrg mutex_enter(&sc->sc_lock);
2656 1.53 augustss err = usb_insert_transfer(xfer);
2657 1.224 mrg mutex_exit(&sc->sc_lock);
2658 1.53 augustss if (err)
2659 1.254.2.13 skrll return err;
2660 1.46 augustss
2661 1.46 augustss /* Pipe isn't running, start first */
2662 1.254.2.13 skrll return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2663 1.17 augustss }
2664 1.17 augustss
2665 1.82 augustss Static usbd_status
2666 1.91 augustss ohci_device_ctrl_start(usbd_xfer_handle xfer)
2667 1.17 augustss {
2668 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2669 1.53 augustss usbd_status err;
2670 1.1 augustss
2671 1.83 augustss if (sc->sc_dying)
2672 1.254.2.13 skrll return USBD_IOERROR;
2673 1.83 augustss
2674 1.42 augustss #ifdef DIAGNOSTIC
2675 1.254.2.7 skrll if (!(xfer->ux_rqflags & URQ_REQUEST)) {
2676 1.1 augustss /* XXX panic */
2677 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2678 1.254.2.13 skrll return USBD_INVAL;
2679 1.1 augustss }
2680 1.42 augustss #endif
2681 1.1 augustss
2682 1.224 mrg mutex_enter(&sc->sc_lock);
2683 1.53 augustss err = ohci_device_request(xfer);
2684 1.224 mrg mutex_exit(&sc->sc_lock);
2685 1.53 augustss if (err)
2686 1.254.2.13 skrll return err;
2687 1.1 augustss
2688 1.254.2.7 skrll if (sc->sc_bus.ub_usepolling)
2689 1.53 augustss ohci_waitintr(sc, xfer);
2690 1.254.2.13 skrll return USBD_IN_PROGRESS;
2691 1.1 augustss }
2692 1.1 augustss
2693 1.1 augustss /* Abort a device control request. */
2694 1.82 augustss Static void
2695 1.91 augustss ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2696 1.1 augustss {
2697 1.224 mrg #ifdef DIAGNOSTIC
2698 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2699 1.224 mrg #endif
2700 1.224 mrg
2701 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2702 1.224 mrg
2703 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2704 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2705 1.1 augustss }
2706 1.1 augustss
2707 1.1 augustss /* Close a device control pipe. */
2708 1.82 augustss Static void
2709 1.91 augustss ohci_device_ctrl_close(usbd_pipe_handle pipe)
2710 1.1 augustss {
2711 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2712 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2713 1.1 augustss
2714 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2715 1.224 mrg
2716 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2717 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2718 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2719 1.3 augustss }
2720 1.3 augustss
2721 1.3 augustss /************************/
2722 1.37 augustss
2723 1.82 augustss Static void
2724 1.91 augustss ohci_device_clear_toggle(usbd_pipe_handle pipe)
2725 1.37 augustss {
2726 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2727 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2728 1.37 augustss
2729 1.168 augustss opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2730 1.37 augustss }
2731 1.37 augustss
2732 1.82 augustss Static void
2733 1.179 christos ohci_noop(usbd_pipe_handle pipe)
2734 1.37 augustss {
2735 1.37 augustss }
2736 1.3 augustss
2737 1.82 augustss Static usbd_status
2738 1.91 augustss ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2739 1.3 augustss {
2740 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2741 1.53 augustss usbd_status err;
2742 1.17 augustss
2743 1.46 augustss /* Insert last in queue. */
2744 1.224 mrg mutex_enter(&sc->sc_lock);
2745 1.53 augustss err = usb_insert_transfer(xfer);
2746 1.224 mrg mutex_exit(&sc->sc_lock);
2747 1.53 augustss if (err)
2748 1.254.2.13 skrll return err;
2749 1.46 augustss
2750 1.46 augustss /* Pipe isn't running, start first */
2751 1.254.2.13 skrll return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2752 1.17 augustss }
2753 1.17 augustss
2754 1.82 augustss Static usbd_status
2755 1.91 augustss ohci_device_bulk_start(usbd_xfer_handle xfer)
2756 1.17 augustss {
2757 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
2758 1.254.2.7 skrll usbd_device_handle dev = opipe->pipe.up_dev;
2759 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
2760 1.254.2.7 skrll int addr = dev->ud_addr;
2761 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2762 1.3 augustss ohci_soft_ed_t *sed;
2763 1.224 mrg int len, isread, endpt;
2764 1.53 augustss usbd_status err;
2765 1.3 augustss
2766 1.83 augustss if (sc->sc_dying)
2767 1.254.2.13 skrll return USBD_IOERROR;
2768 1.83 augustss
2769 1.34 augustss #ifdef DIAGNOSTIC
2770 1.254.2.7 skrll if (xfer->ux_rqflags & URQ_REQUEST) {
2771 1.3 augustss /* XXX panic */
2772 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2773 1.254.2.13 skrll return USBD_INVAL;
2774 1.3 augustss }
2775 1.34 augustss #endif
2776 1.3 augustss
2777 1.224 mrg mutex_enter(&sc->sc_lock);
2778 1.224 mrg
2779 1.254.2.7 skrll len = xfer->ux_length;
2780 1.254.2.7 skrll endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
2781 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2782 1.3 augustss sed = opipe->sed;
2783 1.3 augustss
2784 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2785 1.254.2.7 skrll "flags=%d endpt=%d\n", xfer, len, isread, xfer->ux_flags,
2786 1.40 augustss endpt));
2787 1.34 augustss
2788 1.32 augustss opipe->u.bulk.isread = isread;
2789 1.3 augustss opipe->u.bulk.length = len;
2790 1.3 augustss
2791 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2792 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2793 1.3 augustss /* Update device address */
2794 1.168 augustss sed->ed.ed_flags = HTOO32(
2795 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2796 1.16 augustss OHCI_ED_SET_FA(addr));
2797 1.3 augustss
2798 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2799 1.60 augustss data = opipe->tail.td;
2800 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2801 1.77 augustss data, &tail);
2802 1.236 skrll if (err)
2803 1.236 skrll return err;
2804 1.254.2.1 skrll
2805 1.77 augustss /* We want interrupt at the end of the transfer. */
2806 1.168 augustss tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
2807 1.168 augustss tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
2808 1.77 augustss tail->flags |= OHCI_CALL_DONE;
2809 1.77 augustss tail = tail->nexttd; /* point at sentinel */
2810 1.195 bouyer usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
2811 1.195 bouyer sizeof(tail->td.td_flags),
2812 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2813 1.224 mrg if (err) {
2814 1.224 mrg mutex_exit(&sc->sc_lock);
2815 1.254.2.13 skrll return err;
2816 1.224 mrg }
2817 1.48 augustss
2818 1.53 augustss tail->xfer = NULL;
2819 1.254.2.7 skrll xfer->ux_hcpriv = data;
2820 1.3 augustss
2821 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2822 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2823 1.168 augustss (int)O32TOH(sed->ed.ed_flags),
2824 1.168 augustss (int)O32TOH(data->td.td_flags),
2825 1.168 augustss (int)O32TOH(data->td.td_cbp),
2826 1.168 augustss (int)O32TOH(data->td.td_be)));
2827 1.34 augustss
2828 1.52 augustss #ifdef OHCI_DEBUG
2829 1.75 augustss if (ohcidebug > 5) {
2830 1.168 augustss ohci_dump_ed(sc, sed);
2831 1.168 augustss ohci_dump_tds(sc, data);
2832 1.34 augustss }
2833 1.34 augustss #endif
2834 1.34 augustss
2835 1.3 augustss /* Insert ED in schedule */
2836 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2837 1.53 augustss tdp->xfer = xfer;
2838 1.48 augustss }
2839 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
2840 1.60 augustss opipe->tail.td = tail;
2841 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
2842 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2843 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2844 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2845 1.254.2.7 skrll if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
2846 1.254.2.7 skrll callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
2847 1.80 augustss ohci_timeout, xfer);
2848 1.15 augustss }
2849 1.224 mrg mutex_exit(&sc->sc_lock);
2850 1.34 augustss
2851 1.52 augustss #if 0
2852 1.52 augustss /* This goes wrong if we are too slow. */
2853 1.75 augustss if (ohcidebug > 10) {
2854 1.75 augustss delay(10000);
2855 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2856 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2857 1.168 augustss ohci_dump_ed(sc, sed);
2858 1.168 augustss ohci_dump_tds(sc, data);
2859 1.34 augustss }
2860 1.34 augustss #endif
2861 1.34 augustss
2862 1.254.2.13 skrll return USBD_IN_PROGRESS;
2863 1.3 augustss }
2864 1.3 augustss
2865 1.82 augustss Static void
2866 1.91 augustss ohci_device_bulk_abort(usbd_xfer_handle xfer)
2867 1.3 augustss {
2868 1.224 mrg #ifdef DIAGNOSTIC
2869 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2870 1.224 mrg #endif
2871 1.224 mrg
2872 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2873 1.224 mrg
2874 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2875 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2876 1.3 augustss }
2877 1.3 augustss
2878 1.120 augustss /*
2879 1.34 augustss * Close a device bulk pipe.
2880 1.34 augustss */
2881 1.82 augustss Static void
2882 1.91 augustss ohci_device_bulk_close(usbd_pipe_handle pipe)
2883 1.3 augustss {
2884 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2885 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2886 1.3 augustss
2887 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2888 1.224 mrg
2889 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2890 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2891 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2892 1.1 augustss }
2893 1.1 augustss
2894 1.1 augustss /************************/
2895 1.1 augustss
2896 1.82 augustss Static usbd_status
2897 1.91 augustss ohci_device_intr_transfer(usbd_xfer_handle xfer)
2898 1.17 augustss {
2899 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2900 1.53 augustss usbd_status err;
2901 1.17 augustss
2902 1.46 augustss /* Insert last in queue. */
2903 1.224 mrg mutex_enter(&sc->sc_lock);
2904 1.53 augustss err = usb_insert_transfer(xfer);
2905 1.224 mrg mutex_exit(&sc->sc_lock);
2906 1.53 augustss if (err)
2907 1.254.2.13 skrll return err;
2908 1.46 augustss
2909 1.46 augustss /* Pipe isn't running, start first */
2910 1.254.2.13 skrll return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2911 1.17 augustss }
2912 1.17 augustss
2913 1.82 augustss Static usbd_status
2914 1.91 augustss ohci_device_intr_start(usbd_xfer_handle xfer)
2915 1.1 augustss {
2916 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
2917 1.254.2.7 skrll usbd_device_handle dev = opipe->pipe.up_dev;
2918 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
2919 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2920 1.48 augustss ohci_soft_td_t *data, *tail;
2921 1.224 mrg int len, isread, endpt;
2922 1.1 augustss
2923 1.83 augustss if (sc->sc_dying)
2924 1.254.2.13 skrll return USBD_IOERROR;
2925 1.83 augustss
2926 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2927 1.14 augustss "flags=%d priv=%p\n",
2928 1.254.2.7 skrll xfer, xfer->ux_length, xfer->ux_flags, xfer->ux_priv));
2929 1.1 augustss
2930 1.42 augustss #ifdef DIAGNOSTIC
2931 1.254.2.7 skrll if (xfer->ux_rqflags & URQ_REQUEST)
2932 1.128 provos panic("ohci_device_intr_transfer: a request");
2933 1.42 augustss #endif
2934 1.1 augustss
2935 1.254.2.7 skrll len = xfer->ux_length;
2936 1.254.2.7 skrll endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
2937 1.165 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2938 1.1 augustss
2939 1.60 augustss data = opipe->tail.td;
2940 1.224 mrg mutex_enter(&sc->sc_lock);
2941 1.1 augustss tail = ohci_alloc_std(sc);
2942 1.224 mrg mutex_exit(&sc->sc_lock);
2943 1.55 augustss if (tail == NULL)
2944 1.254.2.13 skrll return USBD_NOMEM;
2945 1.53 augustss tail->xfer = NULL;
2946 1.1 augustss
2947 1.168 augustss data->td.td_flags = HTOO32(
2948 1.165 skrll isread ? OHCI_TD_IN : OHCI_TD_OUT |
2949 1.165 skrll OHCI_TD_NOCC |
2950 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2951 1.254.2.7 skrll if (xfer->ux_flags & USBD_SHORT_XFER_OK)
2952 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
2953 1.254.2.7 skrll data->td.td_cbp = HTOO32(DMAADDR(&xfer->ux_dmabuf, 0));
2954 1.48 augustss data->nexttd = tail;
2955 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
2956 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
2957 1.48 augustss data->len = len;
2958 1.53 augustss data->xfer = xfer;
2959 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2960 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
2961 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2962 1.254.2.7 skrll xfer->ux_hcpriv = data;
2963 1.1 augustss
2964 1.52 augustss #ifdef OHCI_DEBUG
2965 1.1 augustss if (ohcidebug > 5) {
2966 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2967 1.168 augustss ohci_dump_ed(sc, sed);
2968 1.168 augustss ohci_dump_tds(sc, data);
2969 1.1 augustss }
2970 1.1 augustss #endif
2971 1.1 augustss
2972 1.1 augustss /* Insert ED in schedule */
2973 1.224 mrg mutex_enter(&sc->sc_lock);
2974 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2975 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2976 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
2977 1.60 augustss opipe->tail.td = tail;
2978 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
2979 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2980 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2981 1.1 augustss
2982 1.52 augustss #if 0
2983 1.52 augustss /*
2984 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
2985 1.52 augustss * because false references are followed due to the fact that the
2986 1.52 augustss * TD is gone.
2987 1.52 augustss */
2988 1.1 augustss if (ohcidebug > 5) {
2989 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock);
2990 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2991 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2992 1.168 augustss ohci_dump_ed(sc, sed);
2993 1.168 augustss ohci_dump_tds(sc, data);
2994 1.1 augustss }
2995 1.1 augustss #endif
2996 1.224 mrg mutex_exit(&sc->sc_lock);
2997 1.1 augustss
2998 1.254.2.13 skrll return USBD_IN_PROGRESS;
2999 1.1 augustss }
3000 1.1 augustss
3001 1.227 skrll /* Abort a device interrupt request. */
3002 1.82 augustss Static void
3003 1.91 augustss ohci_device_intr_abort(usbd_xfer_handle xfer)
3004 1.1 augustss {
3005 1.224 mrg #ifdef DIAGNOSTIC
3006 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
3007 1.224 mrg #endif
3008 1.224 mrg
3009 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3010 1.254.2.7 skrll KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
3011 1.224 mrg
3012 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3013 1.1 augustss }
3014 1.1 augustss
3015 1.1 augustss /* Close a device interrupt pipe. */
3016 1.82 augustss Static void
3017 1.91 augustss ohci_device_intr_close(usbd_pipe_handle pipe)
3018 1.1 augustss {
3019 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3020 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
3021 1.1 augustss int nslots = opipe->u.intr.nslots;
3022 1.1 augustss int pos = opipe->u.intr.pos;
3023 1.1 augustss int j;
3024 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
3025 1.224 mrg
3026 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3027 1.1 augustss
3028 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
3029 1.1 augustss pipe, nslots, pos));
3030 1.195 bouyer usb_syncmem(&sed->dma, sed->offs,
3031 1.195 bouyer sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3032 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3033 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3034 1.195 bouyer sizeof(sed->ed.ed_flags),
3035 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3036 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3037 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3038 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
3039 1.1 augustss
3040 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3041 1.172 christos continue;
3042 1.53 augustss #ifdef DIAGNOSTIC
3043 1.173 christos if (p == NULL)
3044 1.128 provos panic("ohci_device_intr_close: ED not found");
3045 1.53 augustss #endif
3046 1.173 christos p->next = sed->next;
3047 1.173 christos p->ed.ed_nexted = sed->ed.ed_nexted;
3048 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3049 1.195 bouyer sizeof(p->ed.ed_nexted),
3050 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3051 1.1 augustss
3052 1.1 augustss for (j = 0; j < nslots; j++)
3053 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3054 1.1 augustss
3055 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3056 1.1 augustss ohci_free_sed(sc, opipe->sed);
3057 1.1 augustss }
3058 1.1 augustss
3059 1.82 augustss Static usbd_status
3060 1.91 augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3061 1.1 augustss {
3062 1.224 mrg int i, j, best;
3063 1.1 augustss u_int npoll, slow, shigh, nslots;
3064 1.1 augustss u_int bestbw, bw;
3065 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
3066 1.1 augustss
3067 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
3068 1.1 augustss if (ival == 0) {
3069 1.1 augustss printf("ohci_setintr: 0 interval\n");
3070 1.254.2.13 skrll return USBD_INVAL;
3071 1.1 augustss }
3072 1.1 augustss
3073 1.1 augustss npoll = OHCI_NO_INTRS;
3074 1.1 augustss while (npoll > ival)
3075 1.1 augustss npoll /= 2;
3076 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
3077 1.1 augustss
3078 1.1 augustss /*
3079 1.1 augustss * We now know which level in the tree the ED must go into.
3080 1.1 augustss * Figure out which slot has most bandwidth left over.
3081 1.1 augustss * Slots to examine:
3082 1.1 augustss * npoll
3083 1.1 augustss * 1 0
3084 1.1 augustss * 2 1 2
3085 1.1 augustss * 4 3 4 5 6
3086 1.1 augustss * 8 7 8 9 10 11 12 13 14
3087 1.1 augustss * N (N-1) .. (N-1+N-1)
3088 1.1 augustss */
3089 1.1 augustss slow = npoll-1;
3090 1.1 augustss shigh = slow + npoll;
3091 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
3092 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3093 1.1 augustss bw = 0;
3094 1.1 augustss for (j = 0; j < nslots; j++)
3095 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3096 1.1 augustss if (bw < bestbw) {
3097 1.1 augustss best = i;
3098 1.1 augustss bestbw = bw;
3099 1.1 augustss }
3100 1.1 augustss }
3101 1.120 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
3102 1.1 augustss best, slow, shigh, bestbw));
3103 1.1 augustss
3104 1.224 mrg mutex_enter(&sc->sc_lock);
3105 1.1 augustss hsed = sc->sc_eds[best];
3106 1.1 augustss sed->next = hsed->next;
3107 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3108 1.195 bouyer sizeof(hsed->ed.ed_flags),
3109 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3110 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
3111 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3112 1.195 bouyer sizeof(sed->ed.ed_flags),
3113 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3114 1.1 augustss hsed->next = sed;
3115 1.168 augustss hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3116 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3117 1.195 bouyer sizeof(hsed->ed.ed_flags),
3118 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3119 1.224 mrg mutex_exit(&sc->sc_lock);
3120 1.1 augustss
3121 1.1 augustss for (j = 0; j < nslots; j++)
3122 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3123 1.1 augustss opipe->u.intr.nslots = nslots;
3124 1.1 augustss opipe->u.intr.pos = best;
3125 1.1 augustss
3126 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
3127 1.254.2.13 skrll return USBD_NORMAL_COMPLETION;
3128 1.60 augustss }
3129 1.60 augustss
3130 1.60 augustss /***********************/
3131 1.60 augustss
3132 1.60 augustss usbd_status
3133 1.91 augustss ohci_device_isoc_transfer(usbd_xfer_handle xfer)
3134 1.60 augustss {
3135 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
3136 1.60 augustss usbd_status err;
3137 1.60 augustss
3138 1.60 augustss DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
3139 1.60 augustss
3140 1.60 augustss /* Put it on our queue, */
3141 1.224 mrg mutex_enter(&sc->sc_lock);
3142 1.60 augustss err = usb_insert_transfer(xfer);
3143 1.224 mrg mutex_exit(&sc->sc_lock);
3144 1.60 augustss
3145 1.60 augustss /* bail out on error, */
3146 1.60 augustss if (err && err != USBD_IN_PROGRESS)
3147 1.254.2.13 skrll return err;
3148 1.60 augustss
3149 1.60 augustss /* XXX should check inuse here */
3150 1.60 augustss
3151 1.60 augustss /* insert into schedule, */
3152 1.60 augustss ohci_device_isoc_enter(xfer);
3153 1.60 augustss
3154 1.83 augustss /* and start if the pipe wasn't running */
3155 1.60 augustss if (!err)
3156 1.254.2.7 skrll ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
3157 1.60 augustss
3158 1.254.2.13 skrll return err;
3159 1.60 augustss }
3160 1.60 augustss
3161 1.60 augustss void
3162 1.91 augustss ohci_device_isoc_enter(usbd_xfer_handle xfer)
3163 1.60 augustss {
3164 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
3165 1.254.2.7 skrll usbd_device_handle dev = opipe->pipe.up_dev;
3166 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
3167 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
3168 1.61 augustss struct iso *iso = &opipe->u.iso;
3169 1.120 augustss ohci_soft_itd_t *sitd, *nsitd;
3170 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
3171 1.61 augustss int i, ncur, nframes;
3172 1.61 augustss
3173 1.83 augustss DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
3174 1.83 augustss "nframes=%d\n",
3175 1.254.2.7 skrll iso->inuse, iso->next, xfer, xfer->ux_nframes));
3176 1.83 augustss
3177 1.83 augustss if (sc->sc_dying)
3178 1.83 augustss return;
3179 1.83 augustss
3180 1.83 augustss if (iso->next == -1) {
3181 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
3182 1.168 augustss iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3183 1.120 augustss DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3184 1.83 augustss iso->next));
3185 1.83 augustss }
3186 1.83 augustss
3187 1.61 augustss sitd = opipe->tail.itd;
3188 1.254.2.7 skrll buf = DMAADDR(&xfer->ux_dmabuf, 0);
3189 1.83 augustss bp0 = OHCI_PAGE(buf);
3190 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
3191 1.254.2.7 skrll nframes = xfer->ux_nframes;
3192 1.254.2.7 skrll xfer->ux_hcpriv = sitd;
3193 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
3194 1.254.2.7 skrll noffs = offs + xfer->ux_frlengths[i];
3195 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3196 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3197 1.120 augustss
3198 1.83 augustss /* Allocate next ITD */
3199 1.224 mrg mutex_enter(&sc->sc_lock);
3200 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3201 1.224 mrg mutex_exit(&sc->sc_lock);
3202 1.61 augustss if (nsitd == NULL) {
3203 1.61 augustss /* XXX what now? */
3204 1.83 augustss printf("%s: isoc TD alloc failed\n",
3205 1.190 drochner device_xname(sc->sc_dev));
3206 1.61 augustss return;
3207 1.61 augustss }
3208 1.83 augustss
3209 1.83 augustss /* Fill current ITD */
3210 1.168 augustss sitd->itd.itd_flags = HTOO32(
3211 1.120 augustss OHCI_ITD_NOCC |
3212 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3213 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
3214 1.83 augustss OHCI_ITD_SET_FC(ncur));
3215 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3216 1.83 augustss sitd->nextitd = nsitd;
3217 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3218 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3219 1.83 augustss sitd->xfer = xfer;
3220 1.83 augustss sitd->flags = 0;
3221 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3222 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3223 1.83 augustss
3224 1.61 augustss sitd = nsitd;
3225 1.120 augustss iso->next = iso->next + ncur;
3226 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
3227 1.61 augustss ncur = 0;
3228 1.61 augustss }
3229 1.168 augustss sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3230 1.83 augustss offs = noffs;
3231 1.61 augustss }
3232 1.224 mrg mutex_enter(&sc->sc_lock);
3233 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3234 1.224 mrg mutex_exit(&sc->sc_lock);
3235 1.61 augustss if (nsitd == NULL) {
3236 1.61 augustss /* XXX what now? */
3237 1.120 augustss printf("%s: isoc TD alloc failed\n",
3238 1.190 drochner device_xname(sc->sc_dev));
3239 1.61 augustss return;
3240 1.61 augustss }
3241 1.83 augustss /* Fixup last used ITD */
3242 1.168 augustss sitd->itd.itd_flags = HTOO32(
3243 1.120 augustss OHCI_ITD_NOCC |
3244 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3245 1.61 augustss OHCI_ITD_SET_DI(0) |
3246 1.61 augustss OHCI_ITD_SET_FC(ncur));
3247 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3248 1.83 augustss sitd->nextitd = nsitd;
3249 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3250 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3251 1.83 augustss sitd->xfer = xfer;
3252 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3253 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3254 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3255 1.83 augustss
3256 1.61 augustss iso->next = iso->next + ncur;
3257 1.83 augustss iso->inuse += nframes;
3258 1.83 augustss
3259 1.254.2.7 skrll xfer->ux_actlen = offs; /* XXX pretend we did it all */
3260 1.83 augustss
3261 1.254.2.7 skrll xfer->ux_status = USBD_IN_PROGRESS;
3262 1.83 augustss
3263 1.83 augustss #ifdef OHCI_DEBUG
3264 1.83 augustss if (ohcidebug > 5) {
3265 1.83 augustss DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3266 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3267 1.254.2.7 skrll ohci_dump_itds(sc, xfer->ux_hcpriv);
3268 1.168 augustss ohci_dump_ed(sc, sed);
3269 1.83 augustss }
3270 1.83 augustss #endif
3271 1.61 augustss
3272 1.224 mrg mutex_enter(&sc->sc_lock);
3273 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3274 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3275 1.168 augustss sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3276 1.61 augustss opipe->tail.itd = nsitd;
3277 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3278 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3279 1.195 bouyer sizeof(sed->ed.ed_flags),
3280 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3281 1.224 mrg mutex_exit(&sc->sc_lock);
3282 1.83 augustss
3283 1.83 augustss #ifdef OHCI_DEBUG
3284 1.83 augustss if (ohcidebug > 5) {
3285 1.83 augustss delay(150000);
3286 1.83 augustss DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3287 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number)));
3288 1.254.2.7 skrll ohci_dump_itds(sc, xfer->ux_hcpriv);
3289 1.168 augustss ohci_dump_ed(sc, sed);
3290 1.83 augustss }
3291 1.83 augustss #endif
3292 1.60 augustss }
3293 1.60 augustss
3294 1.60 augustss usbd_status
3295 1.91 augustss ohci_device_isoc_start(usbd_xfer_handle xfer)
3296 1.60 augustss {
3297 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
3298 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
3299 1.83 augustss
3300 1.83 augustss DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3301 1.83 augustss
3302 1.224 mrg mutex_enter(&sc->sc_lock);
3303 1.224 mrg
3304 1.224 mrg if (sc->sc_dying) {
3305 1.224 mrg mutex_exit(&sc->sc_lock);
3306 1.254.2.13 skrll return USBD_IOERROR;
3307 1.224 mrg }
3308 1.83 augustss
3309 1.83 augustss #ifdef DIAGNOSTIC
3310 1.254.2.7 skrll if (xfer->ux_status != USBD_IN_PROGRESS)
3311 1.121 tsutsui printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3312 1.83 augustss #endif
3313 1.83 augustss
3314 1.83 augustss /* XXX anything to do? */
3315 1.83 augustss
3316 1.224 mrg mutex_exit(&sc->sc_lock);
3317 1.224 mrg
3318 1.254.2.13 skrll return USBD_IN_PROGRESS;
3319 1.60 augustss }
3320 1.60 augustss
3321 1.60 augustss void
3322 1.91 augustss ohci_device_isoc_abort(usbd_xfer_handle xfer)
3323 1.60 augustss {
3324 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
3325 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
3326 1.83 augustss ohci_soft_ed_t *sed;
3327 1.83 augustss ohci_soft_itd_t *sitd;
3328 1.83 augustss
3329 1.224 mrg DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p lock=%p\n", xfer, &sc->sc_lock));
3330 1.83 augustss
3331 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3332 1.83 augustss
3333 1.83 augustss /* Transfer is already done. */
3334 1.254.2.7 skrll if (xfer->ux_status != USBD_NOT_STARTED &&
3335 1.254.2.7 skrll xfer->ux_status != USBD_IN_PROGRESS) {
3336 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3337 1.224 mrg goto done;
3338 1.83 augustss }
3339 1.83 augustss
3340 1.83 augustss /* Give xfer the requested abort code. */
3341 1.254.2.7 skrll xfer->ux_status = USBD_CANCELLED;
3342 1.83 augustss
3343 1.83 augustss sed = opipe->sed;
3344 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3345 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3346 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3347 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3348 1.195 bouyer sizeof(sed->ed.ed_flags),
3349 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3350 1.83 augustss
3351 1.254.2.7 skrll sitd = xfer->ux_hcpriv;
3352 1.83 augustss #ifdef DIAGNOSTIC
3353 1.83 augustss if (sitd == NULL) {
3354 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3355 1.224 mrg goto done;
3356 1.83 augustss }
3357 1.83 augustss #endif
3358 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3359 1.83 augustss #ifdef DIAGNOSTIC
3360 1.83 augustss DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3361 1.83 augustss sitd->isdone = 1;
3362 1.83 augustss #endif
3363 1.83 augustss }
3364 1.83 augustss
3365 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
3366 1.83 augustss
3367 1.83 augustss /* Run callback. */
3368 1.83 augustss usb_transfer_complete(xfer);
3369 1.83 augustss
3370 1.168 augustss sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3371 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3372 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3373 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3374 1.83 augustss
3375 1.224 mrg done:
3376 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3377 1.60 augustss }
3378 1.60 augustss
3379 1.60 augustss void
3380 1.179 christos ohci_device_isoc_done(usbd_xfer_handle xfer)
3381 1.60 augustss {
3382 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3383 1.60 augustss }
3384 1.60 augustss
3385 1.60 augustss usbd_status
3386 1.91 augustss ohci_setup_isoc(usbd_pipe_handle pipe)
3387 1.60 augustss {
3388 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3389 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
3390 1.60 augustss struct iso *iso = &opipe->u.iso;
3391 1.60 augustss
3392 1.60 augustss iso->next = -1;
3393 1.60 augustss iso->inuse = 0;
3394 1.60 augustss
3395 1.224 mrg mutex_enter(&sc->sc_lock);
3396 1.168 augustss ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3397 1.224 mrg mutex_exit(&sc->sc_lock);
3398 1.83 augustss
3399 1.254.2.13 skrll return USBD_NORMAL_COMPLETION;
3400 1.60 augustss }
3401 1.60 augustss
3402 1.60 augustss void
3403 1.91 augustss ohci_device_isoc_close(usbd_pipe_handle pipe)
3404 1.60 augustss {
3405 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3406 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
3407 1.60 augustss
3408 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3409 1.224 mrg
3410 1.60 augustss DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3411 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3412 1.83 augustss #ifdef DIAGNOSTIC
3413 1.83 augustss opipe->tail.itd->isdone = 1;
3414 1.83 augustss #endif
3415 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3416 1.1 augustss }
3417