ohci.c revision 1.254.2.20 1 1.254.2.20 skrll /* $NetBSD: ohci.c,v 1.254.2.20 2015/03/30 11:56:18 skrll Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.224 mrg * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
9 1.224 mrg * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
10 1.224 mrg * and Matthew R. Green (mrg (at) eterna.com.au).
11 1.157 mycroft * This code is derived from software contributed to The NetBSD Foundation
12 1.157 mycroft * by Charles M. Hannum.
13 1.1 augustss *
14 1.1 augustss * Redistribution and use in source and binary forms, with or without
15 1.1 augustss * modification, are permitted provided that the following conditions
16 1.1 augustss * are met:
17 1.1 augustss * 1. Redistributions of source code must retain the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer.
19 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
20 1.1 augustss * notice, this list of conditions and the following disclaimer in the
21 1.1 augustss * documentation and/or other materials provided with the distribution.
22 1.1 augustss *
23 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
34 1.1 augustss */
35 1.1 augustss
36 1.1 augustss /*
37 1.1 augustss * USB Open Host Controller driver.
38 1.1 augustss *
39 1.96 augustss * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
40 1.201 uebayasi * USB spec: http://www.usb.org/developers/docs/
41 1.1 augustss */
42 1.108 lukem
43 1.108 lukem #include <sys/cdefs.h>
44 1.254.2.20 skrll __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.20 2015/03/30 11:56:18 skrll Exp $");
45 1.254.2.18 skrll
46 1.254.2.18 skrll #include "opt_usb.h"
47 1.1 augustss
48 1.1 augustss #include <sys/param.h>
49 1.254.2.17 skrll
50 1.254.2.17 skrll #include <sys/cpu.h>
51 1.1 augustss #include <sys/device.h>
52 1.254.2.17 skrll #include <sys/kernel.h>
53 1.254.2.17 skrll #include <sys/kmem.h>
54 1.1 augustss #include <sys/proc.h>
55 1.1 augustss #include <sys/queue.h>
56 1.254.2.17 skrll #include <sys/select.h>
57 1.254.2.18 skrll #include <sys/sysctl.h>
58 1.254.2.17 skrll #include <sys/systm.h>
59 1.1 augustss
60 1.16 augustss #include <machine/endian.h>
61 1.4 augustss
62 1.1 augustss #include <dev/usb/usb.h>
63 1.1 augustss #include <dev/usb/usbdi.h>
64 1.1 augustss #include <dev/usb/usbdivar.h>
65 1.38 augustss #include <dev/usb/usb_mem.h>
66 1.1 augustss #include <dev/usb/usb_quirks.h>
67 1.1 augustss
68 1.1 augustss #include <dev/usb/ohcireg.h>
69 1.1 augustss #include <dev/usb/ohcivar.h>
70 1.254.2.11 skrll #include <dev/usb/usbroothub.h>
71 1.254.2.18 skrll #include <dev/usb/usbhist.h>
72 1.1 augustss
73 1.254.2.18 skrll #ifdef USB_DEBUG
74 1.254.2.18 skrll #ifndef OHCI_DEBUG
75 1.254.2.18 skrll #define ohcidebug 0
76 1.254.2.18 skrll #else
77 1.254.2.18 skrll static int ohcidebug = 0;
78 1.1 augustss
79 1.254.2.18 skrll SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup")
80 1.254.2.18 skrll {
81 1.254.2.18 skrll int err;
82 1.254.2.18 skrll const struct sysctlnode *rnode;
83 1.254.2.18 skrll const struct sysctlnode *cnode;
84 1.254.2.18 skrll
85 1.254.2.18 skrll err = sysctl_createv(clog, 0, NULL, &rnode,
86 1.254.2.18 skrll CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci",
87 1.254.2.18 skrll SYSCTL_DESCR("ohci global controls"),
88 1.254.2.18 skrll NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
89 1.36 augustss
90 1.254.2.18 skrll if (err)
91 1.254.2.18 skrll goto fail;
92 1.254.2.18 skrll
93 1.254.2.18 skrll /* control debugging printfs */
94 1.254.2.18 skrll err = sysctl_createv(clog, 0, &rnode, &cnode,
95 1.254.2.18 skrll CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
96 1.254.2.18 skrll "debug", SYSCTL_DESCR("Enable debugging output"),
97 1.254.2.18 skrll NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL);
98 1.254.2.18 skrll if (err)
99 1.254.2.18 skrll goto fail;
100 1.254.2.18 skrll
101 1.254.2.18 skrll return;
102 1.254.2.18 skrll fail:
103 1.254.2.18 skrll aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
104 1.254.2.18 skrll }
105 1.254.2.18 skrll
106 1.254.2.18 skrll #endif /* OHCI_DEBUG */
107 1.254.2.18 skrll #endif /* USB_DEBUG */
108 1.254.2.18 skrll
109 1.254.2.18 skrll #define DPRINTF(FMT,A,B,C,D) USBHIST_LOG(ohcidebug,FMT,A,B,C,D)
110 1.254.2.18 skrll #define DPRINTFN(N,FMT,A,B,C,D) USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D)
111 1.254.2.18 skrll #define OHCIHIST_FUNC() USBHIST_FUNC()
112 1.254.2.18 skrll #define OHCIHIST_CALLED(name) USBHIST_CALLED(ohcidebug)
113 1.52 augustss
114 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
115 1.169 tron #define SWAP_ENDIAN OHCI_LITTLE_ENDIAN
116 1.16 augustss #else
117 1.169 tron #define SWAP_ENDIAN OHCI_BIG_ENDIAN
118 1.16 augustss #endif
119 1.16 augustss
120 1.169 tron #define O16TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
121 1.169 tron #define O32TOH(val) (sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
122 1.169 tron #define HTOO16(val) O16TOH(val)
123 1.169 tron #define HTOO32(val) O32TOH(val)
124 1.168 augustss
125 1.1 augustss struct ohci_pipe;
126 1.1 augustss
127 1.91 augustss Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
128 1.91 augustss Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
129 1.1 augustss
130 1.91 augustss Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
131 1.91 augustss Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
132 1.1 augustss
133 1.91 augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
134 1.91 augustss Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
135 1.60 augustss
136 1.91 augustss Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
137 1.91 augustss ohci_soft_td_t *);
138 1.91 augustss Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
139 1.254.2.19 skrll ohci_softc_t *, int, int, struct usbd_xfer *,
140 1.91 augustss ohci_soft_td_t *, ohci_soft_td_t **);
141 1.53 augustss
142 1.254.2.19 skrll Static usbd_status ohci_open(struct usbd_pipe *);
143 1.91 augustss Static void ohci_poll(struct usbd_bus *);
144 1.99 augustss Static void ohci_softintr(void *);
145 1.254.2.19 skrll Static void ohci_waitintr(ohci_softc_t *, struct usbd_xfer *);
146 1.254.2.19 skrll Static void ohci_rhsc(ohci_softc_t *, struct usbd_xfer *);
147 1.254.2.15 skrll Static void ohci_rhsc_softint(void *);
148 1.91 augustss
149 1.254.2.19 skrll Static usbd_status ohci_device_request(struct usbd_xfer *xfer);
150 1.168 augustss Static void ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
151 1.168 augustss ohci_soft_ed_t *);
152 1.168 augustss
153 1.224 mrg Static void ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
154 1.224 mrg ohci_soft_ed_t *);
155 1.91 augustss Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
156 1.91 augustss Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
157 1.91 augustss Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
158 1.91 augustss Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
159 1.91 augustss Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
160 1.91 augustss Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
161 1.91 augustss
162 1.254.2.19 skrll Static usbd_status ohci_setup_isoc(struct usbd_pipe *);
163 1.254.2.19 skrll Static void ohci_device_isoc_enter(struct usbd_xfer *);
164 1.91 augustss
165 1.254.2.19 skrll Static struct usbd_xfer * ohci_allocx(struct usbd_bus *);
166 1.254.2.19 skrll Static void ohci_freex(struct usbd_bus *, struct usbd_xfer *);
167 1.224 mrg Static void ohci_get_lock(struct usbd_bus *, kmutex_t **);
168 1.254.2.13 skrll Static int ohci_roothub_ctrl(struct usbd_bus *,
169 1.254.2.12 skrll usb_device_request_t *, void *, int);
170 1.91 augustss
171 1.254.2.19 skrll Static usbd_status ohci_root_intr_transfer(struct usbd_xfer *);
172 1.254.2.19 skrll Static usbd_status ohci_root_intr_start(struct usbd_xfer *);
173 1.254.2.19 skrll Static void ohci_root_intr_abort(struct usbd_xfer *);
174 1.254.2.19 skrll Static void ohci_root_intr_close(struct usbd_pipe *);
175 1.254.2.19 skrll Static void ohci_root_intr_done(struct usbd_xfer *);
176 1.254.2.19 skrll
177 1.254.2.19 skrll Static usbd_status ohci_device_ctrl_transfer(struct usbd_xfer *);
178 1.254.2.19 skrll Static usbd_status ohci_device_ctrl_start(struct usbd_xfer *);
179 1.254.2.19 skrll Static void ohci_device_ctrl_abort(struct usbd_xfer *);
180 1.254.2.19 skrll Static void ohci_device_ctrl_close(struct usbd_pipe *);
181 1.254.2.19 skrll Static void ohci_device_ctrl_done(struct usbd_xfer *);
182 1.254.2.19 skrll
183 1.254.2.19 skrll Static usbd_status ohci_device_bulk_transfer(struct usbd_xfer *);
184 1.254.2.19 skrll Static usbd_status ohci_device_bulk_start(struct usbd_xfer *);
185 1.254.2.19 skrll Static void ohci_device_bulk_abort(struct usbd_xfer *);
186 1.254.2.19 skrll Static void ohci_device_bulk_close(struct usbd_pipe *);
187 1.254.2.19 skrll Static void ohci_device_bulk_done(struct usbd_xfer *);
188 1.254.2.19 skrll
189 1.254.2.19 skrll Static usbd_status ohci_device_intr_transfer(struct usbd_xfer *);
190 1.254.2.19 skrll Static usbd_status ohci_device_intr_start(struct usbd_xfer *);
191 1.254.2.19 skrll Static void ohci_device_intr_abort(struct usbd_xfer *);
192 1.254.2.19 skrll Static void ohci_device_intr_close(struct usbd_pipe *);
193 1.254.2.19 skrll Static void ohci_device_intr_done(struct usbd_xfer *);
194 1.254.2.19 skrll
195 1.254.2.19 skrll Static usbd_status ohci_device_isoc_transfer(struct usbd_xfer *);
196 1.254.2.19 skrll Static usbd_status ohci_device_isoc_start(struct usbd_xfer *);
197 1.254.2.19 skrll Static void ohci_device_isoc_abort(struct usbd_xfer *);
198 1.254.2.19 skrll Static void ohci_device_isoc_close(struct usbd_pipe *);
199 1.254.2.19 skrll Static void ohci_device_isoc_done(struct usbd_xfer *);
200 1.91 augustss
201 1.254.2.15 skrll Static usbd_status ohci_device_setintr(ohci_softc_t *,
202 1.254.2.15 skrll struct ohci_pipe *, int);
203 1.91 augustss
204 1.91 augustss Static void ohci_timeout(void *);
205 1.114 augustss Static void ohci_timeout_task(void *);
206 1.104 augustss Static void ohci_rhsc_enable(void *);
207 1.91 augustss
208 1.254.2.19 skrll Static void ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *);
209 1.254.2.19 skrll Static void ohci_abort_xfer(struct usbd_xfer *, usbd_status);
210 1.53 augustss
211 1.254.2.19 skrll Static void ohci_device_clear_toggle(struct usbd_pipe *);
212 1.254.2.19 skrll Static void ohci_noop(struct usbd_pipe *);
213 1.37 augustss
214 1.52 augustss #ifdef OHCI_DEBUG
215 1.91 augustss Static void ohci_dumpregs(ohci_softc_t *);
216 1.168 augustss Static void ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
217 1.168 augustss Static void ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
218 1.168 augustss Static void ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
219 1.168 augustss Static void ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
220 1.168 augustss Static void ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
221 1.1 augustss #endif
222 1.1 augustss
223 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
224 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
225 1.88 augustss #define OWRITE1(sc, r, x) \
226 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
227 1.88 augustss #define OWRITE2(sc, r, x) \
228 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
229 1.88 augustss #define OWRITE4(sc, r, x) \
230 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
231 1.174 mrg
232 1.174 mrg static __inline uint32_t
233 1.174 mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
234 1.174 mrg {
235 1.174 mrg
236 1.174 mrg OBARR(sc);
237 1.174 mrg return bus_space_read_4(sc->iot, sc->ioh, r);
238 1.174 mrg }
239 1.1 augustss
240 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
241 1.254.2.1 skrll Static uint8_t revbits[OHCI_NO_INTRS] =
242 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
243 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
244 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
245 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
246 1.1 augustss
247 1.1 augustss struct ohci_pipe {
248 1.1 augustss struct usbd_pipe pipe;
249 1.1 augustss ohci_soft_ed_t *sed;
250 1.60 augustss union {
251 1.60 augustss ohci_soft_td_t *td;
252 1.60 augustss ohci_soft_itd_t *itd;
253 1.60 augustss } tail;
254 1.1 augustss /* Info needed for different pipe kinds. */
255 1.1 augustss union {
256 1.1 augustss /* Control pipe */
257 1.1 augustss struct {
258 1.4 augustss usb_dma_t reqdma;
259 1.1 augustss u_int length;
260 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
261 1.1 augustss } ctl;
262 1.1 augustss /* Interrupt pipe */
263 1.1 augustss struct {
264 1.1 augustss int nslots;
265 1.1 augustss int pos;
266 1.1 augustss } intr;
267 1.3 augustss /* Bulk pipe */
268 1.3 augustss struct {
269 1.3 augustss u_int length;
270 1.32 augustss int isread;
271 1.3 augustss } bulk;
272 1.43 augustss /* Iso pipe */
273 1.43 augustss struct iso {
274 1.60 augustss int next, inuse;
275 1.43 augustss } iso;
276 1.1 augustss } u;
277 1.1 augustss };
278 1.1 augustss
279 1.182 drochner Static const struct usbd_bus_methods ohci_bus_methods = {
280 1.254.2.5 skrll .ubm_open = ohci_open,
281 1.254.2.5 skrll .ubm_softint = ohci_softintr,
282 1.254.2.5 skrll .ubm_dopoll = ohci_poll,
283 1.254.2.5 skrll .ubm_allocx = ohci_allocx,
284 1.254.2.5 skrll .ubm_freex = ohci_freex,
285 1.254.2.5 skrll .ubm_getlock = ohci_get_lock,
286 1.254.2.12 skrll .ubm_rhctrl = ohci_roothub_ctrl,
287 1.1 augustss };
288 1.1 augustss
289 1.182 drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
290 1.254.2.5 skrll .upm_transfer = ohci_root_intr_transfer,
291 1.254.2.5 skrll .upm_start = ohci_root_intr_start,
292 1.254.2.5 skrll .upm_abort = ohci_root_intr_abort,
293 1.254.2.5 skrll .upm_close = ohci_root_intr_close,
294 1.254.2.5 skrll .upm_cleartoggle = ohci_noop,
295 1.254.2.5 skrll .upm_done = ohci_root_intr_done,
296 1.1 augustss };
297 1.1 augustss
298 1.182 drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
299 1.254.2.5 skrll .upm_transfer = ohci_device_ctrl_transfer,
300 1.254.2.5 skrll .upm_start = ohci_device_ctrl_start,
301 1.254.2.5 skrll .upm_abort = ohci_device_ctrl_abort,
302 1.254.2.5 skrll .upm_close = ohci_device_ctrl_close,
303 1.254.2.5 skrll .upm_cleartoggle = ohci_noop,
304 1.254.2.5 skrll .upm_done = ohci_device_ctrl_done,
305 1.1 augustss };
306 1.1 augustss
307 1.182 drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
308 1.254.2.5 skrll .upm_transfer = ohci_device_intr_transfer,
309 1.254.2.5 skrll .upm_start = ohci_device_intr_start,
310 1.254.2.5 skrll .upm_abort = ohci_device_intr_abort,
311 1.254.2.5 skrll .upm_close = ohci_device_intr_close,
312 1.254.2.5 skrll .upm_cleartoggle = ohci_device_clear_toggle,
313 1.254.2.5 skrll .upm_done = ohci_device_intr_done,
314 1.1 augustss };
315 1.1 augustss
316 1.182 drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
317 1.254.2.5 skrll .upm_transfer = ohci_device_bulk_transfer,
318 1.254.2.5 skrll .upm_start = ohci_device_bulk_start,
319 1.254.2.5 skrll .upm_abort = ohci_device_bulk_abort,
320 1.254.2.5 skrll .upm_close = ohci_device_bulk_close,
321 1.254.2.5 skrll .upm_cleartoggle = ohci_device_clear_toggle,
322 1.254.2.5 skrll .upm_done = ohci_device_bulk_done,
323 1.3 augustss };
324 1.3 augustss
325 1.182 drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
326 1.254.2.5 skrll .upm_transfer = ohci_device_isoc_transfer,
327 1.254.2.5 skrll .upm_start = ohci_device_isoc_start,
328 1.254.2.5 skrll .upm_abort = ohci_device_isoc_abort,
329 1.254.2.5 skrll .upm_close = ohci_device_isoc_close,
330 1.254.2.5 skrll .upm_cleartoggle = ohci_noop,
331 1.254.2.5 skrll .upm_done = ohci_device_isoc_done,
332 1.43 augustss };
333 1.43 augustss
334 1.47 augustss int
335 1.189 dyoung ohci_activate(device_t self, enum devact act)
336 1.47 augustss {
337 1.189 dyoung struct ohci_softc *sc = device_private(self);
338 1.47 augustss
339 1.47 augustss switch (act) {
340 1.47 augustss case DVACT_DEACTIVATE:
341 1.183 kiyohara sc->sc_dying = 1;
342 1.203 dyoung return 0;
343 1.203 dyoung default:
344 1.203 dyoung return EOPNOTSUPP;
345 1.47 augustss }
346 1.47 augustss }
347 1.47 augustss
348 1.187 dyoung void
349 1.187 dyoung ohci_childdet(device_t self, device_t child)
350 1.187 dyoung {
351 1.187 dyoung struct ohci_softc *sc = device_private(self);
352 1.187 dyoung
353 1.187 dyoung KASSERT(sc->sc_child == child);
354 1.187 dyoung sc->sc_child = NULL;
355 1.187 dyoung }
356 1.187 dyoung
357 1.47 augustss int
358 1.91 augustss ohci_detach(struct ohci_softc *sc, int flags)
359 1.47 augustss {
360 1.47 augustss int rv = 0;
361 1.47 augustss
362 1.47 augustss if (sc->sc_child != NULL)
363 1.47 augustss rv = config_detach(sc->sc_child, flags);
364 1.120 augustss
365 1.47 augustss if (rv != 0)
366 1.254.2.13 skrll return rv;
367 1.47 augustss
368 1.254 ozaki callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock);
369 1.104 augustss
370 1.116 augustss usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
371 1.209 dyoung callout_destroy(&sc->sc_tmo_rhsc);
372 1.116 augustss
373 1.224 mrg softint_disestablish(sc->sc_rhsc_si);
374 1.224 mrg
375 1.224 mrg cv_destroy(&sc->sc_softwake_cv);
376 1.224 mrg
377 1.224 mrg mutex_destroy(&sc->sc_lock);
378 1.224 mrg mutex_destroy(&sc->sc_intr_lock);
379 1.224 mrg
380 1.198 cegger if (sc->sc_hcca != NULL)
381 1.198 cegger usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
382 1.232 christos pool_cache_destroy(sc->sc_xferpool);
383 1.47 augustss
384 1.254.2.13 skrll return rv;
385 1.47 augustss }
386 1.47 augustss
387 1.1 augustss ohci_soft_ed_t *
388 1.91 augustss ohci_alloc_sed(ohci_softc_t *sc)
389 1.1 augustss {
390 1.1 augustss ohci_soft_ed_t *sed;
391 1.53 augustss usbd_status err;
392 1.1 augustss int i, offs;
393 1.4 augustss usb_dma_t dma;
394 1.1 augustss
395 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
396 1.254.2.18 skrll
397 1.53 augustss if (sc->sc_freeeds == NULL) {
398 1.254.2.18 skrll DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
399 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
400 1.53 augustss OHCI_ED_ALIGN, &dma);
401 1.53 augustss if (err)
402 1.254.2.13 skrll return 0;
403 1.225 skrll for (i = 0; i < OHCI_SED_CHUNK; i++) {
404 1.39 augustss offs = i * OHCI_SED_SIZE;
405 1.123 augustss sed = KERNADDR(&dma, offs);
406 1.125 augustss sed->physaddr = DMAADDR(&dma, offs);
407 1.195 bouyer sed->dma = dma;
408 1.195 bouyer sed->offs = offs;
409 1.1 augustss sed->next = sc->sc_freeeds;
410 1.1 augustss sc->sc_freeeds = sed;
411 1.1 augustss }
412 1.1 augustss }
413 1.1 augustss sed = sc->sc_freeeds;
414 1.1 augustss sc->sc_freeeds = sed->next;
415 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
416 1.1 augustss sed->next = 0;
417 1.254.2.13 skrll return sed;
418 1.1 augustss }
419 1.1 augustss
420 1.1 augustss void
421 1.91 augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
422 1.1 augustss {
423 1.1 augustss sed->next = sc->sc_freeeds;
424 1.1 augustss sc->sc_freeeds = sed;
425 1.1 augustss }
426 1.1 augustss
427 1.1 augustss ohci_soft_td_t *
428 1.91 augustss ohci_alloc_std(ohci_softc_t *sc)
429 1.1 augustss {
430 1.1 augustss ohci_soft_td_t *std;
431 1.53 augustss usbd_status err;
432 1.1 augustss int i, offs;
433 1.4 augustss usb_dma_t dma;
434 1.1 augustss
435 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
436 1.254.2.18 skrll
437 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
438 1.240 skrll
439 1.53 augustss if (sc->sc_freetds == NULL) {
440 1.254.2.18 skrll DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
441 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
442 1.53 augustss OHCI_TD_ALIGN, &dma);
443 1.53 augustss if (err)
444 1.254.2.13 skrll return NULL;
445 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
446 1.39 augustss offs = i * OHCI_STD_SIZE;
447 1.123 augustss std = KERNADDR(&dma, offs);
448 1.125 augustss std->physaddr = DMAADDR(&dma, offs);
449 1.195 bouyer std->dma = dma;
450 1.195 bouyer std->offs = offs;
451 1.1 augustss std->nexttd = sc->sc_freetds;
452 1.1 augustss sc->sc_freetds = std;
453 1.1 augustss }
454 1.1 augustss }
455 1.69 augustss
456 1.1 augustss std = sc->sc_freetds;
457 1.1 augustss sc->sc_freetds = std->nexttd;
458 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
459 1.83 augustss std->nexttd = NULL;
460 1.83 augustss std->xfer = NULL;
461 1.69 augustss ohci_hash_add_td(sc, std);
462 1.69 augustss
463 1.254.2.13 skrll return std;
464 1.1 augustss }
465 1.1 augustss
466 1.1 augustss void
467 1.91 augustss ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
468 1.1 augustss {
469 1.254.2.7 skrll
470 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
471 1.254.2.1 skrll
472 1.69 augustss ohci_hash_rem_td(sc, std);
473 1.1 augustss std->nexttd = sc->sc_freetds;
474 1.1 augustss sc->sc_freetds = std;
475 1.1 augustss }
476 1.1 augustss
477 1.1 augustss usbd_status
478 1.91 augustss ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
479 1.254.2.19 skrll int alen, int rd, struct usbd_xfer *xfer,
480 1.91 augustss ohci_soft_td_t *sp, ohci_soft_td_t **ep)
481 1.48 augustss {
482 1.48 augustss ohci_soft_td_t *next, *cur;
483 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
484 1.254.2.1 skrll uint32_t tdflags;
485 1.75 augustss int len, curlen;
486 1.254.2.7 skrll usb_dma_t *dma = &xfer->ux_dmabuf;
487 1.254.2.7 skrll uint16_t flags = xfer->ux_flags;
488 1.48 augustss
489 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
490 1.254.2.18 skrll DPRINTF("start len=%d", alen, 0, 0, 0);
491 1.75 augustss
492 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
493 1.224 mrg
494 1.254.2.18 skrll DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d",
495 1.254.2.18 skrll opipe->pipe.up_dev->ud_addr,
496 1.254.2.18 skrll UE_GET_ADDR(opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress),
497 1.254.2.18 skrll alen, opipe->pipe.up_dev->ud_speed);
498 1.254.2.18 skrll
499 1.75 augustss len = alen;
500 1.48 augustss cur = sp;
501 1.125 augustss dataphys = DMAADDR(dma, 0);
502 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
503 1.195 bouyer usb_syncmem(dma, 0, len,
504 1.195 bouyer rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
505 1.168 augustss tdflags = HTOO32(
506 1.120 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
507 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
508 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
509 1.61 augustss
510 1.48 augustss for (;;) {
511 1.48 augustss next = ohci_alloc_std(sc);
512 1.75 augustss if (next == NULL)
513 1.61 augustss goto nomem;
514 1.48 augustss
515 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
516 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
517 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
518 1.48 augustss /* we can handle it in this TD */
519 1.48 augustss curlen = len;
520 1.48 augustss } else {
521 1.48 augustss /* must use multiple TDs, fill as much as possible. */
522 1.120 augustss curlen = 2 * OHCI_PAGE_SIZE -
523 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
524 1.78 augustss /* the length must be a multiple of the max size */
525 1.254.2.7 skrll curlen -= curlen % UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize);
526 1.78 augustss #ifdef DIAGNOSTIC
527 1.78 augustss if (curlen == 0)
528 1.128 provos panic("ohci_alloc_std: curlen == 0");
529 1.78 augustss #endif
530 1.48 augustss }
531 1.254.2.18 skrll DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x "
532 1.254.2.18 skrll "len=%d curlen=%d", dataphys, dataphysend, len, curlen);
533 1.48 augustss len -= curlen;
534 1.48 augustss
535 1.77 augustss cur->td.td_flags = tdflags;
536 1.168 augustss cur->td.td_cbp = HTOO32(dataphys);
537 1.48 augustss cur->nexttd = next;
538 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
539 1.168 augustss cur->td.td_be = HTOO32(dataphys + curlen - 1);
540 1.48 augustss cur->len = curlen;
541 1.48 augustss cur->flags = OHCI_ADD_LEN;
542 1.77 augustss cur->xfer = xfer;
543 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
544 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
545 1.254.2.18 skrll DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys,
546 1.254.2.18 skrll dataphys + curlen - 1, 0, 0);
547 1.48 augustss if (len == 0)
548 1.48 augustss break;
549 1.254.2.18 skrll DPRINTFN(10, "extend chain", 0, 0, 0, 0);
550 1.48 augustss dataphys += curlen;
551 1.48 augustss cur = next;
552 1.48 augustss }
553 1.164 augustss if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
554 1.254.2.7 skrll alen % UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize) == 0) {
555 1.61 augustss /* Force a 0 length transfer at the end. */
556 1.75 augustss
557 1.75 augustss cur = next;
558 1.61 augustss next = ohci_alloc_std(sc);
559 1.75 augustss if (next == NULL)
560 1.61 augustss goto nomem;
561 1.61 augustss
562 1.77 augustss cur->td.td_flags = tdflags;
563 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
564 1.61 augustss cur->nexttd = next;
565 1.168 augustss cur->td.td_nexttd = HTOO32(next->physaddr);
566 1.75 augustss cur->td.td_be = ~0;
567 1.61 augustss cur->len = 0;
568 1.61 augustss cur->flags = 0;
569 1.77 augustss cur->xfer = xfer;
570 1.195 bouyer usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
571 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
572 1.254.2.18 skrll DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0);
573 1.61 augustss }
574 1.77 augustss *ep = cur;
575 1.48 augustss
576 1.254.2.13 skrll return USBD_NORMAL_COMPLETION;
577 1.61 augustss
578 1.61 augustss nomem:
579 1.236 skrll
580 1.236 skrll /* Don't free sp - let the caller do that */
581 1.236 skrll ohci_free_std_chain(sc, sp->nexttd, NULL);
582 1.236 skrll
583 1.254.2.13 skrll return USBD_NOMEM;
584 1.48 augustss }
585 1.48 augustss
586 1.82 augustss Static void
587 1.120 augustss ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
588 1.91 augustss ohci_soft_td_t *stdend)
589 1.48 augustss {
590 1.48 augustss ohci_soft_td_t *p;
591 1.48 augustss
592 1.48 augustss for (; std != stdend; std = p) {
593 1.48 augustss p = std->nexttd;
594 1.48 augustss ohci_free_std(sc, std);
595 1.48 augustss }
596 1.48 augustss }
597 1.48 augustss
598 1.60 augustss ohci_soft_itd_t *
599 1.91 augustss ohci_alloc_sitd(ohci_softc_t *sc)
600 1.60 augustss {
601 1.60 augustss ohci_soft_itd_t *sitd;
602 1.60 augustss usbd_status err;
603 1.224 mrg int i, offs;
604 1.60 augustss usb_dma_t dma;
605 1.60 augustss
606 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
607 1.254.2.18 skrll
608 1.60 augustss if (sc->sc_freeitds == NULL) {
609 1.254.2.18 skrll DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
610 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
611 1.83 augustss OHCI_ITD_ALIGN, &dma);
612 1.60 augustss if (err)
613 1.254.2.13 skrll return NULL;
614 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
615 1.83 augustss offs = i * OHCI_SITD_SIZE;
616 1.123 augustss sitd = KERNADDR(&dma, offs);
617 1.125 augustss sitd->physaddr = DMAADDR(&dma, offs);
618 1.195 bouyer sitd->dma = dma;
619 1.195 bouyer sitd->offs = offs;
620 1.60 augustss sitd->nextitd = sc->sc_freeitds;
621 1.60 augustss sc->sc_freeitds = sitd;
622 1.60 augustss }
623 1.60 augustss }
624 1.83 augustss
625 1.60 augustss sitd = sc->sc_freeitds;
626 1.60 augustss sc->sc_freeitds = sitd->nextitd;
627 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
628 1.83 augustss sitd->nextitd = NULL;
629 1.83 augustss sitd->xfer = NULL;
630 1.83 augustss ohci_hash_add_itd(sc, sitd);
631 1.83 augustss
632 1.83 augustss #ifdef DIAGNOSTIC
633 1.83 augustss sitd->isdone = 0;
634 1.83 augustss #endif
635 1.83 augustss
636 1.254.2.13 skrll return sitd;
637 1.60 augustss }
638 1.60 augustss
639 1.60 augustss void
640 1.91 augustss ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
641 1.60 augustss {
642 1.83 augustss
643 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
644 1.254.2.18 skrll DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0);
645 1.83 augustss
646 1.83 augustss #ifdef DIAGNOSTIC
647 1.83 augustss if (!sitd->isdone) {
648 1.128 provos panic("ohci_free_sitd: sitd=%p not done", sitd);
649 1.83 augustss return;
650 1.83 augustss }
651 1.134 toshii /* Warn double free */
652 1.134 toshii sitd->isdone = 0;
653 1.83 augustss #endif
654 1.83 augustss
655 1.83 augustss ohci_hash_rem_itd(sc, sitd);
656 1.60 augustss sitd->nextitd = sc->sc_freeitds;
657 1.60 augustss sc->sc_freeitds = sitd;
658 1.60 augustss }
659 1.60 augustss
660 1.254.2.14 skrll int
661 1.91 augustss ohci_init(ohci_softc_t *sc)
662 1.1 augustss {
663 1.1 augustss ohci_soft_ed_t *sed, *psed;
664 1.53 augustss usbd_status err;
665 1.1 augustss int i;
666 1.254.2.1 skrll uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */;
667 1.16 augustss
668 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
669 1.254.2.18 skrll
670 1.199 jmcneill aprint_normal_dev(sc->sc_dev, "");
671 1.199 jmcneill
672 1.198 cegger sc->sc_hcca = NULL;
673 1.224 mrg callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
674 1.224 mrg
675 1.224 mrg mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
676 1.224 mrg mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SCHED);
677 1.224 mrg cv_init(&sc->sc_softwake_cv, "ohciab");
678 1.224 mrg
679 1.224 mrg sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
680 1.224 mrg ohci_rhsc_softint, sc);
681 1.198 cegger
682 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
683 1.198 cegger LIST_INIT(&sc->sc_hash_tds[i]);
684 1.198 cegger for (i = 0; i < OHCI_HASH_SIZE; i++)
685 1.198 cegger LIST_INIT(&sc->sc_hash_itds[i]);
686 1.198 cegger
687 1.232 christos sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
688 1.232 christos "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
689 1.198 cegger
690 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
691 1.200 enami aprint_normal("OHCI version %d.%d%s\n",
692 1.199 jmcneill OHCI_REV_HI(rev), OHCI_REV_LO(rev),
693 1.199 jmcneill OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
694 1.55 augustss
695 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
696 1.199 jmcneill aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
697 1.254.2.7 skrll sc->sc_bus.ub_revision = USBREV_UNKNOWN;
698 1.254.2.14 skrll return -1;
699 1.1 augustss }
700 1.254.2.7 skrll sc->sc_bus.ub_revision = USBREV_1_0;
701 1.254.2.7 skrll sc->sc_bus.ub_usedma = true;
702 1.153 fvdl
703 1.73 augustss /* XXX determine alignment by R/W */
704 1.1 augustss /* Allocate the HCCA area. */
705 1.120 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
706 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
707 1.198 cegger if (err) {
708 1.198 cegger sc->sc_hcca = NULL;
709 1.198 cegger return err;
710 1.198 cegger }
711 1.123 augustss sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
712 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
713 1.1 augustss
714 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
715 1.1 augustss
716 1.60 augustss /* Allocate dummy ED that starts the control list. */
717 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
718 1.53 augustss if (sc->sc_ctrl_head == NULL) {
719 1.254.2.14 skrll err = ENOMEM;
720 1.1 augustss goto bad1;
721 1.1 augustss }
722 1.168 augustss sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
723 1.34 augustss
724 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
725 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
726 1.53 augustss if (sc->sc_bulk_head == NULL) {
727 1.254.2.14 skrll err = ENOMEM;
728 1.1 augustss goto bad2;
729 1.1 augustss }
730 1.168 augustss sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
731 1.195 bouyer usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
732 1.195 bouyer sizeof(sc->sc_bulk_head->ed),
733 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
734 1.1 augustss
735 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
736 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
737 1.60 augustss if (sc->sc_isoc_head == NULL) {
738 1.254.2.14 skrll err = ENOMEM;
739 1.60 augustss goto bad3;
740 1.60 augustss }
741 1.168 augustss sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
742 1.195 bouyer usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
743 1.195 bouyer sizeof(sc->sc_isoc_head->ed),
744 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
745 1.60 augustss
746 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
747 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
748 1.1 augustss sed = ohci_alloc_sed(sc);
749 1.53 augustss if (sed == NULL) {
750 1.1 augustss while (--i >= 0)
751 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
752 1.254.2.14 skrll err = ENOMEM;
753 1.60 augustss goto bad4;
754 1.1 augustss }
755 1.1 augustss /* All ED fields are set to 0. */
756 1.1 augustss sc->sc_eds[i] = sed;
757 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
758 1.60 augustss if (i != 0)
759 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
760 1.60 augustss else
761 1.60 augustss psed= sc->sc_isoc_head;
762 1.60 augustss sed->next = psed;
763 1.168 augustss sed->ed.ed_nexted = HTOO32(psed->physaddr);
764 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
765 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
766 1.1 augustss }
767 1.120 augustss /*
768 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
769 1.1 augustss * the tree set up properly to spread the interrupts.
770 1.1 augustss */
771 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
772 1.120 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
773 1.168 augustss HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
774 1.195 bouyer usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
775 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
776 1.1 augustss
777 1.73 augustss #ifdef OHCI_DEBUG
778 1.254.2.18 skrll DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0);
779 1.73 augustss if (ohcidebug > 15) {
780 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
781 1.254.2.18 skrll DPRINTFN(15, "ed#%d ", i, 0, 0, 0);
782 1.168 augustss ohci_dump_ed(sc, sc->sc_eds[i]);
783 1.73 augustss }
784 1.254.2.18 skrll DPRINTFN(15, "iso", 0, 0, 0 ,0);
785 1.168 augustss ohci_dump_ed(sc, sc->sc_isoc_head);
786 1.73 augustss }
787 1.254.2.18 skrll DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0);
788 1.73 augustss #endif
789 1.73 augustss
790 1.161 augustss /* Preserve values programmed by SMM/BIOS but lost over reset. */
791 1.161 augustss ctl = OREAD4(sc, OHCI_CONTROL);
792 1.161 augustss rwc = ctl & OHCI_RWC;
793 1.161 augustss fm = OREAD4(sc, OHCI_FM_INTERVAL);
794 1.161 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
795 1.243 martin /* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */
796 1.161 augustss
797 1.1 augustss /* Determine in what context we are running. */
798 1.1 augustss if (ctl & OHCI_IR) {
799 1.1 augustss /* SMM active, request change */
800 1.254.2.18 skrll DPRINTF("SMM active, request owner change", 0, 0, 0, 0);
801 1.160 augustss if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
802 1.160 augustss (OHCI_OC | OHCI_MIE))
803 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
804 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
805 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
806 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
807 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
808 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
809 1.1 augustss }
810 1.160 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
811 1.1 augustss if ((ctl & OHCI_IR) == 0) {
812 1.199 jmcneill aprint_error_dev(sc->sc_dev,
813 1.199 jmcneill "SMM does not respond, resetting\n");
814 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
815 1.1 augustss goto reset;
816 1.1 augustss }
817 1.103 augustss #if 0
818 1.103 augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
819 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
820 1.1 augustss /* BIOS started controller. */
821 1.254.2.18 skrll DPRINTF("BIOS active", 0, 0, 0, 0);
822 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
823 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
824 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
825 1.1 augustss }
826 1.103 augustss #endif
827 1.1 augustss } else {
828 1.254.2.18 skrll DPRINTF("cold started", 0 ,0 ,0 ,0);
829 1.1 augustss reset:
830 1.1 augustss /* Controller was cold started. */
831 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
832 1.1 augustss }
833 1.1 augustss
834 1.16 augustss /*
835 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
836 1.25 augustss * without it some controllers do not start.
837 1.16 augustss */
838 1.254.2.18 skrll DPRINTF("sc %p: resetting", sc, 0, 0, 0);
839 1.161 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
840 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
841 1.16 augustss
842 1.1 augustss /* We now own the host controller and the bus has been reset. */
843 1.1 augustss
844 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
845 1.1 augustss /* Nominal time for a reset is 10 us. */
846 1.1 augustss for (i = 0; i < 10; i++) {
847 1.1 augustss delay(10);
848 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
849 1.1 augustss if (!hcr)
850 1.1 augustss break;
851 1.1 augustss }
852 1.1 augustss if (hcr) {
853 1.199 jmcneill aprint_error_dev(sc->sc_dev, "reset timeout\n");
854 1.254.2.14 skrll err = EIO;
855 1.60 augustss goto bad5;
856 1.1 augustss }
857 1.52 augustss #ifdef OHCI_DEBUG
858 1.1 augustss if (ohcidebug > 15)
859 1.1 augustss ohci_dumpregs(sc);
860 1.1 augustss #endif
861 1.1 augustss
862 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
863 1.1 augustss
864 1.1 augustss /* Set up HC registers. */
865 1.125 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
866 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
867 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
868 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
869 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
870 1.55 augustss /* switch on desired functional features */
871 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
872 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
873 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
874 1.161 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
875 1.1 augustss /* And finally start it! */
876 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
877 1.1 augustss
878 1.1 augustss /*
879 1.1 augustss * The controller is now OPERATIONAL. Set a some final
880 1.1 augustss * registers that should be set earlier, but that the
881 1.1 augustss * controller ignores when in the SUSPEND state.
882 1.1 augustss */
883 1.161 augustss ival = OHCI_GET_IVAL(fm);
884 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
885 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
886 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
887 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
888 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
889 1.1 augustss
890 1.249 skrll if (sc->sc_flags & OHCIF_SUPERIO) {
891 1.249 skrll /* no overcurrent protection */
892 1.249 skrll desca |= OHCI_NOCP;
893 1.249 skrll /*
894 1.249 skrll * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning
895 1.249 skrll * that
896 1.249 skrll * - ports are always power switched
897 1.249 skrll * - don't wait for powered root hub port
898 1.249 skrll */
899 1.249 skrll desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS);
900 1.249 skrll }
901 1.249 skrll
902 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
903 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
904 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
905 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
906 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
907 1.1 augustss
908 1.85 augustss /*
909 1.85 augustss * The AMD756 requires a delay before re-reading the register,
910 1.85 augustss * otherwise it will occasionally report 0 ports.
911 1.85 augustss */
912 1.145 augustss sc->sc_noport = 0;
913 1.145 augustss for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
914 1.145 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
915 1.145 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
916 1.145 augustss }
917 1.1 augustss
918 1.52 augustss #ifdef OHCI_DEBUG
919 1.1 augustss if (ohcidebug > 5)
920 1.1 augustss ohci_dumpregs(sc);
921 1.1 augustss #endif
922 1.120 augustss
923 1.1 augustss /* Set up the bus struct. */
924 1.254.2.7 skrll sc->sc_bus.ub_methods = &ohci_bus_methods;
925 1.254.2.7 skrll sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe);
926 1.1 augustss
927 1.101 minoura sc->sc_control = sc->sc_intre = 0;
928 1.59 augustss
929 1.167 augustss /* Finally, turn on interrupts. */
930 1.254.2.18 skrll DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0);
931 1.167 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
932 1.167 augustss
933 1.254.2.14 skrll return 0;
934 1.1 augustss
935 1.60 augustss bad5:
936 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
937 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
938 1.60 augustss bad4:
939 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
940 1.1 augustss bad3:
941 1.144 augustss ohci_free_sed(sc, sc->sc_bulk_head);
942 1.144 augustss bad2:
943 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
944 1.1 augustss bad1:
945 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
946 1.198 cegger sc->sc_hcca = NULL;
947 1.254.2.13 skrll return err;
948 1.1 augustss }
949 1.1 augustss
950 1.254.2.19 skrll struct usbd_xfer *
951 1.91 augustss ohci_allocx(struct usbd_bus *bus)
952 1.62 augustss {
953 1.254.2.7 skrll struct ohci_softc *sc = bus->ub_hcpriv;
954 1.254.2.19 skrll struct usbd_xfer *xfer;
955 1.62 augustss
956 1.232 christos xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
957 1.118 augustss if (xfer != NULL) {
958 1.232 christos memset(xfer, 0, sizeof(struct ohci_xfer));
959 1.118 augustss #ifdef DIAGNOSTIC
960 1.254.2.7 skrll xfer->ux_state = XFER_BUSY;
961 1.118 augustss #endif
962 1.118 augustss }
963 1.254.2.13 skrll return xfer;
964 1.62 augustss }
965 1.62 augustss
966 1.62 augustss void
967 1.254.2.19 skrll ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
968 1.62 augustss {
969 1.254.2.7 skrll struct ohci_softc *sc = bus->ub_hcpriv;
970 1.62 augustss
971 1.118 augustss #ifdef DIAGNOSTIC
972 1.254.2.7 skrll if (xfer->ux_state != XFER_BUSY) {
973 1.118 augustss printf("ohci_freex: xfer=%p not busy, 0x%08x\n", xfer,
974 1.254.2.7 skrll xfer->ux_state);
975 1.118 augustss }
976 1.254.2.7 skrll xfer->ux_state = XFER_FREE;
977 1.118 augustss #endif
978 1.232 christos pool_cache_put(sc->sc_xferpool, xfer);
979 1.42 augustss }
980 1.42 augustss
981 1.224 mrg Static void
982 1.224 mrg ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
983 1.224 mrg {
984 1.254.2.7 skrll struct ohci_softc *sc = bus->ub_hcpriv;
985 1.224 mrg
986 1.224 mrg *lock = &sc->sc_lock;
987 1.224 mrg }
988 1.224 mrg
989 1.59 augustss /*
990 1.59 augustss * Shut down the controller when the system is going down.
991 1.59 augustss */
992 1.188 dyoung bool
993 1.188 dyoung ohci_shutdown(device_t self, int flags)
994 1.59 augustss {
995 1.188 dyoung ohci_softc_t *sc = device_private(self);
996 1.59 augustss
997 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
998 1.254.2.18 skrll
999 1.254.2.18 skrll DPRINTF("stopping the HC", 0, 0, 0, 0);
1000 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1001 1.188 dyoung return true;
1002 1.59 augustss }
1003 1.59 augustss
1004 1.185 jmcneill bool
1005 1.206 dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
1006 1.33 augustss {
1007 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1008 1.185 jmcneill uint32_t ctl;
1009 1.33 augustss
1010 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1011 1.254.2.7 skrll sc->sc_bus.ub_usepolling++;
1012 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1013 1.224 mrg
1014 1.185 jmcneill /* Some broken BIOSes do not recover these values */
1015 1.185 jmcneill OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
1016 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
1017 1.185 jmcneill sc->sc_ctrl_head->physaddr);
1018 1.185 jmcneill OWRITE4(sc, OHCI_BULK_HEAD_ED,
1019 1.185 jmcneill sc->sc_bulk_head->physaddr);
1020 1.185 jmcneill if (sc->sc_intre)
1021 1.185 jmcneill OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
1022 1.185 jmcneill (OHCI_ALL_INTRS | OHCI_MIE));
1023 1.185 jmcneill if (sc->sc_control)
1024 1.185 jmcneill ctl = sc->sc_control;
1025 1.185 jmcneill else
1026 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL);
1027 1.185 jmcneill ctl |= OHCI_HCFS_RESUME;
1028 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1029 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
1030 1.185 jmcneill ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
1031 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1032 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
1033 1.185 jmcneill sc->sc_control = sc->sc_intre = 0;
1034 1.224 mrg
1035 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1036 1.254.2.7 skrll sc->sc_bus.ub_usepolling--;
1037 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1038 1.185 jmcneill
1039 1.185 jmcneill return true;
1040 1.185 jmcneill }
1041 1.185 jmcneill
1042 1.185 jmcneill bool
1043 1.206 dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
1044 1.185 jmcneill {
1045 1.185 jmcneill ohci_softc_t *sc = device_private(dv);
1046 1.185 jmcneill uint32_t ctl;
1047 1.95 augustss
1048 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1049 1.254.2.7 skrll sc->sc_bus.ub_usepolling++;
1050 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1051 1.224 mrg
1052 1.185 jmcneill ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
1053 1.185 jmcneill if (sc->sc_control == 0) {
1054 1.185 jmcneill /*
1055 1.185 jmcneill * Preserve register values, in case that BIOS
1056 1.185 jmcneill * does not recover them.
1057 1.185 jmcneill */
1058 1.185 jmcneill sc->sc_control = ctl;
1059 1.185 jmcneill sc->sc_intre = OREAD4(sc,
1060 1.185 jmcneill OHCI_INTERRUPT_ENABLE);
1061 1.95 augustss }
1062 1.185 jmcneill ctl |= OHCI_HCFS_SUSPEND;
1063 1.185 jmcneill OWRITE4(sc, OHCI_CONTROL, ctl);
1064 1.185 jmcneill usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
1065 1.224 mrg
1066 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1067 1.254.2.7 skrll sc->sc_bus.ub_usepolling--;
1068 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1069 1.185 jmcneill
1070 1.185 jmcneill return true;
1071 1.33 augustss }
1072 1.33 augustss
1073 1.52 augustss #ifdef OHCI_DEBUG
1074 1.1 augustss void
1075 1.91 augustss ohci_dumpregs(ohci_softc_t *sc)
1076 1.1 augustss {
1077 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1078 1.254.2.18 skrll
1079 1.254.2.18 skrll DPRINTF("rev=0x%08x control=0x%08x command=0x%08x",
1080 1.41 augustss OREAD4(sc, OHCI_REVISION),
1081 1.41 augustss OREAD4(sc, OHCI_CONTROL),
1082 1.254.2.18 skrll OREAD4(sc, OHCI_COMMAND_STATUS), 0);
1083 1.254.2.18 skrll DPRINTF(" intrstat=0x%08x intre=0x%08x intrd=0x%08x",
1084 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
1085 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
1086 1.254.2.18 skrll OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0);
1087 1.254.2.18 skrll DPRINTF(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x",
1088 1.41 augustss OREAD4(sc, OHCI_HCCA),
1089 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
1090 1.254.2.18 skrll OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0);
1091 1.254.2.18 skrll DPRINTF(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x",
1092 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
1093 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1094 1.254.2.18 skrll OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0);
1095 1.254.2.18 skrll DPRINTF(" done=0x%08x fmival=0x%08x fmrem=0x%08x",
1096 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1097 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1098 1.254.2.18 skrll OREAD4(sc, OHCI_FM_REMAINING), 0);
1099 1.254.2.18 skrll DPRINTF(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x",
1100 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1101 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1102 1.254.2.18 skrll OREAD4(sc, OHCI_LS_THRESHOLD), 0);
1103 1.254.2.18 skrll DPRINTF(" desca=0x%08x descb=0x%08x stat=0x%08x",
1104 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1105 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1106 1.254.2.18 skrll OREAD4(sc, OHCI_RH_STATUS), 0);
1107 1.254.2.18 skrll DPRINTF(" port1=0x%08x port2=0x%08x",
1108 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1109 1.254.2.18 skrll OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0);
1110 1.254.2.18 skrll DPRINTF(" HCCA: frame_number=0x%04x done_head=0x%08x",
1111 1.168 augustss O32TOH(sc->sc_hcca->hcca_frame_number),
1112 1.254.2.18 skrll O32TOH(sc->sc_hcca->hcca_done_head), 0, 0);
1113 1.1 augustss }
1114 1.1 augustss #endif
1115 1.1 augustss
1116 1.91 augustss Static int ohci_intr1(ohci_softc_t *);
1117 1.53 augustss
1118 1.1 augustss int
1119 1.91 augustss ohci_intr(void *p)
1120 1.1 augustss {
1121 1.1 augustss ohci_softc_t *sc = p;
1122 1.224 mrg int ret = 0;
1123 1.111 augustss
1124 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1125 1.254.2.18 skrll
1126 1.224 mrg if (sc == NULL)
1127 1.254.2.13 skrll return 0;
1128 1.53 augustss
1129 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1130 1.224 mrg
1131 1.224 mrg if (sc->sc_dying || !device_has_power(sc->sc_dev))
1132 1.224 mrg goto done;
1133 1.224 mrg
1134 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
1135 1.254.2.7 skrll if (sc->sc_bus.ub_usepolling) {
1136 1.57 augustss #ifdef DIAGNOSTIC
1137 1.254.2.18 skrll DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0);
1138 1.57 augustss #endif
1139 1.154 joff /* for level triggered intrs, should do something to ack */
1140 1.155 perry OWRITE4(sc, OHCI_INTERRUPT_STATUS,
1141 1.154 joff OREAD4(sc, OHCI_INTERRUPT_STATUS));
1142 1.155 perry
1143 1.224 mrg goto done;
1144 1.57 augustss }
1145 1.53 augustss
1146 1.224 mrg ret = ohci_intr1(sc);
1147 1.224 mrg
1148 1.224 mrg done:
1149 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1150 1.224 mrg return ret;
1151 1.53 augustss }
1152 1.53 augustss
1153 1.82 augustss Static int
1154 1.91 augustss ohci_intr1(ohci_softc_t *sc)
1155 1.53 augustss {
1156 1.254.2.1 skrll uint32_t intrs, eintrs;
1157 1.1 augustss
1158 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1159 1.105 augustss
1160 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1161 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1162 1.15 augustss #ifdef DIAGNOSTIC
1163 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1164 1.15 augustss #endif
1165 1.254.2.13 skrll return 0;
1166 1.15 augustss }
1167 1.15 augustss
1168 1.224 mrg KASSERT(mutex_owned(&sc->sc_intr_lock));
1169 1.224 mrg
1170 1.157 mycroft intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1171 1.1 augustss if (!intrs)
1172 1.254.2.13 skrll return 0;
1173 1.55 augustss
1174 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH)); /* Acknowledge */
1175 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1176 1.254.2.18 skrll DPRINTFN(7, "sc=%p", sc, 0, 0, 0);
1177 1.254.2.18 skrll DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)",
1178 1.254.2.18 skrll intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs,
1179 1.254.2.18 skrll sc->sc_eintrs);
1180 1.211 matt
1181 1.211 matt if (!eintrs) {
1182 1.254.2.13 skrll return 0;
1183 1.211 matt }
1184 1.1 augustss
1185 1.1 augustss if (eintrs & OHCI_SO) {
1186 1.100 augustss sc->sc_overrun_cnt++;
1187 1.100 augustss if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1188 1.100 augustss printf("%s: %u scheduling overruns\n",
1189 1.190 drochner device_xname(sc->sc_dev), sc->sc_overrun_cnt);
1190 1.100 augustss sc->sc_overrun_cnt = 0;
1191 1.100 augustss }
1192 1.1 augustss /* XXX do what */
1193 1.106 augustss eintrs &= ~OHCI_SO;
1194 1.1 augustss }
1195 1.1 augustss if (eintrs & OHCI_WDH) {
1196 1.157 mycroft /*
1197 1.157 mycroft * We block the interrupt below, and reenable it later from
1198 1.157 mycroft * ohci_softintr().
1199 1.157 mycroft */
1200 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1201 1.1 augustss }
1202 1.1 augustss if (eintrs & OHCI_RD) {
1203 1.190 drochner printf("%s: resume detect\n", device_xname(sc->sc_dev));
1204 1.1 augustss /* XXX process resume detect */
1205 1.1 augustss }
1206 1.1 augustss if (eintrs & OHCI_UE) {
1207 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1208 1.190 drochner device_xname(sc->sc_dev));
1209 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1210 1.1 augustss /* XXX what else */
1211 1.1 augustss }
1212 1.1 augustss if (eintrs & OHCI_RHSC) {
1213 1.120 augustss /*
1214 1.157 mycroft * We block the interrupt below, and reenable it later from
1215 1.157 mycroft * a timeout.
1216 1.1 augustss */
1217 1.224 mrg softint_schedule(sc->sc_rhsc_si);
1218 1.1 augustss }
1219 1.1 augustss
1220 1.106 augustss if (eintrs != 0) {
1221 1.157 mycroft /* Block unprocessed interrupts. */
1222 1.106 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
1223 1.106 augustss sc->sc_eintrs &= ~eintrs;
1224 1.254.2.18 skrll DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0);
1225 1.106 augustss }
1226 1.1 augustss
1227 1.254.2.13 skrll return 1;
1228 1.1 augustss }
1229 1.1 augustss
1230 1.1 augustss void
1231 1.104 augustss ohci_rhsc_enable(void *v_sc)
1232 1.104 augustss {
1233 1.104 augustss ohci_softc_t *sc = v_sc;
1234 1.104 augustss
1235 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1236 1.254.2.18 skrll DPRINTF("sc %p", sc, 0, 0, 0);
1237 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1238 1.157 mycroft sc->sc_eintrs |= OHCI_RHSC;
1239 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1240 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1241 1.1 augustss }
1242 1.1 augustss
1243 1.52 augustss #ifdef OHCI_DEBUG
1244 1.166 drochner const char *ohci_cc_strs[] = {
1245 1.13 augustss "NO_ERROR",
1246 1.13 augustss "CRC",
1247 1.13 augustss "BIT_STUFFING",
1248 1.13 augustss "DATA_TOGGLE_MISMATCH",
1249 1.13 augustss "STALL",
1250 1.13 augustss "DEVICE_NOT_RESPONDING",
1251 1.13 augustss "PID_CHECK_FAILURE",
1252 1.13 augustss "UNEXPECTED_PID",
1253 1.13 augustss "DATA_OVERRUN",
1254 1.13 augustss "DATA_UNDERRUN",
1255 1.13 augustss "BUFFER_OVERRUN",
1256 1.13 augustss "BUFFER_UNDERRUN",
1257 1.67 augustss "reserved",
1258 1.67 augustss "reserved",
1259 1.67 augustss "NOT_ACCESSED",
1260 1.13 augustss "NOT_ACCESSED",
1261 1.13 augustss };
1262 1.13 augustss #endif
1263 1.13 augustss
1264 1.1 augustss void
1265 1.157 mycroft ohci_softintr(void *v)
1266 1.83 augustss {
1267 1.190 drochner struct usbd_bus *bus = v;
1268 1.254.2.7 skrll ohci_softc_t *sc = bus->ub_hcpriv;
1269 1.157 mycroft ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1270 1.157 mycroft ohci_soft_td_t *std, *sdone, *stdnext;
1271 1.254.2.19 skrll struct usbd_xfer *xfer;
1272 1.157 mycroft struct ohci_pipe *opipe;
1273 1.224 mrg int len, cc;
1274 1.157 mycroft int i, j, actlen, iframes, uedir;
1275 1.157 mycroft ohci_physaddr_t done;
1276 1.157 mycroft
1277 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1278 1.224 mrg
1279 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1280 1.157 mycroft
1281 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1282 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1283 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1284 1.168 augustss done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
1285 1.157 mycroft sc->sc_hcca->hcca_done_head = 0;
1286 1.195 bouyer usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
1287 1.195 bouyer sizeof(sc->sc_hcca->hcca_done_head),
1288 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1289 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
1290 1.157 mycroft sc->sc_eintrs |= OHCI_WDH;
1291 1.157 mycroft OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
1292 1.83 augustss
1293 1.83 augustss /* Reverse the done list. */
1294 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1295 1.83 augustss std = ohci_hash_find_td(sc, done);
1296 1.83 augustss if (std != NULL) {
1297 1.195 bouyer usb_syncmem(&std->dma, std->offs, sizeof(std->td),
1298 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1299 1.83 augustss std->dnext = sdone;
1300 1.168 augustss done = O32TOH(std->td.td_nexttd);
1301 1.83 augustss sdone = std;
1302 1.254.2.18 skrll DPRINTFN(10, "add TD %p", std, 0, 0, 0);
1303 1.83 augustss continue;
1304 1.83 augustss }
1305 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1306 1.83 augustss if (sitd != NULL) {
1307 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
1308 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1309 1.83 augustss sitd->dnext = sidone;
1310 1.168 augustss done = O32TOH(sitd->itd.itd_nextitd);
1311 1.83 augustss sidone = sitd;
1312 1.254.2.18 skrll DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0);
1313 1.83 augustss continue;
1314 1.83 augustss }
1315 1.218 jmcneill device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
1316 1.218 jmcneill (u_long)done);
1317 1.218 jmcneill break;
1318 1.83 augustss }
1319 1.83 augustss
1320 1.254.2.18 skrll DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0);
1321 1.254.2.18 skrll DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0);
1322 1.52 augustss #ifdef OHCI_DEBUG
1323 1.1 augustss if (ohcidebug > 10) {
1324 1.234 skrll for (std = sdone; std; std = std->dnext)
1325 1.254.2.1 skrll ohci_dump_td(sc, std);
1326 1.1 augustss }
1327 1.1 augustss #endif
1328 1.254.2.18 skrll DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0);
1329 1.1 augustss
1330 1.48 augustss for (std = sdone; std; std = stdnext) {
1331 1.53 augustss xfer = std->xfer;
1332 1.48 augustss stdnext = std->dnext;
1333 1.254.2.18 skrll DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer,
1334 1.254.2.18 skrll xfer ? xfer->ux_hcpriv : 0, 0);
1335 1.71 augustss if (xfer == NULL) {
1336 1.117 augustss /*
1337 1.117 augustss * xfer == NULL: There seems to be no xfer associated
1338 1.71 augustss * with this TD. It is tailp that happened to end up on
1339 1.71 augustss * the done queue.
1340 1.117 augustss * Shouldn't happen, but some chips are broken(?).
1341 1.71 augustss */
1342 1.71 augustss continue;
1343 1.71 augustss }
1344 1.254.2.7 skrll if (xfer->ux_status == USBD_CANCELLED ||
1345 1.254.2.7 skrll xfer->ux_status == USBD_TIMEOUT) {
1346 1.254.2.18 skrll DPRINTF("cancel/timeout %p", xfer, 0, 0, 0);
1347 1.38 augustss /* Handled by abort routine. */
1348 1.83 augustss continue;
1349 1.83 augustss }
1350 1.254.2.7 skrll callout_stop(&xfer->ux_callout);
1351 1.141 mycroft
1352 1.141 mycroft len = std->len;
1353 1.141 mycroft if (std->td.td_cbp != 0)
1354 1.168 augustss len -= O32TOH(std->td.td_be) -
1355 1.168 augustss O32TOH(std->td.td_cbp) + 1;
1356 1.254.2.18 skrll DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0);
1357 1.141 mycroft if (std->flags & OHCI_ADD_LEN)
1358 1.254.2.7 skrll xfer->ux_actlen += len;
1359 1.141 mycroft
1360 1.168 augustss cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
1361 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1362 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1363 1.254.2.7 skrll xfer->ux_status = USBD_NORMAL_COMPLETION;
1364 1.53 augustss usb_transfer_complete(xfer);
1365 1.21 augustss }
1366 1.48 augustss ohci_free_std(sc, std);
1367 1.1 augustss } else {
1368 1.48 augustss /*
1369 1.48 augustss * Endpoint is halted. First unlink all the TDs
1370 1.48 augustss * belonging to the failed transfer, and then restart
1371 1.48 augustss * the endpoint.
1372 1.48 augustss */
1373 1.1 augustss ohci_soft_td_t *p, *n;
1374 1.254.2.7 skrll opipe = (struct ohci_pipe *)xfer->ux_pipe;
1375 1.48 augustss
1376 1.254.2.18 skrll DPRINTFN(15, "error cc=%d",
1377 1.254.2.18 skrll OHCI_TD_GET_CC(O32TOH(std->td.td_flags)), 0, 0, 0);
1378 1.48 augustss
1379 1.48 augustss /* remove TDs */
1380 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1381 1.1 augustss n = p->nexttd;
1382 1.1 augustss ohci_free_std(sc, p);
1383 1.1 augustss }
1384 1.48 augustss
1385 1.16 augustss /* clear halt */
1386 1.168 augustss opipe->sed->ed.ed_headp = HTOO32(p->physaddr);
1387 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1388 1.48 augustss
1389 1.1 augustss if (cc == OHCI_CC_STALL)
1390 1.254.2.7 skrll xfer->ux_status = USBD_STALLED;
1391 1.1 augustss else
1392 1.254.2.7 skrll xfer->ux_status = USBD_IOERROR;
1393 1.53 augustss usb_transfer_complete(xfer);
1394 1.1 augustss }
1395 1.1 augustss }
1396 1.254.2.18 skrll DPRINTFN(10, "--- dump start ---", 0, 0, 0, 0);
1397 1.83 augustss #ifdef OHCI_DEBUG
1398 1.83 augustss if (ohcidebug > 10) {
1399 1.254.2.18 skrll DPRINTFN(10, "ITD done", 0, 0, 0, 0);
1400 1.234 skrll for (sitd = sidone; sitd; sitd = sitd->dnext)
1401 1.254.2.1 skrll ohci_dump_itd(sc, sitd);
1402 1.83 augustss }
1403 1.83 augustss #endif
1404 1.254.2.18 skrll DPRINTFN(10, "--- dump end ---", 0, 0, 0, 0);
1405 1.83 augustss
1406 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1407 1.83 augustss xfer = sitd->xfer;
1408 1.83 augustss sitdnext = sitd->dnext;
1409 1.254.2.18 skrll DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer,
1410 1.254.2.18 skrll xfer ? xfer->ux_hcpriv : 0, 0);
1411 1.83 augustss if (xfer == NULL)
1412 1.83 augustss continue;
1413 1.254.2.7 skrll if (xfer->ux_status == USBD_CANCELLED ||
1414 1.254.2.7 skrll xfer->ux_status == USBD_TIMEOUT) {
1415 1.254.2.18 skrll DPRINTF("cancel/timeout %p", xfer, 0, 0, 0);
1416 1.83 augustss /* Handled by abort routine. */
1417 1.83 augustss continue;
1418 1.83 augustss }
1419 1.83 augustss #ifdef DIAGNOSTIC
1420 1.83 augustss if (sitd->isdone)
1421 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1422 1.83 augustss sitd->isdone = 1;
1423 1.83 augustss #endif
1424 1.134 toshii if (sitd->flags & OHCI_CALL_DONE) {
1425 1.134 toshii ohci_soft_itd_t *next;
1426 1.134 toshii
1427 1.254.2.7 skrll opipe = (struct ohci_pipe *)xfer->ux_pipe;
1428 1.254.2.7 skrll opipe->u.iso.inuse -= xfer->ux_nframes;
1429 1.254.2.7 skrll uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->
1430 1.134 toshii bEndpointAddress);
1431 1.254.2.7 skrll xfer->ux_status = USBD_NORMAL_COMPLETION;
1432 1.134 toshii actlen = 0;
1433 1.254.2.7 skrll for (i = 0, sitd = xfer->ux_hcpriv;;
1434 1.134 toshii sitd = next) {
1435 1.134 toshii next = sitd->nextitd;
1436 1.168 augustss if (OHCI_ITD_GET_CC(O32TOH(sitd->
1437 1.135 toshii itd.itd_flags)) != OHCI_CC_NO_ERROR)
1438 1.254.2.7 skrll xfer->ux_status = USBD_IOERROR;
1439 1.134 toshii /* For input, update frlengths with actual */
1440 1.134 toshii /* XXX anything necessary for output? */
1441 1.134 toshii if (uedir == UE_DIR_IN &&
1442 1.254.2.7 skrll xfer->ux_status == USBD_NORMAL_COMPLETION) {
1443 1.168 augustss iframes = OHCI_ITD_GET_FC(O32TOH(
1444 1.135 toshii sitd->itd.itd_flags));
1445 1.134 toshii for (j = 0; j < iframes; i++, j++) {
1446 1.168 augustss len = O16TOH(sitd->
1447 1.134 toshii itd.itd_offset[j]);
1448 1.158 toshii if ((OHCI_ITD_PSW_GET_CC(len) &
1449 1.158 toshii OHCI_CC_NOT_ACCESSED_MASK)
1450 1.158 toshii == OHCI_CC_NOT_ACCESSED)
1451 1.158 toshii len = 0;
1452 1.158 toshii else
1453 1.158 toshii len = OHCI_ITD_PSW_LENGTH(len);
1454 1.254.2.7 skrll xfer->ux_frlengths[i] = len;
1455 1.134 toshii actlen += len;
1456 1.134 toshii }
1457 1.134 toshii }
1458 1.134 toshii if (sitd->flags & OHCI_CALL_DONE)
1459 1.134 toshii break;
1460 1.134 toshii ohci_free_sitd(sc, sitd);
1461 1.83 augustss }
1462 1.134 toshii ohci_free_sitd(sc, sitd);
1463 1.134 toshii if (uedir == UE_DIR_IN &&
1464 1.254.2.7 skrll xfer->ux_status == USBD_NORMAL_COMPLETION)
1465 1.254.2.7 skrll xfer->ux_actlen = actlen;
1466 1.254.2.7 skrll xfer->ux_hcpriv = NULL;
1467 1.134 toshii
1468 1.83 augustss usb_transfer_complete(xfer);
1469 1.83 augustss }
1470 1.83 augustss }
1471 1.83 augustss
1472 1.119 augustss if (sc->sc_softwake) {
1473 1.119 augustss sc->sc_softwake = 0;
1474 1.224 mrg cv_broadcast(&sc->sc_softwake_cv);
1475 1.119 augustss }
1476 1.119 augustss
1477 1.254.2.18 skrll DPRINTFN(10, "done", 0, 0, 0, 0);
1478 1.1 augustss }
1479 1.1 augustss
1480 1.1 augustss void
1481 1.254.2.19 skrll ohci_device_ctrl_done(struct usbd_xfer *xfer)
1482 1.1 augustss {
1483 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
1484 1.224 mrg #ifdef DIAGNOSTIC
1485 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
1486 1.224 mrg #endif
1487 1.254.2.7 skrll int len = UGETW(xfer->ux_request.wLength);
1488 1.254.2.7 skrll int isread = (xfer->ux_request.bmRequestType & UT_READ);
1489 1.195 bouyer
1490 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1491 1.254.2.18 skrll DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0);
1492 1.1 augustss
1493 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1494 1.224 mrg
1495 1.38 augustss #ifdef DIAGNOSTIC
1496 1.254.2.7 skrll if (!(xfer->ux_rqflags & URQ_REQUEST)) {
1497 1.140 gson panic("ohci_device_ctrl_done: not a request");
1498 1.1 augustss }
1499 1.38 augustss #endif
1500 1.195 bouyer if (len)
1501 1.254.2.7 skrll usb_syncmem(&xfer->ux_dmabuf, 0, len,
1502 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1503 1.195 bouyer usb_syncmem(&opipe->u.ctl.reqdma, 0,
1504 1.195 bouyer sizeof(usb_device_request_t), BUS_DMASYNC_POSTWRITE);
1505 1.1 augustss }
1506 1.1 augustss
1507 1.1 augustss void
1508 1.254.2.19 skrll ohci_device_intr_done(struct usbd_xfer *xfer)
1509 1.1 augustss {
1510 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
1511 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
1512 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1513 1.48 augustss ohci_soft_td_t *data, *tail;
1514 1.195 bouyer int isread =
1515 1.254.2.7 skrll (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
1516 1.1 augustss
1517 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1518 1.254.2.18 skrll DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0);
1519 1.1 augustss
1520 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1521 1.224 mrg
1522 1.254.2.7 skrll usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
1523 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1524 1.254.2.7 skrll if (xfer->ux_pipe->up_repeat) {
1525 1.60 augustss data = opipe->tail.td;
1526 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1527 1.53 augustss if (tail == NULL) {
1528 1.254.2.7 skrll xfer->ux_status = USBD_NOMEM;
1529 1.1 augustss return;
1530 1.1 augustss }
1531 1.55 augustss tail->xfer = NULL;
1532 1.120 augustss
1533 1.168 augustss data->td.td_flags = HTOO32(
1534 1.120 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1535 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1536 1.254.2.7 skrll if (xfer->ux_flags & USBD_SHORT_XFER_OK)
1537 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
1538 1.254.2.7 skrll data->td.td_cbp = HTOO32(DMAADDR(&xfer->ux_dmabuf, 0));
1539 1.48 augustss data->nexttd = tail;
1540 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
1541 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) +
1542 1.254.2.7 skrll xfer->ux_length - 1);
1543 1.254.2.7 skrll data->len = xfer->ux_length;
1544 1.53 augustss data->xfer = xfer;
1545 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1546 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
1547 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1548 1.254.2.7 skrll xfer->ux_hcpriv = data;
1549 1.254.2.7 skrll xfer->ux_actlen = 0;
1550 1.1 augustss
1551 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1552 1.195 bouyer usb_syncmem(&sed->dma,
1553 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1554 1.195 bouyer sizeof(sed->ed.ed_tailp),
1555 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1556 1.60 augustss opipe->tail.td = tail;
1557 1.1 augustss }
1558 1.1 augustss }
1559 1.1 augustss
1560 1.1 augustss void
1561 1.254.2.19 skrll ohci_device_bulk_done(struct usbd_xfer *xfer)
1562 1.3 augustss {
1563 1.224 mrg #ifdef DIAGNOSTIC
1564 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
1565 1.224 mrg #endif
1566 1.195 bouyer int isread =
1567 1.254.2.7 skrll (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
1568 1.195 bouyer
1569 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1570 1.224 mrg
1571 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1572 1.254.2.18 skrll DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0);
1573 1.254.2.7 skrll usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
1574 1.195 bouyer isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1575 1.3 augustss }
1576 1.3 augustss
1577 1.224 mrg Static void
1578 1.224 mrg ohci_rhsc_softint(void *arg)
1579 1.224 mrg {
1580 1.224 mrg ohci_softc_t *sc = arg;
1581 1.224 mrg
1582 1.224 mrg mutex_enter(&sc->sc_lock);
1583 1.224 mrg
1584 1.224 mrg ohci_rhsc(sc, sc->sc_intrxfer);
1585 1.224 mrg
1586 1.224 mrg /* Do not allow RHSC interrupts > 1 per second */
1587 1.224 mrg callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
1588 1.224 mrg
1589 1.224 mrg mutex_exit(&sc->sc_lock);
1590 1.224 mrg }
1591 1.224 mrg
1592 1.3 augustss void
1593 1.254.2.19 skrll ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer)
1594 1.1 augustss {
1595 1.1 augustss u_char *p;
1596 1.1 augustss int i, m;
1597 1.243 martin int hstatus __unused;
1598 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1599 1.1 augustss
1600 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1601 1.224 mrg
1602 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1603 1.254.2.18 skrll DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0);
1604 1.1 augustss
1605 1.53 augustss if (xfer == NULL) {
1606 1.1 augustss /* Just ignore the change. */
1607 1.1 augustss return;
1608 1.1 augustss }
1609 1.1 augustss
1610 1.254.2.7 skrll p = xfer->ux_buf;
1611 1.254.2.7 skrll m = min(sc->sc_noport, xfer->ux_length * 8 - 1);
1612 1.254.2.7 skrll memset(p, 0, xfer->ux_length);
1613 1.1 augustss for (i = 1; i <= m; i++) {
1614 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1615 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1616 1.1 augustss p[i/8] |= 1 << (i%8);
1617 1.1 augustss }
1618 1.254.2.18 skrll DPRINTF("change=0x%02x", *p, 0, 0, 0);
1619 1.254.2.7 skrll xfer->ux_actlen = xfer->ux_length;
1620 1.254.2.7 skrll xfer->ux_status = USBD_NORMAL_COMPLETION;
1621 1.1 augustss
1622 1.53 augustss usb_transfer_complete(xfer);
1623 1.38 augustss }
1624 1.38 augustss
1625 1.38 augustss void
1626 1.254.2.19 skrll ohci_root_intr_done(struct usbd_xfer *xfer)
1627 1.65 augustss {
1628 1.65 augustss }
1629 1.65 augustss
1630 1.1 augustss /*
1631 1.1 augustss * Wait here until controller claims to have an interrupt.
1632 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1633 1.1 augustss * too long.
1634 1.1 augustss */
1635 1.1 augustss void
1636 1.254.2.19 skrll ohci_waitintr(ohci_softc_t *sc, struct usbd_xfer *xfer)
1637 1.1 augustss {
1638 1.163 augustss int timo;
1639 1.254.2.1 skrll uint32_t intrs;
1640 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1641 1.1 augustss
1642 1.224 mrg mutex_enter(&sc->sc_lock);
1643 1.224 mrg
1644 1.254.2.7 skrll xfer->ux_status = USBD_IN_PROGRESS;
1645 1.254.2.7 skrll for (timo = xfer->ux_timeout; timo >= 0; timo--) {
1646 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1647 1.116 augustss if (sc->sc_dying)
1648 1.116 augustss break;
1649 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1650 1.254.2.18 skrll DPRINTFN(15, "intrs 0x%04x", intrs, 0, 0, 0);
1651 1.52 augustss #ifdef OHCI_DEBUG
1652 1.1 augustss if (ohcidebug > 15)
1653 1.1 augustss ohci_dumpregs(sc);
1654 1.1 augustss #endif
1655 1.1 augustss if (intrs) {
1656 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1657 1.53 augustss ohci_intr1(sc);
1658 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1659 1.254.2.7 skrll if (xfer->ux_status != USBD_IN_PROGRESS)
1660 1.230 jmcneill goto done;
1661 1.1 augustss }
1662 1.1 augustss }
1663 1.15 augustss
1664 1.15 augustss /* Timeout */
1665 1.254.2.18 skrll DPRINTF("timeout", 0, 0, 0, 0);
1666 1.254.2.7 skrll xfer->ux_status = USBD_TIMEOUT;
1667 1.53 augustss usb_transfer_complete(xfer);
1668 1.224 mrg
1669 1.15 augustss /* XXX should free TD */
1670 1.224 mrg
1671 1.230 jmcneill done:
1672 1.224 mrg mutex_exit(&sc->sc_lock);
1673 1.5 augustss }
1674 1.5 augustss
1675 1.5 augustss void
1676 1.91 augustss ohci_poll(struct usbd_bus *bus)
1677 1.5 augustss {
1678 1.254.2.7 skrll ohci_softc_t *sc = bus->ub_hcpriv;
1679 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1680 1.254.2.18 skrll
1681 1.105 augustss #ifdef OHCI_DEBUG
1682 1.105 augustss static int last;
1683 1.105 augustss int new;
1684 1.105 augustss new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1685 1.105 augustss if (new != last) {
1686 1.254.2.18 skrll DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0);
1687 1.105 augustss last = new;
1688 1.105 augustss }
1689 1.105 augustss #endif
1690 1.217 jmcneill sc->sc_eintrs |= OHCI_WDH;
1691 1.224 mrg if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
1692 1.224 mrg mutex_spin_enter(&sc->sc_intr_lock);
1693 1.53 augustss ohci_intr1(sc);
1694 1.224 mrg mutex_spin_exit(&sc->sc_intr_lock);
1695 1.224 mrg }
1696 1.1 augustss }
1697 1.1 augustss
1698 1.1 augustss usbd_status
1699 1.254.2.19 skrll ohci_device_request(struct usbd_xfer *xfer)
1700 1.1 augustss {
1701 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
1702 1.254.2.7 skrll usb_device_request_t *req = &xfer->ux_request;
1703 1.254.2.19 skrll struct usbd_device *dev = opipe->pipe.up_dev;
1704 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
1705 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1706 1.1 augustss ohci_soft_ed_t *sed;
1707 1.1 augustss int isread;
1708 1.1 augustss int len;
1709 1.53 augustss usbd_status err;
1710 1.224 mrg
1711 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1712 1.254.2.18 skrll
1713 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1714 1.1 augustss
1715 1.1 augustss isread = req->bmRequestType & UT_READ;
1716 1.1 augustss len = UGETW(req->wLength);
1717 1.1 augustss
1718 1.254.2.18 skrll DPRINTF("type=0x%02x, request=0x%02x, "
1719 1.254.2.18 skrll "wValue=0x%04x, wIndex=0x%04x",
1720 1.254.2.18 skrll req->bmRequestType, req->bRequest, UGETW(req->wValue),
1721 1.254.2.18 skrll UGETW(req->wIndex));
1722 1.254.2.18 skrll DPRINTF("len=%d, addr=%d, endpt=%d",
1723 1.254.2.18 skrll len, dev->ud_addr,
1724 1.254.2.18 skrll opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress, 0);
1725 1.1 augustss
1726 1.60 augustss setup = opipe->tail.td;
1727 1.1 augustss stat = ohci_alloc_std(sc);
1728 1.53 augustss if (stat == NULL) {
1729 1.53 augustss err = USBD_NOMEM;
1730 1.1 augustss goto bad1;
1731 1.1 augustss }
1732 1.1 augustss tail = ohci_alloc_std(sc);
1733 1.53 augustss if (tail == NULL) {
1734 1.53 augustss err = USBD_NOMEM;
1735 1.1 augustss goto bad2;
1736 1.1 augustss }
1737 1.55 augustss tail->xfer = NULL;
1738 1.1 augustss
1739 1.1 augustss sed = opipe->sed;
1740 1.1 augustss opipe->u.ctl.length = len;
1741 1.1 augustss
1742 1.254.2.7 skrll KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr,
1743 1.250 skrll "address ED %d pipe %d\n",
1744 1.254.2.7 skrll OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr);
1745 1.254.2.2 skrll KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) ==
1746 1.254.2.7 skrll UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize),
1747 1.250 skrll "MPL ED %d pipe %d\n",
1748 1.250 skrll OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)),
1749 1.254.2.7 skrll UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize));
1750 1.1 augustss
1751 1.77 augustss next = stat;
1752 1.77 augustss
1753 1.1 augustss /* Set up data transaction */
1754 1.1 augustss if (len != 0) {
1755 1.77 augustss ohci_soft_td_t *std = stat;
1756 1.77 augustss
1757 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1758 1.77 augustss std, &stat);
1759 1.236 skrll if (err) {
1760 1.236 skrll /* stat is unchanged if error */
1761 1.236 skrll goto bad3;
1762 1.236 skrll }
1763 1.77 augustss stat = stat->nexttd; /* point at free TD */
1764 1.236 skrll
1765 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1766 1.168 augustss std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
1767 1.168 augustss std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
1768 1.195 bouyer usb_syncmem(&std->dma,
1769 1.195 bouyer std->offs + offsetof(ohci_td_t, td_flags),
1770 1.195 bouyer sizeof(std->td.td_flags),
1771 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1772 1.34 augustss }
1773 1.1 augustss
1774 1.254.2.16 skrll memcpy(KERNADDR(&opipe->u.ctl.reqdma, 0), req, sizeof(*req));
1775 1.254.2.16 skrll usb_syncmem(&opipe->u.ctl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE);
1776 1.1 augustss
1777 1.168 augustss setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1778 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1779 1.168 augustss setup->td.td_cbp = HTOO32(DMAADDR(&opipe->u.ctl.reqdma, 0));
1780 1.1 augustss setup->nexttd = next;
1781 1.168 augustss setup->td.td_nexttd = HTOO32(next->physaddr);
1782 1.254.2.16 skrll setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1);
1783 1.77 augustss setup->len = 0;
1784 1.53 augustss setup->xfer = xfer;
1785 1.34 augustss setup->flags = 0;
1786 1.254.2.7 skrll xfer->ux_hcpriv = setup;
1787 1.195 bouyer usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
1788 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1789 1.1 augustss
1790 1.168 augustss stat->td.td_flags = HTOO32(
1791 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1792 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1793 1.39 augustss stat->td.td_cbp = 0;
1794 1.1 augustss stat->nexttd = tail;
1795 1.168 augustss stat->td.td_nexttd = HTOO32(tail->physaddr);
1796 1.39 augustss stat->td.td_be = 0;
1797 1.77 augustss stat->flags = OHCI_CALL_DONE;
1798 1.1 augustss stat->len = 0;
1799 1.53 augustss stat->xfer = xfer;
1800 1.195 bouyer usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
1801 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1802 1.1 augustss
1803 1.52 augustss #ifdef OHCI_DEBUG
1804 1.254.2.18 skrll USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
1805 1.1 augustss if (ohcidebug > 5) {
1806 1.168 augustss ohci_dump_ed(sc, sed);
1807 1.168 augustss ohci_dump_tds(sc, setup);
1808 1.1 augustss }
1809 1.254.2.18 skrll USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
1810 1.1 augustss #endif
1811 1.1 augustss
1812 1.1 augustss /* Insert ED in schedule */
1813 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
1814 1.195 bouyer usb_syncmem(&sed->dma,
1815 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_tailp),
1816 1.195 bouyer sizeof(sed->ed.ed_tailp),
1817 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1818 1.60 augustss opipe->tail.td = tail;
1819 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1820 1.254.2.7 skrll if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
1821 1.254.2.7 skrll callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
1822 1.80 augustss ohci_timeout, xfer);
1823 1.15 augustss }
1824 1.1 augustss
1825 1.115 itojun #ifdef OHCI_DEBUG
1826 1.254.2.18 skrll DPRINTFN(20, "--- dump start ---", 0, 0, 0, 0);
1827 1.113 augustss if (ohcidebug > 20) {
1828 1.77 augustss delay(10000);
1829 1.254.2.18 skrll DPRINTFN(20, "status=%x", OREAD4(sc, OHCI_COMMAND_STATUS),
1830 1.254.2.18 skrll 0, 0, 0);
1831 1.113 augustss ohci_dumpregs(sc);
1832 1.254.2.18 skrll DPRINTFN(20, "ctrl head:", 0, 0, 0, 0);
1833 1.168 augustss ohci_dump_ed(sc, sc->sc_ctrl_head);
1834 1.254.2.18 skrll DPRINTF("sed:", 0, 0, 0, 0);
1835 1.168 augustss ohci_dump_ed(sc, sed);
1836 1.168 augustss ohci_dump_tds(sc, setup);
1837 1.1 augustss }
1838 1.254.2.18 skrll DPRINTFN(20, "--- dump start ---", 0, 0, 0, 0);
1839 1.1 augustss #endif
1840 1.1 augustss
1841 1.254.2.13 skrll return USBD_NORMAL_COMPLETION;
1842 1.1 augustss
1843 1.1 augustss bad3:
1844 1.1 augustss ohci_free_std(sc, tail);
1845 1.1 augustss bad2:
1846 1.1 augustss ohci_free_std(sc, stat);
1847 1.1 augustss bad1:
1848 1.254.2.13 skrll return err;
1849 1.1 augustss }
1850 1.1 augustss
1851 1.1 augustss /*
1852 1.224 mrg * Add an ED to the schedule. Called with USB lock held.
1853 1.1 augustss */
1854 1.224 mrg Static void
1855 1.168 augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1856 1.1 augustss {
1857 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1858 1.254.2.18 skrll DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0);
1859 1.113 augustss
1860 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1861 1.224 mrg
1862 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1863 1.195 bouyer sizeof(head->ed.ed_nexted),
1864 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1865 1.1 augustss sed->next = head->next;
1866 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1867 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1868 1.195 bouyer sizeof(sed->ed.ed_nexted),
1869 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1870 1.1 augustss head->next = sed;
1871 1.168 augustss head->ed.ed_nexted = HTOO32(sed->physaddr);
1872 1.195 bouyer usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
1873 1.195 bouyer sizeof(head->ed.ed_nexted),
1874 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1875 1.1 augustss }
1876 1.1 augustss
1877 1.1 augustss /*
1878 1.224 mrg * Remove an ED from the schedule. Called with USB lock held.
1879 1.3 augustss */
1880 1.224 mrg Static void
1881 1.224 mrg ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1882 1.3 augustss {
1883 1.120 augustss ohci_soft_ed_t *p;
1884 1.3 augustss
1885 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1886 1.224 mrg
1887 1.3 augustss /* XXX */
1888 1.133 toshii for (p = head; p != NULL && p->next != sed; p = p->next)
1889 1.3 augustss ;
1890 1.254.2.20 skrll KASSERT(p != NULL);
1891 1.254.2.20 skrll
1892 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
1893 1.195 bouyer sizeof(sed->ed.ed_nexted),
1894 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
1895 1.3 augustss p->next = sed->next;
1896 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1897 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
1898 1.195 bouyer sizeof(p->ed.ed_nexted),
1899 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1900 1.3 augustss }
1901 1.3 augustss
1902 1.3 augustss /*
1903 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1904 1.1 augustss * the host controller. This queue is the processed by software.
1905 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1906 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1907 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1908 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1909 1.1 augustss * hash value.
1910 1.1 augustss */
1911 1.1 augustss
1912 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1913 1.224 mrg /* Called with USB lock held. */
1914 1.1 augustss void
1915 1.91 augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1916 1.1 augustss {
1917 1.1 augustss int h = HASH(std->physaddr);
1918 1.1 augustss
1919 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1920 1.224 mrg
1921 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1922 1.1 augustss }
1923 1.1 augustss
1924 1.224 mrg /* Called with USB lock held. */
1925 1.1 augustss void
1926 1.179 christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1927 1.1 augustss {
1928 1.46 augustss
1929 1.254.2.7 skrll KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
1930 1.224 mrg
1931 1.1 augustss LIST_REMOVE(std, hnext);
1932 1.1 augustss }
1933 1.1 augustss
1934 1.1 augustss ohci_soft_td_t *
1935 1.91 augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1936 1.1 augustss {
1937 1.1 augustss int h = HASH(a);
1938 1.1 augustss ohci_soft_td_t *std;
1939 1.1 augustss
1940 1.120 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1941 1.53 augustss std != NULL;
1942 1.1 augustss std = LIST_NEXT(std, hnext))
1943 1.1 augustss if (std->physaddr == a)
1944 1.254.2.13 skrll return std;
1945 1.254.2.13 skrll return NULL;
1946 1.83 augustss }
1947 1.83 augustss
1948 1.224 mrg /* Called with USB lock held. */
1949 1.83 augustss void
1950 1.91 augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1951 1.83 augustss {
1952 1.83 augustss int h = HASH(sitd->physaddr);
1953 1.83 augustss
1954 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1955 1.254.2.18 skrll
1956 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1957 1.224 mrg
1958 1.254.2.18 skrll DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr,
1959 1.254.2.18 skrll 0, 0);
1960 1.83 augustss
1961 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1962 1.83 augustss }
1963 1.83 augustss
1964 1.224 mrg /* Called with USB lock held. */
1965 1.83 augustss void
1966 1.179 christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1967 1.83 augustss {
1968 1.83 augustss
1969 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
1970 1.254.2.18 skrll
1971 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
1972 1.224 mrg
1973 1.254.2.18 skrll DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr,
1974 1.254.2.18 skrll 0, 0);
1975 1.83 augustss
1976 1.83 augustss LIST_REMOVE(sitd, hnext);
1977 1.83 augustss }
1978 1.83 augustss
1979 1.83 augustss ohci_soft_itd_t *
1980 1.91 augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1981 1.83 augustss {
1982 1.83 augustss int h = HASH(a);
1983 1.83 augustss ohci_soft_itd_t *sitd;
1984 1.83 augustss
1985 1.120 augustss for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1986 1.83 augustss sitd != NULL;
1987 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1988 1.83 augustss if (sitd->physaddr == a)
1989 1.254.2.13 skrll return sitd;
1990 1.254.2.13 skrll return NULL;
1991 1.1 augustss }
1992 1.1 augustss
1993 1.1 augustss void
1994 1.91 augustss ohci_timeout(void *addr)
1995 1.1 augustss {
1996 1.114 augustss struct ohci_xfer *oxfer = addr;
1997 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)oxfer->xfer.ux_pipe;
1998 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
1999 1.114 augustss
2000 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2001 1.254.2.18 skrll DPRINTF("oxfer=%p", oxfer, 0, 0, 0);
2002 1.114 augustss
2003 1.116 augustss if (sc->sc_dying) {
2004 1.224 mrg mutex_enter(&sc->sc_lock);
2005 1.116 augustss ohci_abort_xfer(&oxfer->xfer, USBD_TIMEOUT);
2006 1.224 mrg mutex_exit(&sc->sc_lock);
2007 1.116 augustss return;
2008 1.116 augustss }
2009 1.116 augustss
2010 1.114 augustss /* Execute the abort in a process context. */
2011 1.231 jmcneill usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr,
2012 1.231 jmcneill USB_TASKQ_MPSAFE);
2013 1.254.2.7 skrll usb_add_task(oxfer->xfer.ux_pipe->up_dev, &oxfer->abort_task,
2014 1.178 joerg USB_TASKQ_HC);
2015 1.114 augustss }
2016 1.114 augustss
2017 1.114 augustss void
2018 1.114 augustss ohci_timeout_task(void *addr)
2019 1.114 augustss {
2020 1.254.2.19 skrll struct usbd_xfer *xfer = addr;
2021 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2022 1.1 augustss
2023 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2024 1.254.2.18 skrll
2025 1.254.2.18 skrll DPRINTF("xfer=%p", xfer, 0, 0, 0);
2026 1.45 augustss
2027 1.224 mrg mutex_enter(&sc->sc_lock);
2028 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
2029 1.224 mrg mutex_exit(&sc->sc_lock);
2030 1.1 augustss }
2031 1.1 augustss
2032 1.52 augustss #ifdef OHCI_DEBUG
2033 1.1 augustss void
2034 1.168 augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
2035 1.1 augustss {
2036 1.1 augustss for (; std; std = std->nexttd)
2037 1.168 augustss ohci_dump_td(sc, std);
2038 1.1 augustss }
2039 1.1 augustss
2040 1.1 augustss void
2041 1.168 augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
2042 1.1 augustss {
2043 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2044 1.92 tv
2045 1.204 martin usb_syncmem(&std->dma, std->offs, sizeof(std->td),
2046 1.204 martin BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2047 1.254.2.18 skrll
2048 1.254.2.18 skrll uint32_t flags = O32TOH(std->td.td_flags);
2049 1.254.2.18 skrll DPRINTF("TD(%p) at %08lx:", std, (u_long)std->physaddr, 0, 0);
2050 1.254.2.18 skrll DPRINTF(" round=%d DP=%x DI=%x T=%x",
2051 1.254.2.18 skrll !!(flags & OHCI_TD_R),
2052 1.254.2.18 skrll __SHIFTOUT(flags, OHCI_TD_DP_MASK),
2053 1.254.2.18 skrll OHCI_TD_GET_DI(flags),
2054 1.254.2.18 skrll __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK));
2055 1.254.2.18 skrll DPRINTF(" EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags),
2056 1.254.2.18 skrll 0, 0);
2057 1.254.2.18 skrll DPRINTF(" cbp=0x%08lx nexttd=0x%08lx be=0x%08lx",
2058 1.168 augustss (u_long)O32TOH(std->td.td_cbp),
2059 1.168 augustss (u_long)O32TOH(std->td.td_nexttd),
2060 1.254.2.18 skrll (u_long)O32TOH(std->td.td_be), 0);
2061 1.1 augustss }
2062 1.1 augustss
2063 1.1 augustss void
2064 1.168 augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2065 1.83 augustss {
2066 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2067 1.83 augustss
2068 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
2069 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2070 1.254.2.18 skrll
2071 1.254.2.18 skrll uint32_t flags = O32TOH(sitd->itd.itd_flags);
2072 1.254.2.18 skrll DPRINTF("ITD(%p) at %08lx", sitd, (u_long)sitd->physaddr, 0, 0);
2073 1.254.2.18 skrll DPRINTF(" sf=%d di=%d fc=%d cc=%d",
2074 1.254.2.18 skrll OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags),
2075 1.254.2.18 skrll OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags));
2076 1.254.2.18 skrll DPRINTF(" bp0=0x%08x next=0x%08x be=0x%08x",
2077 1.254.2.18 skrll O32TOH(sitd->itd.itd_bp0),
2078 1.254.2.18 skrll O32TOH(sitd->itd.itd_nextitd),
2079 1.254.2.18 skrll O32TOH(sitd->itd.itd_be), 0);
2080 1.254.2.18 skrll CTASSERT(OHCI_ITD_NOFFSET == 8);
2081 1.254.2.18 skrll DPRINTF(" offs[0] = 0x%04x offs[1] = 0x%04x "
2082 1.254.2.18 skrll "offs[2] = 0x%04x offs[3] = 0x%04x",
2083 1.254.2.18 skrll O16TOH(sitd->itd.itd_offset[0]),
2084 1.254.2.18 skrll O16TOH(sitd->itd.itd_offset[1]),
2085 1.254.2.18 skrll O16TOH(sitd->itd.itd_offset[2]),
2086 1.254.2.18 skrll O16TOH(sitd->itd.itd_offset[3]));
2087 1.254.2.18 skrll DPRINTF(" offs[4] = 0x%04x offs[5] = 0x%04x "
2088 1.254.2.18 skrll "offs[6] = 0x%04x offs[7] = 0x%04x",
2089 1.254.2.18 skrll O16TOH(sitd->itd.itd_offset[4]),
2090 1.254.2.18 skrll O16TOH(sitd->itd.itd_offset[5]),
2091 1.254.2.18 skrll O16TOH(sitd->itd.itd_offset[6]),
2092 1.254.2.18 skrll O16TOH(sitd->itd.itd_offset[7]));
2093 1.83 augustss }
2094 1.83 augustss
2095 1.83 augustss void
2096 1.168 augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
2097 1.83 augustss {
2098 1.83 augustss for (; sitd; sitd = sitd->nextitd)
2099 1.168 augustss ohci_dump_itd(sc, sitd);
2100 1.83 augustss }
2101 1.83 augustss
2102 1.83 augustss void
2103 1.168 augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
2104 1.1 augustss {
2105 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2106 1.92 tv
2107 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2108 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2109 1.254.2.18 skrll
2110 1.254.2.18 skrll uint32_t flags = O32TOH(sed->ed.ed_flags);
2111 1.254.2.18 skrll DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0);
2112 1.254.2.18 skrll DPRINTF(" addr=%d endpt=%d maxp=%d",
2113 1.254.2.18 skrll OHCI_ED_GET_FA(flags),
2114 1.254.2.18 skrll OHCI_ED_GET_EN(flags),
2115 1.254.2.18 skrll OHCI_ED_GET_MAXP(flags),
2116 1.254.2.18 skrll 0);
2117 1.254.2.18 skrll DPRINTF(" dir=%d speed=%d skip=%d iso=%d",
2118 1.254.2.18 skrll __SHIFTOUT(flags, OHCI_ED_DIR_MASK),
2119 1.254.2.18 skrll !!(flags & OHCI_ED_SPEED),
2120 1.254.2.18 skrll !!(flags & OHCI_ED_SKIP),
2121 1.254.2.18 skrll !!(flags & OHCI_ED_FORMAT_ISO));
2122 1.254.2.18 skrll DPRINTF(" tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp),
2123 1.254.2.18 skrll 0, 0, 0);
2124 1.254.2.18 skrll DPRINTF(" headp=0x%08lx nexted=0x%08lx halted=%d carry=%d",
2125 1.254.2.18 skrll O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted),
2126 1.254.2.18 skrll !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED),
2127 1.254.2.18 skrll !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
2128 1.1 augustss }
2129 1.1 augustss #endif
2130 1.1 augustss
2131 1.1 augustss usbd_status
2132 1.254.2.19 skrll ohci_open(struct usbd_pipe *pipe)
2133 1.1 augustss {
2134 1.254.2.19 skrll struct usbd_device *dev = pipe->up_dev;
2135 1.254.2.12 skrll struct usbd_bus *bus = dev->ud_bus;
2136 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
2137 1.254.2.7 skrll usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
2138 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2139 1.254.2.7 skrll uint8_t addr = dev->ud_addr;
2140 1.254.2.1 skrll uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
2141 1.1 augustss ohci_soft_ed_t *sed;
2142 1.1 augustss ohci_soft_td_t *std;
2143 1.60 augustss ohci_soft_itd_t *sitd;
2144 1.60 augustss ohci_physaddr_t tdphys;
2145 1.254.2.1 skrll uint32_t fmt;
2146 1.224 mrg usbd_status err = USBD_NOMEM;
2147 1.64 augustss int ival;
2148 1.1 augustss
2149 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2150 1.254.2.18 skrll DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr,
2151 1.254.2.18 skrll ed->bEndpointAddress, bus->ub_rhaddr);
2152 1.81 augustss
2153 1.224 mrg if (sc->sc_dying) {
2154 1.241 skrll return USBD_IOERROR;
2155 1.224 mrg }
2156 1.116 augustss
2157 1.90 thorpej std = NULL;
2158 1.90 thorpej sed = NULL;
2159 1.90 thorpej
2160 1.254.2.12 skrll if (addr == bus->ub_rhaddr) {
2161 1.1 augustss switch (ed->bEndpointAddress) {
2162 1.1 augustss case USB_CONTROL_ENDPOINT:
2163 1.254.2.12 skrll pipe->up_methods = &roothub_ctrl_methods;
2164 1.1 augustss break;
2165 1.254.2.12 skrll case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
2166 1.254.2.7 skrll pipe->up_methods = &ohci_root_intr_methods;
2167 1.1 augustss break;
2168 1.1 augustss default:
2169 1.224 mrg err = USBD_INVAL;
2170 1.241 skrll goto bad;
2171 1.1 augustss }
2172 1.1 augustss } else {
2173 1.1 augustss sed = ohci_alloc_sed(sc);
2174 1.53 augustss if (sed == NULL)
2175 1.241 skrll goto bad;
2176 1.1 augustss opipe->sed = sed;
2177 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
2178 1.224 mrg mutex_enter(&sc->sc_lock);
2179 1.60 augustss sitd = ohci_alloc_sitd(sc);
2180 1.224 mrg mutex_exit(&sc->sc_lock);
2181 1.127 augustss if (sitd == NULL)
2182 1.241 skrll goto bad;
2183 1.241 skrll
2184 1.60 augustss opipe->tail.itd = sitd;
2185 1.76 tsutsui tdphys = sitd->physaddr;
2186 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
2187 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
2188 1.83 augustss fmt |= OHCI_ED_DIR_IN;
2189 1.83 augustss else
2190 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
2191 1.60 augustss } else {
2192 1.224 mrg mutex_enter(&sc->sc_lock);
2193 1.60 augustss std = ohci_alloc_std(sc);
2194 1.224 mrg mutex_exit(&sc->sc_lock);
2195 1.127 augustss if (std == NULL)
2196 1.241 skrll goto bad;
2197 1.241 skrll
2198 1.60 augustss opipe->tail.td = std;
2199 1.76 tsutsui tdphys = std->physaddr;
2200 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
2201 1.60 augustss }
2202 1.168 augustss sed->ed.ed_flags = HTOO32(
2203 1.120 augustss OHCI_ED_SET_FA(addr) |
2204 1.147 mycroft OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
2205 1.254.2.7 skrll (dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
2206 1.109 augustss fmt |
2207 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
2208 1.214 jakllsch sed->ed.ed_headp = HTOO32(tdphys |
2209 1.254.2.7 skrll (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0));
2210 1.214 jakllsch sed->ed.ed_tailp = HTOO32(tdphys);
2211 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2212 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2213 1.1 augustss
2214 1.60 augustss switch (xfertype) {
2215 1.1 augustss case UE_CONTROL:
2216 1.254.2.7 skrll pipe->up_methods = &ohci_device_ctrl_methods;
2217 1.120 augustss err = usb_allocmem(&sc->sc_bus,
2218 1.120 augustss sizeof(usb_device_request_t),
2219 1.53 augustss 0, &opipe->u.ctl.reqdma);
2220 1.53 augustss if (err)
2221 1.1 augustss goto bad;
2222 1.224 mrg mutex_enter(&sc->sc_lock);
2223 1.168 augustss ohci_add_ed(sc, sed, sc->sc_ctrl_head);
2224 1.224 mrg mutex_exit(&sc->sc_lock);
2225 1.1 augustss break;
2226 1.1 augustss case UE_INTERRUPT:
2227 1.254.2.7 skrll pipe->up_methods = &ohci_device_intr_methods;
2228 1.254.2.7 skrll ival = pipe->up_interval;
2229 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
2230 1.64 augustss ival = ed->bInterval;
2231 1.226 skrll err = ohci_device_setintr(sc, opipe, ival);
2232 1.226 skrll if (err)
2233 1.226 skrll goto bad;
2234 1.226 skrll break;
2235 1.1 augustss case UE_ISOCHRONOUS:
2236 1.254.2.7 skrll pipe->up_methods = &ohci_device_isoc_methods;
2237 1.254.2.13 skrll return ohci_setup_isoc(pipe);
2238 1.1 augustss case UE_BULK:
2239 1.254.2.7 skrll pipe->up_methods = &ohci_device_bulk_methods;
2240 1.224 mrg mutex_enter(&sc->sc_lock);
2241 1.168 augustss ohci_add_ed(sc, sed, sc->sc_bulk_head);
2242 1.224 mrg mutex_exit(&sc->sc_lock);
2243 1.3 augustss break;
2244 1.1 augustss }
2245 1.1 augustss }
2246 1.224 mrg
2247 1.224 mrg return USBD_NORMAL_COMPLETION;
2248 1.1 augustss
2249 1.1 augustss bad:
2250 1.241 skrll if (std != NULL) {
2251 1.241 skrll mutex_enter(&sc->sc_lock);
2252 1.90 thorpej ohci_free_std(sc, std);
2253 1.241 skrll mutex_exit(&sc->sc_lock);
2254 1.241 skrll }
2255 1.90 thorpej if (sed != NULL)
2256 1.90 thorpej ohci_free_sed(sc, sed);
2257 1.224 mrg return err;
2258 1.120 augustss
2259 1.1 augustss }
2260 1.1 augustss
2261 1.1 augustss /*
2262 1.34 augustss * Close a reqular pipe.
2263 1.34 augustss * Assumes that there are no pending transactions.
2264 1.34 augustss */
2265 1.34 augustss void
2266 1.254.2.19 skrll ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head)
2267 1.34 augustss {
2268 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2269 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2270 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
2271 1.34 augustss
2272 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2273 1.224 mrg
2274 1.34 augustss #ifdef DIAGNOSTIC
2275 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
2276 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2277 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
2278 1.34 augustss ohci_soft_td_t *std;
2279 1.168 augustss std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
2280 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
2281 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
2282 1.168 augustss (int)O32TOH(sed->ed.ed_headp),
2283 1.168 augustss (int)O32TOH(sed->ed.ed_tailp),
2284 1.34 augustss pipe, std);
2285 1.229 christos #ifdef OHCI_DEBUG
2286 1.107 augustss usbd_dump_pipe(&opipe->pipe);
2287 1.168 augustss ohci_dump_ed(sc, sed);
2288 1.106 augustss if (std)
2289 1.168 augustss ohci_dump_td(sc, std);
2290 1.106 augustss #endif
2291 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
2292 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2293 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
2294 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
2295 1.34 augustss }
2296 1.34 augustss #endif
2297 1.224 mrg ohci_rem_ed(sc, sed, head);
2298 1.133 toshii /* Make sure the host controller is not touching this ED */
2299 1.133 toshii usb_delay_ms(&sc->sc_bus, 1);
2300 1.254.2.7 skrll pipe->up_endpoint->ue_toggle =
2301 1.214 jakllsch (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
2302 1.34 augustss ohci_free_sed(sc, opipe->sed);
2303 1.34 augustss }
2304 1.34 augustss
2305 1.120 augustss /*
2306 1.34 augustss * Abort a device request.
2307 1.34 augustss * If this routine is called at splusb() it guarantees that the request
2308 1.34 augustss * will be removed from the hardware scheduling and that the callback
2309 1.34 augustss * for it will be called with USBD_CANCELLED status.
2310 1.34 augustss * It's impossible to guarantee that the requested transfer will not
2311 1.34 augustss * have happened since the hardware runs concurrently.
2312 1.34 augustss * If the transaction has already happened we rely on the ordinary
2313 1.34 augustss * interrupt processing to process it.
2314 1.224 mrg * XXX This is most probably wrong.
2315 1.224 mrg * XXXMRG this doesn't make sense anymore.
2316 1.34 augustss */
2317 1.34 augustss void
2318 1.254.2.19 skrll ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
2319 1.34 augustss {
2320 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
2321 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
2322 1.106 augustss ohci_soft_ed_t *sed = opipe->sed;
2323 1.106 augustss ohci_soft_td_t *p, *n;
2324 1.106 augustss ohci_physaddr_t headp;
2325 1.224 mrg int hit;
2326 1.159 augustss int wake;
2327 1.34 augustss
2328 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2329 1.254.2.18 skrll DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0);
2330 1.34 augustss
2331 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2332 1.254.2.3 skrll ASSERT_SLEEPABLE();
2333 1.224 mrg
2334 1.116 augustss if (sc->sc_dying) {
2335 1.116 augustss /* If we're dying, just do the software part. */
2336 1.254.2.7 skrll xfer->ux_status = status; /* make software ignore it */
2337 1.254.2.7 skrll callout_halt(&xfer->ux_callout, &sc->sc_lock);
2338 1.116 augustss usb_transfer_complete(xfer);
2339 1.170 christos return;
2340 1.116 augustss }
2341 1.116 augustss
2342 1.106 augustss /*
2343 1.159 augustss * If an abort is already in progress then just wait for it to
2344 1.159 augustss * complete and return.
2345 1.159 augustss */
2346 1.254.2.7 skrll if (xfer->ux_hcflags & UXFER_ABORTING) {
2347 1.254.2.18 skrll DPRINTFN(2, "already aborting", 0, 0, 0, 0);
2348 1.159 augustss #ifdef DIAGNOSTIC
2349 1.159 augustss if (status == USBD_TIMEOUT)
2350 1.235 skrll printf("%s: TIMEOUT while aborting\n", __func__);
2351 1.159 augustss #endif
2352 1.159 augustss /* Override the status which might be USBD_TIMEOUT. */
2353 1.254.2.7 skrll xfer->ux_status = status;
2354 1.254.2.18 skrll DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0);
2355 1.254.2.7 skrll xfer->ux_hcflags |= UXFER_ABORTWAIT;
2356 1.254.2.7 skrll while (xfer->ux_hcflags & UXFER_ABORTING)
2357 1.254.2.7 skrll cv_wait(&xfer->ux_hccv, &sc->sc_lock);
2358 1.224 mrg goto done;
2359 1.159 augustss }
2360 1.254.2.7 skrll xfer->ux_hcflags |= UXFER_ABORTING;
2361 1.159 augustss
2362 1.159 augustss /*
2363 1.106 augustss * Step 1: Make interrupt routine and hardware ignore xfer.
2364 1.106 augustss */
2365 1.254.2.7 skrll xfer->ux_status = status; /* make software ignore it */
2366 1.254.2.7 skrll callout_stop(&xfer->ux_callout);
2367 1.254.2.18 skrll DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0);
2368 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2369 1.195 bouyer sizeof(sed->ed.ed_flags),
2370 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2371 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
2372 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2373 1.195 bouyer sizeof(sed->ed.ed_flags),
2374 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2375 1.34 augustss
2376 1.120 augustss /*
2377 1.106 augustss * Step 2: Wait until we know hardware has finished any possible
2378 1.106 augustss * use of the xfer. Also make sure the soft interrupt routine
2379 1.106 augustss * has run.
2380 1.106 augustss */
2381 1.224 mrg /* Hardware finishes in 1ms */
2382 1.254.2.7 skrll usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock);
2383 1.119 augustss sc->sc_softwake = 1;
2384 1.119 augustss usb_schedsoftintr(&sc->sc_bus);
2385 1.224 mrg cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
2386 1.119 augustss
2387 1.120 augustss /*
2388 1.106 augustss * Step 3: Remove any vestiges of the xfer from the hardware.
2389 1.106 augustss * The complication here is that the hardware may have executed
2390 1.106 augustss * beyond the xfer we're trying to abort. So as we're scanning
2391 1.106 augustss * the TDs of this xfer we check if the hardware points to
2392 1.106 augustss * any of them.
2393 1.106 augustss */
2394 1.254.2.7 skrll p = xfer->ux_hcpriv;
2395 1.34 augustss #ifdef DIAGNOSTIC
2396 1.55 augustss if (p == NULL) {
2397 1.254.2.7 skrll xfer->ux_hcflags &= ~UXFER_ABORTING; /* XXX */
2398 1.106 augustss printf("ohci_abort_xfer: hcpriv is NULL\n");
2399 1.224 mrg goto done;
2400 1.38 augustss }
2401 1.34 augustss #endif
2402 1.106 augustss #ifdef OHCI_DEBUG
2403 1.254.2.18 skrll DPRINTF("--- dump start ---", 0, 0, 0, 0);
2404 1.254.2.18 skrll
2405 1.106 augustss if (ohcidebug > 1) {
2406 1.254.2.18 skrll DPRINTF("sed:", 0, 0, 0, 0);
2407 1.168 augustss ohci_dump_ed(sc, sed);
2408 1.168 augustss ohci_dump_tds(sc, p);
2409 1.106 augustss }
2410 1.254.2.18 skrll DPRINTF("--- dump end ---", 0, 0, 0, 0);
2411 1.106 augustss #endif
2412 1.168 augustss headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
2413 1.106 augustss hit = 0;
2414 1.53 augustss for (; p->xfer == xfer; p = n) {
2415 1.106 augustss hit |= headp == p->physaddr;
2416 1.38 augustss n = p->nexttd;
2417 1.38 augustss ohci_free_std(sc, p);
2418 1.34 augustss }
2419 1.106 augustss /* Zap headp register if hardware pointed inside the xfer. */
2420 1.106 augustss if (hit) {
2421 1.254.2.18 skrll DPRINTFN(1, "set hd=0x%08x, tl=0x%08x", (int)p->physaddr,
2422 1.254.2.18 skrll (int)O32TOH(sed->ed.ed_tailp), 0, 0);
2423 1.168 augustss sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
2424 1.195 bouyer usb_syncmem(&sed->dma,
2425 1.195 bouyer sed->offs + offsetof(ohci_ed_t, ed_headp),
2426 1.195 bouyer sizeof(sed->ed.ed_headp),
2427 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2428 1.106 augustss } else {
2429 1.254.2.18 skrll DPRINTFN(1, "no hit", 0, 0, 0, 0);
2430 1.106 augustss }
2431 1.34 augustss
2432 1.106 augustss /*
2433 1.106 augustss * Step 4: Turn on hardware again.
2434 1.106 augustss */
2435 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2436 1.195 bouyer sizeof(sed->ed.ed_flags),
2437 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2438 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
2439 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
2440 1.195 bouyer sizeof(sed->ed.ed_flags),
2441 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2442 1.38 augustss
2443 1.106 augustss /*
2444 1.106 augustss * Step 5: Execute callback.
2445 1.106 augustss */
2446 1.254.2.7 skrll wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
2447 1.254.2.7 skrll xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
2448 1.53 augustss usb_transfer_complete(xfer);
2449 1.159 augustss if (wake)
2450 1.254.2.7 skrll cv_broadcast(&xfer->ux_hccv);
2451 1.38 augustss
2452 1.224 mrg done:
2453 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2454 1.34 augustss }
2455 1.34 augustss
2456 1.34 augustss /*
2457 1.1 augustss * Data structures and routines to emulate the root hub.
2458 1.1 augustss */
2459 1.254.2.12 skrll Static int
2460 1.254.2.12 skrll ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
2461 1.254.2.12 skrll void *buf, int buflen)
2462 1.17 augustss {
2463 1.254.2.12 skrll ohci_softc_t *sc = bus->ub_hcpriv;
2464 1.1 augustss usb_port_status_t ps;
2465 1.254.2.12 skrll uint16_t len, value, index;
2466 1.254.2.12 skrll int l, totlen = 0;
2467 1.254.2.12 skrll int port, i;
2468 1.254.2.1 skrll uint32_t v;
2469 1.1 augustss
2470 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2471 1.254.2.18 skrll
2472 1.83 augustss if (sc->sc_dying)
2473 1.254.2.12 skrll return -1;
2474 1.1 augustss
2475 1.254.2.18 skrll DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType,
2476 1.254.2.18 skrll req->bRequest, 0, 0);
2477 1.1 augustss
2478 1.1 augustss len = UGETW(req->wLength);
2479 1.1 augustss value = UGETW(req->wValue);
2480 1.1 augustss index = UGETW(req->wIndex);
2481 1.43 augustss
2482 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2483 1.254.2.12 skrll switch (C(req->bRequest, req->bmRequestType)) {
2484 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2485 1.254.2.18 skrll DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0);
2486 1.171 christos if (len == 0)
2487 1.171 christos break;
2488 1.254.2.12 skrll switch (value) {
2489 1.254.2.12 skrll case C(0, UDESC_DEVICE): {
2490 1.254.2.12 skrll usb_device_descriptor_t devd;
2491 1.254.2.12 skrll
2492 1.254.2.12 skrll totlen = min(buflen, sizeof(devd));
2493 1.254.2.12 skrll memcpy(&devd, buf, totlen);
2494 1.254.2.12 skrll USETW(devd.idVendor, sc->sc_id_vendor);
2495 1.254.2.12 skrll memcpy(buf, &devd, totlen);
2496 1.1 augustss break;
2497 1.254.2.12 skrll }
2498 1.254.2.12 skrll case C(1, UDESC_STRING):
2499 1.186 drochner #define sd ((usb_string_descriptor_t *)buf)
2500 1.254.2.12 skrll /* Vendor */
2501 1.254.2.12 skrll totlen = usb_makestrdesc(sd, len, sc->sc_vendor);
2502 1.254.2.12 skrll break;
2503 1.254.2.12 skrll case C(2, UDESC_STRING):
2504 1.254.2.12 skrll /* Product */
2505 1.254.2.12 skrll totlen = usb_makestrdesc(sd, len, "OHCI root hub");
2506 1.1 augustss break;
2507 1.254.2.12 skrll #undef sd
2508 1.1 augustss default:
2509 1.254.2.12 skrll /* default from usbroothub */
2510 1.254.2.12 skrll return buflen;
2511 1.1 augustss }
2512 1.1 augustss break;
2513 1.254.2.12 skrll
2514 1.1 augustss /* Hub requests */
2515 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2516 1.1 augustss break;
2517 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2518 1.254.2.18 skrll DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d",
2519 1.254.2.18 skrll index, value, 0, 0);
2520 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2521 1.254.2.12 skrll return -1;
2522 1.1 augustss }
2523 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2524 1.1 augustss switch(value) {
2525 1.1 augustss case UHF_PORT_ENABLE:
2526 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2527 1.1 augustss break;
2528 1.1 augustss case UHF_PORT_SUSPEND:
2529 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2530 1.1 augustss break;
2531 1.1 augustss case UHF_PORT_POWER:
2532 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2533 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2534 1.1 augustss break;
2535 1.1 augustss case UHF_C_PORT_CONNECTION:
2536 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2537 1.1 augustss break;
2538 1.1 augustss case UHF_C_PORT_ENABLE:
2539 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2540 1.1 augustss break;
2541 1.1 augustss case UHF_C_PORT_SUSPEND:
2542 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2543 1.1 augustss break;
2544 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2545 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2546 1.1 augustss break;
2547 1.1 augustss case UHF_C_PORT_RESET:
2548 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2549 1.1 augustss break;
2550 1.1 augustss default:
2551 1.254.2.12 skrll return -1;
2552 1.1 augustss }
2553 1.1 augustss switch(value) {
2554 1.1 augustss case UHF_C_PORT_CONNECTION:
2555 1.1 augustss case UHF_C_PORT_ENABLE:
2556 1.1 augustss case UHF_C_PORT_SUSPEND:
2557 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2558 1.1 augustss case UHF_C_PORT_RESET:
2559 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2560 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2561 1.157 mycroft ohci_rhsc_enable(sc);
2562 1.1 augustss break;
2563 1.1 augustss default:
2564 1.1 augustss break;
2565 1.1 augustss }
2566 1.1 augustss break;
2567 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2568 1.171 christos if (len == 0)
2569 1.171 christos break;
2570 1.146 toshii if ((value & 0xff) != 0) {
2571 1.254.2.12 skrll return -1;
2572 1.1 augustss }
2573 1.254.2.12 skrll usb_hub_descriptor_t hubd;
2574 1.254.2.12 skrll
2575 1.254.2.12 skrll totlen = min(buflen, sizeof(hubd));
2576 1.254.2.12 skrll memcpy(&hubd, buf, totlen);
2577 1.254.2.12 skrll
2578 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2579 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2580 1.15 augustss USETW(hubd.wHubCharacteristics,
2581 1.120 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2582 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2583 1.1 augustss /* XXX overcurrent */
2584 1.1 augustss );
2585 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2586 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2587 1.120 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2588 1.254.2.1 skrll hubd.DeviceRemovable[i++] = (uint8_t)v;
2589 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2590 1.254.2.12 skrll totlen = min(totlen, hubd.bDescLength);
2591 1.254.2.12 skrll memcpy(buf, &hubd, totlen);
2592 1.1 augustss break;
2593 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2594 1.1 augustss if (len != 4) {
2595 1.254.2.12 skrll return -1;
2596 1.1 augustss }
2597 1.1 augustss memset(buf, 0, len); /* ? XXX */
2598 1.1 augustss totlen = len;
2599 1.1 augustss break;
2600 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2601 1.254.2.18 skrll DPRINTFN(8, "get port status i=%d", index, 0, 0, 0);
2602 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2603 1.254.2.12 skrll return -1;
2604 1.1 augustss }
2605 1.1 augustss if (len != 4) {
2606 1.254.2.12 skrll return -1;
2607 1.254.2.12 skrll }
2608 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2609 1.254.2.18 skrll DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0);
2610 1.1 augustss USETW(ps.wPortStatus, v);
2611 1.1 augustss USETW(ps.wPortChange, v >> 16);
2612 1.254.2.12 skrll totlen = min(len, sizeof(ps));
2613 1.254.2.12 skrll memcpy(buf, &ps, totlen);
2614 1.1 augustss break;
2615 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2616 1.254.2.12 skrll return -1;
2617 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2618 1.1 augustss break;
2619 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2620 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2621 1.254.2.12 skrll return -1;
2622 1.1 augustss }
2623 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2624 1.1 augustss switch(value) {
2625 1.1 augustss case UHF_PORT_ENABLE:
2626 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2627 1.1 augustss break;
2628 1.1 augustss case UHF_PORT_SUSPEND:
2629 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2630 1.1 augustss break;
2631 1.1 augustss case UHF_PORT_RESET:
2632 1.254.2.18 skrll DPRINTFN(5, "reset port %d", index, 0, 0, 0);
2633 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2634 1.110 augustss for (i = 0; i < 5; i++) {
2635 1.110 augustss usb_delay_ms(&sc->sc_bus,
2636 1.110 augustss USB_PORT_ROOT_RESET_DELAY);
2637 1.116 augustss if (sc->sc_dying) {
2638 1.254.2.12 skrll return -1;
2639 1.116 augustss }
2640 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2641 1.1 augustss break;
2642 1.1 augustss }
2643 1.254.2.18 skrll DPRINTFN(8, "port %d reset, status = 0x%04x", index,
2644 1.254.2.18 skrll OREAD4(sc, port), 0, 0);
2645 1.1 augustss break;
2646 1.1 augustss case UHF_PORT_POWER:
2647 1.254.2.18 skrll DPRINTFN(2, "set port power %d", index, 0, 0, 0);
2648 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2649 1.1 augustss break;
2650 1.1 augustss default:
2651 1.254.2.12 skrll return -1;
2652 1.1 augustss }
2653 1.1 augustss break;
2654 1.1 augustss default:
2655 1.254.2.12 skrll /* default from usbroothub */
2656 1.254.2.12 skrll return buflen;
2657 1.1 augustss }
2658 1.1 augustss
2659 1.254.2.12 skrll return totlen;
2660 1.1 augustss }
2661 1.1 augustss
2662 1.82 augustss Static usbd_status
2663 1.254.2.19 skrll ohci_root_intr_transfer(struct usbd_xfer *xfer)
2664 1.1 augustss {
2665 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2666 1.53 augustss usbd_status err;
2667 1.17 augustss
2668 1.46 augustss /* Insert last in queue. */
2669 1.224 mrg mutex_enter(&sc->sc_lock);
2670 1.53 augustss err = usb_insert_transfer(xfer);
2671 1.224 mrg mutex_exit(&sc->sc_lock);
2672 1.53 augustss if (err)
2673 1.254.2.13 skrll return err;
2674 1.46 augustss
2675 1.46 augustss /* Pipe isn't running, start first */
2676 1.254.2.13 skrll return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2677 1.17 augustss }
2678 1.17 augustss
2679 1.82 augustss Static usbd_status
2680 1.254.2.19 skrll ohci_root_intr_start(struct usbd_xfer *xfer)
2681 1.17 augustss {
2682 1.254.2.19 skrll struct usbd_pipe *pipe = xfer->ux_pipe;
2683 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2684 1.1 augustss
2685 1.83 augustss if (sc->sc_dying)
2686 1.254.2.13 skrll return USBD_IOERROR;
2687 1.83 augustss
2688 1.224 mrg mutex_enter(&sc->sc_lock);
2689 1.224 mrg KASSERT(sc->sc_intrxfer == NULL);
2690 1.53 augustss sc->sc_intrxfer = xfer;
2691 1.224 mrg mutex_exit(&sc->sc_lock);
2692 1.1 augustss
2693 1.254.2.13 skrll return USBD_IN_PROGRESS;
2694 1.1 augustss }
2695 1.1 augustss
2696 1.3 augustss /* Abort a root interrupt request. */
2697 1.82 augustss Static void
2698 1.254.2.19 skrll ohci_root_intr_abort(struct usbd_xfer *xfer)
2699 1.1 augustss {
2700 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2701 1.224 mrg
2702 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2703 1.254.2.7 skrll KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
2704 1.53 augustss
2705 1.252 skrll sc->sc_intrxfer = NULL;
2706 1.252 skrll
2707 1.254.2.7 skrll xfer->ux_status = USBD_CANCELLED;
2708 1.53 augustss usb_transfer_complete(xfer);
2709 1.1 augustss }
2710 1.1 augustss
2711 1.1 augustss /* Close the root pipe. */
2712 1.82 augustss Static void
2713 1.254.2.19 skrll ohci_root_intr_close(struct usbd_pipe *pipe)
2714 1.1 augustss {
2715 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2716 1.120 augustss
2717 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2718 1.224 mrg
2719 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2720 1.34 augustss
2721 1.53 augustss sc->sc_intrxfer = NULL;
2722 1.1 augustss }
2723 1.1 augustss
2724 1.1 augustss /************************/
2725 1.1 augustss
2726 1.82 augustss Static usbd_status
2727 1.254.2.19 skrll ohci_device_ctrl_transfer(struct usbd_xfer *xfer)
2728 1.1 augustss {
2729 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2730 1.53 augustss usbd_status err;
2731 1.17 augustss
2732 1.46 augustss /* Insert last in queue. */
2733 1.224 mrg mutex_enter(&sc->sc_lock);
2734 1.53 augustss err = usb_insert_transfer(xfer);
2735 1.224 mrg mutex_exit(&sc->sc_lock);
2736 1.53 augustss if (err)
2737 1.254.2.13 skrll return err;
2738 1.46 augustss
2739 1.46 augustss /* Pipe isn't running, start first */
2740 1.254.2.13 skrll return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2741 1.17 augustss }
2742 1.17 augustss
2743 1.82 augustss Static usbd_status
2744 1.254.2.19 skrll ohci_device_ctrl_start(struct usbd_xfer *xfer)
2745 1.17 augustss {
2746 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2747 1.53 augustss usbd_status err;
2748 1.1 augustss
2749 1.83 augustss if (sc->sc_dying)
2750 1.254.2.13 skrll return USBD_IOERROR;
2751 1.83 augustss
2752 1.42 augustss #ifdef DIAGNOSTIC
2753 1.254.2.7 skrll if (!(xfer->ux_rqflags & URQ_REQUEST)) {
2754 1.1 augustss /* XXX panic */
2755 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2756 1.254.2.13 skrll return USBD_INVAL;
2757 1.1 augustss }
2758 1.42 augustss #endif
2759 1.1 augustss
2760 1.224 mrg mutex_enter(&sc->sc_lock);
2761 1.53 augustss err = ohci_device_request(xfer);
2762 1.224 mrg mutex_exit(&sc->sc_lock);
2763 1.53 augustss if (err)
2764 1.254.2.13 skrll return err;
2765 1.1 augustss
2766 1.254.2.7 skrll if (sc->sc_bus.ub_usepolling)
2767 1.53 augustss ohci_waitintr(sc, xfer);
2768 1.254.2.13 skrll return USBD_IN_PROGRESS;
2769 1.1 augustss }
2770 1.1 augustss
2771 1.1 augustss /* Abort a device control request. */
2772 1.82 augustss Static void
2773 1.254.2.19 skrll ohci_device_ctrl_abort(struct usbd_xfer *xfer)
2774 1.1 augustss {
2775 1.224 mrg #ifdef DIAGNOSTIC
2776 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2777 1.224 mrg #endif
2778 1.224 mrg
2779 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2780 1.224 mrg
2781 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2782 1.254.2.18 skrll DPRINTF("xfer=%p", xfer, 0, 0, 0);
2783 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2784 1.1 augustss }
2785 1.1 augustss
2786 1.1 augustss /* Close a device control pipe. */
2787 1.82 augustss Static void
2788 1.254.2.19 skrll ohci_device_ctrl_close(struct usbd_pipe *pipe)
2789 1.1 augustss {
2790 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2791 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2792 1.1 augustss
2793 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2794 1.224 mrg
2795 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2796 1.254.2.18 skrll DPRINTF("pipe=%p", pipe, 0, 0, 0);
2797 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2798 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2799 1.3 augustss }
2800 1.3 augustss
2801 1.3 augustss /************************/
2802 1.37 augustss
2803 1.82 augustss Static void
2804 1.254.2.19 skrll ohci_device_clear_toggle(struct usbd_pipe *pipe)
2805 1.37 augustss {
2806 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2807 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2808 1.37 augustss
2809 1.168 augustss opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
2810 1.37 augustss }
2811 1.37 augustss
2812 1.82 augustss Static void
2813 1.254.2.19 skrll ohci_noop(struct usbd_pipe *pipe)
2814 1.37 augustss {
2815 1.37 augustss }
2816 1.3 augustss
2817 1.82 augustss Static usbd_status
2818 1.254.2.19 skrll ohci_device_bulk_transfer(struct usbd_xfer *xfer)
2819 1.3 augustss {
2820 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2821 1.53 augustss usbd_status err;
2822 1.17 augustss
2823 1.46 augustss /* Insert last in queue. */
2824 1.224 mrg mutex_enter(&sc->sc_lock);
2825 1.53 augustss err = usb_insert_transfer(xfer);
2826 1.224 mrg mutex_exit(&sc->sc_lock);
2827 1.53 augustss if (err)
2828 1.254.2.13 skrll return err;
2829 1.46 augustss
2830 1.46 augustss /* Pipe isn't running, start first */
2831 1.254.2.13 skrll return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2832 1.17 augustss }
2833 1.17 augustss
2834 1.82 augustss Static usbd_status
2835 1.254.2.19 skrll ohci_device_bulk_start(struct usbd_xfer *xfer)
2836 1.17 augustss {
2837 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
2838 1.254.2.19 skrll struct usbd_device *dev = opipe->pipe.up_dev;
2839 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
2840 1.254.2.7 skrll int addr = dev->ud_addr;
2841 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2842 1.3 augustss ohci_soft_ed_t *sed;
2843 1.224 mrg int len, isread, endpt;
2844 1.53 augustss usbd_status err;
2845 1.3 augustss
2846 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2847 1.254.2.18 skrll
2848 1.83 augustss if (sc->sc_dying)
2849 1.254.2.13 skrll return USBD_IOERROR;
2850 1.83 augustss
2851 1.34 augustss #ifdef DIAGNOSTIC
2852 1.254.2.7 skrll if (xfer->ux_rqflags & URQ_REQUEST) {
2853 1.3 augustss /* XXX panic */
2854 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2855 1.254.2.13 skrll return USBD_INVAL;
2856 1.3 augustss }
2857 1.34 augustss #endif
2858 1.3 augustss
2859 1.224 mrg mutex_enter(&sc->sc_lock);
2860 1.224 mrg
2861 1.254.2.7 skrll len = xfer->ux_length;
2862 1.254.2.7 skrll endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
2863 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2864 1.3 augustss sed = opipe->sed;
2865 1.3 augustss
2866 1.254.2.18 skrll DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread,
2867 1.254.2.18 skrll xfer->ux_flags);
2868 1.254.2.18 skrll DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0);
2869 1.34 augustss
2870 1.32 augustss opipe->u.bulk.isread = isread;
2871 1.3 augustss opipe->u.bulk.length = len;
2872 1.3 augustss
2873 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2874 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
2875 1.3 augustss /* Update device address */
2876 1.168 augustss sed->ed.ed_flags = HTOO32(
2877 1.168 augustss (O32TOH(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2878 1.16 augustss OHCI_ED_SET_FA(addr));
2879 1.3 augustss
2880 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2881 1.60 augustss data = opipe->tail.td;
2882 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2883 1.77 augustss data, &tail);
2884 1.236 skrll if (err)
2885 1.236 skrll return err;
2886 1.254.2.1 skrll
2887 1.77 augustss /* We want interrupt at the end of the transfer. */
2888 1.168 augustss tail->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
2889 1.168 augustss tail->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
2890 1.77 augustss tail->flags |= OHCI_CALL_DONE;
2891 1.77 augustss tail = tail->nexttd; /* point at sentinel */
2892 1.195 bouyer usb_syncmem(&tail->dma, tail->offs + offsetof(ohci_td_t, td_flags),
2893 1.195 bouyer sizeof(tail->td.td_flags),
2894 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2895 1.224 mrg if (err) {
2896 1.224 mrg mutex_exit(&sc->sc_lock);
2897 1.254.2.13 skrll return err;
2898 1.224 mrg }
2899 1.48 augustss
2900 1.53 augustss tail->xfer = NULL;
2901 1.254.2.7 skrll xfer->ux_hcpriv = data;
2902 1.3 augustss
2903 1.254.2.18 skrll DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x "
2904 1.254.2.18 skrll "td_cbp=0x%08x td_be=0x%08x",
2905 1.168 augustss (int)O32TOH(sed->ed.ed_flags),
2906 1.168 augustss (int)O32TOH(data->td.td_flags),
2907 1.168 augustss (int)O32TOH(data->td.td_cbp),
2908 1.254.2.18 skrll (int)O32TOH(data->td.td_be));
2909 1.34 augustss
2910 1.52 augustss #ifdef OHCI_DEBUG
2911 1.254.2.18 skrll DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
2912 1.75 augustss if (ohcidebug > 5) {
2913 1.168 augustss ohci_dump_ed(sc, sed);
2914 1.168 augustss ohci_dump_tds(sc, data);
2915 1.34 augustss }
2916 1.254.2.18 skrll DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
2917 1.34 augustss #endif
2918 1.34 augustss
2919 1.3 augustss /* Insert ED in schedule */
2920 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2921 1.53 augustss tdp->xfer = xfer;
2922 1.48 augustss }
2923 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
2924 1.60 augustss opipe->tail.td = tail;
2925 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
2926 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
2927 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
2928 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2929 1.254.2.7 skrll if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
2930 1.254.2.7 skrll callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
2931 1.80 augustss ohci_timeout, xfer);
2932 1.15 augustss }
2933 1.224 mrg mutex_exit(&sc->sc_lock);
2934 1.34 augustss
2935 1.52 augustss #if 0
2936 1.52 augustss /* This goes wrong if we are too slow. */
2937 1.75 augustss if (ohcidebug > 10) {
2938 1.75 augustss delay(10000);
2939 1.254.2.18 skrll DPRINTF("status=%x", OREAD4(sc, OHCI_COMMAND_STATUS),
2940 1.254.2.18 skrll 0, 0, 0);
2941 1.168 augustss ohci_dump_ed(sc, sed);
2942 1.168 augustss ohci_dump_tds(sc, data);
2943 1.34 augustss }
2944 1.34 augustss #endif
2945 1.34 augustss
2946 1.254.2.13 skrll return USBD_IN_PROGRESS;
2947 1.3 augustss }
2948 1.3 augustss
2949 1.82 augustss Static void
2950 1.254.2.19 skrll ohci_device_bulk_abort(struct usbd_xfer *xfer)
2951 1.3 augustss {
2952 1.224 mrg #ifdef DIAGNOSTIC
2953 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2954 1.224 mrg #endif
2955 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2956 1.224 mrg
2957 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2958 1.224 mrg
2959 1.254.2.18 skrll DPRINTF("xfer=%p", xfer, 0, 0, 0);
2960 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2961 1.3 augustss }
2962 1.3 augustss
2963 1.120 augustss /*
2964 1.34 augustss * Close a device bulk pipe.
2965 1.34 augustss */
2966 1.82 augustss Static void
2967 1.254.2.19 skrll ohci_device_bulk_close(struct usbd_pipe *pipe)
2968 1.3 augustss {
2969 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2970 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
2971 1.3 augustss
2972 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
2973 1.224 mrg
2974 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
2975 1.254.2.18 skrll
2976 1.254.2.18 skrll DPRINTF("pipe=%p", pipe, 0, 0, 0);
2977 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2978 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2979 1.1 augustss }
2980 1.1 augustss
2981 1.1 augustss /************************/
2982 1.1 augustss
2983 1.82 augustss Static usbd_status
2984 1.254.2.19 skrll ohci_device_intr_transfer(struct usbd_xfer *xfer)
2985 1.17 augustss {
2986 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
2987 1.53 augustss usbd_status err;
2988 1.17 augustss
2989 1.46 augustss /* Insert last in queue. */
2990 1.224 mrg mutex_enter(&sc->sc_lock);
2991 1.53 augustss err = usb_insert_transfer(xfer);
2992 1.224 mrg mutex_exit(&sc->sc_lock);
2993 1.53 augustss if (err)
2994 1.254.2.13 skrll return err;
2995 1.46 augustss
2996 1.46 augustss /* Pipe isn't running, start first */
2997 1.254.2.13 skrll return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
2998 1.17 augustss }
2999 1.17 augustss
3000 1.82 augustss Static usbd_status
3001 1.254.2.19 skrll ohci_device_intr_start(struct usbd_xfer *xfer)
3002 1.1 augustss {
3003 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
3004 1.254.2.19 skrll struct usbd_device *dev = opipe->pipe.up_dev;
3005 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
3006 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
3007 1.48 augustss ohci_soft_td_t *data, *tail;
3008 1.224 mrg int len, isread, endpt;
3009 1.1 augustss
3010 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
3011 1.254.2.18 skrll
3012 1.83 augustss if (sc->sc_dying)
3013 1.254.2.13 skrll return USBD_IOERROR;
3014 1.83 augustss
3015 1.254.2.18 skrll DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length,
3016 1.254.2.18 skrll xfer->ux_flags, xfer->ux_priv);
3017 1.1 augustss
3018 1.42 augustss #ifdef DIAGNOSTIC
3019 1.254.2.7 skrll if (xfer->ux_rqflags & URQ_REQUEST)
3020 1.128 provos panic("ohci_device_intr_transfer: a request");
3021 1.42 augustss #endif
3022 1.1 augustss
3023 1.254.2.7 skrll len = xfer->ux_length;
3024 1.254.2.7 skrll endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
3025 1.165 skrll isread = UE_GET_DIR(endpt) == UE_DIR_IN;
3026 1.1 augustss
3027 1.60 augustss data = opipe->tail.td;
3028 1.224 mrg mutex_enter(&sc->sc_lock);
3029 1.1 augustss tail = ohci_alloc_std(sc);
3030 1.224 mrg mutex_exit(&sc->sc_lock);
3031 1.55 augustss if (tail == NULL)
3032 1.254.2.13 skrll return USBD_NOMEM;
3033 1.53 augustss tail->xfer = NULL;
3034 1.1 augustss
3035 1.168 augustss data->td.td_flags = HTOO32(
3036 1.165 skrll isread ? OHCI_TD_IN : OHCI_TD_OUT |
3037 1.165 skrll OHCI_TD_NOCC |
3038 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
3039 1.254.2.7 skrll if (xfer->ux_flags & USBD_SHORT_XFER_OK)
3040 1.168 augustss data->td.td_flags |= HTOO32(OHCI_TD_R);
3041 1.254.2.7 skrll data->td.td_cbp = HTOO32(DMAADDR(&xfer->ux_dmabuf, 0));
3042 1.48 augustss data->nexttd = tail;
3043 1.168 augustss data->td.td_nexttd = HTOO32(tail->physaddr);
3044 1.168 augustss data->td.td_be = HTOO32(O32TOH(data->td.td_cbp) + len - 1);
3045 1.48 augustss data->len = len;
3046 1.53 augustss data->xfer = xfer;
3047 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
3048 1.195 bouyer usb_syncmem(&data->dma, data->offs, sizeof(data->td),
3049 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3050 1.254.2.7 skrll xfer->ux_hcpriv = data;
3051 1.1 augustss
3052 1.52 augustss #ifdef OHCI_DEBUG
3053 1.254.2.18 skrll DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
3054 1.1 augustss if (ohcidebug > 5) {
3055 1.168 augustss ohci_dump_ed(sc, sed);
3056 1.168 augustss ohci_dump_tds(sc, data);
3057 1.1 augustss }
3058 1.254.2.18 skrll DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
3059 1.1 augustss #endif
3060 1.1 augustss
3061 1.1 augustss /* Insert ED in schedule */
3062 1.224 mrg mutex_enter(&sc->sc_lock);
3063 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3064 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3065 1.168 augustss sed->ed.ed_tailp = HTOO32(tail->physaddr);
3066 1.60 augustss opipe->tail.td = tail;
3067 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3068 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3069 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3070 1.1 augustss
3071 1.52 augustss #if 0
3072 1.52 augustss /*
3073 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
3074 1.52 augustss * because false references are followed due to the fact that the
3075 1.52 augustss * TD is gone.
3076 1.52 augustss */
3077 1.1 augustss if (ohcidebug > 5) {
3078 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 5, &sc->sc_lock);
3079 1.254.2.18 skrll DPRINTF("status=%x", OREAD4(sc, OHCI_COMMAND_STATUS),
3080 1.254.2.18 skrll 0, 0, 0);
3081 1.168 augustss ohci_dump_ed(sc, sed);
3082 1.168 augustss ohci_dump_tds(sc, data);
3083 1.1 augustss }
3084 1.1 augustss #endif
3085 1.224 mrg mutex_exit(&sc->sc_lock);
3086 1.1 augustss
3087 1.254.2.13 skrll return USBD_IN_PROGRESS;
3088 1.1 augustss }
3089 1.1 augustss
3090 1.227 skrll /* Abort a device interrupt request. */
3091 1.82 augustss Static void
3092 1.254.2.19 skrll ohci_device_intr_abort(struct usbd_xfer *xfer)
3093 1.1 augustss {
3094 1.224 mrg #ifdef DIAGNOSTIC
3095 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
3096 1.224 mrg #endif
3097 1.224 mrg
3098 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3099 1.254.2.7 skrll KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
3100 1.224 mrg
3101 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
3102 1.1 augustss }
3103 1.1 augustss
3104 1.1 augustss /* Close a device interrupt pipe. */
3105 1.82 augustss Static void
3106 1.254.2.19 skrll ohci_device_intr_close(struct usbd_pipe *pipe)
3107 1.1 augustss {
3108 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3109 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
3110 1.1 augustss int nslots = opipe->u.intr.nslots;
3111 1.1 augustss int pos = opipe->u.intr.pos;
3112 1.1 augustss int j;
3113 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
3114 1.224 mrg
3115 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
3116 1.254.2.18 skrll
3117 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3118 1.1 augustss
3119 1.254.2.18 skrll DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0);
3120 1.195 bouyer usb_syncmem(&sed->dma, sed->offs,
3121 1.195 bouyer sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3122 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
3123 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3124 1.195 bouyer sizeof(sed->ed.ed_flags),
3125 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3126 1.168 augustss if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
3127 1.168 augustss (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
3128 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
3129 1.1 augustss
3130 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
3131 1.172 christos continue;
3132 1.53 augustss #ifdef DIAGNOSTIC
3133 1.173 christos if (p == NULL)
3134 1.128 provos panic("ohci_device_intr_close: ED not found");
3135 1.53 augustss #endif
3136 1.173 christos p->next = sed->next;
3137 1.173 christos p->ed.ed_nexted = sed->ed.ed_nexted;
3138 1.195 bouyer usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
3139 1.195 bouyer sizeof(p->ed.ed_nexted),
3140 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3141 1.1 augustss
3142 1.1 augustss for (j = 0; j < nslots; j++)
3143 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
3144 1.1 augustss
3145 1.60 augustss ohci_free_std(sc, opipe->tail.td);
3146 1.1 augustss ohci_free_sed(sc, opipe->sed);
3147 1.1 augustss }
3148 1.1 augustss
3149 1.82 augustss Static usbd_status
3150 1.91 augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
3151 1.1 augustss {
3152 1.224 mrg int i, j, best;
3153 1.1 augustss u_int npoll, slow, shigh, nslots;
3154 1.1 augustss u_int bestbw, bw;
3155 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
3156 1.1 augustss
3157 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
3158 1.254.2.18 skrll
3159 1.254.2.18 skrll DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0);
3160 1.1 augustss if (ival == 0) {
3161 1.1 augustss printf("ohci_setintr: 0 interval\n");
3162 1.254.2.13 skrll return USBD_INVAL;
3163 1.1 augustss }
3164 1.1 augustss
3165 1.1 augustss npoll = OHCI_NO_INTRS;
3166 1.1 augustss while (npoll > ival)
3167 1.1 augustss npoll /= 2;
3168 1.254.2.18 skrll DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0);
3169 1.1 augustss
3170 1.1 augustss /*
3171 1.1 augustss * We now know which level in the tree the ED must go into.
3172 1.1 augustss * Figure out which slot has most bandwidth left over.
3173 1.1 augustss * Slots to examine:
3174 1.1 augustss * npoll
3175 1.1 augustss * 1 0
3176 1.1 augustss * 2 1 2
3177 1.1 augustss * 4 3 4 5 6
3178 1.1 augustss * 8 7 8 9 10 11 12 13 14
3179 1.1 augustss * N (N-1) .. (N-1+N-1)
3180 1.1 augustss */
3181 1.1 augustss slow = npoll-1;
3182 1.1 augustss shigh = slow + npoll;
3183 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
3184 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
3185 1.1 augustss bw = 0;
3186 1.1 augustss for (j = 0; j < nslots; j++)
3187 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
3188 1.1 augustss if (bw < bestbw) {
3189 1.1 augustss best = i;
3190 1.1 augustss bestbw = bw;
3191 1.1 augustss }
3192 1.1 augustss }
3193 1.254.2.18 skrll DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw);
3194 1.1 augustss
3195 1.224 mrg mutex_enter(&sc->sc_lock);
3196 1.1 augustss hsed = sc->sc_eds[best];
3197 1.1 augustss sed->next = hsed->next;
3198 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3199 1.195 bouyer sizeof(hsed->ed.ed_flags),
3200 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3201 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
3202 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3203 1.195 bouyer sizeof(sed->ed.ed_flags),
3204 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3205 1.1 augustss hsed->next = sed;
3206 1.168 augustss hsed->ed.ed_nexted = HTOO32(sed->physaddr);
3207 1.195 bouyer usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
3208 1.195 bouyer sizeof(hsed->ed.ed_flags),
3209 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3210 1.224 mrg mutex_exit(&sc->sc_lock);
3211 1.1 augustss
3212 1.1 augustss for (j = 0; j < nslots; j++)
3213 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
3214 1.1 augustss opipe->u.intr.nslots = nslots;
3215 1.1 augustss opipe->u.intr.pos = best;
3216 1.1 augustss
3217 1.254.2.18 skrll DPRINTFN(5, "returns %p", opipe, 0, 0, 0);
3218 1.254.2.13 skrll return USBD_NORMAL_COMPLETION;
3219 1.60 augustss }
3220 1.60 augustss
3221 1.60 augustss /***********************/
3222 1.60 augustss
3223 1.60 augustss usbd_status
3224 1.254.2.19 skrll ohci_device_isoc_transfer(struct usbd_xfer *xfer)
3225 1.60 augustss {
3226 1.254.2.7 skrll ohci_softc_t *sc = xfer->ux_pipe->up_dev->ud_bus->ub_hcpriv;
3227 1.60 augustss usbd_status err;
3228 1.60 augustss
3229 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
3230 1.254.2.18 skrll
3231 1.254.2.18 skrll DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
3232 1.60 augustss
3233 1.60 augustss /* Put it on our queue, */
3234 1.224 mrg mutex_enter(&sc->sc_lock);
3235 1.60 augustss err = usb_insert_transfer(xfer);
3236 1.224 mrg mutex_exit(&sc->sc_lock);
3237 1.60 augustss
3238 1.60 augustss /* bail out on error, */
3239 1.60 augustss if (err && err != USBD_IN_PROGRESS)
3240 1.254.2.13 skrll return err;
3241 1.60 augustss
3242 1.60 augustss /* XXX should check inuse here */
3243 1.60 augustss
3244 1.60 augustss /* insert into schedule, */
3245 1.60 augustss ohci_device_isoc_enter(xfer);
3246 1.60 augustss
3247 1.83 augustss /* and start if the pipe wasn't running */
3248 1.60 augustss if (!err)
3249 1.254.2.7 skrll ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
3250 1.60 augustss
3251 1.254.2.13 skrll return err;
3252 1.60 augustss }
3253 1.60 augustss
3254 1.60 augustss void
3255 1.254.2.19 skrll ohci_device_isoc_enter(struct usbd_xfer *xfer)
3256 1.60 augustss {
3257 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
3258 1.254.2.19 skrll struct usbd_device *dev = opipe->pipe.up_dev;
3259 1.254.2.7 skrll ohci_softc_t *sc = dev->ud_bus->ub_hcpriv;
3260 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
3261 1.61 augustss struct iso *iso = &opipe->u.iso;
3262 1.120 augustss ohci_soft_itd_t *sitd, *nsitd;
3263 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
3264 1.61 augustss int i, ncur, nframes;
3265 1.61 augustss
3266 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
3267 1.254.2.18 skrll
3268 1.254.2.18 skrll DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d",
3269 1.254.2.18 skrll iso->inuse, iso->next, xfer, xfer->ux_nframes);
3270 1.83 augustss
3271 1.83 augustss if (sc->sc_dying)
3272 1.83 augustss return;
3273 1.83 augustss
3274 1.83 augustss if (iso->next == -1) {
3275 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
3276 1.168 augustss iso->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
3277 1.254.2.18 skrll DPRINTFN(2,"start next=%d", iso->next, 0, 0, 0);
3278 1.83 augustss }
3279 1.83 augustss
3280 1.61 augustss sitd = opipe->tail.itd;
3281 1.254.2.7 skrll buf = DMAADDR(&xfer->ux_dmabuf, 0);
3282 1.83 augustss bp0 = OHCI_PAGE(buf);
3283 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
3284 1.254.2.7 skrll nframes = xfer->ux_nframes;
3285 1.254.2.7 skrll xfer->ux_hcpriv = sitd;
3286 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
3287 1.254.2.7 skrll noffs = offs + xfer->ux_frlengths[i];
3288 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3289 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3290 1.120 augustss
3291 1.83 augustss /* Allocate next ITD */
3292 1.224 mrg mutex_enter(&sc->sc_lock);
3293 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3294 1.224 mrg mutex_exit(&sc->sc_lock);
3295 1.61 augustss if (nsitd == NULL) {
3296 1.61 augustss /* XXX what now? */
3297 1.83 augustss printf("%s: isoc TD alloc failed\n",
3298 1.190 drochner device_xname(sc->sc_dev));
3299 1.61 augustss return;
3300 1.61 augustss }
3301 1.83 augustss
3302 1.83 augustss /* Fill current ITD */
3303 1.168 augustss sitd->itd.itd_flags = HTOO32(
3304 1.120 augustss OHCI_ITD_NOCC |
3305 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3306 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
3307 1.83 augustss OHCI_ITD_SET_FC(ncur));
3308 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3309 1.83 augustss sitd->nextitd = nsitd;
3310 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3311 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3312 1.83 augustss sitd->xfer = xfer;
3313 1.83 augustss sitd->flags = 0;
3314 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3315 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3316 1.83 augustss
3317 1.61 augustss sitd = nsitd;
3318 1.120 augustss iso->next = iso->next + ncur;
3319 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
3320 1.61 augustss ncur = 0;
3321 1.61 augustss }
3322 1.168 augustss sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
3323 1.83 augustss offs = noffs;
3324 1.61 augustss }
3325 1.224 mrg mutex_enter(&sc->sc_lock);
3326 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3327 1.224 mrg mutex_exit(&sc->sc_lock);
3328 1.61 augustss if (nsitd == NULL) {
3329 1.61 augustss /* XXX what now? */
3330 1.120 augustss printf("%s: isoc TD alloc failed\n",
3331 1.190 drochner device_xname(sc->sc_dev));
3332 1.61 augustss return;
3333 1.61 augustss }
3334 1.83 augustss /* Fixup last used ITD */
3335 1.168 augustss sitd->itd.itd_flags = HTOO32(
3336 1.120 augustss OHCI_ITD_NOCC |
3337 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3338 1.61 augustss OHCI_ITD_SET_DI(0) |
3339 1.61 augustss OHCI_ITD_SET_FC(ncur));
3340 1.168 augustss sitd->itd.itd_bp0 = HTOO32(bp0);
3341 1.83 augustss sitd->nextitd = nsitd;
3342 1.168 augustss sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
3343 1.168 augustss sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
3344 1.83 augustss sitd->xfer = xfer;
3345 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3346 1.195 bouyer usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
3347 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3348 1.83 augustss
3349 1.61 augustss iso->next = iso->next + ncur;
3350 1.83 augustss iso->inuse += nframes;
3351 1.83 augustss
3352 1.254.2.7 skrll xfer->ux_actlen = offs; /* XXX pretend we did it all */
3353 1.83 augustss
3354 1.254.2.7 skrll xfer->ux_status = USBD_IN_PROGRESS;
3355 1.83 augustss
3356 1.83 augustss #ifdef OHCI_DEBUG
3357 1.83 augustss if (ohcidebug > 5) {
3358 1.254.2.18 skrll DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number),
3359 1.254.2.18 skrll 0, 0, 0);
3360 1.254.2.7 skrll ohci_dump_itds(sc, xfer->ux_hcpriv);
3361 1.168 augustss ohci_dump_ed(sc, sed);
3362 1.83 augustss }
3363 1.83 augustss #endif
3364 1.61 augustss
3365 1.224 mrg mutex_enter(&sc->sc_lock);
3366 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3367 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3368 1.168 augustss sed->ed.ed_tailp = HTOO32(nsitd->physaddr);
3369 1.61 augustss opipe->tail.itd = nsitd;
3370 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
3371 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3372 1.195 bouyer sizeof(sed->ed.ed_flags),
3373 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3374 1.224 mrg mutex_exit(&sc->sc_lock);
3375 1.83 augustss
3376 1.83 augustss #ifdef OHCI_DEBUG
3377 1.83 augustss if (ohcidebug > 5) {
3378 1.83 augustss delay(150000);
3379 1.254.2.18 skrll DPRINTF("after frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number),
3380 1.254.2.18 skrll 0, 0, 0);
3381 1.254.2.7 skrll ohci_dump_itds(sc, xfer->ux_hcpriv);
3382 1.168 augustss ohci_dump_ed(sc, sed);
3383 1.83 augustss }
3384 1.83 augustss #endif
3385 1.60 augustss }
3386 1.60 augustss
3387 1.60 augustss usbd_status
3388 1.254.2.19 skrll ohci_device_isoc_start(struct usbd_xfer *xfer)
3389 1.60 augustss {
3390 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
3391 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
3392 1.83 augustss
3393 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
3394 1.254.2.18 skrll DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
3395 1.83 augustss
3396 1.224 mrg mutex_enter(&sc->sc_lock);
3397 1.224 mrg
3398 1.224 mrg if (sc->sc_dying) {
3399 1.224 mrg mutex_exit(&sc->sc_lock);
3400 1.254.2.13 skrll return USBD_IOERROR;
3401 1.224 mrg }
3402 1.83 augustss
3403 1.83 augustss #ifdef DIAGNOSTIC
3404 1.254.2.7 skrll if (xfer->ux_status != USBD_IN_PROGRESS)
3405 1.121 tsutsui printf("ohci_device_isoc_start: not in progress %p\n", xfer);
3406 1.83 augustss #endif
3407 1.83 augustss
3408 1.83 augustss /* XXX anything to do? */
3409 1.83 augustss
3410 1.224 mrg mutex_exit(&sc->sc_lock);
3411 1.224 mrg
3412 1.254.2.13 skrll return USBD_IN_PROGRESS;
3413 1.60 augustss }
3414 1.60 augustss
3415 1.60 augustss void
3416 1.254.2.19 skrll ohci_device_isoc_abort(struct usbd_xfer *xfer)
3417 1.60 augustss {
3418 1.254.2.7 skrll struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->ux_pipe;
3419 1.254.2.7 skrll ohci_softc_t *sc = opipe->pipe.up_dev->ud_bus->ub_hcpriv;
3420 1.83 augustss ohci_soft_ed_t *sed;
3421 1.83 augustss ohci_soft_itd_t *sitd;
3422 1.83 augustss
3423 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
3424 1.254.2.18 skrll DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0);
3425 1.83 augustss
3426 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3427 1.83 augustss
3428 1.83 augustss /* Transfer is already done. */
3429 1.254.2.7 skrll if (xfer->ux_status != USBD_NOT_STARTED &&
3430 1.254.2.7 skrll xfer->ux_status != USBD_IN_PROGRESS) {
3431 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3432 1.224 mrg goto done;
3433 1.83 augustss }
3434 1.83 augustss
3435 1.83 augustss /* Give xfer the requested abort code. */
3436 1.254.2.7 skrll xfer->ux_status = USBD_CANCELLED;
3437 1.83 augustss
3438 1.83 augustss sed = opipe->sed;
3439 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3440 1.195 bouyer BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
3441 1.168 augustss sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
3442 1.195 bouyer usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
3443 1.195 bouyer sizeof(sed->ed.ed_flags),
3444 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3445 1.83 augustss
3446 1.254.2.7 skrll sitd = xfer->ux_hcpriv;
3447 1.83 augustss #ifdef DIAGNOSTIC
3448 1.83 augustss if (sitd == NULL) {
3449 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3450 1.224 mrg goto done;
3451 1.83 augustss }
3452 1.83 augustss #endif
3453 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3454 1.83 augustss #ifdef DIAGNOSTIC
3455 1.254.2.18 skrll DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0);
3456 1.83 augustss sitd->isdone = 1;
3457 1.83 augustss #endif
3458 1.83 augustss }
3459 1.83 augustss
3460 1.224 mrg usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
3461 1.83 augustss
3462 1.83 augustss /* Run callback. */
3463 1.83 augustss usb_transfer_complete(xfer);
3464 1.83 augustss
3465 1.168 augustss sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
3466 1.168 augustss sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
3467 1.195 bouyer usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
3468 1.195 bouyer BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
3469 1.83 augustss
3470 1.224 mrg done:
3471 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3472 1.60 augustss }
3473 1.60 augustss
3474 1.60 augustss void
3475 1.254.2.19 skrll ohci_device_isoc_done(struct usbd_xfer *xfer)
3476 1.60 augustss {
3477 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
3478 1.254.2.18 skrll DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0);
3479 1.60 augustss }
3480 1.60 augustss
3481 1.60 augustss usbd_status
3482 1.254.2.19 skrll ohci_setup_isoc(struct usbd_pipe *pipe)
3483 1.60 augustss {
3484 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3485 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
3486 1.60 augustss struct iso *iso = &opipe->u.iso;
3487 1.60 augustss
3488 1.60 augustss iso->next = -1;
3489 1.60 augustss iso->inuse = 0;
3490 1.60 augustss
3491 1.224 mrg mutex_enter(&sc->sc_lock);
3492 1.168 augustss ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
3493 1.224 mrg mutex_exit(&sc->sc_lock);
3494 1.83 augustss
3495 1.254.2.13 skrll return USBD_NORMAL_COMPLETION;
3496 1.60 augustss }
3497 1.60 augustss
3498 1.60 augustss void
3499 1.254.2.19 skrll ohci_device_isoc_close(struct usbd_pipe *pipe)
3500 1.60 augustss {
3501 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3502 1.254.2.7 skrll ohci_softc_t *sc = pipe->up_dev->ud_bus->ub_hcpriv;
3503 1.60 augustss
3504 1.224 mrg KASSERT(mutex_owned(&sc->sc_lock));
3505 1.224 mrg
3506 1.254.2.18 skrll OHCIHIST_FUNC(); OHCIHIST_CALLED();
3507 1.254.2.18 skrll DPRINTF("pipe=%p", pipe, 0, 0, 0);
3508 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3509 1.83 augustss #ifdef DIAGNOSTIC
3510 1.83 augustss opipe->tail.itd->isdone = 1;
3511 1.83 augustss #endif
3512 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3513 1.1 augustss }
3514