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ohci.c revision 1.254.2.57
      1  1.254.2.57     skrll /*	$NetBSD: ohci.c,v 1.254.2.57 2016/03/09 08:00:22 skrll Exp $	*/
      2         1.1  augustss 
      3         1.1  augustss /*
      4       1.224       mrg  * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
      5         1.1  augustss  * All rights reserved.
      6         1.1  augustss  *
      7        1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8        1.89  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9       1.224       mrg  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10       1.224       mrg  * and Matthew R. Green (mrg (at) eterna.com.au).
     11       1.157   mycroft  * This code is derived from software contributed to The NetBSD Foundation
     12       1.157   mycroft  * by Charles M. Hannum.
     13         1.1  augustss  *
     14         1.1  augustss  * Redistribution and use in source and binary forms, with or without
     15         1.1  augustss  * modification, are permitted provided that the following conditions
     16         1.1  augustss  * are met:
     17         1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     18         1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     19         1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     20         1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     21         1.1  augustss  *    documentation and/or other materials provided with the distribution.
     22         1.1  augustss  *
     23         1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24         1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25         1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26         1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27         1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28         1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29         1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30         1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31         1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32         1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33         1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     34         1.1  augustss  */
     35         1.1  augustss 
     36         1.1  augustss /*
     37         1.1  augustss  * USB Open Host Controller driver.
     38         1.1  augustss  *
     39        1.96  augustss  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
     40       1.201  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     41         1.1  augustss  */
     42       1.108     lukem 
     43       1.108     lukem #include <sys/cdefs.h>
     44  1.254.2.57     skrll __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.254.2.57 2016/03/09 08:00:22 skrll Exp $");
     45  1.254.2.18     skrll 
     46  1.254.2.18     skrll #include "opt_usb.h"
     47         1.1  augustss 
     48         1.1  augustss #include <sys/param.h>
     49  1.254.2.17     skrll 
     50  1.254.2.17     skrll #include <sys/cpu.h>
     51         1.1  augustss #include <sys/device.h>
     52  1.254.2.17     skrll #include <sys/kernel.h>
     53  1.254.2.17     skrll #include <sys/kmem.h>
     54         1.1  augustss #include <sys/proc.h>
     55         1.1  augustss #include <sys/queue.h>
     56  1.254.2.17     skrll #include <sys/select.h>
     57  1.254.2.18     skrll #include <sys/sysctl.h>
     58  1.254.2.17     skrll #include <sys/systm.h>
     59         1.1  augustss 
     60        1.16  augustss #include <machine/endian.h>
     61         1.4  augustss 
     62         1.1  augustss #include <dev/usb/usb.h>
     63         1.1  augustss #include <dev/usb/usbdi.h>
     64         1.1  augustss #include <dev/usb/usbdivar.h>
     65        1.38  augustss #include <dev/usb/usb_mem.h>
     66         1.1  augustss #include <dev/usb/usb_quirks.h>
     67         1.1  augustss 
     68         1.1  augustss #include <dev/usb/ohcireg.h>
     69         1.1  augustss #include <dev/usb/ohcivar.h>
     70  1.254.2.11     skrll #include <dev/usb/usbroothub.h>
     71  1.254.2.18     skrll #include <dev/usb/usbhist.h>
     72         1.1  augustss 
     73  1.254.2.18     skrll #ifdef USB_DEBUG
     74  1.254.2.18     skrll #ifndef OHCI_DEBUG
     75  1.254.2.18     skrll #define ohcidebug 0
     76  1.254.2.18     skrll #else
     77  1.254.2.18     skrll static int ohcidebug = 0;
     78         1.1  augustss 
     79  1.254.2.18     skrll SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup")
     80  1.254.2.18     skrll {
     81  1.254.2.18     skrll 	int err;
     82  1.254.2.18     skrll 	const struct sysctlnode *rnode;
     83  1.254.2.18     skrll 	const struct sysctlnode *cnode;
     84  1.254.2.18     skrll 
     85  1.254.2.18     skrll 	err = sysctl_createv(clog, 0, NULL, &rnode,
     86  1.254.2.18     skrll 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci",
     87  1.254.2.18     skrll 	    SYSCTL_DESCR("ohci global controls"),
     88  1.254.2.18     skrll 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
     89        1.36  augustss 
     90  1.254.2.18     skrll 	if (err)
     91  1.254.2.18     skrll 		goto fail;
     92  1.254.2.18     skrll 
     93  1.254.2.18     skrll 	/* control debugging printfs */
     94  1.254.2.18     skrll 	err = sysctl_createv(clog, 0, &rnode, &cnode,
     95  1.254.2.18     skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
     96  1.254.2.18     skrll 	    "debug", SYSCTL_DESCR("Enable debugging output"),
     97  1.254.2.18     skrll 	    NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL);
     98  1.254.2.18     skrll 	if (err)
     99  1.254.2.18     skrll 		goto fail;
    100  1.254.2.18     skrll 
    101  1.254.2.18     skrll 	return;
    102  1.254.2.18     skrll fail:
    103  1.254.2.18     skrll 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
    104  1.254.2.18     skrll }
    105  1.254.2.18     skrll 
    106  1.254.2.18     skrll #endif /* OHCI_DEBUG */
    107  1.254.2.18     skrll #endif /* USB_DEBUG */
    108  1.254.2.18     skrll 
    109  1.254.2.18     skrll #define	DPRINTF(FMT,A,B,C,D)	USBHIST_LOG(ohcidebug,FMT,A,B,C,D)
    110  1.254.2.18     skrll #define	DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D)
    111  1.254.2.18     skrll #define	OHCIHIST_FUNC()		USBHIST_FUNC()
    112  1.254.2.18     skrll #define	OHCIHIST_CALLED(name)	USBHIST_CALLED(ohcidebug)
    113        1.52  augustss 
    114        1.16  augustss #if BYTE_ORDER == BIG_ENDIAN
    115       1.169      tron #define	SWAP_ENDIAN	OHCI_LITTLE_ENDIAN
    116        1.16  augustss #else
    117       1.169      tron #define	SWAP_ENDIAN	OHCI_BIG_ENDIAN
    118        1.16  augustss #endif
    119        1.16  augustss 
    120       1.169      tron #define	O16TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
    121       1.169      tron #define	O32TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
    122       1.169      tron #define	HTOO16(val)	O16TOH(val)
    123       1.169      tron #define	HTOO32(val)	O32TOH(val)
    124       1.168  augustss 
    125         1.1  augustss struct ohci_pipe;
    126         1.1  augustss 
    127        1.91  augustss Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
    128        1.91  augustss Static void		ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
    129         1.1  augustss 
    130        1.91  augustss Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
    131        1.91  augustss Static void		ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
    132  1.254.2.35     skrll Static void		ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *);
    133         1.1  augustss 
    134        1.91  augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
    135        1.91  augustss Static void		ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
    136  1.254.2.35     skrll Static void		ohci_free_sitd_locked(ohci_softc_t *,
    137  1.254.2.35     skrll 			    ohci_soft_itd_t *);
    138        1.60  augustss 
    139  1.254.2.35     skrll Static usbd_status	ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *,
    140  1.254.2.35     skrll 			    int, int);
    141  1.254.2.35     skrll Static void		ohci_free_stds(ohci_softc_t *, struct ohci_xfer *);
    142  1.254.2.35     skrll 
    143  1.254.2.35     skrll Static void		ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *,
    144  1.254.2.35     skrll 			    int, int, ohci_soft_td_t *, ohci_soft_td_t **);
    145        1.53  augustss 
    146  1.254.2.19     skrll Static usbd_status	ohci_open(struct usbd_pipe *);
    147        1.91  augustss Static void		ohci_poll(struct usbd_bus *);
    148        1.99  augustss Static void		ohci_softintr(void *);
    149  1.254.2.19     skrll Static void		ohci_waitintr(ohci_softc_t *, struct usbd_xfer *);
    150  1.254.2.19     skrll Static void		ohci_rhsc(ohci_softc_t *, struct usbd_xfer *);
    151  1.254.2.15     skrll Static void		ohci_rhsc_softint(void *);
    152        1.91  augustss 
    153       1.168  augustss Static void		ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
    154       1.168  augustss 			    ohci_soft_ed_t *);
    155       1.168  augustss 
    156       1.224       mrg Static void		ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
    157       1.224       mrg 				    ohci_soft_ed_t *);
    158        1.91  augustss Static void		ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
    159        1.91  augustss Static void		ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
    160        1.91  augustss Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
    161        1.91  augustss Static void		ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
    162        1.91  augustss Static void		ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
    163        1.91  augustss Static ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
    164        1.91  augustss 
    165  1.254.2.19     skrll Static usbd_status	ohci_setup_isoc(struct usbd_pipe *);
    166  1.254.2.19     skrll Static void		ohci_device_isoc_enter(struct usbd_xfer *);
    167        1.91  augustss 
    168  1.254.2.23     skrll Static struct usbd_xfer *
    169  1.254.2.23     skrll 			ohci_allocx(struct usbd_bus *, unsigned int);
    170  1.254.2.19     skrll Static void		ohci_freex(struct usbd_bus *, struct usbd_xfer *);
    171       1.224       mrg Static void		ohci_get_lock(struct usbd_bus *, kmutex_t **);
    172  1.254.2.13     skrll Static int		ohci_roothub_ctrl(struct usbd_bus *,
    173  1.254.2.26     skrll 			    usb_device_request_t *, void *, int);
    174        1.91  augustss 
    175  1.254.2.19     skrll Static usbd_status	ohci_root_intr_transfer(struct usbd_xfer *);
    176  1.254.2.19     skrll Static usbd_status	ohci_root_intr_start(struct usbd_xfer *);
    177  1.254.2.19     skrll Static void		ohci_root_intr_abort(struct usbd_xfer *);
    178  1.254.2.19     skrll Static void		ohci_root_intr_close(struct usbd_pipe *);
    179  1.254.2.19     skrll Static void		ohci_root_intr_done(struct usbd_xfer *);
    180  1.254.2.19     skrll 
    181  1.254.2.35     skrll Static int		ohci_device_ctrl_init(struct usbd_xfer *);
    182  1.254.2.35     skrll Static void		ohci_device_ctrl_fini(struct usbd_xfer *);
    183  1.254.2.19     skrll Static usbd_status	ohci_device_ctrl_transfer(struct usbd_xfer *);
    184  1.254.2.19     skrll Static usbd_status	ohci_device_ctrl_start(struct usbd_xfer *);
    185  1.254.2.19     skrll Static void		ohci_device_ctrl_abort(struct usbd_xfer *);
    186  1.254.2.19     skrll Static void		ohci_device_ctrl_close(struct usbd_pipe *);
    187  1.254.2.19     skrll Static void		ohci_device_ctrl_done(struct usbd_xfer *);
    188  1.254.2.19     skrll 
    189  1.254.2.35     skrll Static int		ohci_device_bulk_init(struct usbd_xfer *);
    190  1.254.2.35     skrll Static void		ohci_device_bulk_fini(struct usbd_xfer *);
    191  1.254.2.19     skrll Static usbd_status	ohci_device_bulk_transfer(struct usbd_xfer *);
    192  1.254.2.19     skrll Static usbd_status	ohci_device_bulk_start(struct usbd_xfer *);
    193  1.254.2.19     skrll Static void		ohci_device_bulk_abort(struct usbd_xfer *);
    194  1.254.2.19     skrll Static void		ohci_device_bulk_close(struct usbd_pipe *);
    195  1.254.2.19     skrll Static void		ohci_device_bulk_done(struct usbd_xfer *);
    196  1.254.2.19     skrll 
    197  1.254.2.35     skrll Static int		ohci_device_intr_init(struct usbd_xfer *);
    198  1.254.2.35     skrll Static void		ohci_device_intr_fini(struct usbd_xfer *);
    199  1.254.2.19     skrll Static usbd_status	ohci_device_intr_transfer(struct usbd_xfer *);
    200  1.254.2.19     skrll Static usbd_status	ohci_device_intr_start(struct usbd_xfer *);
    201  1.254.2.19     skrll Static void		ohci_device_intr_abort(struct usbd_xfer *);
    202  1.254.2.19     skrll Static void		ohci_device_intr_close(struct usbd_pipe *);
    203  1.254.2.19     skrll Static void		ohci_device_intr_done(struct usbd_xfer *);
    204  1.254.2.19     skrll 
    205  1.254.2.35     skrll Static int		ohci_device_isoc_init(struct usbd_xfer *);
    206  1.254.2.35     skrll Static void		ohci_device_isoc_fini(struct usbd_xfer *);
    207  1.254.2.19     skrll Static usbd_status	ohci_device_isoc_transfer(struct usbd_xfer *);
    208  1.254.2.19     skrll Static usbd_status	ohci_device_isoc_start(struct usbd_xfer *);
    209  1.254.2.19     skrll Static void		ohci_device_isoc_abort(struct usbd_xfer *);
    210  1.254.2.19     skrll Static void		ohci_device_isoc_close(struct usbd_pipe *);
    211  1.254.2.19     skrll Static void		ohci_device_isoc_done(struct usbd_xfer *);
    212        1.91  augustss 
    213  1.254.2.15     skrll Static usbd_status	ohci_device_setintr(ohci_softc_t *,
    214  1.254.2.15     skrll 			    struct ohci_pipe *, int);
    215        1.91  augustss 
    216        1.91  augustss Static void		ohci_timeout(void *);
    217       1.114  augustss Static void		ohci_timeout_task(void *);
    218       1.104  augustss Static void		ohci_rhsc_enable(void *);
    219        1.91  augustss 
    220  1.254.2.19     skrll Static void		ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *);
    221  1.254.2.19     skrll Static void		ohci_abort_xfer(struct usbd_xfer *, usbd_status);
    222        1.53  augustss 
    223  1.254.2.19     skrll Static void		ohci_device_clear_toggle(struct usbd_pipe *);
    224  1.254.2.19     skrll Static void		ohci_noop(struct usbd_pipe *);
    225        1.37  augustss 
    226        1.52  augustss #ifdef OHCI_DEBUG
    227        1.91  augustss Static void		ohci_dumpregs(ohci_softc_t *);
    228       1.168  augustss Static void		ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
    229       1.168  augustss Static void		ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
    230       1.168  augustss Static void		ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
    231       1.168  augustss Static void		ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
    232       1.168  augustss Static void		ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
    233         1.1  augustss #endif
    234         1.1  augustss 
    235        1.88  augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    236        1.88  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    237        1.88  augustss #define OWRITE1(sc, r, x) \
    238        1.88  augustss  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    239        1.88  augustss #define OWRITE2(sc, r, x) \
    240        1.88  augustss  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    241        1.88  augustss #define OWRITE4(sc, r, x) \
    242        1.88  augustss  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    243       1.174       mrg 
    244       1.174       mrg static __inline uint32_t
    245       1.174       mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
    246       1.174       mrg {
    247       1.174       mrg 
    248       1.174       mrg 	OBARR(sc);
    249       1.174       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    250       1.174       mrg }
    251         1.1  augustss 
    252         1.1  augustss /* Reverse the bits in a value 0 .. 31 */
    253   1.254.2.1     skrll Static uint8_t revbits[OHCI_NO_INTRS] =
    254         1.1  augustss   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
    255         1.1  augustss     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
    256         1.1  augustss     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
    257         1.1  augustss     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
    258         1.1  augustss 
    259         1.1  augustss struct ohci_pipe {
    260         1.1  augustss 	struct usbd_pipe pipe;
    261         1.1  augustss 	ohci_soft_ed_t *sed;
    262        1.60  augustss 	union {
    263        1.60  augustss 		ohci_soft_td_t *td;
    264        1.60  augustss 		ohci_soft_itd_t *itd;
    265        1.60  augustss 	} tail;
    266         1.1  augustss 	/* Info needed for different pipe kinds. */
    267         1.1  augustss 	union {
    268         1.1  augustss 		/* Control pipe */
    269         1.1  augustss 		struct {
    270         1.4  augustss 			usb_dma_t reqdma;
    271  1.254.2.21     skrll 		} ctrl;
    272         1.1  augustss 		/* Interrupt pipe */
    273         1.1  augustss 		struct {
    274         1.1  augustss 			int nslots;
    275         1.1  augustss 			int pos;
    276         1.1  augustss 		} intr;
    277  1.254.2.21     skrll 		/* Isochronous pipe */
    278  1.254.2.21     skrll 		struct isoc {
    279        1.60  augustss 			int next, inuse;
    280  1.254.2.21     skrll 		} isoc;
    281  1.254.2.21     skrll 	};
    282         1.1  augustss };
    283         1.1  augustss 
    284       1.182  drochner Static const struct usbd_bus_methods ohci_bus_methods = {
    285   1.254.2.5     skrll 	.ubm_open =	ohci_open,
    286   1.254.2.5     skrll 	.ubm_softint =	ohci_softintr,
    287   1.254.2.5     skrll 	.ubm_dopoll =	ohci_poll,
    288   1.254.2.5     skrll 	.ubm_allocx =	ohci_allocx,
    289   1.254.2.5     skrll 	.ubm_freex =	ohci_freex,
    290   1.254.2.5     skrll 	.ubm_getlock =	ohci_get_lock,
    291  1.254.2.12     skrll 	.ubm_rhctrl =	ohci_roothub_ctrl,
    292         1.1  augustss };
    293         1.1  augustss 
    294       1.182  drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
    295   1.254.2.5     skrll 	.upm_transfer =	ohci_root_intr_transfer,
    296   1.254.2.5     skrll 	.upm_start =	ohci_root_intr_start,
    297   1.254.2.5     skrll 	.upm_abort =	ohci_root_intr_abort,
    298   1.254.2.5     skrll 	.upm_close =	ohci_root_intr_close,
    299   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_noop,
    300   1.254.2.5     skrll 	.upm_done =	ohci_root_intr_done,
    301         1.1  augustss };
    302         1.1  augustss 
    303       1.182  drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
    304  1.254.2.35     skrll 	.upm_init =	ohci_device_ctrl_init,
    305  1.254.2.35     skrll 	.upm_fini =	ohci_device_ctrl_fini,
    306   1.254.2.5     skrll 	.upm_transfer =	ohci_device_ctrl_transfer,
    307   1.254.2.5     skrll 	.upm_start =	ohci_device_ctrl_start,
    308   1.254.2.5     skrll 	.upm_abort =	ohci_device_ctrl_abort,
    309   1.254.2.5     skrll 	.upm_close =	ohci_device_ctrl_close,
    310   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_noop,
    311   1.254.2.5     skrll 	.upm_done =	ohci_device_ctrl_done,
    312         1.1  augustss };
    313         1.1  augustss 
    314       1.182  drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
    315  1.254.2.35     skrll 	.upm_init =	ohci_device_intr_init,
    316  1.254.2.35     skrll 	.upm_fini =	ohci_device_intr_fini,
    317   1.254.2.5     skrll 	.upm_transfer =	ohci_device_intr_transfer,
    318   1.254.2.5     skrll 	.upm_start =	ohci_device_intr_start,
    319   1.254.2.5     skrll 	.upm_abort =	ohci_device_intr_abort,
    320   1.254.2.5     skrll 	.upm_close =	ohci_device_intr_close,
    321   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_device_clear_toggle,
    322   1.254.2.5     skrll 	.upm_done =	ohci_device_intr_done,
    323         1.1  augustss };
    324         1.1  augustss 
    325       1.182  drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
    326  1.254.2.35     skrll 	.upm_init =	ohci_device_bulk_init,
    327  1.254.2.35     skrll 	.upm_fini =	ohci_device_bulk_fini,
    328   1.254.2.5     skrll 	.upm_transfer =	ohci_device_bulk_transfer,
    329   1.254.2.5     skrll 	.upm_start =	ohci_device_bulk_start,
    330   1.254.2.5     skrll 	.upm_abort =	ohci_device_bulk_abort,
    331   1.254.2.5     skrll 	.upm_close =	ohci_device_bulk_close,
    332   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_device_clear_toggle,
    333   1.254.2.5     skrll 	.upm_done =	ohci_device_bulk_done,
    334         1.3  augustss };
    335         1.3  augustss 
    336       1.182  drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
    337  1.254.2.35     skrll 	.upm_init =	ohci_device_isoc_init,
    338  1.254.2.35     skrll 	.upm_fini =	ohci_device_isoc_fini,
    339   1.254.2.5     skrll 	.upm_transfer =	ohci_device_isoc_transfer,
    340   1.254.2.5     skrll 	.upm_start =	ohci_device_isoc_start,
    341   1.254.2.5     skrll 	.upm_abort =	ohci_device_isoc_abort,
    342   1.254.2.5     skrll 	.upm_close =	ohci_device_isoc_close,
    343   1.254.2.5     skrll 	.upm_cleartoggle =	ohci_noop,
    344   1.254.2.5     skrll 	.upm_done =	ohci_device_isoc_done,
    345        1.43  augustss };
    346        1.43  augustss 
    347        1.47  augustss int
    348       1.189    dyoung ohci_activate(device_t self, enum devact act)
    349        1.47  augustss {
    350       1.189    dyoung 	struct ohci_softc *sc = device_private(self);
    351        1.47  augustss 
    352        1.47  augustss 	switch (act) {
    353        1.47  augustss 	case DVACT_DEACTIVATE:
    354       1.183  kiyohara 		sc->sc_dying = 1;
    355       1.203    dyoung 		return 0;
    356       1.203    dyoung 	default:
    357       1.203    dyoung 		return EOPNOTSUPP;
    358        1.47  augustss 	}
    359        1.47  augustss }
    360        1.47  augustss 
    361       1.187    dyoung void
    362       1.187    dyoung ohci_childdet(device_t self, device_t child)
    363       1.187    dyoung {
    364       1.187    dyoung 	struct ohci_softc *sc = device_private(self);
    365       1.187    dyoung 
    366       1.187    dyoung 	KASSERT(sc->sc_child == child);
    367       1.187    dyoung 	sc->sc_child = NULL;
    368       1.187    dyoung }
    369       1.187    dyoung 
    370        1.47  augustss int
    371        1.91  augustss ohci_detach(struct ohci_softc *sc, int flags)
    372        1.47  augustss {
    373        1.47  augustss 	int rv = 0;
    374        1.47  augustss 
    375        1.47  augustss 	if (sc->sc_child != NULL)
    376        1.47  augustss 		rv = config_detach(sc->sc_child, flags);
    377       1.120  augustss 
    378        1.47  augustss 	if (rv != 0)
    379  1.254.2.13     skrll 		return rv;
    380        1.47  augustss 
    381       1.254     ozaki 	callout_halt(&sc->sc_tmo_rhsc, &sc->sc_lock);
    382       1.104  augustss 
    383       1.116  augustss 	usb_delay_ms(&sc->sc_bus, 300); /* XXX let stray task complete */
    384       1.209    dyoung 	callout_destroy(&sc->sc_tmo_rhsc);
    385       1.116  augustss 
    386       1.224       mrg 	softint_disestablish(sc->sc_rhsc_si);
    387       1.224       mrg 
    388       1.224       mrg 	cv_destroy(&sc->sc_softwake_cv);
    389       1.224       mrg 
    390       1.224       mrg 	mutex_destroy(&sc->sc_lock);
    391       1.224       mrg 	mutex_destroy(&sc->sc_intr_lock);
    392       1.224       mrg 
    393       1.198    cegger 	if (sc->sc_hcca != NULL)
    394       1.198    cegger 		usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
    395       1.232  christos 	pool_cache_destroy(sc->sc_xferpool);
    396        1.47  augustss 
    397  1.254.2.13     skrll 	return rv;
    398        1.47  augustss }
    399        1.47  augustss 
    400         1.1  augustss ohci_soft_ed_t *
    401        1.91  augustss ohci_alloc_sed(ohci_softc_t *sc)
    402         1.1  augustss {
    403         1.1  augustss 	ohci_soft_ed_t *sed;
    404        1.53  augustss 	usbd_status err;
    405         1.1  augustss 	int i, offs;
    406         1.4  augustss 	usb_dma_t dma;
    407         1.1  augustss 
    408  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    409  1.254.2.18     skrll 
    410  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
    411        1.53  augustss 	if (sc->sc_freeeds == NULL) {
    412  1.254.2.18     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    413  1.254.2.35     skrll 		mutex_exit(&sc->sc_lock);
    414  1.254.2.35     skrll 
    415        1.53  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
    416        1.53  augustss 			  OHCI_ED_ALIGN, &dma);
    417        1.53  augustss 		if (err)
    418  1.254.2.13     skrll 			return 0;
    419  1.254.2.35     skrll 
    420  1.254.2.35     skrll 		mutex_enter(&sc->sc_lock);
    421       1.225     skrll 		for (i = 0; i < OHCI_SED_CHUNK; i++) {
    422        1.39  augustss 			offs = i * OHCI_SED_SIZE;
    423       1.123  augustss 			sed = KERNADDR(&dma, offs);
    424       1.125  augustss 			sed->physaddr = DMAADDR(&dma, offs);
    425       1.195    bouyer 			sed->dma = dma;
    426       1.195    bouyer 			sed->offs = offs;
    427         1.1  augustss 			sed->next = sc->sc_freeeds;
    428         1.1  augustss 			sc->sc_freeeds = sed;
    429         1.1  augustss 		}
    430         1.1  augustss 	}
    431         1.1  augustss 	sed = sc->sc_freeeds;
    432         1.1  augustss 	sc->sc_freeeds = sed->next;
    433  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
    434  1.254.2.35     skrll 
    435        1.39  augustss 	memset(&sed->ed, 0, sizeof(ohci_ed_t));
    436         1.1  augustss 	sed->next = 0;
    437  1.254.2.13     skrll 	return sed;
    438         1.1  augustss }
    439         1.1  augustss 
    440  1.254.2.35     skrll static inline void
    441  1.254.2.35     skrll ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    442         1.1  augustss {
    443  1.254.2.35     skrll 
    444  1.254.2.35     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    445  1.254.2.35     skrll 
    446         1.1  augustss 	sed->next = sc->sc_freeeds;
    447         1.1  augustss 	sc->sc_freeeds = sed;
    448         1.1  augustss }
    449         1.1  augustss 
    450  1.254.2.35     skrll void
    451  1.254.2.35     skrll ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    452  1.254.2.35     skrll {
    453  1.254.2.35     skrll 
    454  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
    455  1.254.2.35     skrll 	ohci_free_sed_locked(sc, sed);
    456  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
    457  1.254.2.35     skrll }
    458  1.254.2.35     skrll 
    459         1.1  augustss ohci_soft_td_t *
    460        1.91  augustss ohci_alloc_std(ohci_softc_t *sc)
    461         1.1  augustss {
    462         1.1  augustss 	ohci_soft_td_t *std;
    463        1.53  augustss 	usbd_status err;
    464         1.1  augustss 	int i, offs;
    465         1.4  augustss 	usb_dma_t dma;
    466         1.1  augustss 
    467  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    468  1.254.2.18     skrll 
    469  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
    470        1.53  augustss 	if (sc->sc_freetds == NULL) {
    471  1.254.2.18     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    472  1.254.2.35     skrll 		mutex_exit(&sc->sc_lock);
    473  1.254.2.35     skrll 
    474        1.53  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
    475        1.53  augustss 			  OHCI_TD_ALIGN, &dma);
    476        1.53  augustss 		if (err)
    477  1.254.2.13     skrll 			return NULL;
    478  1.254.2.35     skrll 
    479  1.254.2.35     skrll 		mutex_enter(&sc->sc_lock);
    480        1.39  augustss 		for(i = 0; i < OHCI_STD_CHUNK; i++) {
    481        1.39  augustss 			offs = i * OHCI_STD_SIZE;
    482       1.123  augustss 			std = KERNADDR(&dma, offs);
    483       1.125  augustss 			std->physaddr = DMAADDR(&dma, offs);
    484       1.195    bouyer 			std->dma = dma;
    485       1.195    bouyer 			std->offs = offs;
    486         1.1  augustss 			std->nexttd = sc->sc_freetds;
    487         1.1  augustss 			sc->sc_freetds = std;
    488         1.1  augustss 		}
    489         1.1  augustss 	}
    490        1.69  augustss 
    491         1.1  augustss 	std = sc->sc_freetds;
    492         1.1  augustss 	sc->sc_freetds = std->nexttd;
    493  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
    494  1.254.2.35     skrll 
    495        1.39  augustss 	memset(&std->td, 0, sizeof(ohci_td_t));
    496        1.83  augustss 	std->nexttd = NULL;
    497        1.83  augustss 	std->xfer = NULL;
    498        1.69  augustss 
    499  1.254.2.13     skrll 	return std;
    500         1.1  augustss }
    501         1.1  augustss 
    502         1.1  augustss void
    503  1.254.2.35     skrll ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std)
    504         1.1  augustss {
    505   1.254.2.7     skrll 
    506   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    507   1.254.2.1     skrll 
    508         1.1  augustss 	std->nexttd = sc->sc_freetds;
    509         1.1  augustss 	sc->sc_freetds = std;
    510         1.1  augustss }
    511         1.1  augustss 
    512  1.254.2.35     skrll void
    513  1.254.2.35     skrll ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
    514  1.254.2.35     skrll {
    515  1.254.2.35     skrll 
    516  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
    517  1.254.2.35     skrll 	ohci_free_std_locked(sc, std);
    518  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
    519  1.254.2.35     skrll }
    520  1.254.2.35     skrll 
    521  1.254.2.35     skrll Static usbd_status
    522  1.254.2.35     skrll ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int alen, int rd)
    523        1.48  augustss {
    524  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
    525  1.254.2.35     skrll 	struct usbd_pipe *pipe = xfer->ux_pipe;
    526        1.48  augustss 	ohci_soft_td_t *next, *cur;
    527        1.48  augustss 	ohci_physaddr_t dataphys, dataphysend;
    528   1.254.2.1     skrll 	uint32_t tdflags;
    529  1.254.2.35     skrll 	int len = alen;
    530  1.254.2.35     skrll 	int curlen;
    531   1.254.2.7     skrll 	usb_dma_t *dma = &xfer->ux_dmabuf;
    532   1.254.2.7     skrll 	uint16_t flags = xfer->ux_flags;
    533        1.48  augustss 
    534  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    535       1.224       mrg 
    536  1.254.2.18     skrll 	DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d",
    537  1.254.2.35     skrll 	    pipe->up_dev->ud_addr,
    538  1.254.2.35     skrll 	    UE_GET_ADDR(pipe->up_endpoint->ue_edesc->bEndpointAddress),
    539  1.254.2.35     skrll 	    alen, pipe->up_dev->ud_speed);
    540  1.254.2.35     skrll 
    541  1.254.2.35     skrll 	ASSERT_SLEEPABLE();
    542  1.254.2.35     skrll 
    543  1.254.2.35     skrll 	size_t nstd = (flags & USBD_FORCE_SHORT_XFER) ? 1 : 0;
    544  1.254.2.35     skrll 	nstd += ((len + OHCI_PAGE_SIZE - 1) / OHCI_PAGE_SIZE);
    545  1.254.2.35     skrll 	ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd,
    546  1.254.2.35     skrll 	    KM_SLEEP);
    547  1.254.2.35     skrll 	ox->ox_nstd = nstd;
    548  1.254.2.35     skrll 	int mps = UGETW(pipe->up_endpoint->ue_edesc->wMaxPacketSize);
    549  1.254.2.35     skrll 
    550  1.254.2.35     skrll 	DPRINTFN(8, "xfer %p nstd %d mps %d", xfer, nstd, mps, 0);
    551  1.254.2.18     skrll 
    552        1.75  augustss 	len = alen;
    553  1.254.2.35     skrll 	cur = ohci_alloc_std(sc);
    554  1.254.2.35     skrll 	if (cur == NULL)
    555  1.254.2.35     skrll 		goto nomem;
    556  1.254.2.35     skrll 
    557       1.125  augustss 	dataphys = DMAADDR(dma, 0);
    558        1.48  augustss 	dataphysend = OHCI_PAGE(dataphys + len - 1);
    559       1.168  augustss 	tdflags = HTOO32(
    560       1.120  augustss 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
    561        1.77  augustss 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
    562        1.61  augustss 
    563  1.254.2.35     skrll 	for (size_t j = 0;;) {
    564  1.254.2.35     skrll 		ox->ox_stds[j++] = cur;
    565        1.48  augustss 		next = ohci_alloc_std(sc);
    566        1.75  augustss 		if (next == NULL)
    567        1.61  augustss 			goto nomem;
    568        1.48  augustss 
    569        1.48  augustss 		/* The OHCI hardware can handle at most one page crossing. */
    570        1.48  augustss 		if (OHCI_PAGE(dataphys) == dataphysend ||
    571        1.48  augustss 		    OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
    572        1.48  augustss 			/* we can handle it in this TD */
    573        1.48  augustss 			curlen = len;
    574        1.48  augustss 		} else {
    575        1.48  augustss 			/* must use multiple TDs, fill as much as possible. */
    576       1.120  augustss 			curlen = 2 * OHCI_PAGE_SIZE -
    577        1.48  augustss 				 (dataphys & (OHCI_PAGE_SIZE-1));
    578        1.78  augustss 			/* the length must be a multiple of the max size */
    579  1.254.2.35     skrll 			curlen -= curlen % mps;
    580  1.254.2.24     skrll 			KASSERT(curlen != 0);
    581        1.48  augustss 		}
    582  1.254.2.18     skrll 		DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x "
    583  1.254.2.18     skrll 		    "len=%d curlen=%d",  dataphys, dataphysend, len, curlen);
    584        1.48  augustss 		len -= curlen;
    585        1.48  augustss 
    586        1.77  augustss 		cur->td.td_flags = tdflags;
    587       1.168  augustss 		cur->td.td_cbp = HTOO32(dataphys);
    588       1.168  augustss 		cur->td.td_nexttd = HTOO32(next->physaddr);
    589       1.168  augustss 		cur->td.td_be = HTOO32(dataphys + curlen - 1);
    590  1.254.2.33     skrll 		cur->nexttd = next;
    591        1.48  augustss 		cur->len = curlen;
    592        1.48  augustss 		cur->flags = OHCI_ADD_LEN;
    593        1.77  augustss 		cur->xfer = xfer;
    594  1.254.2.35     skrll 
    595  1.254.2.18     skrll 		DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys,
    596  1.254.2.18     skrll 		    dataphys + curlen - 1, 0, 0);
    597        1.48  augustss 		if (len == 0)
    598        1.48  augustss 			break;
    599  1.254.2.18     skrll 		DPRINTFN(10, "extend chain", 0, 0, 0, 0);
    600        1.48  augustss 		dataphys += curlen;
    601        1.48  augustss 		cur = next;
    602        1.48  augustss 	}
    603       1.164  augustss 	if (!rd && (flags & USBD_FORCE_SHORT_XFER) &&
    604  1.254.2.35     skrll 	    alen % mps == 0) {
    605        1.61  augustss 		/* Force a 0 length transfer at the end. */
    606        1.75  augustss 
    607        1.75  augustss 		cur = next;
    608        1.61  augustss 		next = ohci_alloc_std(sc);
    609        1.75  augustss 		if (next == NULL)
    610        1.61  augustss 			goto nomem;
    611        1.61  augustss 
    612        1.77  augustss 		cur->td.td_flags = tdflags;
    613        1.61  augustss 		cur->td.td_cbp = 0; /* indicate 0 length packet */
    614       1.168  augustss 		cur->td.td_nexttd = HTOO32(next->physaddr);
    615        1.75  augustss 		cur->td.td_be = ~0;
    616  1.254.2.33     skrll 		cur->nexttd = next;
    617        1.61  augustss 		cur->len = 0;
    618        1.61  augustss 		cur->flags = 0;
    619        1.77  augustss 		cur->xfer = xfer;
    620  1.254.2.35     skrll 
    621  1.254.2.18     skrll 		DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0);
    622        1.61  augustss 	}
    623        1.48  augustss 
    624  1.254.2.13     skrll 	return USBD_NORMAL_COMPLETION;
    625        1.61  augustss 
    626        1.61  augustss  nomem:
    627  1.254.2.35     skrll 	ohci_free_stds(sc, ox);
    628       1.236     skrll 
    629  1.254.2.13     skrll 	return USBD_NOMEM;
    630        1.48  augustss }
    631        1.48  augustss 
    632        1.82  augustss Static void
    633  1.254.2.35     skrll ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox)
    634        1.48  augustss {
    635  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    636  1.254.2.35     skrll 	DPRINTF("ox=%p", ox, 0, 0, 0);
    637        1.48  augustss 
    638  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
    639  1.254.2.35     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
    640  1.254.2.35     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
    641  1.254.2.35     skrll 		if (std == NULL)
    642  1.254.2.35     skrll 			break;
    643  1.254.2.35     skrll 		ohci_free_std_locked(sc, std);
    644  1.254.2.35     skrll 	}
    645  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
    646  1.254.2.35     skrll }
    647  1.254.2.35     skrll 
    648  1.254.2.35     skrll void
    649  1.254.2.35     skrll ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer,
    650  1.254.2.35     skrll     int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep)
    651  1.254.2.35     skrll {
    652  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
    653  1.254.2.35     skrll 	ohci_soft_td_t *next, *cur;
    654  1.254.2.35     skrll 	ohci_physaddr_t dataphys, dataphysend;
    655  1.254.2.35     skrll 	uint32_t tdflags;
    656  1.254.2.35     skrll 	int len, curlen;
    657  1.254.2.35     skrll 	usb_dma_t *dma = &xfer->ux_dmabuf;
    658  1.254.2.35     skrll 	uint16_t flags = xfer->ux_flags;
    659  1.254.2.35     skrll 
    660  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    661  1.254.2.35     skrll 	DPRINTF("start len=%d", alen, 0, 0, 0);
    662  1.254.2.35     skrll 
    663  1.254.2.35     skrll 	KASSERT(mutex_owned(&sc->sc_lock));
    664  1.254.2.35     skrll 
    665  1.254.2.35     skrll 	DPRINTFN(8, "addr=%d endpt=%d len=%d speed=%d",
    666  1.254.2.35     skrll 	    xfer->ux_pipe->up_dev->ud_addr,
    667  1.254.2.35     skrll 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress),
    668  1.254.2.35     skrll 	    alen, xfer->ux_pipe->up_dev->ud_speed);
    669  1.254.2.35     skrll 
    670  1.254.2.35     skrll 	KASSERT(sp);
    671  1.254.2.35     skrll 
    672  1.254.2.35     skrll 	int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize);
    673  1.254.2.35     skrll 
    674  1.254.2.35     skrll 	len = alen;
    675  1.254.2.35     skrll 	cur = sp;
    676  1.254.2.35     skrll 
    677  1.254.2.35     skrll 	dataphys = DMAADDR(dma, 0);
    678  1.254.2.35     skrll 	dataphysend = OHCI_PAGE(dataphys + len - 1);
    679  1.254.2.35     skrll 	usb_syncmem(dma, 0, len,
    680  1.254.2.35     skrll 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
    681  1.254.2.35     skrll 	tdflags = HTOO32(
    682  1.254.2.35     skrll 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
    683  1.254.2.35     skrll 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
    684  1.254.2.35     skrll 
    685  1.254.2.35     skrll 	for (size_t j = 1;;) {
    686  1.254.2.35     skrll 		if (j == ox->ox_nstd)
    687  1.254.2.35     skrll 			next = NULL;
    688  1.254.2.35     skrll 		else
    689  1.254.2.35     skrll 			next = ox->ox_stds[j++];
    690  1.254.2.35     skrll 		KASSERT(next != cur);
    691  1.254.2.35     skrll 
    692  1.254.2.35     skrll 		/* The OHCI hardware can handle at most one page crossing. */
    693  1.254.2.35     skrll 		if (OHCI_PAGE(dataphys) == dataphysend ||
    694  1.254.2.35     skrll 		    OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
    695  1.254.2.35     skrll 			/* we can handle it in this TD */
    696  1.254.2.35     skrll 			curlen = len;
    697  1.254.2.35     skrll 		} else {
    698  1.254.2.35     skrll 			/* must use multiple TDs, fill as much as possible. */
    699  1.254.2.35     skrll 			curlen = 2 * OHCI_PAGE_SIZE -
    700  1.254.2.35     skrll 				 (dataphys & (OHCI_PAGE_SIZE - 1));
    701  1.254.2.35     skrll 			/* the length must be a multiple of the max size */
    702  1.254.2.35     skrll 			curlen -= curlen % mps;
    703  1.254.2.35     skrll 			KASSERT(curlen != 0);
    704  1.254.2.35     skrll 		}
    705  1.254.2.35     skrll 		DPRINTFN(4, "dataphys=0x%08x dataphysend=0x%08x "
    706  1.254.2.35     skrll 		    "len=%d curlen=%d",  dataphys, dataphysend, len, curlen);
    707  1.254.2.35     skrll 		len -= curlen;
    708  1.254.2.35     skrll 
    709  1.254.2.35     skrll 		cur->td.td_flags = tdflags;
    710  1.254.2.35     skrll 		cur->td.td_cbp = HTOO32(dataphys);
    711  1.254.2.35     skrll 		cur->td.td_be = HTOO32(dataphys + curlen - 1);
    712  1.254.2.35     skrll 		cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0;
    713  1.254.2.35     skrll 		cur->nexttd = next;
    714  1.254.2.35     skrll 		cur->len = curlen;
    715  1.254.2.35     skrll 		cur->flags = OHCI_ADD_LEN;
    716  1.254.2.35     skrll 		cur->xfer = xfer;
    717  1.254.2.35     skrll 	 	ohci_hash_add_td(sc, cur);
    718  1.254.2.35     skrll 
    719  1.254.2.35     skrll 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    720  1.254.2.35     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    721  1.254.2.35     skrll 		DPRINTFN(10, "cbp=0x%08x be=0x%08x", dataphys,
    722  1.254.2.35     skrll 		    dataphys + curlen - 1, 0, 0);
    723  1.254.2.35     skrll 		if (len == 0)
    724  1.254.2.35     skrll 			break;
    725  1.254.2.35     skrll 		KASSERT(next != NULL);
    726  1.254.2.35     skrll 		DPRINTFN(10, "extend chain", 0, 0, 0, 0);
    727  1.254.2.35     skrll 		dataphys += curlen;
    728  1.254.2.35     skrll 		cur = next;
    729  1.254.2.35     skrll 	}
    730  1.254.2.44     skrll 	cur->td.td_flags |=
    731  1.254.2.44     skrll 	    (xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0);
    732  1.254.2.44     skrll 
    733  1.254.2.35     skrll 	if (!rd &&
    734  1.254.2.35     skrll 	    (flags & USBD_FORCE_SHORT_XFER) &&
    735  1.254.2.35     skrll 	    alen % mps == 0) {
    736  1.254.2.35     skrll 		/* Force a 0 length transfer at the end. */
    737  1.254.2.35     skrll 
    738  1.254.2.35     skrll 		KASSERT(next != NULL);
    739  1.254.2.35     skrll 		cur = next;
    740  1.254.2.35     skrll 
    741  1.254.2.35     skrll 		cur->td.td_flags = tdflags;
    742  1.254.2.35     skrll 		cur->td.td_cbp = 0; /* indicate 0 length packet */
    743  1.254.2.35     skrll 		cur->td.td_nexttd = HTOO32(next->physaddr);
    744  1.254.2.35     skrll 		cur->td.td_be = ~0;
    745  1.254.2.35     skrll 		cur->nexttd = NULL;
    746  1.254.2.35     skrll 		cur->len = 0;
    747  1.254.2.35     skrll 		cur->flags = 0;
    748  1.254.2.35     skrll 		cur->xfer = xfer;
    749  1.254.2.35     skrll 	 	ohci_hash_add_td(sc, cur);
    750  1.254.2.35     skrll 
    751  1.254.2.35     skrll 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    752  1.254.2.35     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    753  1.254.2.35     skrll 		DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0);
    754        1.48  augustss 	}
    755  1.254.2.35     skrll 	*ep = cur;
    756        1.48  augustss }
    757        1.48  augustss 
    758        1.60  augustss ohci_soft_itd_t *
    759        1.91  augustss ohci_alloc_sitd(ohci_softc_t *sc)
    760        1.60  augustss {
    761        1.60  augustss 	ohci_soft_itd_t *sitd;
    762        1.60  augustss 	usbd_status err;
    763       1.224       mrg 	int i, offs;
    764        1.60  augustss 	usb_dma_t dma;
    765        1.60  augustss 
    766  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    767  1.254.2.18     skrll 
    768  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
    769        1.60  augustss 	if (sc->sc_freeitds == NULL) {
    770  1.254.2.18     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    771  1.254.2.35     skrll 		mutex_exit(&sc->sc_lock);
    772  1.254.2.35     skrll 
    773        1.83  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
    774        1.83  augustss 			  OHCI_ITD_ALIGN, &dma);
    775        1.60  augustss 		if (err)
    776  1.254.2.13     skrll 			return NULL;
    777  1.254.2.35     skrll 		mutex_enter(&sc->sc_lock);
    778        1.83  augustss 		for(i = 0; i < OHCI_SITD_CHUNK; i++) {
    779        1.83  augustss 			offs = i * OHCI_SITD_SIZE;
    780       1.123  augustss 			sitd = KERNADDR(&dma, offs);
    781       1.125  augustss 			sitd->physaddr = DMAADDR(&dma, offs);
    782       1.195    bouyer 			sitd->dma = dma;
    783       1.195    bouyer 			sitd->offs = offs;
    784        1.60  augustss 			sitd->nextitd = sc->sc_freeitds;
    785        1.60  augustss 			sc->sc_freeitds = sitd;
    786        1.60  augustss 		}
    787        1.60  augustss 	}
    788        1.83  augustss 
    789        1.60  augustss 	sitd = sc->sc_freeitds;
    790        1.60  augustss 	sc->sc_freeitds = sitd->nextitd;
    791  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
    792  1.254.2.35     skrll 
    793        1.60  augustss 	memset(&sitd->itd, 0, sizeof(ohci_itd_t));
    794        1.83  augustss 	sitd->nextitd = NULL;
    795        1.83  augustss 	sitd->xfer = NULL;
    796        1.83  augustss 
    797        1.83  augustss #ifdef DIAGNOSTIC
    798  1.254.2.52     skrll 	sitd->isdone = true;
    799        1.83  augustss #endif
    800        1.83  augustss 
    801  1.254.2.13     skrll 	return sitd;
    802        1.60  augustss }
    803        1.60  augustss 
    804  1.254.2.35     skrll Static void
    805  1.254.2.35     skrll ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    806        1.60  augustss {
    807        1.83  augustss 
    808  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    809  1.254.2.18     skrll 	DPRINTFN(10, "sitd=%p", sitd, 0, 0, 0);
    810        1.83  augustss 
    811  1.254.2.24     skrll 	KASSERT(sitd->isdone);
    812        1.83  augustss #ifdef DIAGNOSTIC
    813       1.134    toshii 	/* Warn double free */
    814  1.254.2.31     skrll 	sitd->isdone = false;
    815        1.83  augustss #endif
    816        1.83  augustss 
    817        1.60  augustss 	sitd->nextitd = sc->sc_freeitds;
    818        1.60  augustss 	sc->sc_freeitds = sitd;
    819        1.60  augustss }
    820        1.60  augustss 
    821  1.254.2.35     skrll void
    822  1.254.2.35     skrll ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    823  1.254.2.35     skrll {
    824  1.254.2.35     skrll 
    825  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    826  1.254.2.35     skrll 
    827  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
    828  1.254.2.35     skrll 	ohci_free_sitd_locked(sc, sitd);
    829  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
    830  1.254.2.35     skrll }
    831  1.254.2.35     skrll 
    832  1.254.2.14     skrll int
    833        1.91  augustss ohci_init(ohci_softc_t *sc)
    834         1.1  augustss {
    835         1.1  augustss 	ohci_soft_ed_t *sed, *psed;
    836        1.53  augustss 	usbd_status err;
    837         1.1  augustss 	int i;
    838   1.254.2.1     skrll 	uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */;
    839        1.16  augustss 
    840  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    841  1.254.2.18     skrll 
    842       1.199  jmcneill 	aprint_normal_dev(sc->sc_dev, "");
    843       1.199  jmcneill 
    844       1.198    cegger 	sc->sc_hcca = NULL;
    845       1.224       mrg 	callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
    846       1.224       mrg 
    847       1.224       mrg 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    848  1.254.2.22     skrll 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
    849       1.224       mrg 	cv_init(&sc->sc_softwake_cv, "ohciab");
    850       1.224       mrg 
    851       1.224       mrg 	sc->sc_rhsc_si = softint_establish(SOFTINT_NET | SOFTINT_MPSAFE,
    852       1.224       mrg 	    ohci_rhsc_softint, sc);
    853       1.198    cegger 
    854       1.198    cegger 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    855       1.198    cegger 		LIST_INIT(&sc->sc_hash_tds[i]);
    856       1.198    cegger 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    857       1.198    cegger 		LIST_INIT(&sc->sc_hash_itds[i]);
    858       1.198    cegger 
    859       1.232  christos 	sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
    860  1.254.2.37     skrll 	    "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    861       1.198    cegger 
    862        1.56  augustss 	rev = OREAD4(sc, OHCI_REVISION);
    863       1.200     enami 	aprint_normal("OHCI version %d.%d%s\n",
    864       1.199  jmcneill 	    OHCI_REV_HI(rev), OHCI_REV_LO(rev),
    865       1.199  jmcneill 	    OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
    866        1.55  augustss 
    867         1.1  augustss 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
    868       1.199  jmcneill 		aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
    869   1.254.2.7     skrll 		sc->sc_bus.ub_revision = USBREV_UNKNOWN;
    870  1.254.2.14     skrll 		return -1;
    871         1.1  augustss 	}
    872   1.254.2.7     skrll 	sc->sc_bus.ub_revision = USBREV_1_0;
    873   1.254.2.7     skrll 	sc->sc_bus.ub_usedma = true;
    874       1.153      fvdl 
    875        1.73  augustss 	/* XXX determine alignment by R/W */
    876         1.1  augustss 	/* Allocate the HCCA area. */
    877       1.120  augustss 	err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
    878         1.4  augustss 			 OHCI_HCCA_ALIGN, &sc->sc_hccadma);
    879       1.198    cegger 	if (err) {
    880       1.198    cegger 		sc->sc_hcca = NULL;
    881       1.198    cegger 		return err;
    882       1.198    cegger 	}
    883       1.123  augustss 	sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
    884         1.1  augustss 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
    885         1.1  augustss 
    886         1.1  augustss 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
    887         1.1  augustss 
    888        1.60  augustss 	/* Allocate dummy ED that starts the control list. */
    889         1.1  augustss 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
    890        1.53  augustss 	if (sc->sc_ctrl_head == NULL) {
    891  1.254.2.14     skrll 		err = ENOMEM;
    892         1.1  augustss 		goto bad1;
    893         1.1  augustss 	}
    894       1.168  augustss 	sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    895        1.34  augustss 
    896        1.60  augustss 	/* Allocate dummy ED that starts the bulk list. */
    897         1.1  augustss 	sc->sc_bulk_head = ohci_alloc_sed(sc);
    898        1.53  augustss 	if (sc->sc_bulk_head == NULL) {
    899  1.254.2.14     skrll 		err = ENOMEM;
    900         1.1  augustss 		goto bad2;
    901         1.1  augustss 	}
    902       1.168  augustss 	sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    903       1.195    bouyer 	usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
    904       1.195    bouyer 	    sizeof(sc->sc_bulk_head->ed),
    905       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    906         1.1  augustss 
    907        1.60  augustss 	/* Allocate dummy ED that starts the isochronous list. */
    908        1.60  augustss 	sc->sc_isoc_head = ohci_alloc_sed(sc);
    909        1.60  augustss 	if (sc->sc_isoc_head == NULL) {
    910  1.254.2.14     skrll 		err = ENOMEM;
    911        1.60  augustss 		goto bad3;
    912        1.60  augustss 	}
    913       1.168  augustss 	sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    914       1.195    bouyer 	usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
    915       1.195    bouyer 	    sizeof(sc->sc_isoc_head->ed),
    916       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    917        1.60  augustss 
    918         1.1  augustss 	/* Allocate all the dummy EDs that make up the interrupt tree. */
    919         1.1  augustss 	for (i = 0; i < OHCI_NO_EDS; i++) {
    920         1.1  augustss 		sed = ohci_alloc_sed(sc);
    921        1.53  augustss 		if (sed == NULL) {
    922         1.1  augustss 			while (--i >= 0)
    923         1.1  augustss 				ohci_free_sed(sc, sc->sc_eds[i]);
    924  1.254.2.14     skrll 			err = ENOMEM;
    925        1.60  augustss 			goto bad4;
    926         1.1  augustss 		}
    927         1.1  augustss 		/* All ED fields are set to 0. */
    928         1.1  augustss 		sc->sc_eds[i] = sed;
    929       1.168  augustss 		sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    930        1.60  augustss 		if (i != 0)
    931         1.1  augustss 			psed = sc->sc_eds[(i-1) / 2];
    932        1.60  augustss 		else
    933        1.60  augustss 			psed= sc->sc_isoc_head;
    934        1.60  augustss 		sed->next = psed;
    935       1.168  augustss 		sed->ed.ed_nexted = HTOO32(psed->physaddr);
    936       1.195    bouyer 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
    937       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    938         1.1  augustss 	}
    939       1.120  augustss 	/*
    940         1.1  augustss 	 * Fill HCCA interrupt table.  The bit reversal is to get
    941         1.1  augustss 	 * the tree set up properly to spread the interrupts.
    942         1.1  augustss 	 */
    943         1.1  augustss 	for (i = 0; i < OHCI_NO_INTRS; i++)
    944       1.120  augustss 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
    945       1.168  augustss 		    HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
    946       1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
    947       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    948         1.1  augustss 
    949        1.73  augustss #ifdef OHCI_DEBUG
    950  1.254.2.18     skrll 	DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0);
    951  1.254.2.39     skrll 	if (ohcidebug >= 15) {
    952        1.73  augustss 		for (i = 0; i < OHCI_NO_EDS; i++) {
    953  1.254.2.18     skrll 			DPRINTFN(15, "ed#%d ", i, 0, 0, 0);
    954       1.168  augustss 			ohci_dump_ed(sc, sc->sc_eds[i]);
    955        1.73  augustss 		}
    956  1.254.2.18     skrll 		DPRINTFN(15, "iso", 0, 0, 0 ,0);
    957       1.168  augustss 		ohci_dump_ed(sc, sc->sc_isoc_head);
    958        1.73  augustss 	}
    959  1.254.2.18     skrll 	DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0);
    960        1.73  augustss #endif
    961        1.73  augustss 
    962       1.161  augustss 	/* Preserve values programmed by SMM/BIOS but lost over reset. */
    963       1.161  augustss 	ctl = OREAD4(sc, OHCI_CONTROL);
    964       1.161  augustss 	rwc = ctl & OHCI_RWC;
    965       1.161  augustss 	fm = OREAD4(sc, OHCI_FM_INTERVAL);
    966       1.161  augustss 	desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
    967       1.243    martin 	/* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */
    968       1.161  augustss 
    969         1.1  augustss 	/* Determine in what context we are running. */
    970         1.1  augustss 	if (ctl & OHCI_IR) {
    971         1.1  augustss 		/* SMM active, request change */
    972  1.254.2.18     skrll 		DPRINTF("SMM active, request owner change", 0, 0, 0, 0);
    973       1.160  augustss 		if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
    974       1.160  augustss 		    (OHCI_OC | OHCI_MIE))
    975       1.160  augustss 			OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
    976         1.1  augustss 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
    977         1.1  augustss 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
    978         1.1  augustss 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
    979        1.53  augustss 			usb_delay_ms(&sc->sc_bus, 1);
    980         1.1  augustss 			ctl = OREAD4(sc, OHCI_CONTROL);
    981         1.1  augustss 		}
    982       1.160  augustss 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
    983         1.1  augustss 		if ((ctl & OHCI_IR) == 0) {
    984       1.199  jmcneill 			aprint_error_dev(sc->sc_dev,
    985       1.199  jmcneill 			    "SMM does not respond, resetting\n");
    986       1.161  augustss 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    987         1.1  augustss 			goto reset;
    988         1.1  augustss 		}
    989       1.103  augustss #if 0
    990       1.103  augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
    991         1.1  augustss 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
    992         1.1  augustss 		/* BIOS started controller. */
    993  1.254.2.18     skrll 		DPRINTF("BIOS active", 0, 0, 0, 0);
    994         1.1  augustss 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
    995       1.161  augustss 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
    996        1.53  augustss 			usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    997         1.1  augustss 		}
    998       1.103  augustss #endif
    999         1.1  augustss 	} else {
   1000  1.254.2.18     skrll 		DPRINTF("cold started", 0 ,0 ,0 ,0);
   1001         1.1  augustss 	reset:
   1002         1.1  augustss 		/* Controller was cold started. */
   1003        1.53  augustss 		usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
   1004         1.1  augustss 	}
   1005         1.1  augustss 
   1006        1.16  augustss 	/*
   1007        1.25  augustss 	 * This reset should not be necessary according to the OHCI spec, but
   1008        1.25  augustss 	 * without it some controllers do not start.
   1009        1.16  augustss 	 */
   1010  1.254.2.18     skrll 	DPRINTF("sc %p: resetting", sc, 0, 0, 0);
   1011       1.161  augustss 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
   1012        1.55  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
   1013        1.16  augustss 
   1014         1.1  augustss 	/* We now own the host controller and the bus has been reset. */
   1015         1.1  augustss 
   1016         1.1  augustss 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
   1017         1.1  augustss 	/* Nominal time for a reset is 10 us. */
   1018         1.1  augustss 	for (i = 0; i < 10; i++) {
   1019         1.1  augustss 		delay(10);
   1020         1.1  augustss 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
   1021         1.1  augustss 		if (!hcr)
   1022         1.1  augustss 			break;
   1023         1.1  augustss 	}
   1024         1.1  augustss 	if (hcr) {
   1025       1.199  jmcneill 		aprint_error_dev(sc->sc_dev, "reset timeout\n");
   1026  1.254.2.14     skrll 		err = EIO;
   1027        1.60  augustss 		goto bad5;
   1028         1.1  augustss 	}
   1029        1.52  augustss #ifdef OHCI_DEBUG
   1030  1.254.2.39     skrll 	if (ohcidebug >= 15)
   1031         1.1  augustss 		ohci_dumpregs(sc);
   1032         1.1  augustss #endif
   1033         1.1  augustss 
   1034        1.60  augustss 	/* The controller is now in SUSPEND state, we have 2ms to finish. */
   1035         1.1  augustss 
   1036         1.1  augustss 	/* Set up HC registers. */
   1037       1.125  augustss 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
   1038         1.1  augustss 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
   1039         1.1  augustss 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
   1040        1.55  augustss 	/* disable all interrupts and then switch on all desired interrupts */
   1041         1.1  augustss 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
   1042        1.55  augustss 	/* switch on desired functional features */
   1043         1.1  augustss 	ctl = OREAD4(sc, OHCI_CONTROL);
   1044         1.1  augustss 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
   1045         1.1  augustss 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
   1046       1.161  augustss 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
   1047         1.1  augustss 	/* And finally start it! */
   1048         1.1  augustss 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1049         1.1  augustss 
   1050         1.1  augustss 	/*
   1051         1.1  augustss 	 * The controller is now OPERATIONAL.  Set a some final
   1052         1.1  augustss 	 * registers that should be set earlier, but that the
   1053         1.1  augustss 	 * controller ignores when in the SUSPEND state.
   1054         1.1  augustss 	 */
   1055       1.161  augustss 	ival = OHCI_GET_IVAL(fm);
   1056         1.1  augustss 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
   1057         1.1  augustss 	fm |= OHCI_FSMPS(ival) | ival;
   1058         1.1  augustss 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
   1059         1.1  augustss 	per = OHCI_PERIODIC(ival); /* 90% periodic */
   1060         1.1  augustss 	OWRITE4(sc, OHCI_PERIODIC_START, per);
   1061         1.1  augustss 
   1062       1.249     skrll 	if (sc->sc_flags & OHCIF_SUPERIO) {
   1063       1.249     skrll 		/* no overcurrent protection */
   1064       1.249     skrll 		desca |= OHCI_NOCP;
   1065       1.249     skrll 		/*
   1066       1.249     skrll 		 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning
   1067       1.249     skrll 		 * that
   1068       1.249     skrll 		 *  - ports are always power switched
   1069       1.249     skrll 		 *  - don't wait for powered root hub port
   1070       1.249     skrll 		 */
   1071       1.249     skrll 		desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS);
   1072       1.249     skrll 	}
   1073       1.249     skrll 
   1074        1.68  augustss 	/* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
   1075        1.68  augustss 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
   1076        1.68  augustss 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
   1077        1.85  augustss 	usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
   1078        1.68  augustss 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
   1079         1.1  augustss 
   1080        1.85  augustss 	/*
   1081        1.85  augustss 	 * The AMD756 requires a delay before re-reading the register,
   1082        1.85  augustss 	 * otherwise it will occasionally report 0 ports.
   1083        1.85  augustss 	 */
   1084       1.145  augustss 	sc->sc_noport = 0;
   1085       1.145  augustss 	for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
   1086       1.145  augustss 		usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
   1087       1.145  augustss 		sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
   1088       1.145  augustss 	}
   1089         1.1  augustss 
   1090        1.52  augustss #ifdef OHCI_DEBUG
   1091  1.254.2.39     skrll 	if (ohcidebug >= 5)
   1092         1.1  augustss 		ohci_dumpregs(sc);
   1093         1.1  augustss #endif
   1094       1.120  augustss 
   1095         1.1  augustss 	/* Set up the bus struct. */
   1096   1.254.2.7     skrll 	sc->sc_bus.ub_methods = &ohci_bus_methods;
   1097   1.254.2.7     skrll 	sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe);
   1098         1.1  augustss 
   1099       1.101   minoura 	sc->sc_control = sc->sc_intre = 0;
   1100        1.59  augustss 
   1101       1.167  augustss 	/* Finally, turn on interrupts. */
   1102  1.254.2.18     skrll 	DPRINTF("enabling %#x", sc->sc_eintrs | OHCI_MIE, 0, 0, 0);
   1103       1.167  augustss 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
   1104       1.167  augustss 
   1105  1.254.2.14     skrll 	return 0;
   1106         1.1  augustss 
   1107        1.60  augustss  bad5:
   1108        1.60  augustss 	for (i = 0; i < OHCI_NO_EDS; i++)
   1109        1.60  augustss 		ohci_free_sed(sc, sc->sc_eds[i]);
   1110        1.60  augustss  bad4:
   1111        1.60  augustss 	ohci_free_sed(sc, sc->sc_isoc_head);
   1112         1.1  augustss  bad3:
   1113       1.144  augustss 	ohci_free_sed(sc, sc->sc_bulk_head);
   1114       1.144  augustss  bad2:
   1115         1.1  augustss 	ohci_free_sed(sc, sc->sc_ctrl_head);
   1116         1.1  augustss  bad1:
   1117        1.44  augustss 	usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
   1118       1.198    cegger 	sc->sc_hcca = NULL;
   1119  1.254.2.13     skrll 	return err;
   1120         1.1  augustss }
   1121         1.1  augustss 
   1122  1.254.2.19     skrll struct usbd_xfer *
   1123  1.254.2.23     skrll ohci_allocx(struct usbd_bus *bus, unsigned int nframes)
   1124        1.62  augustss {
   1125  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1126  1.254.2.19     skrll 	struct usbd_xfer *xfer;
   1127        1.62  augustss 
   1128       1.232  christos 	xfer = pool_cache_get(sc->sc_xferpool, PR_NOWAIT);
   1129       1.118  augustss 	if (xfer != NULL) {
   1130       1.232  christos 		memset(xfer, 0, sizeof(struct ohci_xfer));
   1131       1.118  augustss #ifdef DIAGNOSTIC
   1132   1.254.2.7     skrll 		xfer->ux_state = XFER_BUSY;
   1133       1.118  augustss #endif
   1134       1.118  augustss 	}
   1135  1.254.2.13     skrll 	return xfer;
   1136        1.62  augustss }
   1137        1.62  augustss 
   1138        1.62  augustss void
   1139  1.254.2.19     skrll ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
   1140        1.62  augustss {
   1141  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1142        1.62  augustss 
   1143  1.254.2.24     skrll 	KASSERTMSG(xfer->ux_state == XFER_BUSY,
   1144  1.254.2.24     skrll 	    "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state);
   1145       1.118  augustss #ifdef DIAGNOSTIC
   1146   1.254.2.7     skrll 	xfer->ux_state = XFER_FREE;
   1147       1.118  augustss #endif
   1148       1.232  christos 	pool_cache_put(sc->sc_xferpool, xfer);
   1149        1.42  augustss }
   1150        1.42  augustss 
   1151       1.224       mrg Static void
   1152       1.224       mrg ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
   1153       1.224       mrg {
   1154  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1155       1.224       mrg 
   1156       1.224       mrg 	*lock = &sc->sc_lock;
   1157       1.224       mrg }
   1158       1.224       mrg 
   1159        1.59  augustss /*
   1160        1.59  augustss  * Shut down the controller when the system is going down.
   1161        1.59  augustss  */
   1162       1.188    dyoung bool
   1163       1.188    dyoung ohci_shutdown(device_t self, int flags)
   1164        1.59  augustss {
   1165       1.188    dyoung 	ohci_softc_t *sc = device_private(self);
   1166        1.59  augustss 
   1167  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1168  1.254.2.18     skrll 
   1169  1.254.2.18     skrll 	DPRINTF("stopping the HC", 0, 0, 0, 0);
   1170        1.59  augustss 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1171       1.188    dyoung 	return true;
   1172        1.59  augustss }
   1173        1.59  augustss 
   1174       1.185  jmcneill bool
   1175       1.206    dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
   1176        1.33  augustss {
   1177       1.185  jmcneill 	ohci_softc_t *sc = device_private(dv);
   1178       1.185  jmcneill 	uint32_t ctl;
   1179        1.33  augustss 
   1180       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1181   1.254.2.7     skrll 	sc->sc_bus.ub_usepolling++;
   1182       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1183       1.224       mrg 
   1184       1.185  jmcneill 	/* Some broken BIOSes do not recover these values */
   1185       1.185  jmcneill 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
   1186       1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
   1187       1.185  jmcneill 	    sc->sc_ctrl_head->physaddr);
   1188       1.185  jmcneill 	OWRITE4(sc, OHCI_BULK_HEAD_ED,
   1189       1.185  jmcneill 	    sc->sc_bulk_head->physaddr);
   1190       1.185  jmcneill 	if (sc->sc_intre)
   1191       1.185  jmcneill 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
   1192       1.185  jmcneill 		    (OHCI_ALL_INTRS | OHCI_MIE));
   1193       1.185  jmcneill 	if (sc->sc_control)
   1194       1.185  jmcneill 		ctl = sc->sc_control;
   1195       1.185  jmcneill 	else
   1196       1.185  jmcneill 		ctl = OREAD4(sc, OHCI_CONTROL);
   1197       1.185  jmcneill 	ctl |= OHCI_HCFS_RESUME;
   1198       1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1199       1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
   1200       1.185  jmcneill 	ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
   1201       1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1202       1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
   1203       1.185  jmcneill 	sc->sc_control = sc->sc_intre = 0;
   1204       1.224       mrg 
   1205       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1206   1.254.2.7     skrll 	sc->sc_bus.ub_usepolling--;
   1207       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1208       1.185  jmcneill 
   1209       1.185  jmcneill 	return true;
   1210       1.185  jmcneill }
   1211       1.185  jmcneill 
   1212       1.185  jmcneill bool
   1213       1.206    dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
   1214       1.185  jmcneill {
   1215       1.185  jmcneill 	ohci_softc_t *sc = device_private(dv);
   1216       1.185  jmcneill 	uint32_t ctl;
   1217        1.95  augustss 
   1218       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1219   1.254.2.7     skrll 	sc->sc_bus.ub_usepolling++;
   1220       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1221       1.224       mrg 
   1222       1.185  jmcneill 	ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
   1223       1.185  jmcneill 	if (sc->sc_control == 0) {
   1224       1.185  jmcneill 		/*
   1225       1.185  jmcneill 		 * Preserve register values, in case that BIOS
   1226       1.185  jmcneill 		 * does not recover them.
   1227       1.185  jmcneill 		 */
   1228       1.185  jmcneill 		sc->sc_control = ctl;
   1229       1.185  jmcneill 		sc->sc_intre = OREAD4(sc,
   1230       1.185  jmcneill 		    OHCI_INTERRUPT_ENABLE);
   1231        1.95  augustss 	}
   1232       1.185  jmcneill 	ctl |= OHCI_HCFS_SUSPEND;
   1233       1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1234       1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1235       1.224       mrg 
   1236       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1237   1.254.2.7     skrll 	sc->sc_bus.ub_usepolling--;
   1238       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1239       1.185  jmcneill 
   1240       1.185  jmcneill 	return true;
   1241        1.33  augustss }
   1242        1.33  augustss 
   1243        1.52  augustss #ifdef OHCI_DEBUG
   1244         1.1  augustss void
   1245        1.91  augustss ohci_dumpregs(ohci_softc_t *sc)
   1246         1.1  augustss {
   1247  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1248  1.254.2.18     skrll 
   1249  1.254.2.18     skrll 	DPRINTF("rev=0x%08x control=0x%08x command=0x%08x",
   1250        1.41  augustss 		 OREAD4(sc, OHCI_REVISION),
   1251        1.41  augustss 		 OREAD4(sc, OHCI_CONTROL),
   1252  1.254.2.18     skrll 		 OREAD4(sc, OHCI_COMMAND_STATUS), 0);
   1253  1.254.2.18     skrll 	DPRINTF("               intrstat=0x%08x intre=0x%08x intrd=0x%08x",
   1254        1.41  augustss 		 OREAD4(sc, OHCI_INTERRUPT_STATUS),
   1255        1.41  augustss 		 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
   1256  1.254.2.18     skrll 		 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0);
   1257  1.254.2.18     skrll 	DPRINTF("               hcca=0x%08x percur=0x%08x ctrlhd=0x%08x",
   1258        1.41  augustss 		 OREAD4(sc, OHCI_HCCA),
   1259        1.41  augustss 		 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
   1260  1.254.2.18     skrll 		 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0);
   1261  1.254.2.18     skrll 	DPRINTF("               ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x",
   1262        1.41  augustss 		 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
   1263        1.41  augustss 		 OREAD4(sc, OHCI_BULK_HEAD_ED),
   1264  1.254.2.18     skrll 		 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0);
   1265  1.254.2.18     skrll 	DPRINTF("               done=0x%08x fmival=0x%08x fmrem=0x%08x",
   1266        1.41  augustss 		 OREAD4(sc, OHCI_DONE_HEAD),
   1267        1.41  augustss 		 OREAD4(sc, OHCI_FM_INTERVAL),
   1268  1.254.2.18     skrll 		 OREAD4(sc, OHCI_FM_REMAINING), 0);
   1269  1.254.2.18     skrll 	DPRINTF("               fmnum=0x%08x perst=0x%08x lsthrs=0x%08x",
   1270        1.41  augustss 		 OREAD4(sc, OHCI_FM_NUMBER),
   1271        1.41  augustss 		 OREAD4(sc, OHCI_PERIODIC_START),
   1272  1.254.2.18     skrll 		 OREAD4(sc, OHCI_LS_THRESHOLD), 0);
   1273  1.254.2.18     skrll 	DPRINTF("               desca=0x%08x descb=0x%08x stat=0x%08x",
   1274        1.41  augustss 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
   1275        1.41  augustss 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
   1276  1.254.2.18     skrll 		 OREAD4(sc, OHCI_RH_STATUS), 0);
   1277  1.254.2.18     skrll 	DPRINTF("               port1=0x%08x port2=0x%08x",
   1278        1.41  augustss 		 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
   1279  1.254.2.18     skrll 		 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0);
   1280  1.254.2.18     skrll 	DPRINTF("         HCCA: frame_number=0x%04x done_head=0x%08x",
   1281       1.168  augustss 		 O32TOH(sc->sc_hcca->hcca_frame_number),
   1282  1.254.2.18     skrll 		 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0);
   1283         1.1  augustss }
   1284         1.1  augustss #endif
   1285         1.1  augustss 
   1286        1.91  augustss Static int ohci_intr1(ohci_softc_t *);
   1287        1.53  augustss 
   1288         1.1  augustss int
   1289        1.91  augustss ohci_intr(void *p)
   1290         1.1  augustss {
   1291         1.1  augustss 	ohci_softc_t *sc = p;
   1292       1.224       mrg 	int ret = 0;
   1293       1.111  augustss 
   1294  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1295  1.254.2.18     skrll 
   1296       1.224       mrg 	if (sc == NULL)
   1297  1.254.2.13     skrll 		return 0;
   1298        1.53  augustss 
   1299       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1300       1.224       mrg 
   1301       1.224       mrg 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1302       1.224       mrg 		goto done;
   1303       1.224       mrg 
   1304        1.53  augustss 	/* If we get an interrupt while polling, then just ignore it. */
   1305   1.254.2.7     skrll 	if (sc->sc_bus.ub_usepolling) {
   1306  1.254.2.18     skrll 		DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0);
   1307       1.154      joff 		/* for level triggered intrs, should do something to ack */
   1308       1.155     perry 		OWRITE4(sc, OHCI_INTERRUPT_STATUS,
   1309       1.154      joff 			OREAD4(sc, OHCI_INTERRUPT_STATUS));
   1310       1.155     perry 
   1311       1.224       mrg 		goto done;
   1312        1.57  augustss 	}
   1313        1.53  augustss 
   1314       1.224       mrg 	ret = ohci_intr1(sc);
   1315       1.224       mrg 
   1316       1.224       mrg done:
   1317       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1318       1.224       mrg 	return ret;
   1319        1.53  augustss }
   1320        1.53  augustss 
   1321        1.82  augustss Static int
   1322        1.91  augustss ohci_intr1(ohci_softc_t *sc)
   1323        1.53  augustss {
   1324   1.254.2.1     skrll 	uint32_t intrs, eintrs;
   1325         1.1  augustss 
   1326  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1327       1.105  augustss 
   1328        1.15  augustss 	/* In case the interrupt occurs before initialization has completed. */
   1329        1.34  augustss 	if (sc == NULL || sc->sc_hcca == NULL) {
   1330        1.15  augustss #ifdef DIAGNOSTIC
   1331        1.15  augustss 		printf("ohci_intr: sc->sc_hcca == NULL\n");
   1332        1.15  augustss #endif
   1333  1.254.2.13     skrll 		return 0;
   1334        1.15  augustss 	}
   1335        1.15  augustss 
   1336       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1337       1.224       mrg 
   1338       1.157   mycroft 	intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1339         1.1  augustss 	if (!intrs)
   1340  1.254.2.13     skrll 		return 0;
   1341        1.55  augustss 
   1342  1.254.2.32     skrll 	/* Acknowledge */
   1343  1.254.2.32     skrll 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH));
   1344         1.1  augustss 	eintrs = intrs & sc->sc_eintrs;
   1345  1.254.2.18     skrll 	DPRINTFN(7, "sc=%p", sc, 0, 0, 0);
   1346  1.254.2.18     skrll 	DPRINTFN(7, "intrs=%#x(%#x) eintrs=%#x(%#x)",
   1347  1.254.2.18     skrll 	    intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs,
   1348  1.254.2.18     skrll 	    sc->sc_eintrs);
   1349       1.211      matt 
   1350       1.211      matt 	if (!eintrs) {
   1351  1.254.2.13     skrll 		return 0;
   1352       1.211      matt 	}
   1353         1.1  augustss 
   1354         1.1  augustss 	if (eintrs & OHCI_SO) {
   1355       1.100  augustss 		sc->sc_overrun_cnt++;
   1356       1.100  augustss 		if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
   1357       1.100  augustss 			printf("%s: %u scheduling overruns\n",
   1358       1.190  drochner 			    device_xname(sc->sc_dev), sc->sc_overrun_cnt);
   1359       1.100  augustss 			sc->sc_overrun_cnt = 0;
   1360       1.100  augustss 		}
   1361         1.1  augustss 		/* XXX do what */
   1362       1.106  augustss 		eintrs &= ~OHCI_SO;
   1363         1.1  augustss 	}
   1364         1.1  augustss 	if (eintrs & OHCI_WDH) {
   1365       1.157   mycroft 		/*
   1366       1.157   mycroft 		 * We block the interrupt below, and reenable it later from
   1367       1.157   mycroft 		 * ohci_softintr().
   1368       1.157   mycroft 		 */
   1369        1.72  augustss 		usb_schedsoftintr(&sc->sc_bus);
   1370         1.1  augustss 	}
   1371         1.1  augustss 	if (eintrs & OHCI_RD) {
   1372  1.254.2.47     skrll 		DPRINTFN(5, "resume detect", sc, 0, 0, 0);
   1373       1.190  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1374         1.1  augustss 		/* XXX process resume detect */
   1375         1.1  augustss 	}
   1376         1.1  augustss 	if (eintrs & OHCI_UE) {
   1377  1.254.2.47     skrll 		DPRINTFN(5, "unrecoverable error", sc, 0, 0, 0);
   1378        1.15  augustss 		printf("%s: unrecoverable error, controller halted\n",
   1379       1.190  drochner 		       device_xname(sc->sc_dev));
   1380         1.1  augustss 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1381         1.1  augustss 		/* XXX what else */
   1382         1.1  augustss 	}
   1383         1.1  augustss 	if (eintrs & OHCI_RHSC) {
   1384       1.120  augustss 		/*
   1385       1.157   mycroft 		 * We block the interrupt below, and reenable it later from
   1386       1.157   mycroft 		 * a timeout.
   1387         1.1  augustss 		 */
   1388       1.224       mrg 		softint_schedule(sc->sc_rhsc_si);
   1389         1.1  augustss 	}
   1390         1.1  augustss 
   1391       1.106  augustss 	if (eintrs != 0) {
   1392       1.157   mycroft 		/* Block unprocessed interrupts. */
   1393       1.106  augustss 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
   1394       1.106  augustss 		sc->sc_eintrs &= ~eintrs;
   1395  1.254.2.18     skrll 		DPRINTF("sc %p blocking intrs 0x%x", sc, eintrs, 0, 0);
   1396       1.106  augustss 	}
   1397         1.1  augustss 
   1398  1.254.2.13     skrll 	return 1;
   1399         1.1  augustss }
   1400         1.1  augustss 
   1401         1.1  augustss void
   1402       1.104  augustss ohci_rhsc_enable(void *v_sc)
   1403       1.104  augustss {
   1404       1.104  augustss 	ohci_softc_t *sc = v_sc;
   1405       1.104  augustss 
   1406  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1407  1.254.2.18     skrll 	DPRINTF("sc %p", sc, 0, 0, 0);
   1408       1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1409       1.157   mycroft 	sc->sc_eintrs |= OHCI_RHSC;
   1410       1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
   1411       1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1412         1.1  augustss }
   1413         1.1  augustss 
   1414        1.52  augustss #ifdef OHCI_DEBUG
   1415       1.166  drochner const char *ohci_cc_strs[] = {
   1416        1.13  augustss 	"NO_ERROR",
   1417        1.13  augustss 	"CRC",
   1418        1.13  augustss 	"BIT_STUFFING",
   1419        1.13  augustss 	"DATA_TOGGLE_MISMATCH",
   1420        1.13  augustss 	"STALL",
   1421        1.13  augustss 	"DEVICE_NOT_RESPONDING",
   1422        1.13  augustss 	"PID_CHECK_FAILURE",
   1423        1.13  augustss 	"UNEXPECTED_PID",
   1424        1.13  augustss 	"DATA_OVERRUN",
   1425        1.13  augustss 	"DATA_UNDERRUN",
   1426        1.13  augustss 	"BUFFER_OVERRUN",
   1427        1.13  augustss 	"BUFFER_UNDERRUN",
   1428        1.67  augustss 	"reserved",
   1429        1.67  augustss 	"reserved",
   1430        1.67  augustss 	"NOT_ACCESSED",
   1431        1.13  augustss 	"NOT_ACCESSED",
   1432        1.13  augustss };
   1433        1.13  augustss #endif
   1434        1.13  augustss 
   1435         1.1  augustss void
   1436       1.157   mycroft ohci_softintr(void *v)
   1437        1.83  augustss {
   1438       1.190  drochner 	struct usbd_bus *bus = v;
   1439  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1440       1.157   mycroft 	ohci_soft_itd_t *sitd, *sidone, *sitdnext;
   1441       1.157   mycroft 	ohci_soft_td_t  *std,  *sdone,  *stdnext;
   1442  1.254.2.19     skrll 	struct usbd_xfer *xfer;
   1443       1.157   mycroft 	struct ohci_pipe *opipe;
   1444       1.224       mrg 	int len, cc;
   1445       1.157   mycroft 	int i, j, actlen, iframes, uedir;
   1446       1.157   mycroft 	ohci_physaddr_t done;
   1447       1.157   mycroft 
   1448   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1449       1.224       mrg 
   1450  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1451       1.157   mycroft 
   1452       1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1453       1.195    bouyer 	    sizeof(sc->sc_hcca->hcca_done_head),
   1454       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1455       1.168  augustss 	done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
   1456       1.157   mycroft 	sc->sc_hcca->hcca_done_head = 0;
   1457       1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1458       1.195    bouyer 	    sizeof(sc->sc_hcca->hcca_done_head),
   1459       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1460       1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
   1461       1.157   mycroft 	sc->sc_eintrs |= OHCI_WDH;
   1462       1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
   1463        1.83  augustss 
   1464        1.83  augustss 	/* Reverse the done list. */
   1465        1.83  augustss 	for (sdone = NULL, sidone = NULL; done != 0; ) {
   1466        1.83  augustss 		std = ohci_hash_find_td(sc, done);
   1467        1.83  augustss 		if (std != NULL) {
   1468       1.195    bouyer 			usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1469       1.195    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1470        1.83  augustss 			std->dnext = sdone;
   1471       1.168  augustss 			done = O32TOH(std->td.td_nexttd);
   1472        1.83  augustss 			sdone = std;
   1473  1.254.2.18     skrll 			DPRINTFN(10, "add TD %p", std, 0, 0, 0);
   1474        1.83  augustss 			continue;
   1475        1.83  augustss 		}
   1476        1.83  augustss 		sitd = ohci_hash_find_itd(sc, done);
   1477        1.83  augustss 		if (sitd != NULL) {
   1478       1.195    bouyer 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   1479       1.195    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1480        1.83  augustss 			sitd->dnext = sidone;
   1481       1.168  augustss 			done = O32TOH(sitd->itd.itd_nextitd);
   1482        1.83  augustss 			sidone = sitd;
   1483  1.254.2.18     skrll 			DPRINTFN(5, "add ITD %p", sitd, 0, 0, 0);
   1484        1.83  augustss 			continue;
   1485        1.83  augustss 		}
   1486  1.254.2.57     skrll 		DPRINTFN(10, "addr %p not found", done, 0, 0, 0);
   1487       1.218  jmcneill 		device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
   1488       1.218  jmcneill 		    (u_long)done);
   1489       1.218  jmcneill 		break;
   1490        1.83  augustss 	}
   1491        1.83  augustss 
   1492  1.254.2.18     skrll 	DPRINTFN(10, "sdone=%p sidone=%p", sdone, sidone, 0, 0);
   1493  1.254.2.41     skrll 	DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0);
   1494        1.52  augustss #ifdef OHCI_DEBUG
   1495  1.254.2.39     skrll 	if (ohcidebug >= 10) {
   1496       1.234     skrll 		for (std = sdone; std; std = std->dnext)
   1497   1.254.2.1     skrll 			ohci_dump_td(sc, std);
   1498         1.1  augustss 	}
   1499         1.1  augustss #endif
   1500  1.254.2.41     skrll 	DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0);
   1501         1.1  augustss 
   1502        1.48  augustss 	for (std = sdone; std; std = stdnext) {
   1503        1.53  augustss 		xfer = std->xfer;
   1504        1.48  augustss 		stdnext = std->dnext;
   1505  1.254.2.18     skrll 		DPRINTFN(10, "std=%p xfer=%p hcpriv=%p", std, xfer,
   1506  1.254.2.18     skrll 		    xfer ? xfer->ux_hcpriv : 0, 0);
   1507        1.71  augustss 		if (xfer == NULL) {
   1508       1.117  augustss 			/*
   1509       1.117  augustss 			 * xfer == NULL: There seems to be no xfer associated
   1510        1.71  augustss 			 * with this TD. It is tailp that happened to end up on
   1511        1.71  augustss 			 * the done queue.
   1512       1.117  augustss 			 * Shouldn't happen, but some chips are broken(?).
   1513        1.71  augustss 			 */
   1514        1.71  augustss 			continue;
   1515        1.71  augustss 		}
   1516   1.254.2.7     skrll 		if (xfer->ux_status == USBD_CANCELLED ||
   1517   1.254.2.7     skrll 		    xfer->ux_status == USBD_TIMEOUT) {
   1518  1.254.2.18     skrll 			DPRINTF("cancel/timeout %p", xfer, 0, 0, 0);
   1519        1.38  augustss 			/* Handled by abort routine. */
   1520        1.83  augustss 			continue;
   1521        1.83  augustss 		}
   1522   1.254.2.7     skrll 		callout_stop(&xfer->ux_callout);
   1523       1.141   mycroft 
   1524       1.141   mycroft 		len = std->len;
   1525       1.141   mycroft 		if (std->td.td_cbp != 0)
   1526       1.168  augustss 			len -= O32TOH(std->td.td_be) -
   1527       1.168  augustss 			       O32TOH(std->td.td_cbp) + 1;
   1528  1.254.2.18     skrll 		DPRINTFN(10, "len=%d, flags=0x%x", len, std->flags, 0, 0);
   1529       1.141   mycroft 		if (std->flags & OHCI_ADD_LEN)
   1530   1.254.2.7     skrll 			xfer->ux_actlen += len;
   1531       1.141   mycroft 
   1532       1.168  augustss 		cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
   1533        1.83  augustss 		if (cc == OHCI_CC_NO_ERROR) {
   1534  1.254.2.42     skrll 			ohci_hash_rem_td(sc, std);
   1535        1.34  augustss 			if (std->flags & OHCI_CALL_DONE) {
   1536   1.254.2.7     skrll 				xfer->ux_status = USBD_NORMAL_COMPLETION;
   1537        1.53  augustss 				usb_transfer_complete(xfer);
   1538        1.21  augustss 			}
   1539         1.1  augustss 		} else {
   1540        1.48  augustss 			/*
   1541        1.48  augustss 			 * Endpoint is halted.  First unlink all the TDs
   1542        1.48  augustss 			 * belonging to the failed transfer, and then restart
   1543        1.48  augustss 			 * the endpoint.
   1544        1.48  augustss 			 */
   1545         1.1  augustss 			ohci_soft_td_t *p, *n;
   1546  1.254.2.25     skrll 			opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1547        1.48  augustss 
   1548  1.254.2.43     skrll 			DPRINTFN(10, "error cc=%d", cc, 0, 0, 0);
   1549        1.48  augustss 
   1550  1.254.2.35     skrll 			/* remove xfer's TDs from the hash */
   1551        1.53  augustss 			for (p = std; p->xfer == xfer; p = n) {
   1552         1.1  augustss 				n = p->nexttd;
   1553  1.254.2.35     skrll 				ohci_hash_rem_td(sc, p);
   1554         1.1  augustss 			}
   1555        1.48  augustss 
   1556  1.254.2.44     skrll 			ohci_soft_ed_t *sed = opipe->sed;
   1557  1.254.2.44     skrll 
   1558  1.254.2.44     skrll 			/* clear halt and TD chain */
   1559  1.254.2.44     skrll 			sed->ed.ed_headp = HTOO32(p->physaddr);
   1560  1.254.2.45     skrll 			usb_syncmem(&sed->dma,
   1561  1.254.2.46     skrll 			    sed->offs + offsetof(ohci_ed_t, ed_headp),
   1562  1.254.2.45     skrll 			    sizeof(sed->ed.ed_headp),
   1563  1.254.2.44     skrll 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1564  1.254.2.44     skrll 
   1565         1.1  augustss 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1566        1.48  augustss 
   1567  1.254.2.44     skrll 			if (cc == OHCI_CC_DATA_UNDERRUN)
   1568  1.254.2.44     skrll 				xfer->ux_status = USBD_NORMAL_COMPLETION;
   1569  1.254.2.44     skrll 			else if (cc == OHCI_CC_STALL)
   1570   1.254.2.7     skrll 				xfer->ux_status = USBD_STALLED;
   1571         1.1  augustss 			else
   1572   1.254.2.7     skrll 				xfer->ux_status = USBD_IOERROR;
   1573        1.53  augustss 			usb_transfer_complete(xfer);
   1574         1.1  augustss 		}
   1575         1.1  augustss 	}
   1576  1.254.2.41     skrll 	DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0);
   1577        1.83  augustss #ifdef OHCI_DEBUG
   1578  1.254.2.39     skrll 	if (ohcidebug >= 10) {
   1579       1.234     skrll 		for (sitd = sidone; sitd; sitd = sitd->dnext)
   1580   1.254.2.1     skrll 			ohci_dump_itd(sc, sitd);
   1581        1.83  augustss 	}
   1582        1.83  augustss #endif
   1583  1.254.2.41     skrll 	DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0);
   1584        1.83  augustss 
   1585        1.83  augustss 	for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
   1586        1.83  augustss 		xfer = sitd->xfer;
   1587        1.83  augustss 		sitdnext = sitd->dnext;
   1588  1.254.2.18     skrll 		DPRINTFN(1, "sitd=%p xfer=%p hcpriv=%p", sitd, xfer,
   1589  1.254.2.18     skrll 		    xfer ? xfer->ux_hcpriv : 0, 0);
   1590        1.83  augustss 		if (xfer == NULL)
   1591        1.83  augustss 			continue;
   1592   1.254.2.7     skrll 		if (xfer->ux_status == USBD_CANCELLED ||
   1593   1.254.2.7     skrll 		    xfer->ux_status == USBD_TIMEOUT) {
   1594  1.254.2.18     skrll 			DPRINTF("cancel/timeout %p", xfer, 0, 0, 0);
   1595        1.83  augustss 			/* Handled by abort routine. */
   1596        1.83  augustss 			continue;
   1597        1.83  augustss 		}
   1598  1.254.2.24     skrll 		KASSERT(!sitd->isdone);
   1599        1.83  augustss #ifdef DIAGNOSTIC
   1600  1.254.2.31     skrll 		sitd->isdone = true;
   1601        1.83  augustss #endif
   1602       1.134    toshii 		if (sitd->flags & OHCI_CALL_DONE) {
   1603       1.134    toshii 			ohci_soft_itd_t *next;
   1604       1.134    toshii 
   1605  1.254.2.25     skrll 			opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1606  1.254.2.21     skrll 			opipe->isoc.inuse -= xfer->ux_nframes;
   1607   1.254.2.7     skrll 			uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->
   1608       1.134    toshii 			    bEndpointAddress);
   1609   1.254.2.7     skrll 			xfer->ux_status = USBD_NORMAL_COMPLETION;
   1610       1.134    toshii 			actlen = 0;
   1611   1.254.2.7     skrll 			for (i = 0, sitd = xfer->ux_hcpriv;;
   1612       1.134    toshii 			    sitd = next) {
   1613       1.134    toshii 				next = sitd->nextitd;
   1614       1.168  augustss 				if (OHCI_ITD_GET_CC(O32TOH(sitd->
   1615       1.135    toshii 				    itd.itd_flags)) != OHCI_CC_NO_ERROR)
   1616   1.254.2.7     skrll 					xfer->ux_status = USBD_IOERROR;
   1617       1.134    toshii 				/* For input, update frlengths with actual */
   1618       1.134    toshii 				/* XXX anything necessary for output? */
   1619       1.134    toshii 				if (uedir == UE_DIR_IN &&
   1620   1.254.2.7     skrll 				    xfer->ux_status == USBD_NORMAL_COMPLETION) {
   1621       1.168  augustss 					iframes = OHCI_ITD_GET_FC(O32TOH(
   1622       1.135    toshii 					    sitd->itd.itd_flags));
   1623       1.134    toshii 					for (j = 0; j < iframes; i++, j++) {
   1624       1.168  augustss 						len = O16TOH(sitd->
   1625       1.134    toshii 						    itd.itd_offset[j]);
   1626       1.158    toshii 						if ((OHCI_ITD_PSW_GET_CC(len) &
   1627       1.158    toshii 						    OHCI_CC_NOT_ACCESSED_MASK)
   1628       1.158    toshii 						    == OHCI_CC_NOT_ACCESSED)
   1629       1.158    toshii 							len = 0;
   1630       1.158    toshii 						else
   1631       1.158    toshii 							len = OHCI_ITD_PSW_LENGTH(len);
   1632   1.254.2.7     skrll 						xfer->ux_frlengths[i] = len;
   1633       1.134    toshii 						actlen += len;
   1634       1.134    toshii 					}
   1635       1.134    toshii 				}
   1636       1.134    toshii 				if (sitd->flags & OHCI_CALL_DONE)
   1637       1.134    toshii 					break;
   1638  1.254.2.35     skrll 				ohci_hash_rem_itd(sc, sitd);
   1639  1.254.2.35     skrll 
   1640        1.83  augustss 			}
   1641  1.254.2.35     skrll 			ohci_hash_rem_itd(sc, sitd);
   1642       1.134    toshii 			if (uedir == UE_DIR_IN &&
   1643   1.254.2.7     skrll 			    xfer->ux_status == USBD_NORMAL_COMPLETION)
   1644   1.254.2.7     skrll 				xfer->ux_actlen = actlen;
   1645   1.254.2.7     skrll 			xfer->ux_hcpriv = NULL;
   1646       1.134    toshii 
   1647        1.83  augustss 			usb_transfer_complete(xfer);
   1648        1.83  augustss 		}
   1649        1.83  augustss 	}
   1650        1.83  augustss 
   1651       1.119  augustss 	if (sc->sc_softwake) {
   1652       1.119  augustss 		sc->sc_softwake = 0;
   1653       1.224       mrg 		cv_broadcast(&sc->sc_softwake_cv);
   1654       1.119  augustss 	}
   1655       1.119  augustss 
   1656  1.254.2.18     skrll 	DPRINTFN(10, "done", 0, 0, 0, 0);
   1657         1.1  augustss }
   1658         1.1  augustss 
   1659         1.1  augustss void
   1660  1.254.2.19     skrll ohci_device_ctrl_done(struct usbd_xfer *xfer)
   1661         1.1  augustss {
   1662  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1663  1.254.2.25     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1664   1.254.2.7     skrll 	int len = UGETW(xfer->ux_request.wLength);
   1665   1.254.2.7     skrll 	int isread = (xfer->ux_request.bmRequestType & UT_READ);
   1666       1.195    bouyer 
   1667  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1668  1.254.2.18     skrll 	DPRINTFN(10, "xfer=%p", xfer, 0, 0, 0);
   1669         1.1  augustss 
   1670   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1671  1.254.2.24     skrll 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   1672       1.224       mrg 
   1673       1.195    bouyer 	if (len)
   1674   1.254.2.7     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   1675       1.195    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1676  1.254.2.30     skrll 	usb_syncmem(&opipe->ctrl.reqdma, 0,
   1677  1.254.2.30     skrll 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   1678         1.1  augustss }
   1679         1.1  augustss 
   1680         1.1  augustss void
   1681  1.254.2.19     skrll ohci_device_intr_done(struct usbd_xfer *xfer)
   1682         1.1  augustss {
   1683  1.254.2.54     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1684       1.195    bouyer 	int isread =
   1685   1.254.2.7     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1686         1.1  augustss 
   1687  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1688  1.254.2.18     skrll 	DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0);
   1689         1.1  augustss 
   1690   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1691       1.224       mrg 
   1692   1.254.2.7     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1693       1.195    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1694         1.1  augustss }
   1695         1.1  augustss 
   1696         1.1  augustss void
   1697  1.254.2.19     skrll ohci_device_bulk_done(struct usbd_xfer *xfer)
   1698         1.3  augustss {
   1699  1.254.2.25     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1700  1.254.2.25     skrll 
   1701       1.195    bouyer 	int isread =
   1702   1.254.2.7     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1703       1.195    bouyer 
   1704       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1705       1.224       mrg 
   1706  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1707  1.254.2.18     skrll 	DPRINTFN(10, "xfer=%p, actlen=%d", xfer, xfer->ux_actlen, 0, 0);
   1708   1.254.2.7     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1709       1.195    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1710         1.3  augustss }
   1711         1.3  augustss 
   1712       1.224       mrg Static void
   1713       1.224       mrg ohci_rhsc_softint(void *arg)
   1714       1.224       mrg {
   1715       1.224       mrg 	ohci_softc_t *sc = arg;
   1716       1.224       mrg 
   1717       1.224       mrg 	mutex_enter(&sc->sc_lock);
   1718       1.224       mrg 
   1719       1.224       mrg 	ohci_rhsc(sc, sc->sc_intrxfer);
   1720       1.224       mrg 
   1721       1.224       mrg 	/* Do not allow RHSC interrupts > 1 per second */
   1722       1.224       mrg 	callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
   1723       1.224       mrg 
   1724       1.224       mrg 	mutex_exit(&sc->sc_lock);
   1725       1.224       mrg }
   1726       1.224       mrg 
   1727         1.3  augustss void
   1728  1.254.2.19     skrll ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer)
   1729         1.1  augustss {
   1730         1.1  augustss 	u_char *p;
   1731         1.1  augustss 	int i, m;
   1732       1.243    martin 	int hstatus __unused;
   1733  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1734         1.1  augustss 
   1735       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1736       1.224       mrg 
   1737         1.1  augustss 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
   1738  1.254.2.18     skrll 	DPRINTF("sc=%p xfer=%p hstatus=0x%08x", sc, xfer, hstatus, 0);
   1739         1.1  augustss 
   1740        1.53  augustss 	if (xfer == NULL) {
   1741         1.1  augustss 		/* Just ignore the change. */
   1742         1.1  augustss 		return;
   1743         1.1  augustss 	}
   1744         1.1  augustss 
   1745   1.254.2.7     skrll 	p = xfer->ux_buf;
   1746   1.254.2.7     skrll 	m = min(sc->sc_noport, xfer->ux_length * 8 - 1);
   1747   1.254.2.7     skrll 	memset(p, 0, xfer->ux_length);
   1748         1.1  augustss 	for (i = 1; i <= m; i++) {
   1749        1.87  augustss 		/* Pick out CHANGE bits from the status reg. */
   1750         1.1  augustss 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
   1751         1.1  augustss 			p[i/8] |= 1 << (i%8);
   1752         1.1  augustss 	}
   1753  1.254.2.18     skrll 	DPRINTF("change=0x%02x", *p, 0, 0, 0);
   1754   1.254.2.7     skrll 	xfer->ux_actlen = xfer->ux_length;
   1755   1.254.2.7     skrll 	xfer->ux_status = USBD_NORMAL_COMPLETION;
   1756         1.1  augustss 
   1757        1.53  augustss 	usb_transfer_complete(xfer);
   1758        1.38  augustss }
   1759        1.38  augustss 
   1760        1.38  augustss void
   1761  1.254.2.19     skrll ohci_root_intr_done(struct usbd_xfer *xfer)
   1762        1.65  augustss {
   1763  1.254.2.54     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   1764  1.254.2.54     skrll 
   1765  1.254.2.54     skrll 	KASSERT(mutex_owned(&sc->sc_lock));
   1766  1.254.2.54     skrll 
   1767  1.254.2.54     skrll 	KASSERT(sc->sc_intrxfer == xfer);
   1768  1.254.2.54     skrll 	sc->sc_intrxfer = NULL;
   1769        1.65  augustss }
   1770        1.65  augustss 
   1771         1.1  augustss /*
   1772         1.1  augustss  * Wait here until controller claims to have an interrupt.
   1773         1.1  augustss  * Then call ohci_intr and return.  Use timeout to avoid waiting
   1774         1.1  augustss  * too long.
   1775         1.1  augustss  */
   1776         1.1  augustss void
   1777  1.254.2.19     skrll ohci_waitintr(ohci_softc_t *sc, struct usbd_xfer *xfer)
   1778         1.1  augustss {
   1779       1.163  augustss 	int timo;
   1780   1.254.2.1     skrll 	uint32_t intrs;
   1781  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1782         1.1  augustss 
   1783       1.224       mrg 	mutex_enter(&sc->sc_lock);
   1784       1.224       mrg 
   1785   1.254.2.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   1786   1.254.2.7     skrll 	for (timo = xfer->ux_timeout; timo >= 0; timo--) {
   1787        1.20  augustss 		usb_delay_ms(&sc->sc_bus, 1);
   1788       1.116  augustss 		if (sc->sc_dying)
   1789       1.116  augustss 			break;
   1790         1.1  augustss 		intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
   1791  1.254.2.18     skrll 		DPRINTFN(15, "intrs 0x%04x", intrs, 0, 0, 0);
   1792        1.52  augustss #ifdef OHCI_DEBUG
   1793         1.1  augustss 		if (ohcidebug > 15)
   1794         1.1  augustss 			ohci_dumpregs(sc);
   1795         1.1  augustss #endif
   1796         1.1  augustss 		if (intrs) {
   1797       1.224       mrg 			mutex_spin_enter(&sc->sc_intr_lock);
   1798        1.53  augustss 			ohci_intr1(sc);
   1799       1.224       mrg 			mutex_spin_exit(&sc->sc_intr_lock);
   1800   1.254.2.7     skrll 			if (xfer->ux_status != USBD_IN_PROGRESS)
   1801       1.230  jmcneill 				goto done;
   1802         1.1  augustss 		}
   1803         1.1  augustss 	}
   1804        1.15  augustss 
   1805        1.15  augustss 	/* Timeout */
   1806  1.254.2.18     skrll 	DPRINTF("timeout", 0, 0, 0, 0);
   1807   1.254.2.7     skrll 	xfer->ux_status = USBD_TIMEOUT;
   1808        1.53  augustss 	usb_transfer_complete(xfer);
   1809       1.224       mrg 
   1810       1.230  jmcneill done:
   1811       1.224       mrg 	mutex_exit(&sc->sc_lock);
   1812         1.5  augustss }
   1813         1.5  augustss 
   1814         1.5  augustss void
   1815        1.91  augustss ohci_poll(struct usbd_bus *bus)
   1816         1.5  augustss {
   1817  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1818  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1819  1.254.2.18     skrll 
   1820       1.105  augustss #ifdef OHCI_DEBUG
   1821       1.105  augustss 	static int last;
   1822       1.105  augustss 	int new;
   1823       1.105  augustss 	new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1824       1.105  augustss 	if (new != last) {
   1825  1.254.2.18     skrll 		DPRINTFN(10, "intrs=0x%04x", new, 0, 0, 0);
   1826       1.105  augustss 		last = new;
   1827       1.105  augustss 	}
   1828       1.105  augustss #endif
   1829       1.217  jmcneill 	sc->sc_eintrs |= OHCI_WDH;
   1830       1.224       mrg 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
   1831       1.224       mrg 		mutex_spin_enter(&sc->sc_intr_lock);
   1832        1.53  augustss 		ohci_intr1(sc);
   1833       1.224       mrg 		mutex_spin_exit(&sc->sc_intr_lock);
   1834       1.224       mrg 	}
   1835         1.1  augustss }
   1836         1.1  augustss 
   1837         1.1  augustss /*
   1838       1.224       mrg  * Add an ED to the schedule.  Called with USB lock held.
   1839         1.1  augustss  */
   1840       1.224       mrg Static void
   1841       1.168  augustss ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1842         1.1  augustss {
   1843  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1844  1.254.2.18     skrll 	DPRINTFN(8, "sed=%p head=%p", sed, head, 0, 0);
   1845       1.113  augustss 
   1846       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1847       1.224       mrg 
   1848       1.195    bouyer 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1849       1.195    bouyer 	    sizeof(head->ed.ed_nexted),
   1850       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1851         1.1  augustss 	sed->next = head->next;
   1852        1.39  augustss 	sed->ed.ed_nexted = head->ed.ed_nexted;
   1853       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1854       1.195    bouyer 	    sizeof(sed->ed.ed_nexted),
   1855       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1856         1.1  augustss 	head->next = sed;
   1857       1.168  augustss 	head->ed.ed_nexted = HTOO32(sed->physaddr);
   1858       1.195    bouyer 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1859       1.195    bouyer 	    sizeof(head->ed.ed_nexted),
   1860       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1861         1.1  augustss }
   1862         1.1  augustss 
   1863         1.1  augustss /*
   1864       1.224       mrg  * Remove an ED from the schedule.  Called with USB lock held.
   1865         1.3  augustss  */
   1866       1.224       mrg Static void
   1867       1.224       mrg ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1868         1.3  augustss {
   1869       1.120  augustss 	ohci_soft_ed_t *p;
   1870         1.3  augustss 
   1871       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1872       1.224       mrg 
   1873         1.3  augustss 	/* XXX */
   1874       1.133    toshii 	for (p = head; p != NULL && p->next != sed; p = p->next)
   1875         1.3  augustss 		;
   1876  1.254.2.20     skrll 	KASSERT(p != NULL);
   1877  1.254.2.20     skrll 
   1878       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1879       1.195    bouyer 	    sizeof(sed->ed.ed_nexted),
   1880       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1881         1.3  augustss 	p->next = sed->next;
   1882        1.39  augustss 	p->ed.ed_nexted = sed->ed.ed_nexted;
   1883       1.195    bouyer 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   1884       1.195    bouyer 	    sizeof(p->ed.ed_nexted),
   1885       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1886         1.3  augustss }
   1887         1.3  augustss 
   1888         1.3  augustss /*
   1889         1.1  augustss  * When a transfer is completed the TD is added to the done queue by
   1890         1.1  augustss  * the host controller.  This queue is the processed by software.
   1891         1.1  augustss  * Unfortunately the queue contains the physical address of the TD
   1892         1.9  augustss  * and we have no simple way to translate this back to a kernel address.
   1893         1.1  augustss  * To make the translation possible (and fast) we use a hash table of
   1894         1.1  augustss  * TDs currently in the schedule.  The physical address is used as the
   1895         1.1  augustss  * hash value.
   1896         1.1  augustss  */
   1897         1.1  augustss 
   1898         1.1  augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
   1899       1.224       mrg /* Called with USB lock held. */
   1900         1.1  augustss void
   1901        1.91  augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1902         1.1  augustss {
   1903         1.1  augustss 	int h = HASH(std->physaddr);
   1904         1.1  augustss 
   1905   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1906       1.224       mrg 
   1907         1.1  augustss 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
   1908         1.1  augustss }
   1909         1.1  augustss 
   1910       1.224       mrg /* Called with USB lock held. */
   1911         1.1  augustss void
   1912       1.179  christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1913         1.1  augustss {
   1914        1.46  augustss 
   1915   1.254.2.7     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1916       1.224       mrg 
   1917         1.1  augustss 	LIST_REMOVE(std, hnext);
   1918         1.1  augustss }
   1919         1.1  augustss 
   1920         1.1  augustss ohci_soft_td_t *
   1921        1.91  augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
   1922         1.1  augustss {
   1923         1.1  augustss 	int h = HASH(a);
   1924         1.1  augustss 	ohci_soft_td_t *std;
   1925         1.1  augustss 
   1926       1.120  augustss 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
   1927        1.53  augustss 	     std != NULL;
   1928         1.1  augustss 	     std = LIST_NEXT(std, hnext))
   1929         1.1  augustss 		if (std->physaddr == a)
   1930  1.254.2.13     skrll 			return std;
   1931  1.254.2.13     skrll 	return NULL;
   1932        1.83  augustss }
   1933        1.83  augustss 
   1934       1.224       mrg /* Called with USB lock held. */
   1935        1.83  augustss void
   1936        1.91  augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1937        1.83  augustss {
   1938        1.83  augustss 	int h = HASH(sitd->physaddr);
   1939        1.83  augustss 
   1940  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1941  1.254.2.18     skrll 
   1942       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1943       1.224       mrg 
   1944  1.254.2.18     skrll 	DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr,
   1945  1.254.2.18     skrll 	    0, 0);
   1946        1.83  augustss 
   1947        1.83  augustss 	LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
   1948        1.83  augustss }
   1949        1.83  augustss 
   1950       1.224       mrg /* Called with USB lock held. */
   1951        1.83  augustss void
   1952       1.179  christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1953        1.83  augustss {
   1954        1.83  augustss 
   1955  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1956  1.254.2.18     skrll 
   1957       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1958       1.224       mrg 
   1959  1.254.2.18     skrll 	DPRINTFN(10, "sitd=%p physaddr=0x%08lx", sitd, (u_long)sitd->physaddr,
   1960  1.254.2.18     skrll 	    0, 0);
   1961        1.83  augustss 
   1962        1.83  augustss 	LIST_REMOVE(sitd, hnext);
   1963        1.83  augustss }
   1964        1.83  augustss 
   1965        1.83  augustss ohci_soft_itd_t *
   1966        1.91  augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
   1967        1.83  augustss {
   1968        1.83  augustss 	int h = HASH(a);
   1969        1.83  augustss 	ohci_soft_itd_t *sitd;
   1970        1.83  augustss 
   1971       1.120  augustss 	for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
   1972        1.83  augustss 	     sitd != NULL;
   1973        1.83  augustss 	     sitd = LIST_NEXT(sitd, hnext))
   1974        1.83  augustss 		if (sitd->physaddr == a)
   1975  1.254.2.13     skrll 			return sitd;
   1976  1.254.2.13     skrll 	return NULL;
   1977         1.1  augustss }
   1978         1.1  augustss 
   1979         1.1  augustss void
   1980        1.91  augustss ohci_timeout(void *addr)
   1981         1.1  augustss {
   1982  1.254.2.25     skrll 	struct usbd_xfer *xfer = addr;
   1983  1.254.2.25     skrll 	struct ohci_xfer *oxfer = OHCI_XFER2OXFER(xfer);
   1984  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   1985       1.114  augustss 
   1986  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1987  1.254.2.18     skrll 	DPRINTF("oxfer=%p", oxfer, 0, 0, 0);
   1988       1.114  augustss 
   1989       1.116  augustss 	if (sc->sc_dying) {
   1990       1.224       mrg 		mutex_enter(&sc->sc_lock);
   1991  1.254.2.25     skrll 		ohci_abort_xfer(xfer, USBD_TIMEOUT);
   1992       1.224       mrg 		mutex_exit(&sc->sc_lock);
   1993       1.116  augustss 		return;
   1994       1.116  augustss 	}
   1995       1.116  augustss 
   1996       1.114  augustss 	/* Execute the abort in a process context. */
   1997       1.231  jmcneill 	usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr,
   1998       1.231  jmcneill 	    USB_TASKQ_MPSAFE);
   1999  1.254.2.25     skrll 	usb_add_task(xfer->ux_pipe->up_dev, &oxfer->abort_task,
   2000       1.178     joerg 	    USB_TASKQ_HC);
   2001       1.114  augustss }
   2002       1.114  augustss 
   2003       1.114  augustss void
   2004       1.114  augustss ohci_timeout_task(void *addr)
   2005       1.114  augustss {
   2006  1.254.2.19     skrll 	struct usbd_xfer *xfer = addr;
   2007  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2008         1.1  augustss 
   2009  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2010  1.254.2.18     skrll 
   2011  1.254.2.18     skrll 	DPRINTF("xfer=%p", xfer, 0, 0, 0);
   2012        1.45  augustss 
   2013       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2014        1.54  augustss 	ohci_abort_xfer(xfer, USBD_TIMEOUT);
   2015       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2016         1.1  augustss }
   2017         1.1  augustss 
   2018        1.52  augustss #ifdef OHCI_DEBUG
   2019         1.1  augustss void
   2020       1.168  augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
   2021         1.1  augustss {
   2022  1.254.2.34     skrll 	for (; std; std = std->nexttd) {
   2023       1.168  augustss 		ohci_dump_td(sc, std);
   2024  1.254.2.34     skrll 		KASSERTMSG(std->nexttd == NULL || std != std->nexttd,
   2025  1.254.2.34     skrll 		    "std %p next %p", std, std->nexttd);
   2026  1.254.2.34     skrll 	}
   2027         1.1  augustss }
   2028         1.1  augustss 
   2029         1.1  augustss void
   2030       1.168  augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   2031         1.1  augustss {
   2032  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2033        1.92        tv 
   2034       1.204    martin 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   2035       1.204    martin 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2036  1.254.2.18     skrll 
   2037  1.254.2.18     skrll 	uint32_t flags = O32TOH(std->td.td_flags);
   2038  1.254.2.40     skrll 	DPRINTF("TD(%p) at 0x%08lx:", std, (u_long)std->physaddr, 0, 0);
   2039  1.254.2.18     skrll 	DPRINTF("    round=%d DP=%x DI=%x T=%x",
   2040  1.254.2.18     skrll 	    !!(flags & OHCI_TD_R),
   2041  1.254.2.18     skrll 	    __SHIFTOUT(flags, OHCI_TD_DP_MASK),
   2042  1.254.2.18     skrll 	    OHCI_TD_GET_DI(flags),
   2043  1.254.2.18     skrll 	    __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK));
   2044  1.254.2.18     skrll 	DPRINTF("    EC=%d CC=%d", OHCI_TD_GET_EC(flags), OHCI_TD_GET_CC(flags),
   2045  1.254.2.18     skrll 	    0, 0);
   2046  1.254.2.47     skrll 	DPRINTF("    td_cbp=0x%08lx td_nexttd=0x%08lx td_be=0x%08lx",
   2047       1.168  augustss 	       (u_long)O32TOH(std->td.td_cbp),
   2048       1.168  augustss 	       (u_long)O32TOH(std->td.td_nexttd),
   2049  1.254.2.18     skrll 	       (u_long)O32TOH(std->td.td_be), 0);
   2050         1.1  augustss }
   2051         1.1  augustss 
   2052         1.1  augustss void
   2053       1.168  augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   2054        1.83  augustss {
   2055  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2056        1.83  augustss 
   2057       1.195    bouyer 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   2058       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2059  1.254.2.18     skrll 
   2060  1.254.2.18     skrll 	uint32_t flags = O32TOH(sitd->itd.itd_flags);
   2061  1.254.2.40     skrll 	DPRINTF("ITD(%p) at 0x%08lx", sitd, (u_long)sitd->physaddr, 0, 0);
   2062  1.254.2.18     skrll 	DPRINTF("    sf=%d di=%d fc=%d cc=%d",
   2063  1.254.2.18     skrll 	    OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags),
   2064  1.254.2.18     skrll 	    OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags));
   2065  1.254.2.18     skrll 	DPRINTF("    bp0=0x%08x next=0x%08x be=0x%08x",
   2066  1.254.2.18     skrll 	    O32TOH(sitd->itd.itd_bp0),
   2067  1.254.2.18     skrll 	    O32TOH(sitd->itd.itd_nextitd),
   2068  1.254.2.18     skrll 	    O32TOH(sitd->itd.itd_be), 0);
   2069  1.254.2.18     skrll 	CTASSERT(OHCI_ITD_NOFFSET == 8);
   2070  1.254.2.18     skrll 	DPRINTF("    offs[0] = 0x%04x  offs[1] = 0x%04x  "
   2071  1.254.2.18     skrll 	    "offs[2] = 0x%04x  offs[3] = 0x%04x",
   2072  1.254.2.18     skrll 	    O16TOH(sitd->itd.itd_offset[0]),
   2073  1.254.2.18     skrll 	    O16TOH(sitd->itd.itd_offset[1]),
   2074  1.254.2.18     skrll 	    O16TOH(sitd->itd.itd_offset[2]),
   2075  1.254.2.18     skrll 	    O16TOH(sitd->itd.itd_offset[3]));
   2076  1.254.2.18     skrll 	DPRINTF("    offs[4] = 0x%04x  offs[5] = 0x%04x  "
   2077  1.254.2.18     skrll 	    "offs[6] = 0x%04x  offs[7] = 0x%04x",
   2078  1.254.2.18     skrll 	    O16TOH(sitd->itd.itd_offset[4]),
   2079  1.254.2.18     skrll 	    O16TOH(sitd->itd.itd_offset[5]),
   2080  1.254.2.18     skrll 	    O16TOH(sitd->itd.itd_offset[6]),
   2081  1.254.2.18     skrll 	    O16TOH(sitd->itd.itd_offset[7]));
   2082        1.83  augustss }
   2083        1.83  augustss 
   2084        1.83  augustss void
   2085       1.168  augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   2086        1.83  augustss {
   2087        1.83  augustss 	for (; sitd; sitd = sitd->nextitd)
   2088       1.168  augustss 		ohci_dump_itd(sc, sitd);
   2089        1.83  augustss }
   2090        1.83  augustss 
   2091        1.83  augustss void
   2092       1.168  augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
   2093         1.1  augustss {
   2094  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2095        1.92        tv 
   2096       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2097       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2098  1.254.2.18     skrll 
   2099  1.254.2.18     skrll 	uint32_t flags = O32TOH(sed->ed.ed_flags);
   2100  1.254.2.18     skrll 	DPRINTF("ED(%p) at 0x%08lx:", sed, sed->physaddr, 0, 0);
   2101  1.254.2.18     skrll 	DPRINTF("    addr=%d endpt=%d maxp=%d",
   2102  1.254.2.18     skrll 	    OHCI_ED_GET_FA(flags),
   2103  1.254.2.18     skrll 	    OHCI_ED_GET_EN(flags),
   2104  1.254.2.18     skrll 	    OHCI_ED_GET_MAXP(flags),
   2105  1.254.2.18     skrll 	    0);
   2106  1.254.2.18     skrll 	DPRINTF("    dir=%d speed=%d skip=%d iso=%d",
   2107  1.254.2.18     skrll 	   __SHIFTOUT(flags, OHCI_ED_DIR_MASK),
   2108  1.254.2.18     skrll 	    !!(flags & OHCI_ED_SPEED),
   2109  1.254.2.18     skrll 	    !!(flags & OHCI_ED_SKIP),
   2110  1.254.2.18     skrll 	    !!(flags & OHCI_ED_FORMAT_ISO));
   2111  1.254.2.18     skrll 	DPRINTF("    tailp=0x%08lx", (u_long)O32TOH(sed->ed.ed_tailp),
   2112  1.254.2.18     skrll 	    0, 0, 0);
   2113  1.254.2.18     skrll 	DPRINTF("    headp=0x%08lx nexted=0x%08lx halted=%d carry=%d",
   2114  1.254.2.18     skrll 	    O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted),
   2115  1.254.2.18     skrll 	    !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED),
   2116  1.254.2.18     skrll 	    !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
   2117         1.1  augustss }
   2118         1.1  augustss #endif
   2119         1.1  augustss 
   2120         1.1  augustss usbd_status
   2121  1.254.2.19     skrll ohci_open(struct usbd_pipe *pipe)
   2122         1.1  augustss {
   2123  1.254.2.19     skrll 	struct usbd_device *dev = pipe->up_dev;
   2124  1.254.2.12     skrll 	struct usbd_bus *bus = dev->ud_bus;
   2125  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2126   1.254.2.7     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
   2127  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2128   1.254.2.7     skrll 	uint8_t addr = dev->ud_addr;
   2129   1.254.2.1     skrll 	uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   2130         1.1  augustss 	ohci_soft_ed_t *sed;
   2131         1.1  augustss 	ohci_soft_td_t *std;
   2132        1.60  augustss 	ohci_soft_itd_t *sitd;
   2133        1.60  augustss 	ohci_physaddr_t tdphys;
   2134   1.254.2.1     skrll 	uint32_t fmt;
   2135       1.224       mrg 	usbd_status err = USBD_NOMEM;
   2136        1.64  augustss 	int ival;
   2137         1.1  augustss 
   2138  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2139  1.254.2.18     skrll 	DPRINTFN(1, "pipe=%p, addr=%d, endpt=%d (%d)", pipe, addr,
   2140  1.254.2.18     skrll 	    ed->bEndpointAddress, bus->ub_rhaddr);
   2141        1.81  augustss 
   2142       1.224       mrg 	if (sc->sc_dying) {
   2143       1.241     skrll 		return USBD_IOERROR;
   2144       1.224       mrg 	}
   2145       1.116  augustss 
   2146        1.90   thorpej 	std = NULL;
   2147        1.90   thorpej 	sed = NULL;
   2148        1.90   thorpej 
   2149  1.254.2.12     skrll 	if (addr == bus->ub_rhaddr) {
   2150         1.1  augustss 		switch (ed->bEndpointAddress) {
   2151         1.1  augustss 		case USB_CONTROL_ENDPOINT:
   2152  1.254.2.12     skrll 			pipe->up_methods = &roothub_ctrl_methods;
   2153         1.1  augustss 			break;
   2154  1.254.2.12     skrll 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
   2155   1.254.2.7     skrll 			pipe->up_methods = &ohci_root_intr_methods;
   2156         1.1  augustss 			break;
   2157         1.1  augustss 		default:
   2158       1.224       mrg 			err = USBD_INVAL;
   2159       1.241     skrll 			goto bad;
   2160         1.1  augustss 		}
   2161         1.1  augustss 	} else {
   2162         1.1  augustss 		sed = ohci_alloc_sed(sc);
   2163        1.53  augustss 		if (sed == NULL)
   2164       1.241     skrll 			goto bad;
   2165         1.1  augustss 		opipe->sed = sed;
   2166        1.60  augustss 		if (xfertype == UE_ISOCHRONOUS) {
   2167        1.60  augustss 			sitd = ohci_alloc_sitd(sc);
   2168       1.127  augustss 			if (sitd == NULL)
   2169       1.241     skrll 				goto bad;
   2170       1.241     skrll 
   2171        1.60  augustss 			opipe->tail.itd = sitd;
   2172        1.76   tsutsui 			tdphys = sitd->physaddr;
   2173        1.60  augustss 			fmt = OHCI_ED_FORMAT_ISO;
   2174        1.83  augustss 			if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
   2175        1.83  augustss 				fmt |= OHCI_ED_DIR_IN;
   2176        1.83  augustss 			else
   2177        1.83  augustss 				fmt |= OHCI_ED_DIR_OUT;
   2178        1.60  augustss 		} else {
   2179        1.60  augustss 			std = ohci_alloc_std(sc);
   2180       1.127  augustss 			if (std == NULL)
   2181       1.241     skrll 				goto bad;
   2182       1.241     skrll 
   2183        1.60  augustss 			opipe->tail.td = std;
   2184        1.76   tsutsui 			tdphys = std->physaddr;
   2185        1.83  augustss 			fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
   2186        1.60  augustss 		}
   2187       1.168  augustss 		sed->ed.ed_flags = HTOO32(
   2188       1.120  augustss 			OHCI_ED_SET_FA(addr) |
   2189       1.147   mycroft 			OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
   2190   1.254.2.7     skrll 			(dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
   2191       1.109  augustss 			fmt |
   2192        1.16  augustss 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
   2193       1.214  jakllsch 		sed->ed.ed_headp = HTOO32(tdphys |
   2194   1.254.2.7     skrll 		    (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0));
   2195       1.214  jakllsch 		sed->ed.ed_tailp = HTOO32(tdphys);
   2196       1.195    bouyer 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2197       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2198         1.1  augustss 
   2199        1.60  augustss 		switch (xfertype) {
   2200         1.1  augustss 		case UE_CONTROL:
   2201   1.254.2.7     skrll 			pipe->up_methods = &ohci_device_ctrl_methods;
   2202       1.120  augustss 			err = usb_allocmem(&sc->sc_bus,
   2203       1.120  augustss 				  sizeof(usb_device_request_t),
   2204  1.254.2.21     skrll 				  0, &opipe->ctrl.reqdma);
   2205        1.53  augustss 			if (err)
   2206         1.1  augustss 				goto bad;
   2207       1.224       mrg 			mutex_enter(&sc->sc_lock);
   2208       1.168  augustss 			ohci_add_ed(sc, sed, sc->sc_ctrl_head);
   2209       1.224       mrg 			mutex_exit(&sc->sc_lock);
   2210         1.1  augustss 			break;
   2211         1.1  augustss 		case UE_INTERRUPT:
   2212   1.254.2.7     skrll 			pipe->up_methods = &ohci_device_intr_methods;
   2213   1.254.2.7     skrll 			ival = pipe->up_interval;
   2214        1.64  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   2215        1.64  augustss 				ival = ed->bInterval;
   2216       1.226     skrll 			err = ohci_device_setintr(sc, opipe, ival);
   2217       1.226     skrll 			if (err)
   2218       1.226     skrll 				goto bad;
   2219       1.226     skrll 			break;
   2220         1.1  augustss 		case UE_ISOCHRONOUS:
   2221   1.254.2.7     skrll 			pipe->up_methods = &ohci_device_isoc_methods;
   2222  1.254.2.13     skrll 			return ohci_setup_isoc(pipe);
   2223         1.1  augustss 		case UE_BULK:
   2224   1.254.2.7     skrll 			pipe->up_methods = &ohci_device_bulk_methods;
   2225       1.224       mrg 			mutex_enter(&sc->sc_lock);
   2226       1.168  augustss 			ohci_add_ed(sc, sed, sc->sc_bulk_head);
   2227       1.224       mrg 			mutex_exit(&sc->sc_lock);
   2228         1.3  augustss 			break;
   2229         1.1  augustss 		}
   2230         1.1  augustss 	}
   2231       1.224       mrg 
   2232       1.224       mrg 	return USBD_NORMAL_COMPLETION;
   2233         1.1  augustss 
   2234         1.1  augustss  bad:
   2235       1.241     skrll 	if (std != NULL) {
   2236        1.90   thorpej 		ohci_free_std(sc, std);
   2237       1.241     skrll 	}
   2238        1.90   thorpej 	if (sed != NULL)
   2239        1.90   thorpej 		ohci_free_sed(sc, sed);
   2240       1.224       mrg 	return err;
   2241       1.120  augustss 
   2242         1.1  augustss }
   2243         1.1  augustss 
   2244         1.1  augustss /*
   2245        1.34  augustss  * Close a reqular pipe.
   2246        1.34  augustss  * Assumes that there are no pending transactions.
   2247        1.34  augustss  */
   2248        1.34  augustss void
   2249  1.254.2.19     skrll ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head)
   2250        1.34  augustss {
   2251  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2252  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2253        1.34  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   2254        1.34  augustss 
   2255       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2256       1.224       mrg 
   2257        1.34  augustss #ifdef DIAGNOSTIC
   2258       1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   2259       1.168  augustss 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2260       1.168  augustss 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
   2261        1.34  augustss 		ohci_soft_td_t *std;
   2262       1.168  augustss 		std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
   2263        1.34  augustss 		printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
   2264        1.34  augustss 		       "tl=0x%x pipe=%p, std=%p\n", sed,
   2265       1.168  augustss 		       (int)O32TOH(sed->ed.ed_headp),
   2266       1.168  augustss 		       (int)O32TOH(sed->ed.ed_tailp),
   2267        1.34  augustss 		       pipe, std);
   2268       1.229  christos #ifdef OHCI_DEBUG
   2269       1.107  augustss 		usbd_dump_pipe(&opipe->pipe);
   2270       1.168  augustss 		ohci_dump_ed(sc, sed);
   2271       1.106  augustss 		if (std)
   2272       1.168  augustss 			ohci_dump_td(sc, std);
   2273       1.106  augustss #endif
   2274        1.34  augustss 		usb_delay_ms(&sc->sc_bus, 2);
   2275       1.168  augustss 		if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2276       1.168  augustss 		    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   2277        1.34  augustss 			printf("ohci_close_pipe: pipe still not empty\n");
   2278        1.34  augustss 	}
   2279        1.34  augustss #endif
   2280       1.224       mrg 	ohci_rem_ed(sc, sed, head);
   2281       1.133    toshii 	/* Make sure the host controller is not touching this ED */
   2282       1.133    toshii 	usb_delay_ms(&sc->sc_bus, 1);
   2283   1.254.2.7     skrll 	pipe->up_endpoint->ue_toggle =
   2284       1.214  jakllsch 	    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
   2285  1.254.2.35     skrll 	ohci_free_sed_locked(sc, opipe->sed);
   2286        1.34  augustss }
   2287        1.34  augustss 
   2288       1.120  augustss /*
   2289        1.34  augustss  * Abort a device request.
   2290        1.34  augustss  * If this routine is called at splusb() it guarantees that the request
   2291        1.34  augustss  * will be removed from the hardware scheduling and that the callback
   2292        1.34  augustss  * for it will be called with USBD_CANCELLED status.
   2293        1.34  augustss  * It's impossible to guarantee that the requested transfer will not
   2294        1.34  augustss  * have happened since the hardware runs concurrently.
   2295        1.34  augustss  * If the transaction has already happened we rely on the ordinary
   2296        1.34  augustss  * interrupt processing to process it.
   2297       1.224       mrg  * XXX This is most probably wrong.
   2298       1.224       mrg  * XXXMRG this doesn't make sense anymore.
   2299        1.34  augustss  */
   2300        1.34  augustss void
   2301  1.254.2.19     skrll ohci_abort_xfer(struct usbd_xfer *xfer, usbd_status status)
   2302        1.34  augustss {
   2303  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2304  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2305       1.106  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   2306       1.106  augustss 	ohci_soft_td_t *p, *n;
   2307       1.106  augustss 	ohci_physaddr_t headp;
   2308       1.224       mrg 	int hit;
   2309       1.159  augustss 	int wake;
   2310        1.34  augustss 
   2311  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2312  1.254.2.18     skrll 	DPRINTF("xfer=%p pipe=%p sed=%p", xfer, opipe,sed, 0);
   2313        1.34  augustss 
   2314       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2315   1.254.2.3     skrll 	ASSERT_SLEEPABLE();
   2316       1.224       mrg 
   2317       1.116  augustss 	if (sc->sc_dying) {
   2318       1.116  augustss 		/* If we're dying, just do the software part. */
   2319   1.254.2.7     skrll 		xfer->ux_status = status;	/* make software ignore it */
   2320   1.254.2.7     skrll 		callout_halt(&xfer->ux_callout, &sc->sc_lock);
   2321       1.116  augustss 		usb_transfer_complete(xfer);
   2322       1.170  christos 		return;
   2323       1.116  augustss 	}
   2324       1.116  augustss 
   2325       1.106  augustss 	/*
   2326       1.159  augustss 	 * If an abort is already in progress then just wait for it to
   2327       1.159  augustss 	 * complete and return.
   2328       1.159  augustss 	 */
   2329   1.254.2.7     skrll 	if (xfer->ux_hcflags & UXFER_ABORTING) {
   2330  1.254.2.18     skrll 		DPRINTFN(2, "already aborting", 0, 0, 0, 0);
   2331       1.159  augustss #ifdef DIAGNOSTIC
   2332       1.159  augustss 		if (status == USBD_TIMEOUT)
   2333       1.235     skrll 			printf("%s: TIMEOUT while aborting\n", __func__);
   2334       1.159  augustss #endif
   2335       1.159  augustss 		/* Override the status which might be USBD_TIMEOUT. */
   2336   1.254.2.7     skrll 		xfer->ux_status = status;
   2337  1.254.2.18     skrll 		DPRINTFN(2, "waiting for abort to finish", 0, 0, 0, 0);
   2338   1.254.2.7     skrll 		xfer->ux_hcflags |= UXFER_ABORTWAIT;
   2339   1.254.2.7     skrll 		while (xfer->ux_hcflags & UXFER_ABORTING)
   2340   1.254.2.7     skrll 			cv_wait(&xfer->ux_hccv, &sc->sc_lock);
   2341       1.224       mrg 		goto done;
   2342       1.159  augustss 	}
   2343   1.254.2.7     skrll 	xfer->ux_hcflags |= UXFER_ABORTING;
   2344       1.159  augustss 
   2345       1.159  augustss 	/*
   2346       1.106  augustss 	 * Step 1: Make interrupt routine and hardware ignore xfer.
   2347       1.106  augustss 	 */
   2348   1.254.2.7     skrll 	xfer->ux_status = status;	/* make software ignore it */
   2349   1.254.2.7     skrll 	callout_stop(&xfer->ux_callout);
   2350  1.254.2.18     skrll 	DPRINTFN(1, "stop ed=%p", sed, 0, 0, 0);
   2351       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2352       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2353       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2354       1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   2355       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2356       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2357       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2358        1.34  augustss 
   2359       1.120  augustss 	/*
   2360       1.106  augustss 	 * Step 2: Wait until we know hardware has finished any possible
   2361       1.106  augustss 	 * use of the xfer.  Also make sure the soft interrupt routine
   2362       1.106  augustss 	 * has run.
   2363       1.106  augustss 	 */
   2364       1.224       mrg 	/* Hardware finishes in 1ms */
   2365   1.254.2.7     skrll 	usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock);
   2366       1.119  augustss 	sc->sc_softwake = 1;
   2367       1.119  augustss 	usb_schedsoftintr(&sc->sc_bus);
   2368       1.224       mrg 	cv_wait(&sc->sc_softwake_cv, &sc->sc_lock);
   2369       1.119  augustss 
   2370       1.120  augustss 	/*
   2371       1.106  augustss 	 * Step 3: Remove any vestiges of the xfer from the hardware.
   2372       1.106  augustss 	 * The complication here is that the hardware may have executed
   2373       1.106  augustss 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2374       1.106  augustss 	 * the TDs of this xfer we check if the hardware points to
   2375       1.106  augustss 	 * any of them.
   2376       1.106  augustss 	 */
   2377   1.254.2.7     skrll 	p = xfer->ux_hcpriv;
   2378  1.254.2.24     skrll 	KASSERT(p);
   2379  1.254.2.24     skrll 
   2380       1.106  augustss #ifdef OHCI_DEBUG
   2381  1.254.2.18     skrll 	DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2382  1.254.2.18     skrll 
   2383  1.254.2.39     skrll 	if (ohcidebug >= 2) {
   2384  1.254.2.18     skrll 		DPRINTF("sed:", 0, 0, 0, 0);
   2385       1.168  augustss 		ohci_dump_ed(sc, sed);
   2386       1.168  augustss 		ohci_dump_tds(sc, p);
   2387       1.106  augustss 	}
   2388  1.254.2.18     skrll 	DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2389       1.106  augustss #endif
   2390       1.168  augustss 	headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
   2391       1.106  augustss 	hit = 0;
   2392        1.53  augustss 	for (; p->xfer == xfer; p = n) {
   2393       1.106  augustss 		hit |= headp == p->physaddr;
   2394        1.38  augustss 		n = p->nexttd;
   2395  1.254.2.35     skrll 		ohci_hash_rem_td(sc, p);
   2396        1.34  augustss 	}
   2397       1.106  augustss 	/* Zap headp register if hardware pointed inside the xfer. */
   2398       1.106  augustss 	if (hit) {
   2399  1.254.2.18     skrll 		DPRINTFN(1, "set hd=0x%08x, tl=0x%08x",  (int)p->physaddr,
   2400  1.254.2.18     skrll 		    (int)O32TOH(sed->ed.ed_tailp), 0, 0);
   2401       1.168  augustss 		sed->ed.ed_headp = HTOO32(p->physaddr); /* unlink TDs */
   2402       1.195    bouyer 		usb_syncmem(&sed->dma,
   2403       1.195    bouyer 		    sed->offs + offsetof(ohci_ed_t, ed_headp),
   2404       1.195    bouyer 		    sizeof(sed->ed.ed_headp),
   2405       1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2406       1.106  augustss 	} else {
   2407  1.254.2.18     skrll 		DPRINTFN(1, "no hit", 0, 0, 0, 0);
   2408       1.106  augustss 	}
   2409        1.34  augustss 
   2410       1.106  augustss 	/*
   2411       1.106  augustss 	 * Step 4: Turn on hardware again.
   2412       1.106  augustss 	 */
   2413       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2414       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2415       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2416       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   2417       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2418       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2419       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2420        1.38  augustss 
   2421       1.106  augustss 	/*
   2422       1.106  augustss 	 * Step 5: Execute callback.
   2423       1.106  augustss 	 */
   2424   1.254.2.7     skrll 	wake = xfer->ux_hcflags & UXFER_ABORTWAIT;
   2425   1.254.2.7     skrll 	xfer->ux_hcflags &= ~(UXFER_ABORTING | UXFER_ABORTWAIT);
   2426        1.53  augustss 	usb_transfer_complete(xfer);
   2427       1.159  augustss 	if (wake)
   2428   1.254.2.7     skrll 		cv_broadcast(&xfer->ux_hccv);
   2429        1.38  augustss 
   2430       1.224       mrg done:
   2431       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2432        1.34  augustss }
   2433        1.34  augustss 
   2434        1.34  augustss /*
   2435         1.1  augustss  * Data structures and routines to emulate the root hub.
   2436         1.1  augustss  */
   2437  1.254.2.12     skrll Static int
   2438  1.254.2.12     skrll ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
   2439  1.254.2.12     skrll     void *buf, int buflen)
   2440        1.17  augustss {
   2441  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   2442         1.1  augustss 	usb_port_status_t ps;
   2443  1.254.2.12     skrll 	uint16_t len, value, index;
   2444  1.254.2.12     skrll 	int l, totlen = 0;
   2445  1.254.2.12     skrll 	int port, i;
   2446   1.254.2.1     skrll 	uint32_t v;
   2447         1.1  augustss 
   2448  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2449  1.254.2.18     skrll 
   2450        1.83  augustss 	if (sc->sc_dying)
   2451  1.254.2.12     skrll 		return -1;
   2452         1.1  augustss 
   2453  1.254.2.18     skrll 	DPRINTFN(4, "type=0x%02x request=%02x", req->bmRequestType,
   2454  1.254.2.18     skrll 	    req->bRequest, 0, 0);
   2455         1.1  augustss 
   2456         1.1  augustss 	len = UGETW(req->wLength);
   2457         1.1  augustss 	value = UGETW(req->wValue);
   2458         1.1  augustss 	index = UGETW(req->wIndex);
   2459        1.43  augustss 
   2460         1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   2461  1.254.2.12     skrll 	switch (C(req->bRequest, req->bmRequestType)) {
   2462         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   2463  1.254.2.18     skrll 		DPRINTFN(8, "wValue=0x%04x", value, 0, 0, 0);
   2464       1.171  christos 		if (len == 0)
   2465       1.171  christos 			break;
   2466  1.254.2.12     skrll 		switch (value) {
   2467  1.254.2.12     skrll 		case C(0, UDESC_DEVICE): {
   2468  1.254.2.12     skrll 			usb_device_descriptor_t devd;
   2469  1.254.2.12     skrll 
   2470  1.254.2.12     skrll 			totlen = min(buflen, sizeof(devd));
   2471  1.254.2.12     skrll 			memcpy(&devd, buf, totlen);
   2472  1.254.2.12     skrll 			USETW(devd.idVendor, sc->sc_id_vendor);
   2473  1.254.2.12     skrll 			memcpy(buf, &devd, totlen);
   2474         1.1  augustss 			break;
   2475  1.254.2.12     skrll 		}
   2476  1.254.2.12     skrll 		case C(1, UDESC_STRING):
   2477       1.186  drochner #define sd ((usb_string_descriptor_t *)buf)
   2478  1.254.2.12     skrll 			/* Vendor */
   2479  1.254.2.12     skrll 			totlen = usb_makestrdesc(sd, len, sc->sc_vendor);
   2480  1.254.2.12     skrll 			break;
   2481  1.254.2.12     skrll 		case C(2, UDESC_STRING):
   2482  1.254.2.12     skrll 			/* Product */
   2483  1.254.2.12     skrll 			totlen = usb_makestrdesc(sd, len, "OHCI root hub");
   2484         1.1  augustss 			break;
   2485  1.254.2.12     skrll #undef sd
   2486         1.1  augustss 		default:
   2487  1.254.2.12     skrll 			/* default from usbroothub */
   2488  1.254.2.12     skrll 			return buflen;
   2489         1.1  augustss 		}
   2490         1.1  augustss 		break;
   2491  1.254.2.12     skrll 
   2492         1.1  augustss 	/* Hub requests */
   2493         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   2494         1.1  augustss 		break;
   2495         1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   2496  1.254.2.18     skrll 		DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%d feature=%d",
   2497  1.254.2.18     skrll 		    index, value, 0, 0);
   2498         1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2499  1.254.2.12     skrll 			return -1;
   2500         1.1  augustss 		}
   2501         1.1  augustss 		port = OHCI_RH_PORT_STATUS(index);
   2502         1.1  augustss 		switch(value) {
   2503         1.1  augustss 		case UHF_PORT_ENABLE:
   2504         1.1  augustss 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
   2505         1.1  augustss 			break;
   2506         1.1  augustss 		case UHF_PORT_SUSPEND:
   2507         1.1  augustss 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
   2508         1.1  augustss 			break;
   2509         1.1  augustss 		case UHF_PORT_POWER:
   2510        1.86  augustss 			/* Yes, writing to the LOW_SPEED bit clears power. */
   2511         1.1  augustss 			OWRITE4(sc, port, UPS_LOW_SPEED);
   2512         1.1  augustss 			break;
   2513         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2514         1.1  augustss 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
   2515         1.1  augustss 			break;
   2516         1.1  augustss 		case UHF_C_PORT_ENABLE:
   2517         1.1  augustss 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
   2518         1.1  augustss 			break;
   2519         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2520         1.1  augustss 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
   2521         1.1  augustss 			break;
   2522         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2523         1.1  augustss 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
   2524         1.1  augustss 			break;
   2525         1.1  augustss 		case UHF_C_PORT_RESET:
   2526         1.1  augustss 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
   2527         1.1  augustss 			break;
   2528         1.1  augustss 		default:
   2529  1.254.2.12     skrll 			return -1;
   2530         1.1  augustss 		}
   2531         1.1  augustss 		switch(value) {
   2532         1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2533         1.1  augustss 		case UHF_C_PORT_ENABLE:
   2534         1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2535         1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2536         1.1  augustss 		case UHF_C_PORT_RESET:
   2537         1.1  augustss 			/* Enable RHSC interrupt if condition is cleared. */
   2538         1.1  augustss 			if ((OREAD4(sc, port) >> 16) == 0)
   2539       1.157   mycroft 				ohci_rhsc_enable(sc);
   2540         1.1  augustss 			break;
   2541         1.1  augustss 		default:
   2542         1.1  augustss 			break;
   2543         1.1  augustss 		}
   2544         1.1  augustss 		break;
   2545         1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   2546       1.171  christos 		if (len == 0)
   2547       1.171  christos 			break;
   2548       1.146    toshii 		if ((value & 0xff) != 0) {
   2549  1.254.2.12     skrll 			return -1;
   2550         1.1  augustss 		}
   2551  1.254.2.12     skrll 		usb_hub_descriptor_t hubd;
   2552  1.254.2.12     skrll 
   2553  1.254.2.12     skrll 		totlen = min(buflen, sizeof(hubd));
   2554  1.254.2.12     skrll 		memcpy(&hubd, buf, totlen);
   2555  1.254.2.12     skrll 
   2556         1.1  augustss 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
   2557         1.1  augustss 		hubd.bNbrPorts = sc->sc_noport;
   2558        1.15  augustss 		USETW(hubd.wHubCharacteristics,
   2559       1.120  augustss 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
   2560         1.1  augustss 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
   2561         1.1  augustss 		      /* XXX overcurrent */
   2562         1.1  augustss 		      );
   2563         1.1  augustss 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
   2564         1.1  augustss 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
   2565       1.120  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   2566   1.254.2.1     skrll 			hubd.DeviceRemovable[i++] = (uint8_t)v;
   2567        1.15  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   2568  1.254.2.12     skrll 		totlen = min(totlen, hubd.bDescLength);
   2569  1.254.2.12     skrll 		memcpy(buf, &hubd, totlen);
   2570         1.1  augustss 		break;
   2571         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   2572         1.1  augustss 		if (len != 4) {
   2573  1.254.2.12     skrll 			return -1;
   2574         1.1  augustss 		}
   2575         1.1  augustss 		memset(buf, 0, len); /* ? XXX */
   2576         1.1  augustss 		totlen = len;
   2577         1.1  augustss 		break;
   2578         1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   2579  1.254.2.18     skrll 		DPRINTFN(8, "get port status i=%d", index, 0, 0, 0);
   2580         1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2581  1.254.2.12     skrll 			return -1;
   2582         1.1  augustss 		}
   2583         1.1  augustss 		if (len != 4) {
   2584  1.254.2.12     skrll 			return -1;
   2585  1.254.2.56     skrll 		}
   2586         1.1  augustss 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
   2587  1.254.2.18     skrll 		DPRINTFN(8, "port status=0x%04x", v, 0, 0, 0);
   2588         1.1  augustss 		USETW(ps.wPortStatus, v);
   2589         1.1  augustss 		USETW(ps.wPortChange, v >> 16);
   2590  1.254.2.12     skrll 		totlen = min(len, sizeof(ps));
   2591  1.254.2.12     skrll 		memcpy(buf, &ps, totlen);
   2592         1.1  augustss 		break;
   2593         1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   2594  1.254.2.12     skrll 		return -1;
   2595         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   2596         1.1  augustss 		break;
   2597         1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   2598         1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2599  1.254.2.12     skrll 			return -1;
   2600         1.1  augustss 		}
   2601         1.1  augustss 		port = OHCI_RH_PORT_STATUS(index);
   2602         1.1  augustss 		switch(value) {
   2603         1.1  augustss 		case UHF_PORT_ENABLE:
   2604         1.1  augustss 			OWRITE4(sc, port, UPS_PORT_ENABLED);
   2605         1.1  augustss 			break;
   2606         1.1  augustss 		case UHF_PORT_SUSPEND:
   2607         1.1  augustss 			OWRITE4(sc, port, UPS_SUSPEND);
   2608         1.1  augustss 			break;
   2609         1.1  augustss 		case UHF_PORT_RESET:
   2610  1.254.2.18     skrll 			DPRINTFN(5, "reset port %d", index, 0, 0, 0);
   2611         1.1  augustss 			OWRITE4(sc, port, UPS_RESET);
   2612       1.110  augustss 			for (i = 0; i < 5; i++) {
   2613       1.110  augustss 				usb_delay_ms(&sc->sc_bus,
   2614       1.110  augustss 					     USB_PORT_ROOT_RESET_DELAY);
   2615       1.116  augustss 				if (sc->sc_dying) {
   2616  1.254.2.12     skrll 					return -1;
   2617       1.116  augustss 				}
   2618         1.1  augustss 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
   2619         1.1  augustss 					break;
   2620         1.1  augustss 			}
   2621  1.254.2.18     skrll 			DPRINTFN(8, "port %d reset, status = 0x%04x", index,
   2622  1.254.2.18     skrll 			    OREAD4(sc, port), 0, 0);
   2623         1.1  augustss 			break;
   2624         1.1  augustss 		case UHF_PORT_POWER:
   2625  1.254.2.18     skrll 			DPRINTFN(2, "set port power %d", index, 0, 0, 0);
   2626         1.1  augustss 			OWRITE4(sc, port, UPS_PORT_POWER);
   2627         1.1  augustss 			break;
   2628         1.1  augustss 		default:
   2629  1.254.2.12     skrll 			return -1;
   2630         1.1  augustss 		}
   2631         1.1  augustss 		break;
   2632         1.1  augustss 	default:
   2633  1.254.2.12     skrll 		/* default from usbroothub */
   2634  1.254.2.12     skrll 		return buflen;
   2635         1.1  augustss 	}
   2636         1.1  augustss 
   2637  1.254.2.12     skrll 	return totlen;
   2638         1.1  augustss }
   2639         1.1  augustss 
   2640        1.82  augustss Static usbd_status
   2641  1.254.2.19     skrll ohci_root_intr_transfer(struct usbd_xfer *xfer)
   2642         1.1  augustss {
   2643  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2644        1.53  augustss 	usbd_status err;
   2645        1.17  augustss 
   2646        1.46  augustss 	/* Insert last in queue. */
   2647       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2648        1.53  augustss 	err = usb_insert_transfer(xfer);
   2649       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2650        1.53  augustss 	if (err)
   2651  1.254.2.13     skrll 		return err;
   2652        1.46  augustss 
   2653        1.46  augustss 	/* Pipe isn't running, start first */
   2654  1.254.2.13     skrll 	return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2655        1.17  augustss }
   2656        1.17  augustss 
   2657        1.82  augustss Static usbd_status
   2658  1.254.2.19     skrll ohci_root_intr_start(struct usbd_xfer *xfer)
   2659        1.17  augustss {
   2660  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2661         1.1  augustss 
   2662        1.83  augustss 	if (sc->sc_dying)
   2663  1.254.2.13     skrll 		return USBD_IOERROR;
   2664        1.83  augustss 
   2665       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2666       1.224       mrg 	KASSERT(sc->sc_intrxfer == NULL);
   2667        1.53  augustss 	sc->sc_intrxfer = xfer;
   2668       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2669         1.1  augustss 
   2670  1.254.2.13     skrll 	return USBD_IN_PROGRESS;
   2671         1.1  augustss }
   2672         1.1  augustss 
   2673         1.3  augustss /* Abort a root interrupt request. */
   2674        1.82  augustss Static void
   2675  1.254.2.19     skrll ohci_root_intr_abort(struct usbd_xfer *xfer)
   2676         1.1  augustss {
   2677  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2678       1.224       mrg 
   2679       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2680   1.254.2.7     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   2681        1.53  augustss 
   2682       1.252     skrll 	sc->sc_intrxfer = NULL;
   2683       1.252     skrll 
   2684   1.254.2.7     skrll 	xfer->ux_status = USBD_CANCELLED;
   2685        1.53  augustss 	usb_transfer_complete(xfer);
   2686         1.1  augustss }
   2687         1.1  augustss 
   2688         1.1  augustss /* Close the root pipe. */
   2689        1.82  augustss Static void
   2690  1.254.2.19     skrll ohci_root_intr_close(struct usbd_pipe *pipe)
   2691         1.1  augustss {
   2692  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2693       1.120  augustss 
   2694       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2695       1.224       mrg 
   2696  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2697        1.34  augustss 
   2698        1.53  augustss 	sc->sc_intrxfer = NULL;
   2699         1.1  augustss }
   2700         1.1  augustss 
   2701         1.1  augustss /************************/
   2702         1.1  augustss 
   2703  1.254.2.35     skrll int
   2704  1.254.2.35     skrll ohci_device_ctrl_init(struct usbd_xfer *xfer)
   2705  1.254.2.35     skrll {
   2706  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2707  1.254.2.35     skrll 	usb_device_request_t *req = &xfer->ux_request;
   2708  1.254.2.35     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2709  1.254.2.42     skrll 	ohci_soft_td_t *stat, *setup;
   2710  1.254.2.35     skrll 	int isread = req->bmRequestType & UT_READ;
   2711  1.254.2.35     skrll 	int len = xfer->ux_bufsize;
   2712  1.254.2.35     skrll 	int err = ENOMEM;
   2713  1.254.2.35     skrll 
   2714  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2715  1.254.2.35     skrll 
   2716  1.254.2.42     skrll 	setup = ohci_alloc_std(sc);
   2717  1.254.2.42     skrll 	if (setup == NULL) {
   2718  1.254.2.35     skrll 		goto bad1;
   2719  1.254.2.35     skrll 	}
   2720  1.254.2.42     skrll 	stat = ohci_alloc_std(sc);
   2721  1.254.2.42     skrll 	if (stat == NULL) {
   2722  1.254.2.35     skrll 		goto bad2;
   2723  1.254.2.35     skrll 	}
   2724  1.254.2.35     skrll 
   2725  1.254.2.42     skrll 	ox->ox_setup = setup;
   2726  1.254.2.35     skrll 	ox->ox_stat = stat;
   2727  1.254.2.35     skrll 	ox->ox_nstd = 0;
   2728  1.254.2.35     skrll 
   2729  1.254.2.35     skrll 	/* Set up data transaction */
   2730  1.254.2.35     skrll 	if (len != 0) {
   2731  1.254.2.35     skrll 		err = ohci_alloc_std_chain(sc, xfer, len, isread);
   2732  1.254.2.35     skrll 		if (err) {
   2733  1.254.2.35     skrll 			goto bad3;
   2734  1.254.2.35     skrll 		}
   2735  1.254.2.35     skrll 	}
   2736  1.254.2.35     skrll 	return 0;
   2737  1.254.2.35     skrll 
   2738  1.254.2.35     skrll  bad3:
   2739  1.254.2.35     skrll 	ohci_free_std(sc, stat);
   2740  1.254.2.42     skrll  bad2:
   2741  1.254.2.42     skrll 	ohci_free_std(sc, setup);
   2742  1.254.2.35     skrll  bad1:
   2743  1.254.2.35     skrll 	return err;
   2744  1.254.2.35     skrll }
   2745  1.254.2.35     skrll 
   2746  1.254.2.35     skrll void
   2747  1.254.2.35     skrll ohci_device_ctrl_fini(struct usbd_xfer *xfer)
   2748  1.254.2.35     skrll {
   2749  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2750  1.254.2.35     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2751  1.254.2.35     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2752  1.254.2.35     skrll 
   2753  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2754  1.254.2.35     skrll 	DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0);
   2755  1.254.2.35     skrll 
   2756  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
   2757  1.254.2.42     skrll 	if (ox->ox_setup != opipe->tail.td) {
   2758  1.254.2.42     skrll 		ohci_free_std_locked(sc, ox->ox_setup);
   2759  1.254.2.35     skrll 	}
   2760  1.254.2.35     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   2761  1.254.2.35     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
   2762  1.254.2.35     skrll 		if (std == NULL)
   2763  1.254.2.35     skrll 			break;
   2764  1.254.2.35     skrll 		ohci_free_std_locked(sc, std);
   2765  1.254.2.35     skrll 	}
   2766  1.254.2.35     skrll 	ohci_free_std_locked(sc, ox->ox_stat);
   2767  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
   2768  1.254.2.35     skrll 
   2769  1.254.2.35     skrll 	if (ox->ox_nstd) {
   2770  1.254.2.35     skrll 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   2771  1.254.2.35     skrll 		kmem_free(ox->ox_stds, sz);
   2772  1.254.2.35     skrll 	}
   2773  1.254.2.35     skrll }
   2774  1.254.2.35     skrll 
   2775        1.82  augustss Static usbd_status
   2776  1.254.2.19     skrll ohci_device_ctrl_transfer(struct usbd_xfer *xfer)
   2777         1.1  augustss {
   2778  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2779        1.53  augustss 	usbd_status err;
   2780        1.17  augustss 
   2781        1.46  augustss 	/* Insert last in queue. */
   2782       1.224       mrg 	mutex_enter(&sc->sc_lock);
   2783        1.53  augustss 	err = usb_insert_transfer(xfer);
   2784       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2785        1.53  augustss 	if (err)
   2786  1.254.2.13     skrll 		return err;
   2787        1.46  augustss 
   2788        1.46  augustss 	/* Pipe isn't running, start first */
   2789  1.254.2.13     skrll 	return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2790        1.17  augustss }
   2791        1.17  augustss 
   2792        1.82  augustss Static usbd_status
   2793  1.254.2.19     skrll ohci_device_ctrl_start(struct usbd_xfer *xfer)
   2794        1.17  augustss {
   2795  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2796  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2797  1.254.2.27     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2798  1.254.2.27     skrll 	usb_device_request_t *req = &xfer->ux_request;
   2799  1.254.2.27     skrll 	struct usbd_device *dev __diagused = opipe->pipe.up_dev;
   2800  1.254.2.27     skrll 	ohci_soft_td_t *setup, *stat, *next, *tail;
   2801  1.254.2.27     skrll 	ohci_soft_ed_t *sed;
   2802  1.254.2.27     skrll 	int isread;
   2803  1.254.2.27     skrll 	int len;
   2804  1.254.2.27     skrll 
   2805  1.254.2.27     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2806  1.254.2.27     skrll 
   2807        1.83  augustss 	if (sc->sc_dying)
   2808  1.254.2.13     skrll 		return USBD_IOERROR;
   2809        1.83  augustss 
   2810  1.254.2.24     skrll 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   2811         1.1  augustss 
   2812  1.254.2.27     skrll 	isread = req->bmRequestType & UT_READ;
   2813  1.254.2.27     skrll 	len = UGETW(req->wLength);
   2814  1.254.2.27     skrll 
   2815  1.254.2.40     skrll 	DPRINTF("xfer=%p len=%d, addr=%d, endpt=%d", xfer, len, dev->ud_addr,
   2816  1.254.2.40     skrll 	    opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress);
   2817  1.254.2.40     skrll 	DPRINTF("type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x",
   2818  1.254.2.27     skrll 	    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2819  1.254.2.27     skrll 	    UGETW(req->wIndex));
   2820  1.254.2.27     skrll 
   2821  1.254.2.35     skrll 	/* Need to take lock here for pipe->tail.td */
   2822  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
   2823  1.254.2.35     skrll 
   2824  1.254.2.42     skrll 	/*
   2825  1.254.2.42     skrll 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   2826  1.254.2.42     skrll 	 * next transfer
   2827  1.254.2.42     skrll 	 */
   2828  1.254.2.27     skrll 	setup = opipe->tail.td;
   2829  1.254.2.42     skrll 	opipe->tail.td = ox->ox_setup;
   2830  1.254.2.42     skrll 	ox->ox_setup = setup;
   2831  1.254.2.42     skrll 
   2832  1.254.2.35     skrll 	stat = ox->ox_stat;
   2833  1.254.2.27     skrll 
   2834  1.254.2.50     skrll 	/* point at sentinel */
   2835  1.254.2.50     skrll 	tail = opipe->tail.td;
   2836  1.254.2.27     skrll 	sed = opipe->sed;
   2837  1.254.2.27     skrll 
   2838  1.254.2.27     skrll 	KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr,
   2839  1.254.2.27     skrll 	    "address ED %d pipe %d\n",
   2840  1.254.2.27     skrll 	    OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr);
   2841  1.254.2.27     skrll 	KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) ==
   2842  1.254.2.27     skrll 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize),
   2843  1.254.2.27     skrll 	    "MPL ED %d pipe %d\n",
   2844  1.254.2.27     skrll 	    OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)),
   2845  1.254.2.27     skrll 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize));
   2846  1.254.2.27     skrll 
   2847  1.254.2.35     skrll 	/* next will point to data if len != 0 */
   2848  1.254.2.27     skrll 	next = stat;
   2849  1.254.2.27     skrll 
   2850  1.254.2.27     skrll 	/* Set up data transaction */
   2851  1.254.2.27     skrll 	if (len != 0) {
   2852  1.254.2.35     skrll 		ohci_soft_td_t *std;
   2853  1.254.2.35     skrll 		ohci_soft_td_t *end;
   2854  1.254.2.27     skrll 
   2855  1.254.2.35     skrll 		next = ox->ox_stds[0];
   2856  1.254.2.35     skrll 		ohci_reset_std_chain(sc, xfer, len, isread, next, &end);
   2857  1.254.2.27     skrll 
   2858  1.254.2.35     skrll 		end->td.td_nexttd = HTOO32(stat->physaddr);
   2859  1.254.2.35     skrll 		end->nexttd = stat;
   2860  1.254.2.35     skrll 
   2861  1.254.2.35     skrll 		usb_syncmem(&end->dma,
   2862  1.254.2.35     skrll 		    end->offs + offsetof(ohci_td_t, td_nexttd),
   2863  1.254.2.35     skrll 		    sizeof(end->td.td_nexttd),
   2864  1.254.2.35     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2865  1.254.2.35     skrll 
   2866  1.254.2.35     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   2867  1.254.2.35     skrll 		    isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2868  1.254.2.35     skrll 		std = ox->ox_stds[0];
   2869  1.254.2.27     skrll 		/* Start toggle at 1 and then use the carried toggle. */
   2870  1.254.2.27     skrll 		std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
   2871  1.254.2.27     skrll 		std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
   2872  1.254.2.27     skrll 		usb_syncmem(&std->dma,
   2873  1.254.2.27     skrll 		    std->offs + offsetof(ohci_td_t, td_flags),
   2874  1.254.2.27     skrll 		    sizeof(std->td.td_flags),
   2875  1.254.2.27     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2876  1.254.2.27     skrll 	}
   2877  1.254.2.27     skrll 
   2878  1.254.2.35     skrll 	DPRINTFN(8, "setup %p data %p stat %p tail %p", setup,
   2879  1.254.2.35     skrll 	    (len != 0 ? ox->ox_stds[0] : NULL), stat, tail);
   2880  1.254.2.35     skrll 	KASSERT(opipe->tail.td == tail);
   2881  1.254.2.35     skrll 
   2882  1.254.2.27     skrll 	memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req));
   2883  1.254.2.27     skrll 	usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE);
   2884  1.254.2.27     skrll 
   2885  1.254.2.27     skrll 	setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
   2886  1.254.2.27     skrll 				     OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
   2887  1.254.2.27     skrll 	setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0));
   2888  1.254.2.27     skrll 	setup->td.td_nexttd = HTOO32(next->physaddr);
   2889  1.254.2.27     skrll 	setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1);
   2890  1.254.2.33     skrll 	setup->nexttd = next;
   2891  1.254.2.27     skrll 	setup->len = 0;
   2892  1.254.2.27     skrll 	setup->xfer = xfer;
   2893  1.254.2.27     skrll 	setup->flags = 0;
   2894  1.254.2.35     skrll 	ohci_hash_add_td(sc, setup);
   2895  1.254.2.35     skrll 
   2896  1.254.2.27     skrll 	xfer->ux_hcpriv = setup;
   2897  1.254.2.27     skrll 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2898  1.254.2.27     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2899  1.254.2.27     skrll 
   2900  1.254.2.27     skrll 	stat->td.td_flags = HTOO32(
   2901  1.254.2.27     skrll 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) |
   2902  1.254.2.27     skrll 		OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
   2903  1.254.2.27     skrll 	stat->td.td_cbp = 0;
   2904  1.254.2.27     skrll 	stat->td.td_nexttd = HTOO32(tail->physaddr);
   2905  1.254.2.27     skrll 	stat->td.td_be = 0;
   2906  1.254.2.33     skrll 	stat->nexttd = tail;
   2907  1.254.2.27     skrll 	stat->flags = OHCI_CALL_DONE;
   2908  1.254.2.27     skrll 	stat->len = 0;
   2909  1.254.2.27     skrll 	stat->xfer = xfer;
   2910  1.254.2.35     skrll 	ohci_hash_add_td(sc, stat);
   2911  1.254.2.35     skrll 
   2912  1.254.2.27     skrll 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2913  1.254.2.27     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2914  1.254.2.27     skrll 
   2915  1.254.2.35     skrll 	memset(&tail->td, 0, sizeof(tail->td));
   2916  1.254.2.35     skrll 	tail->nexttd = NULL;
   2917  1.254.2.35     skrll 	tail->xfer = NULL;
   2918  1.254.2.35     skrll 
   2919  1.254.2.35     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   2920  1.254.2.35     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2921  1.254.2.35     skrll 
   2922  1.254.2.27     skrll #ifdef OHCI_DEBUG
   2923  1.254.2.27     skrll 	USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
   2924  1.254.2.39     skrll 	if (ohcidebug >= 5) {
   2925  1.254.2.27     skrll 		ohci_dump_ed(sc, sed);
   2926  1.254.2.27     skrll 		ohci_dump_tds(sc, setup);
   2927  1.254.2.27     skrll 	}
   2928  1.254.2.27     skrll 	USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
   2929  1.254.2.27     skrll #endif
   2930  1.254.2.27     skrll 
   2931  1.254.2.27     skrll 	/* Insert ED in schedule */
   2932  1.254.2.27     skrll 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   2933  1.254.2.27     skrll 	usb_syncmem(&sed->dma,
   2934  1.254.2.27     skrll 	    sed->offs + offsetof(ohci_ed_t, ed_tailp),
   2935  1.254.2.27     skrll 	    sizeof(sed->ed.ed_tailp),
   2936  1.254.2.27     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2937  1.254.2.27     skrll 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   2938  1.254.2.27     skrll 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   2939  1.254.2.27     skrll 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   2940  1.254.2.27     skrll 			    ohci_timeout, xfer);
   2941  1.254.2.27     skrll 	}
   2942  1.254.2.27     skrll 
   2943  1.254.2.41     skrll 	DPRINTF("done", 0, 0, 0, 0);
   2944  1.254.2.41     skrll 
   2945       1.224       mrg 	mutex_exit(&sc->sc_lock);
   2946         1.1  augustss 
   2947   1.254.2.7     skrll 	if (sc->sc_bus.ub_usepolling)
   2948        1.53  augustss 		ohci_waitintr(sc, xfer);
   2949  1.254.2.27     skrll 
   2950  1.254.2.13     skrll 	return USBD_IN_PROGRESS;
   2951         1.1  augustss }
   2952         1.1  augustss 
   2953         1.1  augustss /* Abort a device control request. */
   2954        1.82  augustss Static void
   2955  1.254.2.19     skrll ohci_device_ctrl_abort(struct usbd_xfer *xfer)
   2956         1.1  augustss {
   2957  1.254.2.25     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   2958       1.224       mrg 
   2959       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2960       1.224       mrg 
   2961  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2962  1.254.2.18     skrll 	DPRINTF("xfer=%p", xfer, 0, 0, 0);
   2963        1.54  augustss 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   2964         1.1  augustss }
   2965         1.1  augustss 
   2966         1.1  augustss /* Close a device control pipe. */
   2967        1.82  augustss Static void
   2968  1.254.2.19     skrll ohci_device_ctrl_close(struct usbd_pipe *pipe)
   2969         1.1  augustss {
   2970  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2971  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2972         1.1  augustss 
   2973       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2974       1.224       mrg 
   2975  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2976  1.254.2.18     skrll 	DPRINTF("pipe=%p", pipe, 0, 0, 0);
   2977        1.34  augustss 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
   2978  1.254.2.35     skrll 	ohci_free_std_locked(sc, opipe->tail.td);
   2979         1.3  augustss }
   2980         1.3  augustss 
   2981         1.3  augustss /************************/
   2982        1.37  augustss 
   2983        1.82  augustss Static void
   2984  1.254.2.19     skrll ohci_device_clear_toggle(struct usbd_pipe *pipe)
   2985        1.37  augustss {
   2986  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2987  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2988        1.37  augustss 
   2989       1.168  augustss 	opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
   2990        1.37  augustss }
   2991        1.37  augustss 
   2992        1.82  augustss Static void
   2993  1.254.2.19     skrll ohci_noop(struct usbd_pipe *pipe)
   2994        1.37  augustss {
   2995        1.37  augustss }
   2996         1.3  augustss 
   2997  1.254.2.35     skrll Static int
   2998  1.254.2.35     skrll ohci_device_bulk_init(struct usbd_xfer *xfer)
   2999  1.254.2.35     skrll {
   3000  1.254.2.35     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3001  1.254.2.35     skrll 	int len = xfer->ux_bufsize;
   3002  1.254.2.35     skrll 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;;
   3003  1.254.2.35     skrll 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3004  1.254.2.35     skrll 	int err;
   3005  1.254.2.35     skrll 
   3006  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3007  1.254.2.35     skrll 
   3008  1.254.2.35     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3009  1.254.2.35     skrll 
   3010  1.254.2.35     skrll 	DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread,
   3011  1.254.2.35     skrll 	    xfer->ux_flags);
   3012  1.254.2.35     skrll 	DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0);
   3013  1.254.2.35     skrll 
   3014  1.254.2.35     skrll 	/* Allocate a chain of new TDs (including a new tail). */
   3015  1.254.2.35     skrll 	err = ohci_alloc_std_chain(sc, xfer, len, isread);
   3016  1.254.2.35     skrll 	if (err)
   3017  1.254.2.35     skrll 		return err;
   3018  1.254.2.35     skrll 
   3019  1.254.2.35     skrll 	return 0;
   3020  1.254.2.35     skrll }
   3021  1.254.2.35     skrll 
   3022  1.254.2.35     skrll Static void
   3023  1.254.2.35     skrll ohci_device_bulk_fini(struct usbd_xfer *xfer)
   3024  1.254.2.35     skrll {
   3025  1.254.2.35     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3026  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3027  1.254.2.35     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3028  1.254.2.35     skrll 
   3029  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3030  1.254.2.35     skrll 	DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0);
   3031  1.254.2.35     skrll 
   3032  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
   3033  1.254.2.35     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   3034  1.254.2.35     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
   3035  1.254.2.35     skrll 		if (std == NULL)
   3036  1.254.2.35     skrll 			break;
   3037  1.254.2.35     skrll 		if (std != opipe->tail.td)
   3038  1.254.2.35     skrll 			ohci_free_std_locked(sc, std);
   3039  1.254.2.35     skrll 	}
   3040  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
   3041  1.254.2.35     skrll 
   3042  1.254.2.35     skrll 	if (ox->ox_nstd) {
   3043  1.254.2.35     skrll 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   3044  1.254.2.35     skrll 		kmem_free(ox->ox_stds, sz);
   3045  1.254.2.35     skrll 	}
   3046  1.254.2.35     skrll }
   3047  1.254.2.35     skrll 
   3048        1.82  augustss Static usbd_status
   3049  1.254.2.19     skrll ohci_device_bulk_transfer(struct usbd_xfer *xfer)
   3050         1.3  augustss {
   3051  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3052        1.53  augustss 	usbd_status err;
   3053        1.17  augustss 
   3054        1.46  augustss 	/* Insert last in queue. */
   3055       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3056        1.53  augustss 	err = usb_insert_transfer(xfer);
   3057       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3058        1.53  augustss 	if (err)
   3059  1.254.2.13     skrll 		return err;
   3060        1.46  augustss 
   3061        1.46  augustss 	/* Pipe isn't running, start first */
   3062  1.254.2.13     skrll 	return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3063        1.17  augustss }
   3064        1.17  augustss 
   3065        1.82  augustss Static usbd_status
   3066  1.254.2.19     skrll ohci_device_bulk_start(struct usbd_xfer *xfer)
   3067        1.17  augustss {
   3068  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3069  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3070  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3071  1.254.2.35     skrll 	ohci_soft_td_t *last;
   3072        1.48  augustss 	ohci_soft_td_t *data, *tail, *tdp;
   3073         1.3  augustss 	ohci_soft_ed_t *sed;
   3074       1.224       mrg 	int len, isread, endpt;
   3075         1.3  augustss 
   3076  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3077  1.254.2.18     skrll 
   3078        1.83  augustss 	if (sc->sc_dying)
   3079  1.254.2.13     skrll 		return USBD_IOERROR;
   3080        1.83  augustss 
   3081  1.254.2.24     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3082         1.3  augustss 
   3083   1.254.2.7     skrll 	len = xfer->ux_length;
   3084   1.254.2.7     skrll 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3085        1.40  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3086         1.3  augustss 	sed = opipe->sed;
   3087         1.3  augustss 
   3088  1.254.2.18     skrll 	DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread,
   3089  1.254.2.18     skrll 	    xfer->ux_flags);
   3090  1.254.2.18     skrll 	DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0);
   3091        1.34  augustss 
   3092  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
   3093         1.3  augustss 
   3094  1.254.2.42     skrll 	/*
   3095  1.254.2.42     skrll 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   3096  1.254.2.42     skrll 	 * next transfer
   3097  1.254.2.42     skrll 	 */
   3098        1.60  augustss 	data = opipe->tail.td;
   3099  1.254.2.35     skrll 	opipe->tail.td = ox->ox_stds[0];
   3100  1.254.2.35     skrll 	ox->ox_stds[0] = data;
   3101  1.254.2.35     skrll 	ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
   3102  1.254.2.35     skrll 
   3103  1.254.2.50     skrll 	/* point at sentinel */
   3104  1.254.2.50     skrll 	tail = opipe->tail.td;
   3105  1.254.2.35     skrll 	memset(&tail->td, 0, sizeof(tail->td));
   3106  1.254.2.35     skrll 	tail->nexttd = NULL;
   3107  1.254.2.35     skrll 	tail->xfer = NULL;
   3108  1.254.2.35     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   3109  1.254.2.35     skrll 	    BUS_DMASYNC_PREWRITE);
   3110  1.254.2.35     skrll 	xfer->ux_hcpriv = data;
   3111  1.254.2.35     skrll 
   3112  1.254.2.35     skrll 	DPRINTFN(8, "xfer %p data %p tail %p", xfer, ox->ox_stds[0], tail, 0);
   3113  1.254.2.35     skrll 	KASSERT(opipe->tail.td == tail);
   3114   1.254.2.1     skrll 
   3115        1.77  augustss 	/* We want interrupt at the end of the transfer. */
   3116  1.254.2.35     skrll 	last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   3117  1.254.2.35     skrll 	last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   3118        1.48  augustss 
   3119  1.254.2.35     skrll 	last->td.td_nexttd = HTOO32(tail->physaddr);
   3120  1.254.2.35     skrll 	last->nexttd = tail;
   3121  1.254.2.35     skrll 	last->flags |= OHCI_CALL_DONE;
   3122  1.254.2.35     skrll 	usb_syncmem(&last->dma, last->offs, sizeof(last->td),
   3123  1.254.2.35     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3124         1.3  augustss 
   3125  1.254.2.18     skrll 	DPRINTFN(4, "ed_flags=0x%08x td_flags=0x%08x "
   3126  1.254.2.18     skrll 		    "td_cbp=0x%08x td_be=0x%08x",
   3127       1.168  augustss 		    (int)O32TOH(sed->ed.ed_flags),
   3128       1.168  augustss 		    (int)O32TOH(data->td.td_flags),
   3129       1.168  augustss 		    (int)O32TOH(data->td.td_cbp),
   3130  1.254.2.18     skrll 		    (int)O32TOH(data->td.td_be));
   3131        1.34  augustss 
   3132        1.52  augustss #ifdef OHCI_DEBUG
   3133  1.254.2.18     skrll 	DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
   3134  1.254.2.39     skrll 	if (ohcidebug >= 5) {
   3135       1.168  augustss 		ohci_dump_ed(sc, sed);
   3136       1.168  augustss 		ohci_dump_tds(sc, data);
   3137        1.34  augustss 	}
   3138  1.254.2.18     skrll 	DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
   3139        1.34  augustss #endif
   3140        1.34  augustss 
   3141         1.3  augustss 	/* Insert ED in schedule */
   3142        1.48  augustss 	for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
   3143  1.254.2.35     skrll 		KASSERT(tdp->xfer == xfer);
   3144        1.48  augustss 	}
   3145  1.254.2.35     skrll 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3146  1.254.2.35     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3147       1.168  augustss 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3148       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3149       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3150       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3151         1.3  augustss 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
   3152   1.254.2.7     skrll 	if (xfer->ux_timeout && !sc->sc_bus.ub_usepolling) {
   3153   1.254.2.7     skrll 		callout_reset(&xfer->ux_callout, mstohz(xfer->ux_timeout),
   3154        1.80  augustss 			    ohci_timeout, xfer);
   3155        1.15  augustss 	}
   3156       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3157        1.34  augustss 
   3158  1.254.2.13     skrll 	return USBD_IN_PROGRESS;
   3159         1.3  augustss }
   3160         1.3  augustss 
   3161        1.82  augustss Static void
   3162  1.254.2.19     skrll ohci_device_bulk_abort(struct usbd_xfer *xfer)
   3163         1.3  augustss {
   3164  1.254.2.25     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   3165  1.254.2.25     skrll 
   3166  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3167       1.224       mrg 
   3168       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3169       1.224       mrg 
   3170  1.254.2.18     skrll 	DPRINTF("xfer=%p", xfer, 0, 0, 0);
   3171        1.54  augustss 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   3172         1.3  augustss }
   3173         1.3  augustss 
   3174       1.120  augustss /*
   3175        1.34  augustss  * Close a device bulk pipe.
   3176        1.34  augustss  */
   3177        1.82  augustss Static void
   3178  1.254.2.19     skrll ohci_device_bulk_close(struct usbd_pipe *pipe)
   3179         1.3  augustss {
   3180  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3181  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3182         1.3  augustss 
   3183       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3184       1.224       mrg 
   3185  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3186  1.254.2.18     skrll 
   3187  1.254.2.18     skrll 	DPRINTF("pipe=%p", pipe, 0, 0, 0);
   3188        1.34  augustss 	ohci_close_pipe(pipe, sc->sc_bulk_head);
   3189  1.254.2.35     skrll 	ohci_free_std_locked(sc, opipe->tail.td);
   3190         1.1  augustss }
   3191         1.1  augustss 
   3192         1.1  augustss /************************/
   3193         1.1  augustss 
   3194  1.254.2.35     skrll Static int
   3195  1.254.2.35     skrll ohci_device_intr_init(struct usbd_xfer *xfer)
   3196  1.254.2.35     skrll {
   3197  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3198  1.254.2.35     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3199  1.254.2.35     skrll 	int len = xfer->ux_bufsize;
   3200  1.254.2.35     skrll 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;;
   3201  1.254.2.35     skrll 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3202  1.254.2.35     skrll 	int err;
   3203  1.254.2.35     skrll 
   3204  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3205  1.254.2.35     skrll 
   3206  1.254.2.35     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3207  1.254.2.35     skrll 	KASSERT(len != 0);
   3208  1.254.2.35     skrll 
   3209  1.254.2.35     skrll 	DPRINTFN(4, "xfer=%p len=%d isread=%d flags=%d", xfer, len, isread,
   3210  1.254.2.35     skrll 	    xfer->ux_flags);
   3211  1.254.2.35     skrll 	DPRINTFN(4, "endpt=%d", endpt, 0, 0, 0);
   3212  1.254.2.35     skrll 
   3213  1.254.2.35     skrll 	ox->ox_nstd = 0;
   3214  1.254.2.35     skrll 
   3215  1.254.2.35     skrll 	err = ohci_alloc_std_chain(sc, xfer, len, isread);
   3216  1.254.2.35     skrll 	if (err) {
   3217  1.254.2.35     skrll 		return err;
   3218  1.254.2.35     skrll 	}
   3219  1.254.2.35     skrll 
   3220  1.254.2.35     skrll 	return 0;
   3221  1.254.2.35     skrll }
   3222  1.254.2.35     skrll 
   3223  1.254.2.35     skrll Static void
   3224  1.254.2.35     skrll ohci_device_intr_fini(struct usbd_xfer *xfer)
   3225  1.254.2.35     skrll {
   3226  1.254.2.35     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3227  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3228  1.254.2.35     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3229  1.254.2.35     skrll 
   3230  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3231  1.254.2.35     skrll 	DPRINTFN(8, "xfer %p nstd %d", xfer, ox->ox_nstd, 0, 0);
   3232  1.254.2.35     skrll 
   3233  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
   3234  1.254.2.35     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   3235  1.254.2.35     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
   3236  1.254.2.35     skrll 		if (std != NULL)
   3237  1.254.2.35     skrll 			break;
   3238  1.254.2.35     skrll 		if (std != opipe->tail.td)
   3239  1.254.2.35     skrll 			ohci_free_std_locked(sc, std);
   3240  1.254.2.35     skrll 	}
   3241  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
   3242  1.254.2.35     skrll 
   3243  1.254.2.35     skrll 	if (ox->ox_nstd) {
   3244  1.254.2.35     skrll 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   3245  1.254.2.35     skrll 		kmem_free(ox->ox_stds, sz);
   3246  1.254.2.35     skrll 	}
   3247  1.254.2.35     skrll }
   3248  1.254.2.35     skrll 
   3249        1.82  augustss Static usbd_status
   3250  1.254.2.19     skrll ohci_device_intr_transfer(struct usbd_xfer *xfer)
   3251        1.17  augustss {
   3252  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3253        1.53  augustss 	usbd_status err;
   3254        1.17  augustss 
   3255        1.46  augustss 	/* Insert last in queue. */
   3256       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3257        1.53  augustss 	err = usb_insert_transfer(xfer);
   3258       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3259        1.53  augustss 	if (err)
   3260  1.254.2.13     skrll 		return err;
   3261        1.46  augustss 
   3262        1.46  augustss 	/* Pipe isn't running, start first */
   3263  1.254.2.13     skrll 	return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3264        1.17  augustss }
   3265        1.17  augustss 
   3266        1.82  augustss Static usbd_status
   3267  1.254.2.19     skrll ohci_device_intr_start(struct usbd_xfer *xfer)
   3268         1.1  augustss {
   3269  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3270  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3271  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3272         1.1  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   3273  1.254.2.35     skrll 	ohci_soft_td_t *data, *last, *tail;
   3274       1.224       mrg 	int len, isread, endpt;
   3275         1.1  augustss 
   3276  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3277  1.254.2.18     skrll 
   3278        1.83  augustss 	if (sc->sc_dying)
   3279  1.254.2.13     skrll 		return USBD_IOERROR;
   3280        1.83  augustss 
   3281  1.254.2.18     skrll 	DPRINTFN(3, "xfer=%p len=%d flags=%d priv=%p", xfer, xfer->ux_length,
   3282  1.254.2.18     skrll 	    xfer->ux_flags, xfer->ux_priv);
   3283         1.1  augustss 
   3284  1.254.2.24     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3285         1.1  augustss 
   3286   1.254.2.7     skrll 	len = xfer->ux_length;
   3287   1.254.2.7     skrll 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3288       1.165     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3289         1.1  augustss 
   3290       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3291  1.254.2.35     skrll 
   3292  1.254.2.42     skrll 	/*
   3293  1.254.2.42     skrll 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   3294  1.254.2.42     skrll 	 * next transfer.
   3295  1.254.2.42     skrll 	 */
   3296  1.254.2.35     skrll 	data = opipe->tail.td;
   3297  1.254.2.35     skrll 	opipe->tail.td = ox->ox_stds[0];
   3298  1.254.2.35     skrll 	ox->ox_stds[0] = data;
   3299  1.254.2.35     skrll 	ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
   3300  1.254.2.35     skrll 
   3301  1.254.2.50     skrll 	/* point at sentinel */
   3302  1.254.2.50     skrll 	tail = opipe->tail.td;
   3303  1.254.2.35     skrll 	memset(&tail->td, 0, sizeof(tail->td));
   3304  1.254.2.35     skrll 	tail->nexttd = NULL;
   3305        1.53  augustss 	tail->xfer = NULL;
   3306  1.254.2.35     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   3307  1.254.2.35     skrll 	    BUS_DMASYNC_PREWRITE);
   3308  1.254.2.35     skrll 	xfer->ux_hcpriv = data;
   3309  1.254.2.35     skrll 
   3310  1.254.2.35     skrll 	DPRINTFN(8, "data %p tail %p", ox->ox_stds[0], tail, 0, 0);
   3311  1.254.2.35     skrll 	KASSERT(opipe->tail.td == tail);
   3312         1.1  augustss 
   3313  1.254.2.35     skrll 	/* We want interrupt at the end of the transfer. */
   3314  1.254.2.35     skrll 	last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   3315  1.254.2.35     skrll 	last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   3316  1.254.2.35     skrll 
   3317  1.254.2.35     skrll 	last->td.td_nexttd = HTOO32(tail->physaddr);
   3318  1.254.2.35     skrll 	last->nexttd = tail;
   3319  1.254.2.35     skrll 	last->flags |= OHCI_CALL_DONE;
   3320  1.254.2.35     skrll 	usb_syncmem(&last->dma, last->offs, sizeof(last->td),
   3321       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3322         1.1  augustss 
   3323        1.52  augustss #ifdef OHCI_DEBUG
   3324  1.254.2.18     skrll 	DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
   3325  1.254.2.39     skrll 	if (ohcidebug >= 5) {
   3326       1.168  augustss 		ohci_dump_ed(sc, sed);
   3327       1.168  augustss 		ohci_dump_tds(sc, data);
   3328         1.1  augustss 	}
   3329  1.254.2.18     skrll 	DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
   3330         1.1  augustss #endif
   3331         1.1  augustss 
   3332         1.1  augustss 	/* Insert ED in schedule */
   3333       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3334       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3335       1.168  augustss 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3336       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3337       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3338       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3339         1.1  augustss 
   3340       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3341         1.1  augustss 
   3342  1.254.2.13     skrll 	return USBD_IN_PROGRESS;
   3343         1.1  augustss }
   3344         1.1  augustss 
   3345       1.227     skrll /* Abort a device interrupt request. */
   3346        1.82  augustss Static void
   3347  1.254.2.19     skrll ohci_device_intr_abort(struct usbd_xfer *xfer)
   3348         1.1  augustss {
   3349  1.254.2.25     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   3350       1.224       mrg 
   3351       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3352   1.254.2.7     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   3353       1.224       mrg 
   3354        1.54  augustss 	ohci_abort_xfer(xfer, USBD_CANCELLED);
   3355         1.1  augustss }
   3356         1.1  augustss 
   3357         1.1  augustss /* Close a device interrupt pipe. */
   3358        1.82  augustss Static void
   3359  1.254.2.19     skrll ohci_device_intr_close(struct usbd_pipe *pipe)
   3360         1.1  augustss {
   3361  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3362  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3363  1.254.2.21     skrll 	int nslots = opipe->intr.nslots;
   3364  1.254.2.21     skrll 	int pos = opipe->intr.pos;
   3365         1.1  augustss 	int j;
   3366         1.1  augustss 	ohci_soft_ed_t *p, *sed = opipe->sed;
   3367       1.224       mrg 
   3368  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3369  1.254.2.18     skrll 
   3370       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3371         1.1  augustss 
   3372  1.254.2.18     skrll 	DPRINTFN(1, "pipe=%p nslots=%d pos=%d", pipe, nslots, pos, 0);
   3373       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs,
   3374       1.195    bouyer 	    sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3375       1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   3376       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3377       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3378       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3379       1.168  augustss 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   3380       1.168  augustss 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   3381       1.224       mrg 		usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   3382         1.1  augustss 
   3383         1.1  augustss 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
   3384       1.172  christos 		continue;
   3385  1.254.2.24     skrll 	KASSERT(p);
   3386       1.173  christos 	p->next = sed->next;
   3387       1.173  christos 	p->ed.ed_nexted = sed->ed.ed_nexted;
   3388       1.195    bouyer 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   3389       1.195    bouyer 	    sizeof(p->ed.ed_nexted),
   3390       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3391         1.1  augustss 
   3392         1.1  augustss 	for (j = 0; j < nslots; j++)
   3393        1.31  wrstuden 		--sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
   3394         1.1  augustss 
   3395  1.254.2.35     skrll 	ohci_free_std_locked(sc, opipe->tail.td);
   3396  1.254.2.35     skrll 	ohci_free_sed_locked(sc, opipe->sed);
   3397         1.1  augustss }
   3398         1.1  augustss 
   3399        1.82  augustss Static usbd_status
   3400        1.91  augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
   3401         1.1  augustss {
   3402       1.224       mrg 	int i, j, best;
   3403         1.1  augustss 	u_int npoll, slow, shigh, nslots;
   3404         1.1  augustss 	u_int bestbw, bw;
   3405         1.1  augustss 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
   3406         1.1  augustss 
   3407  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3408  1.254.2.18     skrll 
   3409  1.254.2.18     skrll 	DPRINTFN(2, "pipe=%p", opipe, 0, 0, 0);
   3410         1.1  augustss 	if (ival == 0) {
   3411         1.1  augustss 		printf("ohci_setintr: 0 interval\n");
   3412  1.254.2.13     skrll 		return USBD_INVAL;
   3413         1.1  augustss 	}
   3414         1.1  augustss 
   3415         1.1  augustss 	npoll = OHCI_NO_INTRS;
   3416         1.1  augustss 	while (npoll > ival)
   3417         1.1  augustss 		npoll /= 2;
   3418  1.254.2.18     skrll 	DPRINTFN(2, "ival=%d npoll=%d", ival, npoll, 0, 0);
   3419         1.1  augustss 
   3420         1.1  augustss 	/*
   3421         1.1  augustss 	 * We now know which level in the tree the ED must go into.
   3422         1.1  augustss 	 * Figure out which slot has most bandwidth left over.
   3423         1.1  augustss 	 * Slots to examine:
   3424         1.1  augustss 	 * npoll
   3425         1.1  augustss 	 * 1	0
   3426         1.1  augustss 	 * 2	1 2
   3427         1.1  augustss 	 * 4	3 4 5 6
   3428         1.1  augustss 	 * 8	7 8 9 10 11 12 13 14
   3429         1.1  augustss 	 * N    (N-1) .. (N-1+N-1)
   3430         1.1  augustss 	 */
   3431         1.1  augustss 	slow = npoll-1;
   3432         1.1  augustss 	shigh = slow + npoll;
   3433         1.1  augustss 	nslots = OHCI_NO_INTRS / npoll;
   3434         1.1  augustss 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
   3435         1.1  augustss 		bw = 0;
   3436         1.1  augustss 		for (j = 0; j < nslots; j++)
   3437        1.28  augustss 			bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
   3438         1.1  augustss 		if (bw < bestbw) {
   3439         1.1  augustss 			best = i;
   3440         1.1  augustss 			bestbw = bw;
   3441         1.1  augustss 		}
   3442         1.1  augustss 	}
   3443  1.254.2.18     skrll 	DPRINTFN(2, "best=%d(%d..%d) bestbw=%d", best, slow, shigh, bestbw);
   3444         1.1  augustss 
   3445       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3446         1.1  augustss 	hsed = sc->sc_eds[best];
   3447         1.1  augustss 	sed->next = hsed->next;
   3448       1.195    bouyer 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3449       1.195    bouyer 	    sizeof(hsed->ed.ed_flags),
   3450       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3451        1.39  augustss 	sed->ed.ed_nexted = hsed->ed.ed_nexted;
   3452       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3453       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3454       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3455         1.1  augustss 	hsed->next = sed;
   3456       1.168  augustss 	hsed->ed.ed_nexted = HTOO32(sed->physaddr);
   3457       1.195    bouyer 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3458       1.195    bouyer 	    sizeof(hsed->ed.ed_flags),
   3459       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3460       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3461         1.1  augustss 
   3462         1.1  augustss 	for (j = 0; j < nslots; j++)
   3463        1.28  augustss 		++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
   3464  1.254.2.21     skrll 	opipe->intr.nslots = nslots;
   3465  1.254.2.21     skrll 	opipe->intr.pos = best;
   3466         1.1  augustss 
   3467  1.254.2.18     skrll 	DPRINTFN(5, "returns %p", opipe, 0, 0, 0);
   3468  1.254.2.13     skrll 	return USBD_NORMAL_COMPLETION;
   3469        1.60  augustss }
   3470        1.60  augustss 
   3471        1.60  augustss /***********************/
   3472        1.60  augustss 
   3473  1.254.2.35     skrll Static int
   3474  1.254.2.35     skrll ohci_device_isoc_init(struct usbd_xfer *xfer)
   3475  1.254.2.35     skrll {
   3476  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3477  1.254.2.35     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3478  1.254.2.35     skrll 	ohci_soft_itd_t *sitd;
   3479  1.254.2.35     skrll 	size_t i;
   3480  1.254.2.35     skrll 	int err;
   3481  1.254.2.35     skrll 
   3482  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3483  1.254.2.35     skrll 
   3484  1.254.2.35     skrll 	DPRINTFN(1, "xfer %p len %d flags %d", xfer, xfer->ux_length,
   3485  1.254.2.35     skrll 	    xfer->ux_flags, 0);
   3486  1.254.2.35     skrll 
   3487  1.254.2.35     skrll 	const size_t nfsitd =
   3488  1.254.2.35     skrll 	    (xfer->ux_nframes + OHCI_ITD_NOFFSET - 1) / OHCI_ITD_NOFFSET;
   3489  1.254.2.35     skrll 	const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE;
   3490  1.254.2.35     skrll 	const size_t nsitd = MAX(nfsitd, nbsitd) + 1;
   3491  1.254.2.35     skrll 
   3492  1.254.2.35     skrll 	ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd,
   3493  1.254.2.35     skrll 	    KM_SLEEP);
   3494  1.254.2.35     skrll 	ox->ox_nsitd = nsitd;
   3495  1.254.2.35     skrll 
   3496  1.254.2.35     skrll 	for (i = 0; i < nsitd; i++) {
   3497  1.254.2.35     skrll 		/* Allocate next ITD */
   3498  1.254.2.35     skrll 		sitd = ohci_alloc_sitd(sc);
   3499  1.254.2.35     skrll 		if (sitd == NULL) {
   3500  1.254.2.35     skrll 			err = ENOMEM;
   3501  1.254.2.35     skrll 			goto fail;
   3502  1.254.2.35     skrll 		}
   3503  1.254.2.35     skrll 		ox->ox_sitds[i] = sitd;
   3504  1.254.2.35     skrll 		sitd->xfer = xfer;
   3505  1.254.2.35     skrll 		sitd->flags = 0;
   3506  1.254.2.35     skrll 	}
   3507  1.254.2.35     skrll 
   3508  1.254.2.35     skrll 	return 0;
   3509  1.254.2.35     skrll fail:
   3510  1.254.2.35     skrll 	for (; i > 0;) {
   3511  1.254.2.35     skrll 		ohci_free_sitd(sc, ox->ox_sitds[--i]);
   3512  1.254.2.35     skrll 	}
   3513  1.254.2.35     skrll 	return err;
   3514  1.254.2.35     skrll }
   3515  1.254.2.35     skrll 
   3516  1.254.2.35     skrll Static void
   3517  1.254.2.35     skrll ohci_device_isoc_fini(struct usbd_xfer *xfer)
   3518  1.254.2.35     skrll {
   3519  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3520  1.254.2.35     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3521  1.254.2.35     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3522  1.254.2.35     skrll 
   3523  1.254.2.35     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3524  1.254.2.35     skrll 
   3525  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
   3526  1.254.2.35     skrll 	for (size_t i = 0; i < ox->ox_nsitd; i++) {
   3527  1.254.2.35     skrll 		if (ox->ox_sitds[i] != opipe->tail.itd) {
   3528  1.254.2.35     skrll 			ohci_free_sitd_locked(sc, ox->ox_sitds[i]);
   3529  1.254.2.35     skrll 		}
   3530  1.254.2.35     skrll 	}
   3531  1.254.2.35     skrll 	mutex_exit(&sc->sc_lock);
   3532  1.254.2.35     skrll 
   3533  1.254.2.35     skrll 	if (ox->ox_nsitd) {
   3534  1.254.2.35     skrll 		const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd;
   3535  1.254.2.35     skrll 		kmem_free(ox->ox_sitds, sz);
   3536  1.254.2.35     skrll 	}
   3537  1.254.2.35     skrll }
   3538  1.254.2.35     skrll 
   3539  1.254.2.35     skrll 
   3540        1.60  augustss usbd_status
   3541  1.254.2.19     skrll ohci_device_isoc_transfer(struct usbd_xfer *xfer)
   3542        1.60  augustss {
   3543  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3544        1.60  augustss 	usbd_status err;
   3545        1.60  augustss 
   3546  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3547  1.254.2.18     skrll 
   3548  1.254.2.18     skrll 	DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
   3549        1.60  augustss 
   3550        1.60  augustss 	/* Put it on our queue, */
   3551       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3552        1.60  augustss 	err = usb_insert_transfer(xfer);
   3553       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3554        1.60  augustss 
   3555        1.60  augustss 	/* bail out on error, */
   3556        1.60  augustss 	if (err && err != USBD_IN_PROGRESS)
   3557  1.254.2.13     skrll 		return err;
   3558        1.60  augustss 
   3559        1.60  augustss 	/* XXX should check inuse here */
   3560        1.60  augustss 
   3561        1.60  augustss 	/* insert into schedule, */
   3562        1.60  augustss 	ohci_device_isoc_enter(xfer);
   3563        1.60  augustss 
   3564        1.83  augustss 	/* and start if the pipe wasn't running */
   3565        1.60  augustss 	if (!err)
   3566   1.254.2.7     skrll 		ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3567        1.60  augustss 
   3568  1.254.2.13     skrll 	return err;
   3569        1.60  augustss }
   3570        1.60  augustss 
   3571        1.60  augustss void
   3572  1.254.2.19     skrll ohci_device_isoc_enter(struct usbd_xfer *xfer)
   3573        1.60  augustss {
   3574  1.254.2.35     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3575  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3576  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3577        1.61  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   3578  1.254.2.53     skrll 	ohci_soft_itd_t *sitd, *nsitd, *tail;
   3579        1.83  augustss 	ohci_physaddr_t buf, offs, noffs, bp0;
   3580        1.61  augustss 	int i, ncur, nframes;
   3581        1.61  augustss 
   3582  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3583  1.254.2.53     skrll 	DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
   3584  1.254.2.18     skrll 
   3585  1.254.2.35     skrll 	mutex_enter(&sc->sc_lock);
   3586        1.83  augustss 
   3587  1.254.2.35     skrll 	if (sc->sc_dying) {
   3588  1.254.2.35     skrll 		mutex_exit(&sc->sc_lock);
   3589        1.83  augustss 		return;
   3590  1.254.2.35     skrll 	}
   3591  1.254.2.35     skrll 
   3592  1.254.2.35     skrll 	struct isoc *isoc = &opipe->isoc;
   3593  1.254.2.35     skrll 
   3594  1.254.2.35     skrll 	DPRINTFN(1, "used=%d next=%d xfer=%p nframes=%d",
   3595  1.254.2.35     skrll 	     isoc->inuse, isoc->next, xfer, xfer->ux_nframes);
   3596        1.83  augustss 
   3597  1.254.2.21     skrll 	if (isoc->next == -1) {
   3598        1.83  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   3599  1.254.2.21     skrll 		isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
   3600  1.254.2.21     skrll 		DPRINTFN(2,"start next=%d", isoc->next, 0, 0, 0);
   3601        1.83  augustss 	}
   3602        1.83  augustss 
   3603        1.61  augustss 	sitd = opipe->tail.itd;
   3604  1.254.2.35     skrll 	opipe->tail.itd = ox->ox_sitds[0];
   3605  1.254.2.35     skrll 	ox->ox_sitds[0] = sitd;
   3606  1.254.2.35     skrll 
   3607   1.254.2.7     skrll 	buf = DMAADDR(&xfer->ux_dmabuf, 0);
   3608        1.83  augustss 	bp0 = OHCI_PAGE(buf);
   3609        1.83  augustss 	offs = OHCI_PAGE_OFFSET(buf);
   3610   1.254.2.7     skrll 	nframes = xfer->ux_nframes;
   3611   1.254.2.7     skrll 	xfer->ux_hcpriv = sitd;
   3612  1.254.2.35     skrll 	size_t j = 1;
   3613        1.61  augustss 	for (i = ncur = 0; i < nframes; i++, ncur++) {
   3614   1.254.2.7     skrll 		noffs = offs + xfer->ux_frlengths[i];
   3615        1.61  augustss 		if (ncur == OHCI_ITD_NOFFSET ||	/* all offsets used */
   3616        1.83  augustss 		    OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
   3617       1.120  augustss 
   3618        1.83  augustss 			/* Allocate next ITD */
   3619  1.254.2.35     skrll 			nsitd = ox->ox_sitds[j++];
   3620  1.254.2.35     skrll 			KASSERT(nsitd != NULL);
   3621  1.254.2.35     skrll 			KASSERT(j < ox->ox_nsitd);
   3622        1.83  augustss 
   3623        1.83  augustss 			/* Fill current ITD */
   3624       1.168  augustss 			sitd->itd.itd_flags = HTOO32(
   3625       1.120  augustss 				OHCI_ITD_NOCC |
   3626  1.254.2.21     skrll 				OHCI_ITD_SET_SF(isoc->next) |
   3627        1.83  augustss 				OHCI_ITD_SET_DI(6) | /* delay intr a little */
   3628        1.83  augustss 				OHCI_ITD_SET_FC(ncur));
   3629       1.168  augustss 			sitd->itd.itd_bp0 = HTOO32(bp0);
   3630       1.168  augustss 			sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
   3631       1.168  augustss 			sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3632  1.254.2.33     skrll 			sitd->nextitd = nsitd;
   3633        1.83  augustss 			sitd->xfer = xfer;
   3634        1.83  augustss 			sitd->flags = 0;
   3635  1.254.2.35     skrll #ifdef DIAGNOSTIC
   3636  1.254.2.35     skrll 			sitd->isdone = false;
   3637  1.254.2.35     skrll #endif
   3638  1.254.2.35     skrll 			ohci_hash_add_itd(sc, sitd);
   3639       1.195    bouyer 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3640       1.195    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3641        1.83  augustss 
   3642        1.61  augustss 			sitd = nsitd;
   3643  1.254.2.21     skrll 			isoc->next = isoc->next + ncur;
   3644        1.83  augustss 			bp0 = OHCI_PAGE(buf + offs);
   3645        1.61  augustss 			ncur = 0;
   3646        1.61  augustss 		}
   3647       1.168  augustss 		sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
   3648        1.83  augustss 		offs = noffs;
   3649        1.61  augustss 	}
   3650  1.254.2.35     skrll 	KASSERT(j <= ox->ox_nsitd);
   3651  1.254.2.35     skrll 
   3652  1.254.2.53     skrll 	/* point at sentinel */
   3653  1.254.2.53     skrll 	tail = opipe->tail.itd;
   3654  1.254.2.53     skrll 	memset(&tail->itd, 0, sizeof(tail->itd));
   3655  1.254.2.53     skrll 	tail->nextitd = NULL;
   3656  1.254.2.53     skrll  	tail->xfer = NULL;
   3657  1.254.2.53     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd),
   3658  1.254.2.53     skrll 	    BUS_DMASYNC_PREWRITE);
   3659  1.254.2.53     skrll 
   3660        1.83  augustss 	/* Fixup last used ITD */
   3661       1.168  augustss 	sitd->itd.itd_flags = HTOO32(
   3662       1.120  augustss 		OHCI_ITD_NOCC |
   3663  1.254.2.21     skrll 		OHCI_ITD_SET_SF(isoc->next) |
   3664        1.61  augustss 		OHCI_ITD_SET_DI(0) |
   3665        1.61  augustss 		OHCI_ITD_SET_FC(ncur));
   3666       1.168  augustss 	sitd->itd.itd_bp0 = HTOO32(bp0);
   3667  1.254.2.53     skrll 	sitd->itd.itd_nextitd = HTOO32(tail->physaddr);
   3668       1.168  augustss 	sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3669  1.254.2.53     skrll 	sitd->nextitd = tail;
   3670        1.83  augustss 	sitd->xfer = xfer;
   3671        1.83  augustss 	sitd->flags = OHCI_CALL_DONE;
   3672  1.254.2.35     skrll #ifdef DIAGNOSTIC
   3673  1.254.2.35     skrll 	sitd->isdone = false;
   3674  1.254.2.35     skrll #endif
   3675  1.254.2.35     skrll 	ohci_hash_add_itd(sc, sitd);
   3676       1.195    bouyer 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3677       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3678        1.83  augustss 
   3679  1.254.2.21     skrll 	isoc->next = isoc->next + ncur;
   3680  1.254.2.21     skrll 	isoc->inuse += nframes;
   3681        1.83  augustss 
   3682  1.254.2.48     skrll 	/* XXX pretend we did it all */
   3683  1.254.2.48     skrll 	xfer->ux_actlen = offs;
   3684   1.254.2.7     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   3685        1.83  augustss 
   3686        1.83  augustss #ifdef OHCI_DEBUG
   3687  1.254.2.39     skrll 	if (ohcidebug >= 5) {
   3688  1.254.2.18     skrll 		DPRINTF("frame=%d", O32TOH(sc->sc_hcca->hcca_frame_number),
   3689  1.254.2.18     skrll 		    0, 0, 0);
   3690   1.254.2.7     skrll 		ohci_dump_itds(sc, xfer->ux_hcpriv);
   3691       1.168  augustss 		ohci_dump_ed(sc, sed);
   3692        1.83  augustss 	}
   3693        1.83  augustss #endif
   3694        1.61  augustss 
   3695       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3696       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3697  1.254.2.53     skrll 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3698       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3699       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3700       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3701       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3702       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3703        1.60  augustss }
   3704        1.60  augustss 
   3705        1.60  augustss usbd_status
   3706  1.254.2.19     skrll ohci_device_isoc_start(struct usbd_xfer *xfer)
   3707        1.60  augustss {
   3708  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3709        1.83  augustss 
   3710  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3711  1.254.2.18     skrll 	DPRINTFN(5, "xfer=%p", xfer, 0, 0, 0);
   3712        1.83  augustss 
   3713       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3714       1.224       mrg 
   3715       1.224       mrg 	if (sc->sc_dying) {
   3716       1.224       mrg 		mutex_exit(&sc->sc_lock);
   3717  1.254.2.13     skrll 		return USBD_IOERROR;
   3718       1.224       mrg 	}
   3719        1.83  augustss 
   3720  1.254.2.24     skrll 
   3721        1.83  augustss #ifdef DIAGNOSTIC
   3722   1.254.2.7     skrll 	if (xfer->ux_status != USBD_IN_PROGRESS)
   3723       1.121   tsutsui 		printf("ohci_device_isoc_start: not in progress %p\n", xfer);
   3724        1.83  augustss #endif
   3725        1.83  augustss 
   3726        1.83  augustss 	/* XXX anything to do? */
   3727        1.83  augustss 
   3728       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3729       1.224       mrg 
   3730  1.254.2.13     skrll 	return USBD_IN_PROGRESS;
   3731        1.60  augustss }
   3732        1.60  augustss 
   3733        1.60  augustss void
   3734  1.254.2.19     skrll ohci_device_isoc_abort(struct usbd_xfer *xfer)
   3735        1.60  augustss {
   3736  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3737  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3738        1.83  augustss 	ohci_soft_ed_t *sed;
   3739        1.83  augustss 	ohci_soft_itd_t *sitd;
   3740        1.83  augustss 
   3741  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3742  1.254.2.18     skrll 	DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0);
   3743        1.83  augustss 
   3744       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3745        1.83  augustss 
   3746        1.83  augustss 	/* Transfer is already done. */
   3747   1.254.2.7     skrll 	if (xfer->ux_status != USBD_NOT_STARTED &&
   3748   1.254.2.7     skrll 	    xfer->ux_status != USBD_IN_PROGRESS) {
   3749        1.83  augustss 		printf("ohci_device_isoc_abort: early return\n");
   3750       1.224       mrg 		goto done;
   3751        1.83  augustss 	}
   3752        1.83  augustss 
   3753        1.83  augustss 	/* Give xfer the requested abort code. */
   3754   1.254.2.7     skrll 	xfer->ux_status = USBD_CANCELLED;
   3755        1.83  augustss 
   3756        1.83  augustss 	sed = opipe->sed;
   3757       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3758       1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3759       1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   3760       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3761       1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3762       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3763        1.83  augustss 
   3764   1.254.2.7     skrll 	sitd = xfer->ux_hcpriv;
   3765  1.254.2.24     skrll 	KASSERT(sitd);
   3766  1.254.2.24     skrll 
   3767        1.83  augustss 	for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
   3768  1.254.2.55     skrll 		ohci_hash_rem_itd(sc, sitd);
   3769        1.83  augustss #ifdef DIAGNOSTIC
   3770  1.254.2.18     skrll 		DPRINTFN(1, "abort sets done sitd=%p", sitd, 0, 0, 0);
   3771  1.254.2.31     skrll 		sitd->isdone = true;
   3772        1.83  augustss #endif
   3773        1.83  augustss 	}
   3774        1.83  augustss 
   3775       1.224       mrg 	usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
   3776        1.83  augustss 
   3777        1.83  augustss 	/* Run callback. */
   3778        1.83  augustss 	usb_transfer_complete(xfer);
   3779        1.83  augustss 
   3780       1.168  augustss 	sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
   3781       1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   3782       1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3783       1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3784        1.83  augustss 
   3785       1.224       mrg  done:
   3786       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3787        1.60  augustss }
   3788        1.60  augustss 
   3789        1.60  augustss void
   3790  1.254.2.19     skrll ohci_device_isoc_done(struct usbd_xfer *xfer)
   3791        1.60  augustss {
   3792  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3793  1.254.2.18     skrll 	DPRINTFN(1, "xfer=%p", xfer, 0, 0, 0);
   3794        1.60  augustss }
   3795        1.60  augustss 
   3796        1.60  augustss usbd_status
   3797  1.254.2.19     skrll ohci_setup_isoc(struct usbd_pipe *pipe)
   3798        1.60  augustss {
   3799  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3800  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3801  1.254.2.21     skrll 	struct isoc *isoc = &opipe->isoc;
   3802        1.60  augustss 
   3803  1.254.2.21     skrll 	isoc->next = -1;
   3804  1.254.2.21     skrll 	isoc->inuse = 0;
   3805        1.60  augustss 
   3806       1.224       mrg 	mutex_enter(&sc->sc_lock);
   3807       1.168  augustss 	ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
   3808       1.224       mrg 	mutex_exit(&sc->sc_lock);
   3809        1.83  augustss 
   3810  1.254.2.13     skrll 	return USBD_NORMAL_COMPLETION;
   3811        1.60  augustss }
   3812        1.60  augustss 
   3813        1.60  augustss void
   3814  1.254.2.19     skrll ohci_device_isoc_close(struct usbd_pipe *pipe)
   3815        1.60  augustss {
   3816  1.254.2.25     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3817  1.254.2.25     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3818        1.60  augustss 
   3819       1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3820       1.224       mrg 
   3821  1.254.2.18     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3822  1.254.2.18     skrll 	DPRINTF("pipe=%p", pipe, 0, 0, 0);
   3823        1.60  augustss 	ohci_close_pipe(pipe, sc->sc_isoc_head);
   3824        1.83  augustss #ifdef DIAGNOSTIC
   3825  1.254.2.31     skrll 	opipe->tail.itd->isdone = true;
   3826        1.83  augustss #endif
   3827  1.254.2.35     skrll 	ohci_free_sitd_locked(sc, opipe->tail.itd);
   3828         1.1  augustss }
   3829