ohci.c revision 1.30 1 1.30 augustss /* $NetBSD: ohci.c,v 1.30 1999/05/21 10:15:23 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Open Host Controller driver.
42 1.1 augustss *
43 1.30 augustss * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
44 1.30 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
45 1.1 augustss */
46 1.1 augustss
47 1.1 augustss #include <sys/param.h>
48 1.1 augustss #include <sys/systm.h>
49 1.1 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.15 augustss #if defined(__NetBSD__)
52 1.1 augustss #include <sys/device.h>
53 1.15 augustss #elif defined(__FreeBSD__)
54 1.15 augustss #include <sys/module.h>
55 1.15 augustss #include <sys/bus.h>
56 1.15 augustss #endif
57 1.1 augustss #include <sys/proc.h>
58 1.1 augustss #include <sys/queue.h>
59 1.1 augustss #include <sys/select.h>
60 1.1 augustss
61 1.4 augustss #include <machine/bus.h>
62 1.16 augustss #include <machine/endian.h>
63 1.4 augustss
64 1.1 augustss #include <dev/usb/usb.h>
65 1.1 augustss #include <dev/usb/usbdi.h>
66 1.1 augustss #include <dev/usb/usbdivar.h>
67 1.1 augustss #include <dev/usb/usb_quirks.h>
68 1.4 augustss #include <dev/usb/usb_mem.h>
69 1.1 augustss
70 1.1 augustss #include <dev/usb/ohcireg.h>
71 1.1 augustss #include <dev/usb/ohcivar.h>
72 1.1 augustss
73 1.15 augustss #if defined(__FreeBSD__)
74 1.15 augustss #include <machine/clock.h>
75 1.15 augustss
76 1.15 augustss #define delay(d) DELAY(d)
77 1.15 augustss
78 1.15 augustss #endif
79 1.1 augustss
80 1.16 augustss /*
81 1.16 augustss * The OHCI controller is little endian, so on big endian machines
82 1.16 augustss * the data strored in memory needs to be swapped.
83 1.16 augustss */
84 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
85 1.16 augustss #define LE(x) (bswap32(x))
86 1.16 augustss #else
87 1.16 augustss #define LE(x) (x)
88 1.16 augustss #endif
89 1.16 augustss
90 1.1 augustss struct ohci_pipe;
91 1.1 augustss
92 1.1 augustss ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
93 1.1 augustss void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
94 1.1 augustss
95 1.1 augustss ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
96 1.1 augustss void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
97 1.1 augustss
98 1.1 augustss usbd_status ohci_open __P((usbd_pipe_handle));
99 1.5 augustss void ohci_poll __P((struct usbd_bus *));
100 1.1 augustss void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
101 1.1 augustss void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
102 1.1 augustss void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
103 1.23 augustss void ohci_ii_done __P((ohci_softc_t *, usbd_request_handle));
104 1.1 augustss void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle));
105 1.1 augustss void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle));
106 1.3 augustss void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle));
107 1.1 augustss
108 1.1 augustss usbd_status ohci_device_request __P((usbd_request_handle reqh));
109 1.3 augustss void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
110 1.3 augustss void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
111 1.1 augustss void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
112 1.1 augustss void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
113 1.1 augustss ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
114 1.1 augustss
115 1.1 augustss usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
116 1.17 augustss usbd_status ohci_root_ctrl_start __P((usbd_request_handle));
117 1.1 augustss void ohci_root_ctrl_abort __P((usbd_request_handle));
118 1.1 augustss void ohci_root_ctrl_close __P((usbd_pipe_handle));
119 1.1 augustss
120 1.1 augustss usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
121 1.17 augustss usbd_status ohci_root_intr_start __P((usbd_request_handle));
122 1.1 augustss void ohci_root_intr_abort __P((usbd_request_handle));
123 1.1 augustss void ohci_root_intr_close __P((usbd_pipe_handle));
124 1.1 augustss
125 1.1 augustss usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
126 1.17 augustss usbd_status ohci_device_ctrl_start __P((usbd_request_handle));
127 1.1 augustss void ohci_device_ctrl_abort __P((usbd_request_handle));
128 1.1 augustss void ohci_device_ctrl_close __P((usbd_pipe_handle));
129 1.1 augustss
130 1.3 augustss usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
131 1.17 augustss usbd_status ohci_device_bulk_start __P((usbd_request_handle));
132 1.3 augustss void ohci_device_bulk_abort __P((usbd_request_handle));
133 1.3 augustss void ohci_device_bulk_close __P((usbd_pipe_handle));
134 1.3 augustss
135 1.1 augustss usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
136 1.17 augustss usbd_status ohci_device_intr_start __P((usbd_request_handle));
137 1.1 augustss void ohci_device_intr_abort __P((usbd_request_handle));
138 1.1 augustss void ohci_device_intr_close __P((usbd_pipe_handle));
139 1.1 augustss usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
140 1.1 augustss struct ohci_pipe *pipe, int ival));
141 1.1 augustss
142 1.1 augustss int ohci_str __P((usb_string_descriptor_t *, int, char *));
143 1.1 augustss
144 1.1 augustss void ohci_timeout __P((void *));
145 1.1 augustss void ohci_rhsc_able __P((ohci_softc_t *, int));
146 1.1 augustss
147 1.1 augustss #ifdef USB_DEBUG
148 1.1 augustss ohci_softc_t *thesc;
149 1.1 augustss void ohci_dumpregs __P((ohci_softc_t *));
150 1.1 augustss void ohci_dump_tds __P((ohci_soft_td_t *));
151 1.1 augustss void ohci_dump_td __P((ohci_soft_td_t *));
152 1.1 augustss void ohci_dump_ed __P((ohci_soft_ed_t *));
153 1.1 augustss #endif
154 1.1 augustss
155 1.15 augustss #if defined(__NetBSD__)
156 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
157 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
158 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
159 1.15 augustss #elif defined(__FreeBSD__)
160 1.27 augustss #define OWRITE4(sc, r, x) *(u_int32_t *) ((sc)->sc_iobase + (r)) = x
161 1.27 augustss #define OREAD4(sc, r) (*(u_int32_t *) ((sc)->sc_iobase + (r)))
162 1.27 augustss #define OREAD2(sc, r) (*(u_int16_t *) ((sc)->sc_iobase + (r)))
163 1.15 augustss #endif
164 1.1 augustss
165 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
166 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
167 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
168 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
169 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
170 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
171 1.1 augustss
172 1.1 augustss struct ohci_pipe {
173 1.1 augustss struct usbd_pipe pipe;
174 1.1 augustss ohci_soft_ed_t *sed;
175 1.1 augustss ohci_soft_td_t *tail;
176 1.1 augustss /* Info needed for different pipe kinds. */
177 1.1 augustss union {
178 1.1 augustss /* Control pipe */
179 1.1 augustss struct {
180 1.4 augustss usb_dma_t datadma;
181 1.4 augustss usb_dma_t reqdma;
182 1.1 augustss u_int length;
183 1.1 augustss ohci_soft_td_t *setup, *xfer, *stat;
184 1.1 augustss } ctl;
185 1.1 augustss /* Interrupt pipe */
186 1.1 augustss struct {
187 1.4 augustss usb_dma_t datadma;
188 1.1 augustss int nslots;
189 1.1 augustss int pos;
190 1.1 augustss } intr;
191 1.3 augustss /* Bulk pipe */
192 1.3 augustss struct {
193 1.4 augustss usb_dma_t datadma;
194 1.3 augustss u_int length;
195 1.3 augustss } bulk;
196 1.1 augustss } u;
197 1.1 augustss };
198 1.1 augustss
199 1.1 augustss #define OHCI_INTR_ENDPT 1
200 1.1 augustss
201 1.1 augustss struct usbd_methods ohci_root_ctrl_methods = {
202 1.1 augustss ohci_root_ctrl_transfer,
203 1.17 augustss ohci_root_ctrl_start,
204 1.1 augustss ohci_root_ctrl_abort,
205 1.1 augustss ohci_root_ctrl_close,
206 1.7 augustss 0,
207 1.1 augustss };
208 1.1 augustss
209 1.1 augustss struct usbd_methods ohci_root_intr_methods = {
210 1.1 augustss ohci_root_intr_transfer,
211 1.17 augustss ohci_root_intr_start,
212 1.1 augustss ohci_root_intr_abort,
213 1.1 augustss ohci_root_intr_close,
214 1.7 augustss 0,
215 1.1 augustss };
216 1.1 augustss
217 1.1 augustss struct usbd_methods ohci_device_ctrl_methods = {
218 1.1 augustss ohci_device_ctrl_transfer,
219 1.17 augustss ohci_device_ctrl_start,
220 1.1 augustss ohci_device_ctrl_abort,
221 1.1 augustss ohci_device_ctrl_close,
222 1.7 augustss 0,
223 1.1 augustss };
224 1.1 augustss
225 1.1 augustss struct usbd_methods ohci_device_intr_methods = {
226 1.1 augustss ohci_device_intr_transfer,
227 1.17 augustss ohci_device_intr_start,
228 1.1 augustss ohci_device_intr_abort,
229 1.1 augustss ohci_device_intr_close,
230 1.1 augustss };
231 1.1 augustss
232 1.3 augustss struct usbd_methods ohci_device_bulk_methods = {
233 1.3 augustss ohci_device_bulk_transfer,
234 1.17 augustss ohci_device_bulk_start,
235 1.3 augustss ohci_device_bulk_abort,
236 1.3 augustss ohci_device_bulk_close,
237 1.7 augustss 0,
238 1.3 augustss };
239 1.3 augustss
240 1.1 augustss ohci_soft_ed_t *
241 1.1 augustss ohci_alloc_sed(sc)
242 1.1 augustss ohci_softc_t *sc;
243 1.1 augustss {
244 1.1 augustss ohci_soft_ed_t *sed;
245 1.1 augustss usbd_status r;
246 1.1 augustss int i, offs;
247 1.4 augustss usb_dma_t dma;
248 1.1 augustss
249 1.1 augustss if (!sc->sc_freeeds) {
250 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
251 1.1 augustss sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
252 1.1 augustss M_USBDEV, M_NOWAIT);
253 1.1 augustss if (!sed)
254 1.1 augustss return 0;
255 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
256 1.4 augustss OHCI_ED_ALIGN, &dma);
257 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
258 1.1 augustss free(sed, M_USBDEV);
259 1.1 augustss return 0;
260 1.1 augustss }
261 1.1 augustss for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
262 1.1 augustss offs = i * OHCI_ED_SIZE;
263 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
264 1.1 augustss sed->ed = (ohci_ed_t *)
265 1.1 augustss ((char *)KERNADDR(&dma) + offs);
266 1.1 augustss sed->next = sc->sc_freeeds;
267 1.1 augustss sc->sc_freeeds = sed;
268 1.1 augustss }
269 1.1 augustss }
270 1.1 augustss sed = sc->sc_freeeds;
271 1.1 augustss sc->sc_freeeds = sed->next;
272 1.1 augustss memset(sed->ed, 0, OHCI_ED_SIZE);
273 1.1 augustss sed->next = 0;
274 1.1 augustss return sed;
275 1.1 augustss }
276 1.1 augustss
277 1.1 augustss void
278 1.1 augustss ohci_free_sed(sc, sed)
279 1.1 augustss ohci_softc_t *sc;
280 1.1 augustss ohci_soft_ed_t *sed;
281 1.1 augustss {
282 1.1 augustss sed->next = sc->sc_freeeds;
283 1.1 augustss sc->sc_freeeds = sed;
284 1.1 augustss }
285 1.1 augustss
286 1.1 augustss ohci_soft_td_t *
287 1.1 augustss ohci_alloc_std(sc)
288 1.1 augustss ohci_softc_t *sc;
289 1.1 augustss {
290 1.1 augustss ohci_soft_td_t *std;
291 1.1 augustss usbd_status r;
292 1.1 augustss int i, offs;
293 1.4 augustss usb_dma_t dma;
294 1.1 augustss
295 1.1 augustss if (!sc->sc_freetds) {
296 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
297 1.1 augustss std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
298 1.1 augustss M_USBDEV, M_NOWAIT);
299 1.1 augustss if (!std)
300 1.1 augustss return 0;
301 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
302 1.4 augustss OHCI_TD_ALIGN, &dma);
303 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
304 1.1 augustss free(std, M_USBDEV);
305 1.1 augustss return 0;
306 1.1 augustss }
307 1.1 augustss for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
308 1.1 augustss offs = i * OHCI_TD_SIZE;
309 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
310 1.1 augustss std->td = (ohci_td_t *)
311 1.1 augustss ((char *)KERNADDR(&dma) + offs);
312 1.1 augustss std->nexttd = sc->sc_freetds;
313 1.1 augustss sc->sc_freetds = std;
314 1.1 augustss }
315 1.1 augustss }
316 1.1 augustss std = sc->sc_freetds;
317 1.1 augustss sc->sc_freetds = std->nexttd;
318 1.1 augustss memset(std->td, 0, OHCI_TD_SIZE);
319 1.1 augustss std->nexttd = 0;
320 1.1 augustss return (std);
321 1.1 augustss }
322 1.1 augustss
323 1.1 augustss void
324 1.1 augustss ohci_free_std(sc, std)
325 1.1 augustss ohci_softc_t *sc;
326 1.1 augustss ohci_soft_td_t *std;
327 1.1 augustss {
328 1.1 augustss std->nexttd = sc->sc_freetds;
329 1.1 augustss sc->sc_freetds = std;
330 1.1 augustss }
331 1.1 augustss
332 1.1 augustss usbd_status
333 1.1 augustss ohci_init(sc)
334 1.1 augustss ohci_softc_t *sc;
335 1.1 augustss {
336 1.1 augustss ohci_soft_ed_t *sed, *psed;
337 1.1 augustss usbd_status r;
338 1.1 augustss int rev;
339 1.1 augustss int i;
340 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
341 1.16 augustss
342 1.1 augustss DPRINTF(("ohci_init: start\n"));
343 1.1 augustss rev = OREAD4(sc, OHCI_REVISION);
344 1.15 augustss printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
345 1.1 augustss OHCI_REV_HI(rev), OHCI_REV_LO(rev),
346 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
347 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
348 1.1 augustss printf("%s: unsupported OHCI revision\n",
349 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
350 1.1 augustss return (USBD_INVAL);
351 1.1 augustss }
352 1.1 augustss
353 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
354 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
355 1.1 augustss
356 1.1 augustss /* Allocate the HCCA area. */
357 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
358 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
359 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
360 1.1 augustss return (r);
361 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
362 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
363 1.1 augustss
364 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
365 1.1 augustss
366 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
367 1.1 augustss if (!sc->sc_ctrl_head) {
368 1.1 augustss r = USBD_NOMEM;
369 1.1 augustss goto bad1;
370 1.1 augustss }
371 1.16 augustss sc->sc_ctrl_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
372 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
373 1.1 augustss if (!sc->sc_bulk_head) {
374 1.1 augustss r = USBD_NOMEM;
375 1.1 augustss goto bad2;
376 1.1 augustss }
377 1.16 augustss sc->sc_bulk_head->ed->ed_flags |= LE(OHCI_ED_SKIP);
378 1.1 augustss
379 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
380 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
381 1.1 augustss sed = ohci_alloc_sed(sc);
382 1.1 augustss if (!sed) {
383 1.1 augustss while (--i >= 0)
384 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
385 1.1 augustss r = USBD_NOMEM;
386 1.1 augustss goto bad3;
387 1.1 augustss }
388 1.1 augustss /* All ED fields are set to 0. */
389 1.1 augustss sc->sc_eds[i] = sed;
390 1.16 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
391 1.1 augustss if (i != 0) {
392 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
393 1.1 augustss sed->next = psed;
394 1.16 augustss sed->ed->ed_nexted = LE(psed->physaddr);
395 1.1 augustss }
396 1.1 augustss }
397 1.1 augustss /*
398 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
399 1.1 augustss * the tree set up properly to spread the interrupts.
400 1.1 augustss */
401 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
402 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
403 1.16 augustss LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
404 1.1 augustss
405 1.1 augustss /* Determine in what context we are running. */
406 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
407 1.1 augustss if (ctl & OHCI_IR) {
408 1.1 augustss /* SMM active, request change */
409 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
410 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
411 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
412 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
413 1.1 augustss delay(1000);
414 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
415 1.1 augustss }
416 1.1 augustss if ((ctl & OHCI_IR) == 0) {
417 1.15 augustss printf("%s: SMM does not respond, resetting\n",
418 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
419 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
420 1.1 augustss goto reset;
421 1.1 augustss }
422 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
423 1.1 augustss /* BIOS started controller. */
424 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
425 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
426 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
427 1.1 augustss delay(USB_RESUME_DELAY * 1000);
428 1.1 augustss }
429 1.1 augustss } else {
430 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
431 1.1 augustss reset:
432 1.1 augustss /* Controller was cold started. */
433 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
434 1.1 augustss }
435 1.1 augustss
436 1.16 augustss /*
437 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
438 1.25 augustss * without it some controllers do not start.
439 1.16 augustss */
440 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
441 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
442 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
443 1.16 augustss
444 1.1 augustss /* We now own the host controller and the bus has been reset. */
445 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
446 1.1 augustss
447 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
448 1.1 augustss /* Nominal time for a reset is 10 us. */
449 1.1 augustss for (i = 0; i < 10; i++) {
450 1.1 augustss delay(10);
451 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
452 1.1 augustss if (!hcr)
453 1.1 augustss break;
454 1.1 augustss }
455 1.1 augustss if (hcr) {
456 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
457 1.1 augustss r = USBD_IOERROR;
458 1.1 augustss goto bad3;
459 1.1 augustss }
460 1.1 augustss #ifdef USB_DEBUG
461 1.1 augustss thesc = sc;
462 1.1 augustss if (ohcidebug > 15)
463 1.1 augustss ohci_dumpregs(sc);
464 1.1 augustss #endif
465 1.1 augustss
466 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
467 1.1 augustss
468 1.1 augustss /* Set up HC registers. */
469 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
470 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
471 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
472 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
473 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
474 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
475 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
476 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
477 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
478 1.1 augustss /* And finally start it! */
479 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
480 1.1 augustss
481 1.1 augustss /*
482 1.1 augustss * The controller is now OPERATIONAL. Set a some final
483 1.1 augustss * registers that should be set earlier, but that the
484 1.1 augustss * controller ignores when in the SUSPEND state.
485 1.1 augustss */
486 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
487 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
488 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
489 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
490 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
491 1.1 augustss
492 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
493 1.1 augustss
494 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
495 1.1 augustss
496 1.1 augustss #ifdef USB_DEBUG
497 1.1 augustss if (ohcidebug > 5)
498 1.1 augustss ohci_dumpregs(sc);
499 1.1 augustss #endif
500 1.1 augustss
501 1.1 augustss /* Set up the bus struct. */
502 1.1 augustss sc->sc_bus.open_pipe = ohci_open;
503 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
504 1.5 augustss sc->sc_bus.do_poll = ohci_poll;
505 1.1 augustss
506 1.1 augustss return (USBD_NORMAL_COMPLETION);
507 1.1 augustss
508 1.1 augustss bad3:
509 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
510 1.1 augustss bad2:
511 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
512 1.1 augustss bad1:
513 1.4 augustss usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
514 1.1 augustss return (r);
515 1.1 augustss }
516 1.1 augustss
517 1.1 augustss #ifdef USB_DEBUG
518 1.1 augustss void ohcidump(void);
519 1.1 augustss void ohcidump(void) { ohci_dumpregs(thesc); }
520 1.1 augustss
521 1.1 augustss void
522 1.1 augustss ohci_dumpregs(sc)
523 1.1 augustss ohci_softc_t *sc;
524 1.1 augustss {
525 1.1 augustss printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
526 1.1 augustss OREAD4(sc, OHCI_REVISION),
527 1.1 augustss OREAD4(sc, OHCI_CONTROL),
528 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
529 1.1 augustss printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
530 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
531 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
532 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE));
533 1.1 augustss printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
534 1.1 augustss OREAD4(sc, OHCI_HCCA),
535 1.1 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
536 1.1 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED));
537 1.1 augustss printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
538 1.1 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
539 1.1 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
540 1.1 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED));
541 1.1 augustss printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
542 1.1 augustss OREAD4(sc, OHCI_DONE_HEAD),
543 1.1 augustss OREAD4(sc, OHCI_FM_INTERVAL),
544 1.1 augustss OREAD4(sc, OHCI_FM_REMAINING));
545 1.1 augustss printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
546 1.1 augustss OREAD4(sc, OHCI_FM_NUMBER),
547 1.1 augustss OREAD4(sc, OHCI_PERIODIC_START),
548 1.1 augustss OREAD4(sc, OHCI_LS_THRESHOLD));
549 1.1 augustss printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
550 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
551 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
552 1.1 augustss OREAD4(sc, OHCI_RH_STATUS));
553 1.1 augustss printf(" port1=0x%08x port2=0x%08x\n",
554 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
555 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
556 1.1 augustss printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
557 1.16 augustss LE(sc->sc_hcca->hcca_frame_number),
558 1.16 augustss LE(sc->sc_hcca->hcca_done_head));
559 1.1 augustss }
560 1.1 augustss #endif
561 1.1 augustss
562 1.1 augustss int
563 1.1 augustss ohci_intr(p)
564 1.1 augustss void *p;
565 1.1 augustss {
566 1.1 augustss ohci_softc_t *sc = p;
567 1.1 augustss u_int32_t intrs, eintrs;
568 1.1 augustss ohci_physaddr_t done;
569 1.1 augustss
570 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
571 1.25 augustss if (sc == NULL || sc->sc_hcca == NULL) { /* NWH added sc==0 */
572 1.15 augustss #ifdef DIAGNOSTIC
573 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
574 1.15 augustss #endif
575 1.15 augustss return (0);
576 1.15 augustss }
577 1.15 augustss
578 1.27 augustss intrs = 0;
579 1.16 augustss done = LE(sc->sc_hcca->hcca_done_head);
580 1.1 augustss if (done != 0) {
581 1.26 augustss sc->sc_hcca->hcca_done_head = 0;
582 1.26 augustss if (done & ~OHCI_DONE_INTRS)
583 1.26 augustss intrs = OHCI_WDH;
584 1.1 augustss if (done & OHCI_DONE_INTRS)
585 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
586 1.1 augustss } else
587 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
588 1.1 augustss if (!intrs)
589 1.1 augustss return (0);
590 1.1 augustss intrs &= ~OHCI_MIE;
591 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
592 1.1 augustss eintrs = intrs & sc->sc_eintrs;
593 1.1 augustss if (!eintrs)
594 1.1 augustss return (0);
595 1.1 augustss
596 1.1 augustss sc->sc_intrs++;
597 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
598 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
599 1.1 augustss (u_int)eintrs));
600 1.1 augustss
601 1.1 augustss if (eintrs & OHCI_SO) {
602 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
603 1.1 augustss /* XXX do what */
604 1.1 augustss intrs &= ~OHCI_SO;
605 1.1 augustss }
606 1.1 augustss if (eintrs & OHCI_WDH) {
607 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
608 1.1 augustss intrs &= ~OHCI_WDH;
609 1.1 augustss }
610 1.1 augustss if (eintrs & OHCI_RD) {
611 1.1 augustss /* XXX process resume detect */
612 1.1 augustss }
613 1.1 augustss if (eintrs & OHCI_UE) {
614 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
615 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
616 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
617 1.1 augustss /* XXX what else */
618 1.1 augustss }
619 1.1 augustss if (eintrs & OHCI_RHSC) {
620 1.1 augustss ohci_rhsc(sc, sc->sc_intrreqh);
621 1.1 augustss intrs &= ~OHCI_RHSC;
622 1.1 augustss
623 1.1 augustss /*
624 1.1 augustss * Disable RHSC interrupt for now, because it will be
625 1.1 augustss * on until the port has been reset.
626 1.1 augustss */
627 1.1 augustss ohci_rhsc_able(sc, 0);
628 1.1 augustss }
629 1.1 augustss
630 1.1 augustss /* Block unprocessed interrupts. XXX */
631 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
632 1.1 augustss sc->sc_eintrs &= ~intrs;
633 1.1 augustss
634 1.1 augustss return (1);
635 1.1 augustss }
636 1.1 augustss
637 1.1 augustss void
638 1.1 augustss ohci_rhsc_able(sc, on)
639 1.1 augustss ohci_softc_t *sc;
640 1.1 augustss int on;
641 1.1 augustss {
642 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
643 1.1 augustss if (on) {
644 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
645 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
646 1.1 augustss } else {
647 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
648 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
649 1.1 augustss }
650 1.1 augustss }
651 1.1 augustss
652 1.13 augustss #ifdef USB_DEBUG
653 1.13 augustss char *ohci_cc_strs[] = {
654 1.13 augustss "NO_ERROR",
655 1.13 augustss "CRC",
656 1.13 augustss "BIT_STUFFING",
657 1.13 augustss "DATA_TOGGLE_MISMATCH",
658 1.13 augustss "STALL",
659 1.13 augustss "DEVICE_NOT_RESPONDING",
660 1.13 augustss "PID_CHECK_FAILURE",
661 1.13 augustss "UNEXPECTED_PID",
662 1.13 augustss "DATA_OVERRUN",
663 1.13 augustss "DATA_UNDERRUN",
664 1.13 augustss "BUFFER_OVERRUN",
665 1.13 augustss "BUFFER_UNDERRUN",
666 1.13 augustss "NOT_ACCESSED",
667 1.13 augustss };
668 1.13 augustss #endif
669 1.13 augustss
670 1.1 augustss void
671 1.1 augustss ohci_process_done(sc, done)
672 1.1 augustss ohci_softc_t *sc;
673 1.1 augustss ohci_physaddr_t done;
674 1.1 augustss {
675 1.1 augustss ohci_soft_td_t *std, *sdone;
676 1.1 augustss usbd_request_handle reqh;
677 1.1 augustss int len, cc;
678 1.1 augustss
679 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
680 1.1 augustss
681 1.1 augustss /* Reverse the done list. */
682 1.16 augustss for (sdone = 0; done; done = LE(std->td->td_nexttd)) {
683 1.1 augustss std = ohci_hash_find_td(sc, done);
684 1.1 augustss std->dnext = sdone;
685 1.1 augustss sdone = std;
686 1.1 augustss }
687 1.1 augustss
688 1.1 augustss #ifdef USB_DEBUG
689 1.1 augustss if (ohcidebug > 10) {
690 1.1 augustss printf("ohci_process_done: TD done:\n");
691 1.1 augustss ohci_dump_tds(sdone);
692 1.1 augustss }
693 1.1 augustss #endif
694 1.1 augustss
695 1.1 augustss for (std = sdone; std; std = std->dnext) {
696 1.1 augustss reqh = std->reqh;
697 1.27 augustss DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n",
698 1.27 augustss std, reqh, reqh->hcpriv));
699 1.16 augustss cc = OHCI_TD_GET_CC(LE(std->td->td_flags));
700 1.23 augustss if (cc == OHCI_CC_NO_ERROR) {
701 1.1 augustss if (std->td->td_cbp == 0)
702 1.1 augustss len = std->len;
703 1.1 augustss else
704 1.16 augustss len = LE(std->td->td_be) -
705 1.16 augustss LE(std->td->td_cbp) + 1;
706 1.23 augustss /*
707 1.23 augustss * Only do a callback on the last stage of a transfer.
708 1.23 augustss * Others have hcpriv = 0.
709 1.23 augustss */
710 1.23 augustss if ((reqh->pipe->endpoint->edesc->bmAttributes &
711 1.23 augustss UE_XFERTYPE) == UE_CONTROL) {
712 1.23 augustss /* For a control transfer the length is in
713 1.23 augustss * the xfer stage */
714 1.23 augustss if (reqh->hcpriv == std) {
715 1.23 augustss reqh->status = USBD_NORMAL_COMPLETION;
716 1.23 augustss ohci_ii_done(sc, reqh);
717 1.23 augustss } else
718 1.23 augustss reqh->actlen = len;
719 1.23 augustss } else {
720 1.23 augustss if (reqh->hcpriv == std) {
721 1.23 augustss reqh->actlen = len;
722 1.23 augustss reqh->status = USBD_NORMAL_COMPLETION;
723 1.23 augustss ohci_ii_done(sc, reqh);
724 1.23 augustss }
725 1.21 augustss }
726 1.1 augustss } else {
727 1.1 augustss ohci_soft_td_t *p, *n;
728 1.1 augustss struct ohci_pipe *opipe =
729 1.1 augustss (struct ohci_pipe *)reqh->pipe;
730 1.13 augustss DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
731 1.16 augustss OHCI_TD_GET_CC(LE(std->td->td_flags)),
732 1.16 augustss ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td->td_flags))]));
733 1.1 augustss /*
734 1.1 augustss * Endpoint is halted. First unlink all the TDs
735 1.1 augustss * belonging to the failed transfer, and then restart
736 1.1 augustss * the endpoint.
737 1.1 augustss */
738 1.1 augustss for (p = std->nexttd; p->reqh == reqh; p = n) {
739 1.1 augustss n = p->nexttd;
740 1.1 augustss ohci_hash_rem_td(sc, p);
741 1.1 augustss ohci_free_std(sc, p);
742 1.1 augustss }
743 1.16 augustss /* clear halt */
744 1.16 augustss opipe->sed->ed->ed_headp = LE(p->physaddr);
745 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
746 1.1 augustss
747 1.1 augustss if (cc == OHCI_CC_STALL)
748 1.1 augustss reqh->status = USBD_STALLED;
749 1.1 augustss else
750 1.1 augustss reqh->status = USBD_IOERROR;
751 1.23 augustss ohci_ii_done(sc, reqh);
752 1.1 augustss }
753 1.1 augustss ohci_hash_rem_td(sc, std);
754 1.1 augustss ohci_free_std(sc, std);
755 1.1 augustss }
756 1.1 augustss }
757 1.1 augustss
758 1.1 augustss void
759 1.23 augustss ohci_ii_done(sc, reqh)
760 1.15 augustss ohci_softc_t *sc;
761 1.15 augustss usbd_request_handle reqh;
762 1.15 augustss {
763 1.15 augustss switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
764 1.15 augustss case UE_CONTROL:
765 1.15 augustss ohci_ctrl_done(sc, reqh);
766 1.23 augustss usb_start_next(reqh->pipe);
767 1.15 augustss break;
768 1.15 augustss case UE_INTERRUPT:
769 1.15 augustss ohci_intr_done(sc, reqh);
770 1.15 augustss break;
771 1.15 augustss case UE_BULK:
772 1.15 augustss ohci_bulk_done(sc, reqh);
773 1.23 augustss usb_start_next(reqh->pipe);
774 1.15 augustss break;
775 1.15 augustss case UE_ISOCHRONOUS:
776 1.15 augustss printf("ohci_process_done: ISO done?\n");
777 1.23 augustss usb_start_next(reqh->pipe);
778 1.15 augustss break;
779 1.15 augustss }
780 1.15 augustss
781 1.15 augustss /* And finally execute callback. */
782 1.15 augustss reqh->xfercb(reqh);
783 1.15 augustss }
784 1.15 augustss
785 1.15 augustss void
786 1.1 augustss ohci_ctrl_done(sc, reqh)
787 1.1 augustss ohci_softc_t *sc;
788 1.1 augustss usbd_request_handle reqh;
789 1.1 augustss {
790 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
791 1.1 augustss u_int len = opipe->u.ctl.length;
792 1.4 augustss usb_dma_t *dma;
793 1.1 augustss
794 1.1 augustss DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
795 1.1 augustss
796 1.1 augustss if (!reqh->isreq) {
797 1.8 augustss panic("ohci_ctrl_done: not a request\n");
798 1.1 augustss return;
799 1.1 augustss }
800 1.1 augustss
801 1.1 augustss if (len != 0) {
802 1.1 augustss dma = &opipe->u.ctl.datadma;
803 1.1 augustss if (reqh->request.bmRequestType & UT_READ)
804 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), len);
805 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
806 1.1 augustss }
807 1.15 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
808 1.1 augustss }
809 1.1 augustss
810 1.1 augustss void
811 1.1 augustss ohci_intr_done(sc, reqh)
812 1.1 augustss ohci_softc_t *sc;
813 1.1 augustss usbd_request_handle reqh;
814 1.1 augustss {
815 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
816 1.4 augustss usb_dma_t *dma;
817 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
818 1.1 augustss ohci_soft_td_t *xfer, *tail;
819 1.1 augustss
820 1.1 augustss
821 1.1 augustss DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
822 1.1 augustss reqh, reqh->actlen));
823 1.1 augustss
824 1.1 augustss dma = &opipe->u.intr.datadma;
825 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
826 1.1 augustss
827 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
828 1.1 augustss xfer = opipe->tail;
829 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
830 1.1 augustss if (!tail) {
831 1.1 augustss reqh->status = USBD_NOMEM;
832 1.1 augustss return;
833 1.1 augustss }
834 1.1 augustss tail->reqh = 0;
835 1.1 augustss
836 1.16 augustss xfer->td->td_flags = LE(
837 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
838 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
839 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
840 1.19 augustss xfer->td->td_flags |= LE(OHCI_TD_R);
841 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dma));
842 1.1 augustss xfer->nexttd = tail;
843 1.16 augustss xfer->td->td_nexttd = LE(tail->physaddr);
844 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + reqh->length - 1);
845 1.1 augustss xfer->len = reqh->length;
846 1.1 augustss xfer->reqh = reqh;
847 1.24 augustss
848 1.24 augustss reqh->hcpriv = xfer;
849 1.1 augustss
850 1.1 augustss ohci_hash_add_td(sc, xfer);
851 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
852 1.1 augustss opipe->tail = tail;
853 1.1 augustss } else {
854 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
855 1.23 augustss usb_start_next(reqh->pipe);
856 1.1 augustss }
857 1.1 augustss }
858 1.1 augustss
859 1.1 augustss void
860 1.3 augustss ohci_bulk_done(sc, reqh)
861 1.3 augustss ohci_softc_t *sc;
862 1.3 augustss usbd_request_handle reqh;
863 1.3 augustss {
864 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
865 1.4 augustss usb_dma_t *dma;
866 1.3 augustss
867 1.3 augustss
868 1.3 augustss DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
869 1.3 augustss reqh, reqh->actlen));
870 1.3 augustss
871 1.3 augustss dma = &opipe->u.bulk.datadma;
872 1.3 augustss if (reqh->request.bmRequestType & UT_READ)
873 1.3 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
874 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
875 1.15 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
876 1.3 augustss }
877 1.3 augustss
878 1.3 augustss void
879 1.1 augustss ohci_rhsc(sc, reqh)
880 1.1 augustss ohci_softc_t *sc;
881 1.1 augustss usbd_request_handle reqh;
882 1.1 augustss {
883 1.1 augustss usbd_pipe_handle pipe;
884 1.1 augustss struct ohci_pipe *opipe;
885 1.1 augustss u_char *p;
886 1.1 augustss int i, m;
887 1.1 augustss int hstatus;
888 1.1 augustss
889 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
890 1.1 augustss DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
891 1.1 augustss sc, reqh, hstatus));
892 1.1 augustss
893 1.1 augustss if (reqh == 0) {
894 1.1 augustss /* Just ignore the change. */
895 1.1 augustss return;
896 1.1 augustss }
897 1.1 augustss
898 1.1 augustss pipe = reqh->pipe;
899 1.1 augustss opipe = (struct ohci_pipe *)pipe;
900 1.1 augustss
901 1.1 augustss p = KERNADDR(&opipe->u.intr.datadma);
902 1.1 augustss m = min(sc->sc_noport, reqh->length * 8 - 1);
903 1.1 augustss memset(p, 0, reqh->length);
904 1.1 augustss for (i = 1; i <= m; i++) {
905 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
906 1.1 augustss p[i/8] |= 1 << (i%8);
907 1.1 augustss }
908 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
909 1.1 augustss reqh->actlen = reqh->length;
910 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
911 1.1 augustss reqh->xfercb(reqh);
912 1.1 augustss
913 1.1 augustss if (reqh->pipe->intrreqh != reqh) {
914 1.1 augustss sc->sc_intrreqh = 0;
915 1.4 augustss usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
916 1.17 augustss usb_start_next(reqh->pipe);
917 1.1 augustss }
918 1.1 augustss }
919 1.1 augustss
920 1.1 augustss /*
921 1.1 augustss * Wait here until controller claims to have an interrupt.
922 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
923 1.1 augustss * too long.
924 1.1 augustss */
925 1.1 augustss void
926 1.1 augustss ohci_waitintr(sc, reqh)
927 1.1 augustss ohci_softc_t *sc;
928 1.1 augustss usbd_request_handle reqh;
929 1.1 augustss {
930 1.1 augustss int timo = reqh->timeout;
931 1.1 augustss int usecs;
932 1.1 augustss u_int32_t intrs;
933 1.1 augustss
934 1.1 augustss reqh->status = USBD_IN_PROGRESS;
935 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
936 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
937 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
938 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
939 1.1 augustss #ifdef USB_DEBUG
940 1.1 augustss if (ohcidebug > 15)
941 1.1 augustss ohci_dumpregs(sc);
942 1.1 augustss #endif
943 1.1 augustss if (intrs) {
944 1.1 augustss ohci_intr(sc);
945 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
946 1.1 augustss return;
947 1.1 augustss }
948 1.1 augustss }
949 1.15 augustss
950 1.15 augustss /* Timeout */
951 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
952 1.1 augustss reqh->status = USBD_TIMEOUT;
953 1.23 augustss ohci_ii_done(sc, reqh);
954 1.15 augustss /* XXX should free TD */
955 1.5 augustss }
956 1.5 augustss
957 1.5 augustss void
958 1.5 augustss ohci_poll(bus)
959 1.5 augustss struct usbd_bus *bus;
960 1.5 augustss {
961 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
962 1.5 augustss
963 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
964 1.5 augustss ohci_intr(sc);
965 1.1 augustss }
966 1.1 augustss
967 1.1 augustss usbd_status
968 1.1 augustss ohci_device_request(reqh)
969 1.1 augustss usbd_request_handle reqh;
970 1.1 augustss {
971 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
972 1.1 augustss usb_device_request_t *req = &reqh->request;
973 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
974 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
975 1.1 augustss int addr = dev->address;
976 1.1 augustss ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
977 1.1 augustss ohci_soft_ed_t *sed;
978 1.4 augustss usb_dma_t *dmap;
979 1.1 augustss int isread;
980 1.1 augustss int len;
981 1.1 augustss usbd_status r;
982 1.1 augustss int s;
983 1.1 augustss
984 1.1 augustss isread = req->bmRequestType & UT_READ;
985 1.1 augustss len = UGETW(req->wLength);
986 1.1 augustss
987 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
988 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
989 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
990 1.1 augustss UGETW(req->wIndex), len, addr,
991 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
992 1.1 augustss
993 1.1 augustss setup = opipe->tail;
994 1.1 augustss stat = ohci_alloc_std(sc);
995 1.1 augustss if (!stat) {
996 1.1 augustss r = USBD_NOMEM;
997 1.1 augustss goto bad1;
998 1.1 augustss }
999 1.1 augustss tail = ohci_alloc_std(sc);
1000 1.1 augustss if (!tail) {
1001 1.1 augustss r = USBD_NOMEM;
1002 1.1 augustss goto bad2;
1003 1.1 augustss }
1004 1.1 augustss tail->reqh = 0;
1005 1.1 augustss
1006 1.1 augustss sed = opipe->sed;
1007 1.1 augustss dmap = &opipe->u.ctl.datadma;
1008 1.1 augustss opipe->u.ctl.length = len;
1009 1.1 augustss
1010 1.10 augustss /* Update device address and length since they may have changed. */
1011 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1012 1.16 augustss sed->ed->ed_flags = LE(
1013 1.16 augustss (LE(sed->ed->ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1014 1.16 augustss OHCI_ED_SET_FA(addr) |
1015 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1016 1.1 augustss
1017 1.1 augustss /* Set up data transaction */
1018 1.1 augustss if (len != 0) {
1019 1.1 augustss xfer = ohci_alloc_std(sc);
1020 1.1 augustss if (!xfer) {
1021 1.1 augustss r = USBD_NOMEM;
1022 1.1 augustss goto bad3;
1023 1.1 augustss }
1024 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1025 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1026 1.1 augustss goto bad4;
1027 1.16 augustss xfer->td->td_flags = LE(
1028 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1029 1.19 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1030 1.19 augustss (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1031 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dmap));
1032 1.1 augustss xfer->nexttd = stat;
1033 1.16 augustss xfer->td->td_nexttd = LE(stat->physaddr);
1034 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
1035 1.1 augustss xfer->len = len;
1036 1.1 augustss xfer->reqh = reqh;
1037 1.1 augustss
1038 1.1 augustss next = xfer;
1039 1.23 augustss } else
1040 1.1 augustss next = stat;
1041 1.1 augustss
1042 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1043 1.1 augustss if (!isread && len != 0)
1044 1.1 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1045 1.1 augustss
1046 1.16 augustss setup->td->td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1047 1.16 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1048 1.16 augustss setup->td->td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1049 1.1 augustss setup->nexttd = next;
1050 1.16 augustss setup->td->td_nexttd = LE(next->physaddr);
1051 1.16 augustss setup->td->td_be = LE(LE(setup->td->td_cbp) + sizeof *req - 1);
1052 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
1053 1.1 augustss setup->reqh = reqh;
1054 1.1 augustss
1055 1.16 augustss stat->td->td_flags = LE(
1056 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1057 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1058 1.1 augustss stat->td->td_cbp = 0;
1059 1.1 augustss stat->nexttd = tail;
1060 1.16 augustss stat->td->td_nexttd = LE(tail->physaddr);
1061 1.1 augustss stat->td->td_be = 0;
1062 1.1 augustss stat->len = 0;
1063 1.1 augustss stat->reqh = reqh;
1064 1.1 augustss
1065 1.23 augustss reqh->hcpriv = stat;
1066 1.23 augustss
1067 1.1 augustss #if USB_DEBUG
1068 1.1 augustss if (ohcidebug > 5) {
1069 1.1 augustss printf("ohci_device_request:\n");
1070 1.1 augustss ohci_dump_ed(sed);
1071 1.1 augustss ohci_dump_tds(setup);
1072 1.1 augustss }
1073 1.1 augustss #endif
1074 1.1 augustss
1075 1.1 augustss /* Insert ED in schedule */
1076 1.1 augustss s = splusb();
1077 1.1 augustss ohci_hash_add_td(sc, setup);
1078 1.1 augustss if (len != 0)
1079 1.1 augustss ohci_hash_add_td(sc, xfer);
1080 1.1 augustss ohci_hash_add_td(sc, stat);
1081 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
1082 1.1 augustss opipe->tail = tail;
1083 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1084 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1085 1.15 augustss usb_timeout(ohci_timeout, reqh,
1086 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1087 1.15 augustss }
1088 1.1 augustss splx(s);
1089 1.1 augustss
1090 1.1 augustss #if USB_DEBUG
1091 1.1 augustss if (ohcidebug > 5) {
1092 1.1 augustss delay(5000);
1093 1.1 augustss printf("ohci_device_request: status=%x\n",
1094 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
1095 1.1 augustss ohci_dump_ed(sed);
1096 1.1 augustss ohci_dump_tds(setup);
1097 1.1 augustss }
1098 1.1 augustss #endif
1099 1.1 augustss
1100 1.1 augustss return (USBD_NORMAL_COMPLETION);
1101 1.1 augustss
1102 1.1 augustss bad4:
1103 1.1 augustss ohci_free_std(sc, xfer);
1104 1.1 augustss bad3:
1105 1.1 augustss ohci_free_std(sc, tail);
1106 1.1 augustss bad2:
1107 1.1 augustss ohci_free_std(sc, stat);
1108 1.1 augustss bad1:
1109 1.1 augustss return (r);
1110 1.1 augustss }
1111 1.1 augustss
1112 1.1 augustss /*
1113 1.1 augustss * Add an ED to the schedule. Called at splusb().
1114 1.1 augustss */
1115 1.1 augustss void
1116 1.3 augustss ohci_add_ed(sed, head)
1117 1.1 augustss ohci_soft_ed_t *sed;
1118 1.1 augustss ohci_soft_ed_t *head;
1119 1.1 augustss {
1120 1.1 augustss sed->next = head->next;
1121 1.1 augustss sed->ed->ed_nexted = head->ed->ed_nexted;
1122 1.1 augustss head->next = sed;
1123 1.16 augustss head->ed->ed_nexted = LE(sed->physaddr);
1124 1.1 augustss }
1125 1.1 augustss
1126 1.1 augustss /*
1127 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1128 1.3 augustss */
1129 1.3 augustss void
1130 1.3 augustss ohci_rem_ed(sed, head)
1131 1.3 augustss ohci_soft_ed_t *sed;
1132 1.3 augustss ohci_soft_ed_t *head;
1133 1.3 augustss {
1134 1.3 augustss ohci_soft_ed_t *p;
1135 1.3 augustss
1136 1.3 augustss /* XXX */
1137 1.3 augustss for (p = head; p && p->next != sed; p = p->next)
1138 1.3 augustss ;
1139 1.3 augustss if (!p)
1140 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1141 1.3 augustss p->next = sed->next;
1142 1.3 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
1143 1.3 augustss }
1144 1.3 augustss
1145 1.3 augustss /*
1146 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1147 1.1 augustss * the host controller. This queue is the processed by software.
1148 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1149 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1150 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1151 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1152 1.1 augustss * hash value.
1153 1.1 augustss */
1154 1.1 augustss
1155 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1156 1.1 augustss /* Called at splusb() */
1157 1.1 augustss void
1158 1.1 augustss ohci_hash_add_td(sc, std)
1159 1.1 augustss ohci_softc_t *sc;
1160 1.1 augustss ohci_soft_td_t *std;
1161 1.1 augustss {
1162 1.1 augustss int h = HASH(std->physaddr);
1163 1.1 augustss
1164 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1165 1.1 augustss }
1166 1.1 augustss
1167 1.1 augustss /* Called at splusb() */
1168 1.1 augustss void
1169 1.1 augustss ohci_hash_rem_td(sc, std)
1170 1.1 augustss ohci_softc_t *sc;
1171 1.1 augustss ohci_soft_td_t *std;
1172 1.1 augustss {
1173 1.1 augustss LIST_REMOVE(std, hnext);
1174 1.1 augustss }
1175 1.1 augustss
1176 1.1 augustss ohci_soft_td_t *
1177 1.1 augustss ohci_hash_find_td(sc, a)
1178 1.1 augustss ohci_softc_t *sc;
1179 1.1 augustss ohci_physaddr_t a;
1180 1.1 augustss {
1181 1.1 augustss int h = HASH(a);
1182 1.1 augustss ohci_soft_td_t *std;
1183 1.1 augustss
1184 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1185 1.1 augustss std != 0;
1186 1.1 augustss std = LIST_NEXT(std, hnext))
1187 1.1 augustss if (std->physaddr == a)
1188 1.1 augustss return (std);
1189 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1190 1.1 augustss }
1191 1.1 augustss
1192 1.1 augustss void
1193 1.1 augustss ohci_timeout(addr)
1194 1.1 augustss void *addr;
1195 1.1 augustss {
1196 1.1 augustss #if 0
1197 1.1 augustss usbd_request_handle *reqh = addr;
1198 1.1 augustss int s;
1199 1.1 augustss
1200 1.1 augustss DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1201 1.1 augustss s = splusb();
1202 1.1 augustss /* XXX need to inactivate TD before calling interrupt routine */
1203 1.1 augustss ohci_XXX_done(reqh);
1204 1.1 augustss splx(s);
1205 1.1 augustss #endif
1206 1.1 augustss }
1207 1.1 augustss
1208 1.1 augustss #ifdef USB_DEBUG
1209 1.1 augustss void
1210 1.1 augustss ohci_dump_tds(std)
1211 1.1 augustss ohci_soft_td_t *std;
1212 1.1 augustss {
1213 1.1 augustss for (; std; std = std->nexttd)
1214 1.1 augustss ohci_dump_td(std);
1215 1.1 augustss }
1216 1.1 augustss
1217 1.1 augustss void
1218 1.1 augustss ohci_dump_td(std)
1219 1.1 augustss ohci_soft_td_t *std;
1220 1.1 augustss {
1221 1.14 augustss printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1222 1.14 augustss "nexttd=0x%08lx be=0x%08lx\n",
1223 1.1 augustss std, (u_long)std->physaddr,
1224 1.16 augustss (u_long)LE(std->td->td_flags),
1225 1.1 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1226 1.16 augustss OHCI_TD_GET_DI(LE(std->td->td_flags)),
1227 1.16 augustss OHCI_TD_GET_EC(LE(std->td->td_flags)),
1228 1.16 augustss OHCI_TD_GET_CC(LE(std->td->td_flags)),
1229 1.16 augustss (u_long)LE(std->td->td_cbp),
1230 1.16 augustss (u_long)LE(std->td->td_nexttd), (u_long)LE(std->td->td_be));
1231 1.1 augustss }
1232 1.1 augustss
1233 1.1 augustss void
1234 1.1 augustss ohci_dump_ed(sed)
1235 1.1 augustss ohci_soft_ed_t *sed;
1236 1.1 augustss {
1237 1.14 augustss printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1238 1.14 augustss "headp=%b nexted=0x%08lx\n",
1239 1.1 augustss sed, (u_long)sed->physaddr,
1240 1.16 augustss OHCI_ED_GET_FA(LE(sed->ed->ed_flags)),
1241 1.16 augustss OHCI_ED_GET_EN(LE(sed->ed->ed_flags)),
1242 1.16 augustss OHCI_ED_GET_MAXP(LE(sed->ed->ed_flags)),
1243 1.16 augustss (u_long)LE(sed->ed->ed_flags),
1244 1.26 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1245 1.16 augustss (u_long)LE(sed->ed->ed_tailp),
1246 1.16 augustss (u_long)LE(sed->ed->ed_headp), "\20\1HALT\2CARRY",
1247 1.16 augustss (u_long)LE(sed->ed->ed_nexted));
1248 1.1 augustss }
1249 1.1 augustss #endif
1250 1.1 augustss
1251 1.1 augustss usbd_status
1252 1.1 augustss ohci_open(pipe)
1253 1.1 augustss usbd_pipe_handle pipe;
1254 1.1 augustss {
1255 1.1 augustss usbd_device_handle dev = pipe->device;
1256 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1257 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1258 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1259 1.1 augustss u_int8_t addr = dev->address;
1260 1.1 augustss ohci_soft_ed_t *sed;
1261 1.1 augustss ohci_soft_td_t *std;
1262 1.1 augustss usbd_status r;
1263 1.1 augustss int s;
1264 1.1 augustss
1265 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1266 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1267 1.1 augustss if (addr == sc->sc_addr) {
1268 1.1 augustss switch (ed->bEndpointAddress) {
1269 1.1 augustss case USB_CONTROL_ENDPOINT:
1270 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1271 1.1 augustss break;
1272 1.1 augustss case UE_IN | OHCI_INTR_ENDPT:
1273 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1274 1.1 augustss break;
1275 1.1 augustss default:
1276 1.1 augustss return (USBD_INVAL);
1277 1.1 augustss }
1278 1.1 augustss } else {
1279 1.1 augustss sed = ohci_alloc_sed(sc);
1280 1.1 augustss if (sed == 0)
1281 1.1 augustss goto bad0;
1282 1.1 augustss std = ohci_alloc_std(sc);
1283 1.1 augustss if (std == 0)
1284 1.1 augustss goto bad1;
1285 1.1 augustss opipe->sed = sed;
1286 1.1 augustss opipe->tail = std;
1287 1.16 augustss sed->ed->ed_flags = LE(
1288 1.1 augustss OHCI_ED_SET_FA(addr) |
1289 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1290 1.1 augustss OHCI_ED_DIR_TD |
1291 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1292 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1293 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1294 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1295 1.16 augustss sed->ed->ed_headp = sed->ed->ed_tailp = LE(std->physaddr);
1296 1.1 augustss
1297 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1298 1.1 augustss case UE_CONTROL:
1299 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1300 1.4 augustss r = usb_allocmem(sc->sc_dmatag,
1301 1.4 augustss sizeof(usb_device_request_t),
1302 1.4 augustss 0, &opipe->u.ctl.reqdma);
1303 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1304 1.1 augustss goto bad;
1305 1.1 augustss s = splusb();
1306 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1307 1.1 augustss splx(s);
1308 1.1 augustss break;
1309 1.1 augustss case UE_INTERRUPT:
1310 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1311 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1312 1.1 augustss case UE_ISOCHRONOUS:
1313 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1314 1.1 augustss return (USBD_XXX);
1315 1.1 augustss case UE_BULK:
1316 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1317 1.3 augustss s = splusb();
1318 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1319 1.3 augustss splx(s);
1320 1.3 augustss break;
1321 1.1 augustss }
1322 1.1 augustss }
1323 1.1 augustss return (USBD_NORMAL_COMPLETION);
1324 1.1 augustss
1325 1.1 augustss bad:
1326 1.1 augustss ohci_free_std(sc, std);
1327 1.1 augustss bad1:
1328 1.1 augustss ohci_free_sed(sc, sed);
1329 1.1 augustss bad0:
1330 1.1 augustss return (USBD_NOMEM);
1331 1.1 augustss
1332 1.1 augustss }
1333 1.1 augustss
1334 1.1 augustss /*
1335 1.1 augustss * Data structures and routines to emulate the root hub.
1336 1.1 augustss */
1337 1.1 augustss usb_device_descriptor_t ohci_devd = {
1338 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1339 1.1 augustss UDESC_DEVICE, /* type */
1340 1.1 augustss {0x00, 0x01}, /* USB version */
1341 1.1 augustss UCLASS_HUB, /* class */
1342 1.1 augustss USUBCLASS_HUB, /* subclass */
1343 1.1 augustss 0, /* protocol */
1344 1.1 augustss 64, /* max packet */
1345 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1346 1.1 augustss 1,2,0, /* string indicies */
1347 1.1 augustss 1 /* # of configurations */
1348 1.1 augustss };
1349 1.1 augustss
1350 1.1 augustss usb_config_descriptor_t ohci_confd = {
1351 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1352 1.1 augustss UDESC_CONFIG,
1353 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1354 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1355 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1356 1.1 augustss 1,
1357 1.1 augustss 1,
1358 1.1 augustss 0,
1359 1.1 augustss UC_SELF_POWERED,
1360 1.1 augustss 0 /* max power */
1361 1.1 augustss };
1362 1.1 augustss
1363 1.1 augustss usb_interface_descriptor_t ohci_ifcd = {
1364 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1365 1.1 augustss UDESC_INTERFACE,
1366 1.1 augustss 0,
1367 1.1 augustss 0,
1368 1.1 augustss 1,
1369 1.1 augustss UCLASS_HUB,
1370 1.1 augustss USUBCLASS_HUB,
1371 1.1 augustss 0,
1372 1.1 augustss 0
1373 1.1 augustss };
1374 1.1 augustss
1375 1.1 augustss usb_endpoint_descriptor_t ohci_endpd = {
1376 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1377 1.1 augustss UDESC_ENDPOINT,
1378 1.1 augustss UE_IN | OHCI_INTR_ENDPT,
1379 1.1 augustss UE_INTERRUPT,
1380 1.1 augustss {8, 0}, /* max packet */
1381 1.1 augustss 255
1382 1.1 augustss };
1383 1.1 augustss
1384 1.1 augustss usb_hub_descriptor_t ohci_hubd = {
1385 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1386 1.1 augustss UDESC_HUB,
1387 1.1 augustss 0,
1388 1.1 augustss {0,0},
1389 1.1 augustss 0,
1390 1.1 augustss 0,
1391 1.1 augustss {0},
1392 1.1 augustss };
1393 1.1 augustss
1394 1.1 augustss int
1395 1.1 augustss ohci_str(p, l, s)
1396 1.1 augustss usb_string_descriptor_t *p;
1397 1.1 augustss int l;
1398 1.1 augustss char *s;
1399 1.1 augustss {
1400 1.1 augustss int i;
1401 1.1 augustss
1402 1.1 augustss if (l == 0)
1403 1.1 augustss return (0);
1404 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1405 1.1 augustss if (l == 1)
1406 1.1 augustss return (1);
1407 1.1 augustss p->bDescriptorType = UDESC_STRING;
1408 1.1 augustss l -= 2;
1409 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1410 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1411 1.1 augustss return (2*i+2);
1412 1.1 augustss }
1413 1.1 augustss
1414 1.1 augustss /*
1415 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1416 1.1 augustss */
1417 1.1 augustss usbd_status
1418 1.1 augustss ohci_root_ctrl_transfer(reqh)
1419 1.1 augustss usbd_request_handle reqh;
1420 1.1 augustss {
1421 1.17 augustss int s;
1422 1.17 augustss usbd_status r;
1423 1.17 augustss
1424 1.17 augustss s = splusb();
1425 1.17 augustss r = usb_insert_transfer(reqh);
1426 1.17 augustss splx(s);
1427 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1428 1.17 augustss return (r);
1429 1.17 augustss else
1430 1.17 augustss return (ohci_root_ctrl_start(reqh));
1431 1.17 augustss }
1432 1.17 augustss
1433 1.17 augustss usbd_status
1434 1.17 augustss ohci_root_ctrl_start(reqh)
1435 1.17 augustss usbd_request_handle reqh;
1436 1.17 augustss {
1437 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1438 1.1 augustss usb_device_request_t *req;
1439 1.1 augustss void *buf;
1440 1.1 augustss int port, i;
1441 1.1 augustss int len, value, index, l, totlen = 0;
1442 1.1 augustss usb_port_status_t ps;
1443 1.1 augustss usb_hub_descriptor_t hubd;
1444 1.1 augustss usbd_status r;
1445 1.1 augustss u_int32_t v;
1446 1.1 augustss
1447 1.1 augustss if (!reqh->isreq)
1448 1.1 augustss /* XXX panic */
1449 1.1 augustss return (USBD_INVAL);
1450 1.1 augustss req = &reqh->request;
1451 1.1 augustss buf = reqh->buffer;
1452 1.1 augustss
1453 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1454 1.1 augustss req->bmRequestType, req->bRequest));
1455 1.1 augustss
1456 1.1 augustss len = UGETW(req->wLength);
1457 1.1 augustss value = UGETW(req->wValue);
1458 1.1 augustss index = UGETW(req->wIndex);
1459 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1460 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1461 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1462 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1463 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1464 1.1 augustss /*
1465 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1466 1.1 augustss * for the integrated root hub.
1467 1.1 augustss */
1468 1.1 augustss break;
1469 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1470 1.1 augustss if (len > 0) {
1471 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1472 1.1 augustss totlen = 1;
1473 1.1 augustss }
1474 1.1 augustss break;
1475 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1476 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1477 1.1 augustss switch(value >> 8) {
1478 1.1 augustss case UDESC_DEVICE:
1479 1.1 augustss if ((value & 0xff) != 0) {
1480 1.1 augustss r = USBD_IOERROR;
1481 1.1 augustss goto ret;
1482 1.1 augustss }
1483 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1484 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1485 1.1 augustss memcpy(buf, &ohci_devd, l);
1486 1.1 augustss break;
1487 1.1 augustss case UDESC_CONFIG:
1488 1.1 augustss if ((value & 0xff) != 0) {
1489 1.1 augustss r = USBD_IOERROR;
1490 1.1 augustss goto ret;
1491 1.1 augustss }
1492 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1493 1.1 augustss memcpy(buf, &ohci_confd, l);
1494 1.1 augustss buf = (char *)buf + l;
1495 1.1 augustss len -= l;
1496 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1497 1.1 augustss totlen += l;
1498 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1499 1.1 augustss buf = (char *)buf + l;
1500 1.1 augustss len -= l;
1501 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1502 1.1 augustss totlen += l;
1503 1.1 augustss memcpy(buf, &ohci_endpd, l);
1504 1.1 augustss break;
1505 1.1 augustss case UDESC_STRING:
1506 1.1 augustss if (len == 0)
1507 1.1 augustss break;
1508 1.1 augustss *(u_int8_t *)buf = 0;
1509 1.1 augustss totlen = 1;
1510 1.1 augustss switch (value & 0xff) {
1511 1.1 augustss case 1: /* Vendor */
1512 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1513 1.1 augustss break;
1514 1.1 augustss case 2: /* Product */
1515 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1516 1.1 augustss break;
1517 1.1 augustss }
1518 1.1 augustss break;
1519 1.1 augustss default:
1520 1.1 augustss r = USBD_IOERROR;
1521 1.1 augustss goto ret;
1522 1.1 augustss }
1523 1.1 augustss break;
1524 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1525 1.1 augustss if (len > 0) {
1526 1.1 augustss *(u_int8_t *)buf = 0;
1527 1.1 augustss totlen = 1;
1528 1.1 augustss }
1529 1.1 augustss break;
1530 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1531 1.1 augustss if (len > 1) {
1532 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1533 1.1 augustss totlen = 2;
1534 1.1 augustss }
1535 1.1 augustss break;
1536 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1537 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1538 1.1 augustss if (len > 1) {
1539 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1540 1.1 augustss totlen = 2;
1541 1.1 augustss }
1542 1.1 augustss break;
1543 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1544 1.1 augustss if (value >= USB_MAX_DEVICES) {
1545 1.1 augustss r = USBD_IOERROR;
1546 1.1 augustss goto ret;
1547 1.1 augustss }
1548 1.1 augustss sc->sc_addr = value;
1549 1.1 augustss break;
1550 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1551 1.1 augustss if (value != 0 && value != 1) {
1552 1.1 augustss r = USBD_IOERROR;
1553 1.1 augustss goto ret;
1554 1.1 augustss }
1555 1.1 augustss sc->sc_conf = value;
1556 1.1 augustss break;
1557 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1558 1.1 augustss break;
1559 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1560 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1561 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1562 1.1 augustss r = USBD_IOERROR;
1563 1.1 augustss goto ret;
1564 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1565 1.1 augustss break;
1566 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1567 1.1 augustss break;
1568 1.1 augustss /* Hub requests */
1569 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1570 1.1 augustss break;
1571 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1572 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1573 1.14 augustss "port=%d feature=%d\n",
1574 1.1 augustss index, value));
1575 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1576 1.1 augustss r = USBD_IOERROR;
1577 1.1 augustss goto ret;
1578 1.1 augustss }
1579 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1580 1.1 augustss switch(value) {
1581 1.1 augustss case UHF_PORT_ENABLE:
1582 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1583 1.1 augustss break;
1584 1.1 augustss case UHF_PORT_SUSPEND:
1585 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1586 1.1 augustss break;
1587 1.1 augustss case UHF_PORT_POWER:
1588 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1589 1.1 augustss break;
1590 1.1 augustss case UHF_C_PORT_CONNECTION:
1591 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1592 1.1 augustss break;
1593 1.1 augustss case UHF_C_PORT_ENABLE:
1594 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1595 1.1 augustss break;
1596 1.1 augustss case UHF_C_PORT_SUSPEND:
1597 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1598 1.1 augustss break;
1599 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1600 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1601 1.1 augustss break;
1602 1.1 augustss case UHF_C_PORT_RESET:
1603 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1604 1.1 augustss break;
1605 1.1 augustss default:
1606 1.1 augustss r = USBD_IOERROR;
1607 1.1 augustss goto ret;
1608 1.1 augustss }
1609 1.1 augustss switch(value) {
1610 1.1 augustss case UHF_C_PORT_CONNECTION:
1611 1.1 augustss case UHF_C_PORT_ENABLE:
1612 1.1 augustss case UHF_C_PORT_SUSPEND:
1613 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1614 1.1 augustss case UHF_C_PORT_RESET:
1615 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1616 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1617 1.1 augustss ohci_rhsc_able(sc, 1);
1618 1.1 augustss break;
1619 1.1 augustss default:
1620 1.1 augustss break;
1621 1.1 augustss }
1622 1.1 augustss break;
1623 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1624 1.1 augustss if (value != 0) {
1625 1.1 augustss r = USBD_IOERROR;
1626 1.1 augustss goto ret;
1627 1.1 augustss }
1628 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1629 1.1 augustss hubd = ohci_hubd;
1630 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1631 1.15 augustss USETW(hubd.wHubCharacteristics,
1632 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1633 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1634 1.1 augustss /* XXX overcurrent */
1635 1.1 augustss );
1636 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1637 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1638 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1639 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
1640 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1641 1.1 augustss l = min(len, hubd.bDescLength);
1642 1.1 augustss totlen = l;
1643 1.1 augustss memcpy(buf, &hubd, l);
1644 1.1 augustss break;
1645 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1646 1.1 augustss if (len != 4) {
1647 1.1 augustss r = USBD_IOERROR;
1648 1.1 augustss goto ret;
1649 1.1 augustss }
1650 1.1 augustss memset(buf, 0, len); /* ? XXX */
1651 1.1 augustss totlen = len;
1652 1.1 augustss break;
1653 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1654 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1655 1.1 augustss index));
1656 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1657 1.1 augustss r = USBD_IOERROR;
1658 1.1 augustss goto ret;
1659 1.1 augustss }
1660 1.1 augustss if (len != 4) {
1661 1.1 augustss r = USBD_IOERROR;
1662 1.1 augustss goto ret;
1663 1.1 augustss }
1664 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1665 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1666 1.1 augustss v));
1667 1.1 augustss USETW(ps.wPortStatus, v);
1668 1.1 augustss USETW(ps.wPortChange, v >> 16);
1669 1.1 augustss l = min(len, sizeof ps);
1670 1.1 augustss memcpy(buf, &ps, l);
1671 1.1 augustss totlen = l;
1672 1.1 augustss break;
1673 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1674 1.1 augustss r = USBD_IOERROR;
1675 1.1 augustss goto ret;
1676 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1677 1.1 augustss break;
1678 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1679 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1680 1.1 augustss r = USBD_IOERROR;
1681 1.1 augustss goto ret;
1682 1.1 augustss }
1683 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1684 1.1 augustss switch(value) {
1685 1.1 augustss case UHF_PORT_ENABLE:
1686 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
1687 1.1 augustss break;
1688 1.1 augustss case UHF_PORT_SUSPEND:
1689 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
1690 1.1 augustss break;
1691 1.1 augustss case UHF_PORT_RESET:
1692 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
1693 1.14 augustss index));
1694 1.1 augustss OWRITE4(sc, port, UPS_RESET);
1695 1.1 augustss for (i = 0; i < 10; i++) {
1696 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
1697 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
1698 1.1 augustss break;
1699 1.1 augustss }
1700 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1701 1.1 augustss index, OREAD4(sc, port)));
1702 1.1 augustss break;
1703 1.1 augustss case UHF_PORT_POWER:
1704 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
1705 1.14 augustss "%d\n", index));
1706 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
1707 1.1 augustss break;
1708 1.1 augustss default:
1709 1.1 augustss r = USBD_IOERROR;
1710 1.1 augustss goto ret;
1711 1.1 augustss }
1712 1.1 augustss break;
1713 1.1 augustss default:
1714 1.1 augustss r = USBD_IOERROR;
1715 1.1 augustss goto ret;
1716 1.1 augustss }
1717 1.1 augustss reqh->actlen = totlen;
1718 1.1 augustss r = USBD_NORMAL_COMPLETION;
1719 1.1 augustss ret:
1720 1.1 augustss reqh->status = r;
1721 1.1 augustss reqh->xfercb(reqh);
1722 1.17 augustss usb_start_next(reqh->pipe);
1723 1.1 augustss return (USBD_IN_PROGRESS);
1724 1.1 augustss }
1725 1.1 augustss
1726 1.1 augustss /* Abort a root control request. */
1727 1.1 augustss void
1728 1.1 augustss ohci_root_ctrl_abort(reqh)
1729 1.1 augustss usbd_request_handle reqh;
1730 1.1 augustss {
1731 1.9 augustss /* Nothing to do, all transfers are synchronous. */
1732 1.1 augustss }
1733 1.1 augustss
1734 1.1 augustss /* Close the root pipe. */
1735 1.1 augustss void
1736 1.1 augustss ohci_root_ctrl_close(pipe)
1737 1.1 augustss usbd_pipe_handle pipe;
1738 1.1 augustss {
1739 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
1740 1.1 augustss }
1741 1.1 augustss
1742 1.1 augustss usbd_status
1743 1.1 augustss ohci_root_intr_transfer(reqh)
1744 1.1 augustss usbd_request_handle reqh;
1745 1.1 augustss {
1746 1.17 augustss int s;
1747 1.17 augustss usbd_status r;
1748 1.17 augustss
1749 1.17 augustss s = splusb();
1750 1.17 augustss r = usb_insert_transfer(reqh);
1751 1.17 augustss splx(s);
1752 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1753 1.17 augustss return (r);
1754 1.17 augustss else
1755 1.17 augustss return (ohci_root_intr_start(reqh));
1756 1.17 augustss }
1757 1.17 augustss
1758 1.17 augustss usbd_status
1759 1.17 augustss ohci_root_intr_start(reqh)
1760 1.17 augustss usbd_request_handle reqh;
1761 1.17 augustss {
1762 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
1763 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1764 1.1 augustss struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
1765 1.4 augustss usb_dma_t *dmap;
1766 1.1 augustss usbd_status r;
1767 1.1 augustss int len;
1768 1.1 augustss
1769 1.1 augustss len = reqh->length;
1770 1.1 augustss dmap = &upipe->u.intr.datadma;
1771 1.1 augustss if (len == 0)
1772 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
1773 1.1 augustss
1774 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1775 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1776 1.1 augustss return (r);
1777 1.1 augustss sc->sc_intrreqh = reqh;
1778 1.1 augustss
1779 1.1 augustss return (USBD_IN_PROGRESS);
1780 1.1 augustss }
1781 1.1 augustss
1782 1.3 augustss /* Abort a root interrupt request. */
1783 1.1 augustss void
1784 1.1 augustss ohci_root_intr_abort(reqh)
1785 1.1 augustss usbd_request_handle reqh;
1786 1.1 augustss {
1787 1.3 augustss /* No need to abort. */
1788 1.1 augustss }
1789 1.1 augustss
1790 1.1 augustss /* Close the root pipe. */
1791 1.1 augustss void
1792 1.1 augustss ohci_root_intr_close(pipe)
1793 1.1 augustss usbd_pipe_handle pipe;
1794 1.1 augustss {
1795 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1796 1.23 augustss sc->sc_intrreqh = 0;
1797 1.1 augustss
1798 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
1799 1.1 augustss }
1800 1.1 augustss
1801 1.1 augustss /************************/
1802 1.1 augustss
1803 1.1 augustss usbd_status
1804 1.1 augustss ohci_device_ctrl_transfer(reqh)
1805 1.1 augustss usbd_request_handle reqh;
1806 1.1 augustss {
1807 1.17 augustss int s;
1808 1.17 augustss usbd_status r;
1809 1.17 augustss
1810 1.17 augustss s = splusb();
1811 1.17 augustss r = usb_insert_transfer(reqh);
1812 1.17 augustss splx(s);
1813 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1814 1.17 augustss return (r);
1815 1.17 augustss else
1816 1.17 augustss return (ohci_device_ctrl_start(reqh));
1817 1.17 augustss }
1818 1.17 augustss
1819 1.17 augustss usbd_status
1820 1.17 augustss ohci_device_ctrl_start(reqh)
1821 1.17 augustss usbd_request_handle reqh;
1822 1.17 augustss {
1823 1.6 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1824 1.1 augustss usbd_status r;
1825 1.1 augustss
1826 1.1 augustss if (!reqh->isreq) {
1827 1.1 augustss /* XXX panic */
1828 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
1829 1.1 augustss return (USBD_INVAL);
1830 1.1 augustss }
1831 1.1 augustss
1832 1.1 augustss r = ohci_device_request(reqh);
1833 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1834 1.1 augustss return (r);
1835 1.1 augustss
1836 1.6 augustss if (sc->sc_bus.use_polling)
1837 1.6 augustss ohci_waitintr(sc, reqh);
1838 1.1 augustss return (USBD_IN_PROGRESS);
1839 1.1 augustss }
1840 1.1 augustss
1841 1.1 augustss /* Abort a device control request. */
1842 1.1 augustss void
1843 1.1 augustss ohci_device_ctrl_abort(reqh)
1844 1.1 augustss usbd_request_handle reqh;
1845 1.1 augustss {
1846 1.23 augustss /* XXX inactivate */
1847 1.23 augustss usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is donw */
1848 1.23 augustss /* XXX call done */
1849 1.1 augustss }
1850 1.1 augustss
1851 1.1 augustss /* Close a device control pipe. */
1852 1.1 augustss void
1853 1.1 augustss ohci_device_ctrl_close(pipe)
1854 1.1 augustss usbd_pipe_handle pipe;
1855 1.1 augustss {
1856 1.23 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1857 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1858 1.23 augustss ohci_soft_ed_t *sed = opipe->sed;
1859 1.23 augustss int s;
1860 1.1 augustss
1861 1.23 augustss s = splusb();
1862 1.23 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
1863 1.23 augustss if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp))
1864 1.23 augustss usb_delay_ms(&sc->sc_bus, 2);
1865 1.23 augustss ohci_rem_ed(sed, sc->sc_ctrl_head);
1866 1.23 augustss splx(s);
1867 1.23 augustss ohci_free_std(sc, opipe->tail);
1868 1.23 augustss ohci_free_sed(sc, opipe->sed);
1869 1.23 augustss /* XXX free other resources */
1870 1.3 augustss }
1871 1.3 augustss
1872 1.3 augustss /************************/
1873 1.3 augustss
1874 1.3 augustss usbd_status
1875 1.3 augustss ohci_device_bulk_transfer(reqh)
1876 1.3 augustss usbd_request_handle reqh;
1877 1.3 augustss {
1878 1.17 augustss int s;
1879 1.17 augustss usbd_status r;
1880 1.17 augustss
1881 1.17 augustss s = splusb();
1882 1.17 augustss r = usb_insert_transfer(reqh);
1883 1.17 augustss splx(s);
1884 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1885 1.17 augustss return (r);
1886 1.17 augustss else
1887 1.17 augustss return (ohci_device_bulk_start(reqh));
1888 1.17 augustss }
1889 1.17 augustss
1890 1.17 augustss usbd_status
1891 1.17 augustss ohci_device_bulk_start(reqh)
1892 1.17 augustss usbd_request_handle reqh;
1893 1.17 augustss {
1894 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1895 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
1896 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1897 1.3 augustss int addr = dev->address;
1898 1.3 augustss ohci_soft_td_t *xfer, *tail;
1899 1.3 augustss ohci_soft_ed_t *sed;
1900 1.4 augustss usb_dma_t *dmap;
1901 1.3 augustss usbd_status r;
1902 1.3 augustss int s, len, isread;
1903 1.3 augustss
1904 1.3 augustss if (reqh->isreq) {
1905 1.3 augustss /* XXX panic */
1906 1.23 augustss printf("ohci_device_bulk_transfer: a request\n");
1907 1.3 augustss return (USBD_INVAL);
1908 1.3 augustss }
1909 1.3 augustss
1910 1.3 augustss len = reqh->length;
1911 1.3 augustss dmap = &opipe->u.bulk.datadma;
1912 1.3 augustss isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1913 1.3 augustss sed = opipe->sed;
1914 1.3 augustss
1915 1.3 augustss opipe->u.bulk.length = len;
1916 1.3 augustss
1917 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1918 1.3 augustss if (r != USBD_NORMAL_COMPLETION)
1919 1.3 augustss goto ret1;
1920 1.3 augustss
1921 1.3 augustss tail = ohci_alloc_std(sc);
1922 1.3 augustss if (!tail) {
1923 1.3 augustss r = USBD_NOMEM;
1924 1.3 augustss goto ret2;
1925 1.3 augustss }
1926 1.3 augustss tail->reqh = 0;
1927 1.3 augustss
1928 1.3 augustss /* Update device address */
1929 1.16 augustss sed->ed->ed_flags = LE(
1930 1.16 augustss (LE(sed->ed->ed_flags) & ~OHCI_ED_ADDRMASK) |
1931 1.16 augustss OHCI_ED_SET_FA(addr));
1932 1.3 augustss
1933 1.3 augustss /* Set up data transaction */
1934 1.3 augustss xfer = opipe->tail;
1935 1.16 augustss xfer->td->td_flags = LE(
1936 1.3 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1937 1.19 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY |
1938 1.19 augustss (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1939 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dmap));
1940 1.3 augustss xfer->nexttd = tail;
1941 1.16 augustss xfer->td->td_nexttd = LE(tail->physaddr);
1942 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
1943 1.3 augustss xfer->len = len;
1944 1.3 augustss xfer->reqh = reqh;
1945 1.23 augustss
1946 1.3 augustss reqh->hcpriv = xfer;
1947 1.3 augustss
1948 1.3 augustss if (!isread)
1949 1.3 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1950 1.3 augustss
1951 1.3 augustss /* Insert ED in schedule */
1952 1.3 augustss s = splusb();
1953 1.3 augustss ohci_hash_add_td(sc, xfer);
1954 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
1955 1.3 augustss opipe->tail = tail;
1956 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1957 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1958 1.15 augustss usb_timeout(ohci_timeout, reqh,
1959 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1960 1.15 augustss }
1961 1.3 augustss splx(s);
1962 1.3 augustss
1963 1.3 augustss return (USBD_IN_PROGRESS);
1964 1.3 augustss
1965 1.3 augustss ret2:
1966 1.4 augustss usb_freemem(sc->sc_dmatag, dmap);
1967 1.3 augustss ret1:
1968 1.3 augustss return (r);
1969 1.3 augustss }
1970 1.3 augustss
1971 1.23 augustss /* Abort a device bulk request. */
1972 1.3 augustss void
1973 1.3 augustss ohci_device_bulk_abort(reqh)
1974 1.3 augustss usbd_request_handle reqh;
1975 1.3 augustss {
1976 1.23 augustss #if 0
1977 1.23 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
1978 1.23 augustss if ((LE(sed->ed->ed_tailp) & OHCI_TAILMASK) != LE(sed->ed->ed_headp))
1979 1.23 augustss usb_delay_ms(reqh->pipe->device->bus, 2);
1980 1.23 augustss #endif
1981 1.23 augustss /* XXX inactivate */
1982 1.23 augustss usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
1983 1.23 augustss /* XXX call done */
1984 1.3 augustss }
1985 1.3 augustss
1986 1.23 augustss /* Close a device bulk pipe. */
1987 1.3 augustss void
1988 1.3 augustss ohci_device_bulk_close(pipe)
1989 1.3 augustss usbd_pipe_handle pipe;
1990 1.3 augustss {
1991 1.23 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1992 1.23 augustss usbd_device_handle dev = opipe->pipe.device;
1993 1.23 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1994 1.23 augustss int s;
1995 1.3 augustss
1996 1.23 augustss s = splusb();
1997 1.23 augustss ohci_rem_ed(opipe->sed, sc->sc_bulk_head);
1998 1.23 augustss splx(s);
1999 1.23 augustss ohci_free_std(sc, opipe->tail);
2000 1.23 augustss ohci_free_sed(sc, opipe->sed);
2001 1.23 augustss /* XXX free other resources */
2002 1.1 augustss }
2003 1.1 augustss
2004 1.1 augustss /************************/
2005 1.1 augustss
2006 1.1 augustss usbd_status
2007 1.1 augustss ohci_device_intr_transfer(reqh)
2008 1.17 augustss usbd_request_handle reqh;
2009 1.17 augustss {
2010 1.17 augustss int s;
2011 1.17 augustss usbd_status r;
2012 1.17 augustss
2013 1.17 augustss s = splusb();
2014 1.17 augustss r = usb_insert_transfer(reqh);
2015 1.17 augustss splx(s);
2016 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2017 1.17 augustss return (r);
2018 1.17 augustss else
2019 1.17 augustss return (ohci_device_intr_start(reqh));
2020 1.17 augustss }
2021 1.17 augustss
2022 1.17 augustss usbd_status
2023 1.17 augustss ohci_device_intr_start(reqh)
2024 1.1 augustss usbd_request_handle reqh;
2025 1.1 augustss {
2026 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2027 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2028 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2029 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2030 1.1 augustss ohci_soft_td_t *xfer, *tail;
2031 1.4 augustss usb_dma_t *dmap;
2032 1.1 augustss usbd_status r;
2033 1.1 augustss int len;
2034 1.1 augustss int s;
2035 1.1 augustss
2036 1.14 augustss DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d "
2037 1.14 augustss "flags=%d priv=%p\n",
2038 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
2039 1.1 augustss
2040 1.1 augustss if (reqh->isreq)
2041 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2042 1.1 augustss
2043 1.1 augustss len = reqh->length;
2044 1.1 augustss dmap = &opipe->u.intr.datadma;
2045 1.1 augustss if (len == 0)
2046 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
2047 1.1 augustss
2048 1.1 augustss xfer = opipe->tail;
2049 1.1 augustss tail = ohci_alloc_std(sc);
2050 1.1 augustss if (!tail) {
2051 1.1 augustss r = USBD_NOMEM;
2052 1.1 augustss goto ret1;
2053 1.1 augustss }
2054 1.1 augustss tail->reqh = 0;
2055 1.1 augustss
2056 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
2057 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
2058 1.1 augustss goto ret2;
2059 1.1 augustss
2060 1.16 augustss xfer->td->td_flags = LE(
2061 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2062 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2063 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
2064 1.19 augustss xfer->td->td_flags |= LE(OHCI_TD_R);
2065 1.16 augustss xfer->td->td_cbp = LE(DMAADDR(dmap));
2066 1.1 augustss xfer->nexttd = tail;
2067 1.16 augustss xfer->td->td_nexttd = LE(tail->physaddr);
2068 1.16 augustss xfer->td->td_be = LE(LE(xfer->td->td_cbp) + len - 1);
2069 1.1 augustss xfer->len = len;
2070 1.1 augustss xfer->reqh = reqh;
2071 1.23 augustss
2072 1.1 augustss reqh->hcpriv = xfer;
2073 1.1 augustss
2074 1.1 augustss #if USB_DEBUG
2075 1.1 augustss if (ohcidebug > 5) {
2076 1.1 augustss printf("ohci_device_intr_transfer:\n");
2077 1.1 augustss ohci_dump_ed(sed);
2078 1.1 augustss ohci_dump_tds(xfer);
2079 1.1 augustss }
2080 1.1 augustss #endif
2081 1.1 augustss
2082 1.1 augustss /* Insert ED in schedule */
2083 1.1 augustss s = splusb();
2084 1.1 augustss ohci_hash_add_td(sc, xfer);
2085 1.16 augustss sed->ed->ed_tailp = LE(tail->physaddr);
2086 1.1 augustss opipe->tail = tail;
2087 1.1 augustss #if 0
2088 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
2089 1.15 augustss usb_timeout(ohci_timeout, reqh,
2090 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2091 1.15 augustss }
2092 1.1 augustss #endif
2093 1.16 augustss sed->ed->ed_flags &= LE(~OHCI_ED_SKIP);
2094 1.1 augustss
2095 1.1 augustss #ifdef USB_DEBUG
2096 1.1 augustss if (ohcidebug > 5) {
2097 1.1 augustss delay(5000);
2098 1.1 augustss printf("ohci_device_intr_transfer: status=%x\n",
2099 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
2100 1.1 augustss ohci_dump_ed(sed);
2101 1.1 augustss ohci_dump_tds(xfer);
2102 1.1 augustss }
2103 1.1 augustss #endif
2104 1.26 augustss splx(s);
2105 1.1 augustss
2106 1.1 augustss return (USBD_IN_PROGRESS);
2107 1.1 augustss
2108 1.1 augustss ret2:
2109 1.1 augustss ohci_free_std(sc, xfer);
2110 1.1 augustss ret1:
2111 1.1 augustss return (r);
2112 1.1 augustss }
2113 1.1 augustss
2114 1.1 augustss /* Abort a device control request. */
2115 1.1 augustss void
2116 1.1 augustss ohci_device_intr_abort(reqh)
2117 1.1 augustss usbd_request_handle reqh;
2118 1.1 augustss {
2119 1.23 augustss /* XXX inactivate */
2120 1.23 augustss usb_delay_ms(reqh->pipe->device->bus, 1); /* make sure it is done */
2121 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
2122 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2123 1.1 augustss reqh->pipe->intrreqh = 0;
2124 1.23 augustss ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh);
2125 1.1 augustss }
2126 1.1 augustss }
2127 1.1 augustss
2128 1.1 augustss /* Close a device interrupt pipe. */
2129 1.1 augustss void
2130 1.1 augustss ohci_device_intr_close(pipe)
2131 1.1 augustss usbd_pipe_handle pipe;
2132 1.1 augustss {
2133 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2134 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2135 1.1 augustss int nslots = opipe->u.intr.nslots;
2136 1.1 augustss int pos = opipe->u.intr.pos;
2137 1.1 augustss int j;
2138 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2139 1.1 augustss int s;
2140 1.1 augustss
2141 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2142 1.1 augustss pipe, nslots, pos));
2143 1.1 augustss s = splusb();
2144 1.16 augustss sed->ed->ed_flags |= LE(OHCI_ED_SKIP);
2145 1.23 augustss if ((sed->ed->ed_tailp & LE(OHCI_TAILMASK)) != sed->ed->ed_headp)
2146 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2147 1.1 augustss
2148 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2149 1.1 augustss ;
2150 1.1 augustss if (!p)
2151 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2152 1.1 augustss p->next = sed->next;
2153 1.1 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
2154 1.1 augustss splx(s);
2155 1.1 augustss
2156 1.1 augustss for (j = 0; j < nslots; j++)
2157 1.28 augustss --sc->sc_bws[(pos * nslots + j) & OHCI_NO_INTRS];
2158 1.1 augustss
2159 1.1 augustss ohci_free_std(sc, opipe->tail);
2160 1.1 augustss ohci_free_sed(sc, opipe->sed);
2161 1.23 augustss /* XXX free other resources */
2162 1.1 augustss }
2163 1.1 augustss
2164 1.1 augustss usbd_status
2165 1.1 augustss ohci_device_setintr(sc, opipe, ival)
2166 1.1 augustss ohci_softc_t *sc;
2167 1.1 augustss struct ohci_pipe *opipe;
2168 1.1 augustss int ival;
2169 1.1 augustss {
2170 1.1 augustss int i, j, s, best;
2171 1.1 augustss u_int npoll, slow, shigh, nslots;
2172 1.1 augustss u_int bestbw, bw;
2173 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2174 1.1 augustss
2175 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2176 1.1 augustss if (ival == 0) {
2177 1.1 augustss printf("ohci_setintr: 0 interval\n");
2178 1.1 augustss return (USBD_INVAL);
2179 1.1 augustss }
2180 1.1 augustss
2181 1.1 augustss npoll = OHCI_NO_INTRS;
2182 1.1 augustss while (npoll > ival)
2183 1.1 augustss npoll /= 2;
2184 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2185 1.1 augustss
2186 1.1 augustss /*
2187 1.1 augustss * We now know which level in the tree the ED must go into.
2188 1.1 augustss * Figure out which slot has most bandwidth left over.
2189 1.1 augustss * Slots to examine:
2190 1.1 augustss * npoll
2191 1.1 augustss * 1 0
2192 1.1 augustss * 2 1 2
2193 1.1 augustss * 4 3 4 5 6
2194 1.1 augustss * 8 7 8 9 10 11 12 13 14
2195 1.1 augustss * N (N-1) .. (N-1+N-1)
2196 1.1 augustss */
2197 1.1 augustss slow = npoll-1;
2198 1.1 augustss shigh = slow + npoll;
2199 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2200 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2201 1.1 augustss bw = 0;
2202 1.1 augustss for (j = 0; j < nslots; j++)
2203 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2204 1.1 augustss if (bw < bestbw) {
2205 1.1 augustss best = i;
2206 1.1 augustss bestbw = bw;
2207 1.1 augustss }
2208 1.1 augustss }
2209 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2210 1.1 augustss best, slow, shigh, bestbw));
2211 1.1 augustss
2212 1.1 augustss s = splusb();
2213 1.1 augustss hsed = sc->sc_eds[best];
2214 1.1 augustss sed->next = hsed->next;
2215 1.1 augustss sed->ed->ed_nexted = hsed->ed->ed_nexted;
2216 1.1 augustss hsed->next = sed;
2217 1.16 augustss hsed->ed->ed_nexted = LE(sed->physaddr);
2218 1.1 augustss splx(s);
2219 1.1 augustss
2220 1.1 augustss for (j = 0; j < nslots; j++)
2221 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2222 1.1 augustss opipe->u.intr.nslots = nslots;
2223 1.1 augustss opipe->u.intr.pos = best;
2224 1.1 augustss
2225 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2226 1.1 augustss return (USBD_NORMAL_COMPLETION);
2227 1.1 augustss }
2228 1.1 augustss
2229