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ohci.c revision 1.307
      1  1.307  jakllsch /*	$NetBSD: ohci.c,v 1.307 2020/05/19 19:09:43 jakllsch Exp $	*/
      2    1.1  augustss 
      3    1.1  augustss /*
      4  1.224       mrg  * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
      5    1.1  augustss  * All rights reserved.
      6    1.1  augustss  *
      7   1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8   1.89  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9  1.224       mrg  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10  1.224       mrg  * and Matthew R. Green (mrg (at) eterna.com.au).
     11  1.157   mycroft  * This code is derived from software contributed to The NetBSD Foundation
     12  1.157   mycroft  * by Charles M. Hannum.
     13    1.1  augustss  *
     14    1.1  augustss  * Redistribution and use in source and binary forms, with or without
     15    1.1  augustss  * modification, are permitted provided that the following conditions
     16    1.1  augustss  * are met:
     17    1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     18    1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     19    1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     20    1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     21    1.1  augustss  *    documentation and/or other materials provided with the distribution.
     22    1.1  augustss  *
     23    1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24    1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25    1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26    1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27    1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28    1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29    1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30    1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31    1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32    1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33    1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     34    1.1  augustss  */
     35    1.1  augustss 
     36    1.1  augustss /*
     37    1.1  augustss  * USB Open Host Controller driver.
     38    1.1  augustss  *
     39   1.96  augustss  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
     40  1.201  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     41    1.1  augustss  */
     42  1.108     lukem 
     43  1.108     lukem #include <sys/cdefs.h>
     44  1.307  jakllsch __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.307 2020/05/19 19:09:43 jakllsch Exp $");
     45  1.260     skrll 
     46  1.263     pooka #ifdef _KERNEL_OPT
     47  1.260     skrll #include "opt_usb.h"
     48  1.263     pooka #endif
     49    1.1  augustss 
     50    1.1  augustss #include <sys/param.h>
     51  1.260     skrll 
     52  1.260     skrll #include <sys/cpu.h>
     53  1.260     skrll #include <sys/device.h>
     54  1.260     skrll #include <sys/kernel.h>
     55  1.224       mrg #include <sys/kmem.h>
     56    1.1  augustss #include <sys/proc.h>
     57    1.1  augustss #include <sys/queue.h>
     58  1.260     skrll #include <sys/select.h>
     59  1.260     skrll #include <sys/sysctl.h>
     60  1.260     skrll #include <sys/systm.h>
     61    1.1  augustss 
     62   1.16  augustss #include <machine/endian.h>
     63    1.4  augustss 
     64    1.1  augustss #include <dev/usb/usb.h>
     65    1.1  augustss #include <dev/usb/usbdi.h>
     66    1.1  augustss #include <dev/usb/usbdivar.h>
     67   1.38  augustss #include <dev/usb/usb_mem.h>
     68    1.1  augustss #include <dev/usb/usb_quirks.h>
     69    1.1  augustss 
     70    1.1  augustss #include <dev/usb/ohcireg.h>
     71    1.1  augustss #include <dev/usb/ohcivar.h>
     72  1.260     skrll #include <dev/usb/usbroothub.h>
     73  1.260     skrll #include <dev/usb/usbhist.h>
     74  1.260     skrll 
     75  1.260     skrll #ifdef USB_DEBUG
     76  1.260     skrll #ifndef OHCI_DEBUG
     77  1.260     skrll #define ohcidebug 0
     78  1.260     skrll #else
     79  1.260     skrll static int ohcidebug = 10;
     80  1.260     skrll 
     81  1.260     skrll SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup")
     82  1.260     skrll {
     83  1.260     skrll 	int err;
     84  1.260     skrll 	const struct sysctlnode *rnode;
     85  1.260     skrll 	const struct sysctlnode *cnode;
     86  1.260     skrll 
     87  1.260     skrll 	err = sysctl_createv(clog, 0, NULL, &rnode,
     88  1.260     skrll 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci",
     89  1.260     skrll 	    SYSCTL_DESCR("ohci global controls"),
     90  1.260     skrll 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
     91    1.1  augustss 
     92  1.260     skrll 	if (err)
     93  1.260     skrll 		goto fail;
     94  1.260     skrll 
     95  1.260     skrll 	/* control debugging printfs */
     96  1.260     skrll 	err = sysctl_createv(clog, 0, &rnode, &cnode,
     97  1.260     skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
     98  1.260     skrll 	    "debug", SYSCTL_DESCR("Enable debugging output"),
     99  1.260     skrll 	    NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL);
    100  1.260     skrll 	if (err)
    101  1.260     skrll 		goto fail;
    102  1.260     skrll 
    103  1.260     skrll 	return;
    104  1.260     skrll fail:
    105  1.260     skrll 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
    106  1.260     skrll }
    107    1.1  augustss 
    108  1.260     skrll #endif /* OHCI_DEBUG */
    109  1.260     skrll #endif /* USB_DEBUG */
    110   1.36  augustss 
    111  1.260     skrll #define	DPRINTF(FMT,A,B,C,D)	USBHIST_LOG(ohcidebug,FMT,A,B,C,D)
    112  1.260     skrll #define	DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D)
    113  1.260     skrll #define	OHCIHIST_FUNC()		USBHIST_FUNC()
    114  1.260     skrll #define	OHCIHIST_CALLED(name)	USBHIST_CALLED(ohcidebug)
    115   1.52  augustss 
    116   1.16  augustss #if BYTE_ORDER == BIG_ENDIAN
    117  1.169      tron #define	SWAP_ENDIAN	OHCI_LITTLE_ENDIAN
    118   1.16  augustss #else
    119  1.169      tron #define	SWAP_ENDIAN	OHCI_BIG_ENDIAN
    120   1.16  augustss #endif
    121   1.16  augustss 
    122  1.169      tron #define	O16TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
    123  1.169      tron #define	O32TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
    124  1.169      tron #define	HTOO16(val)	O16TOH(val)
    125  1.169      tron #define	HTOO32(val)	O32TOH(val)
    126  1.168  augustss 
    127    1.1  augustss struct ohci_pipe;
    128    1.1  augustss 
    129   1.91  augustss Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
    130   1.91  augustss Static void		ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
    131    1.1  augustss 
    132   1.91  augustss Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
    133   1.91  augustss Static void		ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
    134  1.260     skrll Static void		ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *);
    135    1.1  augustss 
    136   1.91  augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
    137   1.91  augustss Static void		ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
    138  1.260     skrll Static void		ohci_free_sitd_locked(ohci_softc_t *,
    139  1.260     skrll 			    ohci_soft_itd_t *);
    140   1.60  augustss 
    141  1.260     skrll Static int		ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *,
    142  1.260     skrll 			    int, int);
    143  1.260     skrll Static void		ohci_free_stds(ohci_softc_t *, struct ohci_xfer *);
    144   1.53  augustss 
    145  1.260     skrll Static void		ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *,
    146  1.260     skrll 			    int, int, ohci_soft_td_t *, ohci_soft_td_t **);
    147  1.260     skrll 
    148  1.260     skrll Static usbd_status	ohci_open(struct usbd_pipe *);
    149   1.91  augustss Static void		ohci_poll(struct usbd_bus *);
    150   1.99  augustss Static void		ohci_softintr(void *);
    151  1.260     skrll Static void		ohci_rhsc(ohci_softc_t *, struct usbd_xfer *);
    152  1.260     skrll Static void		ohci_rhsc_softint(void *);
    153   1.91  augustss 
    154  1.168  augustss Static void		ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
    155  1.168  augustss 			    ohci_soft_ed_t *);
    156  1.168  augustss 
    157  1.224       mrg Static void		ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
    158  1.224       mrg 				    ohci_soft_ed_t *);
    159   1.91  augustss Static void		ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
    160   1.91  augustss Static void		ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
    161   1.91  augustss Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
    162   1.91  augustss Static void		ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
    163   1.91  augustss Static void		ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
    164   1.91  augustss Static ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
    165   1.91  augustss 
    166  1.260     skrll Static usbd_status	ohci_setup_isoc(struct usbd_pipe *);
    167  1.260     skrll Static void		ohci_device_isoc_enter(struct usbd_xfer *);
    168   1.91  augustss 
    169  1.260     skrll Static struct usbd_xfer *
    170  1.260     skrll 			ohci_allocx(struct usbd_bus *, unsigned int);
    171  1.260     skrll Static void		ohci_freex(struct usbd_bus *, struct usbd_xfer *);
    172  1.293  riastrad Static bool		ohci_dying(struct usbd_bus *);
    173  1.224       mrg Static void		ohci_get_lock(struct usbd_bus *, kmutex_t **);
    174  1.260     skrll Static int		ohci_roothub_ctrl(struct usbd_bus *,
    175  1.260     skrll 			    usb_device_request_t *, void *, int);
    176   1.91  augustss 
    177  1.260     skrll Static usbd_status	ohci_root_intr_transfer(struct usbd_xfer *);
    178  1.260     skrll Static usbd_status	ohci_root_intr_start(struct usbd_xfer *);
    179  1.260     skrll Static void		ohci_root_intr_abort(struct usbd_xfer *);
    180  1.260     skrll Static void		ohci_root_intr_close(struct usbd_pipe *);
    181  1.260     skrll Static void		ohci_root_intr_done(struct usbd_xfer *);
    182  1.260     skrll 
    183  1.260     skrll Static int		ohci_device_ctrl_init(struct usbd_xfer *);
    184  1.260     skrll Static void		ohci_device_ctrl_fini(struct usbd_xfer *);
    185  1.260     skrll Static usbd_status	ohci_device_ctrl_transfer(struct usbd_xfer *);
    186  1.260     skrll Static usbd_status	ohci_device_ctrl_start(struct usbd_xfer *);
    187  1.260     skrll Static void		ohci_device_ctrl_abort(struct usbd_xfer *);
    188  1.260     skrll Static void		ohci_device_ctrl_close(struct usbd_pipe *);
    189  1.260     skrll Static void		ohci_device_ctrl_done(struct usbd_xfer *);
    190  1.260     skrll 
    191  1.260     skrll Static int		ohci_device_bulk_init(struct usbd_xfer *);
    192  1.260     skrll Static void		ohci_device_bulk_fini(struct usbd_xfer *);
    193  1.260     skrll Static usbd_status	ohci_device_bulk_transfer(struct usbd_xfer *);
    194  1.260     skrll Static usbd_status	ohci_device_bulk_start(struct usbd_xfer *);
    195  1.260     skrll Static void		ohci_device_bulk_abort(struct usbd_xfer *);
    196  1.260     skrll Static void		ohci_device_bulk_close(struct usbd_pipe *);
    197  1.260     skrll Static void		ohci_device_bulk_done(struct usbd_xfer *);
    198  1.260     skrll 
    199  1.260     skrll Static int		ohci_device_intr_init(struct usbd_xfer *);
    200  1.260     skrll Static void		ohci_device_intr_fini(struct usbd_xfer *);
    201  1.260     skrll Static usbd_status	ohci_device_intr_transfer(struct usbd_xfer *);
    202  1.260     skrll Static usbd_status	ohci_device_intr_start(struct usbd_xfer *);
    203  1.260     skrll Static void		ohci_device_intr_abort(struct usbd_xfer *);
    204  1.260     skrll Static void		ohci_device_intr_close(struct usbd_pipe *);
    205  1.260     skrll Static void		ohci_device_intr_done(struct usbd_xfer *);
    206  1.260     skrll 
    207  1.260     skrll Static int		ohci_device_isoc_init(struct usbd_xfer *);
    208  1.260     skrll Static void		ohci_device_isoc_fini(struct usbd_xfer *);
    209  1.260     skrll Static usbd_status	ohci_device_isoc_transfer(struct usbd_xfer *);
    210  1.260     skrll Static void		ohci_device_isoc_abort(struct usbd_xfer *);
    211  1.260     skrll Static void		ohci_device_isoc_close(struct usbd_pipe *);
    212  1.260     skrll Static void		ohci_device_isoc_done(struct usbd_xfer *);
    213   1.91  augustss 
    214  1.260     skrll Static usbd_status	ohci_device_setintr(ohci_softc_t *,
    215  1.260     skrll 			    struct ohci_pipe *, int);
    216   1.91  augustss 
    217  1.104  augustss Static void		ohci_rhsc_enable(void *);
    218   1.91  augustss 
    219  1.260     skrll Static void		ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *);
    220  1.293  riastrad Static void		ohci_abortx(struct usbd_xfer *);
    221   1.53  augustss 
    222  1.260     skrll Static void		ohci_device_clear_toggle(struct usbd_pipe *);
    223  1.260     skrll Static void		ohci_noop(struct usbd_pipe *);
    224   1.37  augustss 
    225   1.52  augustss #ifdef OHCI_DEBUG
    226   1.91  augustss Static void		ohci_dumpregs(ohci_softc_t *);
    227  1.168  augustss Static void		ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
    228  1.168  augustss Static void		ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
    229  1.168  augustss Static void		ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
    230  1.168  augustss Static void		ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
    231  1.168  augustss Static void		ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
    232    1.1  augustss #endif
    233    1.1  augustss 
    234   1.88  augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    235   1.88  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    236   1.88  augustss #define OWRITE1(sc, r, x) \
    237   1.88  augustss  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    238   1.88  augustss #define OWRITE2(sc, r, x) \
    239   1.88  augustss  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    240   1.88  augustss #define OWRITE4(sc, r, x) \
    241   1.88  augustss  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    242  1.174       mrg 
    243  1.174       mrg static __inline uint32_t
    244  1.174       mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
    245  1.174       mrg {
    246  1.174       mrg 
    247  1.174       mrg 	OBARR(sc);
    248  1.174       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    249  1.174       mrg }
    250    1.1  augustss 
    251    1.1  augustss /* Reverse the bits in a value 0 .. 31 */
    252  1.260     skrll Static uint8_t revbits[OHCI_NO_INTRS] =
    253    1.1  augustss   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
    254    1.1  augustss     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
    255    1.1  augustss     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
    256    1.1  augustss     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
    257    1.1  augustss 
    258    1.1  augustss struct ohci_pipe {
    259    1.1  augustss 	struct usbd_pipe pipe;
    260    1.1  augustss 	ohci_soft_ed_t *sed;
    261   1.60  augustss 	union {
    262   1.60  augustss 		ohci_soft_td_t *td;
    263   1.60  augustss 		ohci_soft_itd_t *itd;
    264   1.60  augustss 	} tail;
    265    1.1  augustss 	/* Info needed for different pipe kinds. */
    266    1.1  augustss 	union {
    267    1.1  augustss 		/* Control pipe */
    268    1.1  augustss 		struct {
    269    1.4  augustss 			usb_dma_t reqdma;
    270  1.260     skrll 		} ctrl;
    271    1.1  augustss 		/* Interrupt pipe */
    272    1.1  augustss 		struct {
    273    1.1  augustss 			int nslots;
    274    1.1  augustss 			int pos;
    275    1.1  augustss 		} intr;
    276  1.260     skrll 		/* Isochronous pipe */
    277  1.260     skrll 		struct isoc {
    278   1.60  augustss 			int next, inuse;
    279  1.260     skrll 		} isoc;
    280  1.260     skrll 	};
    281    1.1  augustss };
    282    1.1  augustss 
    283  1.182  drochner Static const struct usbd_bus_methods ohci_bus_methods = {
    284  1.260     skrll 	.ubm_open =	ohci_open,
    285  1.260     skrll 	.ubm_softint =	ohci_softintr,
    286  1.260     skrll 	.ubm_dopoll =	ohci_poll,
    287  1.260     skrll 	.ubm_allocx =	ohci_allocx,
    288  1.260     skrll 	.ubm_freex =	ohci_freex,
    289  1.293  riastrad 	.ubm_abortx =	ohci_abortx,
    290  1.293  riastrad 	.ubm_dying =	ohci_dying,
    291  1.260     skrll 	.ubm_getlock =	ohci_get_lock,
    292  1.260     skrll 	.ubm_rhctrl =	ohci_roothub_ctrl,
    293    1.1  augustss };
    294    1.1  augustss 
    295  1.182  drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
    296  1.260     skrll 	.upm_transfer =	ohci_root_intr_transfer,
    297  1.260     skrll 	.upm_start =	ohci_root_intr_start,
    298  1.260     skrll 	.upm_abort =	ohci_root_intr_abort,
    299  1.260     skrll 	.upm_close =	ohci_root_intr_close,
    300  1.260     skrll 	.upm_cleartoggle =	ohci_noop,
    301  1.260     skrll 	.upm_done =	ohci_root_intr_done,
    302    1.1  augustss };
    303    1.1  augustss 
    304  1.182  drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
    305  1.260     skrll 	.upm_init =	ohci_device_ctrl_init,
    306  1.260     skrll 	.upm_fini =	ohci_device_ctrl_fini,
    307  1.260     skrll 	.upm_transfer =	ohci_device_ctrl_transfer,
    308  1.260     skrll 	.upm_start =	ohci_device_ctrl_start,
    309  1.260     skrll 	.upm_abort =	ohci_device_ctrl_abort,
    310  1.260     skrll 	.upm_close =	ohci_device_ctrl_close,
    311  1.260     skrll 	.upm_cleartoggle =	ohci_noop,
    312  1.260     skrll 	.upm_done =	ohci_device_ctrl_done,
    313    1.1  augustss };
    314    1.1  augustss 
    315  1.182  drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
    316  1.260     skrll 	.upm_init =	ohci_device_intr_init,
    317  1.260     skrll 	.upm_fini =	ohci_device_intr_fini,
    318  1.260     skrll 	.upm_transfer =	ohci_device_intr_transfer,
    319  1.260     skrll 	.upm_start =	ohci_device_intr_start,
    320  1.260     skrll 	.upm_abort =	ohci_device_intr_abort,
    321  1.260     skrll 	.upm_close =	ohci_device_intr_close,
    322  1.260     skrll 	.upm_cleartoggle =	ohci_device_clear_toggle,
    323  1.260     skrll 	.upm_done =	ohci_device_intr_done,
    324    1.1  augustss };
    325    1.1  augustss 
    326  1.182  drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
    327  1.260     skrll 	.upm_init =	ohci_device_bulk_init,
    328  1.260     skrll 	.upm_fini =	ohci_device_bulk_fini,
    329  1.260     skrll 	.upm_transfer =	ohci_device_bulk_transfer,
    330  1.260     skrll 	.upm_start =	ohci_device_bulk_start,
    331  1.260     skrll 	.upm_abort =	ohci_device_bulk_abort,
    332  1.260     skrll 	.upm_close =	ohci_device_bulk_close,
    333  1.260     skrll 	.upm_cleartoggle =	ohci_device_clear_toggle,
    334  1.260     skrll 	.upm_done =	ohci_device_bulk_done,
    335    1.3  augustss };
    336    1.3  augustss 
    337  1.182  drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
    338  1.260     skrll 	.upm_init =	ohci_device_isoc_init,
    339  1.260     skrll 	.upm_fini =	ohci_device_isoc_fini,
    340  1.260     skrll 	.upm_transfer =	ohci_device_isoc_transfer,
    341  1.260     skrll 	.upm_abort =	ohci_device_isoc_abort,
    342  1.260     skrll 	.upm_close =	ohci_device_isoc_close,
    343  1.260     skrll 	.upm_cleartoggle =	ohci_noop,
    344  1.260     skrll 	.upm_done =	ohci_device_isoc_done,
    345   1.43  augustss };
    346   1.43  augustss 
    347   1.47  augustss int
    348  1.189    dyoung ohci_activate(device_t self, enum devact act)
    349   1.47  augustss {
    350  1.189    dyoung 	struct ohci_softc *sc = device_private(self);
    351   1.47  augustss 
    352   1.47  augustss 	switch (act) {
    353   1.47  augustss 	case DVACT_DEACTIVATE:
    354  1.183  kiyohara 		sc->sc_dying = 1;
    355  1.203    dyoung 		return 0;
    356  1.203    dyoung 	default:
    357  1.203    dyoung 		return EOPNOTSUPP;
    358   1.47  augustss 	}
    359   1.47  augustss }
    360   1.47  augustss 
    361  1.187    dyoung void
    362  1.187    dyoung ohci_childdet(device_t self, device_t child)
    363  1.187    dyoung {
    364  1.187    dyoung 	struct ohci_softc *sc = device_private(self);
    365  1.187    dyoung 
    366  1.187    dyoung 	KASSERT(sc->sc_child == child);
    367  1.187    dyoung 	sc->sc_child = NULL;
    368  1.187    dyoung }
    369  1.187    dyoung 
    370   1.47  augustss int
    371   1.91  augustss ohci_detach(struct ohci_softc *sc, int flags)
    372   1.47  augustss {
    373   1.47  augustss 	int rv = 0;
    374   1.47  augustss 
    375   1.47  augustss 	if (sc->sc_child != NULL)
    376   1.47  augustss 		rv = config_detach(sc->sc_child, flags);
    377  1.120  augustss 
    378   1.47  augustss 	if (rv != 0)
    379  1.260     skrll 		return rv;
    380   1.47  augustss 
    381  1.277   msaitoh 	softint_disestablish(sc->sc_rhsc_si);
    382  1.104  augustss 
    383  1.277   msaitoh 	callout_halt(&sc->sc_tmo_rhsc, NULL);
    384  1.209    dyoung 	callout_destroy(&sc->sc_tmo_rhsc);
    385  1.116  augustss 
    386  1.224       mrg 	mutex_destroy(&sc->sc_lock);
    387  1.224       mrg 	mutex_destroy(&sc->sc_intr_lock);
    388  1.224       mrg 
    389  1.198    cegger 	if (sc->sc_hcca != NULL)
    390  1.198    cegger 		usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
    391  1.232  christos 	pool_cache_destroy(sc->sc_xferpool);
    392   1.47  augustss 
    393  1.260     skrll 	return rv;
    394   1.47  augustss }
    395   1.47  augustss 
    396    1.1  augustss ohci_soft_ed_t *
    397   1.91  augustss ohci_alloc_sed(ohci_softc_t *sc)
    398    1.1  augustss {
    399    1.1  augustss 	ohci_soft_ed_t *sed;
    400   1.53  augustss 	usbd_status err;
    401    1.1  augustss 	int i, offs;
    402    1.4  augustss 	usb_dma_t dma;
    403    1.1  augustss 
    404  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    405  1.260     skrll 
    406  1.260     skrll 	mutex_enter(&sc->sc_lock);
    407   1.53  augustss 	if (sc->sc_freeeds == NULL) {
    408  1.260     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    409  1.260     skrll 		mutex_exit(&sc->sc_lock);
    410  1.260     skrll 
    411   1.53  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
    412  1.301     skrll 		    OHCI_ED_ALIGN, USBMALLOC_COHERENT, &dma);
    413   1.53  augustss 		if (err)
    414  1.302  jakllsch 			return NULL;
    415  1.260     skrll 
    416  1.260     skrll 		mutex_enter(&sc->sc_lock);
    417  1.225     skrll 		for (i = 0; i < OHCI_SED_CHUNK; i++) {
    418   1.39  augustss 			offs = i * OHCI_SED_SIZE;
    419  1.123  augustss 			sed = KERNADDR(&dma, offs);
    420  1.125  augustss 			sed->physaddr = DMAADDR(&dma, offs);
    421  1.195    bouyer 			sed->dma = dma;
    422  1.195    bouyer 			sed->offs = offs;
    423    1.1  augustss 			sed->next = sc->sc_freeeds;
    424    1.1  augustss 			sc->sc_freeeds = sed;
    425    1.1  augustss 		}
    426    1.1  augustss 	}
    427    1.1  augustss 	sed = sc->sc_freeeds;
    428    1.1  augustss 	sc->sc_freeeds = sed->next;
    429  1.260     skrll 	mutex_exit(&sc->sc_lock);
    430  1.260     skrll 
    431   1.39  augustss 	memset(&sed->ed, 0, sizeof(ohci_ed_t));
    432    1.1  augustss 	sed->next = 0;
    433  1.260     skrll 	return sed;
    434  1.260     skrll }
    435  1.260     skrll 
    436  1.260     skrll static inline void
    437  1.260     skrll ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    438  1.260     skrll {
    439  1.260     skrll 
    440  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    441  1.260     skrll 
    442  1.260     skrll 	sed->next = sc->sc_freeeds;
    443  1.260     skrll 	sc->sc_freeeds = sed;
    444    1.1  augustss }
    445    1.1  augustss 
    446    1.1  augustss void
    447   1.91  augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    448    1.1  augustss {
    449  1.260     skrll 
    450  1.260     skrll 	mutex_enter(&sc->sc_lock);
    451  1.260     skrll 	ohci_free_sed_locked(sc, sed);
    452  1.260     skrll 	mutex_exit(&sc->sc_lock);
    453    1.1  augustss }
    454    1.1  augustss 
    455    1.1  augustss ohci_soft_td_t *
    456   1.91  augustss ohci_alloc_std(ohci_softc_t *sc)
    457    1.1  augustss {
    458    1.1  augustss 	ohci_soft_td_t *std;
    459   1.53  augustss 	usbd_status err;
    460    1.1  augustss 	int i, offs;
    461    1.4  augustss 	usb_dma_t dma;
    462    1.1  augustss 
    463  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    464  1.240     skrll 
    465  1.260     skrll 	mutex_enter(&sc->sc_lock);
    466   1.53  augustss 	if (sc->sc_freetds == NULL) {
    467  1.260     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    468  1.260     skrll 		mutex_exit(&sc->sc_lock);
    469  1.260     skrll 
    470   1.53  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
    471  1.301     skrll 		    OHCI_TD_ALIGN, USBMALLOC_COHERENT, &dma);
    472   1.53  augustss 		if (err)
    473  1.260     skrll 			return NULL;
    474  1.260     skrll 
    475  1.260     skrll 		mutex_enter(&sc->sc_lock);
    476  1.259     skrll 		for (i = 0; i < OHCI_STD_CHUNK; i++) {
    477   1.39  augustss 			offs = i * OHCI_STD_SIZE;
    478  1.123  augustss 			std = KERNADDR(&dma, offs);
    479  1.125  augustss 			std->physaddr = DMAADDR(&dma, offs);
    480  1.195    bouyer 			std->dma = dma;
    481  1.195    bouyer 			std->offs = offs;
    482    1.1  augustss 			std->nexttd = sc->sc_freetds;
    483    1.1  augustss 			sc->sc_freetds = std;
    484    1.1  augustss 		}
    485    1.1  augustss 	}
    486   1.69  augustss 
    487    1.1  augustss 	std = sc->sc_freetds;
    488    1.1  augustss 	sc->sc_freetds = std->nexttd;
    489  1.260     skrll 	mutex_exit(&sc->sc_lock);
    490  1.260     skrll 
    491   1.39  augustss 	memset(&std->td, 0, sizeof(ohci_td_t));
    492   1.83  augustss 	std->nexttd = NULL;
    493   1.83  augustss 	std->xfer = NULL;
    494   1.69  augustss 
    495  1.260     skrll 	return std;
    496    1.1  augustss }
    497    1.1  augustss 
    498    1.1  augustss void
    499  1.260     skrll ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std)
    500    1.1  augustss {
    501  1.258     skrll 
    502  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    503  1.260     skrll 
    504    1.1  augustss 	std->nexttd = sc->sc_freetds;
    505    1.1  augustss 	sc->sc_freetds = std;
    506    1.1  augustss }
    507    1.1  augustss 
    508  1.260     skrll void
    509  1.260     skrll ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
    510  1.260     skrll {
    511  1.260     skrll 
    512  1.260     skrll 	mutex_enter(&sc->sc_lock);
    513  1.260     skrll 	ohci_free_std_locked(sc, std);
    514  1.260     skrll 	mutex_exit(&sc->sc_lock);
    515  1.260     skrll }
    516  1.260     skrll 
    517  1.260     skrll Static int
    518  1.260     skrll ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd)
    519  1.260     skrll {
    520  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
    521  1.260     skrll 	uint16_t flags = xfer->ux_flags;
    522  1.260     skrll 
    523  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    524  1.260     skrll 
    525  1.274  pgoyette 	DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd",
    526  1.260     skrll 	    xfer->ux_pipe->up_dev->ud_addr,
    527  1.260     skrll 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress),
    528  1.260     skrll 	    length, xfer->ux_pipe->up_dev->ud_speed);
    529  1.260     skrll 
    530  1.260     skrll 	ASSERT_SLEEPABLE();
    531  1.260     skrll 	KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER)));
    532  1.260     skrll 
    533  1.260     skrll 	size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0;
    534  1.298     skrll 	nstd += howmany(length, OHCI_PAGE_SIZE);
    535  1.260     skrll 	ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd,
    536  1.260     skrll 	    KM_SLEEP);
    537  1.260     skrll 	ox->ox_nstd = nstd;
    538  1.260     skrll 
    539  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, nstd, 0, 0);
    540  1.260     skrll 
    541  1.260     skrll 	for (size_t j = 0; j < ox->ox_nstd;) {
    542  1.260     skrll 		ohci_soft_td_t *cur = ohci_alloc_std(sc);
    543  1.260     skrll 		if (cur == NULL)
    544  1.260     skrll 			goto nomem;
    545  1.260     skrll 
    546  1.260     skrll 		ox->ox_stds[j++] = cur;
    547  1.260     skrll 		cur->xfer = xfer;
    548  1.260     skrll 		cur->flags = 0;
    549  1.260     skrll 	}
    550  1.260     skrll 
    551  1.260     skrll 	return 0;
    552  1.260     skrll 
    553  1.260     skrll  nomem:
    554  1.260     skrll 	ohci_free_stds(sc, ox);
    555  1.260     skrll 	kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd);
    556  1.260     skrll 
    557  1.260     skrll 	return ENOMEM;
    558  1.260     skrll }
    559  1.260     skrll 
    560  1.260     skrll Static void
    561  1.260     skrll ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox)
    562  1.260     skrll {
    563  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    564  1.274  pgoyette 	DPRINTF("ox=%#jx", (uintptr_t)ox, 0, 0, 0);
    565  1.260     skrll 
    566  1.260     skrll 	mutex_enter(&sc->sc_lock);
    567  1.260     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
    568  1.260     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
    569  1.260     skrll 		if (std == NULL)
    570  1.260     skrll 			break;
    571  1.260     skrll 		ohci_free_std_locked(sc, std);
    572  1.260     skrll 	}
    573  1.260     skrll 	mutex_exit(&sc->sc_lock);
    574  1.260     skrll }
    575  1.260     skrll 
    576  1.260     skrll void
    577  1.260     skrll ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer,
    578  1.260     skrll     int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep)
    579   1.48  augustss {
    580  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
    581   1.48  augustss 	ohci_soft_td_t *next, *cur;
    582   1.75  augustss 	int len, curlen;
    583  1.260     skrll 	usb_dma_t *dma = &xfer->ux_dmabuf;
    584  1.260     skrll 	uint16_t flags = xfer->ux_flags;
    585   1.48  augustss 
    586  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    587  1.274  pgoyette 	DPRINTF("start len=%jd", alen, 0, 0, 0);
    588   1.75  augustss 
    589  1.289       mrg 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    590  1.224       mrg 
    591  1.274  pgoyette 	DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd",
    592  1.260     skrll 	    xfer->ux_pipe->up_dev->ud_addr,
    593  1.260     skrll 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress),
    594  1.260     skrll 	    alen, xfer->ux_pipe->up_dev->ud_speed);
    595  1.260     skrll 
    596  1.260     skrll 	KASSERT(sp);
    597  1.260     skrll 
    598  1.260     skrll 	int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize);
    599  1.260     skrll 
    600  1.260     skrll 	/*
    601  1.260     skrll 	 * Assign next for the len == 0 case where we don't go through the
    602  1.260     skrll 	 * main loop.
    603  1.260     skrll 	 */
    604   1.75  augustss 	len = alen;
    605  1.260     skrll 	cur = next = sp;
    606  1.260     skrll 
    607  1.195    bouyer 	usb_syncmem(dma, 0, len,
    608  1.195    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
    609  1.260     skrll 	const uint32_t tdflags = HTOO32(
    610  1.120  augustss 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
    611   1.77  augustss 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
    612   1.61  augustss 
    613  1.260     skrll 	size_t curoffs = 0;
    614  1.260     skrll 	for (size_t j = 1; len != 0;) {
    615  1.260     skrll 		if (j == ox->ox_nstd)
    616  1.260     skrll 			next = NULL;
    617  1.260     skrll 		else
    618  1.260     skrll 			next = ox->ox_stds[j++];
    619  1.260     skrll 		KASSERT(next != cur);
    620  1.260     skrll 
    621  1.260     skrll 		curlen = 0;
    622  1.270     skrll 		const ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs);
    623  1.260     skrll 		ohci_physaddr_t edataphys = DMAADDR(dma, curoffs + len - 1);
    624   1.48  augustss 
    625  1.270     skrll 		const ohci_physaddr_t sphyspg = OHCI_PAGE(sdataphys);
    626  1.260     skrll 		ohci_physaddr_t ephyspg = OHCI_PAGE(edataphys);
    627  1.260     skrll 		/*
    628  1.260     skrll 		 * The OHCI hardware can handle at most one page
    629  1.260     skrll 		 * crossing per TD
    630  1.260     skrll 		 */
    631  1.260     skrll 		curlen = len;
    632  1.267     skrll 		if (sphyspg != ephyspg &&
    633  1.268     skrll 		    sphyspg + OHCI_PAGE_SIZE != ephyspg) {
    634   1.48  augustss 			/* must use multiple TDs, fill as much as possible. */
    635  1.120  augustss 			curlen = 2 * OHCI_PAGE_SIZE -
    636  1.269     skrll 			    OHCI_PAGE_OFFSET(sdataphys);
    637   1.78  augustss 			/* the length must be a multiple of the max size */
    638  1.260     skrll 			curlen -= curlen % mps;
    639  1.271     skrll 			edataphys = DMAADDR(dma, curoffs + curlen - 1);
    640   1.48  augustss 		}
    641  1.260     skrll 		KASSERT(curlen != 0);
    642  1.300  christos 		DPRINTFN(4, "sdataphys=0x%08jx edataphys=0x%08jx "
    643  1.274  pgoyette 		    "len=%jd curlen=%jd", sdataphys, edataphys, len, curlen);
    644   1.48  augustss 
    645   1.77  augustss 		cur->td.td_flags = tdflags;
    646  1.260     skrll 		cur->td.td_cbp = HTOO32(sdataphys);
    647  1.260     skrll 		cur->td.td_be = HTOO32(edataphys);
    648  1.260     skrll 		cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0;
    649   1.48  augustss 		cur->nexttd = next;
    650   1.48  augustss 		cur->len = curlen;
    651   1.48  augustss 		cur->flags = OHCI_ADD_LEN;
    652   1.77  augustss 		cur->xfer = xfer;
    653  1.260     skrll 	 	ohci_hash_add_td(sc, cur);
    654  1.260     skrll 
    655  1.260     skrll 		curoffs += curlen;
    656  1.260     skrll 		len -= curlen;
    657  1.260     skrll 
    658  1.260     skrll 		if (len != 0) {
    659  1.260     skrll 			KASSERT(next != NULL);
    660  1.260     skrll 			DPRINTFN(10, "extend chain", 0, 0, 0, 0);
    661  1.272     skrll 			usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    662  1.272     skrll 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    663  1.272     skrll 
    664  1.260     skrll 			cur = next;
    665  1.260     skrll 		}
    666   1.48  augustss 	}
    667  1.260     skrll 	cur->td.td_flags |=
    668  1.262     skrll 	    HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0);
    669  1.260     skrll 
    670  1.260     skrll 	if (!rd &&
    671  1.260     skrll 	    (flags & USBD_FORCE_SHORT_XFER) &&
    672  1.260     skrll 	    alen % mps == 0) {
    673  1.272     skrll 		/* We're adding a ZLP so sync the previous TD */
    674  1.272     skrll 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    675  1.272     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    676  1.272     skrll 
    677   1.61  augustss 		/* Force a 0 length transfer at the end. */
    678   1.75  augustss 
    679  1.260     skrll 		KASSERT(next != NULL);
    680   1.75  augustss 		cur = next;
    681   1.61  augustss 
    682   1.77  augustss 		cur->td.td_flags = tdflags;
    683   1.61  augustss 		cur->td.td_cbp = 0; /* indicate 0 length packet */
    684  1.260     skrll 		cur->td.td_nexttd = 0;
    685   1.75  augustss 		cur->td.td_be = ~0;
    686  1.260     skrll 		cur->nexttd = NULL;
    687   1.61  augustss 		cur->len = 0;
    688   1.61  augustss 		cur->flags = 0;
    689   1.77  augustss 		cur->xfer = xfer;
    690  1.260     skrll 	 	ohci_hash_add_td(sc, cur);
    691  1.260     skrll 
    692  1.260     skrll 		DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0);
    693   1.61  augustss 	}
    694  1.272     skrll 
    695  1.272     skrll 	/* Last TD gets usb_syncmem'ed by caller */
    696   1.77  augustss 	*ep = cur;
    697   1.48  augustss }
    698   1.48  augustss 
    699   1.60  augustss ohci_soft_itd_t *
    700   1.91  augustss ohci_alloc_sitd(ohci_softc_t *sc)
    701   1.60  augustss {
    702   1.60  augustss 	ohci_soft_itd_t *sitd;
    703   1.60  augustss 	usbd_status err;
    704  1.224       mrg 	int i, offs;
    705   1.60  augustss 	usb_dma_t dma;
    706   1.60  augustss 
    707  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    708  1.260     skrll 
    709  1.260     skrll 	mutex_enter(&sc->sc_lock);
    710   1.60  augustss 	if (sc->sc_freeitds == NULL) {
    711  1.260     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    712  1.260     skrll 		mutex_exit(&sc->sc_lock);
    713  1.260     skrll 
    714   1.83  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
    715  1.301     skrll 		    OHCI_ITD_ALIGN, USBMALLOC_COHERENT, &dma);
    716   1.60  augustss 		if (err)
    717  1.260     skrll 			return NULL;
    718  1.260     skrll 		mutex_enter(&sc->sc_lock);
    719  1.259     skrll 		for (i = 0; i < OHCI_SITD_CHUNK; i++) {
    720   1.83  augustss 			offs = i * OHCI_SITD_SIZE;
    721  1.123  augustss 			sitd = KERNADDR(&dma, offs);
    722  1.125  augustss 			sitd->physaddr = DMAADDR(&dma, offs);
    723  1.195    bouyer 			sitd->dma = dma;
    724  1.195    bouyer 			sitd->offs = offs;
    725   1.60  augustss 			sitd->nextitd = sc->sc_freeitds;
    726   1.60  augustss 			sc->sc_freeitds = sitd;
    727   1.60  augustss 		}
    728   1.60  augustss 	}
    729   1.83  augustss 
    730   1.60  augustss 	sitd = sc->sc_freeitds;
    731   1.60  augustss 	sc->sc_freeitds = sitd->nextitd;
    732  1.260     skrll 	mutex_exit(&sc->sc_lock);
    733  1.260     skrll 
    734   1.60  augustss 	memset(&sitd->itd, 0, sizeof(ohci_itd_t));
    735   1.83  augustss 	sitd->nextitd = NULL;
    736   1.83  augustss 	sitd->xfer = NULL;
    737   1.83  augustss 
    738   1.83  augustss #ifdef DIAGNOSTIC
    739  1.260     skrll 	sitd->isdone = true;
    740   1.83  augustss #endif
    741   1.83  augustss 
    742  1.260     skrll 	return sitd;
    743   1.60  augustss }
    744   1.60  augustss 
    745  1.260     skrll Static void
    746  1.260     skrll ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    747   1.60  augustss {
    748   1.83  augustss 
    749  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    750  1.274  pgoyette 	DPRINTFN(10, "sitd=%#jx", (uintptr_t)sitd, 0, 0, 0);
    751   1.83  augustss 
    752  1.260     skrll 	KASSERT(sitd->isdone);
    753   1.83  augustss #ifdef DIAGNOSTIC
    754  1.134    toshii 	/* Warn double free */
    755  1.260     skrll 	sitd->isdone = false;
    756   1.83  augustss #endif
    757   1.83  augustss 
    758   1.60  augustss 	sitd->nextitd = sc->sc_freeitds;
    759   1.60  augustss 	sc->sc_freeitds = sitd;
    760   1.60  augustss }
    761   1.60  augustss 
    762  1.260     skrll void
    763  1.260     skrll ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    764  1.260     skrll {
    765  1.260     skrll 
    766  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    767  1.260     skrll 
    768  1.260     skrll 	mutex_enter(&sc->sc_lock);
    769  1.260     skrll 	ohci_free_sitd_locked(sc, sitd);
    770  1.260     skrll 	mutex_exit(&sc->sc_lock);
    771  1.260     skrll }
    772  1.260     skrll 
    773  1.260     skrll int
    774   1.91  augustss ohci_init(ohci_softc_t *sc)
    775    1.1  augustss {
    776    1.1  augustss 	ohci_soft_ed_t *sed, *psed;
    777   1.53  augustss 	usbd_status err;
    778    1.1  augustss 	int i;
    779  1.260     skrll 	uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */;
    780  1.260     skrll 
    781  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    782   1.16  augustss 
    783  1.199  jmcneill 	aprint_normal_dev(sc->sc_dev, "");
    784  1.199  jmcneill 
    785  1.198    cegger 	sc->sc_hcca = NULL;
    786  1.224       mrg 	callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
    787  1.224       mrg 
    788  1.224       mrg 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    789  1.256     skrll 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
    790  1.224       mrg 
    791  1.264     skrll 	sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE,
    792  1.224       mrg 	    ohci_rhsc_softint, sc);
    793  1.198    cegger 
    794  1.198    cegger 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    795  1.198    cegger 		LIST_INIT(&sc->sc_hash_tds[i]);
    796  1.198    cegger 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    797  1.198    cegger 		LIST_INIT(&sc->sc_hash_itds[i]);
    798  1.198    cegger 
    799  1.232  christos 	sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
    800  1.232  christos 	    "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    801  1.198    cegger 
    802   1.56  augustss 	rev = OREAD4(sc, OHCI_REVISION);
    803  1.200     enami 	aprint_normal("OHCI version %d.%d%s\n",
    804  1.199  jmcneill 	    OHCI_REV_HI(rev), OHCI_REV_LO(rev),
    805  1.199  jmcneill 	    OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
    806   1.55  augustss 
    807    1.1  augustss 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
    808  1.199  jmcneill 		aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
    809  1.260     skrll 		sc->sc_bus.ub_revision = USBREV_UNKNOWN;
    810  1.260     skrll 		return -1;
    811    1.1  augustss 	}
    812  1.260     skrll 	sc->sc_bus.ub_revision = USBREV_1_0;
    813  1.260     skrll 	sc->sc_bus.ub_usedma = true;
    814  1.153      fvdl 
    815   1.73  augustss 	/* XXX determine alignment by R/W */
    816    1.1  augustss 	/* Allocate the HCCA area. */
    817  1.120  augustss 	err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
    818  1.301     skrll 	    OHCI_HCCA_ALIGN, USBMALLOC_COHERENT, &sc->sc_hccadma);
    819  1.198    cegger 	if (err) {
    820  1.198    cegger 		sc->sc_hcca = NULL;
    821  1.198    cegger 		return err;
    822  1.198    cegger 	}
    823  1.123  augustss 	sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
    824    1.1  augustss 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
    825    1.1  augustss 
    826    1.1  augustss 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
    827    1.1  augustss 
    828   1.60  augustss 	/* Allocate dummy ED that starts the control list. */
    829    1.1  augustss 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
    830   1.53  augustss 	if (sc->sc_ctrl_head == NULL) {
    831  1.260     skrll 		err = ENOMEM;
    832    1.1  augustss 		goto bad1;
    833    1.1  augustss 	}
    834  1.168  augustss 	sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    835   1.34  augustss 
    836   1.60  augustss 	/* Allocate dummy ED that starts the bulk list. */
    837    1.1  augustss 	sc->sc_bulk_head = ohci_alloc_sed(sc);
    838   1.53  augustss 	if (sc->sc_bulk_head == NULL) {
    839  1.260     skrll 		err = ENOMEM;
    840    1.1  augustss 		goto bad2;
    841    1.1  augustss 	}
    842  1.168  augustss 	sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    843  1.195    bouyer 	usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
    844  1.195    bouyer 	    sizeof(sc->sc_bulk_head->ed),
    845  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    846    1.1  augustss 
    847   1.60  augustss 	/* Allocate dummy ED that starts the isochronous list. */
    848   1.60  augustss 	sc->sc_isoc_head = ohci_alloc_sed(sc);
    849   1.60  augustss 	if (sc->sc_isoc_head == NULL) {
    850  1.260     skrll 		err = ENOMEM;
    851   1.60  augustss 		goto bad3;
    852   1.60  augustss 	}
    853  1.168  augustss 	sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    854  1.195    bouyer 	usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
    855  1.195    bouyer 	    sizeof(sc->sc_isoc_head->ed),
    856  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    857   1.60  augustss 
    858    1.1  augustss 	/* Allocate all the dummy EDs that make up the interrupt tree. */
    859    1.1  augustss 	for (i = 0; i < OHCI_NO_EDS; i++) {
    860    1.1  augustss 		sed = ohci_alloc_sed(sc);
    861   1.53  augustss 		if (sed == NULL) {
    862    1.1  augustss 			while (--i >= 0)
    863    1.1  augustss 				ohci_free_sed(sc, sc->sc_eds[i]);
    864  1.260     skrll 			err = ENOMEM;
    865   1.60  augustss 			goto bad4;
    866    1.1  augustss 		}
    867    1.1  augustss 		/* All ED fields are set to 0. */
    868    1.1  augustss 		sc->sc_eds[i] = sed;
    869  1.168  augustss 		sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    870   1.60  augustss 		if (i != 0)
    871    1.1  augustss 			psed = sc->sc_eds[(i-1) / 2];
    872   1.60  augustss 		else
    873   1.60  augustss 			psed= sc->sc_isoc_head;
    874   1.60  augustss 		sed->next = psed;
    875  1.168  augustss 		sed->ed.ed_nexted = HTOO32(psed->physaddr);
    876  1.195    bouyer 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
    877  1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    878    1.1  augustss 	}
    879  1.120  augustss 	/*
    880    1.1  augustss 	 * Fill HCCA interrupt table.  The bit reversal is to get
    881    1.1  augustss 	 * the tree set up properly to spread the interrupts.
    882    1.1  augustss 	 */
    883    1.1  augustss 	for (i = 0; i < OHCI_NO_INTRS; i++)
    884  1.120  augustss 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
    885  1.168  augustss 		    HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
    886  1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
    887  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    888    1.1  augustss 
    889   1.73  augustss #ifdef OHCI_DEBUG
    890  1.260     skrll 	DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0);
    891  1.260     skrll 	if (ohcidebug >= 15) {
    892   1.73  augustss 		for (i = 0; i < OHCI_NO_EDS; i++) {
    893  1.274  pgoyette 			DPRINTFN(15, "ed#%jd ", i, 0, 0, 0);
    894  1.168  augustss 			ohci_dump_ed(sc, sc->sc_eds[i]);
    895   1.73  augustss 		}
    896  1.260     skrll 		DPRINTFN(15, "iso", 0, 0, 0 ,0);
    897  1.168  augustss 		ohci_dump_ed(sc, sc->sc_isoc_head);
    898   1.73  augustss 	}
    899  1.260     skrll 	DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0);
    900   1.73  augustss #endif
    901   1.73  augustss 
    902  1.161  augustss 	/* Preserve values programmed by SMM/BIOS but lost over reset. */
    903  1.161  augustss 	ctl = OREAD4(sc, OHCI_CONTROL);
    904  1.161  augustss 	rwc = ctl & OHCI_RWC;
    905  1.161  augustss 	fm = OREAD4(sc, OHCI_FM_INTERVAL);
    906  1.161  augustss 	desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
    907  1.243    martin 	/* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */
    908  1.161  augustss 
    909    1.1  augustss 	/* Determine in what context we are running. */
    910    1.1  augustss 	if (ctl & OHCI_IR) {
    911    1.1  augustss 		/* SMM active, request change */
    912  1.260     skrll 		DPRINTF("SMM active, request owner change", 0, 0, 0, 0);
    913  1.160  augustss 		if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
    914  1.160  augustss 		    (OHCI_OC | OHCI_MIE))
    915  1.160  augustss 			OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
    916    1.1  augustss 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
    917    1.1  augustss 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
    918    1.1  augustss 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
    919   1.53  augustss 			usb_delay_ms(&sc->sc_bus, 1);
    920    1.1  augustss 			ctl = OREAD4(sc, OHCI_CONTROL);
    921    1.1  augustss 		}
    922  1.160  augustss 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
    923    1.1  augustss 		if ((ctl & OHCI_IR) == 0) {
    924  1.199  jmcneill 			aprint_error_dev(sc->sc_dev,
    925  1.199  jmcneill 			    "SMM does not respond, resetting\n");
    926  1.161  augustss 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    927    1.1  augustss 			goto reset;
    928    1.1  augustss 		}
    929  1.103  augustss #if 0
    930  1.103  augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
    931    1.1  augustss 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
    932    1.1  augustss 		/* BIOS started controller. */
    933  1.260     skrll 		DPRINTF("BIOS active", 0, 0, 0, 0);
    934    1.1  augustss 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
    935  1.161  augustss 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
    936   1.53  augustss 			usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    937    1.1  augustss 		}
    938  1.103  augustss #endif
    939    1.1  augustss 	} else {
    940  1.260     skrll 		DPRINTF("cold started", 0 ,0 ,0 ,0);
    941    1.1  augustss 	reset:
    942    1.1  augustss 		/* Controller was cold started. */
    943   1.53  augustss 		usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
    944    1.1  augustss 	}
    945    1.1  augustss 
    946   1.16  augustss 	/*
    947   1.25  augustss 	 * This reset should not be necessary according to the OHCI spec, but
    948   1.25  augustss 	 * without it some controllers do not start.
    949   1.16  augustss 	 */
    950  1.274  pgoyette 	DPRINTF("sc %#jx: resetting", (uintptr_t)sc, 0, 0, 0);
    951  1.161  augustss 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    952   1.55  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
    953   1.16  augustss 
    954    1.1  augustss 	/* We now own the host controller and the bus has been reset. */
    955    1.1  augustss 
    956    1.1  augustss 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
    957    1.1  augustss 	/* Nominal time for a reset is 10 us. */
    958    1.1  augustss 	for (i = 0; i < 10; i++) {
    959    1.1  augustss 		delay(10);
    960    1.1  augustss 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
    961    1.1  augustss 		if (!hcr)
    962    1.1  augustss 			break;
    963    1.1  augustss 	}
    964    1.1  augustss 	if (hcr) {
    965  1.199  jmcneill 		aprint_error_dev(sc->sc_dev, "reset timeout\n");
    966  1.260     skrll 		err = EIO;
    967   1.60  augustss 		goto bad5;
    968    1.1  augustss 	}
    969   1.52  augustss #ifdef OHCI_DEBUG
    970  1.260     skrll 	if (ohcidebug >= 15)
    971    1.1  augustss 		ohci_dumpregs(sc);
    972    1.1  augustss #endif
    973    1.1  augustss 
    974   1.60  augustss 	/* The controller is now in SUSPEND state, we have 2ms to finish. */
    975    1.1  augustss 
    976    1.1  augustss 	/* Set up HC registers. */
    977  1.125  augustss 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
    978    1.1  augustss 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
    979    1.1  augustss 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
    980   1.55  augustss 	/* disable all interrupts and then switch on all desired interrupts */
    981    1.1  augustss 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
    982   1.55  augustss 	/* switch on desired functional features */
    983    1.1  augustss 	ctl = OREAD4(sc, OHCI_CONTROL);
    984    1.1  augustss 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
    985    1.1  augustss 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
    986  1.161  augustss 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
    987    1.1  augustss 	/* And finally start it! */
    988    1.1  augustss 	OWRITE4(sc, OHCI_CONTROL, ctl);
    989    1.1  augustss 
    990    1.1  augustss 	/*
    991    1.1  augustss 	 * The controller is now OPERATIONAL.  Set a some final
    992    1.1  augustss 	 * registers that should be set earlier, but that the
    993    1.1  augustss 	 * controller ignores when in the SUSPEND state.
    994    1.1  augustss 	 */
    995  1.161  augustss 	ival = OHCI_GET_IVAL(fm);
    996    1.1  augustss 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
    997    1.1  augustss 	fm |= OHCI_FSMPS(ival) | ival;
    998    1.1  augustss 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
    999    1.1  augustss 	per = OHCI_PERIODIC(ival); /* 90% periodic */
   1000    1.1  augustss 	OWRITE4(sc, OHCI_PERIODIC_START, per);
   1001    1.1  augustss 
   1002  1.249     skrll 	if (sc->sc_flags & OHCIF_SUPERIO) {
   1003  1.249     skrll 		/* no overcurrent protection */
   1004  1.249     skrll 		desca |= OHCI_NOCP;
   1005  1.249     skrll 		/*
   1006  1.249     skrll 		 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning
   1007  1.249     skrll 		 * that
   1008  1.249     skrll 		 *  - ports are always power switched
   1009  1.249     skrll 		 *  - don't wait for powered root hub port
   1010  1.249     skrll 		 */
   1011  1.249     skrll 		desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS);
   1012  1.249     skrll 	}
   1013  1.249     skrll 
   1014   1.68  augustss 	/* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
   1015   1.68  augustss 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
   1016   1.68  augustss 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
   1017   1.85  augustss 	usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
   1018   1.68  augustss 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
   1019    1.1  augustss 
   1020   1.85  augustss 	/*
   1021   1.85  augustss 	 * The AMD756 requires a delay before re-reading the register,
   1022   1.85  augustss 	 * otherwise it will occasionally report 0 ports.
   1023   1.85  augustss 	 */
   1024  1.145  augustss 	sc->sc_noport = 0;
   1025  1.145  augustss 	for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
   1026  1.145  augustss 		usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
   1027  1.145  augustss 		sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
   1028  1.145  augustss 	}
   1029    1.1  augustss 
   1030   1.52  augustss #ifdef OHCI_DEBUG
   1031  1.260     skrll 	if (ohcidebug >= 5)
   1032    1.1  augustss 		ohci_dumpregs(sc);
   1033    1.1  augustss #endif
   1034  1.120  augustss 
   1035    1.1  augustss 	/* Set up the bus struct. */
   1036  1.260     skrll 	sc->sc_bus.ub_methods = &ohci_bus_methods;
   1037  1.260     skrll 	sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe);
   1038    1.1  augustss 
   1039  1.101   minoura 	sc->sc_control = sc->sc_intre = 0;
   1040   1.59  augustss 
   1041  1.167  augustss 	/* Finally, turn on interrupts. */
   1042  1.274  pgoyette 	DPRINTF("enabling %#jx", sc->sc_eintrs | OHCI_MIE, 0, 0, 0);
   1043  1.167  augustss 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
   1044  1.167  augustss 
   1045  1.260     skrll 	return 0;
   1046    1.1  augustss 
   1047   1.60  augustss  bad5:
   1048   1.60  augustss 	for (i = 0; i < OHCI_NO_EDS; i++)
   1049   1.60  augustss 		ohci_free_sed(sc, sc->sc_eds[i]);
   1050   1.60  augustss  bad4:
   1051   1.60  augustss 	ohci_free_sed(sc, sc->sc_isoc_head);
   1052    1.1  augustss  bad3:
   1053  1.144  augustss 	ohci_free_sed(sc, sc->sc_bulk_head);
   1054  1.144  augustss  bad2:
   1055    1.1  augustss 	ohci_free_sed(sc, sc->sc_ctrl_head);
   1056    1.1  augustss  bad1:
   1057   1.44  augustss 	usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
   1058  1.198    cegger 	sc->sc_hcca = NULL;
   1059  1.260     skrll 	return err;
   1060   1.62  augustss }
   1061   1.62  augustss 
   1062  1.260     skrll struct usbd_xfer *
   1063  1.260     skrll ohci_allocx(struct usbd_bus *bus, unsigned int nframes)
   1064   1.62  augustss {
   1065  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1066  1.260     skrll 	struct usbd_xfer *xfer;
   1067   1.62  augustss 
   1068  1.276     skrll 	xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK);
   1069  1.118  augustss 	if (xfer != NULL) {
   1070  1.232  christos 		memset(xfer, 0, sizeof(struct ohci_xfer));
   1071  1.282       mrg 
   1072  1.118  augustss #ifdef DIAGNOSTIC
   1073  1.260     skrll 		xfer->ux_state = XFER_BUSY;
   1074  1.118  augustss #endif
   1075  1.118  augustss 	}
   1076  1.260     skrll 	return xfer;
   1077   1.62  augustss }
   1078   1.62  augustss 
   1079   1.62  augustss void
   1080  1.260     skrll ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
   1081   1.62  augustss {
   1082  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1083   1.62  augustss 
   1084  1.288       rin 	KASSERTMSG(xfer->ux_state == XFER_BUSY ||
   1085  1.288       rin 	    xfer->ux_status == USBD_NOT_STARTED,
   1086  1.300  christos 	    "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state);
   1087  1.118  augustss #ifdef DIAGNOSTIC
   1088  1.260     skrll 	xfer->ux_state = XFER_FREE;
   1089  1.118  augustss #endif
   1090  1.232  christos 	pool_cache_put(sc->sc_xferpool, xfer);
   1091   1.42  augustss }
   1092   1.42  augustss 
   1093  1.293  riastrad Static bool
   1094  1.293  riastrad ohci_dying(struct usbd_bus *bus)
   1095  1.293  riastrad {
   1096  1.293  riastrad 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1097  1.293  riastrad 
   1098  1.293  riastrad 	return sc->sc_dying;
   1099  1.293  riastrad }
   1100  1.293  riastrad 
   1101  1.224       mrg Static void
   1102  1.224       mrg ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
   1103  1.224       mrg {
   1104  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1105  1.224       mrg 
   1106  1.224       mrg 	*lock = &sc->sc_lock;
   1107  1.224       mrg }
   1108  1.224       mrg 
   1109   1.59  augustss /*
   1110   1.59  augustss  * Shut down the controller when the system is going down.
   1111   1.59  augustss  */
   1112  1.188    dyoung bool
   1113  1.188    dyoung ohci_shutdown(device_t self, int flags)
   1114   1.59  augustss {
   1115  1.188    dyoung 	ohci_softc_t *sc = device_private(self);
   1116   1.59  augustss 
   1117  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1118  1.260     skrll 
   1119  1.260     skrll 	DPRINTF("stopping the HC", 0, 0, 0, 0);
   1120  1.277   msaitoh 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
   1121   1.59  augustss 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1122  1.188    dyoung 	return true;
   1123   1.59  augustss }
   1124   1.59  augustss 
   1125  1.185  jmcneill bool
   1126  1.206    dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
   1127   1.33  augustss {
   1128  1.185  jmcneill 	ohci_softc_t *sc = device_private(dv);
   1129  1.185  jmcneill 	uint32_t ctl;
   1130   1.33  augustss 
   1131  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1132  1.260     skrll 	sc->sc_bus.ub_usepolling++;
   1133  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1134  1.224       mrg 
   1135  1.185  jmcneill 	/* Some broken BIOSes do not recover these values */
   1136  1.185  jmcneill 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
   1137  1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
   1138  1.185  jmcneill 	    sc->sc_ctrl_head->physaddr);
   1139  1.185  jmcneill 	OWRITE4(sc, OHCI_BULK_HEAD_ED,
   1140  1.185  jmcneill 	    sc->sc_bulk_head->physaddr);
   1141  1.185  jmcneill 	if (sc->sc_intre)
   1142  1.185  jmcneill 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
   1143  1.185  jmcneill 		    (OHCI_ALL_INTRS | OHCI_MIE));
   1144  1.185  jmcneill 	if (sc->sc_control)
   1145  1.185  jmcneill 		ctl = sc->sc_control;
   1146  1.185  jmcneill 	else
   1147  1.185  jmcneill 		ctl = OREAD4(sc, OHCI_CONTROL);
   1148  1.185  jmcneill 	ctl |= OHCI_HCFS_RESUME;
   1149  1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1150  1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
   1151  1.185  jmcneill 	ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
   1152  1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1153  1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
   1154  1.185  jmcneill 	sc->sc_control = sc->sc_intre = 0;
   1155  1.224       mrg 
   1156  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1157  1.260     skrll 	sc->sc_bus.ub_usepolling--;
   1158  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1159  1.185  jmcneill 
   1160  1.185  jmcneill 	return true;
   1161  1.185  jmcneill }
   1162  1.185  jmcneill 
   1163  1.185  jmcneill bool
   1164  1.206    dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
   1165  1.185  jmcneill {
   1166  1.185  jmcneill 	ohci_softc_t *sc = device_private(dv);
   1167  1.185  jmcneill 	uint32_t ctl;
   1168   1.95  augustss 
   1169  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1170  1.260     skrll 	sc->sc_bus.ub_usepolling++;
   1171  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1172  1.224       mrg 
   1173  1.185  jmcneill 	ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
   1174  1.185  jmcneill 	if (sc->sc_control == 0) {
   1175  1.185  jmcneill 		/*
   1176  1.185  jmcneill 		 * Preserve register values, in case that BIOS
   1177  1.185  jmcneill 		 * does not recover them.
   1178  1.185  jmcneill 		 */
   1179  1.185  jmcneill 		sc->sc_control = ctl;
   1180  1.185  jmcneill 		sc->sc_intre = OREAD4(sc,
   1181  1.185  jmcneill 		    OHCI_INTERRUPT_ENABLE);
   1182   1.95  augustss 	}
   1183  1.185  jmcneill 	ctl |= OHCI_HCFS_SUSPEND;
   1184  1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1185  1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1186  1.224       mrg 
   1187  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1188  1.260     skrll 	sc->sc_bus.ub_usepolling--;
   1189  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1190  1.185  jmcneill 
   1191  1.185  jmcneill 	return true;
   1192   1.33  augustss }
   1193   1.33  augustss 
   1194   1.52  augustss #ifdef OHCI_DEBUG
   1195    1.1  augustss void
   1196   1.91  augustss ohci_dumpregs(ohci_softc_t *sc)
   1197    1.1  augustss {
   1198  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1199  1.260     skrll 
   1200  1.300  christos 	DPRINTF("rev=0x%08jx control=0x%08jx command=0x%08jx",
   1201   1.41  augustss 		 OREAD4(sc, OHCI_REVISION),
   1202   1.41  augustss 		 OREAD4(sc, OHCI_CONTROL),
   1203  1.260     skrll 		 OREAD4(sc, OHCI_COMMAND_STATUS), 0);
   1204  1.300  christos 	DPRINTF("               intrstat=0x%08jx intre=0x%08jx intrd=0x%08jx",
   1205   1.41  augustss 		 OREAD4(sc, OHCI_INTERRUPT_STATUS),
   1206   1.41  augustss 		 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
   1207  1.260     skrll 		 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0);
   1208  1.300  christos 	DPRINTF("               hcca=0x%08jx percur=0x%08jx ctrlhd=0x%08jx",
   1209   1.41  augustss 		 OREAD4(sc, OHCI_HCCA),
   1210   1.41  augustss 		 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
   1211  1.260     skrll 		 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0);
   1212  1.300  christos 	DPRINTF("               ctrlcur=0x%08jx bulkhd=0x%08jx bulkcur=0x%08jx",
   1213   1.41  augustss 		 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
   1214   1.41  augustss 		 OREAD4(sc, OHCI_BULK_HEAD_ED),
   1215  1.260     skrll 		 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0);
   1216  1.300  christos 	DPRINTF("               done=0x%08jx fmival=0x%08jx fmrem=0x%08jx",
   1217   1.41  augustss 		 OREAD4(sc, OHCI_DONE_HEAD),
   1218   1.41  augustss 		 OREAD4(sc, OHCI_FM_INTERVAL),
   1219  1.260     skrll 		 OREAD4(sc, OHCI_FM_REMAINING), 0);
   1220  1.300  christos 	DPRINTF("               fmnum=0x%08jx perst=0x%08jx lsthrs=0x%08jx",
   1221   1.41  augustss 		 OREAD4(sc, OHCI_FM_NUMBER),
   1222   1.41  augustss 		 OREAD4(sc, OHCI_PERIODIC_START),
   1223  1.260     skrll 		 OREAD4(sc, OHCI_LS_THRESHOLD), 0);
   1224  1.300  christos 	DPRINTF("               desca=0x%08jx descb=0x%08jx stat=0x%08jx",
   1225   1.41  augustss 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
   1226   1.41  augustss 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
   1227  1.260     skrll 		 OREAD4(sc, OHCI_RH_STATUS), 0);
   1228  1.300  christos 	DPRINTF("               port1=0x%08jx port2=0x%08jx",
   1229   1.41  augustss 		 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
   1230  1.260     skrll 		 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0);
   1231  1.307  jakllsch 	usb_syncmem(&sc->sc_hccadma,
   1232  1.307  jakllsch 	    offsetof(struct ohci_hcca, hcca_frame_number),
   1233  1.307  jakllsch 	    sizeof(sc->sc_hcca->hcca_frame_number) +
   1234  1.307  jakllsch 	    sizeof(sc->sc_hcca->hcca_done_head),
   1235  1.307  jakllsch 	    BUS_DMASYNC_POSTREAD);
   1236  1.300  christos 	DPRINTF("         HCCA: frame_number=0x%04jx done_head=0x%08jx",
   1237  1.168  augustss 		 O32TOH(sc->sc_hcca->hcca_frame_number),
   1238  1.260     skrll 		 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0);
   1239    1.1  augustss }
   1240    1.1  augustss #endif
   1241    1.1  augustss 
   1242   1.91  augustss Static int ohci_intr1(ohci_softc_t *);
   1243   1.53  augustss 
   1244    1.1  augustss int
   1245   1.91  augustss ohci_intr(void *p)
   1246    1.1  augustss {
   1247    1.1  augustss 	ohci_softc_t *sc = p;
   1248  1.224       mrg 	int ret = 0;
   1249  1.111  augustss 
   1250  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1251  1.260     skrll 
   1252  1.224       mrg 	if (sc == NULL)
   1253  1.260     skrll 		return 0;
   1254   1.53  augustss 
   1255  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1256  1.224       mrg 
   1257  1.224       mrg 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1258  1.224       mrg 		goto done;
   1259  1.224       mrg 
   1260   1.53  augustss 	/* If we get an interrupt while polling, then just ignore it. */
   1261  1.260     skrll 	if (sc->sc_bus.ub_usepolling) {
   1262  1.260     skrll 		DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0);
   1263  1.154      joff 		/* for level triggered intrs, should do something to ack */
   1264  1.155     perry 		OWRITE4(sc, OHCI_INTERRUPT_STATUS,
   1265  1.154      joff 			OREAD4(sc, OHCI_INTERRUPT_STATUS));
   1266  1.155     perry 
   1267  1.224       mrg 		goto done;
   1268   1.57  augustss 	}
   1269   1.53  augustss 
   1270  1.224       mrg 	ret = ohci_intr1(sc);
   1271  1.224       mrg 
   1272  1.224       mrg done:
   1273  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1274  1.224       mrg 	return ret;
   1275   1.53  augustss }
   1276   1.53  augustss 
   1277   1.82  augustss Static int
   1278   1.91  augustss ohci_intr1(ohci_softc_t *sc)
   1279   1.53  augustss {
   1280  1.260     skrll 	uint32_t intrs, eintrs;
   1281    1.1  augustss 
   1282  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1283  1.105  augustss 
   1284   1.15  augustss 	/* In case the interrupt occurs before initialization has completed. */
   1285   1.34  augustss 	if (sc == NULL || sc->sc_hcca == NULL) {
   1286   1.15  augustss #ifdef DIAGNOSTIC
   1287   1.15  augustss 		printf("ohci_intr: sc->sc_hcca == NULL\n");
   1288   1.15  augustss #endif
   1289  1.260     skrll 		return 0;
   1290   1.15  augustss 	}
   1291   1.15  augustss 
   1292  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1293  1.224       mrg 
   1294  1.157   mycroft 	intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1295    1.1  augustss 	if (!intrs)
   1296  1.260     skrll 		return 0;
   1297   1.55  augustss 
   1298  1.260     skrll 	/* Acknowledge */
   1299  1.260     skrll 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH));
   1300    1.1  augustss 	eintrs = intrs & sc->sc_eintrs;
   1301  1.274  pgoyette 	DPRINTFN(7, "sc=%#jx", (uintptr_t)sc, 0, 0, 0);
   1302  1.274  pgoyette 	DPRINTFN(7, "intrs=%#jx(%#jx) eintrs=%#jx(%#jx)",
   1303  1.260     skrll 	    intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs,
   1304  1.260     skrll 	    sc->sc_eintrs);
   1305  1.211      matt 
   1306  1.211      matt 	if (!eintrs) {
   1307  1.260     skrll 		return 0;
   1308  1.211      matt 	}
   1309    1.1  augustss 
   1310    1.1  augustss 	if (eintrs & OHCI_SO) {
   1311  1.100  augustss 		sc->sc_overrun_cnt++;
   1312  1.100  augustss 		if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
   1313  1.100  augustss 			printf("%s: %u scheduling overruns\n",
   1314  1.190  drochner 			    device_xname(sc->sc_dev), sc->sc_overrun_cnt);
   1315  1.100  augustss 			sc->sc_overrun_cnt = 0;
   1316  1.100  augustss 		}
   1317    1.1  augustss 		/* XXX do what */
   1318  1.106  augustss 		eintrs &= ~OHCI_SO;
   1319    1.1  augustss 	}
   1320    1.1  augustss 	if (eintrs & OHCI_WDH) {
   1321  1.157   mycroft 		/*
   1322  1.157   mycroft 		 * We block the interrupt below, and reenable it later from
   1323  1.157   mycroft 		 * ohci_softintr().
   1324  1.157   mycroft 		 */
   1325   1.72  augustss 		usb_schedsoftintr(&sc->sc_bus);
   1326    1.1  augustss 	}
   1327    1.1  augustss 	if (eintrs & OHCI_RD) {
   1328  1.275     skrll 		DPRINTFN(5, "resume detect sc=%#jx", (uintptr_t)sc, 0, 0, 0);
   1329  1.190  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1330    1.1  augustss 		/* XXX process resume detect */
   1331    1.1  augustss 	}
   1332    1.1  augustss 	if (eintrs & OHCI_UE) {
   1333  1.275     skrll 		DPRINTFN(5, "unrecoverable error sc=%#jx", (uintptr_t)sc, 0, 0, 0);
   1334   1.15  augustss 		printf("%s: unrecoverable error, controller halted\n",
   1335  1.190  drochner 		       device_xname(sc->sc_dev));
   1336    1.1  augustss 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1337    1.1  augustss 		/* XXX what else */
   1338    1.1  augustss 	}
   1339    1.1  augustss 	if (eintrs & OHCI_RHSC) {
   1340  1.120  augustss 		/*
   1341  1.157   mycroft 		 * We block the interrupt below, and reenable it later from
   1342  1.157   mycroft 		 * a timeout.
   1343    1.1  augustss 		 */
   1344  1.224       mrg 		softint_schedule(sc->sc_rhsc_si);
   1345    1.1  augustss 	}
   1346    1.1  augustss 
   1347  1.106  augustss 	if (eintrs != 0) {
   1348  1.157   mycroft 		/* Block unprocessed interrupts. */
   1349  1.106  augustss 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
   1350  1.106  augustss 		sc->sc_eintrs &= ~eintrs;
   1351  1.299  christos 		DPRINTF("sc %#jx blocking intrs %#jx", (uintptr_t)sc,
   1352  1.274  pgoyette 		    eintrs, 0, 0);
   1353  1.106  augustss 	}
   1354    1.1  augustss 
   1355  1.260     skrll 	return 1;
   1356    1.1  augustss }
   1357    1.1  augustss 
   1358    1.1  augustss void
   1359  1.104  augustss ohci_rhsc_enable(void *v_sc)
   1360  1.104  augustss {
   1361  1.104  augustss 	ohci_softc_t *sc = v_sc;
   1362  1.104  augustss 
   1363  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1364  1.274  pgoyette 	DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0);
   1365  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1366  1.157   mycroft 	sc->sc_eintrs |= OHCI_RHSC;
   1367  1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
   1368  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1369    1.1  augustss }
   1370    1.1  augustss 
   1371   1.52  augustss #ifdef OHCI_DEBUG
   1372  1.166  drochner const char *ohci_cc_strs[] = {
   1373   1.13  augustss 	"NO_ERROR",
   1374   1.13  augustss 	"CRC",
   1375   1.13  augustss 	"BIT_STUFFING",
   1376   1.13  augustss 	"DATA_TOGGLE_MISMATCH",
   1377   1.13  augustss 	"STALL",
   1378   1.13  augustss 	"DEVICE_NOT_RESPONDING",
   1379   1.13  augustss 	"PID_CHECK_FAILURE",
   1380   1.13  augustss 	"UNEXPECTED_PID",
   1381   1.13  augustss 	"DATA_OVERRUN",
   1382   1.13  augustss 	"DATA_UNDERRUN",
   1383   1.13  augustss 	"BUFFER_OVERRUN",
   1384   1.13  augustss 	"BUFFER_UNDERRUN",
   1385   1.67  augustss 	"reserved",
   1386   1.67  augustss 	"reserved",
   1387   1.67  augustss 	"NOT_ACCESSED",
   1388   1.13  augustss 	"NOT_ACCESSED",
   1389   1.13  augustss };
   1390   1.13  augustss #endif
   1391   1.13  augustss 
   1392    1.1  augustss void
   1393  1.157   mycroft ohci_softintr(void *v)
   1394   1.83  augustss {
   1395  1.190  drochner 	struct usbd_bus *bus = v;
   1396  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1397  1.157   mycroft 	ohci_soft_itd_t *sitd, *sidone, *sitdnext;
   1398  1.157   mycroft 	ohci_soft_td_t  *std,  *sdone,  *stdnext;
   1399  1.260     skrll 	struct usbd_xfer *xfer;
   1400  1.157   mycroft 	struct ohci_pipe *opipe;
   1401  1.224       mrg 	int len, cc;
   1402  1.157   mycroft 	int i, j, actlen, iframes, uedir;
   1403  1.157   mycroft 	ohci_physaddr_t done;
   1404  1.157   mycroft 
   1405  1.286       mrg 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1406  1.224       mrg 
   1407  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1408  1.157   mycroft 
   1409  1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1410  1.195    bouyer 	    sizeof(sc->sc_hcca->hcca_done_head),
   1411  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1412  1.168  augustss 	done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
   1413  1.157   mycroft 	sc->sc_hcca->hcca_done_head = 0;
   1414  1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1415  1.195    bouyer 	    sizeof(sc->sc_hcca->hcca_done_head),
   1416  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1417  1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
   1418  1.157   mycroft 	sc->sc_eintrs |= OHCI_WDH;
   1419  1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
   1420   1.83  augustss 
   1421   1.83  augustss 	/* Reverse the done list. */
   1422   1.83  augustss 	for (sdone = NULL, sidone = NULL; done != 0; ) {
   1423   1.83  augustss 		std = ohci_hash_find_td(sc, done);
   1424   1.83  augustss 		if (std != NULL) {
   1425  1.195    bouyer 			usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1426  1.195    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1427   1.83  augustss 			std->dnext = sdone;
   1428  1.168  augustss 			done = O32TOH(std->td.td_nexttd);
   1429   1.83  augustss 			sdone = std;
   1430  1.274  pgoyette 			DPRINTFN(10, "add TD %#jx", (uintptr_t)std, 0, 0, 0);
   1431   1.83  augustss 			continue;
   1432   1.83  augustss 		}
   1433   1.83  augustss 		sitd = ohci_hash_find_itd(sc, done);
   1434   1.83  augustss 		if (sitd != NULL) {
   1435  1.195    bouyer 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   1436  1.195    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1437   1.83  augustss 			sitd->dnext = sidone;
   1438  1.168  augustss 			done = O32TOH(sitd->itd.itd_nextitd);
   1439   1.83  augustss 			sidone = sitd;
   1440  1.274  pgoyette 			DPRINTFN(5, "add ITD %#jx", (uintptr_t)sitd, 0, 0, 0);
   1441   1.83  augustss 			continue;
   1442   1.83  augustss 		}
   1443  1.274  pgoyette 		DPRINTFN(10, "addr %#jx not found", (uintptr_t)done, 0, 0, 0);
   1444  1.300  christos 		device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
   1445  1.218  jmcneill 		    (u_long)done);
   1446  1.218  jmcneill 		break;
   1447   1.83  augustss 	}
   1448   1.83  augustss 
   1449  1.274  pgoyette 	DPRINTFN(10, "sdone=%#jx sidone=%#jx", (uintptr_t)sdone,
   1450  1.274  pgoyette 	    (uintptr_t)sidone, 0, 0);
   1451  1.260     skrll 	DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0);
   1452   1.52  augustss #ifdef OHCI_DEBUG
   1453  1.260     skrll 	if (ohcidebug >= 10) {
   1454  1.234     skrll 		for (std = sdone; std; std = std->dnext)
   1455  1.258     skrll 			ohci_dump_td(sc, std);
   1456    1.1  augustss 	}
   1457    1.1  augustss #endif
   1458  1.260     skrll 	DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0);
   1459    1.1  augustss 
   1460   1.48  augustss 	for (std = sdone; std; std = stdnext) {
   1461   1.53  augustss 		xfer = std->xfer;
   1462   1.48  augustss 		stdnext = std->dnext;
   1463  1.274  pgoyette 		DPRINTFN(10, "std=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)std,
   1464  1.274  pgoyette 		    (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0),
   1465  1.274  pgoyette 		    0);
   1466   1.71  augustss 		if (xfer == NULL) {
   1467  1.117  augustss 			/*
   1468  1.117  augustss 			 * xfer == NULL: There seems to be no xfer associated
   1469   1.71  augustss 			 * with this TD. It is tailp that happened to end up on
   1470   1.71  augustss 			 * the done queue.
   1471  1.117  augustss 			 * Shouldn't happen, but some chips are broken(?).
   1472   1.71  augustss 			 */
   1473   1.71  augustss 			continue;
   1474   1.71  augustss 		}
   1475  1.282       mrg 
   1476  1.282       mrg 		/*
   1477  1.293  riastrad 		 * Try to claim this xfer for completion.  If it has
   1478  1.293  riastrad 		 * already completed or aborted, drop it on the floor.
   1479  1.282       mrg 		 */
   1480  1.293  riastrad 		if (!usbd_xfer_trycomplete(xfer))
   1481   1.83  augustss 			continue;
   1482  1.141   mycroft 
   1483  1.141   mycroft 		len = std->len;
   1484  1.141   mycroft 		if (std->td.td_cbp != 0)
   1485  1.168  augustss 			len -= O32TOH(std->td.td_be) -
   1486  1.168  augustss 			       O32TOH(std->td.td_cbp) + 1;
   1487  1.299  christos 		DPRINTFN(10, "len=%jd, flags=%#jx", len, std->flags, 0, 0);
   1488  1.141   mycroft 		if (std->flags & OHCI_ADD_LEN)
   1489  1.260     skrll 			xfer->ux_actlen += len;
   1490  1.141   mycroft 
   1491  1.168  augustss 		cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
   1492   1.83  augustss 		if (cc == OHCI_CC_NO_ERROR) {
   1493  1.260     skrll 			ohci_hash_rem_td(sc, std);
   1494   1.34  augustss 			if (std->flags & OHCI_CALL_DONE) {
   1495  1.260     skrll 				xfer->ux_status = USBD_NORMAL_COMPLETION;
   1496   1.53  augustss 				usb_transfer_complete(xfer);
   1497   1.21  augustss 			}
   1498    1.1  augustss 		} else {
   1499   1.48  augustss 			/*
   1500   1.48  augustss 			 * Endpoint is halted.  First unlink all the TDs
   1501   1.48  augustss 			 * belonging to the failed transfer, and then restart
   1502   1.48  augustss 			 * the endpoint.
   1503   1.48  augustss 			 */
   1504    1.1  augustss 			ohci_soft_td_t *p, *n;
   1505  1.260     skrll 			opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1506   1.48  augustss 
   1507  1.274  pgoyette 			DPRINTFN(10, "error cc=%jd", cc, 0, 0, 0);
   1508   1.48  augustss 
   1509  1.260     skrll 			/* remove xfer's TDs from the hash */
   1510   1.53  augustss 			for (p = std; p->xfer == xfer; p = n) {
   1511    1.1  augustss 				n = p->nexttd;
   1512  1.260     skrll 				ohci_hash_rem_td(sc, p);
   1513    1.1  augustss 			}
   1514   1.48  augustss 
   1515  1.260     skrll 			ohci_soft_ed_t *sed = opipe->sed;
   1516  1.260     skrll 
   1517  1.291      gson 			/* clear halt and TD chain, preserving toggle carry */
   1518  1.291      gson 			sed->ed.ed_headp = HTOO32(p->physaddr |
   1519  1.291      gson 			    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
   1520  1.260     skrll 			usb_syncmem(&sed->dma,
   1521  1.260     skrll 			    sed->offs + offsetof(ohci_ed_t, ed_headp),
   1522  1.260     skrll 			    sizeof(sed->ed.ed_headp),
   1523  1.260     skrll 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1524  1.260     skrll 
   1525    1.1  augustss 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1526   1.48  augustss 
   1527  1.260     skrll 			if (cc == OHCI_CC_DATA_UNDERRUN)
   1528  1.260     skrll 				xfer->ux_status = USBD_NORMAL_COMPLETION;
   1529  1.260     skrll 			else if (cc == OHCI_CC_STALL)
   1530  1.260     skrll 				xfer->ux_status = USBD_STALLED;
   1531    1.1  augustss 			else
   1532  1.260     skrll 				xfer->ux_status = USBD_IOERROR;
   1533   1.53  augustss 			usb_transfer_complete(xfer);
   1534    1.1  augustss 		}
   1535    1.1  augustss 	}
   1536  1.260     skrll 	DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0);
   1537   1.83  augustss #ifdef OHCI_DEBUG
   1538  1.260     skrll 	if (ohcidebug >= 10) {
   1539  1.234     skrll 		for (sitd = sidone; sitd; sitd = sitd->dnext)
   1540  1.258     skrll 			ohci_dump_itd(sc, sitd);
   1541   1.83  augustss 	}
   1542   1.83  augustss #endif
   1543  1.260     skrll 	DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0);
   1544   1.83  augustss 
   1545   1.83  augustss 	for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
   1546   1.83  augustss 		xfer = sitd->xfer;
   1547   1.83  augustss 		sitdnext = sitd->dnext;
   1548  1.274  pgoyette 		DPRINTFN(1, "sitd=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)sitd,
   1549  1.274  pgoyette 		    (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0),
   1550  1.274  pgoyette 		    0);
   1551   1.83  augustss 		if (xfer == NULL)
   1552   1.83  augustss 			continue;
   1553  1.282       mrg 
   1554  1.282       mrg 		/*
   1555  1.293  riastrad 		 * Try to claim this xfer for completion.  If it has
   1556  1.293  riastrad 		 * already completed or aborted, drop it on the floor.
   1557  1.282       mrg 		 */
   1558  1.293  riastrad 		if (!usbd_xfer_trycomplete(xfer))
   1559   1.83  augustss 			continue;
   1560  1.282       mrg 
   1561  1.260     skrll 		KASSERT(!sitd->isdone);
   1562   1.83  augustss #ifdef DIAGNOSTIC
   1563  1.260     skrll 		sitd->isdone = true;
   1564   1.83  augustss #endif
   1565  1.134    toshii 		if (sitd->flags & OHCI_CALL_DONE) {
   1566  1.134    toshii 			ohci_soft_itd_t *next;
   1567  1.134    toshii 
   1568  1.260     skrll 			opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1569  1.260     skrll 			opipe->isoc.inuse -= xfer->ux_nframes;
   1570  1.260     skrll 			uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->
   1571  1.134    toshii 			    bEndpointAddress);
   1572  1.260     skrll 			xfer->ux_status = USBD_NORMAL_COMPLETION;
   1573  1.134    toshii 			actlen = 0;
   1574  1.260     skrll 			for (i = 0, sitd = xfer->ux_hcpriv;;
   1575  1.134    toshii 			    sitd = next) {
   1576  1.134    toshii 				next = sitd->nextitd;
   1577  1.168  augustss 				if (OHCI_ITD_GET_CC(O32TOH(sitd->
   1578  1.135    toshii 				    itd.itd_flags)) != OHCI_CC_NO_ERROR)
   1579  1.260     skrll 					xfer->ux_status = USBD_IOERROR;
   1580  1.134    toshii 				/* For input, update frlengths with actual */
   1581  1.134    toshii 				/* XXX anything necessary for output? */
   1582  1.134    toshii 				if (uedir == UE_DIR_IN &&
   1583  1.260     skrll 				    xfer->ux_status == USBD_NORMAL_COMPLETION) {
   1584  1.168  augustss 					iframes = OHCI_ITD_GET_FC(O32TOH(
   1585  1.135    toshii 					    sitd->itd.itd_flags));
   1586  1.134    toshii 					for (j = 0; j < iframes; i++, j++) {
   1587  1.168  augustss 						len = O16TOH(sitd->
   1588  1.134    toshii 						    itd.itd_offset[j]);
   1589  1.158    toshii 						if ((OHCI_ITD_PSW_GET_CC(len) &
   1590  1.158    toshii 						    OHCI_CC_NOT_ACCESSED_MASK)
   1591  1.158    toshii 						    == OHCI_CC_NOT_ACCESSED)
   1592  1.158    toshii 							len = 0;
   1593  1.158    toshii 						else
   1594  1.158    toshii 							len = OHCI_ITD_PSW_LENGTH(len);
   1595  1.260     skrll 						xfer->ux_frlengths[i] = len;
   1596  1.134    toshii 						actlen += len;
   1597  1.134    toshii 					}
   1598  1.134    toshii 				}
   1599  1.134    toshii 				if (sitd->flags & OHCI_CALL_DONE)
   1600  1.134    toshii 					break;
   1601  1.260     skrll 				ohci_hash_rem_itd(sc, sitd);
   1602  1.260     skrll 
   1603   1.83  augustss 			}
   1604  1.260     skrll 			ohci_hash_rem_itd(sc, sitd);
   1605  1.134    toshii 			if (uedir == UE_DIR_IN &&
   1606  1.260     skrll 			    xfer->ux_status == USBD_NORMAL_COMPLETION)
   1607  1.260     skrll 				xfer->ux_actlen = actlen;
   1608  1.260     skrll 			xfer->ux_hcpriv = NULL;
   1609  1.134    toshii 
   1610   1.83  augustss 			usb_transfer_complete(xfer);
   1611   1.83  augustss 		}
   1612   1.83  augustss 	}
   1613   1.83  augustss 
   1614  1.260     skrll 	DPRINTFN(10, "done", 0, 0, 0, 0);
   1615  1.286       mrg 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1616    1.1  augustss }
   1617    1.1  augustss 
   1618    1.1  augustss void
   1619  1.260     skrll ohci_device_ctrl_done(struct usbd_xfer *xfer)
   1620    1.1  augustss {
   1621  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1622  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1623  1.260     skrll 	int len = UGETW(xfer->ux_request.wLength);
   1624  1.260     skrll 	int isread = (xfer->ux_request.bmRequestType & UT_READ);
   1625  1.195    bouyer 
   1626  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1627  1.274  pgoyette 	DPRINTFN(10, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   1628    1.1  augustss 
   1629  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1630  1.260     skrll 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   1631  1.224       mrg 
   1632  1.195    bouyer 	if (len)
   1633  1.260     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   1634  1.195    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1635  1.260     skrll 	usb_syncmem(&opipe->ctrl.reqdma, 0,
   1636  1.260     skrll 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   1637    1.1  augustss }
   1638    1.1  augustss 
   1639    1.1  augustss void
   1640  1.260     skrll ohci_device_intr_done(struct usbd_xfer *xfer)
   1641    1.1  augustss {
   1642  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1643  1.195    bouyer 	int isread =
   1644  1.260     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1645    1.1  augustss 
   1646  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1647  1.274  pgoyette 	DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer,
   1648  1.274  pgoyette 	    xfer->ux_actlen, 0, 0);
   1649    1.1  augustss 
   1650  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1651  1.224       mrg 
   1652  1.260     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1653  1.195    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1654    1.1  augustss }
   1655    1.1  augustss 
   1656    1.1  augustss void
   1657  1.260     skrll ohci_device_bulk_done(struct usbd_xfer *xfer)
   1658    1.3  augustss {
   1659  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1660  1.260     skrll 
   1661  1.195    bouyer 	int isread =
   1662  1.260     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1663  1.195    bouyer 
   1664  1.290       mrg 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1665  1.224       mrg 
   1666  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1667  1.274  pgoyette 	DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, xfer->ux_actlen,
   1668  1.274  pgoyette 	    0, 0);
   1669  1.260     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1670  1.195    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1671    1.3  augustss }
   1672    1.3  augustss 
   1673  1.224       mrg Static void
   1674  1.224       mrg ohci_rhsc_softint(void *arg)
   1675  1.224       mrg {
   1676  1.224       mrg 	ohci_softc_t *sc = arg;
   1677  1.224       mrg 
   1678  1.224       mrg 	mutex_enter(&sc->sc_lock);
   1679  1.224       mrg 
   1680  1.224       mrg 	ohci_rhsc(sc, sc->sc_intrxfer);
   1681  1.224       mrg 
   1682  1.224       mrg 	/* Do not allow RHSC interrupts > 1 per second */
   1683  1.224       mrg 	callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
   1684  1.224       mrg 
   1685  1.224       mrg 	mutex_exit(&sc->sc_lock);
   1686  1.224       mrg }
   1687  1.224       mrg 
   1688    1.3  augustss void
   1689  1.260     skrll ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer)
   1690    1.1  augustss {
   1691    1.1  augustss 	u_char *p;
   1692    1.1  augustss 	int i, m;
   1693  1.243    martin 	int hstatus __unused;
   1694  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1695    1.1  augustss 
   1696  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1697  1.224       mrg 
   1698    1.1  augustss 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
   1699  1.300  christos 	DPRINTF("sc=%#jx xfer=%#jx hstatus=0x%08jx", (uintptr_t)sc,
   1700  1.274  pgoyette 	    (uintptr_t)xfer, hstatus, 0);
   1701    1.1  augustss 
   1702   1.53  augustss 	if (xfer == NULL) {
   1703    1.1  augustss 		/* Just ignore the change. */
   1704    1.1  augustss 		return;
   1705    1.1  augustss 	}
   1706  1.295  riastrad 	KASSERT(xfer == sc->sc_intrxfer);
   1707  1.295  riastrad 	KASSERT(xfer->ux_status == USBD_IN_PROGRESS);
   1708    1.1  augustss 
   1709  1.260     skrll 	p = xfer->ux_buf;
   1710  1.285  riastrad 	m = uimin(sc->sc_noport, xfer->ux_length * 8 - 1);
   1711  1.260     skrll 	memset(p, 0, xfer->ux_length);
   1712    1.1  augustss 	for (i = 1; i <= m; i++) {
   1713   1.87  augustss 		/* Pick out CHANGE bits from the status reg. */
   1714    1.1  augustss 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
   1715    1.1  augustss 			p[i/8] |= 1 << (i%8);
   1716    1.1  augustss 	}
   1717  1.300  christos 	DPRINTF("change=0x%02jx", *p, 0, 0, 0);
   1718  1.294  riastrad 	KASSERT(xfer->ux_status == USBD_IN_PROGRESS);
   1719  1.260     skrll 	xfer->ux_actlen = xfer->ux_length;
   1720  1.260     skrll 	xfer->ux_status = USBD_NORMAL_COMPLETION;
   1721    1.1  augustss 
   1722   1.53  augustss 	usb_transfer_complete(xfer);
   1723   1.38  augustss }
   1724   1.38  augustss 
   1725   1.38  augustss void
   1726  1.260     skrll ohci_root_intr_done(struct usbd_xfer *xfer)
   1727   1.65  augustss {
   1728  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   1729  1.260     skrll 
   1730  1.260     skrll 	KASSERT(mutex_owned(&sc->sc_lock));
   1731   1.65  augustss 
   1732  1.294  riastrad 	/* Claim the xfer so it doesn't get completed again.  */
   1733  1.260     skrll 	KASSERT(sc->sc_intrxfer == xfer);
   1734  1.294  riastrad 	KASSERT(xfer->ux_status != USBD_IN_PROGRESS);
   1735  1.260     skrll 	sc->sc_intrxfer = NULL;
   1736    1.1  augustss }
   1737    1.1  augustss 
   1738    1.5  augustss void
   1739   1.91  augustss ohci_poll(struct usbd_bus *bus)
   1740    1.5  augustss {
   1741  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1742  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1743  1.260     skrll 
   1744  1.105  augustss #ifdef OHCI_DEBUG
   1745  1.105  augustss 	static int last;
   1746  1.105  augustss 	int new;
   1747  1.105  augustss 	new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1748  1.105  augustss 	if (new != last) {
   1749  1.300  christos 		DPRINTFN(10, "intrs=0x%04jx", new, 0, 0, 0);
   1750  1.105  augustss 		last = new;
   1751  1.105  augustss 	}
   1752  1.105  augustss #endif
   1753  1.217  jmcneill 	sc->sc_eintrs |= OHCI_WDH;
   1754  1.224       mrg 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
   1755  1.224       mrg 		mutex_spin_enter(&sc->sc_intr_lock);
   1756   1.53  augustss 		ohci_intr1(sc);
   1757  1.224       mrg 		mutex_spin_exit(&sc->sc_intr_lock);
   1758  1.224       mrg 	}
   1759    1.1  augustss }
   1760    1.1  augustss 
   1761  1.260     skrll /*
   1762  1.260     skrll  * Add an ED to the schedule.  Called with USB lock held.
   1763  1.260     skrll  */
   1764  1.260     skrll Static void
   1765  1.260     skrll ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1766    1.1  augustss {
   1767  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1768  1.274  pgoyette 	DPRINTFN(8, "sed=%#jx head=%#jx", (uintptr_t)sed, (uintptr_t)head, 0,
   1769  1.274  pgoyette 	    0);
   1770  1.224       mrg 
   1771  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1772    1.1  augustss 
   1773  1.260     skrll 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1774  1.260     skrll 	    sizeof(head->ed.ed_nexted),
   1775  1.260     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1776  1.260     skrll 	sed->next = head->next;
   1777  1.260     skrll 	sed->ed.ed_nexted = head->ed.ed_nexted;
   1778  1.260     skrll 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1779  1.260     skrll 	    sizeof(sed->ed.ed_nexted),
   1780  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1781  1.260     skrll 	head->next = sed;
   1782  1.260     skrll 	head->ed.ed_nexted = HTOO32(sed->physaddr);
   1783  1.260     skrll 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1784  1.260     skrll 	    sizeof(head->ed.ed_nexted),
   1785  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1786  1.260     skrll }
   1787    1.1  augustss 
   1788  1.260     skrll /*
   1789  1.260     skrll  * Remove an ED from the schedule.  Called with USB lock held.
   1790  1.260     skrll  */
   1791  1.260     skrll Static void
   1792  1.260     skrll ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1793  1.260     skrll {
   1794  1.260     skrll 	ohci_soft_ed_t *p;
   1795    1.1  augustss 
   1796  1.260     skrll 	KASSERT(mutex_owned(&sc->sc_lock));
   1797    1.1  augustss 
   1798  1.260     skrll 	/* XXX */
   1799  1.260     skrll 	for (p = head; p != NULL && p->next != sed; p = p->next)
   1800    1.3  augustss 		;
   1801  1.255     skrll 	KASSERT(p != NULL);
   1802  1.255     skrll 
   1803  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1804  1.195    bouyer 	    sizeof(sed->ed.ed_nexted),
   1805  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1806    1.3  augustss 	p->next = sed->next;
   1807   1.39  augustss 	p->ed.ed_nexted = sed->ed.ed_nexted;
   1808  1.195    bouyer 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   1809  1.195    bouyer 	    sizeof(p->ed.ed_nexted),
   1810  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1811    1.3  augustss }
   1812    1.3  augustss 
   1813    1.3  augustss /*
   1814    1.1  augustss  * When a transfer is completed the TD is added to the done queue by
   1815    1.1  augustss  * the host controller.  This queue is the processed by software.
   1816    1.1  augustss  * Unfortunately the queue contains the physical address of the TD
   1817    1.9  augustss  * and we have no simple way to translate this back to a kernel address.
   1818    1.1  augustss  * To make the translation possible (and fast) we use a hash table of
   1819    1.1  augustss  * TDs currently in the schedule.  The physical address is used as the
   1820    1.1  augustss  * hash value.
   1821    1.1  augustss  */
   1822    1.1  augustss 
   1823    1.1  augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
   1824  1.224       mrg /* Called with USB lock held. */
   1825    1.1  augustss void
   1826   1.91  augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1827    1.1  augustss {
   1828    1.1  augustss 	int h = HASH(std->physaddr);
   1829    1.1  augustss 
   1830  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1831  1.224       mrg 
   1832    1.1  augustss 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
   1833    1.1  augustss }
   1834    1.1  augustss 
   1835  1.224       mrg /* Called with USB lock held. */
   1836    1.1  augustss void
   1837  1.179  christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1838    1.1  augustss {
   1839   1.46  augustss 
   1840  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1841  1.224       mrg 
   1842    1.1  augustss 	LIST_REMOVE(std, hnext);
   1843    1.1  augustss }
   1844    1.1  augustss 
   1845    1.1  augustss ohci_soft_td_t *
   1846   1.91  augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
   1847    1.1  augustss {
   1848    1.1  augustss 	int h = HASH(a);
   1849    1.1  augustss 	ohci_soft_td_t *std;
   1850    1.1  augustss 
   1851  1.120  augustss 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
   1852   1.53  augustss 	     std != NULL;
   1853    1.1  augustss 	     std = LIST_NEXT(std, hnext))
   1854    1.1  augustss 		if (std->physaddr == a)
   1855  1.260     skrll 			return std;
   1856  1.260     skrll 	return NULL;
   1857   1.83  augustss }
   1858   1.83  augustss 
   1859  1.224       mrg /* Called with USB lock held. */
   1860   1.83  augustss void
   1861   1.91  augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1862   1.83  augustss {
   1863   1.83  augustss 	int h = HASH(sitd->physaddr);
   1864   1.83  augustss 
   1865  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1866  1.260     skrll 
   1867  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1868  1.224       mrg 
   1869  1.300  christos 	DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx",
   1870  1.274  pgoyette 	    (uintptr_t)sitd, (u_long)sitd->physaddr, 0, 0);
   1871   1.83  augustss 
   1872   1.83  augustss 	LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
   1873   1.83  augustss }
   1874   1.83  augustss 
   1875  1.224       mrg /* Called with USB lock held. */
   1876   1.83  augustss void
   1877  1.179  christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1878   1.83  augustss {
   1879   1.83  augustss 
   1880  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1881  1.260     skrll 
   1882  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1883  1.224       mrg 
   1884  1.300  christos 	DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx", (uintptr_t)sitd,
   1885  1.274  pgoyette 	    sitd->physaddr, 0, 0);
   1886   1.83  augustss 
   1887   1.83  augustss 	LIST_REMOVE(sitd, hnext);
   1888   1.83  augustss }
   1889   1.83  augustss 
   1890   1.83  augustss ohci_soft_itd_t *
   1891   1.91  augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
   1892   1.83  augustss {
   1893   1.83  augustss 	int h = HASH(a);
   1894   1.83  augustss 	ohci_soft_itd_t *sitd;
   1895   1.83  augustss 
   1896  1.120  augustss 	for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
   1897   1.83  augustss 	     sitd != NULL;
   1898   1.83  augustss 	     sitd = LIST_NEXT(sitd, hnext))
   1899   1.83  augustss 		if (sitd->physaddr == a)
   1900  1.260     skrll 			return sitd;
   1901  1.260     skrll 	return NULL;
   1902    1.1  augustss }
   1903    1.1  augustss 
   1904   1.52  augustss #ifdef OHCI_DEBUG
   1905    1.1  augustss void
   1906  1.168  augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
   1907    1.1  augustss {
   1908  1.260     skrll 	for (; std; std = std->nexttd) {
   1909  1.168  augustss 		ohci_dump_td(sc, std);
   1910  1.260     skrll 		KASSERTMSG(std->nexttd == NULL || std != std->nexttd,
   1911  1.260     skrll 		    "std %p next %p", std, std->nexttd);
   1912  1.260     skrll 	}
   1913    1.1  augustss }
   1914    1.1  augustss 
   1915    1.1  augustss void
   1916  1.168  augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1917    1.1  augustss {
   1918  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1919   1.92        tv 
   1920  1.204    martin 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1921  1.204    martin 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1922  1.260     skrll 
   1923  1.260     skrll 	uint32_t flags = O32TOH(std->td.td_flags);
   1924  1.300  christos 	DPRINTF("TD(%#jx) at 0x%08jx:", (uintptr_t)std, std->physaddr, 0, 0);
   1925  1.274  pgoyette 	DPRINTF("    round=%jd DP=%jx DI=%jx T=%jx",
   1926  1.260     skrll 	    !!(flags & OHCI_TD_R),
   1927  1.260     skrll 	    __SHIFTOUT(flags, OHCI_TD_DP_MASK),
   1928  1.260     skrll 	    OHCI_TD_GET_DI(flags),
   1929  1.260     skrll 	    __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK));
   1930  1.274  pgoyette 	DPRINTF("    EC=%jd CC=%jd", OHCI_TD_GET_EC(flags),
   1931  1.274  pgoyette 	    OHCI_TD_GET_CC(flags), 0, 0);
   1932  1.300  christos 	DPRINTF("    td_cbp=0x%08jx td_nexttd=0x%08jx td_be=0x%08jx",
   1933  1.168  augustss 	       (u_long)O32TOH(std->td.td_cbp),
   1934  1.168  augustss 	       (u_long)O32TOH(std->td.td_nexttd),
   1935  1.260     skrll 	       (u_long)O32TOH(std->td.td_be), 0);
   1936    1.1  augustss }
   1937    1.1  augustss 
   1938    1.1  augustss void
   1939  1.168  augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1940   1.83  augustss {
   1941  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1942   1.83  augustss 
   1943  1.195    bouyer 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   1944  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1945  1.260     skrll 
   1946  1.260     skrll 	uint32_t flags = O32TOH(sitd->itd.itd_flags);
   1947  1.300  christos 	DPRINTF("ITD(%#jx) at 0x%08jx", (uintptr_t)sitd, sitd->physaddr, 0, 0);
   1948  1.274  pgoyette 	DPRINTF("    sf=%jd di=%jd fc=%jd cc=%jd",
   1949  1.260     skrll 	    OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags),
   1950  1.260     skrll 	    OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags));
   1951  1.300  christos 	DPRINTF("    bp0=0x%08jx next=0x%08jx be=0x%08jx",
   1952  1.260     skrll 	    O32TOH(sitd->itd.itd_bp0),
   1953  1.260     skrll 	    O32TOH(sitd->itd.itd_nextitd),
   1954  1.260     skrll 	    O32TOH(sitd->itd.itd_be), 0);
   1955  1.260     skrll 	CTASSERT(OHCI_ITD_NOFFSET == 8);
   1956  1.300  christos 	DPRINTF("    offs[0] = 0x%04jx  offs[1] = 0x%04jx  "
   1957  1.300  christos 	    "offs[2] = 0x%04jx  offs[3] = 0x%04jx",
   1958  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[0]),
   1959  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[1]),
   1960  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[2]),
   1961  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[3]));
   1962  1.300  christos 	DPRINTF("    offs[4] = 0x%04jx  offs[5] = 0x%04jx  "
   1963  1.300  christos 	    "offs[6] = 0x%04jx  offs[7] = 0x%04jx",
   1964  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[4]),
   1965  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[5]),
   1966  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[6]),
   1967  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[7]));
   1968   1.83  augustss }
   1969   1.83  augustss 
   1970   1.83  augustss void
   1971  1.168  augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1972   1.83  augustss {
   1973   1.83  augustss 	for (; sitd; sitd = sitd->nextitd)
   1974  1.168  augustss 		ohci_dump_itd(sc, sitd);
   1975   1.83  augustss }
   1976   1.83  augustss 
   1977   1.83  augustss void
   1978  1.168  augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
   1979    1.1  augustss {
   1980  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1981   1.92        tv 
   1982  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   1983  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1984  1.260     skrll 
   1985  1.260     skrll 	uint32_t flags = O32TOH(sed->ed.ed_flags);
   1986  1.300  christos 	DPRINTF("ED(%#jx) at 0x%08jx:", (uintptr_t)sed, sed->physaddr, 0, 0);
   1987  1.274  pgoyette 	DPRINTF("    addr=%jd endpt=%jd maxp=%jd",
   1988  1.260     skrll 	    OHCI_ED_GET_FA(flags),
   1989  1.260     skrll 	    OHCI_ED_GET_EN(flags),
   1990  1.260     skrll 	    OHCI_ED_GET_MAXP(flags),
   1991  1.260     skrll 	    0);
   1992  1.274  pgoyette 	DPRINTF("    dir=%jd speed=%jd skip=%jd iso=%jd",
   1993  1.260     skrll 	   __SHIFTOUT(flags, OHCI_ED_DIR_MASK),
   1994  1.260     skrll 	    !!(flags & OHCI_ED_SPEED),
   1995  1.260     skrll 	    !!(flags & OHCI_ED_SKIP),
   1996  1.260     skrll 	    !!(flags & OHCI_ED_FORMAT_ISO));
   1997  1.300  christos 	DPRINTF("    tailp=0x%08jx", (u_long)O32TOH(sed->ed.ed_tailp),
   1998  1.260     skrll 	    0, 0, 0);
   1999  1.300  christos 	DPRINTF("    headp=0x%08jx nexted=0x%08jx halted=%jd carry=%jd",
   2000  1.260     skrll 	    O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted),
   2001  1.260     skrll 	    !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED),
   2002  1.260     skrll 	    !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
   2003    1.1  augustss }
   2004    1.1  augustss #endif
   2005    1.1  augustss 
   2006    1.1  augustss usbd_status
   2007  1.260     skrll ohci_open(struct usbd_pipe *pipe)
   2008    1.1  augustss {
   2009  1.260     skrll 	struct usbd_device *dev = pipe->up_dev;
   2010  1.260     skrll 	struct usbd_bus *bus = dev->ud_bus;
   2011  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2012  1.260     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
   2013  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2014  1.260     skrll 	uint8_t addr = dev->ud_addr;
   2015  1.260     skrll 	uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   2016    1.1  augustss 	ohci_soft_ed_t *sed;
   2017    1.1  augustss 	ohci_soft_td_t *std;
   2018   1.60  augustss 	ohci_soft_itd_t *sitd;
   2019   1.60  augustss 	ohci_physaddr_t tdphys;
   2020  1.260     skrll 	uint32_t fmt;
   2021  1.224       mrg 	usbd_status err = USBD_NOMEM;
   2022   1.64  augustss 	int ival;
   2023    1.1  augustss 
   2024  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2025  1.274  pgoyette 	DPRINTFN(1, "pipe=%#jx, addr=%jd, endpt=%jd (%jd)", (uintptr_t)pipe,
   2026  1.274  pgoyette 	    addr, ed->bEndpointAddress, bus->ub_rhaddr);
   2027   1.81  augustss 
   2028  1.224       mrg 	if (sc->sc_dying) {
   2029  1.241     skrll 		return USBD_IOERROR;
   2030  1.224       mrg 	}
   2031  1.116  augustss 
   2032   1.90   thorpej 	std = NULL;
   2033   1.90   thorpej 	sed = NULL;
   2034   1.90   thorpej 
   2035  1.260     skrll 	if (addr == bus->ub_rhaddr) {
   2036    1.1  augustss 		switch (ed->bEndpointAddress) {
   2037    1.1  augustss 		case USB_CONTROL_ENDPOINT:
   2038  1.260     skrll 			pipe->up_methods = &roothub_ctrl_methods;
   2039    1.1  augustss 			break;
   2040  1.260     skrll 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
   2041  1.260     skrll 			pipe->up_methods = &ohci_root_intr_methods;
   2042    1.1  augustss 			break;
   2043    1.1  augustss 		default:
   2044  1.224       mrg 			err = USBD_INVAL;
   2045  1.241     skrll 			goto bad;
   2046    1.1  augustss 		}
   2047    1.1  augustss 	} else {
   2048    1.1  augustss 		sed = ohci_alloc_sed(sc);
   2049   1.53  augustss 		if (sed == NULL)
   2050  1.241     skrll 			goto bad;
   2051    1.1  augustss 		opipe->sed = sed;
   2052   1.60  augustss 		if (xfertype == UE_ISOCHRONOUS) {
   2053   1.60  augustss 			sitd = ohci_alloc_sitd(sc);
   2054  1.127  augustss 			if (sitd == NULL)
   2055  1.241     skrll 				goto bad;
   2056  1.241     skrll 
   2057   1.60  augustss 			opipe->tail.itd = sitd;
   2058   1.76   tsutsui 			tdphys = sitd->physaddr;
   2059   1.60  augustss 			fmt = OHCI_ED_FORMAT_ISO;
   2060   1.83  augustss 			if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
   2061   1.83  augustss 				fmt |= OHCI_ED_DIR_IN;
   2062   1.83  augustss 			else
   2063   1.83  augustss 				fmt |= OHCI_ED_DIR_OUT;
   2064   1.60  augustss 		} else {
   2065   1.60  augustss 			std = ohci_alloc_std(sc);
   2066  1.127  augustss 			if (std == NULL)
   2067  1.241     skrll 				goto bad;
   2068  1.241     skrll 
   2069   1.60  augustss 			opipe->tail.td = std;
   2070   1.76   tsutsui 			tdphys = std->physaddr;
   2071   1.83  augustss 			fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
   2072   1.60  augustss 		}
   2073  1.168  augustss 		sed->ed.ed_flags = HTOO32(
   2074  1.120  augustss 			OHCI_ED_SET_FA(addr) |
   2075  1.147   mycroft 			OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
   2076  1.260     skrll 			(dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
   2077  1.109  augustss 			fmt |
   2078   1.16  augustss 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
   2079  1.214  jakllsch 		sed->ed.ed_headp = HTOO32(tdphys |
   2080  1.260     skrll 		    (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0));
   2081  1.214  jakllsch 		sed->ed.ed_tailp = HTOO32(tdphys);
   2082  1.195    bouyer 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2083  1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2084    1.1  augustss 
   2085   1.60  augustss 		switch (xfertype) {
   2086    1.1  augustss 		case UE_CONTROL:
   2087  1.260     skrll 			pipe->up_methods = &ohci_device_ctrl_methods;
   2088  1.120  augustss 			err = usb_allocmem(&sc->sc_bus,
   2089  1.301     skrll 			    sizeof(usb_device_request_t), 0,
   2090  1.301     skrll 			    USBMALLOC_COHERENT, &opipe->ctrl.reqdma);
   2091   1.53  augustss 			if (err)
   2092    1.1  augustss 				goto bad;
   2093  1.224       mrg 			mutex_enter(&sc->sc_lock);
   2094  1.168  augustss 			ohci_add_ed(sc, sed, sc->sc_ctrl_head);
   2095  1.224       mrg 			mutex_exit(&sc->sc_lock);
   2096    1.1  augustss 			break;
   2097    1.1  augustss 		case UE_INTERRUPT:
   2098  1.260     skrll 			pipe->up_methods = &ohci_device_intr_methods;
   2099  1.260     skrll 			ival = pipe->up_interval;
   2100   1.64  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   2101   1.64  augustss 				ival = ed->bInterval;
   2102  1.226     skrll 			err = ohci_device_setintr(sc, opipe, ival);
   2103  1.226     skrll 			if (err)
   2104  1.226     skrll 				goto bad;
   2105  1.226     skrll 			break;
   2106    1.1  augustss 		case UE_ISOCHRONOUS:
   2107  1.260     skrll 			pipe->up_serialise = false;
   2108  1.260     skrll 			pipe->up_methods = &ohci_device_isoc_methods;
   2109  1.260     skrll 			return ohci_setup_isoc(pipe);
   2110    1.1  augustss 		case UE_BULK:
   2111  1.260     skrll 			pipe->up_methods = &ohci_device_bulk_methods;
   2112  1.224       mrg 			mutex_enter(&sc->sc_lock);
   2113  1.168  augustss 			ohci_add_ed(sc, sed, sc->sc_bulk_head);
   2114  1.224       mrg 			mutex_exit(&sc->sc_lock);
   2115    1.3  augustss 			break;
   2116    1.1  augustss 		}
   2117    1.1  augustss 	}
   2118  1.224       mrg 
   2119  1.224       mrg 	return USBD_NORMAL_COMPLETION;
   2120    1.1  augustss 
   2121    1.1  augustss  bad:
   2122  1.241     skrll 	if (std != NULL) {
   2123   1.90   thorpej 		ohci_free_std(sc, std);
   2124  1.241     skrll 	}
   2125   1.90   thorpej 	if (sed != NULL)
   2126   1.90   thorpej 		ohci_free_sed(sc, sed);
   2127  1.224       mrg 	return err;
   2128  1.120  augustss 
   2129    1.1  augustss }
   2130    1.1  augustss 
   2131    1.1  augustss /*
   2132   1.34  augustss  * Close a reqular pipe.
   2133   1.34  augustss  * Assumes that there are no pending transactions.
   2134   1.34  augustss  */
   2135   1.34  augustss void
   2136  1.260     skrll ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head)
   2137   1.34  augustss {
   2138  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2139  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2140   1.34  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   2141   1.34  augustss 
   2142  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2143  1.224       mrg 
   2144   1.34  augustss #ifdef DIAGNOSTIC
   2145  1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   2146  1.168  augustss 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2147  1.168  augustss 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
   2148   1.34  augustss 		ohci_soft_td_t *std;
   2149  1.168  augustss 		std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
   2150  1.299  christos 		printf("ohci_close_pipe: pipe not empty sed=%p hd=%#x "
   2151  1.299  christos 		       "tl=%#x pipe=%p, std=%p\n", sed,
   2152  1.168  augustss 		       (int)O32TOH(sed->ed.ed_headp),
   2153  1.168  augustss 		       (int)O32TOH(sed->ed.ed_tailp),
   2154   1.34  augustss 		       pipe, std);
   2155  1.229  christos #ifdef OHCI_DEBUG
   2156  1.107  augustss 		usbd_dump_pipe(&opipe->pipe);
   2157  1.168  augustss 		ohci_dump_ed(sc, sed);
   2158  1.106  augustss 		if (std)
   2159  1.168  augustss 			ohci_dump_td(sc, std);
   2160  1.106  augustss #endif
   2161   1.34  augustss 		usb_delay_ms(&sc->sc_bus, 2);
   2162  1.168  augustss 		if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2163  1.168  augustss 		    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   2164   1.34  augustss 			printf("ohci_close_pipe: pipe still not empty\n");
   2165   1.34  augustss 	}
   2166   1.34  augustss #endif
   2167  1.224       mrg 	ohci_rem_ed(sc, sed, head);
   2168  1.133    toshii 	/* Make sure the host controller is not touching this ED */
   2169  1.133    toshii 	usb_delay_ms(&sc->sc_bus, 1);
   2170  1.260     skrll 	pipe->up_endpoint->ue_toggle =
   2171  1.214  jakllsch 	    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
   2172  1.260     skrll 	ohci_free_sed_locked(sc, opipe->sed);
   2173   1.34  augustss }
   2174   1.34  augustss 
   2175  1.120  augustss /*
   2176  1.293  riastrad  * Arrange for the hardware to tells us that it is not still processing
   2177  1.293  riastrad  * the TDs by setting the sKip bit and requesting a SOF interrupt
   2178  1.282       mrg  *
   2179  1.282       mrg  * Once we see the SOF interrupt we can check the transfer TDs/iTDs to see if
   2180  1.282       mrg  * they've been processed and either
   2181  1.282       mrg  * 	a) if they're unused recover them for later use, or
   2182  1.282       mrg  *	b) if they've been used allocate new TD/iTDs to replace those
   2183  1.282       mrg  *         used.  The softint handler will free the old ones.
   2184   1.34  augustss  */
   2185   1.34  augustss void
   2186  1.293  riastrad ohci_abortx(struct usbd_xfer *xfer)
   2187   1.34  augustss {
   2188  1.282       mrg 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2189  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2190  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2191  1.106  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   2192  1.106  augustss 	ohci_soft_td_t *p, *n;
   2193  1.106  augustss 	ohci_physaddr_t headp;
   2194  1.224       mrg 	int hit;
   2195   1.34  augustss 
   2196  1.274  pgoyette 	DPRINTF("xfer=%#jx pipe=%#jx sed=%#jx", (uintptr_t)xfer,
   2197  1.274  pgoyette 	    (uintptr_t)opipe, (uintptr_t)sed, 0);
   2198   1.34  augustss 
   2199  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2200  1.260     skrll 	ASSERT_SLEEPABLE();
   2201  1.224       mrg 
   2202  1.293  riastrad 	KASSERTMSG((xfer->ux_status == USBD_CANCELLED ||
   2203  1.293  riastrad 		xfer->ux_status == USBD_TIMEOUT),
   2204  1.293  riastrad 	    "bad abort status: %d", xfer->ux_status);
   2205  1.116  augustss 
   2206  1.106  augustss 	/*
   2207  1.282       mrg 	 * If we're dying, skip the hardware action and just notify the
   2208  1.282       mrg 	 * software that we're done.
   2209  1.159  augustss 	 */
   2210  1.282       mrg 	if (sc->sc_dying) {
   2211  1.282       mrg 		DPRINTFN(4, "xfer %#jx dying %ju", (uintptr_t)xfer,
   2212  1.282       mrg 		    xfer->ux_status, 0, 0);
   2213  1.282       mrg 		goto dying;
   2214  1.159  augustss 	}
   2215  1.159  augustss 
   2216  1.159  augustss 	/*
   2217  1.282       mrg 	 * HC Step 1: Unless the endpoint is already halted, we set the endpoint
   2218  1.282       mrg 	 * descriptor sKip bit and wait for hardware to complete processing.
   2219  1.282       mrg 	 *
   2220  1.282       mrg 	 * This includes ensuring that any TDs of the transfer that got onto
   2221  1.282       mrg 	 * the done list are also removed.  We ensure this by waiting for
   2222  1.282       mrg 	 * both a WDH and SOF interrupt.
   2223  1.106  augustss 	 */
   2224  1.274  pgoyette 	DPRINTFN(1, "stop ed=%#jx", (uintptr_t)sed, 0, 0, 0);
   2225  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2226  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2227  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2228  1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   2229  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2230  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2231  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2232   1.34  augustss 
   2233  1.120  augustss 	/*
   2234  1.282       mrg 	 * HC Step 2: Wait until we know hardware has finished any possible
   2235  1.282       mrg 	 * use of the xfer.
   2236  1.106  augustss 	 */
   2237  1.224       mrg 	/* Hardware finishes in 1ms */
   2238  1.260     skrll 	usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock);
   2239  1.119  augustss 
   2240  1.120  augustss 	/*
   2241  1.282       mrg 	 * HC Step 3: Remove any vestiges of the xfer from the hardware.
   2242  1.106  augustss 	 * The complication here is that the hardware may have executed
   2243  1.106  augustss 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2244  1.106  augustss 	 * the TDs of this xfer we check if the hardware points to
   2245  1.106  augustss 	 * any of them.
   2246  1.106  augustss 	 */
   2247  1.260     skrll 	p = xfer->ux_hcpriv;
   2248  1.260     skrll 	KASSERT(p);
   2249  1.260     skrll 
   2250  1.106  augustss #ifdef OHCI_DEBUG
   2251  1.260     skrll 	DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2252  1.260     skrll 
   2253  1.260     skrll 	if (ohcidebug >= 2) {
   2254  1.260     skrll 		DPRINTF("sed:", 0, 0, 0, 0);
   2255  1.168  augustss 		ohci_dump_ed(sc, sed);
   2256  1.168  augustss 		ohci_dump_tds(sc, p);
   2257  1.106  augustss 	}
   2258  1.260     skrll 	DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2259  1.106  augustss #endif
   2260  1.168  augustss 	headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
   2261  1.106  augustss 	hit = 0;
   2262   1.53  augustss 	for (; p->xfer == xfer; p = n) {
   2263  1.106  augustss 		hit |= headp == p->physaddr;
   2264   1.38  augustss 		n = p->nexttd;
   2265  1.260     skrll 		ohci_hash_rem_td(sc, p);
   2266   1.34  augustss 	}
   2267  1.106  augustss 	/* Zap headp register if hardware pointed inside the xfer. */
   2268  1.106  augustss 	if (hit) {
   2269  1.300  christos 		DPRINTFN(1, "set hd=0x%08jx, tl=0x%08jx",  (int)p->physaddr,
   2270  1.260     skrll 		    (int)O32TOH(sed->ed.ed_tailp), 0, 0);
   2271  1.292      gson 		/* unlink TDs, preserving toggle carry */
   2272  1.292      gson 		sed->ed.ed_headp = HTOO32(p->physaddr |
   2273  1.292      gson 		    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
   2274  1.195    bouyer 		usb_syncmem(&sed->dma,
   2275  1.195    bouyer 		    sed->offs + offsetof(ohci_ed_t, ed_headp),
   2276  1.195    bouyer 		    sizeof(sed->ed.ed_headp),
   2277  1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2278  1.106  augustss 	} else {
   2279  1.260     skrll 		DPRINTFN(1, "no hit", 0, 0, 0, 0);
   2280  1.106  augustss 	}
   2281   1.34  augustss 
   2282  1.106  augustss 	/*
   2283  1.282       mrg 	 * HC Step 4: Turn on hardware again.
   2284  1.106  augustss 	 */
   2285  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2286  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2287  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2288  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   2289  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2290  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2291  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2292   1.38  augustss 
   2293  1.106  augustss 	/*
   2294  1.282       mrg 	 * Final step: Notify completion to waiting xfers.
   2295  1.106  augustss 	 */
   2296  1.282       mrg dying:
   2297   1.53  augustss 	usb_transfer_complete(xfer);
   2298  1.282       mrg 	DPRINTFN(14, "end", 0, 0, 0, 0);
   2299   1.38  augustss 
   2300  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2301   1.34  augustss }
   2302   1.34  augustss 
   2303   1.34  augustss /*
   2304    1.1  augustss  * Data structures and routines to emulate the root hub.
   2305    1.1  augustss  */
   2306  1.260     skrll Static int
   2307  1.260     skrll ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
   2308  1.260     skrll     void *buf, int buflen)
   2309    1.1  augustss {
   2310  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   2311  1.260     skrll 	usb_port_status_t ps;
   2312  1.260     skrll 	uint16_t len, value, index;
   2313  1.260     skrll 	int l, totlen = 0;
   2314  1.260     skrll 	int port, i;
   2315  1.260     skrll 	uint32_t v;
   2316   1.17  augustss 
   2317  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2318    1.1  augustss 
   2319   1.83  augustss 	if (sc->sc_dying)
   2320  1.260     skrll 		return -1;
   2321    1.1  augustss 
   2322  1.300  christos 	DPRINTFN(4, "type=0x%02jx request=%02jx", req->bmRequestType,
   2323  1.260     skrll 	    req->bRequest, 0, 0);
   2324    1.1  augustss 
   2325    1.1  augustss 	len = UGETW(req->wLength);
   2326    1.1  augustss 	value = UGETW(req->wValue);
   2327    1.1  augustss 	index = UGETW(req->wIndex);
   2328   1.43  augustss 
   2329    1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   2330  1.260     skrll 	switch (C(req->bRequest, req->bmRequestType)) {
   2331    1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   2332  1.300  christos 		DPRINTFN(8, "wValue=0x%04jx", value, 0, 0, 0);
   2333  1.171  christos 		if (len == 0)
   2334  1.171  christos 			break;
   2335  1.260     skrll 		switch (value) {
   2336  1.186  drochner #define sd ((usb_string_descriptor_t *)buf)
   2337  1.260     skrll 		case C(2, UDESC_STRING):
   2338  1.260     skrll 			/* Product */
   2339  1.260     skrll 			totlen = usb_makestrdesc(sd, len, "OHCI root hub");
   2340  1.260     skrll 			break;
   2341  1.186  drochner #undef sd
   2342    1.1  augustss 		default:
   2343  1.260     skrll 			/* default from usbroothub */
   2344  1.260     skrll 			return buflen;
   2345    1.1  augustss 		}
   2346    1.1  augustss 		break;
   2347  1.260     skrll 
   2348    1.1  augustss 	/* Hub requests */
   2349    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   2350    1.1  augustss 		break;
   2351    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   2352  1.274  pgoyette 		DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%jd feature=%jd",
   2353  1.260     skrll 		    index, value, 0, 0);
   2354    1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2355  1.260     skrll 			return -1;
   2356    1.1  augustss 		}
   2357    1.1  augustss 		port = OHCI_RH_PORT_STATUS(index);
   2358    1.1  augustss 		switch(value) {
   2359    1.1  augustss 		case UHF_PORT_ENABLE:
   2360    1.1  augustss 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
   2361    1.1  augustss 			break;
   2362    1.1  augustss 		case UHF_PORT_SUSPEND:
   2363    1.1  augustss 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
   2364    1.1  augustss 			break;
   2365    1.1  augustss 		case UHF_PORT_POWER:
   2366   1.86  augustss 			/* Yes, writing to the LOW_SPEED bit clears power. */
   2367    1.1  augustss 			OWRITE4(sc, port, UPS_LOW_SPEED);
   2368    1.1  augustss 			break;
   2369    1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2370    1.1  augustss 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
   2371    1.1  augustss 			break;
   2372    1.1  augustss 		case UHF_C_PORT_ENABLE:
   2373    1.1  augustss 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
   2374    1.1  augustss 			break;
   2375    1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2376    1.1  augustss 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
   2377    1.1  augustss 			break;
   2378    1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2379    1.1  augustss 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
   2380    1.1  augustss 			break;
   2381    1.1  augustss 		case UHF_C_PORT_RESET:
   2382    1.1  augustss 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
   2383    1.1  augustss 			break;
   2384    1.1  augustss 		default:
   2385  1.260     skrll 			return -1;
   2386    1.1  augustss 		}
   2387    1.1  augustss 		switch(value) {
   2388    1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2389    1.1  augustss 		case UHF_C_PORT_ENABLE:
   2390    1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2391    1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2392    1.1  augustss 		case UHF_C_PORT_RESET:
   2393    1.1  augustss 			/* Enable RHSC interrupt if condition is cleared. */
   2394    1.1  augustss 			if ((OREAD4(sc, port) >> 16) == 0)
   2395  1.157   mycroft 				ohci_rhsc_enable(sc);
   2396    1.1  augustss 			break;
   2397    1.1  augustss 		default:
   2398    1.1  augustss 			break;
   2399    1.1  augustss 		}
   2400    1.1  augustss 		break;
   2401    1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   2402  1.171  christos 		if (len == 0)
   2403  1.171  christos 			break;
   2404  1.146    toshii 		if ((value & 0xff) != 0) {
   2405  1.260     skrll 			return -1;
   2406    1.1  augustss 		}
   2407  1.260     skrll 		usb_hub_descriptor_t hubd;
   2408  1.260     skrll 
   2409  1.285  riastrad 		totlen = uimin(buflen, sizeof(hubd));
   2410  1.260     skrll 		memcpy(&hubd, buf, totlen);
   2411  1.260     skrll 
   2412    1.1  augustss 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
   2413    1.1  augustss 		hubd.bNbrPorts = sc->sc_noport;
   2414   1.15  augustss 		USETW(hubd.wHubCharacteristics,
   2415  1.120  augustss 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
   2416    1.1  augustss 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
   2417    1.1  augustss 		      /* XXX overcurrent */
   2418    1.1  augustss 		      );
   2419    1.1  augustss 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
   2420    1.1  augustss 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
   2421  1.120  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   2422  1.260     skrll 			hubd.DeviceRemovable[i++] = (uint8_t)v;
   2423   1.15  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   2424  1.285  riastrad 		totlen = uimin(totlen, hubd.bDescLength);
   2425  1.260     skrll 		memcpy(buf, &hubd, totlen);
   2426    1.1  augustss 		break;
   2427    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   2428    1.1  augustss 		if (len != 4) {
   2429  1.260     skrll 			return -1;
   2430    1.1  augustss 		}
   2431    1.1  augustss 		memset(buf, 0, len); /* ? XXX */
   2432    1.1  augustss 		totlen = len;
   2433    1.1  augustss 		break;
   2434    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   2435  1.274  pgoyette 		DPRINTFN(8, "get port status i=%jd", index, 0, 0, 0);
   2436    1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2437  1.260     skrll 			return -1;
   2438    1.1  augustss 		}
   2439    1.1  augustss 		if (len != 4) {
   2440  1.260     skrll 			return -1;
   2441    1.1  augustss 		}
   2442    1.1  augustss 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
   2443  1.300  christos 		DPRINTFN(8, "port status=0x%04jx", v, 0, 0, 0);
   2444    1.1  augustss 		USETW(ps.wPortStatus, v);
   2445    1.1  augustss 		USETW(ps.wPortChange, v >> 16);
   2446  1.285  riastrad 		totlen = uimin(len, sizeof(ps));
   2447  1.260     skrll 		memcpy(buf, &ps, totlen);
   2448    1.1  augustss 		break;
   2449    1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   2450  1.260     skrll 		return -1;
   2451    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   2452    1.1  augustss 		break;
   2453    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   2454    1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2455  1.260     skrll 			return -1;
   2456    1.1  augustss 		}
   2457    1.1  augustss 		port = OHCI_RH_PORT_STATUS(index);
   2458    1.1  augustss 		switch(value) {
   2459    1.1  augustss 		case UHF_PORT_ENABLE:
   2460    1.1  augustss 			OWRITE4(sc, port, UPS_PORT_ENABLED);
   2461    1.1  augustss 			break;
   2462    1.1  augustss 		case UHF_PORT_SUSPEND:
   2463    1.1  augustss 			OWRITE4(sc, port, UPS_SUSPEND);
   2464    1.1  augustss 			break;
   2465    1.1  augustss 		case UHF_PORT_RESET:
   2466  1.274  pgoyette 			DPRINTFN(5, "reset port %jd", index, 0, 0, 0);
   2467    1.1  augustss 			OWRITE4(sc, port, UPS_RESET);
   2468  1.110  augustss 			for (i = 0; i < 5; i++) {
   2469  1.110  augustss 				usb_delay_ms(&sc->sc_bus,
   2470  1.110  augustss 					     USB_PORT_ROOT_RESET_DELAY);
   2471  1.116  augustss 				if (sc->sc_dying) {
   2472  1.260     skrll 					return -1;
   2473  1.116  augustss 				}
   2474    1.1  augustss 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
   2475    1.1  augustss 					break;
   2476    1.1  augustss 			}
   2477  1.300  christos 			DPRINTFN(8, "port %jd reset, status = 0x%04jx", index,
   2478  1.260     skrll 			    OREAD4(sc, port), 0, 0);
   2479    1.1  augustss 			break;
   2480    1.1  augustss 		case UHF_PORT_POWER:
   2481  1.274  pgoyette 			DPRINTFN(2, "set port power %jd", index, 0, 0, 0);
   2482    1.1  augustss 			OWRITE4(sc, port, UPS_PORT_POWER);
   2483    1.1  augustss 			break;
   2484    1.1  augustss 		default:
   2485  1.260     skrll 			return -1;
   2486    1.1  augustss 		}
   2487    1.1  augustss 		break;
   2488    1.1  augustss 	default:
   2489  1.260     skrll 		/* default from usbroothub */
   2490  1.260     skrll 		return buflen;
   2491    1.1  augustss 	}
   2492    1.1  augustss 
   2493  1.260     skrll 	return totlen;
   2494    1.1  augustss }
   2495    1.1  augustss 
   2496   1.82  augustss Static usbd_status
   2497  1.260     skrll ohci_root_intr_transfer(struct usbd_xfer *xfer)
   2498    1.1  augustss {
   2499  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2500   1.53  augustss 	usbd_status err;
   2501   1.17  augustss 
   2502   1.46  augustss 	/* Insert last in queue. */
   2503  1.224       mrg 	mutex_enter(&sc->sc_lock);
   2504   1.53  augustss 	err = usb_insert_transfer(xfer);
   2505  1.224       mrg 	mutex_exit(&sc->sc_lock);
   2506   1.53  augustss 	if (err)
   2507  1.260     skrll 		return err;
   2508   1.46  augustss 
   2509   1.46  augustss 	/* Pipe isn't running, start first */
   2510  1.260     skrll 	return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2511   1.17  augustss }
   2512   1.17  augustss 
   2513   1.82  augustss Static usbd_status
   2514  1.260     skrll ohci_root_intr_start(struct usbd_xfer *xfer)
   2515   1.17  augustss {
   2516  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2517  1.287       mrg 	const bool polling = sc->sc_bus.ub_usepolling;
   2518    1.1  augustss 
   2519   1.83  augustss 	if (sc->sc_dying)
   2520  1.260     skrll 		return USBD_IOERROR;
   2521   1.83  augustss 
   2522  1.287       mrg 	if (!polling)
   2523  1.287       mrg 		mutex_enter(&sc->sc_lock);
   2524  1.224       mrg 	KASSERT(sc->sc_intrxfer == NULL);
   2525   1.53  augustss 	sc->sc_intrxfer = xfer;
   2526  1.295  riastrad 	xfer->ux_status = USBD_IN_PROGRESS;
   2527  1.287       mrg 	if (!polling)
   2528  1.287       mrg 		mutex_exit(&sc->sc_lock);
   2529    1.1  augustss 
   2530  1.295  riastrad 	return USBD_IN_PROGRESS;
   2531    1.1  augustss }
   2532    1.1  augustss 
   2533    1.3  augustss /* Abort a root interrupt request. */
   2534   1.82  augustss Static void
   2535  1.260     skrll ohci_root_intr_abort(struct usbd_xfer *xfer)
   2536    1.1  augustss {
   2537  1.294  riastrad 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2538  1.224       mrg 
   2539  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2540  1.260     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   2541   1.53  augustss 
   2542  1.294  riastrad 	/* If xfer has already completed, nothing to do here.  */
   2543  1.294  riastrad 	if (sc->sc_intrxfer == NULL)
   2544  1.294  riastrad 		return;
   2545  1.294  riastrad 
   2546  1.294  riastrad 	/*
   2547  1.294  riastrad 	 * Otherwise, sc->sc_intrxfer had better be this transfer.
   2548  1.294  riastrad 	 * Cancel it.
   2549  1.294  riastrad 	 */
   2550  1.294  riastrad 	KASSERT(sc->sc_intrxfer == xfer);
   2551  1.294  riastrad 	KASSERT(xfer->ux_status == USBD_IN_PROGRESS);
   2552  1.260     skrll 	xfer->ux_status = USBD_CANCELLED;
   2553   1.53  augustss 	usb_transfer_complete(xfer);
   2554    1.1  augustss }
   2555    1.1  augustss 
   2556    1.1  augustss /* Close the root pipe. */
   2557   1.82  augustss Static void
   2558  1.260     skrll ohci_root_intr_close(struct usbd_pipe *pipe)
   2559    1.1  augustss {
   2560  1.294  riastrad 	ohci_softc_t *sc __diagused = OHCI_PIPE2SC(pipe);
   2561  1.120  augustss 
   2562  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2563  1.224       mrg 
   2564  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2565   1.34  augustss 
   2566  1.294  riastrad 	/*
   2567  1.294  riastrad 	 * Caller must guarantee the xfer has completed first, by
   2568  1.294  riastrad 	 * closing the pipe only after normal completion or an abort.
   2569  1.294  riastrad 	 */
   2570  1.294  riastrad 	KASSERT(sc->sc_intrxfer == NULL);
   2571    1.1  augustss }
   2572    1.1  augustss 
   2573    1.1  augustss /************************/
   2574    1.1  augustss 
   2575  1.260     skrll int
   2576  1.260     skrll ohci_device_ctrl_init(struct usbd_xfer *xfer)
   2577  1.260     skrll {
   2578  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2579  1.260     skrll 	usb_device_request_t *req = &xfer->ux_request;
   2580  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2581  1.260     skrll 	ohci_soft_td_t *stat, *setup;
   2582  1.260     skrll 	int isread = req->bmRequestType & UT_READ;
   2583  1.260     skrll 	int len = xfer->ux_bufsize;
   2584  1.260     skrll 	int err = ENOMEM;
   2585  1.260     skrll 
   2586  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2587  1.260     skrll 
   2588  1.260     skrll 	setup = ohci_alloc_std(sc);
   2589  1.260     skrll 	if (setup == NULL) {
   2590  1.260     skrll 		goto bad1;
   2591  1.260     skrll 	}
   2592  1.260     skrll 	stat = ohci_alloc_std(sc);
   2593  1.260     skrll 	if (stat == NULL) {
   2594  1.260     skrll 		goto bad2;
   2595  1.260     skrll 	}
   2596  1.260     skrll 
   2597  1.260     skrll 	ox->ox_setup = setup;
   2598  1.260     skrll 	ox->ox_stat = stat;
   2599  1.260     skrll 	ox->ox_nstd = 0;
   2600  1.260     skrll 
   2601  1.260     skrll 	/* Set up data transaction */
   2602  1.260     skrll 	if (len != 0) {
   2603  1.260     skrll 		err = ohci_alloc_std_chain(sc, xfer, len, isread);
   2604  1.260     skrll 		if (err) {
   2605  1.260     skrll 			goto bad3;
   2606  1.260     skrll 		}
   2607  1.260     skrll 	}
   2608  1.260     skrll 	return 0;
   2609  1.260     skrll 
   2610  1.260     skrll  bad3:
   2611  1.260     skrll 	ohci_free_std(sc, stat);
   2612  1.260     skrll  bad2:
   2613  1.260     skrll 	ohci_free_std(sc, setup);
   2614  1.260     skrll  bad1:
   2615  1.260     skrll 	return err;
   2616  1.260     skrll }
   2617  1.260     skrll 
   2618  1.260     skrll void
   2619  1.260     skrll ohci_device_ctrl_fini(struct usbd_xfer *xfer)
   2620  1.260     skrll {
   2621  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2622  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2623  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2624  1.260     skrll 
   2625  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2626  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0);
   2627  1.260     skrll 
   2628  1.260     skrll 	mutex_enter(&sc->sc_lock);
   2629  1.260     skrll 	if (ox->ox_setup != opipe->tail.td) {
   2630  1.260     skrll 		ohci_free_std_locked(sc, ox->ox_setup);
   2631  1.260     skrll 	}
   2632  1.260     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   2633  1.260     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
   2634  1.260     skrll 		if (std == NULL)
   2635  1.260     skrll 			break;
   2636  1.260     skrll 		ohci_free_std_locked(sc, std);
   2637  1.260     skrll 	}
   2638  1.260     skrll 	ohci_free_std_locked(sc, ox->ox_stat);
   2639  1.260     skrll 	mutex_exit(&sc->sc_lock);
   2640  1.260     skrll 
   2641  1.260     skrll 	if (ox->ox_nstd) {
   2642  1.260     skrll 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   2643  1.260     skrll 		kmem_free(ox->ox_stds, sz);
   2644  1.260     skrll 	}
   2645  1.260     skrll }
   2646  1.260     skrll 
   2647   1.82  augustss Static usbd_status
   2648  1.260     skrll ohci_device_ctrl_transfer(struct usbd_xfer *xfer)
   2649    1.1  augustss {
   2650  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2651   1.53  augustss 	usbd_status err;
   2652   1.17  augustss 
   2653   1.46  augustss 	/* Insert last in queue. */
   2654  1.224       mrg 	mutex_enter(&sc->sc_lock);
   2655   1.53  augustss 	err = usb_insert_transfer(xfer);
   2656  1.224       mrg 	mutex_exit(&sc->sc_lock);
   2657   1.53  augustss 	if (err)
   2658  1.260     skrll 		return err;
   2659   1.46  augustss 
   2660   1.46  augustss 	/* Pipe isn't running, start first */
   2661  1.260     skrll 	return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2662   1.17  augustss }
   2663   1.17  augustss 
   2664   1.82  augustss Static usbd_status
   2665  1.260     skrll ohci_device_ctrl_start(struct usbd_xfer *xfer)
   2666   1.17  augustss {
   2667  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2668  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2669  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2670  1.260     skrll 	usb_device_request_t *req = &xfer->ux_request;
   2671  1.260     skrll 	struct usbd_device *dev __diagused = opipe->pipe.up_dev;
   2672  1.260     skrll 	ohci_soft_td_t *setup, *stat, *next, *tail;
   2673  1.260     skrll 	ohci_soft_ed_t *sed;
   2674  1.260     skrll 	int isread;
   2675  1.260     skrll 	int len;
   2676  1.287       mrg 	const bool polling = sc->sc_bus.ub_usepolling;
   2677  1.260     skrll 
   2678  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2679    1.1  augustss 
   2680   1.83  augustss 	if (sc->sc_dying)
   2681  1.260     skrll 		return USBD_IOERROR;
   2682  1.260     skrll 
   2683  1.260     skrll 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   2684  1.260     skrll 
   2685  1.260     skrll 	isread = req->bmRequestType & UT_READ;
   2686  1.260     skrll 	len = UGETW(req->wLength);
   2687  1.260     skrll 
   2688  1.274  pgoyette 	DPRINTF("xfer=%#jx len=%jd, addr=%jd, endpt=%jd", (uintptr_t)xfer, len,
   2689  1.274  pgoyette 	    dev->ud_addr, opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress);
   2690  1.300  christos 	DPRINTF("type=0x%02jx, request=0x%02jx, wValue=0x%04jx, wIndex=0x%04jx",
   2691  1.260     skrll 	    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2692  1.260     skrll 	    UGETW(req->wIndex));
   2693  1.260     skrll 
   2694  1.260     skrll 	/* Need to take lock here for pipe->tail.td */
   2695  1.287       mrg 	if (!polling)
   2696  1.287       mrg 		mutex_enter(&sc->sc_lock);
   2697  1.260     skrll 
   2698  1.260     skrll 	/*
   2699  1.260     skrll 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   2700  1.260     skrll 	 * next transfer
   2701  1.260     skrll 	 */
   2702  1.260     skrll 	setup = opipe->tail.td;
   2703  1.260     skrll 	opipe->tail.td = ox->ox_setup;
   2704  1.260     skrll 	ox->ox_setup = setup;
   2705  1.260     skrll 
   2706  1.260     skrll 	stat = ox->ox_stat;
   2707  1.260     skrll 
   2708  1.260     skrll 	/* point at sentinel */
   2709  1.260     skrll 	tail = opipe->tail.td;
   2710  1.260     skrll 	sed = opipe->sed;
   2711  1.260     skrll 
   2712  1.260     skrll 	KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr,
   2713  1.260     skrll 	    "address ED %d pipe %d\n",
   2714  1.260     skrll 	    OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr);
   2715  1.260     skrll 	KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) ==
   2716  1.260     skrll 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize),
   2717  1.260     skrll 	    "MPL ED %d pipe %d\n",
   2718  1.260     skrll 	    OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)),
   2719  1.260     skrll 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize));
   2720  1.260     skrll 
   2721  1.260     skrll 	/* next will point to data if len != 0 */
   2722  1.260     skrll 	next = stat;
   2723  1.260     skrll 
   2724  1.260     skrll 	/* Set up data transaction */
   2725  1.260     skrll 	if (len != 0) {
   2726  1.260     skrll 		ohci_soft_td_t *std;
   2727  1.260     skrll 		ohci_soft_td_t *end;
   2728  1.260     skrll 
   2729  1.260     skrll 		next = ox->ox_stds[0];
   2730  1.260     skrll 		ohci_reset_std_chain(sc, xfer, len, isread, next, &end);
   2731  1.260     skrll 
   2732  1.260     skrll 		end->td.td_nexttd = HTOO32(stat->physaddr);
   2733  1.260     skrll 		end->nexttd = stat;
   2734  1.260     skrll 
   2735  1.273     skrll 		usb_syncmem(&end->dma, end->offs, sizeof(end->td),
   2736  1.260     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2737  1.260     skrll 
   2738  1.260     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   2739  1.260     skrll 		    isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2740  1.260     skrll 		std = ox->ox_stds[0];
   2741  1.260     skrll 		/* Start toggle at 1 and then use the carried toggle. */
   2742  1.260     skrll 		std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
   2743  1.260     skrll 		std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
   2744  1.260     skrll 		usb_syncmem(&std->dma,
   2745  1.260     skrll 		    std->offs + offsetof(ohci_td_t, td_flags),
   2746  1.260     skrll 		    sizeof(std->td.td_flags),
   2747  1.260     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2748  1.260     skrll 	}
   2749  1.260     skrll 
   2750  1.274  pgoyette 	DPRINTFN(8, "setup %#jx data %#jx stat %#jx tail %#jx",
   2751  1.274  pgoyette 	    (uintptr_t)setup,
   2752  1.274  pgoyette 	    (uintptr_t)(len != 0 ? ox->ox_stds[0] : NULL), (uintptr_t)stat,
   2753  1.274  pgoyette 	    (uintptr_t)tail);
   2754  1.260     skrll 	KASSERT(opipe->tail.td == tail);
   2755  1.260     skrll 
   2756  1.260     skrll 	memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req));
   2757  1.260     skrll 	usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE);
   2758   1.83  augustss 
   2759  1.260     skrll 	setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
   2760  1.260     skrll 				     OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
   2761  1.260     skrll 	setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0));
   2762  1.260     skrll 	setup->td.td_nexttd = HTOO32(next->physaddr);
   2763  1.260     skrll 	setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1);
   2764  1.260     skrll 	setup->nexttd = next;
   2765  1.260     skrll 	setup->len = 0;
   2766  1.260     skrll 	setup->xfer = xfer;
   2767  1.260     skrll 	setup->flags = 0;
   2768  1.260     skrll 	ohci_hash_add_td(sc, setup);
   2769  1.260     skrll 
   2770  1.260     skrll 	xfer->ux_hcpriv = setup;
   2771  1.260     skrll 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2772  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2773  1.260     skrll 
   2774  1.260     skrll 	stat->td.td_flags = HTOO32(
   2775  1.260     skrll 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) |
   2776  1.260     skrll 		OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
   2777  1.260     skrll 	stat->td.td_cbp = 0;
   2778  1.260     skrll 	stat->td.td_nexttd = HTOO32(tail->physaddr);
   2779  1.260     skrll 	stat->td.td_be = 0;
   2780  1.260     skrll 	stat->nexttd = tail;
   2781  1.260     skrll 	stat->flags = OHCI_CALL_DONE;
   2782  1.260     skrll 	stat->len = 0;
   2783  1.260     skrll 	stat->xfer = xfer;
   2784  1.260     skrll 	ohci_hash_add_td(sc, stat);
   2785  1.260     skrll 
   2786  1.260     skrll 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2787  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2788  1.260     skrll 
   2789  1.260     skrll 	memset(&tail->td, 0, sizeof(tail->td));
   2790  1.260     skrll 	tail->nexttd = NULL;
   2791  1.260     skrll 	tail->xfer = NULL;
   2792  1.260     skrll 
   2793  1.260     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   2794  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2795  1.260     skrll 
   2796  1.260     skrll #ifdef OHCI_DEBUG
   2797  1.260     skrll 	USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
   2798  1.260     skrll 	if (ohcidebug >= 5) {
   2799  1.260     skrll 		ohci_dump_ed(sc, sed);
   2800  1.260     skrll 		ohci_dump_tds(sc, setup);
   2801    1.1  augustss 	}
   2802  1.260     skrll 	USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
   2803   1.42  augustss #endif
   2804    1.1  augustss 
   2805  1.260     skrll 	/* Insert ED in schedule */
   2806  1.260     skrll 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   2807  1.260     skrll 	usb_syncmem(&sed->dma,
   2808  1.260     skrll 	    sed->offs + offsetof(ohci_ed_t, ed_tailp),
   2809  1.260     skrll 	    sizeof(sed->ed.ed_tailp),
   2810  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2811  1.260     skrll 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   2812  1.293  riastrad 	usbd_xfer_schedule_timeout(xfer);
   2813  1.260     skrll 
   2814  1.260     skrll 	DPRINTF("done", 0, 0, 0, 0);
   2815  1.260     skrll 
   2816  1.282       mrg 	xfer->ux_status = USBD_IN_PROGRESS;
   2817  1.287       mrg 	if (!polling)
   2818  1.287       mrg 		mutex_exit(&sc->sc_lock);
   2819    1.1  augustss 
   2820  1.260     skrll 	return USBD_IN_PROGRESS;
   2821    1.1  augustss }
   2822    1.1  augustss 
   2823    1.1  augustss /* Abort a device control request. */
   2824   1.82  augustss Static void
   2825  1.260     skrll ohci_device_ctrl_abort(struct usbd_xfer *xfer)
   2826    1.1  augustss {
   2827  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   2828  1.224       mrg 
   2829  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2830  1.224       mrg 
   2831  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2832  1.274  pgoyette 	DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   2833  1.293  riastrad 	usbd_xfer_abort(xfer);
   2834    1.1  augustss }
   2835    1.1  augustss 
   2836    1.1  augustss /* Close a device control pipe. */
   2837   1.82  augustss Static void
   2838  1.260     skrll ohci_device_ctrl_close(struct usbd_pipe *pipe)
   2839    1.1  augustss {
   2840  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2841  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2842    1.1  augustss 
   2843  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2844  1.224       mrg 
   2845  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2846  1.274  pgoyette 	DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0);
   2847   1.34  augustss 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
   2848  1.260     skrll 	ohci_free_std_locked(sc, opipe->tail.td);
   2849  1.296     skrll 
   2850  1.296     skrll 	usb_freemem(&sc->sc_bus, &opipe->ctrl.reqdma);
   2851    1.3  augustss }
   2852    1.3  augustss 
   2853    1.3  augustss /************************/
   2854   1.37  augustss 
   2855   1.82  augustss Static void
   2856  1.260     skrll ohci_device_clear_toggle(struct usbd_pipe *pipe)
   2857   1.37  augustss {
   2858  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2859  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2860   1.37  augustss 
   2861  1.168  augustss 	opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
   2862   1.37  augustss }
   2863   1.37  augustss 
   2864   1.82  augustss Static void
   2865  1.260     skrll ohci_noop(struct usbd_pipe *pipe)
   2866   1.37  augustss {
   2867   1.37  augustss }
   2868    1.3  augustss 
   2869  1.260     skrll Static int
   2870  1.260     skrll ohci_device_bulk_init(struct usbd_xfer *xfer)
   2871  1.260     skrll {
   2872  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2873  1.260     skrll 	int len = xfer->ux_bufsize;
   2874  1.281      maya 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   2875  1.260     skrll 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2876  1.260     skrll 	int err;
   2877  1.260     skrll 
   2878  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2879  1.260     skrll 
   2880  1.260     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2881  1.260     skrll 
   2882  1.274  pgoyette 	DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer,
   2883  1.274  pgoyette 	    len, isread, xfer->ux_flags);
   2884  1.274  pgoyette 	DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0);
   2885  1.260     skrll 
   2886  1.260     skrll 	/* Allocate a chain of new TDs (including a new tail). */
   2887  1.260     skrll 	err = ohci_alloc_std_chain(sc, xfer, len, isread);
   2888  1.260     skrll 	if (err)
   2889  1.260     skrll 		return err;
   2890  1.260     skrll 
   2891  1.260     skrll 	return 0;
   2892  1.260     skrll }
   2893  1.260     skrll 
   2894  1.260     skrll Static void
   2895  1.260     skrll ohci_device_bulk_fini(struct usbd_xfer *xfer)
   2896  1.260     skrll {
   2897  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2898  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2899  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2900  1.260     skrll 
   2901  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2902  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0);
   2903  1.260     skrll 
   2904  1.260     skrll 	mutex_enter(&sc->sc_lock);
   2905  1.260     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   2906  1.260     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
   2907  1.260     skrll 		if (std == NULL)
   2908  1.260     skrll 			break;
   2909  1.260     skrll 		if (std != opipe->tail.td)
   2910  1.260     skrll 			ohci_free_std_locked(sc, std);
   2911  1.260     skrll 	}
   2912  1.260     skrll 	mutex_exit(&sc->sc_lock);
   2913  1.260     skrll 
   2914  1.260     skrll 	if (ox->ox_nstd) {
   2915  1.260     skrll 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   2916  1.260     skrll 		kmem_free(ox->ox_stds, sz);
   2917  1.260     skrll 	}
   2918  1.260     skrll }
   2919  1.260     skrll 
   2920   1.82  augustss Static usbd_status
   2921  1.260     skrll ohci_device_bulk_transfer(struct usbd_xfer *xfer)
   2922    1.3  augustss {
   2923  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2924   1.53  augustss 	usbd_status err;
   2925   1.17  augustss 
   2926   1.46  augustss 	/* Insert last in queue. */
   2927  1.224       mrg 	mutex_enter(&sc->sc_lock);
   2928   1.53  augustss 	err = usb_insert_transfer(xfer);
   2929  1.224       mrg 	mutex_exit(&sc->sc_lock);
   2930   1.53  augustss 	if (err)
   2931  1.260     skrll 		return err;
   2932   1.46  augustss 
   2933   1.46  augustss 	/* Pipe isn't running, start first */
   2934  1.260     skrll 	return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2935   1.17  augustss }
   2936   1.17  augustss 
   2937   1.82  augustss Static usbd_status
   2938  1.260     skrll ohci_device_bulk_start(struct usbd_xfer *xfer)
   2939   1.17  augustss {
   2940  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2941  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2942  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2943  1.260     skrll 	ohci_soft_td_t *last;
   2944   1.48  augustss 	ohci_soft_td_t *data, *tail, *tdp;
   2945    1.3  augustss 	ohci_soft_ed_t *sed;
   2946  1.224       mrg 	int len, isread, endpt;
   2947  1.287       mrg 	const bool polling = sc->sc_bus.ub_usepolling;
   2948  1.260     skrll 
   2949  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2950    1.3  augustss 
   2951   1.83  augustss 	if (sc->sc_dying)
   2952  1.260     skrll 		return USBD_IOERROR;
   2953   1.83  augustss 
   2954  1.260     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2955  1.224       mrg 
   2956  1.260     skrll 	len = xfer->ux_length;
   2957  1.260     skrll 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   2958   1.40  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2959    1.3  augustss 	sed = opipe->sed;
   2960    1.3  augustss 
   2961  1.274  pgoyette 	DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer,
   2962  1.274  pgoyette 	    len, isread, xfer->ux_flags);
   2963  1.274  pgoyette 	DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0);
   2964   1.34  augustss 
   2965  1.287       mrg 	if (!polling)
   2966  1.287       mrg 		mutex_enter(&sc->sc_lock);
   2967    1.3  augustss 
   2968  1.260     skrll 	/*
   2969  1.260     skrll 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   2970  1.260     skrll 	 * next transfer
   2971  1.260     skrll 	 */
   2972  1.260     skrll 	data = opipe->tail.td;
   2973  1.260     skrll 	opipe->tail.td = ox->ox_stds[0];
   2974  1.260     skrll 	ox->ox_stds[0] = data;
   2975  1.260     skrll 	ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
   2976  1.260     skrll 
   2977  1.260     skrll 	/* point at sentinel */
   2978  1.260     skrll 	tail = opipe->tail.td;
   2979  1.260     skrll 	memset(&tail->td, 0, sizeof(tail->td));
   2980  1.260     skrll 	tail->nexttd = NULL;
   2981  1.260     skrll 	tail->xfer = NULL;
   2982  1.260     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   2983  1.273     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2984  1.260     skrll 	xfer->ux_hcpriv = data;
   2985    1.3  augustss 
   2986  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx data %#jx tail %#jx", (uintptr_t)xfer,
   2987  1.274  pgoyette 	    (uintptr_t)ox->ox_stds[0], (uintptr_t)tail, 0);
   2988  1.260     skrll 	KASSERT(opipe->tail.td == tail);
   2989  1.258     skrll 
   2990   1.77  augustss 	/* We want interrupt at the end of the transfer. */
   2991  1.260     skrll 	last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   2992  1.260     skrll 	last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   2993  1.260     skrll 	last->td.td_nexttd = HTOO32(tail->physaddr);
   2994  1.260     skrll 	last->nexttd = tail;
   2995  1.260     skrll 	last->flags |= OHCI_CALL_DONE;
   2996  1.260     skrll 	usb_syncmem(&last->dma, last->offs, sizeof(last->td),
   2997  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2998    1.3  augustss 
   2999  1.300  christos 	DPRINTFN(4, "ed_flags=0x%08jx td_flags=0x%08jx "
   3000  1.300  christos 		    "td_cbp=0x%08jx td_be=0x%08jx",
   3001  1.168  augustss 		    (int)O32TOH(sed->ed.ed_flags),
   3002  1.168  augustss 		    (int)O32TOH(data->td.td_flags),
   3003  1.168  augustss 		    (int)O32TOH(data->td.td_cbp),
   3004  1.260     skrll 		    (int)O32TOH(data->td.td_be));
   3005   1.34  augustss 
   3006   1.52  augustss #ifdef OHCI_DEBUG
   3007  1.260     skrll 	DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
   3008  1.260     skrll 	if (ohcidebug >= 5) {
   3009  1.168  augustss 		ohci_dump_ed(sc, sed);
   3010  1.168  augustss 		ohci_dump_tds(sc, data);
   3011   1.34  augustss 	}
   3012  1.260     skrll 	DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
   3013   1.34  augustss #endif
   3014   1.34  augustss 
   3015    1.3  augustss 	/* Insert ED in schedule */
   3016   1.48  augustss 	for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
   3017  1.260     skrll 		KASSERT(tdp->xfer == xfer);
   3018   1.48  augustss 	}
   3019  1.260     skrll 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3020  1.260     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3021  1.168  augustss 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3022  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3023  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3024  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3025    1.3  augustss 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
   3026  1.293  riastrad 	usbd_xfer_schedule_timeout(xfer);
   3027  1.282       mrg 	xfer->ux_status = USBD_IN_PROGRESS;
   3028  1.287       mrg 	if (!polling)
   3029  1.287       mrg 		mutex_exit(&sc->sc_lock);
   3030   1.34  augustss 
   3031  1.260     skrll 	return USBD_IN_PROGRESS;
   3032    1.3  augustss }
   3033    1.3  augustss 
   3034   1.82  augustss Static void
   3035  1.260     skrll ohci_device_bulk_abort(struct usbd_xfer *xfer)
   3036    1.3  augustss {
   3037  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   3038  1.260     skrll 
   3039  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3040  1.224       mrg 
   3041  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3042  1.224       mrg 
   3043  1.274  pgoyette 	DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3044  1.293  riastrad 	usbd_xfer_abort(xfer);
   3045    1.3  augustss }
   3046    1.3  augustss 
   3047  1.120  augustss /*
   3048   1.34  augustss  * Close a device bulk pipe.
   3049   1.34  augustss  */
   3050   1.82  augustss Static void
   3051  1.260     skrll ohci_device_bulk_close(struct usbd_pipe *pipe)
   3052    1.3  augustss {
   3053  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3054  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3055    1.3  augustss 
   3056  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3057  1.224       mrg 
   3058  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3059  1.260     skrll 
   3060  1.274  pgoyette 	DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0);
   3061   1.34  augustss 	ohci_close_pipe(pipe, sc->sc_bulk_head);
   3062  1.260     skrll 	ohci_free_std_locked(sc, opipe->tail.td);
   3063    1.1  augustss }
   3064    1.1  augustss 
   3065    1.1  augustss /************************/
   3066    1.1  augustss 
   3067  1.260     skrll Static int
   3068  1.260     skrll ohci_device_intr_init(struct usbd_xfer *xfer)
   3069  1.260     skrll {
   3070  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3071  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3072  1.260     skrll 	int len = xfer->ux_bufsize;
   3073  1.281      maya 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3074  1.260     skrll 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3075  1.260     skrll 	int err;
   3076  1.260     skrll 
   3077  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3078  1.260     skrll 
   3079  1.260     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3080  1.260     skrll 	KASSERT(len != 0);
   3081  1.260     skrll 
   3082  1.274  pgoyette 	DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer,
   3083  1.274  pgoyette 	    len, isread, xfer->ux_flags);
   3084  1.274  pgoyette 	DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0);
   3085  1.260     skrll 
   3086  1.260     skrll 	ox->ox_nstd = 0;
   3087  1.260     skrll 
   3088  1.260     skrll 	err = ohci_alloc_std_chain(sc, xfer, len, isread);
   3089  1.260     skrll 	if (err) {
   3090  1.260     skrll 		return err;
   3091  1.260     skrll 	}
   3092  1.260     skrll 
   3093  1.260     skrll 	return 0;
   3094  1.260     skrll }
   3095  1.260     skrll 
   3096  1.260     skrll Static void
   3097  1.260     skrll ohci_device_intr_fini(struct usbd_xfer *xfer)
   3098  1.260     skrll {
   3099  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3100  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3101  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3102  1.260     skrll 
   3103  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3104  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0);
   3105  1.260     skrll 
   3106  1.260     skrll 	mutex_enter(&sc->sc_lock);
   3107  1.260     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   3108  1.260     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
   3109  1.260     skrll 		if (std != NULL)
   3110  1.260     skrll 			break;
   3111  1.260     skrll 		if (std != opipe->tail.td)
   3112  1.260     skrll 			ohci_free_std_locked(sc, std);
   3113  1.260     skrll 	}
   3114  1.260     skrll 	mutex_exit(&sc->sc_lock);
   3115  1.260     skrll 
   3116  1.260     skrll 	if (ox->ox_nstd) {
   3117  1.260     skrll 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   3118  1.260     skrll 		kmem_free(ox->ox_stds, sz);
   3119  1.260     skrll 	}
   3120  1.260     skrll }
   3121  1.260     skrll 
   3122   1.82  augustss Static usbd_status
   3123  1.260     skrll ohci_device_intr_transfer(struct usbd_xfer *xfer)
   3124   1.17  augustss {
   3125  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3126   1.53  augustss 	usbd_status err;
   3127   1.17  augustss 
   3128   1.46  augustss 	/* Insert last in queue. */
   3129  1.224       mrg 	mutex_enter(&sc->sc_lock);
   3130   1.53  augustss 	err = usb_insert_transfer(xfer);
   3131  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3132   1.53  augustss 	if (err)
   3133  1.260     skrll 		return err;
   3134   1.46  augustss 
   3135   1.46  augustss 	/* Pipe isn't running, start first */
   3136  1.260     skrll 	return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3137   1.17  augustss }
   3138   1.17  augustss 
   3139   1.82  augustss Static usbd_status
   3140  1.260     skrll ohci_device_intr_start(struct usbd_xfer *xfer)
   3141    1.1  augustss {
   3142  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3143  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3144  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3145    1.1  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   3146  1.260     skrll 	ohci_soft_td_t *data, *last, *tail;
   3147  1.224       mrg 	int len, isread, endpt;
   3148  1.287       mrg 	const bool polling = sc->sc_bus.ub_usepolling;
   3149    1.1  augustss 
   3150  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3151  1.260     skrll 
   3152   1.83  augustss 	if (sc->sc_dying)
   3153  1.260     skrll 		return USBD_IOERROR;
   3154   1.83  augustss 
   3155  1.274  pgoyette 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd priv=%#jx", (uintptr_t)xfer,
   3156  1.274  pgoyette 	    xfer->ux_length, xfer->ux_flags, (uintptr_t)xfer->ux_priv);
   3157    1.1  augustss 
   3158  1.260     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3159    1.1  augustss 
   3160  1.260     skrll 	len = xfer->ux_length;
   3161  1.260     skrll 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3162  1.165     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3163    1.1  augustss 
   3164  1.287       mrg 	if (!polling)
   3165  1.287       mrg 		mutex_enter(&sc->sc_lock);
   3166  1.260     skrll 
   3167  1.260     skrll 	/*
   3168  1.260     skrll 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   3169  1.260     skrll 	 * next transfer.
   3170  1.260     skrll 	 */
   3171   1.60  augustss 	data = opipe->tail.td;
   3172  1.260     skrll 	opipe->tail.td = ox->ox_stds[0];
   3173  1.260     skrll 	ox->ox_stds[0] = data;
   3174  1.260     skrll 	ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
   3175  1.260     skrll 
   3176  1.260     skrll 	/* point at sentinel */
   3177  1.260     skrll 	tail = opipe->tail.td;
   3178  1.260     skrll 	memset(&tail->td, 0, sizeof(tail->td));
   3179  1.260     skrll 	tail->nexttd = NULL;
   3180   1.53  augustss 	tail->xfer = NULL;
   3181  1.260     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   3182  1.273     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3183  1.260     skrll 	xfer->ux_hcpriv = data;
   3184  1.260     skrll 
   3185  1.274  pgoyette 	DPRINTFN(8, "data %#jx tail %#jx", (uintptr_t)ox->ox_stds[0],
   3186  1.274  pgoyette 	    (uintptr_t)tail, 0, 0);
   3187  1.260     skrll 	KASSERT(opipe->tail.td == tail);
   3188  1.260     skrll 
   3189  1.260     skrll 	/* We want interrupt at the end of the transfer. */
   3190  1.260     skrll 	last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   3191  1.260     skrll 	last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   3192    1.1  augustss 
   3193  1.260     skrll 	last->td.td_nexttd = HTOO32(tail->physaddr);
   3194  1.260     skrll 	last->nexttd = tail;
   3195  1.260     skrll 	last->flags |= OHCI_CALL_DONE;
   3196  1.260     skrll 	usb_syncmem(&last->dma, last->offs, sizeof(last->td),
   3197  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3198    1.1  augustss 
   3199   1.52  augustss #ifdef OHCI_DEBUG
   3200  1.260     skrll 	DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
   3201  1.260     skrll 	if (ohcidebug >= 5) {
   3202  1.168  augustss 		ohci_dump_ed(sc, sed);
   3203  1.168  augustss 		ohci_dump_tds(sc, data);
   3204    1.1  augustss 	}
   3205  1.260     skrll 	DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
   3206    1.1  augustss #endif
   3207    1.1  augustss 
   3208    1.1  augustss 	/* Insert ED in schedule */
   3209  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3210  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3211  1.168  augustss 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3212  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3213  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3214  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3215    1.1  augustss 
   3216  1.282       mrg 	xfer->ux_status = USBD_IN_PROGRESS;
   3217  1.287       mrg 	if (!polling)
   3218  1.287       mrg 		mutex_exit(&sc->sc_lock);
   3219    1.1  augustss 
   3220  1.260     skrll 	return USBD_IN_PROGRESS;
   3221    1.1  augustss }
   3222    1.1  augustss 
   3223  1.227     skrll /* Abort a device interrupt request. */
   3224   1.82  augustss Static void
   3225  1.260     skrll ohci_device_intr_abort(struct usbd_xfer *xfer)
   3226    1.1  augustss {
   3227  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   3228  1.224       mrg 
   3229  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3230  1.260     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   3231  1.224       mrg 
   3232  1.293  riastrad 	usbd_xfer_abort(xfer);
   3233    1.1  augustss }
   3234    1.1  augustss 
   3235    1.1  augustss /* Close a device interrupt pipe. */
   3236   1.82  augustss Static void
   3237  1.260     skrll ohci_device_intr_close(struct usbd_pipe *pipe)
   3238    1.1  augustss {
   3239  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3240  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3241  1.260     skrll 	int nslots = opipe->intr.nslots;
   3242  1.260     skrll 	int pos = opipe->intr.pos;
   3243    1.1  augustss 	int j;
   3244    1.1  augustss 	ohci_soft_ed_t *p, *sed = opipe->sed;
   3245  1.224       mrg 
   3246  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3247  1.260     skrll 
   3248  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3249    1.1  augustss 
   3250  1.274  pgoyette 	DPRINTFN(1, "pipe=%#jx nslots=%jd pos=%jd", (uintptr_t)pipe, nslots,
   3251  1.274  pgoyette 	    pos, 0);
   3252  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs,
   3253  1.195    bouyer 	    sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3254  1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   3255  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3256  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3257  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3258  1.168  augustss 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   3259  1.168  augustss 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   3260  1.224       mrg 		usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   3261    1.1  augustss 
   3262    1.1  augustss 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
   3263  1.172  christos 		continue;
   3264  1.260     skrll 	KASSERT(p);
   3265  1.173  christos 	p->next = sed->next;
   3266  1.173  christos 	p->ed.ed_nexted = sed->ed.ed_nexted;
   3267  1.195    bouyer 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   3268  1.195    bouyer 	    sizeof(p->ed.ed_nexted),
   3269  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3270    1.1  augustss 
   3271    1.1  augustss 	for (j = 0; j < nslots; j++)
   3272   1.31  wrstuden 		--sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
   3273    1.1  augustss 
   3274  1.260     skrll 	ohci_free_std_locked(sc, opipe->tail.td);
   3275  1.260     skrll 	ohci_free_sed_locked(sc, opipe->sed);
   3276    1.1  augustss }
   3277    1.1  augustss 
   3278   1.82  augustss Static usbd_status
   3279   1.91  augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
   3280    1.1  augustss {
   3281  1.224       mrg 	int i, j, best;
   3282    1.1  augustss 	u_int npoll, slow, shigh, nslots;
   3283    1.1  augustss 	u_int bestbw, bw;
   3284    1.1  augustss 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
   3285    1.1  augustss 
   3286  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3287  1.260     skrll 
   3288  1.274  pgoyette 	DPRINTFN(2, "pipe=%#jx", (uintptr_t)opipe, 0, 0, 0);
   3289    1.1  augustss 	if (ival == 0) {
   3290    1.1  augustss 		printf("ohci_setintr: 0 interval\n");
   3291  1.260     skrll 		return USBD_INVAL;
   3292    1.1  augustss 	}
   3293    1.1  augustss 
   3294    1.1  augustss 	npoll = OHCI_NO_INTRS;
   3295    1.1  augustss 	while (npoll > ival)
   3296    1.1  augustss 		npoll /= 2;
   3297  1.274  pgoyette 	DPRINTFN(2, "ival=%jd npoll=%jd", ival, npoll, 0, 0);
   3298    1.1  augustss 
   3299    1.1  augustss 	/*
   3300    1.1  augustss 	 * We now know which level in the tree the ED must go into.
   3301    1.1  augustss 	 * Figure out which slot has most bandwidth left over.
   3302    1.1  augustss 	 * Slots to examine:
   3303    1.1  augustss 	 * npoll
   3304    1.1  augustss 	 * 1	0
   3305    1.1  augustss 	 * 2	1 2
   3306    1.1  augustss 	 * 4	3 4 5 6
   3307    1.1  augustss 	 * 8	7 8 9 10 11 12 13 14
   3308    1.1  augustss 	 * N    (N-1) .. (N-1+N-1)
   3309    1.1  augustss 	 */
   3310    1.1  augustss 	slow = npoll-1;
   3311    1.1  augustss 	shigh = slow + npoll;
   3312    1.1  augustss 	nslots = OHCI_NO_INTRS / npoll;
   3313    1.1  augustss 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
   3314    1.1  augustss 		bw = 0;
   3315    1.1  augustss 		for (j = 0; j < nslots; j++)
   3316   1.28  augustss 			bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
   3317    1.1  augustss 		if (bw < bestbw) {
   3318    1.1  augustss 			best = i;
   3319    1.1  augustss 			bestbw = bw;
   3320    1.1  augustss 		}
   3321    1.1  augustss 	}
   3322  1.274  pgoyette 	DPRINTFN(2, "best=%jd(%jd..%jd) bestbw=%jd", best, slow, shigh, bestbw);
   3323    1.1  augustss 
   3324  1.224       mrg 	mutex_enter(&sc->sc_lock);
   3325    1.1  augustss 	hsed = sc->sc_eds[best];
   3326    1.1  augustss 	sed->next = hsed->next;
   3327  1.195    bouyer 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3328  1.195    bouyer 	    sizeof(hsed->ed.ed_flags),
   3329  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3330   1.39  augustss 	sed->ed.ed_nexted = hsed->ed.ed_nexted;
   3331  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3332  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3333  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3334    1.1  augustss 	hsed->next = sed;
   3335  1.168  augustss 	hsed->ed.ed_nexted = HTOO32(sed->physaddr);
   3336  1.195    bouyer 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3337  1.195    bouyer 	    sizeof(hsed->ed.ed_flags),
   3338  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3339  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3340    1.1  augustss 
   3341    1.1  augustss 	for (j = 0; j < nslots; j++)
   3342   1.28  augustss 		++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
   3343  1.260     skrll 	opipe->intr.nslots = nslots;
   3344  1.260     skrll 	opipe->intr.pos = best;
   3345    1.1  augustss 
   3346  1.274  pgoyette 	DPRINTFN(5, "returns %#jx", (uintptr_t)opipe, 0, 0, 0);
   3347  1.260     skrll 	return USBD_NORMAL_COMPLETION;
   3348   1.60  augustss }
   3349   1.60  augustss 
   3350   1.60  augustss /***********************/
   3351   1.60  augustss 
   3352  1.260     skrll Static int
   3353  1.260     skrll ohci_device_isoc_init(struct usbd_xfer *xfer)
   3354  1.260     skrll {
   3355  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3356  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3357  1.260     skrll 	ohci_soft_itd_t *sitd;
   3358  1.260     skrll 	size_t i;
   3359  1.260     skrll 	int err;
   3360  1.260     skrll 
   3361  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3362  1.260     skrll 
   3363  1.274  pgoyette 	DPRINTFN(1, "xfer %#jx len %jd flags %jd", (uintptr_t)xfer,
   3364  1.274  pgoyette 	    xfer->ux_length, xfer->ux_flags, 0);
   3365  1.260     skrll 
   3366  1.298     skrll 	const size_t nfsitd = howmany(xfer->ux_nframes, OHCI_ITD_NOFFSET);
   3367  1.260     skrll 	const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE;
   3368  1.260     skrll 	const size_t nsitd = MAX(nfsitd, nbsitd) + 1;
   3369  1.260     skrll 
   3370  1.260     skrll 	ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd,
   3371  1.260     skrll 	    KM_SLEEP);
   3372  1.260     skrll 	ox->ox_nsitd = nsitd;
   3373  1.260     skrll 
   3374  1.260     skrll 	for (i = 0; i < nsitd; i++) {
   3375  1.260     skrll 		/* Allocate next ITD */
   3376  1.260     skrll 		sitd = ohci_alloc_sitd(sc);
   3377  1.260     skrll 		if (sitd == NULL) {
   3378  1.260     skrll 			err = ENOMEM;
   3379  1.260     skrll 			goto fail;
   3380  1.260     skrll 		}
   3381  1.260     skrll 		ox->ox_sitds[i] = sitd;
   3382  1.260     skrll 		sitd->xfer = xfer;
   3383  1.260     skrll 		sitd->flags = 0;
   3384  1.260     skrll 	}
   3385  1.260     skrll 
   3386  1.260     skrll 	return 0;
   3387  1.260     skrll fail:
   3388  1.260     skrll 	for (; i > 0;) {
   3389  1.260     skrll 		ohci_free_sitd(sc, ox->ox_sitds[--i]);
   3390  1.260     skrll 	}
   3391  1.260     skrll 	return err;
   3392  1.260     skrll }
   3393  1.260     skrll 
   3394  1.260     skrll Static void
   3395  1.260     skrll ohci_device_isoc_fini(struct usbd_xfer *xfer)
   3396  1.260     skrll {
   3397  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3398  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3399  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3400  1.260     skrll 
   3401  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3402  1.260     skrll 
   3403  1.260     skrll 	mutex_enter(&sc->sc_lock);
   3404  1.260     skrll 	for (size_t i = 0; i < ox->ox_nsitd; i++) {
   3405  1.260     skrll 		if (ox->ox_sitds[i] != opipe->tail.itd) {
   3406  1.260     skrll 			ohci_free_sitd_locked(sc, ox->ox_sitds[i]);
   3407  1.260     skrll 		}
   3408  1.260     skrll 	}
   3409  1.260     skrll 	mutex_exit(&sc->sc_lock);
   3410  1.260     skrll 
   3411  1.260     skrll 	if (ox->ox_nsitd) {
   3412  1.260     skrll 		const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd;
   3413  1.260     skrll 		kmem_free(ox->ox_sitds, sz);
   3414  1.260     skrll 	}
   3415  1.260     skrll }
   3416  1.260     skrll 
   3417  1.260     skrll 
   3418   1.60  augustss usbd_status
   3419  1.260     skrll ohci_device_isoc_transfer(struct usbd_xfer *xfer)
   3420   1.60  augustss {
   3421  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3422  1.260     skrll 	usbd_status __diagused err;
   3423  1.260     skrll 
   3424  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3425   1.60  augustss 
   3426  1.274  pgoyette 	DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3427   1.60  augustss 
   3428   1.60  augustss 	/* Put it on our queue, */
   3429  1.224       mrg 	mutex_enter(&sc->sc_lock);
   3430   1.60  augustss 	err = usb_insert_transfer(xfer);
   3431  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3432   1.60  augustss 
   3433  1.260     skrll 	KASSERT(err == USBD_NORMAL_COMPLETION);
   3434   1.60  augustss 
   3435   1.60  augustss 	/* insert into schedule, */
   3436   1.60  augustss 	ohci_device_isoc_enter(xfer);
   3437   1.60  augustss 
   3438   1.83  augustss 	/* and start if the pipe wasn't running */
   3439  1.260     skrll 	return USBD_IN_PROGRESS;
   3440   1.60  augustss }
   3441   1.60  augustss 
   3442   1.60  augustss void
   3443  1.260     skrll ohci_device_isoc_enter(struct usbd_xfer *xfer)
   3444   1.60  augustss {
   3445  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3446  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3447  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3448   1.61  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   3449  1.260     skrll 	ohci_soft_itd_t *sitd, *nsitd, *tail;
   3450   1.83  augustss 	ohci_physaddr_t buf, offs, noffs, bp0;
   3451   1.61  augustss 	int i, ncur, nframes;
   3452   1.61  augustss 
   3453  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3454  1.274  pgoyette 	DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3455  1.260     skrll 
   3456  1.260     skrll 	mutex_enter(&sc->sc_lock);
   3457   1.83  augustss 
   3458  1.260     skrll 	if (sc->sc_dying) {
   3459  1.260     skrll 		mutex_exit(&sc->sc_lock);
   3460   1.83  augustss 		return;
   3461  1.260     skrll 	}
   3462  1.260     skrll 
   3463  1.260     skrll 	struct isoc *isoc = &opipe->isoc;
   3464  1.260     skrll 
   3465  1.274  pgoyette 	DPRINTFN(1, "used=%jd next=%jd xfer=%#jx nframes=%jd",
   3466  1.274  pgoyette 	     isoc->inuse, isoc->next, (uintptr_t)xfer, xfer->ux_nframes);
   3467   1.83  augustss 
   3468  1.301     skrll 	int isread =
   3469  1.301     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   3470  1.301     skrll 
   3471  1.304     skrll 	if (xfer->ux_length)
   3472  1.305     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3473  1.304     skrll 		    isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   3474  1.301     skrll 
   3475  1.260     skrll 	if (isoc->next == -1) {
   3476   1.83  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   3477  1.307  jakllsch 		usb_syncmem(&sc->sc_hccadma,
   3478  1.307  jakllsch 		    offsetof(struct ohci_hcca, hcca_frame_number),
   3479  1.307  jakllsch 		    sizeof(sc->sc_hcca->hcca_frame_number),
   3480  1.307  jakllsch 		    BUS_DMASYNC_POSTREAD);
   3481  1.260     skrll 		isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
   3482  1.274  pgoyette 		DPRINTFN(2,"start next=%jd", isoc->next, 0, 0, 0);
   3483   1.83  augustss 	}
   3484   1.83  augustss 
   3485   1.61  augustss 	sitd = opipe->tail.itd;
   3486  1.260     skrll 	opipe->tail.itd = ox->ox_sitds[0];
   3487  1.260     skrll 	ox->ox_sitds[0] = sitd;
   3488  1.260     skrll 
   3489  1.260     skrll 	buf = DMAADDR(&xfer->ux_dmabuf, 0);
   3490   1.83  augustss 	bp0 = OHCI_PAGE(buf);
   3491   1.83  augustss 	offs = OHCI_PAGE_OFFSET(buf);
   3492  1.260     skrll 	nframes = xfer->ux_nframes;
   3493  1.260     skrll 	xfer->ux_hcpriv = sitd;
   3494  1.260     skrll 	size_t j = 1;
   3495   1.61  augustss 	for (i = ncur = 0; i < nframes; i++, ncur++) {
   3496  1.260     skrll 		noffs = offs + xfer->ux_frlengths[i];
   3497   1.61  augustss 		if (ncur == OHCI_ITD_NOFFSET ||	/* all offsets used */
   3498   1.83  augustss 		    OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
   3499  1.120  augustss 
   3500   1.83  augustss 			/* Allocate next ITD */
   3501  1.260     skrll 			nsitd = ox->ox_sitds[j++];
   3502  1.260     skrll 			KASSERT(nsitd != NULL);
   3503  1.260     skrll 			KASSERT(j < ox->ox_nsitd);
   3504   1.83  augustss 
   3505   1.83  augustss 			/* Fill current ITD */
   3506  1.168  augustss 			sitd->itd.itd_flags = HTOO32(
   3507  1.120  augustss 				OHCI_ITD_NOCC |
   3508  1.260     skrll 				OHCI_ITD_SET_SF(isoc->next) |
   3509   1.83  augustss 				OHCI_ITD_SET_DI(6) | /* delay intr a little */
   3510   1.83  augustss 				OHCI_ITD_SET_FC(ncur));
   3511  1.168  augustss 			sitd->itd.itd_bp0 = HTOO32(bp0);
   3512  1.168  augustss 			sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
   3513  1.168  augustss 			sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3514  1.260     skrll 			sitd->nextitd = nsitd;
   3515   1.83  augustss 			sitd->xfer = xfer;
   3516   1.83  augustss 			sitd->flags = 0;
   3517  1.260     skrll #ifdef DIAGNOSTIC
   3518  1.260     skrll 			sitd->isdone = false;
   3519  1.260     skrll #endif
   3520  1.260     skrll 			ohci_hash_add_itd(sc, sitd);
   3521  1.195    bouyer 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3522  1.195    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3523   1.83  augustss 
   3524   1.61  augustss 			sitd = nsitd;
   3525  1.260     skrll 			isoc->next = isoc->next + ncur;
   3526   1.83  augustss 			bp0 = OHCI_PAGE(buf + offs);
   3527   1.61  augustss 			ncur = 0;
   3528   1.61  augustss 		}
   3529  1.168  augustss 		sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
   3530   1.83  augustss 		offs = noffs;
   3531   1.61  augustss 	}
   3532  1.260     skrll 	KASSERT(j <= ox->ox_nsitd);
   3533  1.260     skrll 
   3534  1.260     skrll 	/* point at sentinel */
   3535  1.260     skrll 	tail = opipe->tail.itd;
   3536  1.260     skrll 	memset(&tail->itd, 0, sizeof(tail->itd));
   3537  1.260     skrll 	tail->nextitd = NULL;
   3538  1.265     skrll 	tail->xfer = NULL;
   3539  1.260     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd),
   3540  1.260     skrll 	    BUS_DMASYNC_PREWRITE);
   3541  1.260     skrll 
   3542   1.83  augustss 	/* Fixup last used ITD */
   3543  1.168  augustss 	sitd->itd.itd_flags = HTOO32(
   3544  1.120  augustss 		OHCI_ITD_NOCC |
   3545  1.260     skrll 		OHCI_ITD_SET_SF(isoc->next) |
   3546   1.61  augustss 		OHCI_ITD_SET_DI(0) |
   3547   1.61  augustss 		OHCI_ITD_SET_FC(ncur));
   3548  1.168  augustss 	sitd->itd.itd_bp0 = HTOO32(bp0);
   3549  1.260     skrll 	sitd->itd.itd_nextitd = HTOO32(tail->physaddr);
   3550  1.168  augustss 	sitd->itd.itd_be = HTOO32(bp0 + offs - 1);
   3551  1.260     skrll 	sitd->nextitd = tail;
   3552   1.83  augustss 	sitd->xfer = xfer;
   3553   1.83  augustss 	sitd->flags = OHCI_CALL_DONE;
   3554  1.260     skrll #ifdef DIAGNOSTIC
   3555  1.260     skrll 	sitd->isdone = false;
   3556  1.260     skrll #endif
   3557  1.260     skrll 	ohci_hash_add_itd(sc, sitd);
   3558  1.195    bouyer 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3559  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3560   1.83  augustss 
   3561  1.260     skrll 	isoc->next = isoc->next + ncur;
   3562  1.260     skrll 	isoc->inuse += nframes;
   3563   1.83  augustss 
   3564  1.260     skrll 	/* XXX pretend we did it all */
   3565  1.260     skrll 	xfer->ux_actlen = offs;
   3566  1.260     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   3567   1.83  augustss 
   3568   1.83  augustss #ifdef OHCI_DEBUG
   3569  1.260     skrll 	if (ohcidebug >= 5) {
   3570  1.307  jakllsch 		usb_syncmem(&sc->sc_hccadma,
   3571  1.307  jakllsch 		    offsetof(struct ohci_hcca, hcca_frame_number),
   3572  1.307  jakllsch 		    sizeof(sc->sc_hcca->hcca_frame_number),
   3573  1.307  jakllsch 		    BUS_DMASYNC_POSTREAD);
   3574  1.274  pgoyette 		DPRINTF("frame=%jd", O32TOH(sc->sc_hcca->hcca_frame_number),
   3575  1.260     skrll 		    0, 0, 0);
   3576  1.260     skrll 		ohci_dump_itds(sc, xfer->ux_hcpriv);
   3577  1.168  augustss 		ohci_dump_ed(sc, sed);
   3578   1.83  augustss 	}
   3579   1.83  augustss #endif
   3580   1.61  augustss 
   3581  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3582  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3583  1.260     skrll 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3584  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3585  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3586  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3587  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3588  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3589   1.60  augustss }
   3590   1.60  augustss 
   3591   1.60  augustss void
   3592  1.260     skrll ohci_device_isoc_abort(struct usbd_xfer *xfer)
   3593   1.60  augustss {
   3594  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3595  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3596   1.83  augustss 	ohci_soft_ed_t *sed;
   3597   1.83  augustss 	ohci_soft_itd_t *sitd;
   3598   1.83  augustss 
   3599  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3600  1.274  pgoyette 	DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3601   1.83  augustss 
   3602  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3603   1.83  augustss 
   3604   1.83  augustss 	/* Transfer is already done. */
   3605  1.260     skrll 	if (xfer->ux_status != USBD_NOT_STARTED &&
   3606  1.260     skrll 	    xfer->ux_status != USBD_IN_PROGRESS) {
   3607   1.83  augustss 		printf("ohci_device_isoc_abort: early return\n");
   3608  1.224       mrg 		goto done;
   3609   1.83  augustss 	}
   3610   1.83  augustss 
   3611   1.83  augustss 	/* Give xfer the requested abort code. */
   3612  1.260     skrll 	xfer->ux_status = USBD_CANCELLED;
   3613   1.83  augustss 
   3614   1.83  augustss 	sed = opipe->sed;
   3615  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3616  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3617  1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   3618  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3619  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3620  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3621   1.83  augustss 
   3622  1.260     skrll 	sitd = xfer->ux_hcpriv;
   3623  1.260     skrll 	KASSERT(sitd);
   3624  1.260     skrll 
   3625  1.260     skrll 	usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
   3626  1.260     skrll 
   3627   1.83  augustss 	for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
   3628  1.260     skrll 		ohci_hash_rem_itd(sc, sitd);
   3629   1.83  augustss #ifdef DIAGNOSTIC
   3630  1.274  pgoyette 		DPRINTFN(1, "abort sets done sitd=%#jx", (uintptr_t)sitd,
   3631  1.274  pgoyette 		    0, 0, 0);
   3632  1.260     skrll 		sitd->isdone = true;
   3633   1.83  augustss #endif
   3634   1.83  augustss 	}
   3635   1.83  augustss 
   3636   1.83  augustss 	/* Run callback. */
   3637   1.83  augustss 	usb_transfer_complete(xfer);
   3638   1.83  augustss 
   3639  1.168  augustss 	sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
   3640  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   3641  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3642  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3643   1.83  augustss 
   3644  1.224       mrg  done:
   3645  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3646   1.60  augustss }
   3647   1.60  augustss 
   3648   1.60  augustss void
   3649  1.260     skrll ohci_device_isoc_done(struct usbd_xfer *xfer)
   3650   1.60  augustss {
   3651  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3652  1.274  pgoyette 	DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3653  1.301     skrll 
   3654  1.301     skrll 	int isread =
   3655  1.301     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   3656  1.301     skrll 
   3657  1.301     skrll 	DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, xfer->ux_actlen,
   3658  1.301     skrll 	    0, 0);
   3659  1.306  jakllsch 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3660  1.301     skrll 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3661   1.60  augustss }
   3662   1.60  augustss 
   3663   1.60  augustss usbd_status
   3664  1.260     skrll ohci_setup_isoc(struct usbd_pipe *pipe)
   3665   1.60  augustss {
   3666  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3667  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3668  1.260     skrll 	struct isoc *isoc = &opipe->isoc;
   3669   1.60  augustss 
   3670  1.260     skrll 	isoc->next = -1;
   3671  1.260     skrll 	isoc->inuse = 0;
   3672   1.60  augustss 
   3673  1.224       mrg 	mutex_enter(&sc->sc_lock);
   3674  1.168  augustss 	ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
   3675  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3676   1.83  augustss 
   3677  1.260     skrll 	return USBD_NORMAL_COMPLETION;
   3678   1.60  augustss }
   3679   1.60  augustss 
   3680   1.60  augustss void
   3681  1.260     skrll ohci_device_isoc_close(struct usbd_pipe *pipe)
   3682   1.60  augustss {
   3683  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3684  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3685   1.60  augustss 
   3686  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3687  1.224       mrg 
   3688  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3689  1.274  pgoyette 	DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0);
   3690   1.60  augustss 	ohci_close_pipe(pipe, sc->sc_isoc_head);
   3691   1.83  augustss #ifdef DIAGNOSTIC
   3692  1.260     skrll 	opipe->tail.itd->isdone = true;
   3693   1.83  augustss #endif
   3694  1.260     skrll 	ohci_free_sitd_locked(sc, opipe->tail.itd);
   3695    1.1  augustss }
   3696