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ohci.c revision 1.308
      1  1.308     skrll /*	$NetBSD: ohci.c,v 1.308 2020/05/24 07:42:51 skrll Exp $	*/
      2    1.1  augustss 
      3    1.1  augustss /*
      4  1.224       mrg  * Copyright (c) 1998, 2004, 2005, 2012 The NetBSD Foundation, Inc.
      5    1.1  augustss  * All rights reserved.
      6    1.1  augustss  *
      7   1.11  augustss  * This code is derived from software contributed to The NetBSD Foundation
      8   1.89  augustss  * by Lennart Augustsson (lennart (at) augustsson.net) at
      9  1.224       mrg  * Carlstedt Research & Technology, Jared D. McNeill (jmcneill (at) invisible.ca)
     10  1.224       mrg  * and Matthew R. Green (mrg (at) eterna.com.au).
     11  1.157   mycroft  * This code is derived from software contributed to The NetBSD Foundation
     12  1.157   mycroft  * by Charles M. Hannum.
     13    1.1  augustss  *
     14    1.1  augustss  * Redistribution and use in source and binary forms, with or without
     15    1.1  augustss  * modification, are permitted provided that the following conditions
     16    1.1  augustss  * are met:
     17    1.1  augustss  * 1. Redistributions of source code must retain the above copyright
     18    1.1  augustss  *    notice, this list of conditions and the following disclaimer.
     19    1.1  augustss  * 2. Redistributions in binary form must reproduce the above copyright
     20    1.1  augustss  *    notice, this list of conditions and the following disclaimer in the
     21    1.1  augustss  *    documentation and/or other materials provided with the distribution.
     22    1.1  augustss  *
     23    1.1  augustss  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24    1.1  augustss  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25    1.1  augustss  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26    1.1  augustss  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27    1.1  augustss  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28    1.1  augustss  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29    1.1  augustss  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30    1.1  augustss  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31    1.1  augustss  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32    1.1  augustss  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33    1.1  augustss  * POSSIBILITY OF SUCH DAMAGE.
     34    1.1  augustss  */
     35    1.1  augustss 
     36    1.1  augustss /*
     37    1.1  augustss  * USB Open Host Controller driver.
     38    1.1  augustss  *
     39   1.96  augustss  * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
     40  1.201  uebayasi  * USB spec: http://www.usb.org/developers/docs/
     41    1.1  augustss  */
     42  1.108     lukem 
     43  1.108     lukem #include <sys/cdefs.h>
     44  1.308     skrll __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.308 2020/05/24 07:42:51 skrll Exp $");
     45  1.260     skrll 
     46  1.263     pooka #ifdef _KERNEL_OPT
     47  1.260     skrll #include "opt_usb.h"
     48  1.263     pooka #endif
     49    1.1  augustss 
     50    1.1  augustss #include <sys/param.h>
     51  1.260     skrll 
     52  1.260     skrll #include <sys/cpu.h>
     53  1.260     skrll #include <sys/device.h>
     54  1.260     skrll #include <sys/kernel.h>
     55  1.224       mrg #include <sys/kmem.h>
     56    1.1  augustss #include <sys/proc.h>
     57    1.1  augustss #include <sys/queue.h>
     58  1.260     skrll #include <sys/select.h>
     59  1.260     skrll #include <sys/sysctl.h>
     60  1.260     skrll #include <sys/systm.h>
     61    1.1  augustss 
     62   1.16  augustss #include <machine/endian.h>
     63    1.4  augustss 
     64    1.1  augustss #include <dev/usb/usb.h>
     65    1.1  augustss #include <dev/usb/usbdi.h>
     66    1.1  augustss #include <dev/usb/usbdivar.h>
     67   1.38  augustss #include <dev/usb/usb_mem.h>
     68    1.1  augustss #include <dev/usb/usb_quirks.h>
     69    1.1  augustss 
     70    1.1  augustss #include <dev/usb/ohcireg.h>
     71    1.1  augustss #include <dev/usb/ohcivar.h>
     72  1.260     skrll #include <dev/usb/usbroothub.h>
     73  1.260     skrll #include <dev/usb/usbhist.h>
     74  1.260     skrll 
     75  1.260     skrll #ifdef USB_DEBUG
     76  1.260     skrll #ifndef OHCI_DEBUG
     77  1.260     skrll #define ohcidebug 0
     78  1.260     skrll #else
     79  1.260     skrll static int ohcidebug = 10;
     80  1.260     skrll 
     81  1.260     skrll SYSCTL_SETUP(sysctl_hw_ohci_setup, "sysctl hw.ohci setup")
     82  1.260     skrll {
     83  1.260     skrll 	int err;
     84  1.260     skrll 	const struct sysctlnode *rnode;
     85  1.260     skrll 	const struct sysctlnode *cnode;
     86  1.260     skrll 
     87  1.260     skrll 	err = sysctl_createv(clog, 0, NULL, &rnode,
     88  1.260     skrll 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "ohci",
     89  1.260     skrll 	    SYSCTL_DESCR("ohci global controls"),
     90  1.260     skrll 	    NULL, 0, NULL, 0, CTL_HW, CTL_CREATE, CTL_EOL);
     91    1.1  augustss 
     92  1.260     skrll 	if (err)
     93  1.260     skrll 		goto fail;
     94  1.260     skrll 
     95  1.260     skrll 	/* control debugging printfs */
     96  1.260     skrll 	err = sysctl_createv(clog, 0, &rnode, &cnode,
     97  1.260     skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
     98  1.260     skrll 	    "debug", SYSCTL_DESCR("Enable debugging output"),
     99  1.260     skrll 	    NULL, 0, &ohcidebug, sizeof(ohcidebug), CTL_CREATE, CTL_EOL);
    100  1.260     skrll 	if (err)
    101  1.260     skrll 		goto fail;
    102  1.260     skrll 
    103  1.260     skrll 	return;
    104  1.260     skrll fail:
    105  1.260     skrll 	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
    106  1.260     skrll }
    107    1.1  augustss 
    108  1.260     skrll #endif /* OHCI_DEBUG */
    109  1.260     skrll #endif /* USB_DEBUG */
    110   1.36  augustss 
    111  1.260     skrll #define	DPRINTF(FMT,A,B,C,D)	USBHIST_LOG(ohcidebug,FMT,A,B,C,D)
    112  1.260     skrll #define	DPRINTFN(N,FMT,A,B,C,D)	USBHIST_LOGN(ohcidebug,N,FMT,A,B,C,D)
    113  1.260     skrll #define	OHCIHIST_FUNC()		USBHIST_FUNC()
    114  1.260     skrll #define	OHCIHIST_CALLED(name)	USBHIST_CALLED(ohcidebug)
    115   1.52  augustss 
    116   1.16  augustss #if BYTE_ORDER == BIG_ENDIAN
    117  1.169      tron #define	SWAP_ENDIAN	OHCI_LITTLE_ENDIAN
    118   1.16  augustss #else
    119  1.169      tron #define	SWAP_ENDIAN	OHCI_BIG_ENDIAN
    120   1.16  augustss #endif
    121   1.16  augustss 
    122  1.169      tron #define	O16TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap16(val) : val)
    123  1.169      tron #define	O32TOH(val)	(sc->sc_endian == SWAP_ENDIAN ? bswap32(val) : val)
    124  1.169      tron #define	HTOO16(val)	O16TOH(val)
    125  1.169      tron #define	HTOO32(val)	O32TOH(val)
    126  1.168  augustss 
    127    1.1  augustss struct ohci_pipe;
    128    1.1  augustss 
    129   1.91  augustss Static ohci_soft_ed_t  *ohci_alloc_sed(ohci_softc_t *);
    130   1.91  augustss Static void		ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
    131    1.1  augustss 
    132   1.91  augustss Static ohci_soft_td_t  *ohci_alloc_std(ohci_softc_t *);
    133   1.91  augustss Static void		ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
    134  1.260     skrll Static void		ohci_free_std_locked(ohci_softc_t *, ohci_soft_td_t *);
    135    1.1  augustss 
    136   1.91  augustss Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
    137   1.91  augustss Static void		ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
    138  1.260     skrll Static void		ohci_free_sitd_locked(ohci_softc_t *,
    139  1.260     skrll 			    ohci_soft_itd_t *);
    140   1.60  augustss 
    141  1.260     skrll Static int		ohci_alloc_std_chain(ohci_softc_t *, struct usbd_xfer *,
    142  1.260     skrll 			    int, int);
    143  1.260     skrll Static void		ohci_free_stds(ohci_softc_t *, struct ohci_xfer *);
    144   1.53  augustss 
    145  1.260     skrll Static void		ohci_reset_std_chain(ohci_softc_t *, struct usbd_xfer *,
    146  1.260     skrll 			    int, int, ohci_soft_td_t *, ohci_soft_td_t **);
    147  1.260     skrll 
    148  1.260     skrll Static usbd_status	ohci_open(struct usbd_pipe *);
    149   1.91  augustss Static void		ohci_poll(struct usbd_bus *);
    150   1.99  augustss Static void		ohci_softintr(void *);
    151  1.260     skrll Static void		ohci_rhsc(ohci_softc_t *, struct usbd_xfer *);
    152  1.260     skrll Static void		ohci_rhsc_softint(void *);
    153   1.91  augustss 
    154  1.168  augustss Static void		ohci_add_ed(ohci_softc_t *, ohci_soft_ed_t *,
    155  1.168  augustss 			    ohci_soft_ed_t *);
    156  1.168  augustss 
    157  1.224       mrg Static void		ohci_rem_ed(ohci_softc_t *, ohci_soft_ed_t *,
    158  1.224       mrg 				    ohci_soft_ed_t *);
    159   1.91  augustss Static void		ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
    160   1.91  augustss Static void		ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
    161   1.91  augustss Static ohci_soft_td_t  *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
    162   1.91  augustss Static void		ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
    163   1.91  augustss Static void		ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
    164   1.91  augustss Static ohci_soft_itd_t  *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
    165   1.91  augustss 
    166  1.260     skrll Static usbd_status	ohci_setup_isoc(struct usbd_pipe *);
    167  1.260     skrll Static void		ohci_device_isoc_enter(struct usbd_xfer *);
    168   1.91  augustss 
    169  1.260     skrll Static struct usbd_xfer *
    170  1.260     skrll 			ohci_allocx(struct usbd_bus *, unsigned int);
    171  1.260     skrll Static void		ohci_freex(struct usbd_bus *, struct usbd_xfer *);
    172  1.293  riastrad Static bool		ohci_dying(struct usbd_bus *);
    173  1.224       mrg Static void		ohci_get_lock(struct usbd_bus *, kmutex_t **);
    174  1.260     skrll Static int		ohci_roothub_ctrl(struct usbd_bus *,
    175  1.260     skrll 			    usb_device_request_t *, void *, int);
    176   1.91  augustss 
    177  1.260     skrll Static usbd_status	ohci_root_intr_transfer(struct usbd_xfer *);
    178  1.260     skrll Static usbd_status	ohci_root_intr_start(struct usbd_xfer *);
    179  1.260     skrll Static void		ohci_root_intr_abort(struct usbd_xfer *);
    180  1.260     skrll Static void		ohci_root_intr_close(struct usbd_pipe *);
    181  1.260     skrll Static void		ohci_root_intr_done(struct usbd_xfer *);
    182  1.260     skrll 
    183  1.260     skrll Static int		ohci_device_ctrl_init(struct usbd_xfer *);
    184  1.260     skrll Static void		ohci_device_ctrl_fini(struct usbd_xfer *);
    185  1.260     skrll Static usbd_status	ohci_device_ctrl_transfer(struct usbd_xfer *);
    186  1.260     skrll Static usbd_status	ohci_device_ctrl_start(struct usbd_xfer *);
    187  1.260     skrll Static void		ohci_device_ctrl_abort(struct usbd_xfer *);
    188  1.260     skrll Static void		ohci_device_ctrl_close(struct usbd_pipe *);
    189  1.260     skrll Static void		ohci_device_ctrl_done(struct usbd_xfer *);
    190  1.260     skrll 
    191  1.260     skrll Static int		ohci_device_bulk_init(struct usbd_xfer *);
    192  1.260     skrll Static void		ohci_device_bulk_fini(struct usbd_xfer *);
    193  1.260     skrll Static usbd_status	ohci_device_bulk_transfer(struct usbd_xfer *);
    194  1.260     skrll Static usbd_status	ohci_device_bulk_start(struct usbd_xfer *);
    195  1.260     skrll Static void		ohci_device_bulk_abort(struct usbd_xfer *);
    196  1.260     skrll Static void		ohci_device_bulk_close(struct usbd_pipe *);
    197  1.260     skrll Static void		ohci_device_bulk_done(struct usbd_xfer *);
    198  1.260     skrll 
    199  1.260     skrll Static int		ohci_device_intr_init(struct usbd_xfer *);
    200  1.260     skrll Static void		ohci_device_intr_fini(struct usbd_xfer *);
    201  1.260     skrll Static usbd_status	ohci_device_intr_transfer(struct usbd_xfer *);
    202  1.260     skrll Static usbd_status	ohci_device_intr_start(struct usbd_xfer *);
    203  1.260     skrll Static void		ohci_device_intr_abort(struct usbd_xfer *);
    204  1.260     skrll Static void		ohci_device_intr_close(struct usbd_pipe *);
    205  1.260     skrll Static void		ohci_device_intr_done(struct usbd_xfer *);
    206  1.260     skrll 
    207  1.260     skrll Static int		ohci_device_isoc_init(struct usbd_xfer *);
    208  1.260     skrll Static void		ohci_device_isoc_fini(struct usbd_xfer *);
    209  1.260     skrll Static usbd_status	ohci_device_isoc_transfer(struct usbd_xfer *);
    210  1.260     skrll Static void		ohci_device_isoc_abort(struct usbd_xfer *);
    211  1.260     skrll Static void		ohci_device_isoc_close(struct usbd_pipe *);
    212  1.260     skrll Static void		ohci_device_isoc_done(struct usbd_xfer *);
    213   1.91  augustss 
    214  1.260     skrll Static usbd_status	ohci_device_setintr(ohci_softc_t *,
    215  1.260     skrll 			    struct ohci_pipe *, int);
    216   1.91  augustss 
    217  1.104  augustss Static void		ohci_rhsc_enable(void *);
    218   1.91  augustss 
    219  1.260     skrll Static void		ohci_close_pipe(struct usbd_pipe *, ohci_soft_ed_t *);
    220  1.293  riastrad Static void		ohci_abortx(struct usbd_xfer *);
    221   1.53  augustss 
    222  1.260     skrll Static void		ohci_device_clear_toggle(struct usbd_pipe *);
    223  1.260     skrll Static void		ohci_noop(struct usbd_pipe *);
    224   1.37  augustss 
    225   1.52  augustss #ifdef OHCI_DEBUG
    226   1.91  augustss Static void		ohci_dumpregs(ohci_softc_t *);
    227  1.168  augustss Static void		ohci_dump_tds(ohci_softc_t *, ohci_soft_td_t *);
    228  1.168  augustss Static void		ohci_dump_td(ohci_softc_t *, ohci_soft_td_t *);
    229  1.168  augustss Static void		ohci_dump_ed(ohci_softc_t *, ohci_soft_ed_t *);
    230  1.168  augustss Static void		ohci_dump_itd(ohci_softc_t *, ohci_soft_itd_t *);
    231  1.168  augustss Static void		ohci_dump_itds(ohci_softc_t *, ohci_soft_itd_t *);
    232    1.1  augustss #endif
    233    1.1  augustss 
    234   1.88  augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
    235   1.88  augustss 			BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
    236   1.88  augustss #define OWRITE1(sc, r, x) \
    237   1.88  augustss  do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    238   1.88  augustss #define OWRITE2(sc, r, x) \
    239   1.88  augustss  do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    240   1.88  augustss #define OWRITE4(sc, r, x) \
    241   1.88  augustss  do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
    242  1.174       mrg 
    243  1.174       mrg static __inline uint32_t
    244  1.174       mrg OREAD4(ohci_softc_t *sc, bus_size_t r)
    245  1.174       mrg {
    246  1.174       mrg 
    247  1.174       mrg 	OBARR(sc);
    248  1.174       mrg 	return bus_space_read_4(sc->iot, sc->ioh, r);
    249  1.174       mrg }
    250    1.1  augustss 
    251    1.1  augustss /* Reverse the bits in a value 0 .. 31 */
    252  1.260     skrll Static uint8_t revbits[OHCI_NO_INTRS] =
    253    1.1  augustss   { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
    254    1.1  augustss     0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
    255    1.1  augustss     0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
    256    1.1  augustss     0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
    257    1.1  augustss 
    258    1.1  augustss struct ohci_pipe {
    259    1.1  augustss 	struct usbd_pipe pipe;
    260    1.1  augustss 	ohci_soft_ed_t *sed;
    261   1.60  augustss 	union {
    262   1.60  augustss 		ohci_soft_td_t *td;
    263   1.60  augustss 		ohci_soft_itd_t *itd;
    264   1.60  augustss 	} tail;
    265    1.1  augustss 	/* Info needed for different pipe kinds. */
    266    1.1  augustss 	union {
    267    1.1  augustss 		/* Control pipe */
    268    1.1  augustss 		struct {
    269    1.4  augustss 			usb_dma_t reqdma;
    270  1.260     skrll 		} ctrl;
    271    1.1  augustss 		/* Interrupt pipe */
    272    1.1  augustss 		struct {
    273    1.1  augustss 			int nslots;
    274    1.1  augustss 			int pos;
    275    1.1  augustss 		} intr;
    276  1.260     skrll 		/* Isochronous pipe */
    277  1.260     skrll 		struct isoc {
    278   1.60  augustss 			int next, inuse;
    279  1.260     skrll 		} isoc;
    280  1.260     skrll 	};
    281    1.1  augustss };
    282    1.1  augustss 
    283  1.182  drochner Static const struct usbd_bus_methods ohci_bus_methods = {
    284  1.260     skrll 	.ubm_open =	ohci_open,
    285  1.260     skrll 	.ubm_softint =	ohci_softintr,
    286  1.260     skrll 	.ubm_dopoll =	ohci_poll,
    287  1.260     skrll 	.ubm_allocx =	ohci_allocx,
    288  1.260     skrll 	.ubm_freex =	ohci_freex,
    289  1.293  riastrad 	.ubm_abortx =	ohci_abortx,
    290  1.293  riastrad 	.ubm_dying =	ohci_dying,
    291  1.260     skrll 	.ubm_getlock =	ohci_get_lock,
    292  1.260     skrll 	.ubm_rhctrl =	ohci_roothub_ctrl,
    293    1.1  augustss };
    294    1.1  augustss 
    295  1.182  drochner Static const struct usbd_pipe_methods ohci_root_intr_methods = {
    296  1.260     skrll 	.upm_transfer =	ohci_root_intr_transfer,
    297  1.260     skrll 	.upm_start =	ohci_root_intr_start,
    298  1.260     skrll 	.upm_abort =	ohci_root_intr_abort,
    299  1.260     skrll 	.upm_close =	ohci_root_intr_close,
    300  1.260     skrll 	.upm_cleartoggle =	ohci_noop,
    301  1.260     skrll 	.upm_done =	ohci_root_intr_done,
    302    1.1  augustss };
    303    1.1  augustss 
    304  1.182  drochner Static const struct usbd_pipe_methods ohci_device_ctrl_methods = {
    305  1.260     skrll 	.upm_init =	ohci_device_ctrl_init,
    306  1.260     skrll 	.upm_fini =	ohci_device_ctrl_fini,
    307  1.260     skrll 	.upm_transfer =	ohci_device_ctrl_transfer,
    308  1.260     skrll 	.upm_start =	ohci_device_ctrl_start,
    309  1.260     skrll 	.upm_abort =	ohci_device_ctrl_abort,
    310  1.260     skrll 	.upm_close =	ohci_device_ctrl_close,
    311  1.260     skrll 	.upm_cleartoggle =	ohci_noop,
    312  1.260     skrll 	.upm_done =	ohci_device_ctrl_done,
    313    1.1  augustss };
    314    1.1  augustss 
    315  1.182  drochner Static const struct usbd_pipe_methods ohci_device_intr_methods = {
    316  1.260     skrll 	.upm_init =	ohci_device_intr_init,
    317  1.260     skrll 	.upm_fini =	ohci_device_intr_fini,
    318  1.260     skrll 	.upm_transfer =	ohci_device_intr_transfer,
    319  1.260     skrll 	.upm_start =	ohci_device_intr_start,
    320  1.260     skrll 	.upm_abort =	ohci_device_intr_abort,
    321  1.260     skrll 	.upm_close =	ohci_device_intr_close,
    322  1.260     skrll 	.upm_cleartoggle =	ohci_device_clear_toggle,
    323  1.260     skrll 	.upm_done =	ohci_device_intr_done,
    324    1.1  augustss };
    325    1.1  augustss 
    326  1.182  drochner Static const struct usbd_pipe_methods ohci_device_bulk_methods = {
    327  1.260     skrll 	.upm_init =	ohci_device_bulk_init,
    328  1.260     skrll 	.upm_fini =	ohci_device_bulk_fini,
    329  1.260     skrll 	.upm_transfer =	ohci_device_bulk_transfer,
    330  1.260     skrll 	.upm_start =	ohci_device_bulk_start,
    331  1.260     skrll 	.upm_abort =	ohci_device_bulk_abort,
    332  1.260     skrll 	.upm_close =	ohci_device_bulk_close,
    333  1.260     skrll 	.upm_cleartoggle =	ohci_device_clear_toggle,
    334  1.260     skrll 	.upm_done =	ohci_device_bulk_done,
    335    1.3  augustss };
    336    1.3  augustss 
    337  1.182  drochner Static const struct usbd_pipe_methods ohci_device_isoc_methods = {
    338  1.260     skrll 	.upm_init =	ohci_device_isoc_init,
    339  1.260     skrll 	.upm_fini =	ohci_device_isoc_fini,
    340  1.260     skrll 	.upm_transfer =	ohci_device_isoc_transfer,
    341  1.260     skrll 	.upm_abort =	ohci_device_isoc_abort,
    342  1.260     skrll 	.upm_close =	ohci_device_isoc_close,
    343  1.260     skrll 	.upm_cleartoggle =	ohci_noop,
    344  1.260     skrll 	.upm_done =	ohci_device_isoc_done,
    345   1.43  augustss };
    346   1.43  augustss 
    347   1.47  augustss int
    348  1.189    dyoung ohci_activate(device_t self, enum devact act)
    349   1.47  augustss {
    350  1.189    dyoung 	struct ohci_softc *sc = device_private(self);
    351   1.47  augustss 
    352   1.47  augustss 	switch (act) {
    353   1.47  augustss 	case DVACT_DEACTIVATE:
    354  1.183  kiyohara 		sc->sc_dying = 1;
    355  1.203    dyoung 		return 0;
    356  1.203    dyoung 	default:
    357  1.203    dyoung 		return EOPNOTSUPP;
    358   1.47  augustss 	}
    359   1.47  augustss }
    360   1.47  augustss 
    361  1.187    dyoung void
    362  1.187    dyoung ohci_childdet(device_t self, device_t child)
    363  1.187    dyoung {
    364  1.187    dyoung 	struct ohci_softc *sc = device_private(self);
    365  1.187    dyoung 
    366  1.187    dyoung 	KASSERT(sc->sc_child == child);
    367  1.187    dyoung 	sc->sc_child = NULL;
    368  1.187    dyoung }
    369  1.187    dyoung 
    370   1.47  augustss int
    371   1.91  augustss ohci_detach(struct ohci_softc *sc, int flags)
    372   1.47  augustss {
    373   1.47  augustss 	int rv = 0;
    374   1.47  augustss 
    375   1.47  augustss 	if (sc->sc_child != NULL)
    376   1.47  augustss 		rv = config_detach(sc->sc_child, flags);
    377  1.120  augustss 
    378   1.47  augustss 	if (rv != 0)
    379  1.260     skrll 		return rv;
    380   1.47  augustss 
    381  1.277   msaitoh 	softint_disestablish(sc->sc_rhsc_si);
    382  1.104  augustss 
    383  1.277   msaitoh 	callout_halt(&sc->sc_tmo_rhsc, NULL);
    384  1.209    dyoung 	callout_destroy(&sc->sc_tmo_rhsc);
    385  1.116  augustss 
    386  1.224       mrg 	mutex_destroy(&sc->sc_lock);
    387  1.224       mrg 	mutex_destroy(&sc->sc_intr_lock);
    388  1.224       mrg 
    389  1.198    cegger 	if (sc->sc_hcca != NULL)
    390  1.198    cegger 		usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
    391  1.232  christos 	pool_cache_destroy(sc->sc_xferpool);
    392   1.47  augustss 
    393  1.260     skrll 	return rv;
    394   1.47  augustss }
    395   1.47  augustss 
    396    1.1  augustss ohci_soft_ed_t *
    397   1.91  augustss ohci_alloc_sed(ohci_softc_t *sc)
    398    1.1  augustss {
    399    1.1  augustss 	ohci_soft_ed_t *sed;
    400   1.53  augustss 	usbd_status err;
    401    1.1  augustss 	int i, offs;
    402    1.4  augustss 	usb_dma_t dma;
    403    1.1  augustss 
    404  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    405  1.260     skrll 
    406  1.260     skrll 	mutex_enter(&sc->sc_lock);
    407   1.53  augustss 	if (sc->sc_freeeds == NULL) {
    408  1.260     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    409  1.260     skrll 		mutex_exit(&sc->sc_lock);
    410  1.260     skrll 
    411   1.53  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
    412  1.301     skrll 		    OHCI_ED_ALIGN, USBMALLOC_COHERENT, &dma);
    413   1.53  augustss 		if (err)
    414  1.302  jakllsch 			return NULL;
    415  1.260     skrll 
    416  1.260     skrll 		mutex_enter(&sc->sc_lock);
    417  1.225     skrll 		for (i = 0; i < OHCI_SED_CHUNK; i++) {
    418   1.39  augustss 			offs = i * OHCI_SED_SIZE;
    419  1.123  augustss 			sed = KERNADDR(&dma, offs);
    420  1.125  augustss 			sed->physaddr = DMAADDR(&dma, offs);
    421  1.195    bouyer 			sed->dma = dma;
    422  1.195    bouyer 			sed->offs = offs;
    423    1.1  augustss 			sed->next = sc->sc_freeeds;
    424    1.1  augustss 			sc->sc_freeeds = sed;
    425    1.1  augustss 		}
    426    1.1  augustss 	}
    427    1.1  augustss 	sed = sc->sc_freeeds;
    428    1.1  augustss 	sc->sc_freeeds = sed->next;
    429  1.260     skrll 	mutex_exit(&sc->sc_lock);
    430  1.260     skrll 
    431   1.39  augustss 	memset(&sed->ed, 0, sizeof(ohci_ed_t));
    432    1.1  augustss 	sed->next = 0;
    433  1.260     skrll 	return sed;
    434  1.260     skrll }
    435  1.260     skrll 
    436  1.260     skrll static inline void
    437  1.260     skrll ohci_free_sed_locked(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    438  1.260     skrll {
    439  1.260     skrll 
    440  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    441  1.260     skrll 
    442  1.260     skrll 	sed->next = sc->sc_freeeds;
    443  1.260     skrll 	sc->sc_freeeds = sed;
    444    1.1  augustss }
    445    1.1  augustss 
    446    1.1  augustss void
    447   1.91  augustss ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
    448    1.1  augustss {
    449  1.260     skrll 
    450  1.260     skrll 	mutex_enter(&sc->sc_lock);
    451  1.260     skrll 	ohci_free_sed_locked(sc, sed);
    452  1.260     skrll 	mutex_exit(&sc->sc_lock);
    453    1.1  augustss }
    454    1.1  augustss 
    455    1.1  augustss ohci_soft_td_t *
    456   1.91  augustss ohci_alloc_std(ohci_softc_t *sc)
    457    1.1  augustss {
    458    1.1  augustss 	ohci_soft_td_t *std;
    459   1.53  augustss 	usbd_status err;
    460    1.1  augustss 	int i, offs;
    461    1.4  augustss 	usb_dma_t dma;
    462    1.1  augustss 
    463  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    464  1.240     skrll 
    465  1.260     skrll 	mutex_enter(&sc->sc_lock);
    466   1.53  augustss 	if (sc->sc_freetds == NULL) {
    467  1.260     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    468  1.260     skrll 		mutex_exit(&sc->sc_lock);
    469  1.260     skrll 
    470   1.53  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
    471  1.301     skrll 		    OHCI_TD_ALIGN, USBMALLOC_COHERENT, &dma);
    472   1.53  augustss 		if (err)
    473  1.260     skrll 			return NULL;
    474  1.260     skrll 
    475  1.260     skrll 		mutex_enter(&sc->sc_lock);
    476  1.259     skrll 		for (i = 0; i < OHCI_STD_CHUNK; i++) {
    477   1.39  augustss 			offs = i * OHCI_STD_SIZE;
    478  1.123  augustss 			std = KERNADDR(&dma, offs);
    479  1.125  augustss 			std->physaddr = DMAADDR(&dma, offs);
    480  1.195    bouyer 			std->dma = dma;
    481  1.195    bouyer 			std->offs = offs;
    482    1.1  augustss 			std->nexttd = sc->sc_freetds;
    483    1.1  augustss 			sc->sc_freetds = std;
    484    1.1  augustss 		}
    485    1.1  augustss 	}
    486   1.69  augustss 
    487    1.1  augustss 	std = sc->sc_freetds;
    488    1.1  augustss 	sc->sc_freetds = std->nexttd;
    489  1.260     skrll 	mutex_exit(&sc->sc_lock);
    490  1.260     skrll 
    491   1.39  augustss 	memset(&std->td, 0, sizeof(ohci_td_t));
    492   1.83  augustss 	std->nexttd = NULL;
    493   1.83  augustss 	std->xfer = NULL;
    494   1.69  augustss 
    495  1.260     skrll 	return std;
    496    1.1  augustss }
    497    1.1  augustss 
    498    1.1  augustss void
    499  1.260     skrll ohci_free_std_locked(ohci_softc_t *sc, ohci_soft_td_t *std)
    500    1.1  augustss {
    501  1.258     skrll 
    502  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    503  1.260     skrll 
    504    1.1  augustss 	std->nexttd = sc->sc_freetds;
    505    1.1  augustss 	sc->sc_freetds = std;
    506    1.1  augustss }
    507    1.1  augustss 
    508  1.260     skrll void
    509  1.260     skrll ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
    510  1.260     skrll {
    511  1.260     skrll 
    512  1.260     skrll 	mutex_enter(&sc->sc_lock);
    513  1.260     skrll 	ohci_free_std_locked(sc, std);
    514  1.260     skrll 	mutex_exit(&sc->sc_lock);
    515  1.260     skrll }
    516  1.260     skrll 
    517  1.260     skrll Static int
    518  1.260     skrll ohci_alloc_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer, int length, int rd)
    519  1.260     skrll {
    520  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
    521  1.260     skrll 	uint16_t flags = xfer->ux_flags;
    522  1.260     skrll 
    523  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    524  1.260     skrll 
    525  1.274  pgoyette 	DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd",
    526  1.260     skrll 	    xfer->ux_pipe->up_dev->ud_addr,
    527  1.260     skrll 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress),
    528  1.260     skrll 	    length, xfer->ux_pipe->up_dev->ud_speed);
    529  1.260     skrll 
    530  1.260     skrll 	ASSERT_SLEEPABLE();
    531  1.260     skrll 	KASSERT(length != 0 || (!rd && (flags & USBD_FORCE_SHORT_XFER)));
    532  1.260     skrll 
    533  1.260     skrll 	size_t nstd = (!rd && (flags & USBD_FORCE_SHORT_XFER)) ? 1 : 0;
    534  1.298     skrll 	nstd += howmany(length, OHCI_PAGE_SIZE);
    535  1.260     skrll 	ox->ox_stds = kmem_zalloc(sizeof(ohci_soft_td_t *) * nstd,
    536  1.260     skrll 	    KM_SLEEP);
    537  1.260     skrll 	ox->ox_nstd = nstd;
    538  1.260     skrll 
    539  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, nstd, 0, 0);
    540  1.260     skrll 
    541  1.260     skrll 	for (size_t j = 0; j < ox->ox_nstd;) {
    542  1.260     skrll 		ohci_soft_td_t *cur = ohci_alloc_std(sc);
    543  1.260     skrll 		if (cur == NULL)
    544  1.260     skrll 			goto nomem;
    545  1.260     skrll 
    546  1.260     skrll 		ox->ox_stds[j++] = cur;
    547  1.260     skrll 		cur->xfer = xfer;
    548  1.260     skrll 		cur->flags = 0;
    549  1.260     skrll 	}
    550  1.260     skrll 
    551  1.260     skrll 	return 0;
    552  1.260     skrll 
    553  1.260     skrll  nomem:
    554  1.260     skrll 	ohci_free_stds(sc, ox);
    555  1.260     skrll 	kmem_free(ox->ox_stds, sizeof(ohci_soft_td_t *) * nstd);
    556  1.260     skrll 
    557  1.260     skrll 	return ENOMEM;
    558  1.260     skrll }
    559  1.260     skrll 
    560  1.260     skrll Static void
    561  1.260     skrll ohci_free_stds(ohci_softc_t *sc, struct ohci_xfer *ox)
    562  1.260     skrll {
    563  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    564  1.274  pgoyette 	DPRINTF("ox=%#jx", (uintptr_t)ox, 0, 0, 0);
    565  1.260     skrll 
    566  1.260     skrll 	mutex_enter(&sc->sc_lock);
    567  1.260     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
    568  1.260     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
    569  1.260     skrll 		if (std == NULL)
    570  1.260     skrll 			break;
    571  1.260     skrll 		ohci_free_std_locked(sc, std);
    572  1.260     skrll 	}
    573  1.260     skrll 	mutex_exit(&sc->sc_lock);
    574  1.260     skrll }
    575  1.260     skrll 
    576  1.260     skrll void
    577  1.260     skrll ohci_reset_std_chain(ohci_softc_t *sc, struct usbd_xfer *xfer,
    578  1.260     skrll     int alen, int rd, ohci_soft_td_t *sp, ohci_soft_td_t **ep)
    579   1.48  augustss {
    580  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
    581   1.48  augustss 	ohci_soft_td_t *next, *cur;
    582   1.75  augustss 	int len, curlen;
    583  1.260     skrll 	usb_dma_t *dma = &xfer->ux_dmabuf;
    584  1.260     skrll 	uint16_t flags = xfer->ux_flags;
    585   1.48  augustss 
    586  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    587  1.274  pgoyette 	DPRINTF("start len=%jd", alen, 0, 0, 0);
    588   1.75  augustss 
    589  1.289       mrg 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
    590  1.224       mrg 
    591  1.274  pgoyette 	DPRINTFN(8, "addr=%jd endpt=%jd len=%jd speed=%jd",
    592  1.260     skrll 	    xfer->ux_pipe->up_dev->ud_addr,
    593  1.260     skrll 	    UE_GET_ADDR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress),
    594  1.260     skrll 	    alen, xfer->ux_pipe->up_dev->ud_speed);
    595  1.260     skrll 
    596  1.260     skrll 	KASSERT(sp);
    597  1.260     skrll 
    598  1.260     skrll 	int mps = UGETW(xfer->ux_pipe->up_endpoint->ue_edesc->wMaxPacketSize);
    599  1.260     skrll 
    600  1.260     skrll 	/*
    601  1.260     skrll 	 * Assign next for the len == 0 case where we don't go through the
    602  1.260     skrll 	 * main loop.
    603  1.260     skrll 	 */
    604   1.75  augustss 	len = alen;
    605  1.260     skrll 	cur = next = sp;
    606  1.260     skrll 
    607  1.195    bouyer 	usb_syncmem(dma, 0, len,
    608  1.195    bouyer 	    rd ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
    609  1.260     skrll 	const uint32_t tdflags = HTOO32(
    610  1.120  augustss 	    (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
    611   1.77  augustss 	    OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
    612   1.61  augustss 
    613  1.260     skrll 	size_t curoffs = 0;
    614  1.260     skrll 	for (size_t j = 1; len != 0;) {
    615  1.260     skrll 		if (j == ox->ox_nstd)
    616  1.260     skrll 			next = NULL;
    617  1.260     skrll 		else
    618  1.260     skrll 			next = ox->ox_stds[j++];
    619  1.260     skrll 		KASSERT(next != cur);
    620  1.260     skrll 
    621  1.308     skrll 		curlen = len;
    622  1.308     skrll 		/*
    623  1.308     skrll 		 * The OHCI hardware can handle at most one page crossing per
    624  1.308     skrll 		 * TD.  That is, 2 * OHCI_PAGE_SIZE as a maximum.  Limit the
    625  1.308     skrll 		 * length in this TD accordingly.
    626  1.308     skrll 		 */
    627  1.270     skrll 		const ohci_physaddr_t sdataphys = DMAADDR(dma, curoffs);
    628   1.48  augustss 
    629  1.308     skrll 		int maxlen = (2 * OHCI_PAGE_SIZE) - OHCI_PAGE_OFFSET(sdataphys);
    630  1.308     skrll 		if (curlen > maxlen) {
    631  1.308     skrll 			curlen = maxlen;
    632  1.308     skrll 
    633  1.308     skrll 			/*
    634  1.308     skrll 			 * the length must be a multiple of
    635  1.308     skrll 			 * the max size
    636  1.308     skrll 			 */
    637  1.260     skrll 			curlen -= curlen % mps;
    638   1.48  augustss 		}
    639  1.308     skrll 
    640  1.308     skrll 		const int edataoffs = curoffs + curlen - 1;
    641  1.308     skrll 		const ohci_physaddr_t edataphys = DMAADDR(dma, edataoffs);
    642  1.308     skrll 
    643  1.260     skrll 		KASSERT(curlen != 0);
    644  1.300  christos 		DPRINTFN(4, "sdataphys=0x%08jx edataphys=0x%08jx "
    645  1.274  pgoyette 		    "len=%jd curlen=%jd", sdataphys, edataphys, len, curlen);
    646   1.48  augustss 
    647   1.77  augustss 		cur->td.td_flags = tdflags;
    648  1.260     skrll 		cur->td.td_cbp = HTOO32(sdataphys);
    649  1.260     skrll 		cur->td.td_be = HTOO32(edataphys);
    650  1.260     skrll 		cur->td.td_nexttd = (next != NULL) ? HTOO32(next->physaddr) : 0;
    651   1.48  augustss 		cur->nexttd = next;
    652   1.48  augustss 		cur->len = curlen;
    653   1.48  augustss 		cur->flags = OHCI_ADD_LEN;
    654   1.77  augustss 		cur->xfer = xfer;
    655  1.260     skrll 	 	ohci_hash_add_td(sc, cur);
    656  1.260     skrll 
    657  1.260     skrll 		curoffs += curlen;
    658  1.260     skrll 		len -= curlen;
    659  1.260     skrll 
    660  1.260     skrll 		if (len != 0) {
    661  1.260     skrll 			KASSERT(next != NULL);
    662  1.260     skrll 			DPRINTFN(10, "extend chain", 0, 0, 0, 0);
    663  1.272     skrll 			usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    664  1.272     skrll 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    665  1.272     skrll 
    666  1.260     skrll 			cur = next;
    667  1.260     skrll 		}
    668   1.48  augustss 	}
    669  1.260     skrll 	cur->td.td_flags |=
    670  1.262     skrll 	    HTOO32(xfer->ux_flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0);
    671  1.260     skrll 
    672  1.260     skrll 	if (!rd &&
    673  1.260     skrll 	    (flags & USBD_FORCE_SHORT_XFER) &&
    674  1.260     skrll 	    alen % mps == 0) {
    675  1.272     skrll 		/* We're adding a ZLP so sync the previous TD */
    676  1.272     skrll 		usb_syncmem(&cur->dma, cur->offs, sizeof(cur->td),
    677  1.272     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    678  1.272     skrll 
    679   1.61  augustss 		/* Force a 0 length transfer at the end. */
    680   1.75  augustss 
    681  1.260     skrll 		KASSERT(next != NULL);
    682   1.75  augustss 		cur = next;
    683   1.61  augustss 
    684   1.77  augustss 		cur->td.td_flags = tdflags;
    685   1.61  augustss 		cur->td.td_cbp = 0; /* indicate 0 length packet */
    686  1.260     skrll 		cur->td.td_nexttd = 0;
    687   1.75  augustss 		cur->td.td_be = ~0;
    688  1.260     skrll 		cur->nexttd = NULL;
    689   1.61  augustss 		cur->len = 0;
    690   1.61  augustss 		cur->flags = 0;
    691   1.77  augustss 		cur->xfer = xfer;
    692  1.260     skrll 	 	ohci_hash_add_td(sc, cur);
    693  1.260     skrll 
    694  1.260     skrll 		DPRINTFN(2, "add 0 xfer", 0, 0, 0, 0);
    695   1.61  augustss 	}
    696  1.272     skrll 
    697  1.272     skrll 	/* Last TD gets usb_syncmem'ed by caller */
    698   1.77  augustss 	*ep = cur;
    699   1.48  augustss }
    700   1.48  augustss 
    701   1.60  augustss ohci_soft_itd_t *
    702   1.91  augustss ohci_alloc_sitd(ohci_softc_t *sc)
    703   1.60  augustss {
    704   1.60  augustss 	ohci_soft_itd_t *sitd;
    705   1.60  augustss 	usbd_status err;
    706  1.224       mrg 	int i, offs;
    707   1.60  augustss 	usb_dma_t dma;
    708   1.60  augustss 
    709  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    710  1.260     skrll 
    711  1.260     skrll 	mutex_enter(&sc->sc_lock);
    712   1.60  augustss 	if (sc->sc_freeitds == NULL) {
    713  1.260     skrll 		DPRINTFN(2, "allocating chunk", 0, 0, 0, 0);
    714  1.260     skrll 		mutex_exit(&sc->sc_lock);
    715  1.260     skrll 
    716   1.83  augustss 		err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
    717  1.301     skrll 		    OHCI_ITD_ALIGN, USBMALLOC_COHERENT, &dma);
    718   1.60  augustss 		if (err)
    719  1.260     skrll 			return NULL;
    720  1.260     skrll 		mutex_enter(&sc->sc_lock);
    721  1.259     skrll 		for (i = 0; i < OHCI_SITD_CHUNK; i++) {
    722   1.83  augustss 			offs = i * OHCI_SITD_SIZE;
    723  1.123  augustss 			sitd = KERNADDR(&dma, offs);
    724  1.125  augustss 			sitd->physaddr = DMAADDR(&dma, offs);
    725  1.195    bouyer 			sitd->dma = dma;
    726  1.195    bouyer 			sitd->offs = offs;
    727   1.60  augustss 			sitd->nextitd = sc->sc_freeitds;
    728   1.60  augustss 			sc->sc_freeitds = sitd;
    729   1.60  augustss 		}
    730   1.60  augustss 	}
    731   1.83  augustss 
    732   1.60  augustss 	sitd = sc->sc_freeitds;
    733   1.60  augustss 	sc->sc_freeitds = sitd->nextitd;
    734  1.260     skrll 	mutex_exit(&sc->sc_lock);
    735  1.260     skrll 
    736   1.60  augustss 	memset(&sitd->itd, 0, sizeof(ohci_itd_t));
    737   1.83  augustss 	sitd->nextitd = NULL;
    738   1.83  augustss 	sitd->xfer = NULL;
    739   1.83  augustss 
    740   1.83  augustss #ifdef DIAGNOSTIC
    741  1.260     skrll 	sitd->isdone = true;
    742   1.83  augustss #endif
    743   1.83  augustss 
    744  1.260     skrll 	return sitd;
    745   1.60  augustss }
    746   1.60  augustss 
    747  1.260     skrll Static void
    748  1.260     skrll ohci_free_sitd_locked(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    749   1.60  augustss {
    750   1.83  augustss 
    751  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    752  1.274  pgoyette 	DPRINTFN(10, "sitd=%#jx", (uintptr_t)sitd, 0, 0, 0);
    753   1.83  augustss 
    754  1.260     skrll 	KASSERT(sitd->isdone);
    755   1.83  augustss #ifdef DIAGNOSTIC
    756  1.134    toshii 	/* Warn double free */
    757  1.260     skrll 	sitd->isdone = false;
    758   1.83  augustss #endif
    759   1.83  augustss 
    760   1.60  augustss 	sitd->nextitd = sc->sc_freeitds;
    761   1.60  augustss 	sc->sc_freeitds = sitd;
    762   1.60  augustss }
    763   1.60  augustss 
    764  1.260     skrll void
    765  1.260     skrll ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
    766  1.260     skrll {
    767  1.260     skrll 
    768  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    769  1.260     skrll 
    770  1.260     skrll 	mutex_enter(&sc->sc_lock);
    771  1.260     skrll 	ohci_free_sitd_locked(sc, sitd);
    772  1.260     skrll 	mutex_exit(&sc->sc_lock);
    773  1.260     skrll }
    774  1.260     skrll 
    775  1.260     skrll int
    776   1.91  augustss ohci_init(ohci_softc_t *sc)
    777    1.1  augustss {
    778    1.1  augustss 	ohci_soft_ed_t *sed, *psed;
    779   1.53  augustss 	usbd_status err;
    780    1.1  augustss 	int i;
    781  1.260     skrll 	uint32_t s, ctl, rwc, ival, hcr, fm, per, rev, desca /*, descb */;
    782  1.260     skrll 
    783  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
    784   1.16  augustss 
    785  1.199  jmcneill 	aprint_normal_dev(sc->sc_dev, "");
    786  1.199  jmcneill 
    787  1.198    cegger 	sc->sc_hcca = NULL;
    788  1.224       mrg 	callout_init(&sc->sc_tmo_rhsc, CALLOUT_MPSAFE);
    789  1.224       mrg 
    790  1.224       mrg 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
    791  1.256     skrll 	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
    792  1.224       mrg 
    793  1.264     skrll 	sc->sc_rhsc_si = softint_establish(SOFTINT_USB | SOFTINT_MPSAFE,
    794  1.224       mrg 	    ohci_rhsc_softint, sc);
    795  1.198    cegger 
    796  1.198    cegger 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    797  1.198    cegger 		LIST_INIT(&sc->sc_hash_tds[i]);
    798  1.198    cegger 	for (i = 0; i < OHCI_HASH_SIZE; i++)
    799  1.198    cegger 		LIST_INIT(&sc->sc_hash_itds[i]);
    800  1.198    cegger 
    801  1.232  christos 	sc->sc_xferpool = pool_cache_init(sizeof(struct ohci_xfer), 0, 0, 0,
    802  1.232  christos 	    "ohcixfer", NULL, IPL_USB, NULL, NULL, NULL);
    803  1.198    cegger 
    804   1.56  augustss 	rev = OREAD4(sc, OHCI_REVISION);
    805  1.200     enami 	aprint_normal("OHCI version %d.%d%s\n",
    806  1.199  jmcneill 	    OHCI_REV_HI(rev), OHCI_REV_LO(rev),
    807  1.199  jmcneill 	    OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
    808   1.55  augustss 
    809    1.1  augustss 	if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
    810  1.199  jmcneill 		aprint_error_dev(sc->sc_dev, "unsupported OHCI revision\n");
    811  1.260     skrll 		sc->sc_bus.ub_revision = USBREV_UNKNOWN;
    812  1.260     skrll 		return -1;
    813    1.1  augustss 	}
    814  1.260     skrll 	sc->sc_bus.ub_revision = USBREV_1_0;
    815  1.260     skrll 	sc->sc_bus.ub_usedma = true;
    816  1.308     skrll 	sc->sc_bus.ub_dmaflags = USBMALLOC_MULTISEG;
    817  1.153      fvdl 
    818   1.73  augustss 	/* XXX determine alignment by R/W */
    819    1.1  augustss 	/* Allocate the HCCA area. */
    820  1.120  augustss 	err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
    821  1.301     skrll 	    OHCI_HCCA_ALIGN, USBMALLOC_COHERENT, &sc->sc_hccadma);
    822  1.198    cegger 	if (err) {
    823  1.198    cegger 		sc->sc_hcca = NULL;
    824  1.198    cegger 		return err;
    825  1.198    cegger 	}
    826  1.123  augustss 	sc->sc_hcca = KERNADDR(&sc->sc_hccadma, 0);
    827    1.1  augustss 	memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
    828    1.1  augustss 
    829    1.1  augustss 	sc->sc_eintrs = OHCI_NORMAL_INTRS;
    830    1.1  augustss 
    831   1.60  augustss 	/* Allocate dummy ED that starts the control list. */
    832    1.1  augustss 	sc->sc_ctrl_head = ohci_alloc_sed(sc);
    833   1.53  augustss 	if (sc->sc_ctrl_head == NULL) {
    834  1.260     skrll 		err = ENOMEM;
    835    1.1  augustss 		goto bad1;
    836    1.1  augustss 	}
    837  1.168  augustss 	sc->sc_ctrl_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    838   1.34  augustss 
    839   1.60  augustss 	/* Allocate dummy ED that starts the bulk list. */
    840    1.1  augustss 	sc->sc_bulk_head = ohci_alloc_sed(sc);
    841   1.53  augustss 	if (sc->sc_bulk_head == NULL) {
    842  1.260     skrll 		err = ENOMEM;
    843    1.1  augustss 		goto bad2;
    844    1.1  augustss 	}
    845  1.168  augustss 	sc->sc_bulk_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    846  1.195    bouyer 	usb_syncmem(&sc->sc_bulk_head->dma, sc->sc_bulk_head->offs,
    847  1.195    bouyer 	    sizeof(sc->sc_bulk_head->ed),
    848  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    849    1.1  augustss 
    850   1.60  augustss 	/* Allocate dummy ED that starts the isochronous list. */
    851   1.60  augustss 	sc->sc_isoc_head = ohci_alloc_sed(sc);
    852   1.60  augustss 	if (sc->sc_isoc_head == NULL) {
    853  1.260     skrll 		err = ENOMEM;
    854   1.60  augustss 		goto bad3;
    855   1.60  augustss 	}
    856  1.168  augustss 	sc->sc_isoc_head->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    857  1.195    bouyer 	usb_syncmem(&sc->sc_isoc_head->dma, sc->sc_isoc_head->offs,
    858  1.195    bouyer 	    sizeof(sc->sc_isoc_head->ed),
    859  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    860   1.60  augustss 
    861    1.1  augustss 	/* Allocate all the dummy EDs that make up the interrupt tree. */
    862    1.1  augustss 	for (i = 0; i < OHCI_NO_EDS; i++) {
    863    1.1  augustss 		sed = ohci_alloc_sed(sc);
    864   1.53  augustss 		if (sed == NULL) {
    865    1.1  augustss 			while (--i >= 0)
    866    1.1  augustss 				ohci_free_sed(sc, sc->sc_eds[i]);
    867  1.260     skrll 			err = ENOMEM;
    868   1.60  augustss 			goto bad4;
    869    1.1  augustss 		}
    870    1.1  augustss 		/* All ED fields are set to 0. */
    871    1.1  augustss 		sc->sc_eds[i] = sed;
    872  1.168  augustss 		sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
    873   1.60  augustss 		if (i != 0)
    874    1.1  augustss 			psed = sc->sc_eds[(i-1) / 2];
    875   1.60  augustss 		else
    876   1.60  augustss 			psed= sc->sc_isoc_head;
    877   1.60  augustss 		sed->next = psed;
    878  1.168  augustss 		sed->ed.ed_nexted = HTOO32(psed->physaddr);
    879  1.195    bouyer 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
    880  1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    881    1.1  augustss 	}
    882  1.120  augustss 	/*
    883    1.1  augustss 	 * Fill HCCA interrupt table.  The bit reversal is to get
    884    1.1  augustss 	 * the tree set up properly to spread the interrupts.
    885    1.1  augustss 	 */
    886    1.1  augustss 	for (i = 0; i < OHCI_NO_INTRS; i++)
    887  1.120  augustss 		sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
    888  1.168  augustss 		    HTOO32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
    889  1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, 0, OHCI_HCCA_SIZE,
    890  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
    891    1.1  augustss 
    892   1.73  augustss #ifdef OHCI_DEBUG
    893  1.260     skrll 	DPRINTFN(15, "--- dump start ---", 0, 0, 0 ,0);
    894  1.260     skrll 	if (ohcidebug >= 15) {
    895   1.73  augustss 		for (i = 0; i < OHCI_NO_EDS; i++) {
    896  1.274  pgoyette 			DPRINTFN(15, "ed#%jd ", i, 0, 0, 0);
    897  1.168  augustss 			ohci_dump_ed(sc, sc->sc_eds[i]);
    898   1.73  augustss 		}
    899  1.260     skrll 		DPRINTFN(15, "iso", 0, 0, 0 ,0);
    900  1.168  augustss 		ohci_dump_ed(sc, sc->sc_isoc_head);
    901   1.73  augustss 	}
    902  1.260     skrll 	DPRINTFN(15, "--- dump end ---", 0, 0, 0 ,0);
    903   1.73  augustss #endif
    904   1.73  augustss 
    905  1.161  augustss 	/* Preserve values programmed by SMM/BIOS but lost over reset. */
    906  1.161  augustss 	ctl = OREAD4(sc, OHCI_CONTROL);
    907  1.161  augustss 	rwc = ctl & OHCI_RWC;
    908  1.161  augustss 	fm = OREAD4(sc, OHCI_FM_INTERVAL);
    909  1.161  augustss 	desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
    910  1.243    martin 	/* descb = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); */
    911  1.161  augustss 
    912    1.1  augustss 	/* Determine in what context we are running. */
    913    1.1  augustss 	if (ctl & OHCI_IR) {
    914    1.1  augustss 		/* SMM active, request change */
    915  1.260     skrll 		DPRINTF("SMM active, request owner change", 0, 0, 0, 0);
    916  1.160  augustss 		if ((sc->sc_intre & (OHCI_OC | OHCI_MIE)) ==
    917  1.160  augustss 		    (OHCI_OC | OHCI_MIE))
    918  1.160  augustss 			OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_MIE);
    919    1.1  augustss 		s = OREAD4(sc, OHCI_COMMAND_STATUS);
    920    1.1  augustss 		OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
    921    1.1  augustss 		for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
    922   1.53  augustss 			usb_delay_ms(&sc->sc_bus, 1);
    923    1.1  augustss 			ctl = OREAD4(sc, OHCI_CONTROL);
    924    1.1  augustss 		}
    925  1.160  augustss 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_MIE);
    926    1.1  augustss 		if ((ctl & OHCI_IR) == 0) {
    927  1.199  jmcneill 			aprint_error_dev(sc->sc_dev,
    928  1.199  jmcneill 			    "SMM does not respond, resetting\n");
    929  1.161  augustss 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    930    1.1  augustss 			goto reset;
    931    1.1  augustss 		}
    932  1.103  augustss #if 0
    933  1.103  augustss /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */
    934    1.1  augustss 	} else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
    935    1.1  augustss 		/* BIOS started controller. */
    936  1.260     skrll 		DPRINTF("BIOS active", 0, 0, 0, 0);
    937    1.1  augustss 		if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
    938  1.161  augustss 			OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL | rwc);
    939   1.53  augustss 			usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
    940    1.1  augustss 		}
    941  1.103  augustss #endif
    942    1.1  augustss 	} else {
    943  1.260     skrll 		DPRINTF("cold started", 0 ,0 ,0 ,0);
    944    1.1  augustss 	reset:
    945    1.1  augustss 		/* Controller was cold started. */
    946   1.53  augustss 		usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
    947    1.1  augustss 	}
    948    1.1  augustss 
    949   1.16  augustss 	/*
    950   1.25  augustss 	 * This reset should not be necessary according to the OHCI spec, but
    951   1.25  augustss 	 * without it some controllers do not start.
    952   1.16  augustss 	 */
    953  1.274  pgoyette 	DPRINTF("sc %#jx: resetting", (uintptr_t)sc, 0, 0, 0);
    954  1.161  augustss 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET | rwc);
    955   1.55  augustss 	usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
    956   1.16  augustss 
    957    1.1  augustss 	/* We now own the host controller and the bus has been reset. */
    958    1.1  augustss 
    959    1.1  augustss 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
    960    1.1  augustss 	/* Nominal time for a reset is 10 us. */
    961    1.1  augustss 	for (i = 0; i < 10; i++) {
    962    1.1  augustss 		delay(10);
    963    1.1  augustss 		hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
    964    1.1  augustss 		if (!hcr)
    965    1.1  augustss 			break;
    966    1.1  augustss 	}
    967    1.1  augustss 	if (hcr) {
    968  1.199  jmcneill 		aprint_error_dev(sc->sc_dev, "reset timeout\n");
    969  1.260     skrll 		err = EIO;
    970   1.60  augustss 		goto bad5;
    971    1.1  augustss 	}
    972   1.52  augustss #ifdef OHCI_DEBUG
    973  1.260     skrll 	if (ohcidebug >= 15)
    974    1.1  augustss 		ohci_dumpregs(sc);
    975    1.1  augustss #endif
    976    1.1  augustss 
    977   1.60  augustss 	/* The controller is now in SUSPEND state, we have 2ms to finish. */
    978    1.1  augustss 
    979    1.1  augustss 	/* Set up HC registers. */
    980  1.125  augustss 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
    981    1.1  augustss 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
    982    1.1  augustss 	OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
    983   1.55  augustss 	/* disable all interrupts and then switch on all desired interrupts */
    984    1.1  augustss 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
    985   1.55  augustss 	/* switch on desired functional features */
    986    1.1  augustss 	ctl = OREAD4(sc, OHCI_CONTROL);
    987    1.1  augustss 	ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
    988    1.1  augustss 	ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
    989  1.161  augustss 		OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL | rwc;
    990    1.1  augustss 	/* And finally start it! */
    991    1.1  augustss 	OWRITE4(sc, OHCI_CONTROL, ctl);
    992    1.1  augustss 
    993    1.1  augustss 	/*
    994    1.1  augustss 	 * The controller is now OPERATIONAL.  Set a some final
    995    1.1  augustss 	 * registers that should be set earlier, but that the
    996    1.1  augustss 	 * controller ignores when in the SUSPEND state.
    997    1.1  augustss 	 */
    998  1.161  augustss 	ival = OHCI_GET_IVAL(fm);
    999    1.1  augustss 	fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
   1000    1.1  augustss 	fm |= OHCI_FSMPS(ival) | ival;
   1001    1.1  augustss 	OWRITE4(sc, OHCI_FM_INTERVAL, fm);
   1002    1.1  augustss 	per = OHCI_PERIODIC(ival); /* 90% periodic */
   1003    1.1  augustss 	OWRITE4(sc, OHCI_PERIODIC_START, per);
   1004    1.1  augustss 
   1005  1.249     skrll 	if (sc->sc_flags & OHCIF_SUPERIO) {
   1006  1.249     skrll 		/* no overcurrent protection */
   1007  1.249     skrll 		desca |= OHCI_NOCP;
   1008  1.249     skrll 		/*
   1009  1.249     skrll 		 * Clear NoPowerSwitching and PowerOnToPowerGoodTime meaning
   1010  1.249     skrll 		 * that
   1011  1.249     skrll 		 *  - ports are always power switched
   1012  1.249     skrll 		 *  - don't wait for powered root hub port
   1013  1.249     skrll 		 */
   1014  1.249     skrll 		desca &= ~(__SHIFTIN(0xff, OHCI_POTPGT_MASK) | OHCI_NPS);
   1015  1.249     skrll 	}
   1016  1.249     skrll 
   1017   1.68  augustss 	/* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
   1018   1.68  augustss 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
   1019   1.68  augustss 	OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
   1020   1.85  augustss 	usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
   1021   1.68  augustss 	OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
   1022    1.1  augustss 
   1023   1.85  augustss 	/*
   1024   1.85  augustss 	 * The AMD756 requires a delay before re-reading the register,
   1025   1.85  augustss 	 * otherwise it will occasionally report 0 ports.
   1026   1.85  augustss 	 */
   1027  1.145  augustss 	sc->sc_noport = 0;
   1028  1.145  augustss 	for (i = 0; i < 10 && sc->sc_noport == 0; i++) {
   1029  1.145  augustss 		usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
   1030  1.145  augustss 		sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
   1031  1.145  augustss 	}
   1032    1.1  augustss 
   1033   1.52  augustss #ifdef OHCI_DEBUG
   1034  1.260     skrll 	if (ohcidebug >= 5)
   1035    1.1  augustss 		ohci_dumpregs(sc);
   1036    1.1  augustss #endif
   1037  1.120  augustss 
   1038    1.1  augustss 	/* Set up the bus struct. */
   1039  1.260     skrll 	sc->sc_bus.ub_methods = &ohci_bus_methods;
   1040  1.260     skrll 	sc->sc_bus.ub_pipesize = sizeof(struct ohci_pipe);
   1041    1.1  augustss 
   1042  1.101   minoura 	sc->sc_control = sc->sc_intre = 0;
   1043   1.59  augustss 
   1044  1.167  augustss 	/* Finally, turn on interrupts. */
   1045  1.274  pgoyette 	DPRINTF("enabling %#jx", sc->sc_eintrs | OHCI_MIE, 0, 0, 0);
   1046  1.167  augustss 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
   1047  1.167  augustss 
   1048  1.260     skrll 	return 0;
   1049    1.1  augustss 
   1050   1.60  augustss  bad5:
   1051   1.60  augustss 	for (i = 0; i < OHCI_NO_EDS; i++)
   1052   1.60  augustss 		ohci_free_sed(sc, sc->sc_eds[i]);
   1053   1.60  augustss  bad4:
   1054   1.60  augustss 	ohci_free_sed(sc, sc->sc_isoc_head);
   1055    1.1  augustss  bad3:
   1056  1.144  augustss 	ohci_free_sed(sc, sc->sc_bulk_head);
   1057  1.144  augustss  bad2:
   1058    1.1  augustss 	ohci_free_sed(sc, sc->sc_ctrl_head);
   1059    1.1  augustss  bad1:
   1060   1.44  augustss 	usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
   1061  1.198    cegger 	sc->sc_hcca = NULL;
   1062  1.260     skrll 	return err;
   1063   1.62  augustss }
   1064   1.62  augustss 
   1065  1.260     skrll struct usbd_xfer *
   1066  1.260     skrll ohci_allocx(struct usbd_bus *bus, unsigned int nframes)
   1067   1.62  augustss {
   1068  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1069  1.260     skrll 	struct usbd_xfer *xfer;
   1070   1.62  augustss 
   1071  1.276     skrll 	xfer = pool_cache_get(sc->sc_xferpool, PR_WAITOK);
   1072  1.118  augustss 	if (xfer != NULL) {
   1073  1.232  christos 		memset(xfer, 0, sizeof(struct ohci_xfer));
   1074  1.282       mrg 
   1075  1.118  augustss #ifdef DIAGNOSTIC
   1076  1.260     skrll 		xfer->ux_state = XFER_BUSY;
   1077  1.118  augustss #endif
   1078  1.118  augustss 	}
   1079  1.260     skrll 	return xfer;
   1080   1.62  augustss }
   1081   1.62  augustss 
   1082   1.62  augustss void
   1083  1.260     skrll ohci_freex(struct usbd_bus *bus, struct usbd_xfer *xfer)
   1084   1.62  augustss {
   1085  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1086   1.62  augustss 
   1087  1.288       rin 	KASSERTMSG(xfer->ux_state == XFER_BUSY ||
   1088  1.288       rin 	    xfer->ux_status == USBD_NOT_STARTED,
   1089  1.300  christos 	    "xfer=%p not busy, 0x%08x\n", xfer, xfer->ux_state);
   1090  1.118  augustss #ifdef DIAGNOSTIC
   1091  1.260     skrll 	xfer->ux_state = XFER_FREE;
   1092  1.118  augustss #endif
   1093  1.232  christos 	pool_cache_put(sc->sc_xferpool, xfer);
   1094   1.42  augustss }
   1095   1.42  augustss 
   1096  1.293  riastrad Static bool
   1097  1.293  riastrad ohci_dying(struct usbd_bus *bus)
   1098  1.293  riastrad {
   1099  1.293  riastrad 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1100  1.293  riastrad 
   1101  1.293  riastrad 	return sc->sc_dying;
   1102  1.293  riastrad }
   1103  1.293  riastrad 
   1104  1.224       mrg Static void
   1105  1.224       mrg ohci_get_lock(struct usbd_bus *bus, kmutex_t **lock)
   1106  1.224       mrg {
   1107  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1108  1.224       mrg 
   1109  1.224       mrg 	*lock = &sc->sc_lock;
   1110  1.224       mrg }
   1111  1.224       mrg 
   1112   1.59  augustss /*
   1113   1.59  augustss  * Shut down the controller when the system is going down.
   1114   1.59  augustss  */
   1115  1.188    dyoung bool
   1116  1.188    dyoung ohci_shutdown(device_t self, int flags)
   1117   1.59  augustss {
   1118  1.188    dyoung 	ohci_softc_t *sc = device_private(self);
   1119   1.59  augustss 
   1120  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1121  1.260     skrll 
   1122  1.260     skrll 	DPRINTF("stopping the HC", 0, 0, 0, 0);
   1123  1.277   msaitoh 	OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
   1124   1.59  augustss 	OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1125  1.188    dyoung 	return true;
   1126   1.59  augustss }
   1127   1.59  augustss 
   1128  1.185  jmcneill bool
   1129  1.206    dyoung ohci_resume(device_t dv, const pmf_qual_t *qual)
   1130   1.33  augustss {
   1131  1.185  jmcneill 	ohci_softc_t *sc = device_private(dv);
   1132  1.185  jmcneill 	uint32_t ctl;
   1133   1.33  augustss 
   1134  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1135  1.260     skrll 	sc->sc_bus.ub_usepolling++;
   1136  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1137  1.224       mrg 
   1138  1.185  jmcneill 	/* Some broken BIOSes do not recover these values */
   1139  1.185  jmcneill 	OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma, 0));
   1140  1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL_HEAD_ED,
   1141  1.185  jmcneill 	    sc->sc_ctrl_head->physaddr);
   1142  1.185  jmcneill 	OWRITE4(sc, OHCI_BULK_HEAD_ED,
   1143  1.185  jmcneill 	    sc->sc_bulk_head->physaddr);
   1144  1.185  jmcneill 	if (sc->sc_intre)
   1145  1.185  jmcneill 		OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_intre &
   1146  1.185  jmcneill 		    (OHCI_ALL_INTRS | OHCI_MIE));
   1147  1.185  jmcneill 	if (sc->sc_control)
   1148  1.185  jmcneill 		ctl = sc->sc_control;
   1149  1.185  jmcneill 	else
   1150  1.185  jmcneill 		ctl = OREAD4(sc, OHCI_CONTROL);
   1151  1.185  jmcneill 	ctl |= OHCI_HCFS_RESUME;
   1152  1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1153  1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
   1154  1.185  jmcneill 	ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
   1155  1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1156  1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
   1157  1.185  jmcneill 	sc->sc_control = sc->sc_intre = 0;
   1158  1.224       mrg 
   1159  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1160  1.260     skrll 	sc->sc_bus.ub_usepolling--;
   1161  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1162  1.185  jmcneill 
   1163  1.185  jmcneill 	return true;
   1164  1.185  jmcneill }
   1165  1.185  jmcneill 
   1166  1.185  jmcneill bool
   1167  1.206    dyoung ohci_suspend(device_t dv, const pmf_qual_t *qual)
   1168  1.185  jmcneill {
   1169  1.185  jmcneill 	ohci_softc_t *sc = device_private(dv);
   1170  1.185  jmcneill 	uint32_t ctl;
   1171   1.95  augustss 
   1172  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1173  1.260     skrll 	sc->sc_bus.ub_usepolling++;
   1174  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1175  1.224       mrg 
   1176  1.185  jmcneill 	ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK;
   1177  1.185  jmcneill 	if (sc->sc_control == 0) {
   1178  1.185  jmcneill 		/*
   1179  1.185  jmcneill 		 * Preserve register values, in case that BIOS
   1180  1.185  jmcneill 		 * does not recover them.
   1181  1.185  jmcneill 		 */
   1182  1.185  jmcneill 		sc->sc_control = ctl;
   1183  1.185  jmcneill 		sc->sc_intre = OREAD4(sc,
   1184  1.185  jmcneill 		    OHCI_INTERRUPT_ENABLE);
   1185   1.95  augustss 	}
   1186  1.185  jmcneill 	ctl |= OHCI_HCFS_SUSPEND;
   1187  1.185  jmcneill 	OWRITE4(sc, OHCI_CONTROL, ctl);
   1188  1.185  jmcneill 	usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
   1189  1.224       mrg 
   1190  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1191  1.260     skrll 	sc->sc_bus.ub_usepolling--;
   1192  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1193  1.185  jmcneill 
   1194  1.185  jmcneill 	return true;
   1195   1.33  augustss }
   1196   1.33  augustss 
   1197   1.52  augustss #ifdef OHCI_DEBUG
   1198    1.1  augustss void
   1199   1.91  augustss ohci_dumpregs(ohci_softc_t *sc)
   1200    1.1  augustss {
   1201  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1202  1.260     skrll 
   1203  1.300  christos 	DPRINTF("rev=0x%08jx control=0x%08jx command=0x%08jx",
   1204   1.41  augustss 		 OREAD4(sc, OHCI_REVISION),
   1205   1.41  augustss 		 OREAD4(sc, OHCI_CONTROL),
   1206  1.260     skrll 		 OREAD4(sc, OHCI_COMMAND_STATUS), 0);
   1207  1.300  christos 	DPRINTF("               intrstat=0x%08jx intre=0x%08jx intrd=0x%08jx",
   1208   1.41  augustss 		 OREAD4(sc, OHCI_INTERRUPT_STATUS),
   1209   1.41  augustss 		 OREAD4(sc, OHCI_INTERRUPT_ENABLE),
   1210  1.260     skrll 		 OREAD4(sc, OHCI_INTERRUPT_DISABLE), 0);
   1211  1.300  christos 	DPRINTF("               hcca=0x%08jx percur=0x%08jx ctrlhd=0x%08jx",
   1212   1.41  augustss 		 OREAD4(sc, OHCI_HCCA),
   1213   1.41  augustss 		 OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
   1214  1.260     skrll 		 OREAD4(sc, OHCI_CONTROL_HEAD_ED), 0);
   1215  1.300  christos 	DPRINTF("               ctrlcur=0x%08jx bulkhd=0x%08jx bulkcur=0x%08jx",
   1216   1.41  augustss 		 OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
   1217   1.41  augustss 		 OREAD4(sc, OHCI_BULK_HEAD_ED),
   1218  1.260     skrll 		 OREAD4(sc, OHCI_BULK_CURRENT_ED) ,0);
   1219  1.300  christos 	DPRINTF("               done=0x%08jx fmival=0x%08jx fmrem=0x%08jx",
   1220   1.41  augustss 		 OREAD4(sc, OHCI_DONE_HEAD),
   1221   1.41  augustss 		 OREAD4(sc, OHCI_FM_INTERVAL),
   1222  1.260     skrll 		 OREAD4(sc, OHCI_FM_REMAINING), 0);
   1223  1.300  christos 	DPRINTF("               fmnum=0x%08jx perst=0x%08jx lsthrs=0x%08jx",
   1224   1.41  augustss 		 OREAD4(sc, OHCI_FM_NUMBER),
   1225   1.41  augustss 		 OREAD4(sc, OHCI_PERIODIC_START),
   1226  1.260     skrll 		 OREAD4(sc, OHCI_LS_THRESHOLD), 0);
   1227  1.300  christos 	DPRINTF("               desca=0x%08jx descb=0x%08jx stat=0x%08jx",
   1228   1.41  augustss 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
   1229   1.41  augustss 		 OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
   1230  1.260     skrll 		 OREAD4(sc, OHCI_RH_STATUS), 0);
   1231  1.300  christos 	DPRINTF("               port1=0x%08jx port2=0x%08jx",
   1232   1.41  augustss 		 OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
   1233  1.260     skrll 		 OREAD4(sc, OHCI_RH_PORT_STATUS(2)), 0, 0);
   1234  1.307  jakllsch 	usb_syncmem(&sc->sc_hccadma,
   1235  1.307  jakllsch 	    offsetof(struct ohci_hcca, hcca_frame_number),
   1236  1.307  jakllsch 	    sizeof(sc->sc_hcca->hcca_frame_number) +
   1237  1.307  jakllsch 	    sizeof(sc->sc_hcca->hcca_done_head),
   1238  1.307  jakllsch 	    BUS_DMASYNC_POSTREAD);
   1239  1.300  christos 	DPRINTF("         HCCA: frame_number=0x%04jx done_head=0x%08jx",
   1240  1.168  augustss 		 O32TOH(sc->sc_hcca->hcca_frame_number),
   1241  1.260     skrll 		 O32TOH(sc->sc_hcca->hcca_done_head), 0, 0);
   1242    1.1  augustss }
   1243    1.1  augustss #endif
   1244    1.1  augustss 
   1245   1.91  augustss Static int ohci_intr1(ohci_softc_t *);
   1246   1.53  augustss 
   1247    1.1  augustss int
   1248   1.91  augustss ohci_intr(void *p)
   1249    1.1  augustss {
   1250    1.1  augustss 	ohci_softc_t *sc = p;
   1251  1.224       mrg 	int ret = 0;
   1252  1.111  augustss 
   1253  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1254  1.260     skrll 
   1255  1.224       mrg 	if (sc == NULL)
   1256  1.260     skrll 		return 0;
   1257   1.53  augustss 
   1258  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1259  1.224       mrg 
   1260  1.224       mrg 	if (sc->sc_dying || !device_has_power(sc->sc_dev))
   1261  1.224       mrg 		goto done;
   1262  1.224       mrg 
   1263   1.53  augustss 	/* If we get an interrupt while polling, then just ignore it. */
   1264  1.260     skrll 	if (sc->sc_bus.ub_usepolling) {
   1265  1.260     skrll 		DPRINTFN(16, "ignored interrupt while polling", 0, 0, 0, 0);
   1266  1.154      joff 		/* for level triggered intrs, should do something to ack */
   1267  1.155     perry 		OWRITE4(sc, OHCI_INTERRUPT_STATUS,
   1268  1.154      joff 			OREAD4(sc, OHCI_INTERRUPT_STATUS));
   1269  1.155     perry 
   1270  1.224       mrg 		goto done;
   1271   1.57  augustss 	}
   1272   1.53  augustss 
   1273  1.224       mrg 	ret = ohci_intr1(sc);
   1274  1.224       mrg 
   1275  1.224       mrg done:
   1276  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1277  1.224       mrg 	return ret;
   1278   1.53  augustss }
   1279   1.53  augustss 
   1280   1.82  augustss Static int
   1281   1.91  augustss ohci_intr1(ohci_softc_t *sc)
   1282   1.53  augustss {
   1283  1.260     skrll 	uint32_t intrs, eintrs;
   1284    1.1  augustss 
   1285  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1286  1.105  augustss 
   1287   1.15  augustss 	/* In case the interrupt occurs before initialization has completed. */
   1288   1.34  augustss 	if (sc == NULL || sc->sc_hcca == NULL) {
   1289   1.15  augustss #ifdef DIAGNOSTIC
   1290   1.15  augustss 		printf("ohci_intr: sc->sc_hcca == NULL\n");
   1291   1.15  augustss #endif
   1292  1.260     skrll 		return 0;
   1293   1.15  augustss 	}
   1294   1.15  augustss 
   1295  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_intr_lock));
   1296  1.224       mrg 
   1297  1.157   mycroft 	intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1298    1.1  augustss 	if (!intrs)
   1299  1.260     skrll 		return 0;
   1300   1.55  augustss 
   1301  1.260     skrll 	/* Acknowledge */
   1302  1.260     skrll 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs & ~(OHCI_MIE|OHCI_WDH));
   1303    1.1  augustss 	eintrs = intrs & sc->sc_eintrs;
   1304  1.274  pgoyette 	DPRINTFN(7, "sc=%#jx", (uintptr_t)sc, 0, 0, 0);
   1305  1.274  pgoyette 	DPRINTFN(7, "intrs=%#jx(%#jx) eintrs=%#jx(%#jx)",
   1306  1.260     skrll 	    intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), eintrs,
   1307  1.260     skrll 	    sc->sc_eintrs);
   1308  1.211      matt 
   1309  1.211      matt 	if (!eintrs) {
   1310  1.260     skrll 		return 0;
   1311  1.211      matt 	}
   1312    1.1  augustss 
   1313    1.1  augustss 	if (eintrs & OHCI_SO) {
   1314  1.100  augustss 		sc->sc_overrun_cnt++;
   1315  1.100  augustss 		if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
   1316  1.100  augustss 			printf("%s: %u scheduling overruns\n",
   1317  1.190  drochner 			    device_xname(sc->sc_dev), sc->sc_overrun_cnt);
   1318  1.100  augustss 			sc->sc_overrun_cnt = 0;
   1319  1.100  augustss 		}
   1320    1.1  augustss 		/* XXX do what */
   1321  1.106  augustss 		eintrs &= ~OHCI_SO;
   1322    1.1  augustss 	}
   1323    1.1  augustss 	if (eintrs & OHCI_WDH) {
   1324  1.157   mycroft 		/*
   1325  1.157   mycroft 		 * We block the interrupt below, and reenable it later from
   1326  1.157   mycroft 		 * ohci_softintr().
   1327  1.157   mycroft 		 */
   1328   1.72  augustss 		usb_schedsoftintr(&sc->sc_bus);
   1329    1.1  augustss 	}
   1330    1.1  augustss 	if (eintrs & OHCI_RD) {
   1331  1.275     skrll 		DPRINTFN(5, "resume detect sc=%#jx", (uintptr_t)sc, 0, 0, 0);
   1332  1.190  drochner 		printf("%s: resume detect\n", device_xname(sc->sc_dev));
   1333    1.1  augustss 		/* XXX process resume detect */
   1334    1.1  augustss 	}
   1335    1.1  augustss 	if (eintrs & OHCI_UE) {
   1336  1.275     skrll 		DPRINTFN(5, "unrecoverable error sc=%#jx", (uintptr_t)sc, 0, 0, 0);
   1337   1.15  augustss 		printf("%s: unrecoverable error, controller halted\n",
   1338  1.190  drochner 		       device_xname(sc->sc_dev));
   1339    1.1  augustss 		OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
   1340    1.1  augustss 		/* XXX what else */
   1341    1.1  augustss 	}
   1342    1.1  augustss 	if (eintrs & OHCI_RHSC) {
   1343  1.120  augustss 		/*
   1344  1.157   mycroft 		 * We block the interrupt below, and reenable it later from
   1345  1.157   mycroft 		 * a timeout.
   1346    1.1  augustss 		 */
   1347  1.224       mrg 		softint_schedule(sc->sc_rhsc_si);
   1348    1.1  augustss 	}
   1349    1.1  augustss 
   1350  1.106  augustss 	if (eintrs != 0) {
   1351  1.157   mycroft 		/* Block unprocessed interrupts. */
   1352  1.106  augustss 		OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs);
   1353  1.106  augustss 		sc->sc_eintrs &= ~eintrs;
   1354  1.299  christos 		DPRINTF("sc %#jx blocking intrs %#jx", (uintptr_t)sc,
   1355  1.274  pgoyette 		    eintrs, 0, 0);
   1356  1.106  augustss 	}
   1357    1.1  augustss 
   1358  1.260     skrll 	return 1;
   1359    1.1  augustss }
   1360    1.1  augustss 
   1361    1.1  augustss void
   1362  1.104  augustss ohci_rhsc_enable(void *v_sc)
   1363  1.104  augustss {
   1364  1.104  augustss 	ohci_softc_t *sc = v_sc;
   1365  1.104  augustss 
   1366  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1367  1.274  pgoyette 	DPRINTF("sc %#jx", (uintptr_t)sc, 0, 0, 0);
   1368  1.224       mrg 	mutex_spin_enter(&sc->sc_intr_lock);
   1369  1.157   mycroft 	sc->sc_eintrs |= OHCI_RHSC;
   1370  1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
   1371  1.224       mrg 	mutex_spin_exit(&sc->sc_intr_lock);
   1372    1.1  augustss }
   1373    1.1  augustss 
   1374   1.52  augustss #ifdef OHCI_DEBUG
   1375  1.166  drochner const char *ohci_cc_strs[] = {
   1376   1.13  augustss 	"NO_ERROR",
   1377   1.13  augustss 	"CRC",
   1378   1.13  augustss 	"BIT_STUFFING",
   1379   1.13  augustss 	"DATA_TOGGLE_MISMATCH",
   1380   1.13  augustss 	"STALL",
   1381   1.13  augustss 	"DEVICE_NOT_RESPONDING",
   1382   1.13  augustss 	"PID_CHECK_FAILURE",
   1383   1.13  augustss 	"UNEXPECTED_PID",
   1384   1.13  augustss 	"DATA_OVERRUN",
   1385   1.13  augustss 	"DATA_UNDERRUN",
   1386   1.13  augustss 	"BUFFER_OVERRUN",
   1387   1.13  augustss 	"BUFFER_UNDERRUN",
   1388   1.67  augustss 	"reserved",
   1389   1.67  augustss 	"reserved",
   1390   1.67  augustss 	"NOT_ACCESSED",
   1391   1.13  augustss 	"NOT_ACCESSED",
   1392   1.13  augustss };
   1393   1.13  augustss #endif
   1394   1.13  augustss 
   1395    1.1  augustss void
   1396  1.157   mycroft ohci_softintr(void *v)
   1397   1.83  augustss {
   1398  1.190  drochner 	struct usbd_bus *bus = v;
   1399  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1400  1.157   mycroft 	ohci_soft_itd_t *sitd, *sidone, *sitdnext;
   1401  1.157   mycroft 	ohci_soft_td_t  *std,  *sdone,  *stdnext;
   1402  1.260     skrll 	struct usbd_xfer *xfer;
   1403  1.157   mycroft 	struct ohci_pipe *opipe;
   1404  1.224       mrg 	int len, cc;
   1405  1.157   mycroft 	int i, j, actlen, iframes, uedir;
   1406  1.157   mycroft 	ohci_physaddr_t done;
   1407  1.157   mycroft 
   1408  1.286       mrg 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1409  1.224       mrg 
   1410  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1411  1.157   mycroft 
   1412  1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1413  1.195    bouyer 	    sizeof(sc->sc_hcca->hcca_done_head),
   1414  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1415  1.168  augustss 	done = O32TOH(sc->sc_hcca->hcca_done_head) & ~OHCI_DONE_INTRS;
   1416  1.157   mycroft 	sc->sc_hcca->hcca_done_head = 0;
   1417  1.195    bouyer 	usb_syncmem(&sc->sc_hccadma, offsetof(struct ohci_hcca, hcca_done_head),
   1418  1.195    bouyer 	    sizeof(sc->sc_hcca->hcca_done_head),
   1419  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1420  1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_STATUS, OHCI_WDH);
   1421  1.157   mycroft 	sc->sc_eintrs |= OHCI_WDH;
   1422  1.157   mycroft 	OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_WDH);
   1423   1.83  augustss 
   1424   1.83  augustss 	/* Reverse the done list. */
   1425   1.83  augustss 	for (sdone = NULL, sidone = NULL; done != 0; ) {
   1426   1.83  augustss 		std = ohci_hash_find_td(sc, done);
   1427   1.83  augustss 		if (std != NULL) {
   1428  1.195    bouyer 			usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1429  1.195    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1430   1.83  augustss 			std->dnext = sdone;
   1431  1.168  augustss 			done = O32TOH(std->td.td_nexttd);
   1432   1.83  augustss 			sdone = std;
   1433  1.274  pgoyette 			DPRINTFN(10, "add TD %#jx", (uintptr_t)std, 0, 0, 0);
   1434   1.83  augustss 			continue;
   1435   1.83  augustss 		}
   1436   1.83  augustss 		sitd = ohci_hash_find_itd(sc, done);
   1437   1.83  augustss 		if (sitd != NULL) {
   1438  1.195    bouyer 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   1439  1.195    bouyer 			    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1440   1.83  augustss 			sitd->dnext = sidone;
   1441  1.168  augustss 			done = O32TOH(sitd->itd.itd_nextitd);
   1442   1.83  augustss 			sidone = sitd;
   1443  1.274  pgoyette 			DPRINTFN(5, "add ITD %#jx", (uintptr_t)sitd, 0, 0, 0);
   1444   1.83  augustss 			continue;
   1445   1.83  augustss 		}
   1446  1.274  pgoyette 		DPRINTFN(10, "addr %#jx not found", (uintptr_t)done, 0, 0, 0);
   1447  1.300  christos 		device_printf(sc->sc_dev, "WARNING: addr 0x%08lx not found\n",
   1448  1.218  jmcneill 		    (u_long)done);
   1449  1.218  jmcneill 		break;
   1450   1.83  augustss 	}
   1451   1.83  augustss 
   1452  1.274  pgoyette 	DPRINTFN(10, "sdone=%#jx sidone=%#jx", (uintptr_t)sdone,
   1453  1.274  pgoyette 	    (uintptr_t)sidone, 0, 0);
   1454  1.260     skrll 	DPRINTFN(10, "--- TD dump start ---", 0, 0, 0, 0);
   1455   1.52  augustss #ifdef OHCI_DEBUG
   1456  1.260     skrll 	if (ohcidebug >= 10) {
   1457  1.234     skrll 		for (std = sdone; std; std = std->dnext)
   1458  1.258     skrll 			ohci_dump_td(sc, std);
   1459    1.1  augustss 	}
   1460    1.1  augustss #endif
   1461  1.260     skrll 	DPRINTFN(10, "--- TD dump end ---", 0, 0, 0, 0);
   1462    1.1  augustss 
   1463   1.48  augustss 	for (std = sdone; std; std = stdnext) {
   1464   1.53  augustss 		xfer = std->xfer;
   1465   1.48  augustss 		stdnext = std->dnext;
   1466  1.274  pgoyette 		DPRINTFN(10, "std=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)std,
   1467  1.274  pgoyette 		    (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0),
   1468  1.274  pgoyette 		    0);
   1469   1.71  augustss 		if (xfer == NULL) {
   1470  1.117  augustss 			/*
   1471  1.117  augustss 			 * xfer == NULL: There seems to be no xfer associated
   1472   1.71  augustss 			 * with this TD. It is tailp that happened to end up on
   1473   1.71  augustss 			 * the done queue.
   1474  1.117  augustss 			 * Shouldn't happen, but some chips are broken(?).
   1475   1.71  augustss 			 */
   1476   1.71  augustss 			continue;
   1477   1.71  augustss 		}
   1478  1.282       mrg 
   1479  1.282       mrg 		/*
   1480  1.293  riastrad 		 * Try to claim this xfer for completion.  If it has
   1481  1.293  riastrad 		 * already completed or aborted, drop it on the floor.
   1482  1.282       mrg 		 */
   1483  1.293  riastrad 		if (!usbd_xfer_trycomplete(xfer))
   1484   1.83  augustss 			continue;
   1485  1.141   mycroft 
   1486  1.141   mycroft 		len = std->len;
   1487  1.141   mycroft 		if (std->td.td_cbp != 0)
   1488  1.168  augustss 			len -= O32TOH(std->td.td_be) -
   1489  1.168  augustss 			       O32TOH(std->td.td_cbp) + 1;
   1490  1.299  christos 		DPRINTFN(10, "len=%jd, flags=%#jx", len, std->flags, 0, 0);
   1491  1.141   mycroft 		if (std->flags & OHCI_ADD_LEN)
   1492  1.260     skrll 			xfer->ux_actlen += len;
   1493  1.141   mycroft 
   1494  1.168  augustss 		cc = OHCI_TD_GET_CC(O32TOH(std->td.td_flags));
   1495   1.83  augustss 		if (cc == OHCI_CC_NO_ERROR) {
   1496  1.260     skrll 			ohci_hash_rem_td(sc, std);
   1497   1.34  augustss 			if (std->flags & OHCI_CALL_DONE) {
   1498  1.260     skrll 				xfer->ux_status = USBD_NORMAL_COMPLETION;
   1499   1.53  augustss 				usb_transfer_complete(xfer);
   1500   1.21  augustss 			}
   1501    1.1  augustss 		} else {
   1502   1.48  augustss 			/*
   1503   1.48  augustss 			 * Endpoint is halted.  First unlink all the TDs
   1504   1.48  augustss 			 * belonging to the failed transfer, and then restart
   1505   1.48  augustss 			 * the endpoint.
   1506   1.48  augustss 			 */
   1507    1.1  augustss 			ohci_soft_td_t *p, *n;
   1508  1.260     skrll 			opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1509   1.48  augustss 
   1510  1.274  pgoyette 			DPRINTFN(10, "error cc=%jd", cc, 0, 0, 0);
   1511   1.48  augustss 
   1512  1.260     skrll 			/* remove xfer's TDs from the hash */
   1513   1.53  augustss 			for (p = std; p->xfer == xfer; p = n) {
   1514    1.1  augustss 				n = p->nexttd;
   1515  1.260     skrll 				ohci_hash_rem_td(sc, p);
   1516    1.1  augustss 			}
   1517   1.48  augustss 
   1518  1.260     skrll 			ohci_soft_ed_t *sed = opipe->sed;
   1519  1.260     skrll 
   1520  1.291      gson 			/* clear halt and TD chain, preserving toggle carry */
   1521  1.291      gson 			sed->ed.ed_headp = HTOO32(p->physaddr |
   1522  1.291      gson 			    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
   1523  1.260     skrll 			usb_syncmem(&sed->dma,
   1524  1.260     skrll 			    sed->offs + offsetof(ohci_ed_t, ed_headp),
   1525  1.260     skrll 			    sizeof(sed->ed.ed_headp),
   1526  1.260     skrll 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1527  1.260     skrll 
   1528    1.1  augustss 			OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   1529   1.48  augustss 
   1530  1.260     skrll 			if (cc == OHCI_CC_DATA_UNDERRUN)
   1531  1.260     skrll 				xfer->ux_status = USBD_NORMAL_COMPLETION;
   1532  1.260     skrll 			else if (cc == OHCI_CC_STALL)
   1533  1.260     skrll 				xfer->ux_status = USBD_STALLED;
   1534    1.1  augustss 			else
   1535  1.260     skrll 				xfer->ux_status = USBD_IOERROR;
   1536   1.53  augustss 			usb_transfer_complete(xfer);
   1537    1.1  augustss 		}
   1538    1.1  augustss 	}
   1539  1.260     skrll 	DPRINTFN(10, "--- ITD dump start ---", 0, 0, 0, 0);
   1540   1.83  augustss #ifdef OHCI_DEBUG
   1541  1.260     skrll 	if (ohcidebug >= 10) {
   1542  1.234     skrll 		for (sitd = sidone; sitd; sitd = sitd->dnext)
   1543  1.258     skrll 			ohci_dump_itd(sc, sitd);
   1544   1.83  augustss 	}
   1545   1.83  augustss #endif
   1546  1.260     skrll 	DPRINTFN(10, "--- ITD dump end ---", 0, 0, 0, 0);
   1547   1.83  augustss 
   1548   1.83  augustss 	for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
   1549   1.83  augustss 		xfer = sitd->xfer;
   1550   1.83  augustss 		sitdnext = sitd->dnext;
   1551  1.274  pgoyette 		DPRINTFN(1, "sitd=%#jx xfer=%#jx hcpriv=%#jx", (uintptr_t)sitd,
   1552  1.274  pgoyette 		    (uintptr_t)xfer, (uintptr_t)(xfer ? xfer->ux_hcpriv : 0),
   1553  1.274  pgoyette 		    0);
   1554   1.83  augustss 		if (xfer == NULL)
   1555   1.83  augustss 			continue;
   1556  1.282       mrg 
   1557  1.282       mrg 		/*
   1558  1.293  riastrad 		 * Try to claim this xfer for completion.  If it has
   1559  1.293  riastrad 		 * already completed or aborted, drop it on the floor.
   1560  1.282       mrg 		 */
   1561  1.293  riastrad 		if (!usbd_xfer_trycomplete(xfer))
   1562   1.83  augustss 			continue;
   1563  1.282       mrg 
   1564  1.260     skrll 		KASSERT(!sitd->isdone);
   1565   1.83  augustss #ifdef DIAGNOSTIC
   1566  1.260     skrll 		sitd->isdone = true;
   1567   1.83  augustss #endif
   1568  1.134    toshii 		if (sitd->flags & OHCI_CALL_DONE) {
   1569  1.134    toshii 			ohci_soft_itd_t *next;
   1570  1.134    toshii 
   1571  1.260     skrll 			opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1572  1.260     skrll 			opipe->isoc.inuse -= xfer->ux_nframes;
   1573  1.260     skrll 			uedir = UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->
   1574  1.134    toshii 			    bEndpointAddress);
   1575  1.260     skrll 			xfer->ux_status = USBD_NORMAL_COMPLETION;
   1576  1.134    toshii 			actlen = 0;
   1577  1.260     skrll 			for (i = 0, sitd = xfer->ux_hcpriv;;
   1578  1.134    toshii 			    sitd = next) {
   1579  1.134    toshii 				next = sitd->nextitd;
   1580  1.168  augustss 				if (OHCI_ITD_GET_CC(O32TOH(sitd->
   1581  1.135    toshii 				    itd.itd_flags)) != OHCI_CC_NO_ERROR)
   1582  1.260     skrll 					xfer->ux_status = USBD_IOERROR;
   1583  1.134    toshii 				/* For input, update frlengths with actual */
   1584  1.134    toshii 				/* XXX anything necessary for output? */
   1585  1.134    toshii 				if (uedir == UE_DIR_IN &&
   1586  1.260     skrll 				    xfer->ux_status == USBD_NORMAL_COMPLETION) {
   1587  1.168  augustss 					iframes = OHCI_ITD_GET_FC(O32TOH(
   1588  1.135    toshii 					    sitd->itd.itd_flags));
   1589  1.134    toshii 					for (j = 0; j < iframes; i++, j++) {
   1590  1.168  augustss 						len = O16TOH(sitd->
   1591  1.134    toshii 						    itd.itd_offset[j]);
   1592  1.158    toshii 						if ((OHCI_ITD_PSW_GET_CC(len) &
   1593  1.158    toshii 						    OHCI_CC_NOT_ACCESSED_MASK)
   1594  1.158    toshii 						    == OHCI_CC_NOT_ACCESSED)
   1595  1.158    toshii 							len = 0;
   1596  1.158    toshii 						else
   1597  1.158    toshii 							len = OHCI_ITD_PSW_LENGTH(len);
   1598  1.260     skrll 						xfer->ux_frlengths[i] = len;
   1599  1.134    toshii 						actlen += len;
   1600  1.134    toshii 					}
   1601  1.134    toshii 				}
   1602  1.134    toshii 				if (sitd->flags & OHCI_CALL_DONE)
   1603  1.134    toshii 					break;
   1604  1.260     skrll 				ohci_hash_rem_itd(sc, sitd);
   1605  1.260     skrll 
   1606   1.83  augustss 			}
   1607  1.260     skrll 			ohci_hash_rem_itd(sc, sitd);
   1608  1.134    toshii 			if (uedir == UE_DIR_IN &&
   1609  1.260     skrll 			    xfer->ux_status == USBD_NORMAL_COMPLETION)
   1610  1.260     skrll 				xfer->ux_actlen = actlen;
   1611  1.260     skrll 			xfer->ux_hcpriv = NULL;
   1612  1.134    toshii 
   1613   1.83  augustss 			usb_transfer_complete(xfer);
   1614   1.83  augustss 		}
   1615   1.83  augustss 	}
   1616   1.83  augustss 
   1617  1.260     skrll 	DPRINTFN(10, "done", 0, 0, 0, 0);
   1618  1.286       mrg 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1619    1.1  augustss }
   1620    1.1  augustss 
   1621    1.1  augustss void
   1622  1.260     skrll ohci_device_ctrl_done(struct usbd_xfer *xfer)
   1623    1.1  augustss {
   1624  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   1625  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1626  1.260     skrll 	int len = UGETW(xfer->ux_request.wLength);
   1627  1.260     skrll 	int isread = (xfer->ux_request.bmRequestType & UT_READ);
   1628  1.195    bouyer 
   1629  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1630  1.274  pgoyette 	DPRINTFN(10, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   1631    1.1  augustss 
   1632  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1633  1.260     skrll 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   1634  1.224       mrg 
   1635  1.195    bouyer 	if (len)
   1636  1.260     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   1637  1.195    bouyer 		    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1638  1.260     skrll 	usb_syncmem(&opipe->ctrl.reqdma, 0,
   1639  1.260     skrll 	    sizeof(usb_device_request_t),  BUS_DMASYNC_POSTWRITE);
   1640    1.1  augustss }
   1641    1.1  augustss 
   1642    1.1  augustss void
   1643  1.260     skrll ohci_device_intr_done(struct usbd_xfer *xfer)
   1644    1.1  augustss {
   1645  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1646  1.195    bouyer 	int isread =
   1647  1.260     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1648    1.1  augustss 
   1649  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1650  1.274  pgoyette 	DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer,
   1651  1.274  pgoyette 	    xfer->ux_actlen, 0, 0);
   1652    1.1  augustss 
   1653  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1654  1.224       mrg 
   1655  1.260     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1656  1.195    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1657    1.1  augustss }
   1658    1.1  augustss 
   1659    1.1  augustss void
   1660  1.260     skrll ohci_device_bulk_done(struct usbd_xfer *xfer)
   1661    1.3  augustss {
   1662  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   1663  1.260     skrll 
   1664  1.195    bouyer 	int isread =
   1665  1.260     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   1666  1.195    bouyer 
   1667  1.290       mrg 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1668  1.224       mrg 
   1669  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1670  1.274  pgoyette 	DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, xfer->ux_actlen,
   1671  1.274  pgoyette 	    0, 0);
   1672  1.260     skrll 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   1673  1.195    bouyer 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1674    1.3  augustss }
   1675    1.3  augustss 
   1676  1.224       mrg Static void
   1677  1.224       mrg ohci_rhsc_softint(void *arg)
   1678  1.224       mrg {
   1679  1.224       mrg 	ohci_softc_t *sc = arg;
   1680  1.224       mrg 
   1681  1.224       mrg 	mutex_enter(&sc->sc_lock);
   1682  1.224       mrg 
   1683  1.224       mrg 	ohci_rhsc(sc, sc->sc_intrxfer);
   1684  1.224       mrg 
   1685  1.224       mrg 	/* Do not allow RHSC interrupts > 1 per second */
   1686  1.224       mrg 	callout_reset(&sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc);
   1687  1.224       mrg 
   1688  1.224       mrg 	mutex_exit(&sc->sc_lock);
   1689  1.224       mrg }
   1690  1.224       mrg 
   1691    1.3  augustss void
   1692  1.260     skrll ohci_rhsc(ohci_softc_t *sc, struct usbd_xfer *xfer)
   1693    1.1  augustss {
   1694    1.1  augustss 	u_char *p;
   1695    1.1  augustss 	int i, m;
   1696  1.243    martin 	int hstatus __unused;
   1697  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1698    1.1  augustss 
   1699  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1700  1.224       mrg 
   1701    1.1  augustss 	hstatus = OREAD4(sc, OHCI_RH_STATUS);
   1702  1.300  christos 	DPRINTF("sc=%#jx xfer=%#jx hstatus=0x%08jx", (uintptr_t)sc,
   1703  1.274  pgoyette 	    (uintptr_t)xfer, hstatus, 0);
   1704    1.1  augustss 
   1705   1.53  augustss 	if (xfer == NULL) {
   1706    1.1  augustss 		/* Just ignore the change. */
   1707    1.1  augustss 		return;
   1708    1.1  augustss 	}
   1709  1.295  riastrad 	KASSERT(xfer == sc->sc_intrxfer);
   1710  1.295  riastrad 	KASSERT(xfer->ux_status == USBD_IN_PROGRESS);
   1711    1.1  augustss 
   1712  1.260     skrll 	p = xfer->ux_buf;
   1713  1.285  riastrad 	m = uimin(sc->sc_noport, xfer->ux_length * 8 - 1);
   1714  1.260     skrll 	memset(p, 0, xfer->ux_length);
   1715    1.1  augustss 	for (i = 1; i <= m; i++) {
   1716   1.87  augustss 		/* Pick out CHANGE bits from the status reg. */
   1717    1.1  augustss 		if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
   1718    1.1  augustss 			p[i/8] |= 1 << (i%8);
   1719    1.1  augustss 	}
   1720  1.300  christos 	DPRINTF("change=0x%02jx", *p, 0, 0, 0);
   1721  1.294  riastrad 	KASSERT(xfer->ux_status == USBD_IN_PROGRESS);
   1722  1.260     skrll 	xfer->ux_actlen = xfer->ux_length;
   1723  1.260     skrll 	xfer->ux_status = USBD_NORMAL_COMPLETION;
   1724    1.1  augustss 
   1725   1.53  augustss 	usb_transfer_complete(xfer);
   1726   1.38  augustss }
   1727   1.38  augustss 
   1728   1.38  augustss void
   1729  1.260     skrll ohci_root_intr_done(struct usbd_xfer *xfer)
   1730   1.65  augustss {
   1731  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   1732  1.260     skrll 
   1733  1.260     skrll 	KASSERT(mutex_owned(&sc->sc_lock));
   1734   1.65  augustss 
   1735  1.294  riastrad 	/* Claim the xfer so it doesn't get completed again.  */
   1736  1.260     skrll 	KASSERT(sc->sc_intrxfer == xfer);
   1737  1.294  riastrad 	KASSERT(xfer->ux_status != USBD_IN_PROGRESS);
   1738  1.260     skrll 	sc->sc_intrxfer = NULL;
   1739    1.1  augustss }
   1740    1.1  augustss 
   1741    1.5  augustss void
   1742   1.91  augustss ohci_poll(struct usbd_bus *bus)
   1743    1.5  augustss {
   1744  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   1745  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1746  1.260     skrll 
   1747  1.105  augustss #ifdef OHCI_DEBUG
   1748  1.105  augustss 	static int last;
   1749  1.105  augustss 	int new;
   1750  1.105  augustss 	new = OREAD4(sc, OHCI_INTERRUPT_STATUS);
   1751  1.105  augustss 	if (new != last) {
   1752  1.300  christos 		DPRINTFN(10, "intrs=0x%04jx", new, 0, 0, 0);
   1753  1.105  augustss 		last = new;
   1754  1.105  augustss 	}
   1755  1.105  augustss #endif
   1756  1.217  jmcneill 	sc->sc_eintrs |= OHCI_WDH;
   1757  1.224       mrg 	if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) {
   1758  1.224       mrg 		mutex_spin_enter(&sc->sc_intr_lock);
   1759   1.53  augustss 		ohci_intr1(sc);
   1760  1.224       mrg 		mutex_spin_exit(&sc->sc_intr_lock);
   1761  1.224       mrg 	}
   1762    1.1  augustss }
   1763    1.1  augustss 
   1764  1.260     skrll /*
   1765  1.260     skrll  * Add an ED to the schedule.  Called with USB lock held.
   1766  1.260     skrll  */
   1767  1.260     skrll Static void
   1768  1.260     skrll ohci_add_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1769    1.1  augustss {
   1770  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1771  1.274  pgoyette 	DPRINTFN(8, "sed=%#jx head=%#jx", (uintptr_t)sed, (uintptr_t)head, 0,
   1772  1.274  pgoyette 	    0);
   1773  1.224       mrg 
   1774  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1775    1.1  augustss 
   1776  1.260     skrll 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1777  1.260     skrll 	    sizeof(head->ed.ed_nexted),
   1778  1.260     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1779  1.260     skrll 	sed->next = head->next;
   1780  1.260     skrll 	sed->ed.ed_nexted = head->ed.ed_nexted;
   1781  1.260     skrll 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1782  1.260     skrll 	    sizeof(sed->ed.ed_nexted),
   1783  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1784  1.260     skrll 	head->next = sed;
   1785  1.260     skrll 	head->ed.ed_nexted = HTOO32(sed->physaddr);
   1786  1.260     skrll 	usb_syncmem(&head->dma, head->offs + offsetof(ohci_ed_t, ed_nexted),
   1787  1.260     skrll 	    sizeof(head->ed.ed_nexted),
   1788  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1789  1.260     skrll }
   1790    1.1  augustss 
   1791  1.260     skrll /*
   1792  1.260     skrll  * Remove an ED from the schedule.  Called with USB lock held.
   1793  1.260     skrll  */
   1794  1.260     skrll Static void
   1795  1.260     skrll ohci_rem_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
   1796  1.260     skrll {
   1797  1.260     skrll 	ohci_soft_ed_t *p;
   1798    1.1  augustss 
   1799  1.260     skrll 	KASSERT(mutex_owned(&sc->sc_lock));
   1800    1.1  augustss 
   1801  1.260     skrll 	/* XXX */
   1802  1.260     skrll 	for (p = head; p != NULL && p->next != sed; p = p->next)
   1803    1.3  augustss 		;
   1804  1.255     skrll 	KASSERT(p != NULL);
   1805  1.255     skrll 
   1806  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_nexted),
   1807  1.195    bouyer 	    sizeof(sed->ed.ed_nexted),
   1808  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1809    1.3  augustss 	p->next = sed->next;
   1810   1.39  augustss 	p->ed.ed_nexted = sed->ed.ed_nexted;
   1811  1.195    bouyer 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   1812  1.195    bouyer 	    sizeof(p->ed.ed_nexted),
   1813  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   1814    1.3  augustss }
   1815    1.3  augustss 
   1816    1.3  augustss /*
   1817    1.1  augustss  * When a transfer is completed the TD is added to the done queue by
   1818    1.1  augustss  * the host controller.  This queue is the processed by software.
   1819    1.1  augustss  * Unfortunately the queue contains the physical address of the TD
   1820    1.9  augustss  * and we have no simple way to translate this back to a kernel address.
   1821    1.1  augustss  * To make the translation possible (and fast) we use a hash table of
   1822    1.1  augustss  * TDs currently in the schedule.  The physical address is used as the
   1823    1.1  augustss  * hash value.
   1824    1.1  augustss  */
   1825    1.1  augustss 
   1826    1.1  augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
   1827  1.224       mrg /* Called with USB lock held. */
   1828    1.1  augustss void
   1829   1.91  augustss ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1830    1.1  augustss {
   1831    1.1  augustss 	int h = HASH(std->physaddr);
   1832    1.1  augustss 
   1833  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1834  1.224       mrg 
   1835    1.1  augustss 	LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
   1836    1.1  augustss }
   1837    1.1  augustss 
   1838  1.224       mrg /* Called with USB lock held. */
   1839    1.1  augustss void
   1840  1.179  christos ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1841    1.1  augustss {
   1842   1.46  augustss 
   1843  1.260     skrll 	KASSERT(sc->sc_bus.ub_usepolling || mutex_owned(&sc->sc_lock));
   1844  1.224       mrg 
   1845    1.1  augustss 	LIST_REMOVE(std, hnext);
   1846    1.1  augustss }
   1847    1.1  augustss 
   1848    1.1  augustss ohci_soft_td_t *
   1849   1.91  augustss ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
   1850    1.1  augustss {
   1851    1.1  augustss 	int h = HASH(a);
   1852    1.1  augustss 	ohci_soft_td_t *std;
   1853    1.1  augustss 
   1854  1.120  augustss 	for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
   1855   1.53  augustss 	     std != NULL;
   1856    1.1  augustss 	     std = LIST_NEXT(std, hnext))
   1857    1.1  augustss 		if (std->physaddr == a)
   1858  1.260     skrll 			return std;
   1859  1.260     skrll 	return NULL;
   1860   1.83  augustss }
   1861   1.83  augustss 
   1862  1.224       mrg /* Called with USB lock held. */
   1863   1.83  augustss void
   1864   1.91  augustss ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1865   1.83  augustss {
   1866   1.83  augustss 	int h = HASH(sitd->physaddr);
   1867   1.83  augustss 
   1868  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1869  1.260     skrll 
   1870  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1871  1.224       mrg 
   1872  1.300  christos 	DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx",
   1873  1.274  pgoyette 	    (uintptr_t)sitd, (u_long)sitd->physaddr, 0, 0);
   1874   1.83  augustss 
   1875   1.83  augustss 	LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
   1876   1.83  augustss }
   1877   1.83  augustss 
   1878  1.224       mrg /* Called with USB lock held. */
   1879   1.83  augustss void
   1880  1.179  christos ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1881   1.83  augustss {
   1882   1.83  augustss 
   1883  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1884  1.260     skrll 
   1885  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   1886  1.224       mrg 
   1887  1.300  christos 	DPRINTFN(10, "sitd=%#jx physaddr=0x%08jx", (uintptr_t)sitd,
   1888  1.274  pgoyette 	    sitd->physaddr, 0, 0);
   1889   1.83  augustss 
   1890   1.83  augustss 	LIST_REMOVE(sitd, hnext);
   1891   1.83  augustss }
   1892   1.83  augustss 
   1893   1.83  augustss ohci_soft_itd_t *
   1894   1.91  augustss ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
   1895   1.83  augustss {
   1896   1.83  augustss 	int h = HASH(a);
   1897   1.83  augustss 	ohci_soft_itd_t *sitd;
   1898   1.83  augustss 
   1899  1.120  augustss 	for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
   1900   1.83  augustss 	     sitd != NULL;
   1901   1.83  augustss 	     sitd = LIST_NEXT(sitd, hnext))
   1902   1.83  augustss 		if (sitd->physaddr == a)
   1903  1.260     skrll 			return sitd;
   1904  1.260     skrll 	return NULL;
   1905    1.1  augustss }
   1906    1.1  augustss 
   1907   1.52  augustss #ifdef OHCI_DEBUG
   1908    1.1  augustss void
   1909  1.168  augustss ohci_dump_tds(ohci_softc_t *sc, ohci_soft_td_t *std)
   1910    1.1  augustss {
   1911  1.260     skrll 	for (; std; std = std->nexttd) {
   1912  1.168  augustss 		ohci_dump_td(sc, std);
   1913  1.260     skrll 		KASSERTMSG(std->nexttd == NULL || std != std->nexttd,
   1914  1.260     skrll 		    "std %p next %p", std, std->nexttd);
   1915  1.260     skrll 	}
   1916    1.1  augustss }
   1917    1.1  augustss 
   1918    1.1  augustss void
   1919  1.168  augustss ohci_dump_td(ohci_softc_t *sc, ohci_soft_td_t *std)
   1920    1.1  augustss {
   1921  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1922   1.92        tv 
   1923  1.204    martin 	usb_syncmem(&std->dma, std->offs, sizeof(std->td),
   1924  1.204    martin 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1925  1.260     skrll 
   1926  1.260     skrll 	uint32_t flags = O32TOH(std->td.td_flags);
   1927  1.300  christos 	DPRINTF("TD(%#jx) at 0x%08jx:", (uintptr_t)std, std->physaddr, 0, 0);
   1928  1.274  pgoyette 	DPRINTF("    round=%jd DP=%jx DI=%jx T=%jx",
   1929  1.260     skrll 	    !!(flags & OHCI_TD_R),
   1930  1.260     skrll 	    __SHIFTOUT(flags, OHCI_TD_DP_MASK),
   1931  1.260     skrll 	    OHCI_TD_GET_DI(flags),
   1932  1.260     skrll 	    __SHIFTOUT(flags, OHCI_TD_TOGGLE_MASK));
   1933  1.274  pgoyette 	DPRINTF("    EC=%jd CC=%jd", OHCI_TD_GET_EC(flags),
   1934  1.274  pgoyette 	    OHCI_TD_GET_CC(flags), 0, 0);
   1935  1.300  christos 	DPRINTF("    td_cbp=0x%08jx td_nexttd=0x%08jx td_be=0x%08jx",
   1936  1.168  augustss 	       (u_long)O32TOH(std->td.td_cbp),
   1937  1.168  augustss 	       (u_long)O32TOH(std->td.td_nexttd),
   1938  1.260     skrll 	       (u_long)O32TOH(std->td.td_be), 0);
   1939    1.1  augustss }
   1940    1.1  augustss 
   1941    1.1  augustss void
   1942  1.168  augustss ohci_dump_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1943   1.83  augustss {
   1944  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1945   1.83  augustss 
   1946  1.195    bouyer 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   1947  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1948  1.260     skrll 
   1949  1.260     skrll 	uint32_t flags = O32TOH(sitd->itd.itd_flags);
   1950  1.300  christos 	DPRINTF("ITD(%#jx) at 0x%08jx", (uintptr_t)sitd, sitd->physaddr, 0, 0);
   1951  1.274  pgoyette 	DPRINTF("    sf=%jd di=%jd fc=%jd cc=%jd",
   1952  1.260     skrll 	    OHCI_ITD_GET_SF(flags), OHCI_ITD_GET_DI(flags),
   1953  1.260     skrll 	    OHCI_ITD_GET_FC(flags), OHCI_ITD_GET_CC(flags));
   1954  1.300  christos 	DPRINTF("    bp0=0x%08jx next=0x%08jx be=0x%08jx",
   1955  1.260     skrll 	    O32TOH(sitd->itd.itd_bp0),
   1956  1.260     skrll 	    O32TOH(sitd->itd.itd_nextitd),
   1957  1.260     skrll 	    O32TOH(sitd->itd.itd_be), 0);
   1958  1.260     skrll 	CTASSERT(OHCI_ITD_NOFFSET == 8);
   1959  1.300  christos 	DPRINTF("    offs[0] = 0x%04jx  offs[1] = 0x%04jx  "
   1960  1.300  christos 	    "offs[2] = 0x%04jx  offs[3] = 0x%04jx",
   1961  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[0]),
   1962  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[1]),
   1963  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[2]),
   1964  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[3]));
   1965  1.300  christos 	DPRINTF("    offs[4] = 0x%04jx  offs[5] = 0x%04jx  "
   1966  1.300  christos 	    "offs[6] = 0x%04jx  offs[7] = 0x%04jx",
   1967  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[4]),
   1968  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[5]),
   1969  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[6]),
   1970  1.260     skrll 	    O16TOH(sitd->itd.itd_offset[7]));
   1971   1.83  augustss }
   1972   1.83  augustss 
   1973   1.83  augustss void
   1974  1.168  augustss ohci_dump_itds(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
   1975   1.83  augustss {
   1976   1.83  augustss 	for (; sitd; sitd = sitd->nextitd)
   1977  1.168  augustss 		ohci_dump_itd(sc, sitd);
   1978   1.83  augustss }
   1979   1.83  augustss 
   1980   1.83  augustss void
   1981  1.168  augustss ohci_dump_ed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
   1982    1.1  augustss {
   1983  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   1984   1.92        tv 
   1985  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   1986  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   1987  1.260     skrll 
   1988  1.260     skrll 	uint32_t flags = O32TOH(sed->ed.ed_flags);
   1989  1.300  christos 	DPRINTF("ED(%#jx) at 0x%08jx:", (uintptr_t)sed, sed->physaddr, 0, 0);
   1990  1.274  pgoyette 	DPRINTF("    addr=%jd endpt=%jd maxp=%jd",
   1991  1.260     skrll 	    OHCI_ED_GET_FA(flags),
   1992  1.260     skrll 	    OHCI_ED_GET_EN(flags),
   1993  1.260     skrll 	    OHCI_ED_GET_MAXP(flags),
   1994  1.260     skrll 	    0);
   1995  1.274  pgoyette 	DPRINTF("    dir=%jd speed=%jd skip=%jd iso=%jd",
   1996  1.260     skrll 	   __SHIFTOUT(flags, OHCI_ED_DIR_MASK),
   1997  1.260     skrll 	    !!(flags & OHCI_ED_SPEED),
   1998  1.260     skrll 	    !!(flags & OHCI_ED_SKIP),
   1999  1.260     skrll 	    !!(flags & OHCI_ED_FORMAT_ISO));
   2000  1.300  christos 	DPRINTF("    tailp=0x%08jx", (u_long)O32TOH(sed->ed.ed_tailp),
   2001  1.260     skrll 	    0, 0, 0);
   2002  1.300  christos 	DPRINTF("    headp=0x%08jx nexted=0x%08jx halted=%jd carry=%jd",
   2003  1.260     skrll 	    O32TOH(sed->ed.ed_headp), O32TOH(sed->ed.ed_nexted),
   2004  1.260     skrll 	    !!(O32TOH(sed->ed.ed_headp) & OHCI_HALTED),
   2005  1.260     skrll 	    !!(O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
   2006    1.1  augustss }
   2007    1.1  augustss #endif
   2008    1.1  augustss 
   2009    1.1  augustss usbd_status
   2010  1.260     skrll ohci_open(struct usbd_pipe *pipe)
   2011    1.1  augustss {
   2012  1.260     skrll 	struct usbd_device *dev = pipe->up_dev;
   2013  1.260     skrll 	struct usbd_bus *bus = dev->ud_bus;
   2014  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2015  1.260     skrll 	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
   2016  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2017  1.260     skrll 	uint8_t addr = dev->ud_addr;
   2018  1.260     skrll 	uint8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
   2019    1.1  augustss 	ohci_soft_ed_t *sed;
   2020    1.1  augustss 	ohci_soft_td_t *std;
   2021   1.60  augustss 	ohci_soft_itd_t *sitd;
   2022   1.60  augustss 	ohci_physaddr_t tdphys;
   2023  1.260     skrll 	uint32_t fmt;
   2024  1.224       mrg 	usbd_status err = USBD_NOMEM;
   2025   1.64  augustss 	int ival;
   2026    1.1  augustss 
   2027  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2028  1.274  pgoyette 	DPRINTFN(1, "pipe=%#jx, addr=%jd, endpt=%jd (%jd)", (uintptr_t)pipe,
   2029  1.274  pgoyette 	    addr, ed->bEndpointAddress, bus->ub_rhaddr);
   2030   1.81  augustss 
   2031  1.224       mrg 	if (sc->sc_dying) {
   2032  1.241     skrll 		return USBD_IOERROR;
   2033  1.224       mrg 	}
   2034  1.116  augustss 
   2035   1.90   thorpej 	std = NULL;
   2036   1.90   thorpej 	sed = NULL;
   2037   1.90   thorpej 
   2038  1.260     skrll 	if (addr == bus->ub_rhaddr) {
   2039    1.1  augustss 		switch (ed->bEndpointAddress) {
   2040    1.1  augustss 		case USB_CONTROL_ENDPOINT:
   2041  1.260     skrll 			pipe->up_methods = &roothub_ctrl_methods;
   2042    1.1  augustss 			break;
   2043  1.260     skrll 		case UE_DIR_IN | USBROOTHUB_INTR_ENDPT:
   2044  1.260     skrll 			pipe->up_methods = &ohci_root_intr_methods;
   2045    1.1  augustss 			break;
   2046    1.1  augustss 		default:
   2047  1.224       mrg 			err = USBD_INVAL;
   2048  1.241     skrll 			goto bad;
   2049    1.1  augustss 		}
   2050    1.1  augustss 	} else {
   2051    1.1  augustss 		sed = ohci_alloc_sed(sc);
   2052   1.53  augustss 		if (sed == NULL)
   2053  1.241     skrll 			goto bad;
   2054    1.1  augustss 		opipe->sed = sed;
   2055   1.60  augustss 		if (xfertype == UE_ISOCHRONOUS) {
   2056   1.60  augustss 			sitd = ohci_alloc_sitd(sc);
   2057  1.127  augustss 			if (sitd == NULL)
   2058  1.241     skrll 				goto bad;
   2059  1.241     skrll 
   2060   1.60  augustss 			opipe->tail.itd = sitd;
   2061   1.76   tsutsui 			tdphys = sitd->physaddr;
   2062   1.60  augustss 			fmt = OHCI_ED_FORMAT_ISO;
   2063   1.83  augustss 			if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
   2064   1.83  augustss 				fmt |= OHCI_ED_DIR_IN;
   2065   1.83  augustss 			else
   2066   1.83  augustss 				fmt |= OHCI_ED_DIR_OUT;
   2067   1.60  augustss 		} else {
   2068   1.60  augustss 			std = ohci_alloc_std(sc);
   2069  1.127  augustss 			if (std == NULL)
   2070  1.241     skrll 				goto bad;
   2071  1.241     skrll 
   2072   1.60  augustss 			opipe->tail.td = std;
   2073   1.76   tsutsui 			tdphys = std->physaddr;
   2074   1.83  augustss 			fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
   2075   1.60  augustss 		}
   2076  1.168  augustss 		sed->ed.ed_flags = HTOO32(
   2077  1.120  augustss 			OHCI_ED_SET_FA(addr) |
   2078  1.147   mycroft 			OHCI_ED_SET_EN(UE_GET_ADDR(ed->bEndpointAddress)) |
   2079  1.260     skrll 			(dev->ud_speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) |
   2080  1.109  augustss 			fmt |
   2081   1.16  augustss 			OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
   2082  1.214  jakllsch 		sed->ed.ed_headp = HTOO32(tdphys |
   2083  1.260     skrll 		    (pipe->up_endpoint->ue_toggle ? OHCI_TOGGLECARRY : 0));
   2084  1.214  jakllsch 		sed->ed.ed_tailp = HTOO32(tdphys);
   2085  1.195    bouyer 		usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   2086  1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2087    1.1  augustss 
   2088   1.60  augustss 		switch (xfertype) {
   2089    1.1  augustss 		case UE_CONTROL:
   2090  1.260     skrll 			pipe->up_methods = &ohci_device_ctrl_methods;
   2091  1.120  augustss 			err = usb_allocmem(&sc->sc_bus,
   2092  1.301     skrll 			    sizeof(usb_device_request_t), 0,
   2093  1.301     skrll 			    USBMALLOC_COHERENT, &opipe->ctrl.reqdma);
   2094   1.53  augustss 			if (err)
   2095    1.1  augustss 				goto bad;
   2096  1.224       mrg 			mutex_enter(&sc->sc_lock);
   2097  1.168  augustss 			ohci_add_ed(sc, sed, sc->sc_ctrl_head);
   2098  1.224       mrg 			mutex_exit(&sc->sc_lock);
   2099    1.1  augustss 			break;
   2100    1.1  augustss 		case UE_INTERRUPT:
   2101  1.260     skrll 			pipe->up_methods = &ohci_device_intr_methods;
   2102  1.260     skrll 			ival = pipe->up_interval;
   2103   1.64  augustss 			if (ival == USBD_DEFAULT_INTERVAL)
   2104   1.64  augustss 				ival = ed->bInterval;
   2105  1.226     skrll 			err = ohci_device_setintr(sc, opipe, ival);
   2106  1.226     skrll 			if (err)
   2107  1.226     skrll 				goto bad;
   2108  1.226     skrll 			break;
   2109    1.1  augustss 		case UE_ISOCHRONOUS:
   2110  1.260     skrll 			pipe->up_serialise = false;
   2111  1.260     skrll 			pipe->up_methods = &ohci_device_isoc_methods;
   2112  1.260     skrll 			return ohci_setup_isoc(pipe);
   2113    1.1  augustss 		case UE_BULK:
   2114  1.260     skrll 			pipe->up_methods = &ohci_device_bulk_methods;
   2115  1.224       mrg 			mutex_enter(&sc->sc_lock);
   2116  1.168  augustss 			ohci_add_ed(sc, sed, sc->sc_bulk_head);
   2117  1.224       mrg 			mutex_exit(&sc->sc_lock);
   2118    1.3  augustss 			break;
   2119    1.1  augustss 		}
   2120    1.1  augustss 	}
   2121  1.224       mrg 
   2122  1.224       mrg 	return USBD_NORMAL_COMPLETION;
   2123    1.1  augustss 
   2124    1.1  augustss  bad:
   2125  1.241     skrll 	if (std != NULL) {
   2126   1.90   thorpej 		ohci_free_std(sc, std);
   2127  1.241     skrll 	}
   2128   1.90   thorpej 	if (sed != NULL)
   2129   1.90   thorpej 		ohci_free_sed(sc, sed);
   2130  1.224       mrg 	return err;
   2131  1.120  augustss 
   2132    1.1  augustss }
   2133    1.1  augustss 
   2134    1.1  augustss /*
   2135   1.34  augustss  * Close a reqular pipe.
   2136   1.34  augustss  * Assumes that there are no pending transactions.
   2137   1.34  augustss  */
   2138   1.34  augustss void
   2139  1.260     skrll ohci_close_pipe(struct usbd_pipe *pipe, ohci_soft_ed_t *head)
   2140   1.34  augustss {
   2141  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2142  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2143   1.34  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   2144   1.34  augustss 
   2145  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2146  1.224       mrg 
   2147   1.34  augustss #ifdef DIAGNOSTIC
   2148  1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   2149  1.168  augustss 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2150  1.168  augustss 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK)) {
   2151   1.34  augustss 		ohci_soft_td_t *std;
   2152  1.168  augustss 		std = ohci_hash_find_td(sc, O32TOH(sed->ed.ed_headp));
   2153  1.299  christos 		printf("ohci_close_pipe: pipe not empty sed=%p hd=%#x "
   2154  1.299  christos 		       "tl=%#x pipe=%p, std=%p\n", sed,
   2155  1.168  augustss 		       (int)O32TOH(sed->ed.ed_headp),
   2156  1.168  augustss 		       (int)O32TOH(sed->ed.ed_tailp),
   2157   1.34  augustss 		       pipe, std);
   2158  1.229  christos #ifdef OHCI_DEBUG
   2159  1.107  augustss 		usbd_dump_pipe(&opipe->pipe);
   2160  1.168  augustss 		ohci_dump_ed(sc, sed);
   2161  1.106  augustss 		if (std)
   2162  1.168  augustss 			ohci_dump_td(sc, std);
   2163  1.106  augustss #endif
   2164   1.34  augustss 		usb_delay_ms(&sc->sc_bus, 2);
   2165  1.168  augustss 		if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   2166  1.168  augustss 		    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   2167   1.34  augustss 			printf("ohci_close_pipe: pipe still not empty\n");
   2168   1.34  augustss 	}
   2169   1.34  augustss #endif
   2170  1.224       mrg 	ohci_rem_ed(sc, sed, head);
   2171  1.133    toshii 	/* Make sure the host controller is not touching this ED */
   2172  1.133    toshii 	usb_delay_ms(&sc->sc_bus, 1);
   2173  1.260     skrll 	pipe->up_endpoint->ue_toggle =
   2174  1.214  jakllsch 	    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY) ? 1 : 0;
   2175  1.260     skrll 	ohci_free_sed_locked(sc, opipe->sed);
   2176   1.34  augustss }
   2177   1.34  augustss 
   2178  1.120  augustss /*
   2179  1.293  riastrad  * Arrange for the hardware to tells us that it is not still processing
   2180  1.293  riastrad  * the TDs by setting the sKip bit and requesting a SOF interrupt
   2181  1.282       mrg  *
   2182  1.282       mrg  * Once we see the SOF interrupt we can check the transfer TDs/iTDs to see if
   2183  1.282       mrg  * they've been processed and either
   2184  1.282       mrg  * 	a) if they're unused recover them for later use, or
   2185  1.282       mrg  *	b) if they've been used allocate new TD/iTDs to replace those
   2186  1.282       mrg  *         used.  The softint handler will free the old ones.
   2187   1.34  augustss  */
   2188   1.34  augustss void
   2189  1.293  riastrad ohci_abortx(struct usbd_xfer *xfer)
   2190   1.34  augustss {
   2191  1.282       mrg 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2192  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2193  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2194  1.106  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   2195  1.106  augustss 	ohci_soft_td_t *p, *n;
   2196  1.106  augustss 	ohci_physaddr_t headp;
   2197  1.224       mrg 	int hit;
   2198   1.34  augustss 
   2199  1.274  pgoyette 	DPRINTF("xfer=%#jx pipe=%#jx sed=%#jx", (uintptr_t)xfer,
   2200  1.274  pgoyette 	    (uintptr_t)opipe, (uintptr_t)sed, 0);
   2201   1.34  augustss 
   2202  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2203  1.260     skrll 	ASSERT_SLEEPABLE();
   2204  1.224       mrg 
   2205  1.293  riastrad 	KASSERTMSG((xfer->ux_status == USBD_CANCELLED ||
   2206  1.293  riastrad 		xfer->ux_status == USBD_TIMEOUT),
   2207  1.293  riastrad 	    "bad abort status: %d", xfer->ux_status);
   2208  1.116  augustss 
   2209  1.106  augustss 	/*
   2210  1.282       mrg 	 * If we're dying, skip the hardware action and just notify the
   2211  1.282       mrg 	 * software that we're done.
   2212  1.159  augustss 	 */
   2213  1.282       mrg 	if (sc->sc_dying) {
   2214  1.282       mrg 		DPRINTFN(4, "xfer %#jx dying %ju", (uintptr_t)xfer,
   2215  1.282       mrg 		    xfer->ux_status, 0, 0);
   2216  1.282       mrg 		goto dying;
   2217  1.159  augustss 	}
   2218  1.159  augustss 
   2219  1.159  augustss 	/*
   2220  1.282       mrg 	 * HC Step 1: Unless the endpoint is already halted, we set the endpoint
   2221  1.282       mrg 	 * descriptor sKip bit and wait for hardware to complete processing.
   2222  1.282       mrg 	 *
   2223  1.282       mrg 	 * This includes ensuring that any TDs of the transfer that got onto
   2224  1.282       mrg 	 * the done list are also removed.  We ensure this by waiting for
   2225  1.282       mrg 	 * both a WDH and SOF interrupt.
   2226  1.106  augustss 	 */
   2227  1.274  pgoyette 	DPRINTFN(1, "stop ed=%#jx", (uintptr_t)sed, 0, 0, 0);
   2228  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2229  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2230  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2231  1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   2232  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2233  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2234  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2235   1.34  augustss 
   2236  1.120  augustss 	/*
   2237  1.282       mrg 	 * HC Step 2: Wait until we know hardware has finished any possible
   2238  1.282       mrg 	 * use of the xfer.
   2239  1.106  augustss 	 */
   2240  1.224       mrg 	/* Hardware finishes in 1ms */
   2241  1.260     skrll 	usb_delay_ms_locked(opipe->pipe.up_dev->ud_bus, 20, &sc->sc_lock);
   2242  1.119  augustss 
   2243  1.120  augustss 	/*
   2244  1.282       mrg 	 * HC Step 3: Remove any vestiges of the xfer from the hardware.
   2245  1.106  augustss 	 * The complication here is that the hardware may have executed
   2246  1.106  augustss 	 * beyond the xfer we're trying to abort.  So as we're scanning
   2247  1.106  augustss 	 * the TDs of this xfer we check if the hardware points to
   2248  1.106  augustss 	 * any of them.
   2249  1.106  augustss 	 */
   2250  1.260     skrll 	p = xfer->ux_hcpriv;
   2251  1.260     skrll 	KASSERT(p);
   2252  1.260     skrll 
   2253  1.106  augustss #ifdef OHCI_DEBUG
   2254  1.260     skrll 	DPRINTF("--- dump start ---", 0, 0, 0, 0);
   2255  1.260     skrll 
   2256  1.260     skrll 	if (ohcidebug >= 2) {
   2257  1.260     skrll 		DPRINTF("sed:", 0, 0, 0, 0);
   2258  1.168  augustss 		ohci_dump_ed(sc, sed);
   2259  1.168  augustss 		ohci_dump_tds(sc, p);
   2260  1.106  augustss 	}
   2261  1.260     skrll 	DPRINTF("--- dump end ---", 0, 0, 0, 0);
   2262  1.106  augustss #endif
   2263  1.168  augustss 	headp = O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK;
   2264  1.106  augustss 	hit = 0;
   2265   1.53  augustss 	for (; p->xfer == xfer; p = n) {
   2266  1.106  augustss 		hit |= headp == p->physaddr;
   2267   1.38  augustss 		n = p->nexttd;
   2268  1.260     skrll 		ohci_hash_rem_td(sc, p);
   2269   1.34  augustss 	}
   2270  1.106  augustss 	/* Zap headp register if hardware pointed inside the xfer. */
   2271  1.106  augustss 	if (hit) {
   2272  1.300  christos 		DPRINTFN(1, "set hd=0x%08jx, tl=0x%08jx",  (int)p->physaddr,
   2273  1.260     skrll 		    (int)O32TOH(sed->ed.ed_tailp), 0, 0);
   2274  1.292      gson 		/* unlink TDs, preserving toggle carry */
   2275  1.292      gson 		sed->ed.ed_headp = HTOO32(p->physaddr |
   2276  1.292      gson 		    (O32TOH(sed->ed.ed_headp) & OHCI_TOGGLECARRY));
   2277  1.195    bouyer 		usb_syncmem(&sed->dma,
   2278  1.195    bouyer 		    sed->offs + offsetof(ohci_ed_t, ed_headp),
   2279  1.195    bouyer 		    sizeof(sed->ed.ed_headp),
   2280  1.195    bouyer 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2281  1.106  augustss 	} else {
   2282  1.260     skrll 		DPRINTFN(1, "no hit", 0, 0, 0, 0);
   2283  1.106  augustss 	}
   2284   1.34  augustss 
   2285  1.106  augustss 	/*
   2286  1.282       mrg 	 * HC Step 4: Turn on hardware again.
   2287  1.106  augustss 	 */
   2288  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2289  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2290  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   2291  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   2292  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   2293  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   2294  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2295   1.38  augustss 
   2296  1.106  augustss 	/*
   2297  1.282       mrg 	 * Final step: Notify completion to waiting xfers.
   2298  1.106  augustss 	 */
   2299  1.282       mrg dying:
   2300   1.53  augustss 	usb_transfer_complete(xfer);
   2301  1.282       mrg 	DPRINTFN(14, "end", 0, 0, 0, 0);
   2302   1.38  augustss 
   2303  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2304   1.34  augustss }
   2305   1.34  augustss 
   2306   1.34  augustss /*
   2307    1.1  augustss  * Data structures and routines to emulate the root hub.
   2308    1.1  augustss  */
   2309  1.260     skrll Static int
   2310  1.260     skrll ohci_roothub_ctrl(struct usbd_bus *bus, usb_device_request_t *req,
   2311  1.260     skrll     void *buf, int buflen)
   2312    1.1  augustss {
   2313  1.260     skrll 	ohci_softc_t *sc = OHCI_BUS2SC(bus);
   2314  1.260     skrll 	usb_port_status_t ps;
   2315  1.260     skrll 	uint16_t len, value, index;
   2316  1.260     skrll 	int l, totlen = 0;
   2317  1.260     skrll 	int port, i;
   2318  1.260     skrll 	uint32_t v;
   2319   1.17  augustss 
   2320  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2321    1.1  augustss 
   2322   1.83  augustss 	if (sc->sc_dying)
   2323  1.260     skrll 		return -1;
   2324    1.1  augustss 
   2325  1.300  christos 	DPRINTFN(4, "type=0x%02jx request=%02jx", req->bmRequestType,
   2326  1.260     skrll 	    req->bRequest, 0, 0);
   2327    1.1  augustss 
   2328    1.1  augustss 	len = UGETW(req->wLength);
   2329    1.1  augustss 	value = UGETW(req->wValue);
   2330    1.1  augustss 	index = UGETW(req->wIndex);
   2331   1.43  augustss 
   2332    1.1  augustss #define C(x,y) ((x) | ((y) << 8))
   2333  1.260     skrll 	switch (C(req->bRequest, req->bmRequestType)) {
   2334    1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
   2335  1.300  christos 		DPRINTFN(8, "wValue=0x%04jx", value, 0, 0, 0);
   2336  1.171  christos 		if (len == 0)
   2337  1.171  christos 			break;
   2338  1.260     skrll 		switch (value) {
   2339  1.186  drochner #define sd ((usb_string_descriptor_t *)buf)
   2340  1.260     skrll 		case C(2, UDESC_STRING):
   2341  1.260     skrll 			/* Product */
   2342  1.260     skrll 			totlen = usb_makestrdesc(sd, len, "OHCI root hub");
   2343  1.260     skrll 			break;
   2344  1.186  drochner #undef sd
   2345    1.1  augustss 		default:
   2346  1.260     skrll 			/* default from usbroothub */
   2347  1.260     skrll 			return buflen;
   2348    1.1  augustss 		}
   2349    1.1  augustss 		break;
   2350  1.260     skrll 
   2351    1.1  augustss 	/* Hub requests */
   2352    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
   2353    1.1  augustss 		break;
   2354    1.1  augustss 	case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
   2355  1.274  pgoyette 		DPRINTFN(8, "UR_CLEAR_PORT_FEATURE port=%jd feature=%jd",
   2356  1.260     skrll 		    index, value, 0, 0);
   2357    1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2358  1.260     skrll 			return -1;
   2359    1.1  augustss 		}
   2360    1.1  augustss 		port = OHCI_RH_PORT_STATUS(index);
   2361    1.1  augustss 		switch(value) {
   2362    1.1  augustss 		case UHF_PORT_ENABLE:
   2363    1.1  augustss 			OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
   2364    1.1  augustss 			break;
   2365    1.1  augustss 		case UHF_PORT_SUSPEND:
   2366    1.1  augustss 			OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
   2367    1.1  augustss 			break;
   2368    1.1  augustss 		case UHF_PORT_POWER:
   2369   1.86  augustss 			/* Yes, writing to the LOW_SPEED bit clears power. */
   2370    1.1  augustss 			OWRITE4(sc, port, UPS_LOW_SPEED);
   2371    1.1  augustss 			break;
   2372    1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2373    1.1  augustss 			OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
   2374    1.1  augustss 			break;
   2375    1.1  augustss 		case UHF_C_PORT_ENABLE:
   2376    1.1  augustss 			OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
   2377    1.1  augustss 			break;
   2378    1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2379    1.1  augustss 			OWRITE4(sc, port, UPS_C_SUSPEND << 16);
   2380    1.1  augustss 			break;
   2381    1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2382    1.1  augustss 			OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
   2383    1.1  augustss 			break;
   2384    1.1  augustss 		case UHF_C_PORT_RESET:
   2385    1.1  augustss 			OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
   2386    1.1  augustss 			break;
   2387    1.1  augustss 		default:
   2388  1.260     skrll 			return -1;
   2389    1.1  augustss 		}
   2390    1.1  augustss 		switch(value) {
   2391    1.1  augustss 		case UHF_C_PORT_CONNECTION:
   2392    1.1  augustss 		case UHF_C_PORT_ENABLE:
   2393    1.1  augustss 		case UHF_C_PORT_SUSPEND:
   2394    1.1  augustss 		case UHF_C_PORT_OVER_CURRENT:
   2395    1.1  augustss 		case UHF_C_PORT_RESET:
   2396    1.1  augustss 			/* Enable RHSC interrupt if condition is cleared. */
   2397    1.1  augustss 			if ((OREAD4(sc, port) >> 16) == 0)
   2398  1.157   mycroft 				ohci_rhsc_enable(sc);
   2399    1.1  augustss 			break;
   2400    1.1  augustss 		default:
   2401    1.1  augustss 			break;
   2402    1.1  augustss 		}
   2403    1.1  augustss 		break;
   2404    1.1  augustss 	case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
   2405  1.171  christos 		if (len == 0)
   2406  1.171  christos 			break;
   2407  1.146    toshii 		if ((value & 0xff) != 0) {
   2408  1.260     skrll 			return -1;
   2409    1.1  augustss 		}
   2410  1.260     skrll 		usb_hub_descriptor_t hubd;
   2411  1.260     skrll 
   2412  1.285  riastrad 		totlen = uimin(buflen, sizeof(hubd));
   2413  1.260     skrll 		memcpy(&hubd, buf, totlen);
   2414  1.260     skrll 
   2415    1.1  augustss 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
   2416    1.1  augustss 		hubd.bNbrPorts = sc->sc_noport;
   2417   1.15  augustss 		USETW(hubd.wHubCharacteristics,
   2418  1.120  augustss 		      (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
   2419    1.1  augustss 		       v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
   2420    1.1  augustss 		      /* XXX overcurrent */
   2421    1.1  augustss 		      );
   2422    1.1  augustss 		hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
   2423    1.1  augustss 		v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
   2424  1.120  augustss 		for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
   2425  1.260     skrll 			hubd.DeviceRemovable[i++] = (uint8_t)v;
   2426   1.15  augustss 		hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
   2427  1.285  riastrad 		totlen = uimin(totlen, hubd.bDescLength);
   2428  1.260     skrll 		memcpy(buf, &hubd, totlen);
   2429    1.1  augustss 		break;
   2430    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
   2431    1.1  augustss 		if (len != 4) {
   2432  1.260     skrll 			return -1;
   2433    1.1  augustss 		}
   2434    1.1  augustss 		memset(buf, 0, len); /* ? XXX */
   2435    1.1  augustss 		totlen = len;
   2436    1.1  augustss 		break;
   2437    1.1  augustss 	case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
   2438  1.274  pgoyette 		DPRINTFN(8, "get port status i=%jd", index, 0, 0, 0);
   2439    1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2440  1.260     skrll 			return -1;
   2441    1.1  augustss 		}
   2442    1.1  augustss 		if (len != 4) {
   2443  1.260     skrll 			return -1;
   2444    1.1  augustss 		}
   2445    1.1  augustss 		v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
   2446  1.300  christos 		DPRINTFN(8, "port status=0x%04jx", v, 0, 0, 0);
   2447    1.1  augustss 		USETW(ps.wPortStatus, v);
   2448    1.1  augustss 		USETW(ps.wPortChange, v >> 16);
   2449  1.285  riastrad 		totlen = uimin(len, sizeof(ps));
   2450  1.260     skrll 		memcpy(buf, &ps, totlen);
   2451    1.1  augustss 		break;
   2452    1.1  augustss 	case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
   2453  1.260     skrll 		return -1;
   2454    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
   2455    1.1  augustss 		break;
   2456    1.1  augustss 	case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
   2457    1.1  augustss 		if (index < 1 || index > sc->sc_noport) {
   2458  1.260     skrll 			return -1;
   2459    1.1  augustss 		}
   2460    1.1  augustss 		port = OHCI_RH_PORT_STATUS(index);
   2461    1.1  augustss 		switch(value) {
   2462    1.1  augustss 		case UHF_PORT_ENABLE:
   2463    1.1  augustss 			OWRITE4(sc, port, UPS_PORT_ENABLED);
   2464    1.1  augustss 			break;
   2465    1.1  augustss 		case UHF_PORT_SUSPEND:
   2466    1.1  augustss 			OWRITE4(sc, port, UPS_SUSPEND);
   2467    1.1  augustss 			break;
   2468    1.1  augustss 		case UHF_PORT_RESET:
   2469  1.274  pgoyette 			DPRINTFN(5, "reset port %jd", index, 0, 0, 0);
   2470    1.1  augustss 			OWRITE4(sc, port, UPS_RESET);
   2471  1.110  augustss 			for (i = 0; i < 5; i++) {
   2472  1.110  augustss 				usb_delay_ms(&sc->sc_bus,
   2473  1.110  augustss 					     USB_PORT_ROOT_RESET_DELAY);
   2474  1.116  augustss 				if (sc->sc_dying) {
   2475  1.260     skrll 					return -1;
   2476  1.116  augustss 				}
   2477    1.1  augustss 				if ((OREAD4(sc, port) & UPS_RESET) == 0)
   2478    1.1  augustss 					break;
   2479    1.1  augustss 			}
   2480  1.300  christos 			DPRINTFN(8, "port %jd reset, status = 0x%04jx", index,
   2481  1.260     skrll 			    OREAD4(sc, port), 0, 0);
   2482    1.1  augustss 			break;
   2483    1.1  augustss 		case UHF_PORT_POWER:
   2484  1.274  pgoyette 			DPRINTFN(2, "set port power %jd", index, 0, 0, 0);
   2485    1.1  augustss 			OWRITE4(sc, port, UPS_PORT_POWER);
   2486    1.1  augustss 			break;
   2487    1.1  augustss 		default:
   2488  1.260     skrll 			return -1;
   2489    1.1  augustss 		}
   2490    1.1  augustss 		break;
   2491    1.1  augustss 	default:
   2492  1.260     skrll 		/* default from usbroothub */
   2493  1.260     skrll 		return buflen;
   2494    1.1  augustss 	}
   2495    1.1  augustss 
   2496  1.260     skrll 	return totlen;
   2497    1.1  augustss }
   2498    1.1  augustss 
   2499   1.82  augustss Static usbd_status
   2500  1.260     skrll ohci_root_intr_transfer(struct usbd_xfer *xfer)
   2501    1.1  augustss {
   2502  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2503   1.53  augustss 	usbd_status err;
   2504   1.17  augustss 
   2505   1.46  augustss 	/* Insert last in queue. */
   2506  1.224       mrg 	mutex_enter(&sc->sc_lock);
   2507   1.53  augustss 	err = usb_insert_transfer(xfer);
   2508  1.224       mrg 	mutex_exit(&sc->sc_lock);
   2509   1.53  augustss 	if (err)
   2510  1.260     skrll 		return err;
   2511   1.46  augustss 
   2512   1.46  augustss 	/* Pipe isn't running, start first */
   2513  1.260     skrll 	return ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2514   1.17  augustss }
   2515   1.17  augustss 
   2516   1.82  augustss Static usbd_status
   2517  1.260     skrll ohci_root_intr_start(struct usbd_xfer *xfer)
   2518   1.17  augustss {
   2519  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2520  1.287       mrg 	const bool polling = sc->sc_bus.ub_usepolling;
   2521    1.1  augustss 
   2522   1.83  augustss 	if (sc->sc_dying)
   2523  1.260     skrll 		return USBD_IOERROR;
   2524   1.83  augustss 
   2525  1.287       mrg 	if (!polling)
   2526  1.287       mrg 		mutex_enter(&sc->sc_lock);
   2527  1.224       mrg 	KASSERT(sc->sc_intrxfer == NULL);
   2528   1.53  augustss 	sc->sc_intrxfer = xfer;
   2529  1.295  riastrad 	xfer->ux_status = USBD_IN_PROGRESS;
   2530  1.287       mrg 	if (!polling)
   2531  1.287       mrg 		mutex_exit(&sc->sc_lock);
   2532    1.1  augustss 
   2533  1.295  riastrad 	return USBD_IN_PROGRESS;
   2534    1.1  augustss }
   2535    1.1  augustss 
   2536    1.3  augustss /* Abort a root interrupt request. */
   2537   1.82  augustss Static void
   2538  1.260     skrll ohci_root_intr_abort(struct usbd_xfer *xfer)
   2539    1.1  augustss {
   2540  1.294  riastrad 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2541  1.224       mrg 
   2542  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2543  1.260     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   2544   1.53  augustss 
   2545  1.294  riastrad 	/* If xfer has already completed, nothing to do here.  */
   2546  1.294  riastrad 	if (sc->sc_intrxfer == NULL)
   2547  1.294  riastrad 		return;
   2548  1.294  riastrad 
   2549  1.294  riastrad 	/*
   2550  1.294  riastrad 	 * Otherwise, sc->sc_intrxfer had better be this transfer.
   2551  1.294  riastrad 	 * Cancel it.
   2552  1.294  riastrad 	 */
   2553  1.294  riastrad 	KASSERT(sc->sc_intrxfer == xfer);
   2554  1.294  riastrad 	KASSERT(xfer->ux_status == USBD_IN_PROGRESS);
   2555  1.260     skrll 	xfer->ux_status = USBD_CANCELLED;
   2556   1.53  augustss 	usb_transfer_complete(xfer);
   2557    1.1  augustss }
   2558    1.1  augustss 
   2559    1.1  augustss /* Close the root pipe. */
   2560   1.82  augustss Static void
   2561  1.260     skrll ohci_root_intr_close(struct usbd_pipe *pipe)
   2562    1.1  augustss {
   2563  1.294  riastrad 	ohci_softc_t *sc __diagused = OHCI_PIPE2SC(pipe);
   2564  1.120  augustss 
   2565  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2566  1.224       mrg 
   2567  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2568   1.34  augustss 
   2569  1.294  riastrad 	/*
   2570  1.294  riastrad 	 * Caller must guarantee the xfer has completed first, by
   2571  1.294  riastrad 	 * closing the pipe only after normal completion or an abort.
   2572  1.294  riastrad 	 */
   2573  1.294  riastrad 	KASSERT(sc->sc_intrxfer == NULL);
   2574    1.1  augustss }
   2575    1.1  augustss 
   2576    1.1  augustss /************************/
   2577    1.1  augustss 
   2578  1.260     skrll int
   2579  1.260     skrll ohci_device_ctrl_init(struct usbd_xfer *xfer)
   2580  1.260     skrll {
   2581  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2582  1.260     skrll 	usb_device_request_t *req = &xfer->ux_request;
   2583  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2584  1.260     skrll 	ohci_soft_td_t *stat, *setup;
   2585  1.260     skrll 	int isread = req->bmRequestType & UT_READ;
   2586  1.260     skrll 	int len = xfer->ux_bufsize;
   2587  1.260     skrll 	int err = ENOMEM;
   2588  1.260     skrll 
   2589  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2590  1.260     skrll 
   2591  1.260     skrll 	setup = ohci_alloc_std(sc);
   2592  1.260     skrll 	if (setup == NULL) {
   2593  1.260     skrll 		goto bad1;
   2594  1.260     skrll 	}
   2595  1.260     skrll 	stat = ohci_alloc_std(sc);
   2596  1.260     skrll 	if (stat == NULL) {
   2597  1.260     skrll 		goto bad2;
   2598  1.260     skrll 	}
   2599  1.260     skrll 
   2600  1.260     skrll 	ox->ox_setup = setup;
   2601  1.260     skrll 	ox->ox_stat = stat;
   2602  1.260     skrll 	ox->ox_nstd = 0;
   2603  1.260     skrll 
   2604  1.260     skrll 	/* Set up data transaction */
   2605  1.260     skrll 	if (len != 0) {
   2606  1.260     skrll 		err = ohci_alloc_std_chain(sc, xfer, len, isread);
   2607  1.260     skrll 		if (err) {
   2608  1.260     skrll 			goto bad3;
   2609  1.260     skrll 		}
   2610  1.260     skrll 	}
   2611  1.260     skrll 	return 0;
   2612  1.260     skrll 
   2613  1.260     skrll  bad3:
   2614  1.260     skrll 	ohci_free_std(sc, stat);
   2615  1.260     skrll  bad2:
   2616  1.260     skrll 	ohci_free_std(sc, setup);
   2617  1.260     skrll  bad1:
   2618  1.260     skrll 	return err;
   2619  1.260     skrll }
   2620  1.260     skrll 
   2621  1.260     skrll void
   2622  1.260     skrll ohci_device_ctrl_fini(struct usbd_xfer *xfer)
   2623  1.260     skrll {
   2624  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2625  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2626  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2627  1.260     skrll 
   2628  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2629  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0);
   2630  1.260     skrll 
   2631  1.260     skrll 	mutex_enter(&sc->sc_lock);
   2632  1.260     skrll 	if (ox->ox_setup != opipe->tail.td) {
   2633  1.260     skrll 		ohci_free_std_locked(sc, ox->ox_setup);
   2634  1.260     skrll 	}
   2635  1.260     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   2636  1.260     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
   2637  1.260     skrll 		if (std == NULL)
   2638  1.260     skrll 			break;
   2639  1.260     skrll 		ohci_free_std_locked(sc, std);
   2640  1.260     skrll 	}
   2641  1.260     skrll 	ohci_free_std_locked(sc, ox->ox_stat);
   2642  1.260     skrll 	mutex_exit(&sc->sc_lock);
   2643  1.260     skrll 
   2644  1.260     skrll 	if (ox->ox_nstd) {
   2645  1.260     skrll 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   2646  1.260     skrll 		kmem_free(ox->ox_stds, sz);
   2647  1.260     skrll 	}
   2648  1.260     skrll }
   2649  1.260     skrll 
   2650   1.82  augustss Static usbd_status
   2651  1.260     skrll ohci_device_ctrl_transfer(struct usbd_xfer *xfer)
   2652    1.1  augustss {
   2653  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2654   1.53  augustss 	usbd_status err;
   2655   1.17  augustss 
   2656   1.46  augustss 	/* Insert last in queue. */
   2657  1.224       mrg 	mutex_enter(&sc->sc_lock);
   2658   1.53  augustss 	err = usb_insert_transfer(xfer);
   2659  1.224       mrg 	mutex_exit(&sc->sc_lock);
   2660   1.53  augustss 	if (err)
   2661  1.260     skrll 		return err;
   2662   1.46  augustss 
   2663   1.46  augustss 	/* Pipe isn't running, start first */
   2664  1.260     skrll 	return ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2665   1.17  augustss }
   2666   1.17  augustss 
   2667   1.82  augustss Static usbd_status
   2668  1.260     skrll ohci_device_ctrl_start(struct usbd_xfer *xfer)
   2669   1.17  augustss {
   2670  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2671  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2672  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2673  1.260     skrll 	usb_device_request_t *req = &xfer->ux_request;
   2674  1.260     skrll 	struct usbd_device *dev __diagused = opipe->pipe.up_dev;
   2675  1.260     skrll 	ohci_soft_td_t *setup, *stat, *next, *tail;
   2676  1.260     skrll 	ohci_soft_ed_t *sed;
   2677  1.260     skrll 	int isread;
   2678  1.260     skrll 	int len;
   2679  1.287       mrg 	const bool polling = sc->sc_bus.ub_usepolling;
   2680  1.260     skrll 
   2681  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2682    1.1  augustss 
   2683   1.83  augustss 	if (sc->sc_dying)
   2684  1.260     skrll 		return USBD_IOERROR;
   2685  1.260     skrll 
   2686  1.260     skrll 	KASSERT(xfer->ux_rqflags & URQ_REQUEST);
   2687  1.260     skrll 
   2688  1.260     skrll 	isread = req->bmRequestType & UT_READ;
   2689  1.260     skrll 	len = UGETW(req->wLength);
   2690  1.260     skrll 
   2691  1.274  pgoyette 	DPRINTF("xfer=%#jx len=%jd, addr=%jd, endpt=%jd", (uintptr_t)xfer, len,
   2692  1.274  pgoyette 	    dev->ud_addr, opipe->pipe.up_endpoint->ue_edesc->bEndpointAddress);
   2693  1.300  christos 	DPRINTF("type=0x%02jx, request=0x%02jx, wValue=0x%04jx, wIndex=0x%04jx",
   2694  1.260     skrll 	    req->bmRequestType, req->bRequest, UGETW(req->wValue),
   2695  1.260     skrll 	    UGETW(req->wIndex));
   2696  1.260     skrll 
   2697  1.260     skrll 	/* Need to take lock here for pipe->tail.td */
   2698  1.287       mrg 	if (!polling)
   2699  1.287       mrg 		mutex_enter(&sc->sc_lock);
   2700  1.260     skrll 
   2701  1.260     skrll 	/*
   2702  1.260     skrll 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   2703  1.260     skrll 	 * next transfer
   2704  1.260     skrll 	 */
   2705  1.260     skrll 	setup = opipe->tail.td;
   2706  1.260     skrll 	opipe->tail.td = ox->ox_setup;
   2707  1.260     skrll 	ox->ox_setup = setup;
   2708  1.260     skrll 
   2709  1.260     skrll 	stat = ox->ox_stat;
   2710  1.260     skrll 
   2711  1.260     skrll 	/* point at sentinel */
   2712  1.260     skrll 	tail = opipe->tail.td;
   2713  1.260     skrll 	sed = opipe->sed;
   2714  1.260     skrll 
   2715  1.260     skrll 	KASSERTMSG(OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)) == dev->ud_addr,
   2716  1.260     skrll 	    "address ED %d pipe %d\n",
   2717  1.260     skrll 	    OHCI_ED_GET_FA(O32TOH(sed->ed.ed_flags)), dev->ud_addr);
   2718  1.260     skrll 	KASSERTMSG(OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)) ==
   2719  1.260     skrll 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize),
   2720  1.260     skrll 	    "MPL ED %d pipe %d\n",
   2721  1.260     skrll 	    OHCI_ED_GET_MAXP(O32TOH(sed->ed.ed_flags)),
   2722  1.260     skrll 	    UGETW(opipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize));
   2723  1.260     skrll 
   2724  1.260     skrll 	/* next will point to data if len != 0 */
   2725  1.260     skrll 	next = stat;
   2726  1.260     skrll 
   2727  1.260     skrll 	/* Set up data transaction */
   2728  1.260     skrll 	if (len != 0) {
   2729  1.260     skrll 		ohci_soft_td_t *std;
   2730  1.260     skrll 		ohci_soft_td_t *end;
   2731  1.260     skrll 
   2732  1.260     skrll 		next = ox->ox_stds[0];
   2733  1.260     skrll 		ohci_reset_std_chain(sc, xfer, len, isread, next, &end);
   2734  1.260     skrll 
   2735  1.260     skrll 		end->td.td_nexttd = HTOO32(stat->physaddr);
   2736  1.260     skrll 		end->nexttd = stat;
   2737  1.260     skrll 
   2738  1.273     skrll 		usb_syncmem(&end->dma, end->offs, sizeof(end->td),
   2739  1.260     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2740  1.260     skrll 
   2741  1.260     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, len,
   2742  1.260     skrll 		    isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   2743  1.260     skrll 		std = ox->ox_stds[0];
   2744  1.260     skrll 		/* Start toggle at 1 and then use the carried toggle. */
   2745  1.260     skrll 		std->td.td_flags &= HTOO32(~OHCI_TD_TOGGLE_MASK);
   2746  1.260     skrll 		std->td.td_flags |= HTOO32(OHCI_TD_TOGGLE_1);
   2747  1.260     skrll 		usb_syncmem(&std->dma,
   2748  1.260     skrll 		    std->offs + offsetof(ohci_td_t, td_flags),
   2749  1.260     skrll 		    sizeof(std->td.td_flags),
   2750  1.260     skrll 		    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2751  1.260     skrll 	}
   2752  1.260     skrll 
   2753  1.274  pgoyette 	DPRINTFN(8, "setup %#jx data %#jx stat %#jx tail %#jx",
   2754  1.274  pgoyette 	    (uintptr_t)setup,
   2755  1.274  pgoyette 	    (uintptr_t)(len != 0 ? ox->ox_stds[0] : NULL), (uintptr_t)stat,
   2756  1.274  pgoyette 	    (uintptr_t)tail);
   2757  1.260     skrll 	KASSERT(opipe->tail.td == tail);
   2758  1.260     skrll 
   2759  1.260     skrll 	memcpy(KERNADDR(&opipe->ctrl.reqdma, 0), req, sizeof(*req));
   2760  1.260     skrll 	usb_syncmem(&opipe->ctrl.reqdma, 0, sizeof(*req), BUS_DMASYNC_PREWRITE);
   2761   1.83  augustss 
   2762  1.260     skrll 	setup->td.td_flags = HTOO32(OHCI_TD_SETUP | OHCI_TD_NOCC |
   2763  1.260     skrll 				     OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
   2764  1.260     skrll 	setup->td.td_cbp = HTOO32(DMAADDR(&opipe->ctrl.reqdma, 0));
   2765  1.260     skrll 	setup->td.td_nexttd = HTOO32(next->physaddr);
   2766  1.260     skrll 	setup->td.td_be = HTOO32(O32TOH(setup->td.td_cbp) + sizeof(*req) - 1);
   2767  1.260     skrll 	setup->nexttd = next;
   2768  1.260     skrll 	setup->len = 0;
   2769  1.260     skrll 	setup->xfer = xfer;
   2770  1.260     skrll 	setup->flags = 0;
   2771  1.260     skrll 	ohci_hash_add_td(sc, setup);
   2772  1.260     skrll 
   2773  1.260     skrll 	xfer->ux_hcpriv = setup;
   2774  1.260     skrll 	usb_syncmem(&setup->dma, setup->offs, sizeof(setup->td),
   2775  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2776  1.260     skrll 
   2777  1.260     skrll 	stat->td.td_flags = HTOO32(
   2778  1.260     skrll 		(isread ? OHCI_TD_OUT : OHCI_TD_IN) |
   2779  1.260     skrll 		OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
   2780  1.260     skrll 	stat->td.td_cbp = 0;
   2781  1.260     skrll 	stat->td.td_nexttd = HTOO32(tail->physaddr);
   2782  1.260     skrll 	stat->td.td_be = 0;
   2783  1.260     skrll 	stat->nexttd = tail;
   2784  1.260     skrll 	stat->flags = OHCI_CALL_DONE;
   2785  1.260     skrll 	stat->len = 0;
   2786  1.260     skrll 	stat->xfer = xfer;
   2787  1.260     skrll 	ohci_hash_add_td(sc, stat);
   2788  1.260     skrll 
   2789  1.260     skrll 	usb_syncmem(&stat->dma, stat->offs, sizeof(stat->td),
   2790  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2791  1.260     skrll 
   2792  1.260     skrll 	memset(&tail->td, 0, sizeof(tail->td));
   2793  1.260     skrll 	tail->nexttd = NULL;
   2794  1.260     skrll 	tail->xfer = NULL;
   2795  1.260     skrll 
   2796  1.260     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   2797  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2798  1.260     skrll 
   2799  1.260     skrll #ifdef OHCI_DEBUG
   2800  1.260     skrll 	USBHIST_LOGN(ohcidebug, 5, "--- dump start ---", 0, 0, 0, 0);
   2801  1.260     skrll 	if (ohcidebug >= 5) {
   2802  1.260     skrll 		ohci_dump_ed(sc, sed);
   2803  1.260     skrll 		ohci_dump_tds(sc, setup);
   2804    1.1  augustss 	}
   2805  1.260     skrll 	USBHIST_LOGN(ohcidebug, 5, "--- dump end ---", 0, 0, 0, 0);
   2806   1.42  augustss #endif
   2807    1.1  augustss 
   2808  1.260     skrll 	/* Insert ED in schedule */
   2809  1.260     skrll 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   2810  1.260     skrll 	usb_syncmem(&sed->dma,
   2811  1.260     skrll 	    sed->offs + offsetof(ohci_ed_t, ed_tailp),
   2812  1.260     skrll 	    sizeof(sed->ed.ed_tailp),
   2813  1.260     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2814  1.260     skrll 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
   2815  1.293  riastrad 	usbd_xfer_schedule_timeout(xfer);
   2816  1.260     skrll 
   2817  1.260     skrll 	DPRINTF("done", 0, 0, 0, 0);
   2818  1.260     skrll 
   2819  1.282       mrg 	xfer->ux_status = USBD_IN_PROGRESS;
   2820  1.287       mrg 	if (!polling)
   2821  1.287       mrg 		mutex_exit(&sc->sc_lock);
   2822    1.1  augustss 
   2823  1.260     skrll 	return USBD_IN_PROGRESS;
   2824    1.1  augustss }
   2825    1.1  augustss 
   2826    1.1  augustss /* Abort a device control request. */
   2827   1.82  augustss Static void
   2828  1.260     skrll ohci_device_ctrl_abort(struct usbd_xfer *xfer)
   2829    1.1  augustss {
   2830  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   2831  1.224       mrg 
   2832  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2833  1.224       mrg 
   2834  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2835  1.274  pgoyette 	DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   2836  1.293  riastrad 	usbd_xfer_abort(xfer);
   2837    1.1  augustss }
   2838    1.1  augustss 
   2839    1.1  augustss /* Close a device control pipe. */
   2840   1.82  augustss Static void
   2841  1.260     skrll ohci_device_ctrl_close(struct usbd_pipe *pipe)
   2842    1.1  augustss {
   2843  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2844  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2845    1.1  augustss 
   2846  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   2847  1.224       mrg 
   2848  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2849  1.274  pgoyette 	DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0);
   2850   1.34  augustss 	ohci_close_pipe(pipe, sc->sc_ctrl_head);
   2851  1.260     skrll 	ohci_free_std_locked(sc, opipe->tail.td);
   2852  1.296     skrll 
   2853  1.296     skrll 	usb_freemem(&sc->sc_bus, &opipe->ctrl.reqdma);
   2854    1.3  augustss }
   2855    1.3  augustss 
   2856    1.3  augustss /************************/
   2857   1.37  augustss 
   2858   1.82  augustss Static void
   2859  1.260     skrll ohci_device_clear_toggle(struct usbd_pipe *pipe)
   2860   1.37  augustss {
   2861  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   2862  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   2863   1.37  augustss 
   2864  1.168  augustss 	opipe->sed->ed.ed_headp &= HTOO32(~OHCI_TOGGLECARRY);
   2865   1.37  augustss }
   2866   1.37  augustss 
   2867   1.82  augustss Static void
   2868  1.260     skrll ohci_noop(struct usbd_pipe *pipe)
   2869   1.37  augustss {
   2870   1.37  augustss }
   2871    1.3  augustss 
   2872  1.260     skrll Static int
   2873  1.260     skrll ohci_device_bulk_init(struct usbd_xfer *xfer)
   2874  1.260     skrll {
   2875  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2876  1.260     skrll 	int len = xfer->ux_bufsize;
   2877  1.281      maya 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   2878  1.260     skrll 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2879  1.260     skrll 	int err;
   2880  1.260     skrll 
   2881  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2882  1.260     skrll 
   2883  1.260     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2884  1.260     skrll 
   2885  1.274  pgoyette 	DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer,
   2886  1.274  pgoyette 	    len, isread, xfer->ux_flags);
   2887  1.274  pgoyette 	DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0);
   2888  1.260     skrll 
   2889  1.260     skrll 	/* Allocate a chain of new TDs (including a new tail). */
   2890  1.260     skrll 	err = ohci_alloc_std_chain(sc, xfer, len, isread);
   2891  1.260     skrll 	if (err)
   2892  1.260     skrll 		return err;
   2893  1.260     skrll 
   2894  1.260     skrll 	return 0;
   2895  1.260     skrll }
   2896  1.260     skrll 
   2897  1.260     skrll Static void
   2898  1.260     skrll ohci_device_bulk_fini(struct usbd_xfer *xfer)
   2899  1.260     skrll {
   2900  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2901  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2902  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2903  1.260     skrll 
   2904  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2905  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0);
   2906  1.260     skrll 
   2907  1.260     skrll 	mutex_enter(&sc->sc_lock);
   2908  1.260     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   2909  1.260     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
   2910  1.260     skrll 		if (std == NULL)
   2911  1.260     skrll 			break;
   2912  1.260     skrll 		if (std != opipe->tail.td)
   2913  1.260     skrll 			ohci_free_std_locked(sc, std);
   2914  1.260     skrll 	}
   2915  1.260     skrll 	mutex_exit(&sc->sc_lock);
   2916  1.260     skrll 
   2917  1.260     skrll 	if (ox->ox_nstd) {
   2918  1.260     skrll 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   2919  1.260     skrll 		kmem_free(ox->ox_stds, sz);
   2920  1.260     skrll 	}
   2921  1.260     skrll }
   2922  1.260     skrll 
   2923   1.82  augustss Static usbd_status
   2924  1.260     skrll ohci_device_bulk_transfer(struct usbd_xfer *xfer)
   2925    1.3  augustss {
   2926  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2927   1.53  augustss 	usbd_status err;
   2928   1.17  augustss 
   2929   1.46  augustss 	/* Insert last in queue. */
   2930  1.224       mrg 	mutex_enter(&sc->sc_lock);
   2931   1.53  augustss 	err = usb_insert_transfer(xfer);
   2932  1.224       mrg 	mutex_exit(&sc->sc_lock);
   2933   1.53  augustss 	if (err)
   2934  1.260     skrll 		return err;
   2935   1.46  augustss 
   2936   1.46  augustss 	/* Pipe isn't running, start first */
   2937  1.260     skrll 	return ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   2938   1.17  augustss }
   2939   1.17  augustss 
   2940   1.82  augustss Static usbd_status
   2941  1.260     skrll ohci_device_bulk_start(struct usbd_xfer *xfer)
   2942   1.17  augustss {
   2943  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   2944  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   2945  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   2946  1.260     skrll 	ohci_soft_td_t *last;
   2947   1.48  augustss 	ohci_soft_td_t *data, *tail, *tdp;
   2948    1.3  augustss 	ohci_soft_ed_t *sed;
   2949  1.224       mrg 	int len, isread, endpt;
   2950  1.287       mrg 	const bool polling = sc->sc_bus.ub_usepolling;
   2951  1.260     skrll 
   2952  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   2953    1.3  augustss 
   2954   1.83  augustss 	if (sc->sc_dying)
   2955  1.260     skrll 		return USBD_IOERROR;
   2956   1.83  augustss 
   2957  1.260     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   2958  1.224       mrg 
   2959  1.260     skrll 	len = xfer->ux_length;
   2960  1.260     skrll 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   2961   1.40  augustss 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   2962    1.3  augustss 	sed = opipe->sed;
   2963    1.3  augustss 
   2964  1.274  pgoyette 	DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer,
   2965  1.274  pgoyette 	    len, isread, xfer->ux_flags);
   2966  1.274  pgoyette 	DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0);
   2967   1.34  augustss 
   2968  1.287       mrg 	if (!polling)
   2969  1.287       mrg 		mutex_enter(&sc->sc_lock);
   2970    1.3  augustss 
   2971  1.260     skrll 	/*
   2972  1.260     skrll 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   2973  1.260     skrll 	 * next transfer
   2974  1.260     skrll 	 */
   2975  1.260     skrll 	data = opipe->tail.td;
   2976  1.260     skrll 	opipe->tail.td = ox->ox_stds[0];
   2977  1.260     skrll 	ox->ox_stds[0] = data;
   2978  1.260     skrll 	ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
   2979  1.260     skrll 
   2980  1.260     skrll 	/* point at sentinel */
   2981  1.260     skrll 	tail = opipe->tail.td;
   2982  1.260     skrll 	memset(&tail->td, 0, sizeof(tail->td));
   2983  1.260     skrll 	tail->nexttd = NULL;
   2984  1.260     skrll 	tail->xfer = NULL;
   2985  1.260     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   2986  1.273     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   2987  1.260     skrll 	xfer->ux_hcpriv = data;
   2988    1.3  augustss 
   2989  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx data %#jx tail %#jx", (uintptr_t)xfer,
   2990  1.274  pgoyette 	    (uintptr_t)ox->ox_stds[0], (uintptr_t)tail, 0);
   2991  1.260     skrll 	KASSERT(opipe->tail.td == tail);
   2992  1.258     skrll 
   2993   1.77  augustss 	/* We want interrupt at the end of the transfer. */
   2994  1.260     skrll 	last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   2995  1.260     skrll 	last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   2996  1.260     skrll 	last->td.td_nexttd = HTOO32(tail->physaddr);
   2997  1.260     skrll 	last->nexttd = tail;
   2998  1.260     skrll 	last->flags |= OHCI_CALL_DONE;
   2999  1.260     skrll 	usb_syncmem(&last->dma, last->offs, sizeof(last->td),
   3000  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3001    1.3  augustss 
   3002  1.300  christos 	DPRINTFN(4, "ed_flags=0x%08jx td_flags=0x%08jx "
   3003  1.300  christos 		    "td_cbp=0x%08jx td_be=0x%08jx",
   3004  1.168  augustss 		    (int)O32TOH(sed->ed.ed_flags),
   3005  1.168  augustss 		    (int)O32TOH(data->td.td_flags),
   3006  1.168  augustss 		    (int)O32TOH(data->td.td_cbp),
   3007  1.260     skrll 		    (int)O32TOH(data->td.td_be));
   3008   1.34  augustss 
   3009   1.52  augustss #ifdef OHCI_DEBUG
   3010  1.260     skrll 	DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
   3011  1.260     skrll 	if (ohcidebug >= 5) {
   3012  1.168  augustss 		ohci_dump_ed(sc, sed);
   3013  1.168  augustss 		ohci_dump_tds(sc, data);
   3014   1.34  augustss 	}
   3015  1.260     skrll 	DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
   3016   1.34  augustss #endif
   3017   1.34  augustss 
   3018    1.3  augustss 	/* Insert ED in schedule */
   3019   1.48  augustss 	for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
   3020  1.260     skrll 		KASSERT(tdp->xfer == xfer);
   3021   1.48  augustss 	}
   3022  1.260     skrll 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3023  1.260     skrll 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3024  1.168  augustss 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3025  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3026  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3027  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3028    1.3  augustss 	OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
   3029  1.293  riastrad 	usbd_xfer_schedule_timeout(xfer);
   3030  1.282       mrg 	xfer->ux_status = USBD_IN_PROGRESS;
   3031  1.287       mrg 	if (!polling)
   3032  1.287       mrg 		mutex_exit(&sc->sc_lock);
   3033   1.34  augustss 
   3034  1.260     skrll 	return USBD_IN_PROGRESS;
   3035    1.3  augustss }
   3036    1.3  augustss 
   3037   1.82  augustss Static void
   3038  1.260     skrll ohci_device_bulk_abort(struct usbd_xfer *xfer)
   3039    1.3  augustss {
   3040  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   3041  1.260     skrll 
   3042  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3043  1.224       mrg 
   3044  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3045  1.224       mrg 
   3046  1.274  pgoyette 	DPRINTF("xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3047  1.293  riastrad 	usbd_xfer_abort(xfer);
   3048    1.3  augustss }
   3049    1.3  augustss 
   3050  1.120  augustss /*
   3051   1.34  augustss  * Close a device bulk pipe.
   3052   1.34  augustss  */
   3053   1.82  augustss Static void
   3054  1.260     skrll ohci_device_bulk_close(struct usbd_pipe *pipe)
   3055    1.3  augustss {
   3056  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3057  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3058    1.3  augustss 
   3059  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3060  1.224       mrg 
   3061  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3062  1.260     skrll 
   3063  1.274  pgoyette 	DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0);
   3064   1.34  augustss 	ohci_close_pipe(pipe, sc->sc_bulk_head);
   3065  1.260     skrll 	ohci_free_std_locked(sc, opipe->tail.td);
   3066    1.1  augustss }
   3067    1.1  augustss 
   3068    1.1  augustss /************************/
   3069    1.1  augustss 
   3070  1.260     skrll Static int
   3071  1.260     skrll ohci_device_intr_init(struct usbd_xfer *xfer)
   3072  1.260     skrll {
   3073  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3074  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3075  1.260     skrll 	int len = xfer->ux_bufsize;
   3076  1.281      maya 	int endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3077  1.260     skrll 	int isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3078  1.260     skrll 	int err;
   3079  1.260     skrll 
   3080  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3081  1.260     skrll 
   3082  1.260     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3083  1.260     skrll 	KASSERT(len != 0);
   3084  1.260     skrll 
   3085  1.274  pgoyette 	DPRINTFN(4, "xfer=%#jx len=%jd isread=%jd flags=%jd", (uintptr_t)xfer,
   3086  1.274  pgoyette 	    len, isread, xfer->ux_flags);
   3087  1.274  pgoyette 	DPRINTFN(4, "endpt=%jd", endpt, 0, 0, 0);
   3088  1.260     skrll 
   3089  1.260     skrll 	ox->ox_nstd = 0;
   3090  1.260     skrll 
   3091  1.260     skrll 	err = ohci_alloc_std_chain(sc, xfer, len, isread);
   3092  1.260     skrll 	if (err) {
   3093  1.260     skrll 		return err;
   3094  1.260     skrll 	}
   3095  1.260     skrll 
   3096  1.260     skrll 	return 0;
   3097  1.260     skrll }
   3098  1.260     skrll 
   3099  1.260     skrll Static void
   3100  1.260     skrll ohci_device_intr_fini(struct usbd_xfer *xfer)
   3101  1.260     skrll {
   3102  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3103  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3104  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3105  1.260     skrll 
   3106  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3107  1.274  pgoyette 	DPRINTFN(8, "xfer %#jx nstd %jd", (uintptr_t)xfer, ox->ox_nstd, 0, 0);
   3108  1.260     skrll 
   3109  1.260     skrll 	mutex_enter(&sc->sc_lock);
   3110  1.260     skrll 	for (size_t i = 0; i < ox->ox_nstd; i++) {
   3111  1.260     skrll 		ohci_soft_td_t *std = ox->ox_stds[i];
   3112  1.260     skrll 		if (std != NULL)
   3113  1.260     skrll 			break;
   3114  1.260     skrll 		if (std != opipe->tail.td)
   3115  1.260     skrll 			ohci_free_std_locked(sc, std);
   3116  1.260     skrll 	}
   3117  1.260     skrll 	mutex_exit(&sc->sc_lock);
   3118  1.260     skrll 
   3119  1.260     skrll 	if (ox->ox_nstd) {
   3120  1.260     skrll 		const size_t sz = sizeof(ohci_soft_td_t *) * ox->ox_nstd;
   3121  1.260     skrll 		kmem_free(ox->ox_stds, sz);
   3122  1.260     skrll 	}
   3123  1.260     skrll }
   3124  1.260     skrll 
   3125   1.82  augustss Static usbd_status
   3126  1.260     skrll ohci_device_intr_transfer(struct usbd_xfer *xfer)
   3127   1.17  augustss {
   3128  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3129   1.53  augustss 	usbd_status err;
   3130   1.17  augustss 
   3131   1.46  augustss 	/* Insert last in queue. */
   3132  1.224       mrg 	mutex_enter(&sc->sc_lock);
   3133   1.53  augustss 	err = usb_insert_transfer(xfer);
   3134  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3135   1.53  augustss 	if (err)
   3136  1.260     skrll 		return err;
   3137   1.46  augustss 
   3138   1.46  augustss 	/* Pipe isn't running, start first */
   3139  1.260     skrll 	return ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
   3140   1.17  augustss }
   3141   1.17  augustss 
   3142   1.82  augustss Static usbd_status
   3143  1.260     skrll ohci_device_intr_start(struct usbd_xfer *xfer)
   3144    1.1  augustss {
   3145  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3146  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3147  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3148    1.1  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   3149  1.260     skrll 	ohci_soft_td_t *data, *last, *tail;
   3150  1.224       mrg 	int len, isread, endpt;
   3151  1.287       mrg 	const bool polling = sc->sc_bus.ub_usepolling;
   3152    1.1  augustss 
   3153  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3154  1.260     skrll 
   3155   1.83  augustss 	if (sc->sc_dying)
   3156  1.260     skrll 		return USBD_IOERROR;
   3157   1.83  augustss 
   3158  1.274  pgoyette 	DPRINTFN(3, "xfer=%#jx len=%jd flags=%jd priv=%#jx", (uintptr_t)xfer,
   3159  1.274  pgoyette 	    xfer->ux_length, xfer->ux_flags, (uintptr_t)xfer->ux_priv);
   3160    1.1  augustss 
   3161  1.260     skrll 	KASSERT(!(xfer->ux_rqflags & URQ_REQUEST));
   3162    1.1  augustss 
   3163  1.260     skrll 	len = xfer->ux_length;
   3164  1.260     skrll 	endpt = xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress;
   3165  1.165     skrll 	isread = UE_GET_DIR(endpt) == UE_DIR_IN;
   3166    1.1  augustss 
   3167  1.287       mrg 	if (!polling)
   3168  1.287       mrg 		mutex_enter(&sc->sc_lock);
   3169  1.260     skrll 
   3170  1.260     skrll 	/*
   3171  1.260     skrll 	 * Use the pipe "tail" TD as our first and loan our first TD to the
   3172  1.260     skrll 	 * next transfer.
   3173  1.260     skrll 	 */
   3174   1.60  augustss 	data = opipe->tail.td;
   3175  1.260     skrll 	opipe->tail.td = ox->ox_stds[0];
   3176  1.260     skrll 	ox->ox_stds[0] = data;
   3177  1.260     skrll 	ohci_reset_std_chain(sc, xfer, len, isread, data, &last);
   3178  1.260     skrll 
   3179  1.260     skrll 	/* point at sentinel */
   3180  1.260     skrll 	tail = opipe->tail.td;
   3181  1.260     skrll 	memset(&tail->td, 0, sizeof(tail->td));
   3182  1.260     skrll 	tail->nexttd = NULL;
   3183   1.53  augustss 	tail->xfer = NULL;
   3184  1.260     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->td),
   3185  1.273     skrll 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3186  1.260     skrll 	xfer->ux_hcpriv = data;
   3187  1.260     skrll 
   3188  1.274  pgoyette 	DPRINTFN(8, "data %#jx tail %#jx", (uintptr_t)ox->ox_stds[0],
   3189  1.274  pgoyette 	    (uintptr_t)tail, 0, 0);
   3190  1.260     skrll 	KASSERT(opipe->tail.td == tail);
   3191  1.260     skrll 
   3192  1.260     skrll 	/* We want interrupt at the end of the transfer. */
   3193  1.260     skrll 	last->td.td_flags &= HTOO32(~OHCI_TD_INTR_MASK);
   3194  1.260     skrll 	last->td.td_flags |= HTOO32(OHCI_TD_SET_DI(1));
   3195    1.1  augustss 
   3196  1.260     skrll 	last->td.td_nexttd = HTOO32(tail->physaddr);
   3197  1.260     skrll 	last->nexttd = tail;
   3198  1.260     skrll 	last->flags |= OHCI_CALL_DONE;
   3199  1.260     skrll 	usb_syncmem(&last->dma, last->offs, sizeof(last->td),
   3200  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3201    1.1  augustss 
   3202   1.52  augustss #ifdef OHCI_DEBUG
   3203  1.260     skrll 	DPRINTFN(5, "--- dump start ---", 0, 0, 0, 0);
   3204  1.260     skrll 	if (ohcidebug >= 5) {
   3205  1.168  augustss 		ohci_dump_ed(sc, sed);
   3206  1.168  augustss 		ohci_dump_tds(sc, data);
   3207    1.1  augustss 	}
   3208  1.260     skrll 	DPRINTFN(5, "--- dump end ---", 0, 0, 0, 0);
   3209    1.1  augustss #endif
   3210    1.1  augustss 
   3211    1.1  augustss 	/* Insert ED in schedule */
   3212  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3213  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3214  1.168  augustss 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3215  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3216  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3217  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3218    1.1  augustss 
   3219  1.282       mrg 	xfer->ux_status = USBD_IN_PROGRESS;
   3220  1.287       mrg 	if (!polling)
   3221  1.287       mrg 		mutex_exit(&sc->sc_lock);
   3222    1.1  augustss 
   3223  1.260     skrll 	return USBD_IN_PROGRESS;
   3224    1.1  augustss }
   3225    1.1  augustss 
   3226  1.227     skrll /* Abort a device interrupt request. */
   3227   1.82  augustss Static void
   3228  1.260     skrll ohci_device_intr_abort(struct usbd_xfer *xfer)
   3229    1.1  augustss {
   3230  1.260     skrll 	ohci_softc_t *sc __diagused = OHCI_XFER2SC(xfer);
   3231  1.224       mrg 
   3232  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3233  1.260     skrll 	KASSERT(xfer->ux_pipe->up_intrxfer == xfer);
   3234  1.224       mrg 
   3235  1.293  riastrad 	usbd_xfer_abort(xfer);
   3236    1.1  augustss }
   3237    1.1  augustss 
   3238    1.1  augustss /* Close a device interrupt pipe. */
   3239   1.82  augustss Static void
   3240  1.260     skrll ohci_device_intr_close(struct usbd_pipe *pipe)
   3241    1.1  augustss {
   3242  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3243  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3244  1.260     skrll 	int nslots = opipe->intr.nslots;
   3245  1.260     skrll 	int pos = opipe->intr.pos;
   3246    1.1  augustss 	int j;
   3247    1.1  augustss 	ohci_soft_ed_t *p, *sed = opipe->sed;
   3248  1.224       mrg 
   3249  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3250  1.260     skrll 
   3251  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3252    1.1  augustss 
   3253  1.274  pgoyette 	DPRINTFN(1, "pipe=%#jx nslots=%jd pos=%jd", (uintptr_t)pipe, nslots,
   3254  1.274  pgoyette 	    pos, 0);
   3255  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs,
   3256  1.195    bouyer 	    sizeof(sed->ed), BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3257  1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP);
   3258  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3259  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3260  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3261  1.168  augustss 	if ((O32TOH(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
   3262  1.168  augustss 	    (O32TOH(sed->ed.ed_headp) & OHCI_HEADMASK))
   3263  1.224       mrg 		usb_delay_ms_locked(&sc->sc_bus, 2, &sc->sc_lock);
   3264    1.1  augustss 
   3265    1.1  augustss 	for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
   3266  1.172  christos 		continue;
   3267  1.260     skrll 	KASSERT(p);
   3268  1.173  christos 	p->next = sed->next;
   3269  1.173  christos 	p->ed.ed_nexted = sed->ed.ed_nexted;
   3270  1.195    bouyer 	usb_syncmem(&p->dma, p->offs + offsetof(ohci_ed_t, ed_nexted),
   3271  1.195    bouyer 	    sizeof(p->ed.ed_nexted),
   3272  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3273    1.1  augustss 
   3274    1.1  augustss 	for (j = 0; j < nslots; j++)
   3275   1.31  wrstuden 		--sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
   3276    1.1  augustss 
   3277  1.260     skrll 	ohci_free_std_locked(sc, opipe->tail.td);
   3278  1.260     skrll 	ohci_free_sed_locked(sc, opipe->sed);
   3279    1.1  augustss }
   3280    1.1  augustss 
   3281   1.82  augustss Static usbd_status
   3282   1.91  augustss ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
   3283    1.1  augustss {
   3284  1.224       mrg 	int i, j, best;
   3285    1.1  augustss 	u_int npoll, slow, shigh, nslots;
   3286    1.1  augustss 	u_int bestbw, bw;
   3287    1.1  augustss 	ohci_soft_ed_t *hsed, *sed = opipe->sed;
   3288    1.1  augustss 
   3289  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3290  1.260     skrll 
   3291  1.274  pgoyette 	DPRINTFN(2, "pipe=%#jx", (uintptr_t)opipe, 0, 0, 0);
   3292    1.1  augustss 	if (ival == 0) {
   3293    1.1  augustss 		printf("ohci_setintr: 0 interval\n");
   3294  1.260     skrll 		return USBD_INVAL;
   3295    1.1  augustss 	}
   3296    1.1  augustss 
   3297    1.1  augustss 	npoll = OHCI_NO_INTRS;
   3298    1.1  augustss 	while (npoll > ival)
   3299    1.1  augustss 		npoll /= 2;
   3300  1.274  pgoyette 	DPRINTFN(2, "ival=%jd npoll=%jd", ival, npoll, 0, 0);
   3301    1.1  augustss 
   3302    1.1  augustss 	/*
   3303    1.1  augustss 	 * We now know which level in the tree the ED must go into.
   3304    1.1  augustss 	 * Figure out which slot has most bandwidth left over.
   3305    1.1  augustss 	 * Slots to examine:
   3306    1.1  augustss 	 * npoll
   3307    1.1  augustss 	 * 1	0
   3308    1.1  augustss 	 * 2	1 2
   3309    1.1  augustss 	 * 4	3 4 5 6
   3310    1.1  augustss 	 * 8	7 8 9 10 11 12 13 14
   3311    1.1  augustss 	 * N    (N-1) .. (N-1+N-1)
   3312    1.1  augustss 	 */
   3313    1.1  augustss 	slow = npoll-1;
   3314    1.1  augustss 	shigh = slow + npoll;
   3315    1.1  augustss 	nslots = OHCI_NO_INTRS / npoll;
   3316    1.1  augustss 	for (best = i = slow, bestbw = ~0; i < shigh; i++) {
   3317    1.1  augustss 		bw = 0;
   3318    1.1  augustss 		for (j = 0; j < nslots; j++)
   3319   1.28  augustss 			bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
   3320    1.1  augustss 		if (bw < bestbw) {
   3321    1.1  augustss 			best = i;
   3322    1.1  augustss 			bestbw = bw;
   3323    1.1  augustss 		}
   3324    1.1  augustss 	}
   3325  1.274  pgoyette 	DPRINTFN(2, "best=%jd(%jd..%jd) bestbw=%jd", best, slow, shigh, bestbw);
   3326    1.1  augustss 
   3327  1.224       mrg 	mutex_enter(&sc->sc_lock);
   3328    1.1  augustss 	hsed = sc->sc_eds[best];
   3329    1.1  augustss 	sed->next = hsed->next;
   3330  1.195    bouyer 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3331  1.195    bouyer 	    sizeof(hsed->ed.ed_flags),
   3332  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3333   1.39  augustss 	sed->ed.ed_nexted = hsed->ed.ed_nexted;
   3334  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3335  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3336  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3337    1.1  augustss 	hsed->next = sed;
   3338  1.168  augustss 	hsed->ed.ed_nexted = HTOO32(sed->physaddr);
   3339  1.195    bouyer 	usb_syncmem(&hsed->dma, hsed->offs + offsetof(ohci_ed_t, ed_flags),
   3340  1.195    bouyer 	    sizeof(hsed->ed.ed_flags),
   3341  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3342  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3343    1.1  augustss 
   3344    1.1  augustss 	for (j = 0; j < nslots; j++)
   3345   1.28  augustss 		++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
   3346  1.260     skrll 	opipe->intr.nslots = nslots;
   3347  1.260     skrll 	opipe->intr.pos = best;
   3348    1.1  augustss 
   3349  1.274  pgoyette 	DPRINTFN(5, "returns %#jx", (uintptr_t)opipe, 0, 0, 0);
   3350  1.260     skrll 	return USBD_NORMAL_COMPLETION;
   3351   1.60  augustss }
   3352   1.60  augustss 
   3353   1.60  augustss /***********************/
   3354   1.60  augustss 
   3355  1.260     skrll Static int
   3356  1.260     skrll ohci_device_isoc_init(struct usbd_xfer *xfer)
   3357  1.260     skrll {
   3358  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3359  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3360  1.260     skrll 	ohci_soft_itd_t *sitd;
   3361  1.260     skrll 	size_t i;
   3362  1.260     skrll 	int err;
   3363  1.260     skrll 
   3364  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3365  1.260     skrll 
   3366  1.274  pgoyette 	DPRINTFN(1, "xfer %#jx len %jd flags %jd", (uintptr_t)xfer,
   3367  1.274  pgoyette 	    xfer->ux_length, xfer->ux_flags, 0);
   3368  1.260     skrll 
   3369  1.298     skrll 	const size_t nfsitd = howmany(xfer->ux_nframes, OHCI_ITD_NOFFSET);
   3370  1.260     skrll 	const size_t nbsitd = xfer->ux_bufsize / OHCI_PAGE_SIZE;
   3371  1.260     skrll 	const size_t nsitd = MAX(nfsitd, nbsitd) + 1;
   3372  1.260     skrll 
   3373  1.260     skrll 	ox->ox_sitds = kmem_zalloc(sizeof(ohci_soft_itd_t *) * nsitd,
   3374  1.260     skrll 	    KM_SLEEP);
   3375  1.260     skrll 	ox->ox_nsitd = nsitd;
   3376  1.260     skrll 
   3377  1.260     skrll 	for (i = 0; i < nsitd; i++) {
   3378  1.260     skrll 		/* Allocate next ITD */
   3379  1.260     skrll 		sitd = ohci_alloc_sitd(sc);
   3380  1.260     skrll 		if (sitd == NULL) {
   3381  1.260     skrll 			err = ENOMEM;
   3382  1.260     skrll 			goto fail;
   3383  1.260     skrll 		}
   3384  1.260     skrll 		ox->ox_sitds[i] = sitd;
   3385  1.260     skrll 		sitd->xfer = xfer;
   3386  1.260     skrll 		sitd->flags = 0;
   3387  1.260     skrll 	}
   3388  1.260     skrll 
   3389  1.260     skrll 	return 0;
   3390  1.260     skrll fail:
   3391  1.260     skrll 	for (; i > 0;) {
   3392  1.260     skrll 		ohci_free_sitd(sc, ox->ox_sitds[--i]);
   3393  1.260     skrll 	}
   3394  1.260     skrll 	return err;
   3395  1.260     skrll }
   3396  1.260     skrll 
   3397  1.260     skrll Static void
   3398  1.260     skrll ohci_device_isoc_fini(struct usbd_xfer *xfer)
   3399  1.260     skrll {
   3400  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3401  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3402  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3403  1.260     skrll 
   3404  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3405  1.260     skrll 
   3406  1.260     skrll 	mutex_enter(&sc->sc_lock);
   3407  1.260     skrll 	for (size_t i = 0; i < ox->ox_nsitd; i++) {
   3408  1.260     skrll 		if (ox->ox_sitds[i] != opipe->tail.itd) {
   3409  1.260     skrll 			ohci_free_sitd_locked(sc, ox->ox_sitds[i]);
   3410  1.260     skrll 		}
   3411  1.260     skrll 	}
   3412  1.260     skrll 	mutex_exit(&sc->sc_lock);
   3413  1.260     skrll 
   3414  1.260     skrll 	if (ox->ox_nsitd) {
   3415  1.260     skrll 		const size_t sz = sizeof(ohci_soft_itd_t *) * ox->ox_nsitd;
   3416  1.260     skrll 		kmem_free(ox->ox_sitds, sz);
   3417  1.260     skrll 	}
   3418  1.260     skrll }
   3419  1.260     skrll 
   3420  1.260     skrll 
   3421   1.60  augustss usbd_status
   3422  1.260     skrll ohci_device_isoc_transfer(struct usbd_xfer *xfer)
   3423   1.60  augustss {
   3424  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3425  1.260     skrll 	usbd_status __diagused err;
   3426  1.260     skrll 
   3427  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3428   1.60  augustss 
   3429  1.274  pgoyette 	DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3430   1.60  augustss 
   3431   1.60  augustss 	/* Put it on our queue, */
   3432  1.224       mrg 	mutex_enter(&sc->sc_lock);
   3433   1.60  augustss 	err = usb_insert_transfer(xfer);
   3434  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3435   1.60  augustss 
   3436  1.260     skrll 	KASSERT(err == USBD_NORMAL_COMPLETION);
   3437   1.60  augustss 
   3438   1.60  augustss 	/* insert into schedule, */
   3439   1.60  augustss 	ohci_device_isoc_enter(xfer);
   3440   1.60  augustss 
   3441   1.83  augustss 	/* and start if the pipe wasn't running */
   3442  1.260     skrll 	return USBD_IN_PROGRESS;
   3443   1.60  augustss }
   3444   1.60  augustss 
   3445   1.60  augustss void
   3446  1.260     skrll ohci_device_isoc_enter(struct usbd_xfer *xfer)
   3447   1.60  augustss {
   3448  1.260     skrll 	struct ohci_xfer *ox = OHCI_XFER2OXFER(xfer);
   3449  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3450  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3451   1.61  augustss 	ohci_soft_ed_t *sed = opipe->sed;
   3452  1.260     skrll 	ohci_soft_itd_t *sitd, *nsitd, *tail;
   3453  1.308     skrll 	ohci_physaddr_t buf, offs, bp0, bp1;
   3454   1.61  augustss 	int i, ncur, nframes;
   3455  1.308     skrll 	size_t boff, frlen;
   3456   1.61  augustss 
   3457  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3458  1.274  pgoyette 	DPRINTFN(5, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3459  1.260     skrll 
   3460  1.260     skrll 	mutex_enter(&sc->sc_lock);
   3461   1.83  augustss 
   3462  1.260     skrll 	if (sc->sc_dying) {
   3463  1.260     skrll 		mutex_exit(&sc->sc_lock);
   3464   1.83  augustss 		return;
   3465  1.260     skrll 	}
   3466  1.260     skrll 
   3467  1.260     skrll 	struct isoc *isoc = &opipe->isoc;
   3468  1.260     skrll 
   3469  1.274  pgoyette 	DPRINTFN(1, "used=%jd next=%jd xfer=%#jx nframes=%jd",
   3470  1.274  pgoyette 	     isoc->inuse, isoc->next, (uintptr_t)xfer, xfer->ux_nframes);
   3471   1.83  augustss 
   3472  1.301     skrll 	int isread =
   3473  1.301     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   3474  1.301     skrll 
   3475  1.304     skrll 	if (xfer->ux_length)
   3476  1.305     skrll 		usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3477  1.304     skrll 		    isread ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   3478  1.301     skrll 
   3479  1.260     skrll 	if (isoc->next == -1) {
   3480   1.83  augustss 		/* Not in use yet, schedule it a few frames ahead. */
   3481  1.307  jakllsch 		usb_syncmem(&sc->sc_hccadma,
   3482  1.307  jakllsch 		    offsetof(struct ohci_hcca, hcca_frame_number),
   3483  1.307  jakllsch 		    sizeof(sc->sc_hcca->hcca_frame_number),
   3484  1.307  jakllsch 		    BUS_DMASYNC_POSTREAD);
   3485  1.260     skrll 		isoc->next = O32TOH(sc->sc_hcca->hcca_frame_number) + 5;
   3486  1.274  pgoyette 		DPRINTFN(2,"start next=%jd", isoc->next, 0, 0, 0);
   3487   1.83  augustss 	}
   3488   1.83  augustss 
   3489   1.61  augustss 	sitd = opipe->tail.itd;
   3490  1.260     skrll 	opipe->tail.itd = ox->ox_sitds[0];
   3491  1.260     skrll 	ox->ox_sitds[0] = sitd;
   3492  1.260     skrll 
   3493  1.308     skrll 	boff = 0;
   3494  1.260     skrll 	buf = DMAADDR(&xfer->ux_dmabuf, 0);
   3495  1.308     skrll 	bp0 = bp1 = OHCI_PAGE(buf);
   3496   1.83  augustss 	offs = OHCI_PAGE_OFFSET(buf);
   3497  1.308     skrll 
   3498  1.308     skrll 	ohci_physaddr_t end = bp0;	/* XXX stupid GCC */
   3499  1.308     skrll 
   3500  1.260     skrll 	nframes = xfer->ux_nframes;
   3501  1.260     skrll 	xfer->ux_hcpriv = sitd;
   3502  1.260     skrll 	size_t j = 1;
   3503   1.61  augustss 	for (i = ncur = 0; i < nframes; i++, ncur++) {
   3504  1.308     skrll 		frlen = xfer->ux_frlengths[i];
   3505  1.308     skrll 
   3506  1.308     skrll 		DPRINTFN(1, "frame=%jd ux_frlengths[%jd]=%jd", i, i,
   3507  1.308     skrll 		    xfer->ux_frlengths[i], 0);
   3508  1.308     skrll 		/*
   3509  1.308     skrll 		 * XXXNH: The loop assumes this is never true, because
   3510  1.308     skrll 		 * incrementing 'i' assumes all the ux_frlengths[i] is covered.
   3511  1.308     skrll 		 */
   3512  1.308     skrll 		if (frlen > 2 * OHCI_PAGE_SIZE - offs)
   3513  1.308     skrll 			frlen = 2 * OHCI_PAGE_SIZE - offs;
   3514  1.308     skrll 
   3515  1.308     skrll 		boff += frlen;
   3516  1.308     skrll 		buf = DMAADDR(&xfer->ux_dmabuf, boff);
   3517  1.308     skrll 		ohci_physaddr_t noffs = OHCI_PAGE_OFFSET(buf);
   3518  1.308     skrll 
   3519  1.308     skrll 		ohci_physaddr_t nend = DMAADDR(&xfer->ux_dmabuf, boff - 1);
   3520  1.308     skrll 		const ohci_physaddr_t nep = OHCI_PAGE(nend);
   3521  1.308     skrll 
   3522  1.308     skrll 		/* Note the first page crossing in bp1 */
   3523  1.308     skrll 		if (bp0 == bp1 && bp1 != nep)
   3524  1.308     skrll 			bp1 = nep;
   3525  1.308     skrll 
   3526  1.308     skrll 		DPRINTFN(1, "ncur=%jd bp0=%#jx bp1=%#jx nend=%#jx",
   3527  1.308     skrll 		    ncur, bp0, bp1, nend);
   3528  1.120  augustss 
   3529  1.308     skrll 		/* all offsets used or too many page crossings */
   3530  1.308     skrll 		if (ncur == OHCI_ITD_NOFFSET || (bp0 != bp1 && bp1 != nep)) {
   3531   1.83  augustss 			/* Allocate next ITD */
   3532  1.260     skrll 			nsitd = ox->ox_sitds[j++];
   3533  1.260     skrll 			KASSERT(nsitd != NULL);
   3534  1.260     skrll 			KASSERT(j < ox->ox_nsitd);
   3535   1.83  augustss 
   3536   1.83  augustss 			/* Fill current ITD */
   3537  1.168  augustss 			sitd->itd.itd_flags = HTOO32(
   3538  1.120  augustss 				OHCI_ITD_NOCC |
   3539  1.260     skrll 				OHCI_ITD_SET_SF(isoc->next) |
   3540   1.83  augustss 				OHCI_ITD_SET_DI(6) | /* delay intr a little */
   3541   1.83  augustss 				OHCI_ITD_SET_FC(ncur));
   3542  1.168  augustss 			sitd->itd.itd_bp0 = HTOO32(bp0);
   3543  1.168  augustss 			sitd->itd.itd_nextitd = HTOO32(nsitd->physaddr);
   3544  1.308     skrll 			sitd->itd.itd_be = HTOO32(end);
   3545  1.260     skrll 			sitd->nextitd = nsitd;
   3546   1.83  augustss 			sitd->xfer = xfer;
   3547   1.83  augustss 			sitd->flags = 0;
   3548  1.260     skrll #ifdef DIAGNOSTIC
   3549  1.260     skrll 			sitd->isdone = false;
   3550  1.260     skrll #endif
   3551  1.260     skrll 			ohci_hash_add_itd(sc, sitd);
   3552  1.195    bouyer 			usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3553  1.195    bouyer 			    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3554   1.83  augustss 
   3555   1.61  augustss 			sitd = nsitd;
   3556  1.260     skrll 			isoc->next = isoc->next + ncur;
   3557  1.308     skrll 			bp0 = bp1 = OHCI_PAGE(buf);
   3558   1.61  augustss 			ncur = 0;
   3559   1.61  augustss 		}
   3560  1.168  augustss 		sitd->itd.itd_offset[ncur] = HTOO16(OHCI_ITD_MK_OFFS(offs));
   3561  1.308     skrll 		end = nend;
   3562   1.83  augustss 		offs = noffs;
   3563   1.61  augustss 	}
   3564  1.260     skrll 	KASSERT(j <= ox->ox_nsitd);
   3565  1.260     skrll 
   3566  1.260     skrll 	/* point at sentinel */
   3567  1.260     skrll 	tail = opipe->tail.itd;
   3568  1.260     skrll 	memset(&tail->itd, 0, sizeof(tail->itd));
   3569  1.260     skrll 	tail->nextitd = NULL;
   3570  1.265     skrll 	tail->xfer = NULL;
   3571  1.260     skrll 	usb_syncmem(&tail->dma, tail->offs, sizeof(tail->itd),
   3572  1.260     skrll 	    BUS_DMASYNC_PREWRITE);
   3573  1.260     skrll 
   3574   1.83  augustss 	/* Fixup last used ITD */
   3575  1.168  augustss 	sitd->itd.itd_flags = HTOO32(
   3576  1.120  augustss 		OHCI_ITD_NOCC |
   3577  1.260     skrll 		OHCI_ITD_SET_SF(isoc->next) |
   3578   1.61  augustss 		OHCI_ITD_SET_DI(0) |
   3579   1.61  augustss 		OHCI_ITD_SET_FC(ncur));
   3580  1.168  augustss 	sitd->itd.itd_bp0 = HTOO32(bp0);
   3581  1.260     skrll 	sitd->itd.itd_nextitd = HTOO32(tail->physaddr);
   3582  1.308     skrll 	sitd->itd.itd_be = HTOO32(end);
   3583  1.260     skrll 	sitd->nextitd = tail;
   3584   1.83  augustss 	sitd->xfer = xfer;
   3585   1.83  augustss 	sitd->flags = OHCI_CALL_DONE;
   3586  1.260     skrll #ifdef DIAGNOSTIC
   3587  1.260     skrll 	sitd->isdone = false;
   3588  1.260     skrll #endif
   3589  1.260     skrll 	ohci_hash_add_itd(sc, sitd);
   3590  1.195    bouyer 	usb_syncmem(&sitd->dma, sitd->offs, sizeof(sitd->itd),
   3591  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3592   1.83  augustss 
   3593  1.260     skrll 	isoc->next = isoc->next + ncur;
   3594  1.260     skrll 	isoc->inuse += nframes;
   3595   1.83  augustss 
   3596  1.260     skrll 	/* XXX pretend we did it all */
   3597  1.260     skrll 	xfer->ux_actlen = offs;
   3598  1.260     skrll 	xfer->ux_status = USBD_IN_PROGRESS;
   3599   1.83  augustss 
   3600   1.83  augustss #ifdef OHCI_DEBUG
   3601  1.260     skrll 	if (ohcidebug >= 5) {
   3602  1.307  jakllsch 		usb_syncmem(&sc->sc_hccadma,
   3603  1.307  jakllsch 		    offsetof(struct ohci_hcca, hcca_frame_number),
   3604  1.307  jakllsch 		    sizeof(sc->sc_hcca->hcca_frame_number),
   3605  1.307  jakllsch 		    BUS_DMASYNC_POSTREAD);
   3606  1.274  pgoyette 		DPRINTF("frame=%jd", O32TOH(sc->sc_hcca->hcca_frame_number),
   3607  1.260     skrll 		    0, 0, 0);
   3608  1.260     skrll 		ohci_dump_itds(sc, xfer->ux_hcpriv);
   3609  1.168  augustss 		ohci_dump_ed(sc, sed);
   3610   1.83  augustss 	}
   3611   1.83  augustss #endif
   3612   1.61  augustss 
   3613  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3614  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3615  1.260     skrll 	sed->ed.ed_tailp = HTOO32(tail->physaddr);
   3616  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP);
   3617  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3618  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3619  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3620  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3621   1.60  augustss }
   3622   1.60  augustss 
   3623   1.60  augustss void
   3624  1.260     skrll ohci_device_isoc_abort(struct usbd_xfer *xfer)
   3625   1.60  augustss {
   3626  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(xfer->ux_pipe);
   3627  1.260     skrll 	ohci_softc_t *sc = OHCI_XFER2SC(xfer);
   3628   1.83  augustss 	ohci_soft_ed_t *sed;
   3629   1.83  augustss 	ohci_soft_itd_t *sitd;
   3630   1.83  augustss 
   3631  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3632  1.274  pgoyette 	DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3633   1.83  augustss 
   3634  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3635   1.83  augustss 
   3636   1.83  augustss 	/* Transfer is already done. */
   3637  1.260     skrll 	if (xfer->ux_status != USBD_NOT_STARTED &&
   3638  1.260     skrll 	    xfer->ux_status != USBD_IN_PROGRESS) {
   3639   1.83  augustss 		printf("ohci_device_isoc_abort: early return\n");
   3640  1.224       mrg 		goto done;
   3641   1.83  augustss 	}
   3642   1.83  augustss 
   3643   1.83  augustss 	/* Give xfer the requested abort code. */
   3644  1.260     skrll 	xfer->ux_status = USBD_CANCELLED;
   3645   1.83  augustss 
   3646   1.83  augustss 	sed = opipe->sed;
   3647  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3648  1.195    bouyer 	    BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
   3649  1.168  augustss 	sed->ed.ed_flags |= HTOO32(OHCI_ED_SKIP); /* force hardware skip */
   3650  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs + offsetof(ohci_ed_t, ed_flags),
   3651  1.195    bouyer 	    sizeof(sed->ed.ed_flags),
   3652  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3653   1.83  augustss 
   3654  1.260     skrll 	sitd = xfer->ux_hcpriv;
   3655  1.260     skrll 	KASSERT(sitd);
   3656  1.260     skrll 
   3657  1.260     skrll 	usb_delay_ms_locked(&sc->sc_bus, OHCI_ITD_NOFFSET, &sc->sc_lock);
   3658  1.260     skrll 
   3659   1.83  augustss 	for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
   3660  1.260     skrll 		ohci_hash_rem_itd(sc, sitd);
   3661   1.83  augustss #ifdef DIAGNOSTIC
   3662  1.274  pgoyette 		DPRINTFN(1, "abort sets done sitd=%#jx", (uintptr_t)sitd,
   3663  1.274  pgoyette 		    0, 0, 0);
   3664  1.260     skrll 		sitd->isdone = true;
   3665   1.83  augustss #endif
   3666   1.83  augustss 	}
   3667   1.83  augustss 
   3668   1.83  augustss 	/* Run callback. */
   3669   1.83  augustss 	usb_transfer_complete(xfer);
   3670   1.83  augustss 
   3671  1.168  augustss 	sed->ed.ed_headp = HTOO32(sitd->physaddr); /* unlink TDs */
   3672  1.168  augustss 	sed->ed.ed_flags &= HTOO32(~OHCI_ED_SKIP); /* remove hardware skip */
   3673  1.195    bouyer 	usb_syncmem(&sed->dma, sed->offs, sizeof(sed->ed),
   3674  1.195    bouyer 	    BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
   3675   1.83  augustss 
   3676  1.224       mrg  done:
   3677  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3678   1.60  augustss }
   3679   1.60  augustss 
   3680   1.60  augustss void
   3681  1.260     skrll ohci_device_isoc_done(struct usbd_xfer *xfer)
   3682   1.60  augustss {
   3683  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3684  1.274  pgoyette 	DPRINTFN(1, "xfer=%#jx", (uintptr_t)xfer, 0, 0, 0);
   3685  1.301     skrll 
   3686  1.301     skrll 	int isread =
   3687  1.301     skrll 	    (UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) == UE_DIR_IN);
   3688  1.301     skrll 
   3689  1.301     skrll 	DPRINTFN(10, "xfer=%#jx, actlen=%jd", (uintptr_t)xfer, xfer->ux_actlen,
   3690  1.301     skrll 	    0, 0);
   3691  1.306  jakllsch 	usb_syncmem(&xfer->ux_dmabuf, 0, xfer->ux_length,
   3692  1.301     skrll 	    isread ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   3693   1.60  augustss }
   3694   1.60  augustss 
   3695   1.60  augustss usbd_status
   3696  1.260     skrll ohci_setup_isoc(struct usbd_pipe *pipe)
   3697   1.60  augustss {
   3698  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3699  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3700  1.260     skrll 	struct isoc *isoc = &opipe->isoc;
   3701   1.60  augustss 
   3702  1.260     skrll 	isoc->next = -1;
   3703  1.260     skrll 	isoc->inuse = 0;
   3704   1.60  augustss 
   3705  1.224       mrg 	mutex_enter(&sc->sc_lock);
   3706  1.168  augustss 	ohci_add_ed(sc, opipe->sed, sc->sc_isoc_head);
   3707  1.224       mrg 	mutex_exit(&sc->sc_lock);
   3708   1.83  augustss 
   3709  1.260     skrll 	return USBD_NORMAL_COMPLETION;
   3710   1.60  augustss }
   3711   1.60  augustss 
   3712   1.60  augustss void
   3713  1.260     skrll ohci_device_isoc_close(struct usbd_pipe *pipe)
   3714   1.60  augustss {
   3715  1.260     skrll 	struct ohci_pipe *opipe = OHCI_PIPE2OPIPE(pipe);
   3716  1.260     skrll 	ohci_softc_t *sc = OHCI_PIPE2SC(pipe);
   3717   1.60  augustss 
   3718  1.224       mrg 	KASSERT(mutex_owned(&sc->sc_lock));
   3719  1.224       mrg 
   3720  1.260     skrll 	OHCIHIST_FUNC(); OHCIHIST_CALLED();
   3721  1.274  pgoyette 	DPRINTF("pipe=%#jx", (uintptr_t)pipe, 0, 0, 0);
   3722   1.60  augustss 	ohci_close_pipe(pipe, sc->sc_isoc_head);
   3723   1.83  augustss #ifdef DIAGNOSTIC
   3724  1.260     skrll 	opipe->tail.itd->isdone = true;
   3725   1.83  augustss #endif
   3726  1.260     skrll 	ohci_free_sitd_locked(sc, opipe->tail.itd);
   3727    1.1  augustss }
   3728