ohci.c revision 1.4 1 1.4 augustss /* $NetBSD: ohci.c,v 1.4 1998/07/24 21:09:07 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.1 augustss * Author: Lennart Augustsson <augustss (at) carlstedt.se>
8 1.1 augustss * Carlstedt Research & Technology
9 1.1 augustss *
10 1.1 augustss * Redistribution and use in source and binary forms, with or without
11 1.1 augustss * modification, are permitted provided that the following conditions
12 1.1 augustss * are met:
13 1.1 augustss * 1. Redistributions of source code must retain the above copyright
14 1.1 augustss * notice, this list of conditions and the following disclaimer.
15 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer in the
17 1.1 augustss * documentation and/or other materials provided with the distribution.
18 1.1 augustss * 3. All advertising materials mentioning features or use of this software
19 1.1 augustss * must display the following acknowledgement:
20 1.1 augustss * This product includes software developed by the NetBSD
21 1.1 augustss * Foundation, Inc. and its contributors.
22 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 augustss * contributors may be used to endorse or promote products derived
24 1.1 augustss * from this software without specific prior written permission.
25 1.1 augustss *
26 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
37 1.1 augustss */
38 1.1 augustss
39 1.1 augustss /*
40 1.1 augustss * USB Open Host Controller driver.
41 1.1 augustss *
42 1.1 augustss * OHCI spec: http://www.intel.com/design/usb/ohci11d.pdf
43 1.1 augustss * USB spec: http://www.teleport.com/cgi-bin/mailmerge.cgi/~usb/cgiform.tpl
44 1.1 augustss */
45 1.1 augustss
46 1.1 augustss #include <sys/param.h>
47 1.1 augustss #include <sys/systm.h>
48 1.1 augustss #include <sys/kernel.h>
49 1.1 augustss #include <sys/malloc.h>
50 1.1 augustss #include <sys/device.h>
51 1.1 augustss #include <sys/proc.h>
52 1.1 augustss #include <sys/queue.h>
53 1.1 augustss #include <sys/select.h>
54 1.1 augustss
55 1.4 augustss #include <machine/bus.h>
56 1.4 augustss
57 1.1 augustss #include <dev/usb/usb.h>
58 1.1 augustss #include <dev/usb/usbdi.h>
59 1.1 augustss #include <dev/usb/usbdivar.h>
60 1.1 augustss #include <dev/usb/usb_quirks.h>
61 1.4 augustss #include <dev/usb/usb_mem.h>
62 1.1 augustss
63 1.1 augustss #include <dev/usb/ohcireg.h>
64 1.1 augustss #include <dev/usb/ohcivar.h>
65 1.1 augustss
66 1.1 augustss int ohcidebug = 0;
67 1.1 augustss
68 1.1 augustss struct ohci_pipe;
69 1.1 augustss
70 1.1 augustss ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
71 1.1 augustss void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
72 1.1 augustss
73 1.1 augustss ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
74 1.1 augustss void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
75 1.1 augustss
76 1.1 augustss usbd_status ohci_open __P((usbd_pipe_handle));
77 1.1 augustss void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
78 1.1 augustss void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
79 1.1 augustss void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
80 1.1 augustss void ohci_ctrl_done __P((ohci_softc_t *, usbd_request_handle));
81 1.1 augustss void ohci_intr_done __P((ohci_softc_t *, usbd_request_handle));
82 1.3 augustss void ohci_bulk_done __P((ohci_softc_t *, usbd_request_handle));
83 1.1 augustss
84 1.1 augustss usbd_status ohci_device_request __P((usbd_request_handle reqh));
85 1.3 augustss void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
86 1.3 augustss void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
87 1.1 augustss void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
88 1.1 augustss void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
89 1.1 augustss ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
90 1.1 augustss
91 1.1 augustss usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
92 1.1 augustss void ohci_root_ctrl_abort __P((usbd_request_handle));
93 1.1 augustss void ohci_root_ctrl_close __P((usbd_pipe_handle));
94 1.1 augustss
95 1.1 augustss usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
96 1.1 augustss void ohci_root_intr_abort __P((usbd_request_handle));
97 1.1 augustss void ohci_root_intr_close __P((usbd_pipe_handle));
98 1.1 augustss
99 1.1 augustss usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
100 1.1 augustss void ohci_device_ctrl_abort __P((usbd_request_handle));
101 1.1 augustss void ohci_device_ctrl_close __P((usbd_pipe_handle));
102 1.1 augustss
103 1.3 augustss usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
104 1.3 augustss void ohci_device_bulk_abort __P((usbd_request_handle));
105 1.3 augustss void ohci_device_bulk_close __P((usbd_pipe_handle));
106 1.3 augustss
107 1.1 augustss usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
108 1.1 augustss void ohci_device_intr_abort __P((usbd_request_handle));
109 1.1 augustss void ohci_device_intr_close __P((usbd_pipe_handle));
110 1.1 augustss usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
111 1.1 augustss struct ohci_pipe *pipe, int ival));
112 1.1 augustss
113 1.1 augustss int ohci_str __P((usb_string_descriptor_t *, int, char *));
114 1.1 augustss
115 1.1 augustss void ohci_timeout __P((void *));
116 1.1 augustss void ohci_rhsc_able __P((ohci_softc_t *, int));
117 1.1 augustss
118 1.1 augustss #ifdef USB_DEBUG
119 1.1 augustss ohci_softc_t *thesc;
120 1.1 augustss void ohci_dumpregs __P((ohci_softc_t *));
121 1.1 augustss void ohci_dump_tds __P((ohci_soft_td_t *));
122 1.1 augustss void ohci_dump_td __P((ohci_soft_td_t *));
123 1.1 augustss void ohci_dump_ed __P((ohci_soft_ed_t *));
124 1.1 augustss #endif
125 1.1 augustss
126 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
127 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
128 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
129 1.1 augustss
130 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
131 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
132 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
133 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
134 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
135 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
136 1.1 augustss
137 1.1 augustss struct ohci_pipe {
138 1.1 augustss struct usbd_pipe pipe;
139 1.1 augustss ohci_soft_ed_t *sed;
140 1.1 augustss ohci_soft_td_t *tail;
141 1.1 augustss /* Info needed for different pipe kinds. */
142 1.1 augustss union {
143 1.1 augustss /* Control pipe */
144 1.1 augustss struct {
145 1.4 augustss usb_dma_t datadma;
146 1.4 augustss usb_dma_t reqdma;
147 1.1 augustss u_int length;
148 1.1 augustss ohci_soft_td_t *setup, *xfer, *stat;
149 1.1 augustss } ctl;
150 1.1 augustss /* Interrupt pipe */
151 1.1 augustss struct {
152 1.4 augustss usb_dma_t datadma;
153 1.1 augustss int nslots;
154 1.1 augustss int pos;
155 1.1 augustss } intr;
156 1.3 augustss /* Bulk pipe */
157 1.3 augustss struct {
158 1.4 augustss usb_dma_t datadma;
159 1.3 augustss u_int length;
160 1.3 augustss } bulk;
161 1.1 augustss } u;
162 1.1 augustss };
163 1.1 augustss
164 1.1 augustss #define OHCI_INTR_ENDPT 1
165 1.1 augustss
166 1.1 augustss struct usbd_methods ohci_root_ctrl_methods = {
167 1.1 augustss ohci_root_ctrl_transfer,
168 1.1 augustss ohci_root_ctrl_abort,
169 1.1 augustss ohci_root_ctrl_close,
170 1.1 augustss };
171 1.1 augustss
172 1.1 augustss struct usbd_methods ohci_root_intr_methods = {
173 1.1 augustss ohci_root_intr_transfer,
174 1.1 augustss ohci_root_intr_abort,
175 1.1 augustss ohci_root_intr_close,
176 1.1 augustss };
177 1.1 augustss
178 1.1 augustss struct usbd_methods ohci_device_ctrl_methods = {
179 1.1 augustss ohci_device_ctrl_transfer,
180 1.1 augustss ohci_device_ctrl_abort,
181 1.1 augustss ohci_device_ctrl_close,
182 1.1 augustss };
183 1.1 augustss
184 1.1 augustss struct usbd_methods ohci_device_intr_methods = {
185 1.1 augustss ohci_device_intr_transfer,
186 1.1 augustss ohci_device_intr_abort,
187 1.1 augustss ohci_device_intr_close,
188 1.1 augustss };
189 1.1 augustss
190 1.3 augustss struct usbd_methods ohci_device_bulk_methods = {
191 1.3 augustss ohci_device_bulk_transfer,
192 1.3 augustss ohci_device_bulk_abort,
193 1.3 augustss ohci_device_bulk_close,
194 1.3 augustss };
195 1.3 augustss
196 1.1 augustss ohci_soft_ed_t *
197 1.1 augustss ohci_alloc_sed(sc)
198 1.1 augustss ohci_softc_t *sc;
199 1.1 augustss {
200 1.1 augustss ohci_soft_ed_t *sed;
201 1.1 augustss usbd_status r;
202 1.1 augustss int i, offs;
203 1.4 augustss usb_dma_t dma;
204 1.1 augustss
205 1.1 augustss if (!sc->sc_freeeds) {
206 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
207 1.1 augustss sed = malloc(sizeof(ohci_soft_ed_t) * OHCI_ED_CHUNK,
208 1.1 augustss M_USBDEV, M_NOWAIT);
209 1.1 augustss if (!sed)
210 1.1 augustss return 0;
211 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_ED_SIZE * OHCI_ED_CHUNK,
212 1.4 augustss OHCI_ED_ALIGN, &dma);
213 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
214 1.1 augustss free(sed, M_USBDEV);
215 1.1 augustss return 0;
216 1.1 augustss }
217 1.1 augustss for(i = 0; i < OHCI_ED_CHUNK; i++, sed++) {
218 1.1 augustss offs = i * OHCI_ED_SIZE;
219 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
220 1.1 augustss sed->ed = (ohci_ed_t *)
221 1.1 augustss ((char *)KERNADDR(&dma) + offs);
222 1.1 augustss sed->next = sc->sc_freeeds;
223 1.1 augustss sc->sc_freeeds = sed;
224 1.1 augustss }
225 1.1 augustss }
226 1.1 augustss sed = sc->sc_freeeds;
227 1.1 augustss sc->sc_freeeds = sed->next;
228 1.1 augustss memset(sed->ed, 0, OHCI_ED_SIZE);
229 1.1 augustss sed->next = 0;
230 1.1 augustss return sed;
231 1.1 augustss }
232 1.1 augustss
233 1.1 augustss void
234 1.1 augustss ohci_free_sed(sc, sed)
235 1.1 augustss ohci_softc_t *sc;
236 1.1 augustss ohci_soft_ed_t *sed;
237 1.1 augustss {
238 1.1 augustss sed->next = sc->sc_freeeds;
239 1.1 augustss sc->sc_freeeds = sed;
240 1.1 augustss }
241 1.1 augustss
242 1.1 augustss ohci_soft_td_t *
243 1.1 augustss ohci_alloc_std(sc)
244 1.1 augustss ohci_softc_t *sc;
245 1.1 augustss {
246 1.1 augustss ohci_soft_td_t *std;
247 1.1 augustss usbd_status r;
248 1.1 augustss int i, offs;
249 1.4 augustss usb_dma_t dma;
250 1.1 augustss
251 1.1 augustss if (!sc->sc_freetds) {
252 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
253 1.1 augustss std = malloc(sizeof(ohci_soft_td_t) * OHCI_TD_CHUNK,
254 1.1 augustss M_USBDEV, M_NOWAIT);
255 1.1 augustss if (!std)
256 1.1 augustss return 0;
257 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_TD_SIZE * OHCI_TD_CHUNK,
258 1.4 augustss OHCI_TD_ALIGN, &dma);
259 1.1 augustss if (r != USBD_NORMAL_COMPLETION) {
260 1.1 augustss free(std, M_USBDEV);
261 1.1 augustss return 0;
262 1.1 augustss }
263 1.1 augustss for(i = 0; i < OHCI_TD_CHUNK; i++, std++) {
264 1.1 augustss offs = i * OHCI_TD_SIZE;
265 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
266 1.1 augustss std->td = (ohci_td_t *)
267 1.1 augustss ((char *)KERNADDR(&dma) + offs);
268 1.1 augustss std->nexttd = sc->sc_freetds;
269 1.1 augustss sc->sc_freetds = std;
270 1.1 augustss }
271 1.1 augustss }
272 1.1 augustss std = sc->sc_freetds;
273 1.1 augustss sc->sc_freetds = std->nexttd;
274 1.1 augustss memset(std->td, 0, OHCI_TD_SIZE);
275 1.1 augustss std->nexttd = 0;
276 1.1 augustss return (std);
277 1.1 augustss }
278 1.1 augustss
279 1.1 augustss void
280 1.1 augustss ohci_free_std(sc, std)
281 1.1 augustss ohci_softc_t *sc;
282 1.1 augustss ohci_soft_td_t *std;
283 1.1 augustss {
284 1.1 augustss std->nexttd = sc->sc_freetds;
285 1.1 augustss sc->sc_freetds = std;
286 1.1 augustss }
287 1.1 augustss
288 1.1 augustss usbd_status
289 1.1 augustss ohci_init(sc)
290 1.1 augustss ohci_softc_t *sc;
291 1.1 augustss {
292 1.1 augustss ohci_soft_ed_t *sed, *psed;
293 1.1 augustss usbd_status r;
294 1.1 augustss int rev;
295 1.1 augustss int i;
296 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
297 1.1 augustss
298 1.1 augustss DPRINTF(("ohci_init: start\n"));
299 1.1 augustss rev = OREAD4(sc, OHCI_REVISION);
300 1.1 augustss printf("%s: OHCI version %d.%d%s\n", sc->sc_bus.bdev.dv_xname,
301 1.1 augustss OHCI_REV_HI(rev), OHCI_REV_LO(rev),
302 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
303 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
304 1.1 augustss printf("%s: unsupported OHCI revision\n",
305 1.1 augustss sc->sc_bus.bdev.dv_xname);
306 1.1 augustss return (USBD_INVAL);
307 1.1 augustss }
308 1.1 augustss
309 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
310 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
311 1.1 augustss
312 1.1 augustss /* Allocate the HCCA area. */
313 1.4 augustss r = usb_allocmem(sc->sc_dmatag, OHCI_HCCA_SIZE,
314 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
315 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
316 1.1 augustss return (r);
317 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
318 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
319 1.1 augustss
320 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
321 1.1 augustss
322 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
323 1.1 augustss if (!sc->sc_ctrl_head) {
324 1.1 augustss r = USBD_NOMEM;
325 1.1 augustss goto bad1;
326 1.1 augustss }
327 1.1 augustss sc->sc_ctrl_head->ed->ed_flags |= OHCI_ED_SKIP;
328 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
329 1.1 augustss if (!sc->sc_bulk_head) {
330 1.1 augustss r = USBD_NOMEM;
331 1.1 augustss goto bad2;
332 1.1 augustss }
333 1.1 augustss sc->sc_bulk_head->ed->ed_flags |= OHCI_ED_SKIP;
334 1.1 augustss
335 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
336 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
337 1.1 augustss sed = ohci_alloc_sed(sc);
338 1.1 augustss if (!sed) {
339 1.1 augustss while (--i >= 0)
340 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
341 1.1 augustss r = USBD_NOMEM;
342 1.1 augustss goto bad3;
343 1.1 augustss }
344 1.1 augustss /* All ED fields are set to 0. */
345 1.1 augustss sc->sc_eds[i] = sed;
346 1.1 augustss sed->ed->ed_flags |= OHCI_ED_SKIP;
347 1.1 augustss if (i != 0) {
348 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
349 1.1 augustss sed->next = psed;
350 1.1 augustss sed->ed->ed_nexted = psed->physaddr;
351 1.1 augustss }
352 1.1 augustss }
353 1.1 augustss /*
354 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
355 1.1 augustss * the tree set up properly to spread the interrupts.
356 1.1 augustss */
357 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
358 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
359 1.1 augustss sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr;
360 1.1 augustss
361 1.1 augustss /* Determine in what context we are running. */
362 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
363 1.1 augustss if (ctl & OHCI_IR) {
364 1.1 augustss /* SMM active, request change */
365 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
366 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
367 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
368 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
369 1.1 augustss delay(1000);
370 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
371 1.1 augustss }
372 1.1 augustss if ((ctl & OHCI_IR) == 0) {
373 1.1 augustss printf("%s: SMM does not respond, resetting\n",
374 1.1 augustss sc->sc_bus.bdev.dv_xname);
375 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
376 1.1 augustss goto reset;
377 1.1 augustss }
378 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
379 1.1 augustss /* BIOS started controller. */
380 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
381 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
382 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
383 1.1 augustss delay(USB_RESUME_DELAY * 1000);
384 1.1 augustss }
385 1.1 augustss } else {
386 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
387 1.1 augustss reset:
388 1.1 augustss /* Controller was cold started. */
389 1.1 augustss delay(USB_RESET_DELAY * 1000);
390 1.1 augustss }
391 1.1 augustss
392 1.1 augustss /* We now own the host controller and the bus has been reset. */
393 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
394 1.1 augustss
395 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
396 1.1 augustss /* Nominal time for a reset is 10 us. */
397 1.1 augustss for (i = 0; i < 10; i++) {
398 1.1 augustss delay(10);
399 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
400 1.1 augustss if (!hcr)
401 1.1 augustss break;
402 1.1 augustss }
403 1.1 augustss if (hcr) {
404 1.1 augustss printf("%s: reset timeout\n", sc->sc_bus.bdev.dv_xname);
405 1.1 augustss r = USBD_IOERROR;
406 1.1 augustss goto bad3;
407 1.1 augustss }
408 1.1 augustss #ifdef USB_DEBUG
409 1.1 augustss thesc = sc;
410 1.1 augustss if (ohcidebug > 15)
411 1.1 augustss ohci_dumpregs(sc);
412 1.1 augustss #endif
413 1.1 augustss
414 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
415 1.1 augustss
416 1.1 augustss /* Set up HC registers. */
417 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
418 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
419 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
420 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
421 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
422 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
423 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
424 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
425 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
426 1.1 augustss /* And finally start it! */
427 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
428 1.1 augustss
429 1.1 augustss /*
430 1.1 augustss * The controller is now OPERATIONAL. Set a some final
431 1.1 augustss * registers that should be set earlier, but that the
432 1.1 augustss * controller ignores when in the SUSPEND state.
433 1.1 augustss */
434 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
435 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
436 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
437 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
438 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
439 1.1 augustss
440 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
441 1.1 augustss
442 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
443 1.1 augustss printf("%s: %d downstream port%s\n",
444 1.1 augustss sc->sc_bus.bdev.dv_xname, sc->sc_noport,
445 1.1 augustss sc->sc_noport != 1 ? "s" : "");
446 1.1 augustss
447 1.1 augustss #ifdef USB_DEBUG
448 1.1 augustss if (ohcidebug > 5)
449 1.1 augustss ohci_dumpregs(sc);
450 1.1 augustss #endif
451 1.1 augustss
452 1.1 augustss /* Set up the bus struct. */
453 1.1 augustss sc->sc_bus.open_pipe = ohci_open;
454 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
455 1.1 augustss
456 1.1 augustss return (USBD_NORMAL_COMPLETION);
457 1.1 augustss
458 1.1 augustss bad3:
459 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
460 1.1 augustss bad2:
461 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
462 1.1 augustss bad1:
463 1.4 augustss usb_freemem(sc->sc_dmatag, &sc->sc_hccadma);
464 1.1 augustss return (r);
465 1.1 augustss }
466 1.1 augustss
467 1.1 augustss #ifdef USB_DEBUG
468 1.1 augustss void ohcidump(void);
469 1.1 augustss void ohcidump(void) { ohci_dumpregs(thesc); }
470 1.1 augustss
471 1.1 augustss void
472 1.1 augustss ohci_dumpregs(sc)
473 1.1 augustss ohci_softc_t *sc;
474 1.1 augustss {
475 1.1 augustss printf("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
476 1.1 augustss OREAD4(sc, OHCI_REVISION),
477 1.1 augustss OREAD4(sc, OHCI_CONTROL),
478 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
479 1.1 augustss printf(" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
480 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
481 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
482 1.1 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE));
483 1.1 augustss printf(" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
484 1.1 augustss OREAD4(sc, OHCI_HCCA),
485 1.1 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
486 1.1 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED));
487 1.1 augustss printf(" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
488 1.1 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
489 1.1 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
490 1.1 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED));
491 1.1 augustss printf(" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
492 1.1 augustss OREAD4(sc, OHCI_DONE_HEAD),
493 1.1 augustss OREAD4(sc, OHCI_FM_INTERVAL),
494 1.1 augustss OREAD4(sc, OHCI_FM_REMAINING));
495 1.1 augustss printf(" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
496 1.1 augustss OREAD4(sc, OHCI_FM_NUMBER),
497 1.1 augustss OREAD4(sc, OHCI_PERIODIC_START),
498 1.1 augustss OREAD4(sc, OHCI_LS_THRESHOLD));
499 1.1 augustss printf(" desca=0x%08x descb=0x%08x stat=0x%08x\n",
500 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
501 1.1 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
502 1.1 augustss OREAD4(sc, OHCI_RH_STATUS));
503 1.1 augustss printf(" port1=0x%08x port2=0x%08x\n",
504 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
505 1.1 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2)));
506 1.1 augustss printf(" HCCA: frame_number=0x%04x done_head=0x%08x\n",
507 1.1 augustss sc->sc_hcca->hcca_frame_number,
508 1.1 augustss sc->sc_hcca->hcca_done_head);
509 1.1 augustss }
510 1.1 augustss #endif
511 1.1 augustss
512 1.1 augustss int
513 1.1 augustss ohci_intr(p)
514 1.1 augustss void *p;
515 1.1 augustss {
516 1.1 augustss ohci_softc_t *sc = p;
517 1.1 augustss u_int32_t intrs, eintrs;
518 1.1 augustss ohci_physaddr_t done;
519 1.1 augustss
520 1.1 augustss done = sc->sc_hcca->hcca_done_head;
521 1.1 augustss if (done != 0) {
522 1.1 augustss intrs = OHCI_WDH;
523 1.1 augustss if (done & OHCI_DONE_INTRS)
524 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
525 1.1 augustss } else
526 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
527 1.1 augustss if (!intrs)
528 1.1 augustss return (0);
529 1.1 augustss intrs &= ~OHCI_MIE;
530 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
531 1.1 augustss eintrs = intrs & sc->sc_eintrs;
532 1.1 augustss if (!eintrs)
533 1.1 augustss return (0);
534 1.1 augustss
535 1.1 augustss sc->sc_intrs++;
536 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
537 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
538 1.1 augustss (u_int)eintrs));
539 1.1 augustss
540 1.1 augustss if (eintrs & OHCI_SO) {
541 1.1 augustss printf("%s: scheduling overrun\n", sc->sc_bus.bdev.dv_xname);
542 1.1 augustss /* XXX do what */
543 1.1 augustss intrs &= ~OHCI_SO;
544 1.1 augustss }
545 1.1 augustss if (eintrs & OHCI_WDH) {
546 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
547 1.1 augustss sc->sc_hcca->hcca_done_head = 0;
548 1.1 augustss intrs &= ~OHCI_WDH;
549 1.1 augustss }
550 1.1 augustss if (eintrs & OHCI_RD) {
551 1.1 augustss /* XXX process resume detect */
552 1.1 augustss }
553 1.1 augustss if (eintrs & OHCI_UE) {
554 1.1 augustss printf("%s: unrecoverable error, controller halted\n",
555 1.1 augustss sc->sc_bus.bdev.dv_xname);
556 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
557 1.1 augustss /* XXX what else */
558 1.1 augustss }
559 1.1 augustss if (eintrs & OHCI_RHSC) {
560 1.1 augustss ohci_rhsc(sc, sc->sc_intrreqh);
561 1.1 augustss intrs &= ~OHCI_RHSC;
562 1.1 augustss
563 1.1 augustss /*
564 1.1 augustss * Disable RHSC interrupt for now, because it will be
565 1.1 augustss * on until the port has been reset.
566 1.1 augustss */
567 1.1 augustss ohci_rhsc_able(sc, 0);
568 1.1 augustss }
569 1.1 augustss
570 1.1 augustss /* Block unprocessed interrupts. XXX */
571 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
572 1.1 augustss sc->sc_eintrs &= ~intrs;
573 1.1 augustss
574 1.1 augustss return (1);
575 1.1 augustss }
576 1.1 augustss
577 1.1 augustss void
578 1.1 augustss ohci_rhsc_able(sc, on)
579 1.1 augustss ohci_softc_t *sc;
580 1.1 augustss int on;
581 1.1 augustss {
582 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
583 1.1 augustss if (on) {
584 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
585 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
586 1.1 augustss } else {
587 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
588 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
589 1.1 augustss }
590 1.1 augustss }
591 1.1 augustss
592 1.1 augustss void
593 1.1 augustss ohci_process_done(sc, done)
594 1.1 augustss ohci_softc_t *sc;
595 1.1 augustss ohci_physaddr_t done;
596 1.1 augustss {
597 1.1 augustss ohci_soft_td_t *std, *sdone;
598 1.1 augustss usbd_request_handle reqh;
599 1.1 augustss int len, cc;
600 1.1 augustss
601 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
602 1.1 augustss
603 1.1 augustss /* Reverse the done list. */
604 1.1 augustss for (sdone = 0; done; done = std->td->td_nexttd) {
605 1.1 augustss std = ohci_hash_find_td(sc, done);
606 1.1 augustss std->dnext = sdone;
607 1.1 augustss sdone = std;
608 1.1 augustss }
609 1.1 augustss
610 1.1 augustss #ifdef USB_DEBUG
611 1.1 augustss if (ohcidebug > 10) {
612 1.1 augustss printf("ohci_process_done: TD done:\n");
613 1.1 augustss ohci_dump_tds(sdone);
614 1.1 augustss }
615 1.1 augustss #endif
616 1.1 augustss
617 1.1 augustss for (std = sdone; std; std = std->dnext) {
618 1.1 augustss reqh = std->reqh;
619 1.1 augustss DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p\n",std,reqh));
620 1.1 augustss cc = OHCI_TD_GET_CC(std->td->td_flags);
621 1.1 augustss if (cc == OHCI_CC_NO_ERROR) {
622 1.1 augustss if (std->td->td_cbp == 0)
623 1.1 augustss len = std->len;
624 1.1 augustss else
625 1.1 augustss len = std->td->td_be - std->td->td_cbp + 1;
626 1.1 augustss reqh->actlen += len;
627 1.1 augustss if (reqh->hcpriv == std) {
628 1.1 augustss switch (reqh->pipe->endpoint->edesc->bmAttributes & UE_XFERTYPE) {
629 1.1 augustss case UE_CONTROL:
630 1.1 augustss ohci_ctrl_done(sc, reqh);
631 1.1 augustss break;
632 1.1 augustss case UE_INTERRUPT:
633 1.1 augustss ohci_intr_done(sc, reqh);
634 1.1 augustss break;
635 1.1 augustss case UE_BULK:
636 1.3 augustss ohci_bulk_done(sc, reqh);
637 1.1 augustss break;
638 1.1 augustss case UE_ISOCHRONOUS:
639 1.1 augustss printf("ohci_process_done: ISO done?\n");
640 1.1 augustss break;
641 1.1 augustss }
642 1.1 augustss /* And finally execute callback. */
643 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
644 1.1 augustss reqh->xfercb(reqh);
645 1.1 augustss }
646 1.1 augustss } else {
647 1.1 augustss ohci_soft_td_t *p, *n;
648 1.1 augustss struct ohci_pipe *opipe =
649 1.1 augustss (struct ohci_pipe *)reqh->pipe;
650 1.1 augustss DPRINTFN(-1,("ohci_process_done: error cc=%d\n",
651 1.1 augustss OHCI_TD_GET_CC(std->td->td_flags)));
652 1.1 augustss /*
653 1.1 augustss * Endpoint is halted. First unlink all the TDs
654 1.1 augustss * belonging to the failed transfer, and then restart
655 1.1 augustss * the endpoint.
656 1.1 augustss */
657 1.1 augustss for (p = std->nexttd; p->reqh == reqh; p = n) {
658 1.1 augustss n = p->nexttd;
659 1.1 augustss ohci_hash_rem_td(sc, p);
660 1.1 augustss ohci_free_std(sc, p);
661 1.1 augustss }
662 1.1 augustss opipe->sed->ed->ed_headp = p->physaddr;/* clear halt */
663 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
664 1.1 augustss
665 1.1 augustss if (cc == OHCI_CC_STALL)
666 1.1 augustss reqh->status = USBD_STALLED;
667 1.1 augustss else
668 1.1 augustss reqh->status = USBD_IOERROR;
669 1.1 augustss reqh->xfercb(reqh);
670 1.1 augustss }
671 1.1 augustss ohci_hash_rem_td(sc, std);
672 1.1 augustss ohci_free_std(sc, std);
673 1.1 augustss }
674 1.1 augustss }
675 1.1 augustss
676 1.1 augustss void
677 1.1 augustss ohci_ctrl_done(sc, reqh)
678 1.1 augustss ohci_softc_t *sc;
679 1.1 augustss usbd_request_handle reqh;
680 1.1 augustss {
681 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
682 1.1 augustss u_int len = opipe->u.ctl.length;
683 1.4 augustss usb_dma_t *dma;
684 1.1 augustss
685 1.1 augustss DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
686 1.1 augustss
687 1.1 augustss if (!reqh->isreq) {
688 1.1 augustss panic("uhci_ctrl_done: not a request\n");
689 1.1 augustss return;
690 1.1 augustss }
691 1.1 augustss
692 1.1 augustss if (len != 0) {
693 1.1 augustss dma = &opipe->u.ctl.datadma;
694 1.1 augustss if (reqh->request.bmRequestType & UT_READ)
695 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), len);
696 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
697 1.1 augustss }
698 1.1 augustss }
699 1.1 augustss
700 1.1 augustss void
701 1.1 augustss ohci_intr_done(sc, reqh)
702 1.1 augustss ohci_softc_t *sc;
703 1.1 augustss usbd_request_handle reqh;
704 1.1 augustss {
705 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
706 1.4 augustss usb_dma_t *dma;
707 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
708 1.1 augustss ohci_soft_td_t *xfer, *tail;
709 1.1 augustss
710 1.1 augustss
711 1.1 augustss DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
712 1.1 augustss reqh, reqh->actlen));
713 1.1 augustss
714 1.1 augustss dma = &opipe->u.intr.datadma;
715 1.1 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
716 1.1 augustss
717 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
718 1.1 augustss xfer = opipe->tail;
719 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
720 1.1 augustss if (!tail) {
721 1.1 augustss reqh->status = USBD_NOMEM;
722 1.1 augustss return;
723 1.1 augustss }
724 1.1 augustss tail->reqh = 0;
725 1.1 augustss
726 1.1 augustss xfer->td->td_flags = OHCI_TD_IN | OHCI_TD_NOCC |
727 1.1 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY;
728 1.1 augustss xfer->td->td_cbp = DMAADDR(dma);
729 1.1 augustss xfer->nexttd = tail;
730 1.1 augustss xfer->td->td_nexttd = tail->physaddr;
731 1.1 augustss xfer->td->td_be = xfer->td->td_cbp + reqh->length - 1;
732 1.1 augustss xfer->len = reqh->length;
733 1.1 augustss xfer->reqh = reqh;
734 1.1 augustss
735 1.1 augustss reqh->actlen = 0;
736 1.1 augustss reqh->hcpriv = xfer;
737 1.1 augustss
738 1.1 augustss ohci_hash_add_td(sc, xfer);
739 1.1 augustss sed->ed->ed_tailp = tail->physaddr;
740 1.1 augustss opipe->tail = tail;
741 1.1 augustss } else {
742 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
743 1.1 augustss }
744 1.1 augustss }
745 1.1 augustss
746 1.1 augustss void
747 1.3 augustss ohci_bulk_done(sc, reqh)
748 1.3 augustss ohci_softc_t *sc;
749 1.3 augustss usbd_request_handle reqh;
750 1.3 augustss {
751 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
752 1.4 augustss usb_dma_t *dma;
753 1.3 augustss
754 1.3 augustss
755 1.3 augustss DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
756 1.3 augustss reqh, reqh->actlen));
757 1.3 augustss
758 1.3 augustss dma = &opipe->u.bulk.datadma;
759 1.3 augustss if (reqh->request.bmRequestType & UT_READ)
760 1.3 augustss memcpy(reqh->buffer, KERNADDR(dma), reqh->actlen);
761 1.4 augustss usb_freemem(sc->sc_dmatag, dma);
762 1.3 augustss }
763 1.3 augustss
764 1.3 augustss void
765 1.1 augustss ohci_rhsc(sc, reqh)
766 1.1 augustss ohci_softc_t *sc;
767 1.1 augustss usbd_request_handle reqh;
768 1.1 augustss {
769 1.1 augustss usbd_pipe_handle pipe;
770 1.1 augustss struct ohci_pipe *opipe;
771 1.1 augustss u_char *p;
772 1.1 augustss int i, m;
773 1.1 augustss int hstatus;
774 1.1 augustss
775 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
776 1.1 augustss DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
777 1.1 augustss sc, reqh, hstatus));
778 1.1 augustss
779 1.1 augustss if (reqh == 0) {
780 1.1 augustss /* Just ignore the change. */
781 1.1 augustss return;
782 1.1 augustss }
783 1.1 augustss
784 1.1 augustss pipe = reqh->pipe;
785 1.1 augustss opipe = (struct ohci_pipe *)pipe;
786 1.1 augustss
787 1.1 augustss p = KERNADDR(&opipe->u.intr.datadma);
788 1.1 augustss m = min(sc->sc_noport, reqh->length * 8 - 1);
789 1.1 augustss memset(p, 0, reqh->length);
790 1.1 augustss for (i = 1; i <= m; i++) {
791 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
792 1.1 augustss p[i/8] |= 1 << (i%8);
793 1.1 augustss }
794 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
795 1.1 augustss reqh->actlen = reqh->length;
796 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
797 1.1 augustss reqh->xfercb(reqh);
798 1.1 augustss
799 1.1 augustss if (reqh->pipe->intrreqh != reqh) {
800 1.1 augustss sc->sc_intrreqh = 0;
801 1.4 augustss usb_freemem(sc->sc_dmatag, &opipe->u.intr.datadma);
802 1.1 augustss }
803 1.1 augustss }
804 1.1 augustss
805 1.1 augustss /*
806 1.1 augustss * Wait here until controller claims to have an interrupt.
807 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
808 1.1 augustss * too long.
809 1.1 augustss */
810 1.1 augustss void
811 1.1 augustss ohci_waitintr(sc, reqh)
812 1.1 augustss ohci_softc_t *sc;
813 1.1 augustss usbd_request_handle reqh;
814 1.1 augustss {
815 1.1 augustss int timo = reqh->timeout;
816 1.1 augustss int usecs;
817 1.1 augustss u_int32_t intrs;
818 1.1 augustss
819 1.1 augustss reqh->status = USBD_IN_PROGRESS;
820 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
821 1.1 augustss delay(1000);
822 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
823 1.1 augustss DPRINTFN(10,("ohci_waitintr: 0x%04x\n", intrs));
824 1.1 augustss #ifdef USB_DEBUG
825 1.1 augustss if (ohcidebug > 15)
826 1.1 augustss ohci_dumpregs(sc);
827 1.1 augustss #endif
828 1.1 augustss if (intrs) {
829 1.1 augustss ohci_intr(sc);
830 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
831 1.1 augustss return;
832 1.1 augustss }
833 1.1 augustss }
834 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
835 1.1 augustss reqh->status = USBD_TIMEOUT;
836 1.1 augustss reqh->xfercb(reqh);
837 1.1 augustss }
838 1.1 augustss
839 1.1 augustss usbd_status
840 1.1 augustss ohci_device_request(reqh)
841 1.1 augustss usbd_request_handle reqh;
842 1.1 augustss {
843 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
844 1.1 augustss usb_device_request_t *req = &reqh->request;
845 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
846 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
847 1.1 augustss int addr = dev->address;
848 1.1 augustss ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
849 1.1 augustss ohci_soft_ed_t *sed;
850 1.4 augustss usb_dma_t *dmap;
851 1.1 augustss int isread;
852 1.1 augustss int len;
853 1.1 augustss usbd_status r;
854 1.1 augustss int s;
855 1.1 augustss
856 1.1 augustss isread = req->bmRequestType & UT_READ;
857 1.1 augustss len = UGETW(req->wLength);
858 1.1 augustss
859 1.1 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
860 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
861 1.1 augustss UGETW(req->wIndex), len, addr,
862 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
863 1.1 augustss
864 1.1 augustss setup = opipe->tail;
865 1.1 augustss stat = ohci_alloc_std(sc);
866 1.1 augustss if (!stat) {
867 1.1 augustss r = USBD_NOMEM;
868 1.1 augustss goto bad1;
869 1.1 augustss }
870 1.1 augustss tail = ohci_alloc_std(sc);
871 1.1 augustss if (!tail) {
872 1.1 augustss r = USBD_NOMEM;
873 1.1 augustss goto bad2;
874 1.1 augustss }
875 1.1 augustss tail->reqh = 0;
876 1.1 augustss
877 1.1 augustss sed = opipe->sed;
878 1.1 augustss dmap = &opipe->u.ctl.datadma;
879 1.1 augustss opipe->u.ctl.length = len;
880 1.1 augustss
881 1.1 augustss /* Update device address */
882 1.1 augustss sed->ed->ed_flags =
883 1.1 augustss (sed->ed->ed_flags & ~OHCI_ED_ADDRMASK) |
884 1.1 augustss OHCI_ED_SET_FA(addr);
885 1.1 augustss
886 1.1 augustss /* Set up data transaction */
887 1.1 augustss if (len != 0) {
888 1.1 augustss xfer = ohci_alloc_std(sc);
889 1.1 augustss if (!xfer) {
890 1.1 augustss r = USBD_NOMEM;
891 1.1 augustss goto bad3;
892 1.1 augustss }
893 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
894 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
895 1.1 augustss goto bad4;
896 1.1 augustss xfer->td->td_flags =
897 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
898 1.1 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR;
899 1.1 augustss xfer->td->td_cbp = DMAADDR(dmap);
900 1.1 augustss xfer->nexttd = stat;
901 1.1 augustss xfer->td->td_nexttd = stat->physaddr;
902 1.1 augustss xfer->td->td_be = xfer->td->td_cbp + len - 1;
903 1.1 augustss xfer->len = len;
904 1.1 augustss xfer->reqh = reqh;
905 1.1 augustss
906 1.1 augustss next = xfer;
907 1.1 augustss } else
908 1.1 augustss next = stat;
909 1.1 augustss
910 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
911 1.1 augustss if (!isread && len != 0)
912 1.1 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
913 1.1 augustss
914 1.1 augustss setup->td->td_flags = OHCI_TD_SETUP | OHCI_TD_NOCC |
915 1.1 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR;
916 1.1 augustss setup->td->td_cbp = DMAADDR(&opipe->u.ctl.reqdma);
917 1.1 augustss setup->nexttd = next;
918 1.1 augustss setup->td->td_nexttd = next->physaddr;
919 1.1 augustss setup->td->td_be = setup->td->td_cbp + sizeof *req - 1;
920 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
921 1.1 augustss setup->reqh = reqh;
922 1.1 augustss
923 1.1 augustss stat->td->td_flags =
924 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
925 1.1 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1);
926 1.1 augustss stat->td->td_cbp = 0;
927 1.1 augustss stat->nexttd = tail;
928 1.1 augustss stat->td->td_nexttd = tail->physaddr;
929 1.1 augustss stat->td->td_be = 0;
930 1.1 augustss stat->len = 0;
931 1.1 augustss stat->reqh = reqh;
932 1.1 augustss
933 1.1 augustss reqh->actlen = 0;
934 1.1 augustss reqh->hcpriv = stat;
935 1.1 augustss
936 1.1 augustss #if USB_DEBUG
937 1.1 augustss if (ohcidebug > 5) {
938 1.1 augustss printf("ohci_device_request:\n");
939 1.1 augustss ohci_dump_ed(sed);
940 1.1 augustss ohci_dump_tds(setup);
941 1.1 augustss }
942 1.1 augustss #endif
943 1.1 augustss
944 1.1 augustss /* Insert ED in schedule */
945 1.1 augustss s = splusb();
946 1.1 augustss ohci_hash_add_td(sc, setup);
947 1.1 augustss if (len != 0)
948 1.1 augustss ohci_hash_add_td(sc, xfer);
949 1.1 augustss ohci_hash_add_td(sc, stat);
950 1.1 augustss sed->ed->ed_tailp = tail->physaddr;
951 1.1 augustss opipe->tail = tail;
952 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
953 1.1 augustss if (reqh->timeout && !usbd_use_polling)
954 1.1 augustss timeout(ohci_timeout, reqh, MS_TO_TICKS(reqh->timeout));
955 1.1 augustss splx(s);
956 1.1 augustss
957 1.1 augustss #if USB_DEBUG
958 1.1 augustss if (ohcidebug > 5) {
959 1.1 augustss delay(5000);
960 1.1 augustss printf("ohci_device_request: status=%x\n",
961 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
962 1.1 augustss ohci_dump_ed(sed);
963 1.1 augustss ohci_dump_tds(setup);
964 1.1 augustss }
965 1.1 augustss #endif
966 1.1 augustss
967 1.1 augustss return (USBD_NORMAL_COMPLETION);
968 1.1 augustss
969 1.1 augustss bad4:
970 1.1 augustss ohci_free_std(sc, xfer);
971 1.1 augustss bad3:
972 1.1 augustss ohci_free_std(sc, tail);
973 1.1 augustss bad2:
974 1.1 augustss ohci_free_std(sc, stat);
975 1.1 augustss bad1:
976 1.1 augustss return (r);
977 1.1 augustss }
978 1.1 augustss
979 1.1 augustss /*
980 1.1 augustss * Add an ED to the schedule. Called at splusb().
981 1.1 augustss */
982 1.1 augustss void
983 1.3 augustss ohci_add_ed(sed, head)
984 1.1 augustss ohci_soft_ed_t *sed;
985 1.1 augustss ohci_soft_ed_t *head;
986 1.1 augustss {
987 1.1 augustss sed->next = head->next;
988 1.1 augustss sed->ed->ed_nexted = head->ed->ed_nexted;
989 1.1 augustss head->next = sed;
990 1.1 augustss head->ed->ed_nexted = sed->physaddr;
991 1.1 augustss }
992 1.1 augustss
993 1.1 augustss /*
994 1.3 augustss * Remove an ED from the schedule. Called at splusb().
995 1.3 augustss */
996 1.3 augustss void
997 1.3 augustss ohci_rem_ed(sed, head)
998 1.3 augustss ohci_soft_ed_t *sed;
999 1.3 augustss ohci_soft_ed_t *head;
1000 1.3 augustss {
1001 1.3 augustss ohci_soft_ed_t *p;
1002 1.3 augustss
1003 1.3 augustss /* XXX */
1004 1.3 augustss for (p = head; p && p->next != sed; p = p->next)
1005 1.3 augustss ;
1006 1.3 augustss if (!p)
1007 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1008 1.3 augustss p->next = sed->next;
1009 1.3 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
1010 1.3 augustss }
1011 1.3 augustss
1012 1.3 augustss /*
1013 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1014 1.1 augustss * the host controller. This queue is the processed by software.
1015 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1016 1.1 augustss * and we have no simple way to translate this back a kernel address.
1017 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1018 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1019 1.1 augustss * hash value.
1020 1.1 augustss */
1021 1.1 augustss
1022 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1023 1.1 augustss /* Called at splusb() */
1024 1.1 augustss void
1025 1.1 augustss ohci_hash_add_td(sc, std)
1026 1.1 augustss ohci_softc_t *sc;
1027 1.1 augustss ohci_soft_td_t *std;
1028 1.1 augustss {
1029 1.1 augustss int h = HASH(std->physaddr);
1030 1.1 augustss
1031 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1032 1.1 augustss }
1033 1.1 augustss
1034 1.1 augustss /* Called at splusb() */
1035 1.1 augustss void
1036 1.1 augustss ohci_hash_rem_td(sc, std)
1037 1.1 augustss ohci_softc_t *sc;
1038 1.1 augustss ohci_soft_td_t *std;
1039 1.1 augustss {
1040 1.1 augustss LIST_REMOVE(std, hnext);
1041 1.1 augustss }
1042 1.1 augustss
1043 1.1 augustss ohci_soft_td_t *
1044 1.1 augustss ohci_hash_find_td(sc, a)
1045 1.1 augustss ohci_softc_t *sc;
1046 1.1 augustss ohci_physaddr_t a;
1047 1.1 augustss {
1048 1.1 augustss int h = HASH(a);
1049 1.1 augustss ohci_soft_td_t *std;
1050 1.1 augustss
1051 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1052 1.1 augustss std != 0;
1053 1.1 augustss std = LIST_NEXT(std, hnext))
1054 1.1 augustss if (std->physaddr == a)
1055 1.1 augustss return (std);
1056 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1057 1.1 augustss }
1058 1.1 augustss
1059 1.1 augustss void
1060 1.1 augustss ohci_timeout(addr)
1061 1.1 augustss void *addr;
1062 1.1 augustss {
1063 1.1 augustss #if 0
1064 1.1 augustss usbd_request_handle *reqh = addr;
1065 1.1 augustss int s;
1066 1.1 augustss
1067 1.1 augustss DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1068 1.1 augustss s = splusb();
1069 1.1 augustss /* XXX need to inactivate TD before calling interrupt routine */
1070 1.1 augustss ohci_XXX_done(reqh);
1071 1.1 augustss splx(s);
1072 1.1 augustss #endif
1073 1.1 augustss }
1074 1.1 augustss
1075 1.1 augustss #ifdef USB_DEBUG
1076 1.1 augustss void
1077 1.1 augustss ohci_dump_tds(std)
1078 1.1 augustss ohci_soft_td_t *std;
1079 1.1 augustss {
1080 1.1 augustss for (; std; std = std->nexttd)
1081 1.1 augustss ohci_dump_td(std);
1082 1.1 augustss }
1083 1.1 augustss
1084 1.1 augustss void
1085 1.1 augustss ohci_dump_td(std)
1086 1.1 augustss ohci_soft_td_t *std;
1087 1.1 augustss {
1088 1.1 augustss printf("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx nexttd=0x%08lx be=0x%08lx\n",
1089 1.1 augustss std, (u_long)std->physaddr,
1090 1.1 augustss (u_long)std->td->td_flags,
1091 1.1 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1092 1.1 augustss OHCI_TD_GET_DI(std->td->td_flags),
1093 1.1 augustss OHCI_TD_GET_EC(std->td->td_flags),
1094 1.1 augustss OHCI_TD_GET_CC(std->td->td_flags),
1095 1.1 augustss (u_long)std->td->td_cbp,
1096 1.1 augustss (u_long)std->td->td_nexttd, (u_long)std->td->td_be);
1097 1.1 augustss }
1098 1.1 augustss
1099 1.1 augustss void
1100 1.1 augustss ohci_dump_ed(sed)
1101 1.1 augustss ohci_soft_ed_t *sed;
1102 1.1 augustss {
1103 1.1 augustss printf("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx headp=%b nexted=0x%08lx\n",
1104 1.1 augustss sed, (u_long)sed->physaddr,
1105 1.1 augustss OHCI_ED_GET_FA(sed->ed->ed_flags),
1106 1.1 augustss OHCI_ED_GET_EN(sed->ed->ed_flags),
1107 1.1 augustss OHCI_ED_GET_MAXP(sed->ed->ed_flags),
1108 1.1 augustss (u_long)sed->ed->ed_flags,
1109 1.1 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\18ISO",
1110 1.1 augustss (u_long)sed->ed->ed_tailp,
1111 1.1 augustss (u_long)sed->ed->ed_headp, "\20\1HALT\2CARRY",
1112 1.1 augustss (u_long)sed->ed->ed_nexted);
1113 1.1 augustss }
1114 1.1 augustss #endif
1115 1.1 augustss
1116 1.1 augustss usbd_status
1117 1.1 augustss ohci_open(pipe)
1118 1.1 augustss usbd_pipe_handle pipe;
1119 1.1 augustss {
1120 1.1 augustss usbd_device_handle dev = pipe->device;
1121 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1122 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1123 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1124 1.1 augustss u_int8_t addr = dev->address;
1125 1.1 augustss ohci_soft_ed_t *sed;
1126 1.1 augustss ohci_soft_td_t *std;
1127 1.1 augustss usbd_status r;
1128 1.1 augustss int s;
1129 1.1 augustss
1130 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1131 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1132 1.1 augustss if (addr == sc->sc_addr) {
1133 1.1 augustss switch (ed->bEndpointAddress) {
1134 1.1 augustss case USB_CONTROL_ENDPOINT:
1135 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1136 1.1 augustss break;
1137 1.1 augustss case UE_IN | OHCI_INTR_ENDPT:
1138 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1139 1.1 augustss break;
1140 1.1 augustss default:
1141 1.1 augustss return (USBD_INVAL);
1142 1.1 augustss }
1143 1.1 augustss } else {
1144 1.1 augustss sed = ohci_alloc_sed(sc);
1145 1.1 augustss if (sed == 0)
1146 1.1 augustss goto bad0;
1147 1.1 augustss std = ohci_alloc_std(sc);
1148 1.1 augustss if (std == 0)
1149 1.1 augustss goto bad1;
1150 1.1 augustss opipe->sed = sed;
1151 1.1 augustss opipe->tail = std;
1152 1.1 augustss sed->ed->ed_flags =
1153 1.1 augustss OHCI_ED_SET_FA(addr) |
1154 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1155 1.1 augustss OHCI_ED_DIR_TD |
1156 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1157 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1158 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1159 1.2 augustss OHCI_ED_SET_MAXP(UGETW(pipe->endpoint->edesc->wMaxPacketSize));
1160 1.1 augustss sed->ed->ed_headp = sed->ed->ed_tailp = std->physaddr;
1161 1.1 augustss
1162 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1163 1.1 augustss case UE_CONTROL:
1164 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1165 1.4 augustss r = usb_allocmem(sc->sc_dmatag,
1166 1.4 augustss sizeof(usb_device_request_t),
1167 1.4 augustss 0, &opipe->u.ctl.reqdma);
1168 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1169 1.1 augustss goto bad;
1170 1.1 augustss s = splusb();
1171 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1172 1.1 augustss splx(s);
1173 1.1 augustss break;
1174 1.1 augustss case UE_INTERRUPT:
1175 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1176 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1177 1.1 augustss case UE_ISOCHRONOUS:
1178 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1179 1.1 augustss return (USBD_XXX);
1180 1.1 augustss case UE_BULK:
1181 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1182 1.3 augustss s = splusb();
1183 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1184 1.3 augustss splx(s);
1185 1.3 augustss break;
1186 1.1 augustss }
1187 1.1 augustss }
1188 1.1 augustss return (USBD_NORMAL_COMPLETION);
1189 1.1 augustss
1190 1.1 augustss bad:
1191 1.1 augustss ohci_free_std(sc, std);
1192 1.1 augustss bad1:
1193 1.1 augustss ohci_free_sed(sc, sed);
1194 1.1 augustss bad0:
1195 1.1 augustss return (USBD_NOMEM);
1196 1.1 augustss
1197 1.1 augustss }
1198 1.1 augustss
1199 1.1 augustss /*
1200 1.1 augustss * Data structures and routines to emulate the root hub.
1201 1.1 augustss */
1202 1.1 augustss usb_device_descriptor_t ohci_devd = {
1203 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1204 1.1 augustss UDESC_DEVICE, /* type */
1205 1.1 augustss {0x00, 0x01}, /* USB version */
1206 1.1 augustss UCLASS_HUB, /* class */
1207 1.1 augustss USUBCLASS_HUB, /* subclass */
1208 1.1 augustss 0, /* protocol */
1209 1.1 augustss 64, /* max packet */
1210 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1211 1.1 augustss 1,2,0, /* string indicies */
1212 1.1 augustss 1 /* # of configurations */
1213 1.1 augustss };
1214 1.1 augustss
1215 1.1 augustss usb_config_descriptor_t ohci_confd = {
1216 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1217 1.1 augustss UDESC_CONFIG,
1218 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1219 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1220 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1221 1.1 augustss 1,
1222 1.1 augustss 1,
1223 1.1 augustss 0,
1224 1.1 augustss UC_SELF_POWERED,
1225 1.1 augustss 0 /* max power */
1226 1.1 augustss };
1227 1.1 augustss
1228 1.1 augustss usb_interface_descriptor_t ohci_ifcd = {
1229 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1230 1.1 augustss UDESC_INTERFACE,
1231 1.1 augustss 0,
1232 1.1 augustss 0,
1233 1.1 augustss 1,
1234 1.1 augustss UCLASS_HUB,
1235 1.1 augustss USUBCLASS_HUB,
1236 1.1 augustss 0,
1237 1.1 augustss 0
1238 1.1 augustss };
1239 1.1 augustss
1240 1.1 augustss usb_endpoint_descriptor_t ohci_endpd = {
1241 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1242 1.1 augustss UDESC_ENDPOINT,
1243 1.1 augustss UE_IN | OHCI_INTR_ENDPT,
1244 1.1 augustss UE_INTERRUPT,
1245 1.1 augustss {8, 0}, /* max packet */
1246 1.1 augustss 255
1247 1.1 augustss };
1248 1.1 augustss
1249 1.1 augustss usb_hub_descriptor_t ohci_hubd = {
1250 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1251 1.1 augustss UDESC_HUB,
1252 1.1 augustss 0,
1253 1.1 augustss {0,0},
1254 1.1 augustss 0,
1255 1.1 augustss 0,
1256 1.1 augustss {0},
1257 1.1 augustss {0},
1258 1.1 augustss };
1259 1.1 augustss
1260 1.1 augustss int
1261 1.1 augustss ohci_str(p, l, s)
1262 1.1 augustss usb_string_descriptor_t *p;
1263 1.1 augustss int l;
1264 1.1 augustss char *s;
1265 1.1 augustss {
1266 1.1 augustss int i;
1267 1.1 augustss
1268 1.1 augustss if (l == 0)
1269 1.1 augustss return (0);
1270 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1271 1.1 augustss if (l == 1)
1272 1.1 augustss return (1);
1273 1.1 augustss p->bDescriptorType = UDESC_STRING;
1274 1.1 augustss l -= 2;
1275 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1276 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1277 1.1 augustss return (2*i+2);
1278 1.1 augustss }
1279 1.1 augustss
1280 1.1 augustss /*
1281 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1282 1.1 augustss */
1283 1.1 augustss usbd_status
1284 1.1 augustss ohci_root_ctrl_transfer(reqh)
1285 1.1 augustss usbd_request_handle reqh;
1286 1.1 augustss {
1287 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1288 1.1 augustss usb_device_request_t *req;
1289 1.1 augustss void *buf;
1290 1.1 augustss int port, i;
1291 1.1 augustss int len, value, index, l, totlen = 0;
1292 1.1 augustss usb_port_status_t ps;
1293 1.1 augustss usb_hub_descriptor_t hubd;
1294 1.1 augustss usbd_status r;
1295 1.1 augustss u_int32_t v;
1296 1.1 augustss
1297 1.1 augustss if (!reqh->isreq)
1298 1.1 augustss /* XXX panic */
1299 1.1 augustss return (USBD_INVAL);
1300 1.1 augustss req = &reqh->request;
1301 1.1 augustss buf = reqh->buffer;
1302 1.1 augustss
1303 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1304 1.1 augustss req->bmRequestType, req->bRequest));
1305 1.1 augustss
1306 1.1 augustss len = UGETW(req->wLength);
1307 1.1 augustss value = UGETW(req->wValue);
1308 1.1 augustss index = UGETW(req->wIndex);
1309 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1310 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1311 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1312 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1313 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1314 1.1 augustss /*
1315 1.1 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_STALL are no-ops
1316 1.1 augustss * for the integrated root hub.
1317 1.1 augustss */
1318 1.1 augustss break;
1319 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1320 1.1 augustss if (len > 0) {
1321 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1322 1.1 augustss totlen = 1;
1323 1.1 augustss }
1324 1.1 augustss break;
1325 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1326 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1327 1.1 augustss switch(value >> 8) {
1328 1.1 augustss case UDESC_DEVICE:
1329 1.1 augustss if ((value & 0xff) != 0) {
1330 1.1 augustss r = USBD_IOERROR;
1331 1.1 augustss goto ret;
1332 1.1 augustss }
1333 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1334 1.1 augustss memcpy(buf, &ohci_devd, l);
1335 1.1 augustss break;
1336 1.1 augustss case UDESC_CONFIG:
1337 1.1 augustss if ((value & 0xff) != 0) {
1338 1.1 augustss r = USBD_IOERROR;
1339 1.1 augustss goto ret;
1340 1.1 augustss }
1341 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1342 1.1 augustss memcpy(buf, &ohci_confd, l);
1343 1.1 augustss buf = (char *)buf + l;
1344 1.1 augustss len -= l;
1345 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1346 1.1 augustss totlen += l;
1347 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1348 1.1 augustss buf = (char *)buf + l;
1349 1.1 augustss len -= l;
1350 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1351 1.1 augustss totlen += l;
1352 1.1 augustss memcpy(buf, &ohci_endpd, l);
1353 1.1 augustss break;
1354 1.1 augustss case UDESC_STRING:
1355 1.1 augustss if (len == 0)
1356 1.1 augustss break;
1357 1.1 augustss *(u_int8_t *)buf = 0;
1358 1.1 augustss totlen = 1;
1359 1.1 augustss switch (value & 0xff) {
1360 1.1 augustss case 1: /* Vendor */
1361 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1362 1.1 augustss break;
1363 1.1 augustss case 2: /* Product */
1364 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1365 1.1 augustss break;
1366 1.1 augustss }
1367 1.1 augustss break;
1368 1.1 augustss default:
1369 1.1 augustss r = USBD_IOERROR;
1370 1.1 augustss goto ret;
1371 1.1 augustss }
1372 1.1 augustss break;
1373 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1374 1.1 augustss if (len > 0) {
1375 1.1 augustss *(u_int8_t *)buf = 0;
1376 1.1 augustss totlen = 1;
1377 1.1 augustss }
1378 1.1 augustss break;
1379 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1380 1.1 augustss if (len > 1) {
1381 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1382 1.1 augustss totlen = 2;
1383 1.1 augustss }
1384 1.1 augustss break;
1385 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1386 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1387 1.1 augustss if (len > 1) {
1388 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1389 1.1 augustss totlen = 2;
1390 1.1 augustss }
1391 1.1 augustss break;
1392 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1393 1.1 augustss if (value >= USB_MAX_DEVICES) {
1394 1.1 augustss r = USBD_IOERROR;
1395 1.1 augustss goto ret;
1396 1.1 augustss }
1397 1.1 augustss sc->sc_addr = value;
1398 1.1 augustss break;
1399 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1400 1.1 augustss if (value != 0 && value != 1) {
1401 1.1 augustss r = USBD_IOERROR;
1402 1.1 augustss goto ret;
1403 1.1 augustss }
1404 1.1 augustss sc->sc_conf = value;
1405 1.1 augustss break;
1406 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1407 1.1 augustss break;
1408 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1409 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1410 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1411 1.1 augustss r = USBD_IOERROR;
1412 1.1 augustss goto ret;
1413 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1414 1.1 augustss break;
1415 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1416 1.1 augustss break;
1417 1.1 augustss /* Hub requests */
1418 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1419 1.1 augustss break;
1420 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1421 1.1 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE port=%d feature=%d\n",
1422 1.1 augustss index, value));
1423 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1424 1.1 augustss r = USBD_IOERROR;
1425 1.1 augustss goto ret;
1426 1.1 augustss }
1427 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1428 1.1 augustss switch(value) {
1429 1.1 augustss case UHF_PORT_ENABLE:
1430 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1431 1.1 augustss break;
1432 1.1 augustss case UHF_PORT_SUSPEND:
1433 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1434 1.1 augustss break;
1435 1.1 augustss case UHF_PORT_POWER:
1436 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1437 1.1 augustss break;
1438 1.1 augustss case UHF_C_PORT_CONNECTION:
1439 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1440 1.1 augustss break;
1441 1.1 augustss case UHF_C_PORT_ENABLE:
1442 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1443 1.1 augustss break;
1444 1.1 augustss case UHF_C_PORT_SUSPEND:
1445 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1446 1.1 augustss break;
1447 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1448 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1449 1.1 augustss break;
1450 1.1 augustss case UHF_C_PORT_RESET:
1451 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1452 1.1 augustss break;
1453 1.1 augustss default:
1454 1.1 augustss r = USBD_IOERROR;
1455 1.1 augustss goto ret;
1456 1.1 augustss }
1457 1.1 augustss switch(value) {
1458 1.1 augustss case UHF_C_PORT_CONNECTION:
1459 1.1 augustss case UHF_C_PORT_ENABLE:
1460 1.1 augustss case UHF_C_PORT_SUSPEND:
1461 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1462 1.1 augustss case UHF_C_PORT_RESET:
1463 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1464 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1465 1.1 augustss ohci_rhsc_able(sc, 1);
1466 1.1 augustss break;
1467 1.1 augustss default:
1468 1.1 augustss break;
1469 1.1 augustss }
1470 1.1 augustss break;
1471 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1472 1.1 augustss if (value != 0) {
1473 1.1 augustss r = USBD_IOERROR;
1474 1.1 augustss goto ret;
1475 1.1 augustss }
1476 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1477 1.1 augustss hubd = ohci_hubd;
1478 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1479 1.1 augustss USETW(hubd.bHubCharacteristics,
1480 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1481 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1482 1.1 augustss /* XXX overcurrent */
1483 1.1 augustss );
1484 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1485 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1486 1.1 augustss if (sc->sc_noport < 8) {
1487 1.1 augustss hubd.DeviceRemovable[0] = (u_int8_t)v;
1488 1.1 augustss hubd.PortPowerCtrlMask[0] = (u_int8_t)(v >> 16);
1489 1.1 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE;
1490 1.1 augustss } else {
1491 1.1 augustss hubd.DeviceRemovable[0] = (u_int8_t)v;
1492 1.1 augustss hubd.DeviceRemovable[1] = (u_int8_t)(v>>8);
1493 1.1 augustss hubd.PortPowerCtrlMask[1] = (u_int8_t)(v >> 16);
1494 1.1 augustss hubd.PortPowerCtrlMask[2] = (u_int8_t)(v >> 24);
1495 1.1 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + 2;
1496 1.1 augustss }
1497 1.1 augustss l = min(len, hubd.bDescLength);
1498 1.1 augustss totlen = l;
1499 1.1 augustss memcpy(buf, &hubd, l);
1500 1.1 augustss break;
1501 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1502 1.1 augustss if (len != 4) {
1503 1.1 augustss r = USBD_IOERROR;
1504 1.1 augustss goto ret;
1505 1.1 augustss }
1506 1.1 augustss memset(buf, 0, len); /* ? XXX */
1507 1.1 augustss totlen = len;
1508 1.1 augustss break;
1509 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1510 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1511 1.1 augustss index));
1512 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1513 1.1 augustss r = USBD_IOERROR;
1514 1.1 augustss goto ret;
1515 1.1 augustss }
1516 1.1 augustss if (len != 4) {
1517 1.1 augustss r = USBD_IOERROR;
1518 1.1 augustss goto ret;
1519 1.1 augustss }
1520 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1521 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1522 1.1 augustss v));
1523 1.1 augustss USETW(ps.wPortStatus, v);
1524 1.1 augustss USETW(ps.wPortChange, v >> 16);
1525 1.1 augustss l = min(len, sizeof ps);
1526 1.1 augustss memcpy(buf, &ps, l);
1527 1.1 augustss totlen = l;
1528 1.1 augustss break;
1529 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1530 1.1 augustss r = USBD_IOERROR;
1531 1.1 augustss goto ret;
1532 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1533 1.1 augustss break;
1534 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1535 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1536 1.1 augustss r = USBD_IOERROR;
1537 1.1 augustss goto ret;
1538 1.1 augustss }
1539 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1540 1.1 augustss switch(value) {
1541 1.1 augustss case UHF_PORT_ENABLE:
1542 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
1543 1.1 augustss break;
1544 1.1 augustss case UHF_PORT_SUSPEND:
1545 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
1546 1.1 augustss break;
1547 1.1 augustss case UHF_PORT_RESET:
1548 1.1 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", index));
1549 1.1 augustss OWRITE4(sc, port, UPS_RESET);
1550 1.1 augustss for (i = 0; i < 10; i++) {
1551 1.1 augustss usbd_delay_ms(10);
1552 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
1553 1.1 augustss break;
1554 1.1 augustss }
1555 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1556 1.1 augustss index, OREAD4(sc, port)));
1557 1.1 augustss break;
1558 1.1 augustss case UHF_PORT_POWER:
1559 1.1 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power %d\n", index));
1560 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
1561 1.1 augustss break;
1562 1.1 augustss default:
1563 1.1 augustss r = USBD_IOERROR;
1564 1.1 augustss goto ret;
1565 1.1 augustss }
1566 1.1 augustss break;
1567 1.1 augustss default:
1568 1.1 augustss r = USBD_IOERROR;
1569 1.1 augustss goto ret;
1570 1.1 augustss }
1571 1.1 augustss reqh->actlen = totlen;
1572 1.1 augustss r = USBD_NORMAL_COMPLETION;
1573 1.1 augustss ret:
1574 1.1 augustss reqh->status = r;
1575 1.1 augustss reqh->xfercb(reqh);
1576 1.1 augustss return (USBD_IN_PROGRESS);
1577 1.1 augustss }
1578 1.1 augustss
1579 1.1 augustss /* Abort a root control request. */
1580 1.1 augustss void
1581 1.1 augustss ohci_root_ctrl_abort(reqh)
1582 1.1 augustss usbd_request_handle reqh;
1583 1.1 augustss {
1584 1.3 augustss /* Nothing to do, all transfers are syncronous. */
1585 1.1 augustss }
1586 1.1 augustss
1587 1.1 augustss /* Close the root pipe. */
1588 1.1 augustss void
1589 1.1 augustss ohci_root_ctrl_close(pipe)
1590 1.1 augustss usbd_pipe_handle pipe;
1591 1.1 augustss {
1592 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
1593 1.1 augustss }
1594 1.1 augustss
1595 1.1 augustss usbd_status
1596 1.1 augustss ohci_root_intr_transfer(reqh)
1597 1.1 augustss usbd_request_handle reqh;
1598 1.1 augustss {
1599 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
1600 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1601 1.1 augustss struct ohci_pipe *upipe = (struct ohci_pipe *)pipe;
1602 1.4 augustss usb_dma_t *dmap;
1603 1.1 augustss usbd_status r;
1604 1.1 augustss int len;
1605 1.1 augustss
1606 1.1 augustss len = reqh->length;
1607 1.1 augustss dmap = &upipe->u.intr.datadma;
1608 1.1 augustss if (len == 0)
1609 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
1610 1.1 augustss
1611 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1612 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1613 1.1 augustss return (r);
1614 1.1 augustss sc->sc_intrreqh = reqh;
1615 1.1 augustss
1616 1.1 augustss return (USBD_IN_PROGRESS);
1617 1.1 augustss }
1618 1.1 augustss
1619 1.3 augustss /* Abort a root interrupt request. */
1620 1.1 augustss void
1621 1.1 augustss ohci_root_intr_abort(reqh)
1622 1.1 augustss usbd_request_handle reqh;
1623 1.1 augustss {
1624 1.3 augustss /* No need to abort. */
1625 1.1 augustss }
1626 1.1 augustss
1627 1.1 augustss /* Close the root pipe. */
1628 1.1 augustss void
1629 1.1 augustss ohci_root_intr_close(pipe)
1630 1.1 augustss usbd_pipe_handle pipe;
1631 1.1 augustss {
1632 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1633 1.1 augustss sc->sc_intrreqh = 0;
1634 1.1 augustss
1635 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
1636 1.1 augustss }
1637 1.1 augustss
1638 1.1 augustss /************************/
1639 1.1 augustss
1640 1.1 augustss usbd_status
1641 1.1 augustss ohci_device_ctrl_transfer(reqh)
1642 1.1 augustss usbd_request_handle reqh;
1643 1.1 augustss {
1644 1.1 augustss usbd_status r;
1645 1.1 augustss
1646 1.1 augustss if (!reqh->isreq) {
1647 1.1 augustss /* XXX panic */
1648 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
1649 1.1 augustss return (USBD_INVAL);
1650 1.1 augustss }
1651 1.1 augustss
1652 1.1 augustss r = ohci_device_request(reqh);
1653 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1654 1.1 augustss return (r);
1655 1.1 augustss
1656 1.1 augustss if (usbd_use_polling)
1657 1.1 augustss ohci_waitintr((ohci_softc_t *)reqh->pipe->device->bus, reqh);
1658 1.1 augustss return (USBD_IN_PROGRESS);
1659 1.1 augustss }
1660 1.1 augustss
1661 1.1 augustss /* Abort a device control request. */
1662 1.1 augustss void
1663 1.1 augustss ohci_device_ctrl_abort(reqh)
1664 1.1 augustss usbd_request_handle reqh;
1665 1.1 augustss {
1666 1.3 augustss /* XXX inactivate */
1667 1.3 augustss usbd_delay_ms(1); /* make sure it is finished */
1668 1.3 augustss /* XXX call done */
1669 1.1 augustss }
1670 1.1 augustss
1671 1.1 augustss /* Close a device control pipe. */
1672 1.1 augustss void
1673 1.1 augustss ohci_device_ctrl_close(pipe)
1674 1.1 augustss usbd_pipe_handle pipe;
1675 1.1 augustss {
1676 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1677 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1678 1.3 augustss ohci_soft_ed_t *sed = opipe->sed;
1679 1.1 augustss int s;
1680 1.1 augustss
1681 1.1 augustss s = splusb();
1682 1.1 augustss sed->ed->ed_flags |= OHCI_ED_SKIP;
1683 1.1 augustss if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp)
1684 1.1 augustss usbd_delay_ms(2);
1685 1.3 augustss ohci_rem_ed(sed, sc->sc_ctrl_head);
1686 1.3 augustss splx(s);
1687 1.3 augustss ohci_free_std(sc, opipe->tail);
1688 1.3 augustss ohci_free_sed(sc, opipe->sed);
1689 1.3 augustss /* XXX free other resources */
1690 1.3 augustss }
1691 1.3 augustss
1692 1.3 augustss /************************/
1693 1.3 augustss
1694 1.3 augustss usbd_status
1695 1.3 augustss ohci_device_bulk_transfer(reqh)
1696 1.3 augustss usbd_request_handle reqh;
1697 1.3 augustss {
1698 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1699 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
1700 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1701 1.3 augustss int addr = dev->address;
1702 1.3 augustss ohci_soft_td_t *xfer, *tail;
1703 1.3 augustss ohci_soft_ed_t *sed;
1704 1.4 augustss usb_dma_t *dmap;
1705 1.3 augustss usbd_status r;
1706 1.3 augustss int s, len, isread;
1707 1.3 augustss
1708 1.3 augustss if (reqh->isreq) {
1709 1.3 augustss /* XXX panic */
1710 1.3 augustss printf("ohci_device_bulk_transfer: a request\n");
1711 1.3 augustss return (USBD_INVAL);
1712 1.3 augustss }
1713 1.3 augustss
1714 1.3 augustss len = reqh->length;
1715 1.3 augustss dmap = &opipe->u.bulk.datadma;
1716 1.3 augustss isread = reqh->pipe->endpoint->edesc->bEndpointAddress & UE_IN;
1717 1.3 augustss sed = opipe->sed;
1718 1.3 augustss
1719 1.3 augustss opipe->u.bulk.length = len;
1720 1.3 augustss
1721 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1722 1.3 augustss if (r != USBD_NORMAL_COMPLETION)
1723 1.3 augustss goto ret1;
1724 1.3 augustss
1725 1.3 augustss tail = ohci_alloc_std(sc);
1726 1.3 augustss if (!tail) {
1727 1.3 augustss r = USBD_NOMEM;
1728 1.3 augustss goto ret2;
1729 1.3 augustss }
1730 1.3 augustss tail->reqh = 0;
1731 1.3 augustss
1732 1.3 augustss /* Update device address */
1733 1.3 augustss sed->ed->ed_flags =
1734 1.3 augustss (sed->ed->ed_flags & ~OHCI_ED_ADDRMASK) |
1735 1.3 augustss OHCI_ED_SET_FA(addr);
1736 1.3 augustss
1737 1.3 augustss /* Set up data transaction */
1738 1.3 augustss xfer = opipe->tail;
1739 1.3 augustss xfer->td->td_flags =
1740 1.3 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1741 1.3 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY;
1742 1.3 augustss xfer->td->td_cbp = DMAADDR(dmap);
1743 1.3 augustss xfer->nexttd = tail;
1744 1.3 augustss xfer->td->td_nexttd = tail->physaddr;
1745 1.3 augustss xfer->td->td_be = xfer->td->td_cbp + len - 1;
1746 1.3 augustss xfer->len = len;
1747 1.3 augustss xfer->reqh = reqh;
1748 1.3 augustss
1749 1.3 augustss reqh->actlen = 0;
1750 1.3 augustss reqh->hcpriv = xfer;
1751 1.3 augustss
1752 1.3 augustss if (!isread)
1753 1.3 augustss memcpy(KERNADDR(dmap), reqh->buffer, len);
1754 1.3 augustss
1755 1.3 augustss /* Insert ED in schedule */
1756 1.3 augustss s = splusb();
1757 1.3 augustss ohci_hash_add_td(sc, xfer);
1758 1.3 augustss sed->ed->ed_tailp = tail->physaddr;
1759 1.3 augustss opipe->tail = tail;
1760 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
1761 1.3 augustss if (reqh->timeout && !usbd_use_polling)
1762 1.3 augustss timeout(ohci_timeout, reqh, MS_TO_TICKS(reqh->timeout));
1763 1.3 augustss splx(s);
1764 1.3 augustss
1765 1.3 augustss return (USBD_IN_PROGRESS);
1766 1.3 augustss
1767 1.3 augustss ret2:
1768 1.4 augustss usb_freemem(sc->sc_dmatag, dmap);
1769 1.3 augustss ret1:
1770 1.3 augustss return (r);
1771 1.3 augustss }
1772 1.3 augustss
1773 1.3 augustss /* Abort a device bulk request. */
1774 1.3 augustss void
1775 1.3 augustss ohci_device_bulk_abort(reqh)
1776 1.3 augustss usbd_request_handle reqh;
1777 1.3 augustss {
1778 1.3 augustss #if 0
1779 1.3 augustss sed->ed->ed_flags |= OHCI_ED_SKIP;
1780 1.3 augustss if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp)
1781 1.3 augustss usbd_delay_ms(2);
1782 1.3 augustss #endif
1783 1.3 augustss /* XXX inactivate */
1784 1.3 augustss usbd_delay_ms(1); /* make sure it is finished */
1785 1.3 augustss /* XXX call done */
1786 1.3 augustss }
1787 1.3 augustss
1788 1.3 augustss /* Close a device bulk pipe. */
1789 1.3 augustss void
1790 1.3 augustss ohci_device_bulk_close(pipe)
1791 1.3 augustss usbd_pipe_handle pipe;
1792 1.3 augustss {
1793 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1794 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
1795 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1796 1.3 augustss int s;
1797 1.3 augustss
1798 1.3 augustss s = splusb();
1799 1.3 augustss ohci_rem_ed(opipe->sed, sc->sc_bulk_head);
1800 1.1 augustss splx(s);
1801 1.1 augustss ohci_free_std(sc, opipe->tail);
1802 1.1 augustss ohci_free_sed(sc, opipe->sed);
1803 1.1 augustss /* XXX free other resources */
1804 1.1 augustss }
1805 1.1 augustss
1806 1.1 augustss /************************/
1807 1.1 augustss
1808 1.1 augustss usbd_status
1809 1.1 augustss ohci_device_intr_transfer(reqh)
1810 1.1 augustss usbd_request_handle reqh;
1811 1.1 augustss {
1812 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1813 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1814 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1815 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1816 1.1 augustss ohci_soft_td_t *xfer, *tail;
1817 1.4 augustss usb_dma_t *dmap;
1818 1.1 augustss usbd_status r;
1819 1.1 augustss int len;
1820 1.1 augustss int s;
1821 1.1 augustss
1822 1.1 augustss DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p buf=%p len=%d flags=%d priv=%p\n",
1823 1.1 augustss reqh, reqh->buffer, reqh->length, reqh->flags, reqh->priv));
1824 1.1 augustss
1825 1.1 augustss if (reqh->isreq)
1826 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
1827 1.1 augustss
1828 1.1 augustss len = reqh->length;
1829 1.1 augustss dmap = &opipe->u.intr.datadma;
1830 1.1 augustss if (len == 0)
1831 1.1 augustss return (USBD_INVAL); /* XXX should it be? */
1832 1.1 augustss
1833 1.1 augustss xfer = opipe->tail;
1834 1.1 augustss tail = ohci_alloc_std(sc);
1835 1.1 augustss if (!tail) {
1836 1.1 augustss r = USBD_NOMEM;
1837 1.1 augustss goto ret1;
1838 1.1 augustss }
1839 1.1 augustss tail->reqh = 0;
1840 1.1 augustss
1841 1.4 augustss r = usb_allocmem(sc->sc_dmatag, len, 0, dmap);
1842 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1843 1.1 augustss goto ret2;
1844 1.1 augustss
1845 1.1 augustss xfer->td->td_flags = OHCI_TD_IN | OHCI_TD_NOCC |
1846 1.1 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY;
1847 1.1 augustss xfer->td->td_cbp = DMAADDR(dmap);
1848 1.1 augustss xfer->nexttd = tail;
1849 1.1 augustss xfer->td->td_nexttd = tail->physaddr;
1850 1.1 augustss xfer->td->td_be = xfer->td->td_cbp + len - 1;
1851 1.1 augustss xfer->len = len;
1852 1.1 augustss xfer->reqh = reqh;
1853 1.1 augustss
1854 1.1 augustss reqh->actlen = 0;
1855 1.1 augustss reqh->hcpriv = xfer;
1856 1.1 augustss
1857 1.1 augustss #if USB_DEBUG
1858 1.1 augustss if (ohcidebug > 5) {
1859 1.1 augustss printf("ohci_device_intr_transfer:\n");
1860 1.1 augustss ohci_dump_ed(sed);
1861 1.1 augustss ohci_dump_tds(xfer);
1862 1.1 augustss }
1863 1.1 augustss #endif
1864 1.1 augustss
1865 1.1 augustss /* Insert ED in schedule */
1866 1.1 augustss s = splusb();
1867 1.1 augustss ohci_hash_add_td(sc, xfer);
1868 1.1 augustss sed->ed->ed_tailp = tail->physaddr;
1869 1.1 augustss opipe->tail = tail;
1870 1.1 augustss #if 0
1871 1.1 augustss if (reqh->timeout && !usbd_use_polling)
1872 1.1 augustss timeout(ohci_timeout, reqh, MS_TO_TICKS(reqh->timeout));
1873 1.1 augustss #endif
1874 1.1 augustss sed->ed->ed_flags &= ~OHCI_ED_SKIP;
1875 1.1 augustss splx(s);
1876 1.1 augustss
1877 1.1 augustss #ifdef USB_DEBUG
1878 1.1 augustss if (ohcidebug > 5) {
1879 1.1 augustss delay(5000);
1880 1.1 augustss printf("ohci_device_intr_transfer: status=%x\n",
1881 1.1 augustss OREAD4(sc, OHCI_COMMAND_STATUS));
1882 1.1 augustss ohci_dump_ed(sed);
1883 1.1 augustss ohci_dump_tds(xfer);
1884 1.1 augustss }
1885 1.1 augustss #endif
1886 1.1 augustss
1887 1.1 augustss return (USBD_IN_PROGRESS);
1888 1.1 augustss
1889 1.1 augustss ret2:
1890 1.1 augustss ohci_free_std(sc, xfer);
1891 1.1 augustss ret1:
1892 1.1 augustss return (r);
1893 1.1 augustss }
1894 1.1 augustss
1895 1.1 augustss /* Abort a device control request. */
1896 1.1 augustss void
1897 1.1 augustss ohci_device_intr_abort(reqh)
1898 1.1 augustss usbd_request_handle reqh;
1899 1.1 augustss {
1900 1.1 augustss struct uhci_pipe *opipe;
1901 1.1 augustss
1902 1.3 augustss /* XXX inactivate */
1903 1.3 augustss usbd_delay_ms(1); /* make sure it is finished */
1904 1.1 augustss if (reqh->pipe->intrreqh == reqh) {
1905 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
1906 1.1 augustss reqh->pipe->intrreqh = 0;
1907 1.1 augustss opipe = (struct uhci_pipe *)reqh->pipe;
1908 1.1 augustss ohci_intr_done((ohci_softc_t *)reqh->pipe->device->bus, reqh);
1909 1.1 augustss }
1910 1.1 augustss }
1911 1.1 augustss
1912 1.1 augustss /* Close a device interrupt pipe. */
1913 1.1 augustss void
1914 1.1 augustss ohci_device_intr_close(pipe)
1915 1.1 augustss usbd_pipe_handle pipe;
1916 1.1 augustss {
1917 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1918 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1919 1.1 augustss int nslots = opipe->u.intr.nslots;
1920 1.1 augustss int pos = opipe->u.intr.pos;
1921 1.1 augustss int j;
1922 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
1923 1.1 augustss int s;
1924 1.1 augustss
1925 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
1926 1.1 augustss pipe, nslots, pos));
1927 1.1 augustss s = splusb();
1928 1.1 augustss sed->ed->ed_flags |= OHCI_ED_SKIP;
1929 1.1 augustss if ((sed->ed->ed_tailp & OHCI_TAILMASK) != sed->ed->ed_headp)
1930 1.1 augustss usbd_delay_ms(2);
1931 1.1 augustss
1932 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
1933 1.1 augustss ;
1934 1.1 augustss if (!p)
1935 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
1936 1.1 augustss p->next = sed->next;
1937 1.1 augustss p->ed->ed_nexted = sed->ed->ed_nexted;
1938 1.1 augustss splx(s);
1939 1.1 augustss
1940 1.1 augustss for (j = 0; j < nslots; j++)
1941 1.1 augustss --sc->sc_bws[pos * nslots + j];
1942 1.1 augustss
1943 1.1 augustss ohci_free_std(sc, opipe->tail);
1944 1.1 augustss ohci_free_sed(sc, opipe->sed);
1945 1.1 augustss /* XXX free other resources */
1946 1.1 augustss }
1947 1.1 augustss
1948 1.1 augustss usbd_status
1949 1.1 augustss ohci_device_setintr(sc, opipe, ival)
1950 1.1 augustss ohci_softc_t *sc;
1951 1.1 augustss struct ohci_pipe *opipe;
1952 1.1 augustss int ival;
1953 1.1 augustss {
1954 1.1 augustss int i, j, s, best;
1955 1.1 augustss u_int npoll, slow, shigh, nslots;
1956 1.1 augustss u_int bestbw, bw;
1957 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
1958 1.1 augustss
1959 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
1960 1.1 augustss if (ival == 0) {
1961 1.1 augustss printf("ohci_setintr: 0 interval\n");
1962 1.1 augustss return (USBD_INVAL);
1963 1.1 augustss }
1964 1.1 augustss
1965 1.1 augustss npoll = OHCI_NO_INTRS;
1966 1.1 augustss while (npoll > ival)
1967 1.1 augustss npoll /= 2;
1968 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
1969 1.1 augustss
1970 1.1 augustss /*
1971 1.1 augustss * We now know which level in the tree the ED must go into.
1972 1.1 augustss * Figure out which slot has most bandwidth left over.
1973 1.1 augustss * Slots to examine:
1974 1.1 augustss * npoll
1975 1.1 augustss * 1 0
1976 1.1 augustss * 2 1 2
1977 1.1 augustss * 4 3 4 5 6
1978 1.1 augustss * 8 7 8 9 10 11 12 13 14
1979 1.1 augustss * N (N-1) .. (N-1+N-1)
1980 1.1 augustss */
1981 1.1 augustss slow = npoll-1;
1982 1.1 augustss shigh = slow + npoll;
1983 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
1984 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
1985 1.1 augustss bw = 0;
1986 1.1 augustss for (j = 0; j < nslots; j++)
1987 1.1 augustss bw += sc->sc_bws[i * nslots + j];
1988 1.1 augustss if (bw < bestbw) {
1989 1.1 augustss best = i;
1990 1.1 augustss bestbw = bw;
1991 1.1 augustss }
1992 1.1 augustss }
1993 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
1994 1.1 augustss best, slow, shigh, bestbw));
1995 1.1 augustss
1996 1.1 augustss s = splusb();
1997 1.1 augustss hsed = sc->sc_eds[best];
1998 1.1 augustss sed->next = hsed->next;
1999 1.1 augustss sed->ed->ed_nexted = hsed->ed->ed_nexted;
2000 1.1 augustss hsed->next = sed;
2001 1.1 augustss hsed->ed->ed_nexted = sed->physaddr;
2002 1.1 augustss splx(s);
2003 1.1 augustss
2004 1.1 augustss for (j = 0; j < nslots; j++)
2005 1.1 augustss ++sc->sc_bws[best * nslots + j];
2006 1.1 augustss opipe->u.intr.nslots = nslots;
2007 1.1 augustss opipe->u.intr.pos = best;
2008 1.1 augustss
2009 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2010 1.1 augustss return (USBD_NORMAL_COMPLETION);
2011 1.1 augustss }
2012 1.1 augustss
2013