ohci.c revision 1.46 1 1.46 augustss /* $NetBSD: ohci.c,v 1.46 1999/09/13 21:33:25 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Open Host Controller driver.
42 1.1 augustss *
43 1.30 augustss * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
44 1.30 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
45 1.1 augustss */
46 1.1 augustss
47 1.1 augustss #include <sys/param.h>
48 1.1 augustss #include <sys/systm.h>
49 1.1 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
52 1.1 augustss #include <sys/device.h>
53 1.15 augustss #elif defined(__FreeBSD__)
54 1.15 augustss #include <sys/module.h>
55 1.15 augustss #include <sys/bus.h>
56 1.15 augustss #endif
57 1.1 augustss #include <sys/proc.h>
58 1.1 augustss #include <sys/queue.h>
59 1.1 augustss #include <sys/select.h>
60 1.1 augustss
61 1.4 augustss #include <machine/bus.h>
62 1.16 augustss #include <machine/endian.h>
63 1.4 augustss
64 1.1 augustss #include <dev/usb/usb.h>
65 1.1 augustss #include <dev/usb/usbdi.h>
66 1.1 augustss #include <dev/usb/usbdivar.h>
67 1.38 augustss #include <dev/usb/usb_mem.h>
68 1.1 augustss #include <dev/usb/usb_quirks.h>
69 1.1 augustss
70 1.1 augustss #include <dev/usb/ohcireg.h>
71 1.1 augustss #include <dev/usb/ohcivar.h>
72 1.1 augustss
73 1.15 augustss #if defined(__FreeBSD__)
74 1.15 augustss #include <machine/clock.h>
75 1.15 augustss
76 1.15 augustss #define delay(d) DELAY(d)
77 1.15 augustss
78 1.15 augustss #endif
79 1.1 augustss
80 1.36 augustss #if defined(__OpenBSD__)
81 1.36 augustss struct cfdriver ohci_cd = {
82 1.36 augustss NULL, "ohci", DV_DULL
83 1.36 augustss };
84 1.36 augustss #endif
85 1.36 augustss
86 1.16 augustss /*
87 1.16 augustss * The OHCI controller is little endian, so on big endian machines
88 1.16 augustss * the data strored in memory needs to be swapped.
89 1.16 augustss */
90 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
91 1.16 augustss #define LE(x) (bswap32(x))
92 1.16 augustss #else
93 1.16 augustss #define LE(x) (x)
94 1.16 augustss #endif
95 1.16 augustss
96 1.1 augustss struct ohci_pipe;
97 1.1 augustss
98 1.1 augustss ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
99 1.1 augustss void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
100 1.1 augustss
101 1.1 augustss ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
102 1.1 augustss void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
103 1.1 augustss
104 1.33 augustss void ohci_power __P((int, void *));
105 1.1 augustss usbd_status ohci_open __P((usbd_pipe_handle));
106 1.5 augustss void ohci_poll __P((struct usbd_bus *));
107 1.1 augustss void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
108 1.1 augustss void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
109 1.1 augustss void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
110 1.1 augustss
111 1.1 augustss usbd_status ohci_device_request __P((usbd_request_handle reqh));
112 1.3 augustss void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
113 1.3 augustss void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
114 1.1 augustss void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
115 1.1 augustss void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
116 1.1 augustss ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
117 1.1 augustss
118 1.42 augustss usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t));
119 1.42 augustss void ohci_freem __P((struct usbd_bus *, usb_dma_t *));
120 1.42 augustss
121 1.1 augustss usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
122 1.17 augustss usbd_status ohci_root_ctrl_start __P((usbd_request_handle));
123 1.1 augustss void ohci_root_ctrl_abort __P((usbd_request_handle));
124 1.1 augustss void ohci_root_ctrl_close __P((usbd_pipe_handle));
125 1.1 augustss
126 1.1 augustss usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
127 1.17 augustss usbd_status ohci_root_intr_start __P((usbd_request_handle));
128 1.1 augustss void ohci_root_intr_abort __P((usbd_request_handle));
129 1.1 augustss void ohci_root_intr_close __P((usbd_pipe_handle));
130 1.38 augustss void ohci_root_intr_done __P((usbd_request_handle));
131 1.1 augustss
132 1.1 augustss usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
133 1.17 augustss usbd_status ohci_device_ctrl_start __P((usbd_request_handle));
134 1.1 augustss void ohci_device_ctrl_abort __P((usbd_request_handle));
135 1.1 augustss void ohci_device_ctrl_close __P((usbd_pipe_handle));
136 1.38 augustss void ohci_device_ctrl_done __P((usbd_request_handle));
137 1.1 augustss
138 1.3 augustss usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
139 1.17 augustss usbd_status ohci_device_bulk_start __P((usbd_request_handle));
140 1.3 augustss void ohci_device_bulk_abort __P((usbd_request_handle));
141 1.3 augustss void ohci_device_bulk_close __P((usbd_pipe_handle));
142 1.38 augustss void ohci_device_bulk_done __P((usbd_request_handle));
143 1.3 augustss
144 1.1 augustss usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
145 1.17 augustss usbd_status ohci_device_intr_start __P((usbd_request_handle));
146 1.1 augustss void ohci_device_intr_abort __P((usbd_request_handle));
147 1.1 augustss void ohci_device_intr_close __P((usbd_pipe_handle));
148 1.38 augustss void ohci_device_intr_done __P((usbd_request_handle));
149 1.38 augustss
150 1.43 augustss usbd_status ohci_device_isoc_transfer __P((usbd_request_handle));
151 1.43 augustss usbd_status ohci_device_isoc_start __P((usbd_request_handle));
152 1.43 augustss void ohci_device_isoc_abort __P((usbd_request_handle));
153 1.43 augustss void ohci_device_isoc_close __P((usbd_pipe_handle));
154 1.43 augustss void ohci_device_isoc_done __P((usbd_request_handle));
155 1.43 augustss
156 1.1 augustss usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
157 1.1 augustss struct ohci_pipe *pipe, int ival));
158 1.1 augustss
159 1.1 augustss int ohci_str __P((usb_string_descriptor_t *, int, char *));
160 1.1 augustss
161 1.1 augustss void ohci_timeout __P((void *));
162 1.1 augustss void ohci_rhsc_able __P((ohci_softc_t *, int));
163 1.1 augustss
164 1.34 augustss void ohci_close_pipe __P((usbd_pipe_handle pipe,
165 1.34 augustss ohci_soft_ed_t *head));
166 1.38 augustss void ohci_abort_req __P((usbd_request_handle reqh,
167 1.38 augustss usbd_status status));
168 1.38 augustss void ohci_abort_req_end __P((void *));
169 1.34 augustss
170 1.37 augustss void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
171 1.37 augustss void ohci_noop __P((usbd_pipe_handle pipe));
172 1.37 augustss
173 1.1 augustss #ifdef USB_DEBUG
174 1.1 augustss ohci_softc_t *thesc;
175 1.1 augustss void ohci_dumpregs __P((ohci_softc_t *));
176 1.1 augustss void ohci_dump_tds __P((ohci_soft_td_t *));
177 1.1 augustss void ohci_dump_td __P((ohci_soft_td_t *));
178 1.1 augustss void ohci_dump_ed __P((ohci_soft_ed_t *));
179 1.1 augustss #endif
180 1.1 augustss
181 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
182 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
183 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
184 1.1 augustss
185 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
186 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
187 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
188 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
189 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
190 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
191 1.1 augustss
192 1.1 augustss struct ohci_pipe {
193 1.1 augustss struct usbd_pipe pipe;
194 1.1 augustss ohci_soft_ed_t *sed;
195 1.1 augustss ohci_soft_td_t *tail;
196 1.1 augustss /* Info needed for different pipe kinds. */
197 1.1 augustss union {
198 1.1 augustss /* Control pipe */
199 1.1 augustss struct {
200 1.4 augustss usb_dma_t reqdma;
201 1.1 augustss u_int length;
202 1.1 augustss ohci_soft_td_t *setup, *xfer, *stat;
203 1.1 augustss } ctl;
204 1.1 augustss /* Interrupt pipe */
205 1.1 augustss struct {
206 1.1 augustss int nslots;
207 1.1 augustss int pos;
208 1.1 augustss } intr;
209 1.3 augustss /* Bulk pipe */
210 1.3 augustss struct {
211 1.3 augustss u_int length;
212 1.32 augustss int isread;
213 1.3 augustss } bulk;
214 1.43 augustss /* Iso pipe */
215 1.43 augustss struct iso {
216 1.43 augustss int xxxxx;
217 1.43 augustss } iso;
218 1.1 augustss } u;
219 1.1 augustss };
220 1.1 augustss
221 1.1 augustss #define OHCI_INTR_ENDPT 1
222 1.1 augustss
223 1.42 augustss struct usbd_bus_methods ohci_bus_methods = {
224 1.42 augustss ohci_open,
225 1.42 augustss ohci_poll,
226 1.42 augustss ohci_allocm,
227 1.42 augustss ohci_freem,
228 1.42 augustss };
229 1.42 augustss
230 1.42 augustss struct usbd_pipe_methods ohci_root_ctrl_methods = {
231 1.1 augustss ohci_root_ctrl_transfer,
232 1.17 augustss ohci_root_ctrl_start,
233 1.1 augustss ohci_root_ctrl_abort,
234 1.1 augustss ohci_root_ctrl_close,
235 1.37 augustss ohci_noop,
236 1.7 augustss 0,
237 1.1 augustss };
238 1.1 augustss
239 1.42 augustss struct usbd_pipe_methods ohci_root_intr_methods = {
240 1.1 augustss ohci_root_intr_transfer,
241 1.17 augustss ohci_root_intr_start,
242 1.1 augustss ohci_root_intr_abort,
243 1.1 augustss ohci_root_intr_close,
244 1.37 augustss ohci_noop,
245 1.38 augustss ohci_root_intr_done,
246 1.1 augustss };
247 1.1 augustss
248 1.42 augustss struct usbd_pipe_methods ohci_device_ctrl_methods = {
249 1.1 augustss ohci_device_ctrl_transfer,
250 1.17 augustss ohci_device_ctrl_start,
251 1.1 augustss ohci_device_ctrl_abort,
252 1.1 augustss ohci_device_ctrl_close,
253 1.37 augustss ohci_noop,
254 1.38 augustss ohci_device_ctrl_done,
255 1.1 augustss };
256 1.1 augustss
257 1.42 augustss struct usbd_pipe_methods ohci_device_intr_methods = {
258 1.1 augustss ohci_device_intr_transfer,
259 1.17 augustss ohci_device_intr_start,
260 1.1 augustss ohci_device_intr_abort,
261 1.1 augustss ohci_device_intr_close,
262 1.37 augustss ohci_device_clear_toggle,
263 1.38 augustss ohci_device_intr_done,
264 1.1 augustss };
265 1.1 augustss
266 1.42 augustss struct usbd_pipe_methods ohci_device_bulk_methods = {
267 1.3 augustss ohci_device_bulk_transfer,
268 1.17 augustss ohci_device_bulk_start,
269 1.3 augustss ohci_device_bulk_abort,
270 1.3 augustss ohci_device_bulk_close,
271 1.37 augustss ohci_device_clear_toggle,
272 1.38 augustss ohci_device_bulk_done,
273 1.3 augustss };
274 1.3 augustss
275 1.43 augustss #if 0
276 1.43 augustss struct usbd_pipe_methods ohci_device_isoc_methods = {
277 1.43 augustss ohci_device_isoc_transfer,
278 1.43 augustss ohci_device_isoc_start,
279 1.43 augustss ohci_device_isoc_abort,
280 1.43 augustss ohci_device_isoc_close,
281 1.43 augustss ohci_noop,
282 1.43 augustss ohci_device_isoc_done,
283 1.43 augustss };
284 1.43 augustss #endif
285 1.43 augustss
286 1.1 augustss ohci_soft_ed_t *
287 1.1 augustss ohci_alloc_sed(sc)
288 1.1 augustss ohci_softc_t *sc;
289 1.1 augustss {
290 1.1 augustss ohci_soft_ed_t *sed;
291 1.1 augustss usbd_status r;
292 1.1 augustss int i, offs;
293 1.4 augustss usb_dma_t dma;
294 1.1 augustss
295 1.1 augustss if (!sc->sc_freeeds) {
296 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
297 1.44 augustss r = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
298 1.4 augustss OHCI_ED_ALIGN, &dma);
299 1.39 augustss if (r != USBD_NORMAL_COMPLETION)
300 1.39 augustss return (0);
301 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
302 1.39 augustss offs = i * OHCI_SED_SIZE;
303 1.39 augustss sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
304 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
305 1.1 augustss sed->next = sc->sc_freeeds;
306 1.1 augustss sc->sc_freeeds = sed;
307 1.1 augustss }
308 1.1 augustss }
309 1.1 augustss sed = sc->sc_freeeds;
310 1.1 augustss sc->sc_freeeds = sed->next;
311 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
312 1.1 augustss sed->next = 0;
313 1.39 augustss return (sed);
314 1.1 augustss }
315 1.1 augustss
316 1.1 augustss void
317 1.1 augustss ohci_free_sed(sc, sed)
318 1.1 augustss ohci_softc_t *sc;
319 1.1 augustss ohci_soft_ed_t *sed;
320 1.1 augustss {
321 1.1 augustss sed->next = sc->sc_freeeds;
322 1.1 augustss sc->sc_freeeds = sed;
323 1.1 augustss }
324 1.1 augustss
325 1.1 augustss ohci_soft_td_t *
326 1.1 augustss ohci_alloc_std(sc)
327 1.1 augustss ohci_softc_t *sc;
328 1.1 augustss {
329 1.1 augustss ohci_soft_td_t *std;
330 1.1 augustss usbd_status r;
331 1.1 augustss int i, offs;
332 1.4 augustss usb_dma_t dma;
333 1.1 augustss
334 1.1 augustss if (!sc->sc_freetds) {
335 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
336 1.44 augustss r = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
337 1.4 augustss OHCI_TD_ALIGN, &dma);
338 1.39 augustss if (r != USBD_NORMAL_COMPLETION)
339 1.39 augustss return (0);
340 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
341 1.39 augustss offs = i * OHCI_STD_SIZE;
342 1.39 augustss std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
343 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
344 1.1 augustss std->nexttd = sc->sc_freetds;
345 1.1 augustss sc->sc_freetds = std;
346 1.1 augustss }
347 1.1 augustss }
348 1.1 augustss std = sc->sc_freetds;
349 1.1 augustss sc->sc_freetds = std->nexttd;
350 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
351 1.1 augustss std->nexttd = 0;
352 1.1 augustss return (std);
353 1.1 augustss }
354 1.1 augustss
355 1.1 augustss void
356 1.1 augustss ohci_free_std(sc, std)
357 1.1 augustss ohci_softc_t *sc;
358 1.1 augustss ohci_soft_td_t *std;
359 1.1 augustss {
360 1.1 augustss std->nexttd = sc->sc_freetds;
361 1.1 augustss sc->sc_freetds = std;
362 1.1 augustss }
363 1.1 augustss
364 1.1 augustss usbd_status
365 1.1 augustss ohci_init(sc)
366 1.1 augustss ohci_softc_t *sc;
367 1.1 augustss {
368 1.1 augustss ohci_soft_ed_t *sed, *psed;
369 1.1 augustss usbd_status r;
370 1.1 augustss int rev;
371 1.1 augustss int i;
372 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
373 1.16 augustss
374 1.1 augustss DPRINTF(("ohci_init: start\n"));
375 1.1 augustss rev = OREAD4(sc, OHCI_REVISION);
376 1.36 augustss #if defined(__OpenBSD__)
377 1.36 augustss printf(", OHCI version %d.%d%s\n",
378 1.36 augustss #else
379 1.15 augustss printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
380 1.36 augustss #endif
381 1.1 augustss OHCI_REV_HI(rev), OHCI_REV_LO(rev),
382 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
383 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
384 1.1 augustss printf("%s: unsupported OHCI revision\n",
385 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
386 1.1 augustss return (USBD_INVAL);
387 1.1 augustss }
388 1.1 augustss
389 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
390 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
391 1.1 augustss
392 1.1 augustss /* Allocate the HCCA area. */
393 1.44 augustss r = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
394 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
395 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
396 1.1 augustss return (r);
397 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
398 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
399 1.1 augustss
400 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
401 1.1 augustss
402 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
403 1.1 augustss if (!sc->sc_ctrl_head) {
404 1.1 augustss r = USBD_NOMEM;
405 1.1 augustss goto bad1;
406 1.1 augustss }
407 1.39 augustss sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
408 1.34 augustss
409 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
410 1.1 augustss if (!sc->sc_bulk_head) {
411 1.1 augustss r = USBD_NOMEM;
412 1.1 augustss goto bad2;
413 1.1 augustss }
414 1.39 augustss sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
415 1.1 augustss
416 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
417 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
418 1.1 augustss sed = ohci_alloc_sed(sc);
419 1.1 augustss if (!sed) {
420 1.1 augustss while (--i >= 0)
421 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
422 1.1 augustss r = USBD_NOMEM;
423 1.1 augustss goto bad3;
424 1.1 augustss }
425 1.1 augustss /* All ED fields are set to 0. */
426 1.1 augustss sc->sc_eds[i] = sed;
427 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
428 1.1 augustss if (i != 0) {
429 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
430 1.1 augustss sed->next = psed;
431 1.39 augustss sed->ed.ed_nexted = LE(psed->physaddr);
432 1.1 augustss }
433 1.1 augustss }
434 1.1 augustss /*
435 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
436 1.1 augustss * the tree set up properly to spread the interrupts.
437 1.1 augustss */
438 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
439 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
440 1.16 augustss LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
441 1.1 augustss
442 1.1 augustss /* Determine in what context we are running. */
443 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
444 1.1 augustss if (ctl & OHCI_IR) {
445 1.1 augustss /* SMM active, request change */
446 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
447 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
448 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
449 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
450 1.1 augustss delay(1000);
451 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
452 1.1 augustss }
453 1.1 augustss if ((ctl & OHCI_IR) == 0) {
454 1.15 augustss printf("%s: SMM does not respond, resetting\n",
455 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
456 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
457 1.1 augustss goto reset;
458 1.1 augustss }
459 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
460 1.1 augustss /* BIOS started controller. */
461 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
462 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
463 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
464 1.1 augustss delay(USB_RESUME_DELAY * 1000);
465 1.1 augustss }
466 1.1 augustss } else {
467 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
468 1.1 augustss reset:
469 1.1 augustss /* Controller was cold started. */
470 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
471 1.1 augustss }
472 1.1 augustss
473 1.16 augustss /*
474 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
475 1.25 augustss * without it some controllers do not start.
476 1.16 augustss */
477 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
478 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
479 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
480 1.16 augustss
481 1.1 augustss /* We now own the host controller and the bus has been reset. */
482 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
483 1.1 augustss
484 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
485 1.1 augustss /* Nominal time for a reset is 10 us. */
486 1.1 augustss for (i = 0; i < 10; i++) {
487 1.1 augustss delay(10);
488 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
489 1.1 augustss if (!hcr)
490 1.1 augustss break;
491 1.1 augustss }
492 1.1 augustss if (hcr) {
493 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
494 1.1 augustss r = USBD_IOERROR;
495 1.1 augustss goto bad3;
496 1.1 augustss }
497 1.1 augustss #ifdef USB_DEBUG
498 1.1 augustss thesc = sc;
499 1.1 augustss if (ohcidebug > 15)
500 1.1 augustss ohci_dumpregs(sc);
501 1.1 augustss #endif
502 1.1 augustss
503 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
504 1.1 augustss
505 1.1 augustss /* Set up HC registers. */
506 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
507 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
508 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
509 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
510 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
511 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
512 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
513 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
514 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
515 1.1 augustss /* And finally start it! */
516 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
517 1.1 augustss
518 1.1 augustss /*
519 1.1 augustss * The controller is now OPERATIONAL. Set a some final
520 1.1 augustss * registers that should be set earlier, but that the
521 1.1 augustss * controller ignores when in the SUSPEND state.
522 1.1 augustss */
523 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
524 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
525 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
526 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
527 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
528 1.1 augustss
529 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
530 1.1 augustss
531 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
532 1.1 augustss
533 1.1 augustss #ifdef USB_DEBUG
534 1.1 augustss if (ohcidebug > 5)
535 1.1 augustss ohci_dumpregs(sc);
536 1.1 augustss #endif
537 1.1 augustss
538 1.1 augustss /* Set up the bus struct. */
539 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
540 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
541 1.1 augustss
542 1.36 augustss powerhook_establish(ohci_power, sc);
543 1.33 augustss
544 1.1 augustss return (USBD_NORMAL_COMPLETION);
545 1.1 augustss
546 1.1 augustss bad3:
547 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
548 1.1 augustss bad2:
549 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
550 1.1 augustss bad1:
551 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
552 1.1 augustss return (r);
553 1.1 augustss }
554 1.1 augustss
555 1.42 augustss usbd_status
556 1.42 augustss ohci_allocm(bus, dma, size)
557 1.42 augustss struct usbd_bus *bus;
558 1.42 augustss usb_dma_t *dma;
559 1.42 augustss u_int32_t size;
560 1.42 augustss {
561 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
562 1.42 augustss
563 1.44 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
564 1.42 augustss }
565 1.42 augustss
566 1.42 augustss void
567 1.42 augustss ohci_freem(bus, dma)
568 1.42 augustss struct usbd_bus *bus;
569 1.42 augustss usb_dma_t *dma;
570 1.42 augustss {
571 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
572 1.42 augustss
573 1.44 augustss usb_freemem(&sc->sc_bus, dma);
574 1.42 augustss }
575 1.42 augustss
576 1.36 augustss #if !defined(__OpenBSD__)
577 1.33 augustss void
578 1.33 augustss ohci_power(why, v)
579 1.33 augustss int why;
580 1.33 augustss void *v;
581 1.33 augustss {
582 1.33 augustss #ifdef USB_DEBUG
583 1.33 augustss ohci_softc_t *sc = v;
584 1.33 augustss
585 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
586 1.33 augustss /* XXX should suspend/resume */
587 1.33 augustss ohci_dumpregs(sc);
588 1.33 augustss #endif
589 1.33 augustss }
590 1.36 augustss #endif /* !defined(__OpenBSD__) */
591 1.33 augustss
592 1.1 augustss #ifdef USB_DEBUG
593 1.1 augustss void ohcidump(void);
594 1.1 augustss void ohcidump(void) { ohci_dumpregs(thesc); }
595 1.1 augustss
596 1.1 augustss void
597 1.1 augustss ohci_dumpregs(sc)
598 1.1 augustss ohci_softc_t *sc;
599 1.1 augustss {
600 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
601 1.41 augustss OREAD4(sc, OHCI_REVISION),
602 1.41 augustss OREAD4(sc, OHCI_CONTROL),
603 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
604 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
605 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
606 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
607 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
608 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
609 1.41 augustss OREAD4(sc, OHCI_HCCA),
610 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
611 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
612 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
613 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
614 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
615 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
616 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
617 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
618 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
619 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
620 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
621 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
622 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
623 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
624 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
625 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
626 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
627 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
628 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
629 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
630 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
631 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
632 1.41 augustss LE(sc->sc_hcca->hcca_frame_number),
633 1.41 augustss LE(sc->sc_hcca->hcca_done_head)));
634 1.1 augustss }
635 1.1 augustss #endif
636 1.1 augustss
637 1.1 augustss int
638 1.1 augustss ohci_intr(p)
639 1.1 augustss void *p;
640 1.1 augustss {
641 1.1 augustss ohci_softc_t *sc = p;
642 1.1 augustss u_int32_t intrs, eintrs;
643 1.1 augustss ohci_physaddr_t done;
644 1.1 augustss
645 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
646 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
647 1.15 augustss #ifdef DIAGNOSTIC
648 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
649 1.15 augustss #endif
650 1.15 augustss return (0);
651 1.15 augustss }
652 1.15 augustss
653 1.27 augustss intrs = 0;
654 1.16 augustss done = LE(sc->sc_hcca->hcca_done_head);
655 1.1 augustss if (done != 0) {
656 1.26 augustss sc->sc_hcca->hcca_done_head = 0;
657 1.26 augustss if (done & ~OHCI_DONE_INTRS)
658 1.26 augustss intrs = OHCI_WDH;
659 1.1 augustss if (done & OHCI_DONE_INTRS)
660 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
661 1.1 augustss } else
662 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
663 1.1 augustss if (!intrs)
664 1.1 augustss return (0);
665 1.1 augustss intrs &= ~OHCI_MIE;
666 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
667 1.1 augustss eintrs = intrs & sc->sc_eintrs;
668 1.1 augustss if (!eintrs)
669 1.1 augustss return (0);
670 1.1 augustss
671 1.45 augustss sc->sc_bus.intr_context++;
672 1.44 augustss sc->sc_bus.no_intrs++;
673 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
674 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
675 1.1 augustss (u_int)eintrs));
676 1.1 augustss
677 1.1 augustss if (eintrs & OHCI_SO) {
678 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
679 1.1 augustss /* XXX do what */
680 1.1 augustss intrs &= ~OHCI_SO;
681 1.1 augustss }
682 1.1 augustss if (eintrs & OHCI_WDH) {
683 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
684 1.1 augustss intrs &= ~OHCI_WDH;
685 1.1 augustss }
686 1.1 augustss if (eintrs & OHCI_RD) {
687 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
688 1.1 augustss /* XXX process resume detect */
689 1.1 augustss }
690 1.1 augustss if (eintrs & OHCI_UE) {
691 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
692 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
693 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
694 1.1 augustss /* XXX what else */
695 1.1 augustss }
696 1.1 augustss if (eintrs & OHCI_RHSC) {
697 1.1 augustss ohci_rhsc(sc, sc->sc_intrreqh);
698 1.1 augustss intrs &= ~OHCI_RHSC;
699 1.1 augustss
700 1.1 augustss /*
701 1.1 augustss * Disable RHSC interrupt for now, because it will be
702 1.1 augustss * on until the port has been reset.
703 1.1 augustss */
704 1.1 augustss ohci_rhsc_able(sc, 0);
705 1.1 augustss }
706 1.1 augustss
707 1.45 augustss sc->sc_bus.intr_context--;
708 1.44 augustss
709 1.1 augustss /* Block unprocessed interrupts. XXX */
710 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
711 1.1 augustss sc->sc_eintrs &= ~intrs;
712 1.1 augustss
713 1.1 augustss return (1);
714 1.1 augustss }
715 1.1 augustss
716 1.1 augustss void
717 1.1 augustss ohci_rhsc_able(sc, on)
718 1.1 augustss ohci_softc_t *sc;
719 1.1 augustss int on;
720 1.1 augustss {
721 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
722 1.1 augustss if (on) {
723 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
724 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
725 1.1 augustss } else {
726 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
727 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
728 1.1 augustss }
729 1.1 augustss }
730 1.1 augustss
731 1.13 augustss #ifdef USB_DEBUG
732 1.13 augustss char *ohci_cc_strs[] = {
733 1.13 augustss "NO_ERROR",
734 1.13 augustss "CRC",
735 1.13 augustss "BIT_STUFFING",
736 1.13 augustss "DATA_TOGGLE_MISMATCH",
737 1.13 augustss "STALL",
738 1.13 augustss "DEVICE_NOT_RESPONDING",
739 1.13 augustss "PID_CHECK_FAILURE",
740 1.13 augustss "UNEXPECTED_PID",
741 1.13 augustss "DATA_OVERRUN",
742 1.13 augustss "DATA_UNDERRUN",
743 1.13 augustss "BUFFER_OVERRUN",
744 1.13 augustss "BUFFER_UNDERRUN",
745 1.13 augustss "NOT_ACCESSED",
746 1.13 augustss };
747 1.13 augustss #endif
748 1.13 augustss
749 1.1 augustss void
750 1.1 augustss ohci_process_done(sc, done)
751 1.1 augustss ohci_softc_t *sc;
752 1.1 augustss ohci_physaddr_t done;
753 1.1 augustss {
754 1.1 augustss ohci_soft_td_t *std, *sdone;
755 1.1 augustss usbd_request_handle reqh;
756 1.1 augustss int len, cc;
757 1.1 augustss
758 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
759 1.1 augustss
760 1.1 augustss /* Reverse the done list. */
761 1.39 augustss for (sdone = 0; done; done = LE(std->td.td_nexttd)) {
762 1.1 augustss std = ohci_hash_find_td(sc, done);
763 1.1 augustss std->dnext = sdone;
764 1.1 augustss sdone = std;
765 1.1 augustss }
766 1.1 augustss
767 1.1 augustss #ifdef USB_DEBUG
768 1.1 augustss if (ohcidebug > 10) {
769 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
770 1.1 augustss ohci_dump_tds(sdone);
771 1.1 augustss }
772 1.1 augustss #endif
773 1.1 augustss
774 1.1 augustss for (std = sdone; std; std = std->dnext) {
775 1.1 augustss reqh = std->reqh;
776 1.27 augustss DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n",
777 1.27 augustss std, reqh, reqh->hcpriv));
778 1.39 augustss cc = OHCI_TD_GET_CC(LE(std->td.td_flags));
779 1.38 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
780 1.34 augustss if (reqh->status == USBD_CANCELLED ||
781 1.34 augustss reqh->status == USBD_TIMEOUT) {
782 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
783 1.34 augustss reqh));
784 1.38 augustss /* Handled by abort routine. */
785 1.38 augustss continue;
786 1.34 augustss } else if (cc == OHCI_CC_NO_ERROR) {
787 1.34 augustss len = std->len;
788 1.39 augustss if (std->td.td_cbp != 0)
789 1.39 augustss len -= LE(std->td.td_be) -
790 1.39 augustss LE(std->td.td_cbp) + 1;
791 1.34 augustss if (std->flags & OHCI_SET_LEN)
792 1.34 augustss reqh->actlen = len;
793 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
794 1.34 augustss reqh->status = USBD_NORMAL_COMPLETION;
795 1.38 augustss usb_transfer_complete(reqh);
796 1.21 augustss }
797 1.1 augustss } else {
798 1.1 augustss ohci_soft_td_t *p, *n;
799 1.1 augustss struct ohci_pipe *opipe =
800 1.1 augustss (struct ohci_pipe *)reqh->pipe;
801 1.13 augustss DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
802 1.39 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
803 1.39 augustss ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))]));
804 1.1 augustss /*
805 1.1 augustss * Endpoint is halted. First unlink all the TDs
806 1.1 augustss * belonging to the failed transfer, and then restart
807 1.1 augustss * the endpoint.
808 1.1 augustss */
809 1.1 augustss for (p = std->nexttd; p->reqh == reqh; p = n) {
810 1.1 augustss n = p->nexttd;
811 1.1 augustss ohci_hash_rem_td(sc, p);
812 1.1 augustss ohci_free_std(sc, p);
813 1.1 augustss }
814 1.16 augustss /* clear halt */
815 1.39 augustss opipe->sed->ed.ed_headp = LE(p->physaddr);
816 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
817 1.1 augustss
818 1.1 augustss if (cc == OHCI_CC_STALL)
819 1.1 augustss reqh->status = USBD_STALLED;
820 1.1 augustss else
821 1.1 augustss reqh->status = USBD_IOERROR;
822 1.38 augustss usb_transfer_complete(reqh);
823 1.1 augustss }
824 1.1 augustss ohci_hash_rem_td(sc, std);
825 1.1 augustss ohci_free_std(sc, std);
826 1.1 augustss }
827 1.1 augustss }
828 1.1 augustss
829 1.1 augustss void
830 1.38 augustss ohci_device_ctrl_done(reqh)
831 1.1 augustss usbd_request_handle reqh;
832 1.1 augustss {
833 1.1 augustss DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
834 1.1 augustss
835 1.38 augustss #ifdef DIAGNOSTIC
836 1.42 augustss if (!(reqh->rqflags & URQ_REQUEST)) {
837 1.8 augustss panic("ohci_ctrl_done: not a request\n");
838 1.1 augustss }
839 1.38 augustss #endif
840 1.38 augustss reqh->hcpriv = 0;
841 1.1 augustss }
842 1.1 augustss
843 1.1 augustss void
844 1.38 augustss ohci_device_intr_done(reqh)
845 1.1 augustss usbd_request_handle reqh;
846 1.1 augustss {
847 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
848 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
849 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
850 1.1 augustss ohci_soft_td_t *xfer, *tail;
851 1.1 augustss
852 1.1 augustss
853 1.1 augustss DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
854 1.1 augustss reqh, reqh->actlen));
855 1.1 augustss
856 1.38 augustss reqh->hcpriv = 0;
857 1.38 augustss
858 1.38 augustss if (reqh->pipe->repeat) {
859 1.1 augustss xfer = opipe->tail;
860 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
861 1.1 augustss if (!tail) {
862 1.1 augustss reqh->status = USBD_NOMEM;
863 1.1 augustss return;
864 1.1 augustss }
865 1.1 augustss tail->reqh = 0;
866 1.1 augustss
867 1.39 augustss xfer->td.td_flags = LE(
868 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
869 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
870 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
871 1.39 augustss xfer->td.td_flags |= LE(OHCI_TD_R);
872 1.43 augustss xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
873 1.1 augustss xfer->nexttd = tail;
874 1.39 augustss xfer->td.td_nexttd = LE(tail->physaddr);
875 1.39 augustss xfer->td.td_be = LE(LE(xfer->td.td_cbp) + reqh->length - 1);
876 1.1 augustss xfer->len = reqh->length;
877 1.1 augustss xfer->reqh = reqh;
878 1.34 augustss xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
879 1.24 augustss reqh->hcpriv = xfer;
880 1.1 augustss
881 1.1 augustss ohci_hash_add_td(sc, xfer);
882 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
883 1.1 augustss opipe->tail = tail;
884 1.1 augustss }
885 1.1 augustss }
886 1.1 augustss
887 1.1 augustss void
888 1.38 augustss ohci_device_bulk_done(reqh)
889 1.3 augustss usbd_request_handle reqh;
890 1.3 augustss {
891 1.3 augustss DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
892 1.3 augustss reqh, reqh->actlen));
893 1.3 augustss
894 1.38 augustss reqh->hcpriv = 0;
895 1.3 augustss }
896 1.3 augustss
897 1.3 augustss void
898 1.1 augustss ohci_rhsc(sc, reqh)
899 1.1 augustss ohci_softc_t *sc;
900 1.1 augustss usbd_request_handle reqh;
901 1.1 augustss {
902 1.1 augustss usbd_pipe_handle pipe;
903 1.1 augustss struct ohci_pipe *opipe;
904 1.1 augustss u_char *p;
905 1.1 augustss int i, m;
906 1.1 augustss int hstatus;
907 1.1 augustss
908 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
909 1.1 augustss DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
910 1.1 augustss sc, reqh, hstatus));
911 1.1 augustss
912 1.1 augustss if (reqh == 0) {
913 1.1 augustss /* Just ignore the change. */
914 1.1 augustss return;
915 1.1 augustss }
916 1.1 augustss
917 1.1 augustss pipe = reqh->pipe;
918 1.1 augustss opipe = (struct ohci_pipe *)pipe;
919 1.1 augustss
920 1.43 augustss p = KERNADDR(&reqh->dmabuf);
921 1.1 augustss m = min(sc->sc_noport, reqh->length * 8 - 1);
922 1.1 augustss memset(p, 0, reqh->length);
923 1.1 augustss for (i = 1; i <= m; i++) {
924 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
925 1.1 augustss p[i/8] |= 1 << (i%8);
926 1.1 augustss }
927 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
928 1.1 augustss reqh->actlen = reqh->length;
929 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
930 1.1 augustss
931 1.38 augustss usb_transfer_complete(reqh);
932 1.38 augustss }
933 1.38 augustss
934 1.38 augustss void
935 1.38 augustss ohci_root_intr_done(reqh)
936 1.38 augustss usbd_request_handle reqh;
937 1.38 augustss {
938 1.38 augustss reqh->hcpriv = 0;
939 1.1 augustss }
940 1.1 augustss
941 1.1 augustss /*
942 1.1 augustss * Wait here until controller claims to have an interrupt.
943 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
944 1.1 augustss * too long.
945 1.1 augustss */
946 1.1 augustss void
947 1.1 augustss ohci_waitintr(sc, reqh)
948 1.1 augustss ohci_softc_t *sc;
949 1.1 augustss usbd_request_handle reqh;
950 1.1 augustss {
951 1.1 augustss int timo = reqh->timeout;
952 1.1 augustss int usecs;
953 1.1 augustss u_int32_t intrs;
954 1.1 augustss
955 1.1 augustss reqh->status = USBD_IN_PROGRESS;
956 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
957 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
958 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
959 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
960 1.1 augustss #ifdef USB_DEBUG
961 1.1 augustss if (ohcidebug > 15)
962 1.1 augustss ohci_dumpregs(sc);
963 1.1 augustss #endif
964 1.1 augustss if (intrs) {
965 1.1 augustss ohci_intr(sc);
966 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
967 1.1 augustss return;
968 1.1 augustss }
969 1.1 augustss }
970 1.15 augustss
971 1.15 augustss /* Timeout */
972 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
973 1.1 augustss reqh->status = USBD_TIMEOUT;
974 1.38 augustss usb_transfer_complete(reqh);
975 1.15 augustss /* XXX should free TD */
976 1.5 augustss }
977 1.5 augustss
978 1.5 augustss void
979 1.5 augustss ohci_poll(bus)
980 1.5 augustss struct usbd_bus *bus;
981 1.5 augustss {
982 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
983 1.5 augustss
984 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
985 1.5 augustss ohci_intr(sc);
986 1.1 augustss }
987 1.1 augustss
988 1.1 augustss usbd_status
989 1.1 augustss ohci_device_request(reqh)
990 1.1 augustss usbd_request_handle reqh;
991 1.1 augustss {
992 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
993 1.1 augustss usb_device_request_t *req = &reqh->request;
994 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
995 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
996 1.1 augustss int addr = dev->address;
997 1.1 augustss ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
998 1.1 augustss ohci_soft_ed_t *sed;
999 1.1 augustss int isread;
1000 1.1 augustss int len;
1001 1.1 augustss usbd_status r;
1002 1.1 augustss int s;
1003 1.1 augustss
1004 1.1 augustss isread = req->bmRequestType & UT_READ;
1005 1.1 augustss len = UGETW(req->wLength);
1006 1.1 augustss
1007 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1008 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1009 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1010 1.1 augustss UGETW(req->wIndex), len, addr,
1011 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1012 1.1 augustss
1013 1.1 augustss setup = opipe->tail;
1014 1.1 augustss stat = ohci_alloc_std(sc);
1015 1.1 augustss if (!stat) {
1016 1.1 augustss r = USBD_NOMEM;
1017 1.1 augustss goto bad1;
1018 1.1 augustss }
1019 1.1 augustss tail = ohci_alloc_std(sc);
1020 1.1 augustss if (!tail) {
1021 1.1 augustss r = USBD_NOMEM;
1022 1.1 augustss goto bad2;
1023 1.1 augustss }
1024 1.1 augustss tail->reqh = 0;
1025 1.1 augustss
1026 1.1 augustss sed = opipe->sed;
1027 1.1 augustss opipe->u.ctl.length = len;
1028 1.1 augustss
1029 1.10 augustss /* Update device address and length since they may have changed. */
1030 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1031 1.39 augustss sed->ed.ed_flags = LE(
1032 1.39 augustss (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1033 1.16 augustss OHCI_ED_SET_FA(addr) |
1034 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1035 1.1 augustss
1036 1.1 augustss /* Set up data transaction */
1037 1.1 augustss if (len != 0) {
1038 1.1 augustss xfer = ohci_alloc_std(sc);
1039 1.1 augustss if (!xfer) {
1040 1.1 augustss r = USBD_NOMEM;
1041 1.1 augustss goto bad3;
1042 1.1 augustss }
1043 1.39 augustss xfer->td.td_flags = LE(
1044 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1045 1.19 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1046 1.19 augustss (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1047 1.43 augustss xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
1048 1.1 augustss xfer->nexttd = stat;
1049 1.39 augustss xfer->td.td_nexttd = LE(stat->physaddr);
1050 1.39 augustss xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1);
1051 1.1 augustss xfer->len = len;
1052 1.1 augustss xfer->reqh = reqh;
1053 1.34 augustss xfer->flags = OHCI_SET_LEN;
1054 1.1 augustss
1055 1.1 augustss next = xfer;
1056 1.34 augustss stat->flags = OHCI_CALL_DONE;
1057 1.34 augustss } else {
1058 1.1 augustss next = stat;
1059 1.34 augustss stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
1060 1.34 augustss }
1061 1.1 augustss
1062 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1063 1.1 augustss
1064 1.39 augustss setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1065 1.16 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1066 1.39 augustss setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1067 1.1 augustss setup->nexttd = next;
1068 1.39 augustss setup->td.td_nexttd = LE(next->physaddr);
1069 1.39 augustss setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1);
1070 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
1071 1.1 augustss setup->reqh = reqh;
1072 1.34 augustss setup->flags = 0;
1073 1.34 augustss reqh->hcpriv = setup;
1074 1.1 augustss
1075 1.39 augustss stat->td.td_flags = LE(
1076 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1077 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1078 1.39 augustss stat->td.td_cbp = 0;
1079 1.1 augustss stat->nexttd = tail;
1080 1.39 augustss stat->td.td_nexttd = LE(tail->physaddr);
1081 1.39 augustss stat->td.td_be = 0;
1082 1.1 augustss stat->len = 0;
1083 1.1 augustss stat->reqh = reqh;
1084 1.1 augustss
1085 1.1 augustss #if USB_DEBUG
1086 1.1 augustss if (ohcidebug > 5) {
1087 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1088 1.1 augustss ohci_dump_ed(sed);
1089 1.1 augustss ohci_dump_tds(setup);
1090 1.1 augustss }
1091 1.1 augustss #endif
1092 1.1 augustss
1093 1.1 augustss /* Insert ED in schedule */
1094 1.1 augustss s = splusb();
1095 1.1 augustss ohci_hash_add_td(sc, setup);
1096 1.1 augustss if (len != 0)
1097 1.1 augustss ohci_hash_add_td(sc, xfer);
1098 1.1 augustss ohci_hash_add_td(sc, stat);
1099 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1100 1.1 augustss opipe->tail = tail;
1101 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1102 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1103 1.15 augustss usb_timeout(ohci_timeout, reqh,
1104 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1105 1.15 augustss }
1106 1.1 augustss splx(s);
1107 1.1 augustss
1108 1.1 augustss #if USB_DEBUG
1109 1.1 augustss if (ohcidebug > 5) {
1110 1.1 augustss delay(5000);
1111 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1112 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1113 1.1 augustss ohci_dump_ed(sed);
1114 1.1 augustss ohci_dump_tds(setup);
1115 1.1 augustss }
1116 1.1 augustss #endif
1117 1.1 augustss
1118 1.1 augustss return (USBD_NORMAL_COMPLETION);
1119 1.1 augustss
1120 1.1 augustss bad3:
1121 1.1 augustss ohci_free_std(sc, tail);
1122 1.1 augustss bad2:
1123 1.1 augustss ohci_free_std(sc, stat);
1124 1.1 augustss bad1:
1125 1.1 augustss return (r);
1126 1.1 augustss }
1127 1.1 augustss
1128 1.1 augustss /*
1129 1.1 augustss * Add an ED to the schedule. Called at splusb().
1130 1.1 augustss */
1131 1.1 augustss void
1132 1.3 augustss ohci_add_ed(sed, head)
1133 1.1 augustss ohci_soft_ed_t *sed;
1134 1.1 augustss ohci_soft_ed_t *head;
1135 1.1 augustss {
1136 1.46 augustss SPLUSBCHECK;
1137 1.1 augustss sed->next = head->next;
1138 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1139 1.1 augustss head->next = sed;
1140 1.39 augustss head->ed.ed_nexted = LE(sed->physaddr);
1141 1.1 augustss }
1142 1.1 augustss
1143 1.1 augustss /*
1144 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1145 1.3 augustss */
1146 1.3 augustss void
1147 1.3 augustss ohci_rem_ed(sed, head)
1148 1.3 augustss ohci_soft_ed_t *sed;
1149 1.3 augustss ohci_soft_ed_t *head;
1150 1.3 augustss {
1151 1.3 augustss ohci_soft_ed_t *p;
1152 1.3 augustss
1153 1.46 augustss SPLUSBCHECK;
1154 1.46 augustss
1155 1.3 augustss /* XXX */
1156 1.3 augustss for (p = head; p && p->next != sed; p = p->next)
1157 1.3 augustss ;
1158 1.3 augustss if (!p)
1159 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1160 1.3 augustss p->next = sed->next;
1161 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1162 1.3 augustss }
1163 1.3 augustss
1164 1.3 augustss /*
1165 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1166 1.1 augustss * the host controller. This queue is the processed by software.
1167 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1168 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1169 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1170 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1171 1.1 augustss * hash value.
1172 1.1 augustss */
1173 1.1 augustss
1174 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1175 1.1 augustss /* Called at splusb() */
1176 1.1 augustss void
1177 1.1 augustss ohci_hash_add_td(sc, std)
1178 1.1 augustss ohci_softc_t *sc;
1179 1.1 augustss ohci_soft_td_t *std;
1180 1.1 augustss {
1181 1.1 augustss int h = HASH(std->physaddr);
1182 1.1 augustss
1183 1.46 augustss SPLUSBCHECK;
1184 1.46 augustss
1185 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1186 1.1 augustss }
1187 1.1 augustss
1188 1.1 augustss /* Called at splusb() */
1189 1.1 augustss void
1190 1.1 augustss ohci_hash_rem_td(sc, std)
1191 1.1 augustss ohci_softc_t *sc;
1192 1.1 augustss ohci_soft_td_t *std;
1193 1.1 augustss {
1194 1.46 augustss SPLUSBCHECK;
1195 1.46 augustss
1196 1.1 augustss LIST_REMOVE(std, hnext);
1197 1.1 augustss }
1198 1.1 augustss
1199 1.1 augustss ohci_soft_td_t *
1200 1.1 augustss ohci_hash_find_td(sc, a)
1201 1.1 augustss ohci_softc_t *sc;
1202 1.1 augustss ohci_physaddr_t a;
1203 1.1 augustss {
1204 1.1 augustss int h = HASH(a);
1205 1.1 augustss ohci_soft_td_t *std;
1206 1.1 augustss
1207 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1208 1.1 augustss std != 0;
1209 1.1 augustss std = LIST_NEXT(std, hnext))
1210 1.1 augustss if (std->physaddr == a)
1211 1.1 augustss return (std);
1212 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1213 1.1 augustss }
1214 1.1 augustss
1215 1.1 augustss void
1216 1.1 augustss ohci_timeout(addr)
1217 1.1 augustss void *addr;
1218 1.1 augustss {
1219 1.38 augustss usbd_request_handle reqh = addr;
1220 1.1 augustss
1221 1.1 augustss DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1222 1.45 augustss
1223 1.45 augustss reqh->device->bus->intr_context++;
1224 1.38 augustss ohci_abort_req(reqh, USBD_TIMEOUT);
1225 1.45 augustss reqh->device->bus->intr_context--;
1226 1.1 augustss }
1227 1.1 augustss
1228 1.1 augustss #ifdef USB_DEBUG
1229 1.1 augustss void
1230 1.1 augustss ohci_dump_tds(std)
1231 1.1 augustss ohci_soft_td_t *std;
1232 1.1 augustss {
1233 1.1 augustss for (; std; std = std->nexttd)
1234 1.1 augustss ohci_dump_td(std);
1235 1.1 augustss }
1236 1.1 augustss
1237 1.1 augustss void
1238 1.1 augustss ohci_dump_td(std)
1239 1.1 augustss ohci_soft_td_t *std;
1240 1.1 augustss {
1241 1.41 augustss DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1242 1.41 augustss "nexttd=0x%08lx be=0x%08lx\n",
1243 1.41 augustss std, (u_long)std->physaddr,
1244 1.41 augustss (int)LE(std->td.td_flags),
1245 1.41 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1246 1.41 augustss OHCI_TD_GET_DI(LE(std->td.td_flags)),
1247 1.41 augustss OHCI_TD_GET_EC(LE(std->td.td_flags)),
1248 1.41 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
1249 1.41 augustss (u_long)LE(std->td.td_cbp),
1250 1.41 augustss (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be)));
1251 1.1 augustss }
1252 1.1 augustss
1253 1.1 augustss void
1254 1.1 augustss ohci_dump_ed(sed)
1255 1.1 augustss ohci_soft_ed_t *sed;
1256 1.1 augustss {
1257 1.41 augustss DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1258 1.41 augustss "headp=%b nexted=0x%08lx\n",
1259 1.41 augustss sed, (u_long)sed->physaddr,
1260 1.41 augustss OHCI_ED_GET_FA(LE(sed->ed.ed_flags)),
1261 1.41 augustss OHCI_ED_GET_EN(LE(sed->ed.ed_flags)),
1262 1.41 augustss OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)),
1263 1.41 augustss (int)LE(sed->ed.ed_flags),
1264 1.41 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1265 1.41 augustss (u_long)LE(sed->ed.ed_tailp),
1266 1.41 augustss (u_long)LE(sed->ed.ed_headp), "\20\1HALT\2CARRY",
1267 1.41 augustss (u_long)LE(sed->ed.ed_nexted)));
1268 1.1 augustss }
1269 1.1 augustss #endif
1270 1.1 augustss
1271 1.1 augustss usbd_status
1272 1.1 augustss ohci_open(pipe)
1273 1.1 augustss usbd_pipe_handle pipe;
1274 1.1 augustss {
1275 1.1 augustss usbd_device_handle dev = pipe->device;
1276 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1277 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1278 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1279 1.1 augustss u_int8_t addr = dev->address;
1280 1.1 augustss ohci_soft_ed_t *sed;
1281 1.1 augustss ohci_soft_td_t *std;
1282 1.1 augustss usbd_status r;
1283 1.1 augustss int s;
1284 1.1 augustss
1285 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1286 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1287 1.1 augustss if (addr == sc->sc_addr) {
1288 1.1 augustss switch (ed->bEndpointAddress) {
1289 1.1 augustss case USB_CONTROL_ENDPOINT:
1290 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1291 1.1 augustss break;
1292 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
1293 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1294 1.1 augustss break;
1295 1.1 augustss default:
1296 1.1 augustss return (USBD_INVAL);
1297 1.1 augustss }
1298 1.1 augustss } else {
1299 1.1 augustss sed = ohci_alloc_sed(sc);
1300 1.1 augustss if (sed == 0)
1301 1.1 augustss goto bad0;
1302 1.1 augustss std = ohci_alloc_std(sc);
1303 1.1 augustss if (std == 0)
1304 1.1 augustss goto bad1;
1305 1.1 augustss opipe->sed = sed;
1306 1.1 augustss opipe->tail = std;
1307 1.39 augustss sed->ed.ed_flags = LE(
1308 1.1 augustss OHCI_ED_SET_FA(addr) |
1309 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1310 1.1 augustss OHCI_ED_DIR_TD |
1311 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1312 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1313 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1314 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1315 1.39 augustss sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr);
1316 1.1 augustss
1317 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1318 1.1 augustss case UE_CONTROL:
1319 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1320 1.44 augustss r = usb_allocmem(&sc->sc_bus,
1321 1.4 augustss sizeof(usb_device_request_t),
1322 1.4 augustss 0, &opipe->u.ctl.reqdma);
1323 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1324 1.1 augustss goto bad;
1325 1.1 augustss s = splusb();
1326 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1327 1.1 augustss splx(s);
1328 1.1 augustss break;
1329 1.1 augustss case UE_INTERRUPT:
1330 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1331 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1332 1.1 augustss case UE_ISOCHRONOUS:
1333 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1334 1.43 augustss return (USBD_INVAL);
1335 1.1 augustss case UE_BULK:
1336 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1337 1.3 augustss s = splusb();
1338 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1339 1.3 augustss splx(s);
1340 1.3 augustss break;
1341 1.1 augustss }
1342 1.1 augustss }
1343 1.1 augustss return (USBD_NORMAL_COMPLETION);
1344 1.1 augustss
1345 1.1 augustss bad:
1346 1.1 augustss ohci_free_std(sc, std);
1347 1.1 augustss bad1:
1348 1.1 augustss ohci_free_sed(sc, sed);
1349 1.1 augustss bad0:
1350 1.1 augustss return (USBD_NOMEM);
1351 1.1 augustss
1352 1.1 augustss }
1353 1.1 augustss
1354 1.1 augustss /*
1355 1.34 augustss * Close a reqular pipe.
1356 1.34 augustss * Assumes that there are no pending transactions.
1357 1.34 augustss */
1358 1.34 augustss void
1359 1.34 augustss ohci_close_pipe(pipe, head)
1360 1.34 augustss usbd_pipe_handle pipe;
1361 1.34 augustss ohci_soft_ed_t *head;
1362 1.34 augustss {
1363 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1364 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1365 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
1366 1.34 augustss int s;
1367 1.34 augustss
1368 1.34 augustss s = splusb();
1369 1.34 augustss #ifdef DIAGNOSTIC
1370 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
1371 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1372 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK))) {
1373 1.39 augustss ohci_physaddr_t td = sed->ed.ed_headp;
1374 1.34 augustss ohci_soft_td_t *std;
1375 1.34 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1376 1.34 augustss std != 0;
1377 1.34 augustss std = LIST_NEXT(std, hnext))
1378 1.34 augustss if (std->physaddr == td)
1379 1.34 augustss break;
1380 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1381 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
1382 1.39 augustss (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp),
1383 1.34 augustss pipe, std);
1384 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
1385 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1386 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
1387 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
1388 1.34 augustss }
1389 1.34 augustss #endif
1390 1.34 augustss ohci_rem_ed(sed, head);
1391 1.34 augustss splx(s);
1392 1.34 augustss ohci_free_std(sc, opipe->tail);
1393 1.34 augustss ohci_free_sed(sc, opipe->sed);
1394 1.34 augustss }
1395 1.34 augustss
1396 1.34 augustss /*
1397 1.34 augustss * Abort a device request.
1398 1.34 augustss * If this routine is called at splusb() it guarantees that the request
1399 1.34 augustss * will be removed from the hardware scheduling and that the callback
1400 1.34 augustss * for it will be called with USBD_CANCELLED status.
1401 1.34 augustss * It's impossible to guarantee that the requested transfer will not
1402 1.34 augustss * have happened since the hardware runs concurrently.
1403 1.34 augustss * If the transaction has already happened we rely on the ordinary
1404 1.34 augustss * interrupt processing to process it.
1405 1.34 augustss */
1406 1.34 augustss void
1407 1.38 augustss ohci_abort_req(reqh, status)
1408 1.34 augustss usbd_request_handle reqh;
1409 1.38 augustss usbd_status status;
1410 1.34 augustss {
1411 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1412 1.34 augustss ohci_soft_ed_t *sed;
1413 1.34 augustss
1414 1.46 augustss SPLUSBCHECK;
1415 1.46 augustss
1416 1.38 augustss DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe));
1417 1.34 augustss
1418 1.38 augustss reqh->status = status;
1419 1.34 augustss
1420 1.38 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
1421 1.34 augustss
1422 1.34 augustss sed = opipe->sed;
1423 1.38 augustss DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed));
1424 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1425 1.34 augustss
1426 1.44 augustss if (reqh->device->bus->intr_context) {
1427 1.44 augustss /* We have no process context, so we can't use tsleep(). */
1428 1.44 augustss timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND);
1429 1.44 augustss } else {
1430 1.38 augustss usb_delay_ms(opipe->pipe.device->bus, 1);
1431 1.38 augustss ohci_abort_req_end(reqh);
1432 1.38 augustss }
1433 1.38 augustss }
1434 1.38 augustss
1435 1.38 augustss void
1436 1.38 augustss ohci_abort_req_end(v)
1437 1.38 augustss void *v;
1438 1.38 augustss {
1439 1.38 augustss usbd_request_handle reqh = v;
1440 1.38 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1441 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1442 1.38 augustss ohci_soft_ed_t *sed;
1443 1.38 augustss ohci_soft_td_t *p, *n;
1444 1.38 augustss int s;
1445 1.38 augustss
1446 1.38 augustss s = splusb();
1447 1.38 augustss
1448 1.38 augustss p = reqh->hcpriv;
1449 1.34 augustss #ifdef DIAGNOSTIC
1450 1.38 augustss if (!p) {
1451 1.38 augustss printf("ohci_abort_req: hcpriv==0\n");
1452 1.38 augustss return;
1453 1.38 augustss }
1454 1.34 augustss #endif
1455 1.38 augustss for (; p->reqh == reqh; p = n) {
1456 1.38 augustss n = p->nexttd;
1457 1.38 augustss ohci_hash_rem_td(sc, p);
1458 1.38 augustss ohci_free_std(sc, p);
1459 1.34 augustss }
1460 1.34 augustss
1461 1.38 augustss sed = opipe->sed;
1462 1.38 augustss DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n",
1463 1.39 augustss (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp)));
1464 1.39 augustss sed->ed.ed_headp = p->physaddr; /* unlink TDs */
1465 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1466 1.38 augustss
1467 1.38 augustss usb_transfer_complete(reqh);
1468 1.38 augustss
1469 1.34 augustss splx(s);
1470 1.34 augustss }
1471 1.34 augustss
1472 1.34 augustss /*
1473 1.1 augustss * Data structures and routines to emulate the root hub.
1474 1.1 augustss */
1475 1.1 augustss usb_device_descriptor_t ohci_devd = {
1476 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1477 1.1 augustss UDESC_DEVICE, /* type */
1478 1.1 augustss {0x00, 0x01}, /* USB version */
1479 1.1 augustss UCLASS_HUB, /* class */
1480 1.1 augustss USUBCLASS_HUB, /* subclass */
1481 1.1 augustss 0, /* protocol */
1482 1.1 augustss 64, /* max packet */
1483 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1484 1.1 augustss 1,2,0, /* string indicies */
1485 1.1 augustss 1 /* # of configurations */
1486 1.1 augustss };
1487 1.1 augustss
1488 1.1 augustss usb_config_descriptor_t ohci_confd = {
1489 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1490 1.1 augustss UDESC_CONFIG,
1491 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1492 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1493 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1494 1.1 augustss 1,
1495 1.1 augustss 1,
1496 1.1 augustss 0,
1497 1.1 augustss UC_SELF_POWERED,
1498 1.1 augustss 0 /* max power */
1499 1.1 augustss };
1500 1.1 augustss
1501 1.1 augustss usb_interface_descriptor_t ohci_ifcd = {
1502 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1503 1.1 augustss UDESC_INTERFACE,
1504 1.1 augustss 0,
1505 1.1 augustss 0,
1506 1.1 augustss 1,
1507 1.1 augustss UCLASS_HUB,
1508 1.1 augustss USUBCLASS_HUB,
1509 1.1 augustss 0,
1510 1.1 augustss 0
1511 1.1 augustss };
1512 1.1 augustss
1513 1.1 augustss usb_endpoint_descriptor_t ohci_endpd = {
1514 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1515 1.1 augustss UDESC_ENDPOINT,
1516 1.40 augustss UE_DIR_IN | OHCI_INTR_ENDPT,
1517 1.1 augustss UE_INTERRUPT,
1518 1.1 augustss {8, 0}, /* max packet */
1519 1.1 augustss 255
1520 1.1 augustss };
1521 1.1 augustss
1522 1.1 augustss usb_hub_descriptor_t ohci_hubd = {
1523 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1524 1.1 augustss UDESC_HUB,
1525 1.1 augustss 0,
1526 1.1 augustss {0,0},
1527 1.1 augustss 0,
1528 1.1 augustss 0,
1529 1.1 augustss {0},
1530 1.1 augustss };
1531 1.1 augustss
1532 1.1 augustss int
1533 1.1 augustss ohci_str(p, l, s)
1534 1.1 augustss usb_string_descriptor_t *p;
1535 1.1 augustss int l;
1536 1.1 augustss char *s;
1537 1.1 augustss {
1538 1.1 augustss int i;
1539 1.1 augustss
1540 1.1 augustss if (l == 0)
1541 1.1 augustss return (0);
1542 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1543 1.1 augustss if (l == 1)
1544 1.1 augustss return (1);
1545 1.1 augustss p->bDescriptorType = UDESC_STRING;
1546 1.1 augustss l -= 2;
1547 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1548 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1549 1.1 augustss return (2*i+2);
1550 1.1 augustss }
1551 1.1 augustss
1552 1.1 augustss /*
1553 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1554 1.1 augustss */
1555 1.1 augustss usbd_status
1556 1.1 augustss ohci_root_ctrl_transfer(reqh)
1557 1.1 augustss usbd_request_handle reqh;
1558 1.1 augustss {
1559 1.17 augustss usbd_status r;
1560 1.17 augustss
1561 1.46 augustss /* Insert last in queue. */
1562 1.17 augustss r = usb_insert_transfer(reqh);
1563 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1564 1.17 augustss return (r);
1565 1.46 augustss
1566 1.46 augustss /* Pipe isn't running, start first */
1567 1.46 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1568 1.17 augustss }
1569 1.17 augustss
1570 1.17 augustss usbd_status
1571 1.17 augustss ohci_root_ctrl_start(reqh)
1572 1.17 augustss usbd_request_handle reqh;
1573 1.17 augustss {
1574 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1575 1.1 augustss usb_device_request_t *req;
1576 1.1 augustss void *buf;
1577 1.1 augustss int port, i;
1578 1.46 augustss int s, len, value, index, l, totlen = 0;
1579 1.1 augustss usb_port_status_t ps;
1580 1.1 augustss usb_hub_descriptor_t hubd;
1581 1.1 augustss usbd_status r;
1582 1.1 augustss u_int32_t v;
1583 1.1 augustss
1584 1.42 augustss #ifdef DIAGNOSTIC
1585 1.42 augustss if (!(reqh->rqflags & URQ_REQUEST))
1586 1.1 augustss /* XXX panic */
1587 1.1 augustss return (USBD_INVAL);
1588 1.42 augustss #endif
1589 1.1 augustss req = &reqh->request;
1590 1.1 augustss
1591 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1592 1.1 augustss req->bmRequestType, req->bRequest));
1593 1.1 augustss
1594 1.1 augustss len = UGETW(req->wLength);
1595 1.1 augustss value = UGETW(req->wValue);
1596 1.1 augustss index = UGETW(req->wIndex);
1597 1.43 augustss
1598 1.43 augustss if (len != 0)
1599 1.43 augustss buf = KERNADDR(&reqh->dmabuf);
1600 1.43 augustss #ifdef DIAGNOSTIC
1601 1.43 augustss else
1602 1.43 augustss buf = 0;
1603 1.43 augustss #endif
1604 1.43 augustss
1605 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1606 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1607 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1608 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1609 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1610 1.1 augustss /*
1611 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1612 1.1 augustss * for the integrated root hub.
1613 1.1 augustss */
1614 1.1 augustss break;
1615 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1616 1.1 augustss if (len > 0) {
1617 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1618 1.1 augustss totlen = 1;
1619 1.1 augustss }
1620 1.1 augustss break;
1621 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1622 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1623 1.1 augustss switch(value >> 8) {
1624 1.1 augustss case UDESC_DEVICE:
1625 1.1 augustss if ((value & 0xff) != 0) {
1626 1.1 augustss r = USBD_IOERROR;
1627 1.1 augustss goto ret;
1628 1.1 augustss }
1629 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1630 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1631 1.1 augustss memcpy(buf, &ohci_devd, l);
1632 1.1 augustss break;
1633 1.1 augustss case UDESC_CONFIG:
1634 1.1 augustss if ((value & 0xff) != 0) {
1635 1.1 augustss r = USBD_IOERROR;
1636 1.1 augustss goto ret;
1637 1.1 augustss }
1638 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1639 1.1 augustss memcpy(buf, &ohci_confd, l);
1640 1.1 augustss buf = (char *)buf + l;
1641 1.1 augustss len -= l;
1642 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1643 1.1 augustss totlen += l;
1644 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1645 1.1 augustss buf = (char *)buf + l;
1646 1.1 augustss len -= l;
1647 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1648 1.1 augustss totlen += l;
1649 1.1 augustss memcpy(buf, &ohci_endpd, l);
1650 1.1 augustss break;
1651 1.1 augustss case UDESC_STRING:
1652 1.1 augustss if (len == 0)
1653 1.1 augustss break;
1654 1.1 augustss *(u_int8_t *)buf = 0;
1655 1.1 augustss totlen = 1;
1656 1.1 augustss switch (value & 0xff) {
1657 1.1 augustss case 1: /* Vendor */
1658 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1659 1.1 augustss break;
1660 1.1 augustss case 2: /* Product */
1661 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1662 1.1 augustss break;
1663 1.1 augustss }
1664 1.1 augustss break;
1665 1.1 augustss default:
1666 1.1 augustss r = USBD_IOERROR;
1667 1.1 augustss goto ret;
1668 1.1 augustss }
1669 1.1 augustss break;
1670 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1671 1.1 augustss if (len > 0) {
1672 1.1 augustss *(u_int8_t *)buf = 0;
1673 1.1 augustss totlen = 1;
1674 1.1 augustss }
1675 1.1 augustss break;
1676 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1677 1.1 augustss if (len > 1) {
1678 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1679 1.1 augustss totlen = 2;
1680 1.1 augustss }
1681 1.1 augustss break;
1682 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1683 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1684 1.1 augustss if (len > 1) {
1685 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1686 1.1 augustss totlen = 2;
1687 1.1 augustss }
1688 1.1 augustss break;
1689 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1690 1.1 augustss if (value >= USB_MAX_DEVICES) {
1691 1.1 augustss r = USBD_IOERROR;
1692 1.1 augustss goto ret;
1693 1.1 augustss }
1694 1.1 augustss sc->sc_addr = value;
1695 1.1 augustss break;
1696 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1697 1.1 augustss if (value != 0 && value != 1) {
1698 1.1 augustss r = USBD_IOERROR;
1699 1.1 augustss goto ret;
1700 1.1 augustss }
1701 1.1 augustss sc->sc_conf = value;
1702 1.1 augustss break;
1703 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1704 1.1 augustss break;
1705 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1706 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1707 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1708 1.1 augustss r = USBD_IOERROR;
1709 1.1 augustss goto ret;
1710 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1711 1.1 augustss break;
1712 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1713 1.1 augustss break;
1714 1.1 augustss /* Hub requests */
1715 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1716 1.1 augustss break;
1717 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1718 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1719 1.14 augustss "port=%d feature=%d\n",
1720 1.1 augustss index, value));
1721 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1722 1.1 augustss r = USBD_IOERROR;
1723 1.1 augustss goto ret;
1724 1.1 augustss }
1725 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1726 1.1 augustss switch(value) {
1727 1.1 augustss case UHF_PORT_ENABLE:
1728 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1729 1.1 augustss break;
1730 1.1 augustss case UHF_PORT_SUSPEND:
1731 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1732 1.1 augustss break;
1733 1.1 augustss case UHF_PORT_POWER:
1734 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1735 1.1 augustss break;
1736 1.1 augustss case UHF_C_PORT_CONNECTION:
1737 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1738 1.1 augustss break;
1739 1.1 augustss case UHF_C_PORT_ENABLE:
1740 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1741 1.1 augustss break;
1742 1.1 augustss case UHF_C_PORT_SUSPEND:
1743 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1744 1.1 augustss break;
1745 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1746 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1747 1.1 augustss break;
1748 1.1 augustss case UHF_C_PORT_RESET:
1749 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1750 1.1 augustss break;
1751 1.1 augustss default:
1752 1.1 augustss r = USBD_IOERROR;
1753 1.1 augustss goto ret;
1754 1.1 augustss }
1755 1.1 augustss switch(value) {
1756 1.1 augustss case UHF_C_PORT_CONNECTION:
1757 1.1 augustss case UHF_C_PORT_ENABLE:
1758 1.1 augustss case UHF_C_PORT_SUSPEND:
1759 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1760 1.1 augustss case UHF_C_PORT_RESET:
1761 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1762 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1763 1.1 augustss ohci_rhsc_able(sc, 1);
1764 1.1 augustss break;
1765 1.1 augustss default:
1766 1.1 augustss break;
1767 1.1 augustss }
1768 1.1 augustss break;
1769 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1770 1.1 augustss if (value != 0) {
1771 1.1 augustss r = USBD_IOERROR;
1772 1.1 augustss goto ret;
1773 1.1 augustss }
1774 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1775 1.1 augustss hubd = ohci_hubd;
1776 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1777 1.15 augustss USETW(hubd.wHubCharacteristics,
1778 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1779 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1780 1.1 augustss /* XXX overcurrent */
1781 1.1 augustss );
1782 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1783 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1784 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1785 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
1786 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1787 1.1 augustss l = min(len, hubd.bDescLength);
1788 1.1 augustss totlen = l;
1789 1.1 augustss memcpy(buf, &hubd, l);
1790 1.1 augustss break;
1791 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1792 1.1 augustss if (len != 4) {
1793 1.1 augustss r = USBD_IOERROR;
1794 1.1 augustss goto ret;
1795 1.1 augustss }
1796 1.1 augustss memset(buf, 0, len); /* ? XXX */
1797 1.1 augustss totlen = len;
1798 1.1 augustss break;
1799 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1800 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1801 1.1 augustss index));
1802 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1803 1.1 augustss r = USBD_IOERROR;
1804 1.1 augustss goto ret;
1805 1.1 augustss }
1806 1.1 augustss if (len != 4) {
1807 1.1 augustss r = USBD_IOERROR;
1808 1.1 augustss goto ret;
1809 1.1 augustss }
1810 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1811 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1812 1.1 augustss v));
1813 1.1 augustss USETW(ps.wPortStatus, v);
1814 1.1 augustss USETW(ps.wPortChange, v >> 16);
1815 1.1 augustss l = min(len, sizeof ps);
1816 1.1 augustss memcpy(buf, &ps, l);
1817 1.1 augustss totlen = l;
1818 1.1 augustss break;
1819 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1820 1.1 augustss r = USBD_IOERROR;
1821 1.1 augustss goto ret;
1822 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1823 1.1 augustss break;
1824 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1825 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1826 1.1 augustss r = USBD_IOERROR;
1827 1.1 augustss goto ret;
1828 1.1 augustss }
1829 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1830 1.1 augustss switch(value) {
1831 1.1 augustss case UHF_PORT_ENABLE:
1832 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
1833 1.1 augustss break;
1834 1.1 augustss case UHF_PORT_SUSPEND:
1835 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
1836 1.1 augustss break;
1837 1.1 augustss case UHF_PORT_RESET:
1838 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
1839 1.14 augustss index));
1840 1.1 augustss OWRITE4(sc, port, UPS_RESET);
1841 1.1 augustss for (i = 0; i < 10; i++) {
1842 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
1843 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
1844 1.1 augustss break;
1845 1.1 augustss }
1846 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1847 1.1 augustss index, OREAD4(sc, port)));
1848 1.1 augustss break;
1849 1.1 augustss case UHF_PORT_POWER:
1850 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
1851 1.14 augustss "%d\n", index));
1852 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
1853 1.1 augustss break;
1854 1.1 augustss default:
1855 1.1 augustss r = USBD_IOERROR;
1856 1.1 augustss goto ret;
1857 1.1 augustss }
1858 1.1 augustss break;
1859 1.1 augustss default:
1860 1.1 augustss r = USBD_IOERROR;
1861 1.1 augustss goto ret;
1862 1.1 augustss }
1863 1.1 augustss reqh->actlen = totlen;
1864 1.1 augustss r = USBD_NORMAL_COMPLETION;
1865 1.1 augustss ret:
1866 1.1 augustss reqh->status = r;
1867 1.46 augustss s = splusb();
1868 1.38 augustss usb_transfer_complete(reqh);
1869 1.46 augustss splx(s);
1870 1.1 augustss return (USBD_IN_PROGRESS);
1871 1.1 augustss }
1872 1.1 augustss
1873 1.1 augustss /* Abort a root control request. */
1874 1.1 augustss void
1875 1.1 augustss ohci_root_ctrl_abort(reqh)
1876 1.1 augustss usbd_request_handle reqh;
1877 1.1 augustss {
1878 1.9 augustss /* Nothing to do, all transfers are synchronous. */
1879 1.1 augustss }
1880 1.1 augustss
1881 1.1 augustss /* Close the root pipe. */
1882 1.1 augustss void
1883 1.1 augustss ohci_root_ctrl_close(pipe)
1884 1.1 augustss usbd_pipe_handle pipe;
1885 1.1 augustss {
1886 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
1887 1.34 augustss /* Nothing to do. */
1888 1.1 augustss }
1889 1.1 augustss
1890 1.1 augustss usbd_status
1891 1.1 augustss ohci_root_intr_transfer(reqh)
1892 1.1 augustss usbd_request_handle reqh;
1893 1.1 augustss {
1894 1.17 augustss usbd_status r;
1895 1.17 augustss
1896 1.46 augustss /* Insert last in queue. */
1897 1.17 augustss r = usb_insert_transfer(reqh);
1898 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1899 1.17 augustss return (r);
1900 1.46 augustss
1901 1.46 augustss /* Pipe isn't running, start first */
1902 1.46 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1903 1.17 augustss }
1904 1.17 augustss
1905 1.17 augustss usbd_status
1906 1.17 augustss ohci_root_intr_start(reqh)
1907 1.17 augustss usbd_request_handle reqh;
1908 1.17 augustss {
1909 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
1910 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1911 1.1 augustss
1912 1.1 augustss sc->sc_intrreqh = reqh;
1913 1.1 augustss
1914 1.1 augustss return (USBD_IN_PROGRESS);
1915 1.1 augustss }
1916 1.1 augustss
1917 1.3 augustss /* Abort a root interrupt request. */
1918 1.1 augustss void
1919 1.1 augustss ohci_root_intr_abort(reqh)
1920 1.1 augustss usbd_request_handle reqh;
1921 1.1 augustss {
1922 1.3 augustss /* No need to abort. */
1923 1.1 augustss }
1924 1.1 augustss
1925 1.1 augustss /* Close the root pipe. */
1926 1.1 augustss void
1927 1.1 augustss ohci_root_intr_close(pipe)
1928 1.1 augustss usbd_pipe_handle pipe;
1929 1.1 augustss {
1930 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1931 1.1 augustss
1932 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
1933 1.34 augustss
1934 1.34 augustss sc->sc_intrreqh = 0;
1935 1.1 augustss }
1936 1.1 augustss
1937 1.1 augustss /************************/
1938 1.1 augustss
1939 1.1 augustss usbd_status
1940 1.1 augustss ohci_device_ctrl_transfer(reqh)
1941 1.1 augustss usbd_request_handle reqh;
1942 1.1 augustss {
1943 1.17 augustss usbd_status r;
1944 1.17 augustss
1945 1.46 augustss /* Insert last in queue. */
1946 1.17 augustss r = usb_insert_transfer(reqh);
1947 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1948 1.17 augustss return (r);
1949 1.46 augustss
1950 1.46 augustss /* Pipe isn't running, start first */
1951 1.46 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1952 1.17 augustss }
1953 1.17 augustss
1954 1.17 augustss usbd_status
1955 1.17 augustss ohci_device_ctrl_start(reqh)
1956 1.17 augustss usbd_request_handle reqh;
1957 1.17 augustss {
1958 1.6 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1959 1.1 augustss usbd_status r;
1960 1.1 augustss
1961 1.42 augustss #ifdef DIAGNOSTIC
1962 1.42 augustss if (!(reqh->rqflags & URQ_REQUEST)) {
1963 1.1 augustss /* XXX panic */
1964 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
1965 1.1 augustss return (USBD_INVAL);
1966 1.1 augustss }
1967 1.42 augustss #endif
1968 1.1 augustss
1969 1.1 augustss r = ohci_device_request(reqh);
1970 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1971 1.1 augustss return (r);
1972 1.1 augustss
1973 1.6 augustss if (sc->sc_bus.use_polling)
1974 1.6 augustss ohci_waitintr(sc, reqh);
1975 1.1 augustss return (USBD_IN_PROGRESS);
1976 1.1 augustss }
1977 1.1 augustss
1978 1.1 augustss /* Abort a device control request. */
1979 1.1 augustss void
1980 1.1 augustss ohci_device_ctrl_abort(reqh)
1981 1.1 augustss usbd_request_handle reqh;
1982 1.1 augustss {
1983 1.34 augustss DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh));
1984 1.38 augustss ohci_abort_req(reqh, USBD_CANCELLED);
1985 1.1 augustss }
1986 1.1 augustss
1987 1.1 augustss /* Close a device control pipe. */
1988 1.1 augustss void
1989 1.1 augustss ohci_device_ctrl_close(pipe)
1990 1.1 augustss usbd_pipe_handle pipe;
1991 1.1 augustss {
1992 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1993 1.1 augustss
1994 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
1995 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
1996 1.3 augustss }
1997 1.3 augustss
1998 1.3 augustss /************************/
1999 1.37 augustss
2000 1.37 augustss void
2001 1.37 augustss ohci_device_clear_toggle(pipe)
2002 1.37 augustss usbd_pipe_handle pipe;
2003 1.37 augustss {
2004 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2005 1.37 augustss
2006 1.39 augustss opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY);
2007 1.37 augustss }
2008 1.37 augustss
2009 1.37 augustss void
2010 1.37 augustss ohci_noop(pipe)
2011 1.37 augustss usbd_pipe_handle pipe;
2012 1.37 augustss {
2013 1.37 augustss }
2014 1.3 augustss
2015 1.3 augustss usbd_status
2016 1.3 augustss ohci_device_bulk_transfer(reqh)
2017 1.3 augustss usbd_request_handle reqh;
2018 1.3 augustss {
2019 1.17 augustss usbd_status r;
2020 1.17 augustss
2021 1.46 augustss /* Insert last in queue. */
2022 1.17 augustss r = usb_insert_transfer(reqh);
2023 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2024 1.17 augustss return (r);
2025 1.46 augustss
2026 1.46 augustss /* Pipe isn't running, start first */
2027 1.46 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2028 1.17 augustss }
2029 1.17 augustss
2030 1.17 augustss usbd_status
2031 1.17 augustss ohci_device_bulk_start(reqh)
2032 1.17 augustss usbd_request_handle reqh;
2033 1.17 augustss {
2034 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2035 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2036 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2037 1.3 augustss int addr = dev->address;
2038 1.3 augustss ohci_soft_td_t *xfer, *tail;
2039 1.3 augustss ohci_soft_ed_t *sed;
2040 1.40 augustss int s, len, isread, endpt;
2041 1.3 augustss
2042 1.34 augustss #ifdef DIAGNOSTIC
2043 1.42 augustss if (reqh->rqflags & URQ_REQUEST) {
2044 1.3 augustss /* XXX panic */
2045 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2046 1.3 augustss return (USBD_INVAL);
2047 1.3 augustss }
2048 1.34 augustss #endif
2049 1.3 augustss
2050 1.3 augustss len = reqh->length;
2051 1.40 augustss endpt = reqh->pipe->endpoint->edesc->bEndpointAddress;
2052 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2053 1.3 augustss sed = opipe->sed;
2054 1.3 augustss
2055 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d "
2056 1.34 augustss "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags,
2057 1.40 augustss endpt));
2058 1.34 augustss
2059 1.32 augustss opipe->u.bulk.isread = isread;
2060 1.3 augustss opipe->u.bulk.length = len;
2061 1.3 augustss
2062 1.3 augustss tail = ohci_alloc_std(sc);
2063 1.43 augustss if (!tail)
2064 1.43 augustss return (USBD_NOMEM);
2065 1.3 augustss tail->reqh = 0;
2066 1.3 augustss
2067 1.3 augustss /* Update device address */
2068 1.39 augustss sed->ed.ed_flags = LE(
2069 1.39 augustss (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2070 1.16 augustss OHCI_ED_SET_FA(addr));
2071 1.3 augustss
2072 1.3 augustss /* Set up data transaction */
2073 1.3 augustss xfer = opipe->tail;
2074 1.39 augustss xfer->td.td_flags = LE(
2075 1.3 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
2076 1.19 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY |
2077 1.19 augustss (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
2078 1.43 augustss xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
2079 1.3 augustss xfer->nexttd = tail;
2080 1.39 augustss xfer->td.td_nexttd = LE(tail->physaddr);
2081 1.39 augustss xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1);
2082 1.3 augustss xfer->len = len;
2083 1.3 augustss xfer->reqh = reqh;
2084 1.34 augustss xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2085 1.3 augustss reqh->hcpriv = xfer;
2086 1.3 augustss
2087 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2088 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2089 1.39 augustss (int)LE(sed->ed.ed_flags), (int)LE(xfer->td.td_flags),
2090 1.39 augustss (int)LE(xfer->td.td_cbp), (int)LE(xfer->td.td_be)));
2091 1.34 augustss
2092 1.34 augustss #ifdef USB_DEBUG
2093 1.34 augustss if (ohcidebug > 4) {
2094 1.34 augustss ohci_dump_ed(sed);
2095 1.34 augustss ohci_dump_tds(xfer);
2096 1.34 augustss }
2097 1.34 augustss #endif
2098 1.34 augustss
2099 1.3 augustss /* Insert ED in schedule */
2100 1.3 augustss s = splusb();
2101 1.3 augustss ohci_hash_add_td(sc, xfer);
2102 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2103 1.3 augustss opipe->tail = tail;
2104 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2105 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2106 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
2107 1.15 augustss usb_timeout(ohci_timeout, reqh,
2108 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2109 1.15 augustss }
2110 1.34 augustss
2111 1.34 augustss #ifdef USB_DEBUG
2112 1.34 augustss if (ohcidebug > 5) {
2113 1.34 augustss delay(5000);
2114 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2115 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2116 1.34 augustss ohci_dump_ed(sed);
2117 1.34 augustss ohci_dump_tds(xfer);
2118 1.34 augustss }
2119 1.34 augustss #endif
2120 1.34 augustss
2121 1.3 augustss splx(s);
2122 1.3 augustss
2123 1.3 augustss return (USBD_IN_PROGRESS);
2124 1.3 augustss }
2125 1.3 augustss
2126 1.3 augustss void
2127 1.3 augustss ohci_device_bulk_abort(reqh)
2128 1.3 augustss usbd_request_handle reqh;
2129 1.3 augustss {
2130 1.34 augustss DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh));
2131 1.38 augustss ohci_abort_req(reqh, USBD_CANCELLED);
2132 1.3 augustss }
2133 1.3 augustss
2134 1.34 augustss /*
2135 1.34 augustss * Close a device bulk pipe.
2136 1.34 augustss */
2137 1.3 augustss void
2138 1.3 augustss ohci_device_bulk_close(pipe)
2139 1.3 augustss usbd_pipe_handle pipe;
2140 1.3 augustss {
2141 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2142 1.3 augustss
2143 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2144 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2145 1.1 augustss }
2146 1.1 augustss
2147 1.1 augustss /************************/
2148 1.1 augustss
2149 1.1 augustss usbd_status
2150 1.1 augustss ohci_device_intr_transfer(reqh)
2151 1.17 augustss usbd_request_handle reqh;
2152 1.17 augustss {
2153 1.17 augustss usbd_status r;
2154 1.17 augustss
2155 1.46 augustss /* Insert last in queue. */
2156 1.17 augustss r = usb_insert_transfer(reqh);
2157 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2158 1.17 augustss return (r);
2159 1.46 augustss
2160 1.46 augustss /* Pipe isn't running, start first */
2161 1.46 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2162 1.17 augustss }
2163 1.17 augustss
2164 1.17 augustss usbd_status
2165 1.17 augustss ohci_device_intr_start(reqh)
2166 1.1 augustss usbd_request_handle reqh;
2167 1.1 augustss {
2168 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2169 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2170 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2171 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2172 1.1 augustss ohci_soft_td_t *xfer, *tail;
2173 1.1 augustss int len;
2174 1.1 augustss int s;
2175 1.1 augustss
2176 1.43 augustss DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p len=%d "
2177 1.14 augustss "flags=%d priv=%p\n",
2178 1.43 augustss reqh, reqh->length, reqh->flags, reqh->priv));
2179 1.1 augustss
2180 1.42 augustss #ifdef DIAGNOSTIC
2181 1.42 augustss if (reqh->rqflags & URQ_REQUEST)
2182 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2183 1.42 augustss #endif
2184 1.1 augustss
2185 1.1 augustss len = reqh->length;
2186 1.1 augustss
2187 1.1 augustss xfer = opipe->tail;
2188 1.1 augustss tail = ohci_alloc_std(sc);
2189 1.43 augustss if (!tail)
2190 1.43 augustss return (USBD_NOMEM);
2191 1.1 augustss tail->reqh = 0;
2192 1.1 augustss
2193 1.39 augustss xfer->td.td_flags = LE(
2194 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2195 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2196 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
2197 1.39 augustss xfer->td.td_flags |= LE(OHCI_TD_R);
2198 1.43 augustss xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
2199 1.1 augustss xfer->nexttd = tail;
2200 1.39 augustss xfer->td.td_nexttd = LE(tail->physaddr);
2201 1.39 augustss xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1);
2202 1.1 augustss xfer->len = len;
2203 1.1 augustss xfer->reqh = reqh;
2204 1.34 augustss xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2205 1.1 augustss reqh->hcpriv = xfer;
2206 1.1 augustss
2207 1.1 augustss #if USB_DEBUG
2208 1.1 augustss if (ohcidebug > 5) {
2209 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2210 1.1 augustss ohci_dump_ed(sed);
2211 1.1 augustss ohci_dump_tds(xfer);
2212 1.1 augustss }
2213 1.1 augustss #endif
2214 1.1 augustss
2215 1.1 augustss /* Insert ED in schedule */
2216 1.1 augustss s = splusb();
2217 1.1 augustss ohci_hash_add_td(sc, xfer);
2218 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2219 1.1 augustss opipe->tail = tail;
2220 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2221 1.1 augustss
2222 1.1 augustss #ifdef USB_DEBUG
2223 1.1 augustss if (ohcidebug > 5) {
2224 1.1 augustss delay(5000);
2225 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2226 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2227 1.1 augustss ohci_dump_ed(sed);
2228 1.1 augustss ohci_dump_tds(xfer);
2229 1.1 augustss }
2230 1.1 augustss #endif
2231 1.26 augustss splx(s);
2232 1.1 augustss
2233 1.1 augustss return (USBD_IN_PROGRESS);
2234 1.1 augustss }
2235 1.1 augustss
2236 1.1 augustss /* Abort a device control request. */
2237 1.1 augustss void
2238 1.1 augustss ohci_device_intr_abort(reqh)
2239 1.1 augustss usbd_request_handle reqh;
2240 1.1 augustss {
2241 1.34 augustss if (reqh->pipe->intrreqh == reqh) {
2242 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2243 1.34 augustss reqh->pipe->intrreqh = 0;
2244 1.1 augustss }
2245 1.38 augustss ohci_abort_req(reqh, USBD_CANCELLED);
2246 1.1 augustss }
2247 1.1 augustss
2248 1.1 augustss /* Close a device interrupt pipe. */
2249 1.1 augustss void
2250 1.1 augustss ohci_device_intr_close(pipe)
2251 1.1 augustss usbd_pipe_handle pipe;
2252 1.1 augustss {
2253 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2254 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2255 1.1 augustss int nslots = opipe->u.intr.nslots;
2256 1.1 augustss int pos = opipe->u.intr.pos;
2257 1.1 augustss int j;
2258 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2259 1.1 augustss int s;
2260 1.1 augustss
2261 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2262 1.1 augustss pipe, nslots, pos));
2263 1.1 augustss s = splusb();
2264 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
2265 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
2266 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
2267 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2268 1.1 augustss
2269 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2270 1.1 augustss ;
2271 1.1 augustss if (!p)
2272 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2273 1.1 augustss p->next = sed->next;
2274 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
2275 1.1 augustss splx(s);
2276 1.1 augustss
2277 1.1 augustss for (j = 0; j < nslots; j++)
2278 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2279 1.1 augustss
2280 1.1 augustss ohci_free_std(sc, opipe->tail);
2281 1.1 augustss ohci_free_sed(sc, opipe->sed);
2282 1.1 augustss }
2283 1.1 augustss
2284 1.1 augustss usbd_status
2285 1.1 augustss ohci_device_setintr(sc, opipe, ival)
2286 1.1 augustss ohci_softc_t *sc;
2287 1.1 augustss struct ohci_pipe *opipe;
2288 1.1 augustss int ival;
2289 1.1 augustss {
2290 1.1 augustss int i, j, s, best;
2291 1.1 augustss u_int npoll, slow, shigh, nslots;
2292 1.1 augustss u_int bestbw, bw;
2293 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2294 1.1 augustss
2295 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2296 1.1 augustss if (ival == 0) {
2297 1.1 augustss printf("ohci_setintr: 0 interval\n");
2298 1.1 augustss return (USBD_INVAL);
2299 1.1 augustss }
2300 1.1 augustss
2301 1.1 augustss npoll = OHCI_NO_INTRS;
2302 1.1 augustss while (npoll > ival)
2303 1.1 augustss npoll /= 2;
2304 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2305 1.1 augustss
2306 1.1 augustss /*
2307 1.1 augustss * We now know which level in the tree the ED must go into.
2308 1.1 augustss * Figure out which slot has most bandwidth left over.
2309 1.1 augustss * Slots to examine:
2310 1.1 augustss * npoll
2311 1.1 augustss * 1 0
2312 1.1 augustss * 2 1 2
2313 1.1 augustss * 4 3 4 5 6
2314 1.1 augustss * 8 7 8 9 10 11 12 13 14
2315 1.1 augustss * N (N-1) .. (N-1+N-1)
2316 1.1 augustss */
2317 1.1 augustss slow = npoll-1;
2318 1.1 augustss shigh = slow + npoll;
2319 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2320 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2321 1.1 augustss bw = 0;
2322 1.1 augustss for (j = 0; j < nslots; j++)
2323 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2324 1.1 augustss if (bw < bestbw) {
2325 1.1 augustss best = i;
2326 1.1 augustss bestbw = bw;
2327 1.1 augustss }
2328 1.1 augustss }
2329 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2330 1.1 augustss best, slow, shigh, bestbw));
2331 1.1 augustss
2332 1.1 augustss s = splusb();
2333 1.1 augustss hsed = sc->sc_eds[best];
2334 1.1 augustss sed->next = hsed->next;
2335 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
2336 1.1 augustss hsed->next = sed;
2337 1.39 augustss hsed->ed.ed_nexted = LE(sed->physaddr);
2338 1.1 augustss splx(s);
2339 1.1 augustss
2340 1.1 augustss for (j = 0; j < nslots; j++)
2341 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2342 1.1 augustss opipe->u.intr.nslots = nslots;
2343 1.1 augustss opipe->u.intr.pos = best;
2344 1.1 augustss
2345 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2346 1.1 augustss return (USBD_NORMAL_COMPLETION);
2347 1.1 augustss }
2348 1.1 augustss
2349