ohci.c revision 1.47 1 1.47 augustss /* $NetBSD: ohci.c,v 1.47 1999/09/15 10:25:31 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Open Host Controller driver.
42 1.1 augustss *
43 1.30 augustss * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
44 1.30 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
45 1.1 augustss */
46 1.1 augustss
47 1.1 augustss #include <sys/param.h>
48 1.1 augustss #include <sys/systm.h>
49 1.1 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
52 1.1 augustss #include <sys/device.h>
53 1.15 augustss #elif defined(__FreeBSD__)
54 1.15 augustss #include <sys/module.h>
55 1.15 augustss #include <sys/bus.h>
56 1.15 augustss #endif
57 1.1 augustss #include <sys/proc.h>
58 1.1 augustss #include <sys/queue.h>
59 1.1 augustss #include <sys/select.h>
60 1.1 augustss
61 1.4 augustss #include <machine/bus.h>
62 1.16 augustss #include <machine/endian.h>
63 1.4 augustss
64 1.1 augustss #include <dev/usb/usb.h>
65 1.1 augustss #include <dev/usb/usbdi.h>
66 1.1 augustss #include <dev/usb/usbdivar.h>
67 1.38 augustss #include <dev/usb/usb_mem.h>
68 1.1 augustss #include <dev/usb/usb_quirks.h>
69 1.1 augustss
70 1.1 augustss #include <dev/usb/ohcireg.h>
71 1.1 augustss #include <dev/usb/ohcivar.h>
72 1.1 augustss
73 1.15 augustss #if defined(__FreeBSD__)
74 1.15 augustss #include <machine/clock.h>
75 1.15 augustss
76 1.15 augustss #define delay(d) DELAY(d)
77 1.15 augustss
78 1.15 augustss #endif
79 1.1 augustss
80 1.36 augustss #if defined(__OpenBSD__)
81 1.36 augustss struct cfdriver ohci_cd = {
82 1.36 augustss NULL, "ohci", DV_DULL
83 1.36 augustss };
84 1.36 augustss #endif
85 1.36 augustss
86 1.16 augustss /*
87 1.16 augustss * The OHCI controller is little endian, so on big endian machines
88 1.16 augustss * the data strored in memory needs to be swapped.
89 1.16 augustss */
90 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
91 1.16 augustss #define LE(x) (bswap32(x))
92 1.16 augustss #else
93 1.16 augustss #define LE(x) (x)
94 1.16 augustss #endif
95 1.16 augustss
96 1.1 augustss struct ohci_pipe;
97 1.1 augustss
98 1.1 augustss ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
99 1.1 augustss void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
100 1.1 augustss
101 1.1 augustss ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
102 1.1 augustss void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
103 1.1 augustss
104 1.33 augustss void ohci_power __P((int, void *));
105 1.1 augustss usbd_status ohci_open __P((usbd_pipe_handle));
106 1.5 augustss void ohci_poll __P((struct usbd_bus *));
107 1.1 augustss void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
108 1.1 augustss void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
109 1.1 augustss void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
110 1.1 augustss
111 1.1 augustss usbd_status ohci_device_request __P((usbd_request_handle reqh));
112 1.3 augustss void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
113 1.3 augustss void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
114 1.1 augustss void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
115 1.1 augustss void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
116 1.1 augustss ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
117 1.1 augustss
118 1.42 augustss usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t));
119 1.42 augustss void ohci_freem __P((struct usbd_bus *, usb_dma_t *));
120 1.42 augustss
121 1.1 augustss usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
122 1.17 augustss usbd_status ohci_root_ctrl_start __P((usbd_request_handle));
123 1.1 augustss void ohci_root_ctrl_abort __P((usbd_request_handle));
124 1.1 augustss void ohci_root_ctrl_close __P((usbd_pipe_handle));
125 1.1 augustss
126 1.1 augustss usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
127 1.17 augustss usbd_status ohci_root_intr_start __P((usbd_request_handle));
128 1.1 augustss void ohci_root_intr_abort __P((usbd_request_handle));
129 1.1 augustss void ohci_root_intr_close __P((usbd_pipe_handle));
130 1.38 augustss void ohci_root_intr_done __P((usbd_request_handle));
131 1.1 augustss
132 1.1 augustss usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
133 1.17 augustss usbd_status ohci_device_ctrl_start __P((usbd_request_handle));
134 1.1 augustss void ohci_device_ctrl_abort __P((usbd_request_handle));
135 1.1 augustss void ohci_device_ctrl_close __P((usbd_pipe_handle));
136 1.38 augustss void ohci_device_ctrl_done __P((usbd_request_handle));
137 1.1 augustss
138 1.3 augustss usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
139 1.17 augustss usbd_status ohci_device_bulk_start __P((usbd_request_handle));
140 1.3 augustss void ohci_device_bulk_abort __P((usbd_request_handle));
141 1.3 augustss void ohci_device_bulk_close __P((usbd_pipe_handle));
142 1.38 augustss void ohci_device_bulk_done __P((usbd_request_handle));
143 1.3 augustss
144 1.1 augustss usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
145 1.17 augustss usbd_status ohci_device_intr_start __P((usbd_request_handle));
146 1.1 augustss void ohci_device_intr_abort __P((usbd_request_handle));
147 1.1 augustss void ohci_device_intr_close __P((usbd_pipe_handle));
148 1.38 augustss void ohci_device_intr_done __P((usbd_request_handle));
149 1.38 augustss
150 1.43 augustss usbd_status ohci_device_isoc_transfer __P((usbd_request_handle));
151 1.43 augustss usbd_status ohci_device_isoc_start __P((usbd_request_handle));
152 1.43 augustss void ohci_device_isoc_abort __P((usbd_request_handle));
153 1.43 augustss void ohci_device_isoc_close __P((usbd_pipe_handle));
154 1.43 augustss void ohci_device_isoc_done __P((usbd_request_handle));
155 1.43 augustss
156 1.1 augustss usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
157 1.1 augustss struct ohci_pipe *pipe, int ival));
158 1.1 augustss
159 1.1 augustss int ohci_str __P((usb_string_descriptor_t *, int, char *));
160 1.1 augustss
161 1.1 augustss void ohci_timeout __P((void *));
162 1.1 augustss void ohci_rhsc_able __P((ohci_softc_t *, int));
163 1.1 augustss
164 1.34 augustss void ohci_close_pipe __P((usbd_pipe_handle pipe,
165 1.34 augustss ohci_soft_ed_t *head));
166 1.38 augustss void ohci_abort_req __P((usbd_request_handle reqh,
167 1.38 augustss usbd_status status));
168 1.38 augustss void ohci_abort_req_end __P((void *));
169 1.34 augustss
170 1.37 augustss void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
171 1.37 augustss void ohci_noop __P((usbd_pipe_handle pipe));
172 1.37 augustss
173 1.1 augustss #ifdef USB_DEBUG
174 1.1 augustss ohci_softc_t *thesc;
175 1.1 augustss void ohci_dumpregs __P((ohci_softc_t *));
176 1.1 augustss void ohci_dump_tds __P((ohci_soft_td_t *));
177 1.1 augustss void ohci_dump_td __P((ohci_soft_td_t *));
178 1.1 augustss void ohci_dump_ed __P((ohci_soft_ed_t *));
179 1.1 augustss #endif
180 1.1 augustss
181 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
182 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
183 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
184 1.1 augustss
185 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
186 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
187 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
188 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
189 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
190 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
191 1.1 augustss
192 1.1 augustss struct ohci_pipe {
193 1.1 augustss struct usbd_pipe pipe;
194 1.1 augustss ohci_soft_ed_t *sed;
195 1.1 augustss ohci_soft_td_t *tail;
196 1.1 augustss /* Info needed for different pipe kinds. */
197 1.1 augustss union {
198 1.1 augustss /* Control pipe */
199 1.1 augustss struct {
200 1.4 augustss usb_dma_t reqdma;
201 1.1 augustss u_int length;
202 1.1 augustss ohci_soft_td_t *setup, *xfer, *stat;
203 1.1 augustss } ctl;
204 1.1 augustss /* Interrupt pipe */
205 1.1 augustss struct {
206 1.1 augustss int nslots;
207 1.1 augustss int pos;
208 1.1 augustss } intr;
209 1.3 augustss /* Bulk pipe */
210 1.3 augustss struct {
211 1.3 augustss u_int length;
212 1.32 augustss int isread;
213 1.3 augustss } bulk;
214 1.43 augustss /* Iso pipe */
215 1.43 augustss struct iso {
216 1.43 augustss int xxxxx;
217 1.43 augustss } iso;
218 1.1 augustss } u;
219 1.1 augustss };
220 1.1 augustss
221 1.1 augustss #define OHCI_INTR_ENDPT 1
222 1.1 augustss
223 1.42 augustss struct usbd_bus_methods ohci_bus_methods = {
224 1.42 augustss ohci_open,
225 1.42 augustss ohci_poll,
226 1.42 augustss ohci_allocm,
227 1.42 augustss ohci_freem,
228 1.42 augustss };
229 1.42 augustss
230 1.42 augustss struct usbd_pipe_methods ohci_root_ctrl_methods = {
231 1.1 augustss ohci_root_ctrl_transfer,
232 1.17 augustss ohci_root_ctrl_start,
233 1.1 augustss ohci_root_ctrl_abort,
234 1.1 augustss ohci_root_ctrl_close,
235 1.37 augustss ohci_noop,
236 1.7 augustss 0,
237 1.1 augustss };
238 1.1 augustss
239 1.42 augustss struct usbd_pipe_methods ohci_root_intr_methods = {
240 1.1 augustss ohci_root_intr_transfer,
241 1.17 augustss ohci_root_intr_start,
242 1.1 augustss ohci_root_intr_abort,
243 1.1 augustss ohci_root_intr_close,
244 1.37 augustss ohci_noop,
245 1.38 augustss ohci_root_intr_done,
246 1.1 augustss };
247 1.1 augustss
248 1.42 augustss struct usbd_pipe_methods ohci_device_ctrl_methods = {
249 1.1 augustss ohci_device_ctrl_transfer,
250 1.17 augustss ohci_device_ctrl_start,
251 1.1 augustss ohci_device_ctrl_abort,
252 1.1 augustss ohci_device_ctrl_close,
253 1.37 augustss ohci_noop,
254 1.38 augustss ohci_device_ctrl_done,
255 1.1 augustss };
256 1.1 augustss
257 1.42 augustss struct usbd_pipe_methods ohci_device_intr_methods = {
258 1.1 augustss ohci_device_intr_transfer,
259 1.17 augustss ohci_device_intr_start,
260 1.1 augustss ohci_device_intr_abort,
261 1.1 augustss ohci_device_intr_close,
262 1.37 augustss ohci_device_clear_toggle,
263 1.38 augustss ohci_device_intr_done,
264 1.1 augustss };
265 1.1 augustss
266 1.42 augustss struct usbd_pipe_methods ohci_device_bulk_methods = {
267 1.3 augustss ohci_device_bulk_transfer,
268 1.17 augustss ohci_device_bulk_start,
269 1.3 augustss ohci_device_bulk_abort,
270 1.3 augustss ohci_device_bulk_close,
271 1.37 augustss ohci_device_clear_toggle,
272 1.38 augustss ohci_device_bulk_done,
273 1.3 augustss };
274 1.3 augustss
275 1.43 augustss #if 0
276 1.43 augustss struct usbd_pipe_methods ohci_device_isoc_methods = {
277 1.43 augustss ohci_device_isoc_transfer,
278 1.43 augustss ohci_device_isoc_start,
279 1.43 augustss ohci_device_isoc_abort,
280 1.43 augustss ohci_device_isoc_close,
281 1.43 augustss ohci_noop,
282 1.43 augustss ohci_device_isoc_done,
283 1.43 augustss };
284 1.43 augustss #endif
285 1.43 augustss
286 1.47 augustss int
287 1.47 augustss ohci_activate(self, act)
288 1.47 augustss device_ptr_t self;
289 1.47 augustss enum devact act;
290 1.47 augustss {
291 1.47 augustss /*struct ohci_softc *sc = (struct ohci_softc *)self;*/
292 1.47 augustss int rv = 0;
293 1.47 augustss
294 1.47 augustss switch (act) {
295 1.47 augustss case DVACT_ACTIVATE:
296 1.47 augustss return (EOPNOTSUPP);
297 1.47 augustss break;
298 1.47 augustss
299 1.47 augustss case DVACT_DEACTIVATE:
300 1.47 augustss break;
301 1.47 augustss }
302 1.47 augustss return (rv);
303 1.47 augustss }
304 1.47 augustss
305 1.47 augustss int
306 1.47 augustss ohci_detach(self, flags)
307 1.47 augustss device_ptr_t self;
308 1.47 augustss int flags;
309 1.47 augustss {
310 1.47 augustss struct ohci_softc *sc = (struct ohci_softc *)self;
311 1.47 augustss int rv = 0;
312 1.47 augustss
313 1.47 augustss if (sc->sc_child != NULL)
314 1.47 augustss rv = config_detach(sc->sc_child, flags);
315 1.47 augustss
316 1.47 augustss if (rv != 0)
317 1.47 augustss return (rv);
318 1.47 augustss
319 1.47 augustss powerhook_disestablish(sc->sc_powerhook);
320 1.47 augustss /* free data structures XXX */
321 1.47 augustss
322 1.47 augustss return (rv);
323 1.47 augustss }
324 1.47 augustss
325 1.1 augustss ohci_soft_ed_t *
326 1.1 augustss ohci_alloc_sed(sc)
327 1.1 augustss ohci_softc_t *sc;
328 1.1 augustss {
329 1.1 augustss ohci_soft_ed_t *sed;
330 1.1 augustss usbd_status r;
331 1.1 augustss int i, offs;
332 1.4 augustss usb_dma_t dma;
333 1.1 augustss
334 1.1 augustss if (!sc->sc_freeeds) {
335 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
336 1.44 augustss r = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
337 1.4 augustss OHCI_ED_ALIGN, &dma);
338 1.39 augustss if (r != USBD_NORMAL_COMPLETION)
339 1.39 augustss return (0);
340 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
341 1.39 augustss offs = i * OHCI_SED_SIZE;
342 1.39 augustss sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
343 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
344 1.1 augustss sed->next = sc->sc_freeeds;
345 1.1 augustss sc->sc_freeeds = sed;
346 1.1 augustss }
347 1.1 augustss }
348 1.1 augustss sed = sc->sc_freeeds;
349 1.1 augustss sc->sc_freeeds = sed->next;
350 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
351 1.1 augustss sed->next = 0;
352 1.39 augustss return (sed);
353 1.1 augustss }
354 1.1 augustss
355 1.1 augustss void
356 1.1 augustss ohci_free_sed(sc, sed)
357 1.1 augustss ohci_softc_t *sc;
358 1.1 augustss ohci_soft_ed_t *sed;
359 1.1 augustss {
360 1.1 augustss sed->next = sc->sc_freeeds;
361 1.1 augustss sc->sc_freeeds = sed;
362 1.1 augustss }
363 1.1 augustss
364 1.1 augustss ohci_soft_td_t *
365 1.1 augustss ohci_alloc_std(sc)
366 1.1 augustss ohci_softc_t *sc;
367 1.1 augustss {
368 1.1 augustss ohci_soft_td_t *std;
369 1.1 augustss usbd_status r;
370 1.1 augustss int i, offs;
371 1.4 augustss usb_dma_t dma;
372 1.1 augustss
373 1.1 augustss if (!sc->sc_freetds) {
374 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
375 1.44 augustss r = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
376 1.4 augustss OHCI_TD_ALIGN, &dma);
377 1.39 augustss if (r != USBD_NORMAL_COMPLETION)
378 1.39 augustss return (0);
379 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
380 1.39 augustss offs = i * OHCI_STD_SIZE;
381 1.39 augustss std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
382 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
383 1.1 augustss std->nexttd = sc->sc_freetds;
384 1.1 augustss sc->sc_freetds = std;
385 1.1 augustss }
386 1.1 augustss }
387 1.1 augustss std = sc->sc_freetds;
388 1.1 augustss sc->sc_freetds = std->nexttd;
389 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
390 1.1 augustss std->nexttd = 0;
391 1.1 augustss return (std);
392 1.1 augustss }
393 1.1 augustss
394 1.1 augustss void
395 1.1 augustss ohci_free_std(sc, std)
396 1.1 augustss ohci_softc_t *sc;
397 1.1 augustss ohci_soft_td_t *std;
398 1.1 augustss {
399 1.1 augustss std->nexttd = sc->sc_freetds;
400 1.1 augustss sc->sc_freetds = std;
401 1.1 augustss }
402 1.1 augustss
403 1.1 augustss usbd_status
404 1.1 augustss ohci_init(sc)
405 1.1 augustss ohci_softc_t *sc;
406 1.1 augustss {
407 1.1 augustss ohci_soft_ed_t *sed, *psed;
408 1.1 augustss usbd_status r;
409 1.1 augustss int rev;
410 1.1 augustss int i;
411 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
412 1.16 augustss
413 1.1 augustss DPRINTF(("ohci_init: start\n"));
414 1.1 augustss rev = OREAD4(sc, OHCI_REVISION);
415 1.36 augustss #if defined(__OpenBSD__)
416 1.36 augustss printf(", OHCI version %d.%d%s\n",
417 1.36 augustss #else
418 1.15 augustss printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
419 1.36 augustss #endif
420 1.1 augustss OHCI_REV_HI(rev), OHCI_REV_LO(rev),
421 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
422 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
423 1.1 augustss printf("%s: unsupported OHCI revision\n",
424 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
425 1.1 augustss return (USBD_INVAL);
426 1.1 augustss }
427 1.1 augustss
428 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
429 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
430 1.1 augustss
431 1.1 augustss /* Allocate the HCCA area. */
432 1.44 augustss r = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
433 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
434 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
435 1.1 augustss return (r);
436 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
437 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
438 1.1 augustss
439 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
440 1.1 augustss
441 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
442 1.1 augustss if (!sc->sc_ctrl_head) {
443 1.1 augustss r = USBD_NOMEM;
444 1.1 augustss goto bad1;
445 1.1 augustss }
446 1.39 augustss sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
447 1.34 augustss
448 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
449 1.1 augustss if (!sc->sc_bulk_head) {
450 1.1 augustss r = USBD_NOMEM;
451 1.1 augustss goto bad2;
452 1.1 augustss }
453 1.39 augustss sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
454 1.1 augustss
455 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
456 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
457 1.1 augustss sed = ohci_alloc_sed(sc);
458 1.1 augustss if (!sed) {
459 1.1 augustss while (--i >= 0)
460 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
461 1.1 augustss r = USBD_NOMEM;
462 1.1 augustss goto bad3;
463 1.1 augustss }
464 1.1 augustss /* All ED fields are set to 0. */
465 1.1 augustss sc->sc_eds[i] = sed;
466 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
467 1.1 augustss if (i != 0) {
468 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
469 1.1 augustss sed->next = psed;
470 1.39 augustss sed->ed.ed_nexted = LE(psed->physaddr);
471 1.1 augustss }
472 1.1 augustss }
473 1.1 augustss /*
474 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
475 1.1 augustss * the tree set up properly to spread the interrupts.
476 1.1 augustss */
477 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
478 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
479 1.16 augustss LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
480 1.1 augustss
481 1.1 augustss /* Determine in what context we are running. */
482 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
483 1.1 augustss if (ctl & OHCI_IR) {
484 1.1 augustss /* SMM active, request change */
485 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
486 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
487 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
488 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
489 1.1 augustss delay(1000);
490 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
491 1.1 augustss }
492 1.1 augustss if ((ctl & OHCI_IR) == 0) {
493 1.15 augustss printf("%s: SMM does not respond, resetting\n",
494 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
495 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
496 1.1 augustss goto reset;
497 1.1 augustss }
498 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
499 1.1 augustss /* BIOS started controller. */
500 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
501 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
502 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
503 1.1 augustss delay(USB_RESUME_DELAY * 1000);
504 1.1 augustss }
505 1.1 augustss } else {
506 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
507 1.1 augustss reset:
508 1.1 augustss /* Controller was cold started. */
509 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
510 1.1 augustss }
511 1.1 augustss
512 1.16 augustss /*
513 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
514 1.25 augustss * without it some controllers do not start.
515 1.16 augustss */
516 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
517 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
518 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
519 1.16 augustss
520 1.1 augustss /* We now own the host controller and the bus has been reset. */
521 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
522 1.1 augustss
523 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
524 1.1 augustss /* Nominal time for a reset is 10 us. */
525 1.1 augustss for (i = 0; i < 10; i++) {
526 1.1 augustss delay(10);
527 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
528 1.1 augustss if (!hcr)
529 1.1 augustss break;
530 1.1 augustss }
531 1.1 augustss if (hcr) {
532 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
533 1.1 augustss r = USBD_IOERROR;
534 1.1 augustss goto bad3;
535 1.1 augustss }
536 1.1 augustss #ifdef USB_DEBUG
537 1.1 augustss thesc = sc;
538 1.1 augustss if (ohcidebug > 15)
539 1.1 augustss ohci_dumpregs(sc);
540 1.1 augustss #endif
541 1.1 augustss
542 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
543 1.1 augustss
544 1.1 augustss /* Set up HC registers. */
545 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
546 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
547 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
548 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
549 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
550 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
551 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
552 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
553 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
554 1.1 augustss /* And finally start it! */
555 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
556 1.1 augustss
557 1.1 augustss /*
558 1.1 augustss * The controller is now OPERATIONAL. Set a some final
559 1.1 augustss * registers that should be set earlier, but that the
560 1.1 augustss * controller ignores when in the SUSPEND state.
561 1.1 augustss */
562 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
563 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
564 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
565 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
566 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
567 1.1 augustss
568 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
569 1.1 augustss
570 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
571 1.1 augustss
572 1.1 augustss #ifdef USB_DEBUG
573 1.1 augustss if (ohcidebug > 5)
574 1.1 augustss ohci_dumpregs(sc);
575 1.1 augustss #endif
576 1.1 augustss
577 1.1 augustss /* Set up the bus struct. */
578 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
579 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
580 1.1 augustss
581 1.47 augustss sc->sc_powerhook = powerhook_establish(ohci_power, sc);
582 1.33 augustss
583 1.1 augustss return (USBD_NORMAL_COMPLETION);
584 1.1 augustss
585 1.1 augustss bad3:
586 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
587 1.1 augustss bad2:
588 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
589 1.1 augustss bad1:
590 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
591 1.1 augustss return (r);
592 1.1 augustss }
593 1.1 augustss
594 1.42 augustss usbd_status
595 1.42 augustss ohci_allocm(bus, dma, size)
596 1.42 augustss struct usbd_bus *bus;
597 1.42 augustss usb_dma_t *dma;
598 1.42 augustss u_int32_t size;
599 1.42 augustss {
600 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
601 1.42 augustss
602 1.44 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
603 1.42 augustss }
604 1.42 augustss
605 1.42 augustss void
606 1.42 augustss ohci_freem(bus, dma)
607 1.42 augustss struct usbd_bus *bus;
608 1.42 augustss usb_dma_t *dma;
609 1.42 augustss {
610 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
611 1.42 augustss
612 1.44 augustss usb_freemem(&sc->sc_bus, dma);
613 1.42 augustss }
614 1.42 augustss
615 1.36 augustss #if !defined(__OpenBSD__)
616 1.33 augustss void
617 1.33 augustss ohci_power(why, v)
618 1.33 augustss int why;
619 1.33 augustss void *v;
620 1.33 augustss {
621 1.33 augustss #ifdef USB_DEBUG
622 1.33 augustss ohci_softc_t *sc = v;
623 1.33 augustss
624 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
625 1.33 augustss /* XXX should suspend/resume */
626 1.33 augustss ohci_dumpregs(sc);
627 1.33 augustss #endif
628 1.33 augustss }
629 1.36 augustss #endif /* !defined(__OpenBSD__) */
630 1.33 augustss
631 1.1 augustss #ifdef USB_DEBUG
632 1.1 augustss void ohcidump(void);
633 1.1 augustss void ohcidump(void) { ohci_dumpregs(thesc); }
634 1.1 augustss
635 1.1 augustss void
636 1.1 augustss ohci_dumpregs(sc)
637 1.1 augustss ohci_softc_t *sc;
638 1.1 augustss {
639 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
640 1.41 augustss OREAD4(sc, OHCI_REVISION),
641 1.41 augustss OREAD4(sc, OHCI_CONTROL),
642 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
643 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
644 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
645 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
646 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
647 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
648 1.41 augustss OREAD4(sc, OHCI_HCCA),
649 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
650 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
651 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
652 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
653 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
654 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
655 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
656 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
657 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
658 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
659 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
660 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
661 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
662 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
663 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
664 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
665 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
666 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
667 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
668 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
669 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
670 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
671 1.41 augustss LE(sc->sc_hcca->hcca_frame_number),
672 1.41 augustss LE(sc->sc_hcca->hcca_done_head)));
673 1.1 augustss }
674 1.1 augustss #endif
675 1.1 augustss
676 1.1 augustss int
677 1.1 augustss ohci_intr(p)
678 1.1 augustss void *p;
679 1.1 augustss {
680 1.1 augustss ohci_softc_t *sc = p;
681 1.1 augustss u_int32_t intrs, eintrs;
682 1.1 augustss ohci_physaddr_t done;
683 1.1 augustss
684 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
685 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
686 1.15 augustss #ifdef DIAGNOSTIC
687 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
688 1.15 augustss #endif
689 1.15 augustss return (0);
690 1.15 augustss }
691 1.15 augustss
692 1.27 augustss intrs = 0;
693 1.16 augustss done = LE(sc->sc_hcca->hcca_done_head);
694 1.1 augustss if (done != 0) {
695 1.26 augustss sc->sc_hcca->hcca_done_head = 0;
696 1.26 augustss if (done & ~OHCI_DONE_INTRS)
697 1.26 augustss intrs = OHCI_WDH;
698 1.1 augustss if (done & OHCI_DONE_INTRS)
699 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
700 1.1 augustss } else
701 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
702 1.1 augustss if (!intrs)
703 1.1 augustss return (0);
704 1.1 augustss intrs &= ~OHCI_MIE;
705 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
706 1.1 augustss eintrs = intrs & sc->sc_eintrs;
707 1.1 augustss if (!eintrs)
708 1.1 augustss return (0);
709 1.1 augustss
710 1.45 augustss sc->sc_bus.intr_context++;
711 1.44 augustss sc->sc_bus.no_intrs++;
712 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
713 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
714 1.1 augustss (u_int)eintrs));
715 1.1 augustss
716 1.1 augustss if (eintrs & OHCI_SO) {
717 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
718 1.1 augustss /* XXX do what */
719 1.1 augustss intrs &= ~OHCI_SO;
720 1.1 augustss }
721 1.1 augustss if (eintrs & OHCI_WDH) {
722 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
723 1.1 augustss intrs &= ~OHCI_WDH;
724 1.1 augustss }
725 1.1 augustss if (eintrs & OHCI_RD) {
726 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
727 1.1 augustss /* XXX process resume detect */
728 1.1 augustss }
729 1.1 augustss if (eintrs & OHCI_UE) {
730 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
731 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
732 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
733 1.1 augustss /* XXX what else */
734 1.1 augustss }
735 1.1 augustss if (eintrs & OHCI_RHSC) {
736 1.1 augustss ohci_rhsc(sc, sc->sc_intrreqh);
737 1.1 augustss intrs &= ~OHCI_RHSC;
738 1.1 augustss
739 1.1 augustss /*
740 1.1 augustss * Disable RHSC interrupt for now, because it will be
741 1.1 augustss * on until the port has been reset.
742 1.1 augustss */
743 1.1 augustss ohci_rhsc_able(sc, 0);
744 1.1 augustss }
745 1.1 augustss
746 1.45 augustss sc->sc_bus.intr_context--;
747 1.44 augustss
748 1.1 augustss /* Block unprocessed interrupts. XXX */
749 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
750 1.1 augustss sc->sc_eintrs &= ~intrs;
751 1.1 augustss
752 1.1 augustss return (1);
753 1.1 augustss }
754 1.1 augustss
755 1.1 augustss void
756 1.1 augustss ohci_rhsc_able(sc, on)
757 1.1 augustss ohci_softc_t *sc;
758 1.1 augustss int on;
759 1.1 augustss {
760 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
761 1.1 augustss if (on) {
762 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
763 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
764 1.1 augustss } else {
765 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
766 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
767 1.1 augustss }
768 1.1 augustss }
769 1.1 augustss
770 1.13 augustss #ifdef USB_DEBUG
771 1.13 augustss char *ohci_cc_strs[] = {
772 1.13 augustss "NO_ERROR",
773 1.13 augustss "CRC",
774 1.13 augustss "BIT_STUFFING",
775 1.13 augustss "DATA_TOGGLE_MISMATCH",
776 1.13 augustss "STALL",
777 1.13 augustss "DEVICE_NOT_RESPONDING",
778 1.13 augustss "PID_CHECK_FAILURE",
779 1.13 augustss "UNEXPECTED_PID",
780 1.13 augustss "DATA_OVERRUN",
781 1.13 augustss "DATA_UNDERRUN",
782 1.13 augustss "BUFFER_OVERRUN",
783 1.13 augustss "BUFFER_UNDERRUN",
784 1.13 augustss "NOT_ACCESSED",
785 1.13 augustss };
786 1.13 augustss #endif
787 1.13 augustss
788 1.1 augustss void
789 1.1 augustss ohci_process_done(sc, done)
790 1.1 augustss ohci_softc_t *sc;
791 1.1 augustss ohci_physaddr_t done;
792 1.1 augustss {
793 1.1 augustss ohci_soft_td_t *std, *sdone;
794 1.1 augustss usbd_request_handle reqh;
795 1.1 augustss int len, cc;
796 1.1 augustss
797 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
798 1.1 augustss
799 1.1 augustss /* Reverse the done list. */
800 1.39 augustss for (sdone = 0; done; done = LE(std->td.td_nexttd)) {
801 1.1 augustss std = ohci_hash_find_td(sc, done);
802 1.1 augustss std->dnext = sdone;
803 1.1 augustss sdone = std;
804 1.1 augustss }
805 1.1 augustss
806 1.1 augustss #ifdef USB_DEBUG
807 1.1 augustss if (ohcidebug > 10) {
808 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
809 1.1 augustss ohci_dump_tds(sdone);
810 1.1 augustss }
811 1.1 augustss #endif
812 1.1 augustss
813 1.1 augustss for (std = sdone; std; std = std->dnext) {
814 1.1 augustss reqh = std->reqh;
815 1.27 augustss DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n",
816 1.27 augustss std, reqh, reqh->hcpriv));
817 1.39 augustss cc = OHCI_TD_GET_CC(LE(std->td.td_flags));
818 1.38 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
819 1.34 augustss if (reqh->status == USBD_CANCELLED ||
820 1.34 augustss reqh->status == USBD_TIMEOUT) {
821 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
822 1.34 augustss reqh));
823 1.38 augustss /* Handled by abort routine. */
824 1.38 augustss continue;
825 1.34 augustss } else if (cc == OHCI_CC_NO_ERROR) {
826 1.34 augustss len = std->len;
827 1.39 augustss if (std->td.td_cbp != 0)
828 1.39 augustss len -= LE(std->td.td_be) -
829 1.39 augustss LE(std->td.td_cbp) + 1;
830 1.34 augustss if (std->flags & OHCI_SET_LEN)
831 1.34 augustss reqh->actlen = len;
832 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
833 1.34 augustss reqh->status = USBD_NORMAL_COMPLETION;
834 1.38 augustss usb_transfer_complete(reqh);
835 1.21 augustss }
836 1.1 augustss } else {
837 1.1 augustss ohci_soft_td_t *p, *n;
838 1.1 augustss struct ohci_pipe *opipe =
839 1.1 augustss (struct ohci_pipe *)reqh->pipe;
840 1.13 augustss DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
841 1.39 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
842 1.39 augustss ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))]));
843 1.1 augustss /*
844 1.1 augustss * Endpoint is halted. First unlink all the TDs
845 1.1 augustss * belonging to the failed transfer, and then restart
846 1.1 augustss * the endpoint.
847 1.1 augustss */
848 1.1 augustss for (p = std->nexttd; p->reqh == reqh; p = n) {
849 1.1 augustss n = p->nexttd;
850 1.1 augustss ohci_hash_rem_td(sc, p);
851 1.1 augustss ohci_free_std(sc, p);
852 1.1 augustss }
853 1.16 augustss /* clear halt */
854 1.39 augustss opipe->sed->ed.ed_headp = LE(p->physaddr);
855 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
856 1.1 augustss
857 1.1 augustss if (cc == OHCI_CC_STALL)
858 1.1 augustss reqh->status = USBD_STALLED;
859 1.1 augustss else
860 1.1 augustss reqh->status = USBD_IOERROR;
861 1.38 augustss usb_transfer_complete(reqh);
862 1.1 augustss }
863 1.1 augustss ohci_hash_rem_td(sc, std);
864 1.1 augustss ohci_free_std(sc, std);
865 1.1 augustss }
866 1.1 augustss }
867 1.1 augustss
868 1.1 augustss void
869 1.38 augustss ohci_device_ctrl_done(reqh)
870 1.1 augustss usbd_request_handle reqh;
871 1.1 augustss {
872 1.1 augustss DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
873 1.1 augustss
874 1.38 augustss #ifdef DIAGNOSTIC
875 1.42 augustss if (!(reqh->rqflags & URQ_REQUEST)) {
876 1.8 augustss panic("ohci_ctrl_done: not a request\n");
877 1.1 augustss }
878 1.38 augustss #endif
879 1.38 augustss reqh->hcpriv = 0;
880 1.1 augustss }
881 1.1 augustss
882 1.1 augustss void
883 1.38 augustss ohci_device_intr_done(reqh)
884 1.1 augustss usbd_request_handle reqh;
885 1.1 augustss {
886 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
887 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
888 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
889 1.1 augustss ohci_soft_td_t *xfer, *tail;
890 1.1 augustss
891 1.1 augustss
892 1.1 augustss DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
893 1.1 augustss reqh, reqh->actlen));
894 1.1 augustss
895 1.38 augustss reqh->hcpriv = 0;
896 1.38 augustss
897 1.38 augustss if (reqh->pipe->repeat) {
898 1.1 augustss xfer = opipe->tail;
899 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
900 1.1 augustss if (!tail) {
901 1.1 augustss reqh->status = USBD_NOMEM;
902 1.1 augustss return;
903 1.1 augustss }
904 1.1 augustss tail->reqh = 0;
905 1.1 augustss
906 1.39 augustss xfer->td.td_flags = LE(
907 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
908 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
909 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
910 1.39 augustss xfer->td.td_flags |= LE(OHCI_TD_R);
911 1.43 augustss xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
912 1.1 augustss xfer->nexttd = tail;
913 1.39 augustss xfer->td.td_nexttd = LE(tail->physaddr);
914 1.39 augustss xfer->td.td_be = LE(LE(xfer->td.td_cbp) + reqh->length - 1);
915 1.1 augustss xfer->len = reqh->length;
916 1.1 augustss xfer->reqh = reqh;
917 1.34 augustss xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
918 1.24 augustss reqh->hcpriv = xfer;
919 1.1 augustss
920 1.1 augustss ohci_hash_add_td(sc, xfer);
921 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
922 1.1 augustss opipe->tail = tail;
923 1.1 augustss }
924 1.1 augustss }
925 1.1 augustss
926 1.1 augustss void
927 1.38 augustss ohci_device_bulk_done(reqh)
928 1.3 augustss usbd_request_handle reqh;
929 1.3 augustss {
930 1.3 augustss DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
931 1.3 augustss reqh, reqh->actlen));
932 1.3 augustss
933 1.38 augustss reqh->hcpriv = 0;
934 1.3 augustss }
935 1.3 augustss
936 1.3 augustss void
937 1.1 augustss ohci_rhsc(sc, reqh)
938 1.1 augustss ohci_softc_t *sc;
939 1.1 augustss usbd_request_handle reqh;
940 1.1 augustss {
941 1.1 augustss usbd_pipe_handle pipe;
942 1.1 augustss struct ohci_pipe *opipe;
943 1.1 augustss u_char *p;
944 1.1 augustss int i, m;
945 1.1 augustss int hstatus;
946 1.1 augustss
947 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
948 1.1 augustss DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
949 1.1 augustss sc, reqh, hstatus));
950 1.1 augustss
951 1.1 augustss if (reqh == 0) {
952 1.1 augustss /* Just ignore the change. */
953 1.1 augustss return;
954 1.1 augustss }
955 1.1 augustss
956 1.1 augustss pipe = reqh->pipe;
957 1.1 augustss opipe = (struct ohci_pipe *)pipe;
958 1.1 augustss
959 1.43 augustss p = KERNADDR(&reqh->dmabuf);
960 1.1 augustss m = min(sc->sc_noport, reqh->length * 8 - 1);
961 1.1 augustss memset(p, 0, reqh->length);
962 1.1 augustss for (i = 1; i <= m; i++) {
963 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
964 1.1 augustss p[i/8] |= 1 << (i%8);
965 1.1 augustss }
966 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
967 1.1 augustss reqh->actlen = reqh->length;
968 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
969 1.1 augustss
970 1.38 augustss usb_transfer_complete(reqh);
971 1.38 augustss }
972 1.38 augustss
973 1.38 augustss void
974 1.38 augustss ohci_root_intr_done(reqh)
975 1.38 augustss usbd_request_handle reqh;
976 1.38 augustss {
977 1.38 augustss reqh->hcpriv = 0;
978 1.1 augustss }
979 1.1 augustss
980 1.1 augustss /*
981 1.1 augustss * Wait here until controller claims to have an interrupt.
982 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
983 1.1 augustss * too long.
984 1.1 augustss */
985 1.1 augustss void
986 1.1 augustss ohci_waitintr(sc, reqh)
987 1.1 augustss ohci_softc_t *sc;
988 1.1 augustss usbd_request_handle reqh;
989 1.1 augustss {
990 1.1 augustss int timo = reqh->timeout;
991 1.1 augustss int usecs;
992 1.1 augustss u_int32_t intrs;
993 1.1 augustss
994 1.1 augustss reqh->status = USBD_IN_PROGRESS;
995 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
996 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
997 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
998 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
999 1.1 augustss #ifdef USB_DEBUG
1000 1.1 augustss if (ohcidebug > 15)
1001 1.1 augustss ohci_dumpregs(sc);
1002 1.1 augustss #endif
1003 1.1 augustss if (intrs) {
1004 1.1 augustss ohci_intr(sc);
1005 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
1006 1.1 augustss return;
1007 1.1 augustss }
1008 1.1 augustss }
1009 1.15 augustss
1010 1.15 augustss /* Timeout */
1011 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1012 1.1 augustss reqh->status = USBD_TIMEOUT;
1013 1.38 augustss usb_transfer_complete(reqh);
1014 1.15 augustss /* XXX should free TD */
1015 1.5 augustss }
1016 1.5 augustss
1017 1.5 augustss void
1018 1.5 augustss ohci_poll(bus)
1019 1.5 augustss struct usbd_bus *bus;
1020 1.5 augustss {
1021 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1022 1.5 augustss
1023 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1024 1.5 augustss ohci_intr(sc);
1025 1.1 augustss }
1026 1.1 augustss
1027 1.1 augustss usbd_status
1028 1.1 augustss ohci_device_request(reqh)
1029 1.1 augustss usbd_request_handle reqh;
1030 1.1 augustss {
1031 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1032 1.1 augustss usb_device_request_t *req = &reqh->request;
1033 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1034 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1035 1.1 augustss int addr = dev->address;
1036 1.1 augustss ohci_soft_td_t *setup, *xfer = 0, *stat, *next, *tail;
1037 1.1 augustss ohci_soft_ed_t *sed;
1038 1.1 augustss int isread;
1039 1.1 augustss int len;
1040 1.1 augustss usbd_status r;
1041 1.1 augustss int s;
1042 1.1 augustss
1043 1.1 augustss isread = req->bmRequestType & UT_READ;
1044 1.1 augustss len = UGETW(req->wLength);
1045 1.1 augustss
1046 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1047 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1048 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1049 1.1 augustss UGETW(req->wIndex), len, addr,
1050 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1051 1.1 augustss
1052 1.1 augustss setup = opipe->tail;
1053 1.1 augustss stat = ohci_alloc_std(sc);
1054 1.1 augustss if (!stat) {
1055 1.1 augustss r = USBD_NOMEM;
1056 1.1 augustss goto bad1;
1057 1.1 augustss }
1058 1.1 augustss tail = ohci_alloc_std(sc);
1059 1.1 augustss if (!tail) {
1060 1.1 augustss r = USBD_NOMEM;
1061 1.1 augustss goto bad2;
1062 1.1 augustss }
1063 1.1 augustss tail->reqh = 0;
1064 1.1 augustss
1065 1.1 augustss sed = opipe->sed;
1066 1.1 augustss opipe->u.ctl.length = len;
1067 1.1 augustss
1068 1.10 augustss /* Update device address and length since they may have changed. */
1069 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1070 1.39 augustss sed->ed.ed_flags = LE(
1071 1.39 augustss (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1072 1.16 augustss OHCI_ED_SET_FA(addr) |
1073 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1074 1.1 augustss
1075 1.1 augustss /* Set up data transaction */
1076 1.1 augustss if (len != 0) {
1077 1.1 augustss xfer = ohci_alloc_std(sc);
1078 1.1 augustss if (!xfer) {
1079 1.1 augustss r = USBD_NOMEM;
1080 1.1 augustss goto bad3;
1081 1.1 augustss }
1082 1.39 augustss xfer->td.td_flags = LE(
1083 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1084 1.19 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1085 1.19 augustss (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1086 1.43 augustss xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
1087 1.1 augustss xfer->nexttd = stat;
1088 1.39 augustss xfer->td.td_nexttd = LE(stat->physaddr);
1089 1.39 augustss xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1);
1090 1.1 augustss xfer->len = len;
1091 1.1 augustss xfer->reqh = reqh;
1092 1.34 augustss xfer->flags = OHCI_SET_LEN;
1093 1.1 augustss
1094 1.1 augustss next = xfer;
1095 1.34 augustss stat->flags = OHCI_CALL_DONE;
1096 1.34 augustss } else {
1097 1.1 augustss next = stat;
1098 1.34 augustss stat->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
1099 1.34 augustss }
1100 1.1 augustss
1101 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1102 1.1 augustss
1103 1.39 augustss setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1104 1.16 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1105 1.39 augustss setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1106 1.1 augustss setup->nexttd = next;
1107 1.39 augustss setup->td.td_nexttd = LE(next->physaddr);
1108 1.39 augustss setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1);
1109 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
1110 1.1 augustss setup->reqh = reqh;
1111 1.34 augustss setup->flags = 0;
1112 1.34 augustss reqh->hcpriv = setup;
1113 1.1 augustss
1114 1.39 augustss stat->td.td_flags = LE(
1115 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1116 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1117 1.39 augustss stat->td.td_cbp = 0;
1118 1.1 augustss stat->nexttd = tail;
1119 1.39 augustss stat->td.td_nexttd = LE(tail->physaddr);
1120 1.39 augustss stat->td.td_be = 0;
1121 1.1 augustss stat->len = 0;
1122 1.1 augustss stat->reqh = reqh;
1123 1.1 augustss
1124 1.1 augustss #if USB_DEBUG
1125 1.1 augustss if (ohcidebug > 5) {
1126 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1127 1.1 augustss ohci_dump_ed(sed);
1128 1.1 augustss ohci_dump_tds(setup);
1129 1.1 augustss }
1130 1.1 augustss #endif
1131 1.1 augustss
1132 1.1 augustss /* Insert ED in schedule */
1133 1.1 augustss s = splusb();
1134 1.1 augustss ohci_hash_add_td(sc, setup);
1135 1.1 augustss if (len != 0)
1136 1.1 augustss ohci_hash_add_td(sc, xfer);
1137 1.1 augustss ohci_hash_add_td(sc, stat);
1138 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1139 1.1 augustss opipe->tail = tail;
1140 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1141 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1142 1.15 augustss usb_timeout(ohci_timeout, reqh,
1143 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1144 1.15 augustss }
1145 1.1 augustss splx(s);
1146 1.1 augustss
1147 1.1 augustss #if USB_DEBUG
1148 1.1 augustss if (ohcidebug > 5) {
1149 1.1 augustss delay(5000);
1150 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1151 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1152 1.1 augustss ohci_dump_ed(sed);
1153 1.1 augustss ohci_dump_tds(setup);
1154 1.1 augustss }
1155 1.1 augustss #endif
1156 1.1 augustss
1157 1.1 augustss return (USBD_NORMAL_COMPLETION);
1158 1.1 augustss
1159 1.1 augustss bad3:
1160 1.1 augustss ohci_free_std(sc, tail);
1161 1.1 augustss bad2:
1162 1.1 augustss ohci_free_std(sc, stat);
1163 1.1 augustss bad1:
1164 1.1 augustss return (r);
1165 1.1 augustss }
1166 1.1 augustss
1167 1.1 augustss /*
1168 1.1 augustss * Add an ED to the schedule. Called at splusb().
1169 1.1 augustss */
1170 1.1 augustss void
1171 1.3 augustss ohci_add_ed(sed, head)
1172 1.1 augustss ohci_soft_ed_t *sed;
1173 1.1 augustss ohci_soft_ed_t *head;
1174 1.1 augustss {
1175 1.46 augustss SPLUSBCHECK;
1176 1.1 augustss sed->next = head->next;
1177 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1178 1.1 augustss head->next = sed;
1179 1.39 augustss head->ed.ed_nexted = LE(sed->physaddr);
1180 1.1 augustss }
1181 1.1 augustss
1182 1.1 augustss /*
1183 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1184 1.3 augustss */
1185 1.3 augustss void
1186 1.3 augustss ohci_rem_ed(sed, head)
1187 1.3 augustss ohci_soft_ed_t *sed;
1188 1.3 augustss ohci_soft_ed_t *head;
1189 1.3 augustss {
1190 1.3 augustss ohci_soft_ed_t *p;
1191 1.3 augustss
1192 1.46 augustss SPLUSBCHECK;
1193 1.46 augustss
1194 1.3 augustss /* XXX */
1195 1.3 augustss for (p = head; p && p->next != sed; p = p->next)
1196 1.3 augustss ;
1197 1.3 augustss if (!p)
1198 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1199 1.3 augustss p->next = sed->next;
1200 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1201 1.3 augustss }
1202 1.3 augustss
1203 1.3 augustss /*
1204 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1205 1.1 augustss * the host controller. This queue is the processed by software.
1206 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1207 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1208 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1209 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1210 1.1 augustss * hash value.
1211 1.1 augustss */
1212 1.1 augustss
1213 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1214 1.1 augustss /* Called at splusb() */
1215 1.1 augustss void
1216 1.1 augustss ohci_hash_add_td(sc, std)
1217 1.1 augustss ohci_softc_t *sc;
1218 1.1 augustss ohci_soft_td_t *std;
1219 1.1 augustss {
1220 1.1 augustss int h = HASH(std->physaddr);
1221 1.1 augustss
1222 1.46 augustss SPLUSBCHECK;
1223 1.46 augustss
1224 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1225 1.1 augustss }
1226 1.1 augustss
1227 1.1 augustss /* Called at splusb() */
1228 1.1 augustss void
1229 1.1 augustss ohci_hash_rem_td(sc, std)
1230 1.1 augustss ohci_softc_t *sc;
1231 1.1 augustss ohci_soft_td_t *std;
1232 1.1 augustss {
1233 1.46 augustss SPLUSBCHECK;
1234 1.46 augustss
1235 1.1 augustss LIST_REMOVE(std, hnext);
1236 1.1 augustss }
1237 1.1 augustss
1238 1.1 augustss ohci_soft_td_t *
1239 1.1 augustss ohci_hash_find_td(sc, a)
1240 1.1 augustss ohci_softc_t *sc;
1241 1.1 augustss ohci_physaddr_t a;
1242 1.1 augustss {
1243 1.1 augustss int h = HASH(a);
1244 1.1 augustss ohci_soft_td_t *std;
1245 1.1 augustss
1246 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1247 1.1 augustss std != 0;
1248 1.1 augustss std = LIST_NEXT(std, hnext))
1249 1.1 augustss if (std->physaddr == a)
1250 1.1 augustss return (std);
1251 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1252 1.1 augustss }
1253 1.1 augustss
1254 1.1 augustss void
1255 1.1 augustss ohci_timeout(addr)
1256 1.1 augustss void *addr;
1257 1.1 augustss {
1258 1.38 augustss usbd_request_handle reqh = addr;
1259 1.1 augustss
1260 1.1 augustss DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1261 1.45 augustss
1262 1.45 augustss reqh->device->bus->intr_context++;
1263 1.38 augustss ohci_abort_req(reqh, USBD_TIMEOUT);
1264 1.45 augustss reqh->device->bus->intr_context--;
1265 1.1 augustss }
1266 1.1 augustss
1267 1.1 augustss #ifdef USB_DEBUG
1268 1.1 augustss void
1269 1.1 augustss ohci_dump_tds(std)
1270 1.1 augustss ohci_soft_td_t *std;
1271 1.1 augustss {
1272 1.1 augustss for (; std; std = std->nexttd)
1273 1.1 augustss ohci_dump_td(std);
1274 1.1 augustss }
1275 1.1 augustss
1276 1.1 augustss void
1277 1.1 augustss ohci_dump_td(std)
1278 1.1 augustss ohci_soft_td_t *std;
1279 1.1 augustss {
1280 1.41 augustss DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1281 1.41 augustss "nexttd=0x%08lx be=0x%08lx\n",
1282 1.41 augustss std, (u_long)std->physaddr,
1283 1.41 augustss (int)LE(std->td.td_flags),
1284 1.41 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1285 1.41 augustss OHCI_TD_GET_DI(LE(std->td.td_flags)),
1286 1.41 augustss OHCI_TD_GET_EC(LE(std->td.td_flags)),
1287 1.41 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
1288 1.41 augustss (u_long)LE(std->td.td_cbp),
1289 1.41 augustss (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be)));
1290 1.1 augustss }
1291 1.1 augustss
1292 1.1 augustss void
1293 1.1 augustss ohci_dump_ed(sed)
1294 1.1 augustss ohci_soft_ed_t *sed;
1295 1.1 augustss {
1296 1.41 augustss DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1297 1.41 augustss "headp=%b nexted=0x%08lx\n",
1298 1.41 augustss sed, (u_long)sed->physaddr,
1299 1.41 augustss OHCI_ED_GET_FA(LE(sed->ed.ed_flags)),
1300 1.41 augustss OHCI_ED_GET_EN(LE(sed->ed.ed_flags)),
1301 1.41 augustss OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)),
1302 1.41 augustss (int)LE(sed->ed.ed_flags),
1303 1.41 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1304 1.41 augustss (u_long)LE(sed->ed.ed_tailp),
1305 1.41 augustss (u_long)LE(sed->ed.ed_headp), "\20\1HALT\2CARRY",
1306 1.41 augustss (u_long)LE(sed->ed.ed_nexted)));
1307 1.1 augustss }
1308 1.1 augustss #endif
1309 1.1 augustss
1310 1.1 augustss usbd_status
1311 1.1 augustss ohci_open(pipe)
1312 1.1 augustss usbd_pipe_handle pipe;
1313 1.1 augustss {
1314 1.1 augustss usbd_device_handle dev = pipe->device;
1315 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1316 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1317 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1318 1.1 augustss u_int8_t addr = dev->address;
1319 1.1 augustss ohci_soft_ed_t *sed;
1320 1.1 augustss ohci_soft_td_t *std;
1321 1.1 augustss usbd_status r;
1322 1.1 augustss int s;
1323 1.1 augustss
1324 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1325 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1326 1.1 augustss if (addr == sc->sc_addr) {
1327 1.1 augustss switch (ed->bEndpointAddress) {
1328 1.1 augustss case USB_CONTROL_ENDPOINT:
1329 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1330 1.1 augustss break;
1331 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
1332 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1333 1.1 augustss break;
1334 1.1 augustss default:
1335 1.1 augustss return (USBD_INVAL);
1336 1.1 augustss }
1337 1.1 augustss } else {
1338 1.1 augustss sed = ohci_alloc_sed(sc);
1339 1.1 augustss if (sed == 0)
1340 1.1 augustss goto bad0;
1341 1.1 augustss std = ohci_alloc_std(sc);
1342 1.1 augustss if (std == 0)
1343 1.1 augustss goto bad1;
1344 1.1 augustss opipe->sed = sed;
1345 1.1 augustss opipe->tail = std;
1346 1.39 augustss sed->ed.ed_flags = LE(
1347 1.1 augustss OHCI_ED_SET_FA(addr) |
1348 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1349 1.1 augustss OHCI_ED_DIR_TD |
1350 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1351 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1352 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1353 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1354 1.39 augustss sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr);
1355 1.1 augustss
1356 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1357 1.1 augustss case UE_CONTROL:
1358 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1359 1.44 augustss r = usb_allocmem(&sc->sc_bus,
1360 1.4 augustss sizeof(usb_device_request_t),
1361 1.4 augustss 0, &opipe->u.ctl.reqdma);
1362 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1363 1.1 augustss goto bad;
1364 1.1 augustss s = splusb();
1365 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1366 1.1 augustss splx(s);
1367 1.1 augustss break;
1368 1.1 augustss case UE_INTERRUPT:
1369 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1370 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1371 1.1 augustss case UE_ISOCHRONOUS:
1372 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1373 1.43 augustss return (USBD_INVAL);
1374 1.1 augustss case UE_BULK:
1375 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1376 1.3 augustss s = splusb();
1377 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1378 1.3 augustss splx(s);
1379 1.3 augustss break;
1380 1.1 augustss }
1381 1.1 augustss }
1382 1.1 augustss return (USBD_NORMAL_COMPLETION);
1383 1.1 augustss
1384 1.1 augustss bad:
1385 1.1 augustss ohci_free_std(sc, std);
1386 1.1 augustss bad1:
1387 1.1 augustss ohci_free_sed(sc, sed);
1388 1.1 augustss bad0:
1389 1.1 augustss return (USBD_NOMEM);
1390 1.1 augustss
1391 1.1 augustss }
1392 1.1 augustss
1393 1.1 augustss /*
1394 1.34 augustss * Close a reqular pipe.
1395 1.34 augustss * Assumes that there are no pending transactions.
1396 1.34 augustss */
1397 1.34 augustss void
1398 1.34 augustss ohci_close_pipe(pipe, head)
1399 1.34 augustss usbd_pipe_handle pipe;
1400 1.34 augustss ohci_soft_ed_t *head;
1401 1.34 augustss {
1402 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1403 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1404 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
1405 1.34 augustss int s;
1406 1.34 augustss
1407 1.34 augustss s = splusb();
1408 1.34 augustss #ifdef DIAGNOSTIC
1409 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
1410 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1411 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK))) {
1412 1.39 augustss ohci_physaddr_t td = sed->ed.ed_headp;
1413 1.34 augustss ohci_soft_td_t *std;
1414 1.34 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1415 1.34 augustss std != 0;
1416 1.34 augustss std = LIST_NEXT(std, hnext))
1417 1.34 augustss if (std->physaddr == td)
1418 1.34 augustss break;
1419 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1420 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
1421 1.39 augustss (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp),
1422 1.34 augustss pipe, std);
1423 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
1424 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1425 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
1426 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
1427 1.34 augustss }
1428 1.34 augustss #endif
1429 1.34 augustss ohci_rem_ed(sed, head);
1430 1.34 augustss splx(s);
1431 1.34 augustss ohci_free_std(sc, opipe->tail);
1432 1.34 augustss ohci_free_sed(sc, opipe->sed);
1433 1.34 augustss }
1434 1.34 augustss
1435 1.34 augustss /*
1436 1.34 augustss * Abort a device request.
1437 1.34 augustss * If this routine is called at splusb() it guarantees that the request
1438 1.34 augustss * will be removed from the hardware scheduling and that the callback
1439 1.34 augustss * for it will be called with USBD_CANCELLED status.
1440 1.34 augustss * It's impossible to guarantee that the requested transfer will not
1441 1.34 augustss * have happened since the hardware runs concurrently.
1442 1.34 augustss * If the transaction has already happened we rely on the ordinary
1443 1.34 augustss * interrupt processing to process it.
1444 1.34 augustss */
1445 1.34 augustss void
1446 1.38 augustss ohci_abort_req(reqh, status)
1447 1.34 augustss usbd_request_handle reqh;
1448 1.38 augustss usbd_status status;
1449 1.34 augustss {
1450 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1451 1.34 augustss ohci_soft_ed_t *sed;
1452 1.34 augustss
1453 1.46 augustss SPLUSBCHECK;
1454 1.46 augustss
1455 1.38 augustss DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe));
1456 1.34 augustss
1457 1.38 augustss reqh->status = status;
1458 1.34 augustss
1459 1.38 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
1460 1.34 augustss
1461 1.34 augustss sed = opipe->sed;
1462 1.38 augustss DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed));
1463 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1464 1.34 augustss
1465 1.44 augustss if (reqh->device->bus->intr_context) {
1466 1.44 augustss /* We have no process context, so we can't use tsleep(). */
1467 1.44 augustss timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND);
1468 1.44 augustss } else {
1469 1.38 augustss usb_delay_ms(opipe->pipe.device->bus, 1);
1470 1.38 augustss ohci_abort_req_end(reqh);
1471 1.38 augustss }
1472 1.38 augustss }
1473 1.38 augustss
1474 1.38 augustss void
1475 1.38 augustss ohci_abort_req_end(v)
1476 1.38 augustss void *v;
1477 1.38 augustss {
1478 1.38 augustss usbd_request_handle reqh = v;
1479 1.38 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1480 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1481 1.38 augustss ohci_soft_ed_t *sed;
1482 1.38 augustss ohci_soft_td_t *p, *n;
1483 1.38 augustss int s;
1484 1.38 augustss
1485 1.38 augustss s = splusb();
1486 1.38 augustss
1487 1.38 augustss p = reqh->hcpriv;
1488 1.34 augustss #ifdef DIAGNOSTIC
1489 1.38 augustss if (!p) {
1490 1.38 augustss printf("ohci_abort_req: hcpriv==0\n");
1491 1.38 augustss return;
1492 1.38 augustss }
1493 1.34 augustss #endif
1494 1.38 augustss for (; p->reqh == reqh; p = n) {
1495 1.38 augustss n = p->nexttd;
1496 1.38 augustss ohci_hash_rem_td(sc, p);
1497 1.38 augustss ohci_free_std(sc, p);
1498 1.34 augustss }
1499 1.34 augustss
1500 1.38 augustss sed = opipe->sed;
1501 1.38 augustss DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n",
1502 1.39 augustss (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp)));
1503 1.39 augustss sed->ed.ed_headp = p->physaddr; /* unlink TDs */
1504 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1505 1.38 augustss
1506 1.38 augustss usb_transfer_complete(reqh);
1507 1.38 augustss
1508 1.34 augustss splx(s);
1509 1.34 augustss }
1510 1.34 augustss
1511 1.34 augustss /*
1512 1.1 augustss * Data structures and routines to emulate the root hub.
1513 1.1 augustss */
1514 1.1 augustss usb_device_descriptor_t ohci_devd = {
1515 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1516 1.1 augustss UDESC_DEVICE, /* type */
1517 1.1 augustss {0x00, 0x01}, /* USB version */
1518 1.1 augustss UCLASS_HUB, /* class */
1519 1.1 augustss USUBCLASS_HUB, /* subclass */
1520 1.1 augustss 0, /* protocol */
1521 1.1 augustss 64, /* max packet */
1522 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1523 1.1 augustss 1,2,0, /* string indicies */
1524 1.1 augustss 1 /* # of configurations */
1525 1.1 augustss };
1526 1.1 augustss
1527 1.1 augustss usb_config_descriptor_t ohci_confd = {
1528 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1529 1.1 augustss UDESC_CONFIG,
1530 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1531 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1532 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1533 1.1 augustss 1,
1534 1.1 augustss 1,
1535 1.1 augustss 0,
1536 1.1 augustss UC_SELF_POWERED,
1537 1.1 augustss 0 /* max power */
1538 1.1 augustss };
1539 1.1 augustss
1540 1.1 augustss usb_interface_descriptor_t ohci_ifcd = {
1541 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1542 1.1 augustss UDESC_INTERFACE,
1543 1.1 augustss 0,
1544 1.1 augustss 0,
1545 1.1 augustss 1,
1546 1.1 augustss UCLASS_HUB,
1547 1.1 augustss USUBCLASS_HUB,
1548 1.1 augustss 0,
1549 1.1 augustss 0
1550 1.1 augustss };
1551 1.1 augustss
1552 1.1 augustss usb_endpoint_descriptor_t ohci_endpd = {
1553 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1554 1.1 augustss UDESC_ENDPOINT,
1555 1.40 augustss UE_DIR_IN | OHCI_INTR_ENDPT,
1556 1.1 augustss UE_INTERRUPT,
1557 1.1 augustss {8, 0}, /* max packet */
1558 1.1 augustss 255
1559 1.1 augustss };
1560 1.1 augustss
1561 1.1 augustss usb_hub_descriptor_t ohci_hubd = {
1562 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1563 1.1 augustss UDESC_HUB,
1564 1.1 augustss 0,
1565 1.1 augustss {0,0},
1566 1.1 augustss 0,
1567 1.1 augustss 0,
1568 1.1 augustss {0},
1569 1.1 augustss };
1570 1.1 augustss
1571 1.1 augustss int
1572 1.1 augustss ohci_str(p, l, s)
1573 1.1 augustss usb_string_descriptor_t *p;
1574 1.1 augustss int l;
1575 1.1 augustss char *s;
1576 1.1 augustss {
1577 1.1 augustss int i;
1578 1.1 augustss
1579 1.1 augustss if (l == 0)
1580 1.1 augustss return (0);
1581 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1582 1.1 augustss if (l == 1)
1583 1.1 augustss return (1);
1584 1.1 augustss p->bDescriptorType = UDESC_STRING;
1585 1.1 augustss l -= 2;
1586 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1587 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1588 1.1 augustss return (2*i+2);
1589 1.1 augustss }
1590 1.1 augustss
1591 1.1 augustss /*
1592 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1593 1.1 augustss */
1594 1.1 augustss usbd_status
1595 1.1 augustss ohci_root_ctrl_transfer(reqh)
1596 1.1 augustss usbd_request_handle reqh;
1597 1.1 augustss {
1598 1.17 augustss usbd_status r;
1599 1.17 augustss
1600 1.46 augustss /* Insert last in queue. */
1601 1.17 augustss r = usb_insert_transfer(reqh);
1602 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1603 1.17 augustss return (r);
1604 1.46 augustss
1605 1.46 augustss /* Pipe isn't running, start first */
1606 1.46 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1607 1.17 augustss }
1608 1.17 augustss
1609 1.17 augustss usbd_status
1610 1.17 augustss ohci_root_ctrl_start(reqh)
1611 1.17 augustss usbd_request_handle reqh;
1612 1.17 augustss {
1613 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1614 1.1 augustss usb_device_request_t *req;
1615 1.1 augustss void *buf;
1616 1.1 augustss int port, i;
1617 1.46 augustss int s, len, value, index, l, totlen = 0;
1618 1.1 augustss usb_port_status_t ps;
1619 1.1 augustss usb_hub_descriptor_t hubd;
1620 1.1 augustss usbd_status r;
1621 1.1 augustss u_int32_t v;
1622 1.1 augustss
1623 1.42 augustss #ifdef DIAGNOSTIC
1624 1.42 augustss if (!(reqh->rqflags & URQ_REQUEST))
1625 1.1 augustss /* XXX panic */
1626 1.1 augustss return (USBD_INVAL);
1627 1.42 augustss #endif
1628 1.1 augustss req = &reqh->request;
1629 1.1 augustss
1630 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1631 1.1 augustss req->bmRequestType, req->bRequest));
1632 1.1 augustss
1633 1.1 augustss len = UGETW(req->wLength);
1634 1.1 augustss value = UGETW(req->wValue);
1635 1.1 augustss index = UGETW(req->wIndex);
1636 1.43 augustss
1637 1.43 augustss if (len != 0)
1638 1.43 augustss buf = KERNADDR(&reqh->dmabuf);
1639 1.43 augustss #ifdef DIAGNOSTIC
1640 1.43 augustss else
1641 1.43 augustss buf = 0;
1642 1.43 augustss #endif
1643 1.43 augustss
1644 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1645 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1646 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1647 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1648 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1649 1.1 augustss /*
1650 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1651 1.1 augustss * for the integrated root hub.
1652 1.1 augustss */
1653 1.1 augustss break;
1654 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1655 1.1 augustss if (len > 0) {
1656 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1657 1.1 augustss totlen = 1;
1658 1.1 augustss }
1659 1.1 augustss break;
1660 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1661 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1662 1.1 augustss switch(value >> 8) {
1663 1.1 augustss case UDESC_DEVICE:
1664 1.1 augustss if ((value & 0xff) != 0) {
1665 1.1 augustss r = USBD_IOERROR;
1666 1.1 augustss goto ret;
1667 1.1 augustss }
1668 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1669 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1670 1.1 augustss memcpy(buf, &ohci_devd, l);
1671 1.1 augustss break;
1672 1.1 augustss case UDESC_CONFIG:
1673 1.1 augustss if ((value & 0xff) != 0) {
1674 1.1 augustss r = USBD_IOERROR;
1675 1.1 augustss goto ret;
1676 1.1 augustss }
1677 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1678 1.1 augustss memcpy(buf, &ohci_confd, l);
1679 1.1 augustss buf = (char *)buf + l;
1680 1.1 augustss len -= l;
1681 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1682 1.1 augustss totlen += l;
1683 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1684 1.1 augustss buf = (char *)buf + l;
1685 1.1 augustss len -= l;
1686 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1687 1.1 augustss totlen += l;
1688 1.1 augustss memcpy(buf, &ohci_endpd, l);
1689 1.1 augustss break;
1690 1.1 augustss case UDESC_STRING:
1691 1.1 augustss if (len == 0)
1692 1.1 augustss break;
1693 1.1 augustss *(u_int8_t *)buf = 0;
1694 1.1 augustss totlen = 1;
1695 1.1 augustss switch (value & 0xff) {
1696 1.1 augustss case 1: /* Vendor */
1697 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1698 1.1 augustss break;
1699 1.1 augustss case 2: /* Product */
1700 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1701 1.1 augustss break;
1702 1.1 augustss }
1703 1.1 augustss break;
1704 1.1 augustss default:
1705 1.1 augustss r = USBD_IOERROR;
1706 1.1 augustss goto ret;
1707 1.1 augustss }
1708 1.1 augustss break;
1709 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1710 1.1 augustss if (len > 0) {
1711 1.1 augustss *(u_int8_t *)buf = 0;
1712 1.1 augustss totlen = 1;
1713 1.1 augustss }
1714 1.1 augustss break;
1715 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1716 1.1 augustss if (len > 1) {
1717 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1718 1.1 augustss totlen = 2;
1719 1.1 augustss }
1720 1.1 augustss break;
1721 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1722 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1723 1.1 augustss if (len > 1) {
1724 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1725 1.1 augustss totlen = 2;
1726 1.1 augustss }
1727 1.1 augustss break;
1728 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1729 1.1 augustss if (value >= USB_MAX_DEVICES) {
1730 1.1 augustss r = USBD_IOERROR;
1731 1.1 augustss goto ret;
1732 1.1 augustss }
1733 1.1 augustss sc->sc_addr = value;
1734 1.1 augustss break;
1735 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1736 1.1 augustss if (value != 0 && value != 1) {
1737 1.1 augustss r = USBD_IOERROR;
1738 1.1 augustss goto ret;
1739 1.1 augustss }
1740 1.1 augustss sc->sc_conf = value;
1741 1.1 augustss break;
1742 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1743 1.1 augustss break;
1744 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1745 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1746 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1747 1.1 augustss r = USBD_IOERROR;
1748 1.1 augustss goto ret;
1749 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1750 1.1 augustss break;
1751 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1752 1.1 augustss break;
1753 1.1 augustss /* Hub requests */
1754 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1755 1.1 augustss break;
1756 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1757 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1758 1.14 augustss "port=%d feature=%d\n",
1759 1.1 augustss index, value));
1760 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1761 1.1 augustss r = USBD_IOERROR;
1762 1.1 augustss goto ret;
1763 1.1 augustss }
1764 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1765 1.1 augustss switch(value) {
1766 1.1 augustss case UHF_PORT_ENABLE:
1767 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1768 1.1 augustss break;
1769 1.1 augustss case UHF_PORT_SUSPEND:
1770 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1771 1.1 augustss break;
1772 1.1 augustss case UHF_PORT_POWER:
1773 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1774 1.1 augustss break;
1775 1.1 augustss case UHF_C_PORT_CONNECTION:
1776 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1777 1.1 augustss break;
1778 1.1 augustss case UHF_C_PORT_ENABLE:
1779 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1780 1.1 augustss break;
1781 1.1 augustss case UHF_C_PORT_SUSPEND:
1782 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1783 1.1 augustss break;
1784 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1785 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1786 1.1 augustss break;
1787 1.1 augustss case UHF_C_PORT_RESET:
1788 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1789 1.1 augustss break;
1790 1.1 augustss default:
1791 1.1 augustss r = USBD_IOERROR;
1792 1.1 augustss goto ret;
1793 1.1 augustss }
1794 1.1 augustss switch(value) {
1795 1.1 augustss case UHF_C_PORT_CONNECTION:
1796 1.1 augustss case UHF_C_PORT_ENABLE:
1797 1.1 augustss case UHF_C_PORT_SUSPEND:
1798 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1799 1.1 augustss case UHF_C_PORT_RESET:
1800 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1801 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1802 1.1 augustss ohci_rhsc_able(sc, 1);
1803 1.1 augustss break;
1804 1.1 augustss default:
1805 1.1 augustss break;
1806 1.1 augustss }
1807 1.1 augustss break;
1808 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1809 1.1 augustss if (value != 0) {
1810 1.1 augustss r = USBD_IOERROR;
1811 1.1 augustss goto ret;
1812 1.1 augustss }
1813 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1814 1.1 augustss hubd = ohci_hubd;
1815 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1816 1.15 augustss USETW(hubd.wHubCharacteristics,
1817 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1818 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1819 1.1 augustss /* XXX overcurrent */
1820 1.1 augustss );
1821 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1822 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1823 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1824 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
1825 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1826 1.1 augustss l = min(len, hubd.bDescLength);
1827 1.1 augustss totlen = l;
1828 1.1 augustss memcpy(buf, &hubd, l);
1829 1.1 augustss break;
1830 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1831 1.1 augustss if (len != 4) {
1832 1.1 augustss r = USBD_IOERROR;
1833 1.1 augustss goto ret;
1834 1.1 augustss }
1835 1.1 augustss memset(buf, 0, len); /* ? XXX */
1836 1.1 augustss totlen = len;
1837 1.1 augustss break;
1838 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1839 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1840 1.1 augustss index));
1841 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1842 1.1 augustss r = USBD_IOERROR;
1843 1.1 augustss goto ret;
1844 1.1 augustss }
1845 1.1 augustss if (len != 4) {
1846 1.1 augustss r = USBD_IOERROR;
1847 1.1 augustss goto ret;
1848 1.1 augustss }
1849 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1850 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1851 1.1 augustss v));
1852 1.1 augustss USETW(ps.wPortStatus, v);
1853 1.1 augustss USETW(ps.wPortChange, v >> 16);
1854 1.1 augustss l = min(len, sizeof ps);
1855 1.1 augustss memcpy(buf, &ps, l);
1856 1.1 augustss totlen = l;
1857 1.1 augustss break;
1858 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1859 1.1 augustss r = USBD_IOERROR;
1860 1.1 augustss goto ret;
1861 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1862 1.1 augustss break;
1863 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1864 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1865 1.1 augustss r = USBD_IOERROR;
1866 1.1 augustss goto ret;
1867 1.1 augustss }
1868 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1869 1.1 augustss switch(value) {
1870 1.1 augustss case UHF_PORT_ENABLE:
1871 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
1872 1.1 augustss break;
1873 1.1 augustss case UHF_PORT_SUSPEND:
1874 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
1875 1.1 augustss break;
1876 1.1 augustss case UHF_PORT_RESET:
1877 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
1878 1.14 augustss index));
1879 1.1 augustss OWRITE4(sc, port, UPS_RESET);
1880 1.1 augustss for (i = 0; i < 10; i++) {
1881 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
1882 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
1883 1.1 augustss break;
1884 1.1 augustss }
1885 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1886 1.1 augustss index, OREAD4(sc, port)));
1887 1.1 augustss break;
1888 1.1 augustss case UHF_PORT_POWER:
1889 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
1890 1.14 augustss "%d\n", index));
1891 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
1892 1.1 augustss break;
1893 1.1 augustss default:
1894 1.1 augustss r = USBD_IOERROR;
1895 1.1 augustss goto ret;
1896 1.1 augustss }
1897 1.1 augustss break;
1898 1.1 augustss default:
1899 1.1 augustss r = USBD_IOERROR;
1900 1.1 augustss goto ret;
1901 1.1 augustss }
1902 1.1 augustss reqh->actlen = totlen;
1903 1.1 augustss r = USBD_NORMAL_COMPLETION;
1904 1.1 augustss ret:
1905 1.1 augustss reqh->status = r;
1906 1.46 augustss s = splusb();
1907 1.38 augustss usb_transfer_complete(reqh);
1908 1.46 augustss splx(s);
1909 1.1 augustss return (USBD_IN_PROGRESS);
1910 1.1 augustss }
1911 1.1 augustss
1912 1.1 augustss /* Abort a root control request. */
1913 1.1 augustss void
1914 1.1 augustss ohci_root_ctrl_abort(reqh)
1915 1.1 augustss usbd_request_handle reqh;
1916 1.1 augustss {
1917 1.9 augustss /* Nothing to do, all transfers are synchronous. */
1918 1.1 augustss }
1919 1.1 augustss
1920 1.1 augustss /* Close the root pipe. */
1921 1.1 augustss void
1922 1.1 augustss ohci_root_ctrl_close(pipe)
1923 1.1 augustss usbd_pipe_handle pipe;
1924 1.1 augustss {
1925 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
1926 1.34 augustss /* Nothing to do. */
1927 1.1 augustss }
1928 1.1 augustss
1929 1.1 augustss usbd_status
1930 1.1 augustss ohci_root_intr_transfer(reqh)
1931 1.1 augustss usbd_request_handle reqh;
1932 1.1 augustss {
1933 1.17 augustss usbd_status r;
1934 1.17 augustss
1935 1.46 augustss /* Insert last in queue. */
1936 1.17 augustss r = usb_insert_transfer(reqh);
1937 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1938 1.17 augustss return (r);
1939 1.46 augustss
1940 1.46 augustss /* Pipe isn't running, start first */
1941 1.46 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1942 1.17 augustss }
1943 1.17 augustss
1944 1.17 augustss usbd_status
1945 1.17 augustss ohci_root_intr_start(reqh)
1946 1.17 augustss usbd_request_handle reqh;
1947 1.17 augustss {
1948 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
1949 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1950 1.1 augustss
1951 1.1 augustss sc->sc_intrreqh = reqh;
1952 1.1 augustss
1953 1.1 augustss return (USBD_IN_PROGRESS);
1954 1.1 augustss }
1955 1.1 augustss
1956 1.3 augustss /* Abort a root interrupt request. */
1957 1.1 augustss void
1958 1.1 augustss ohci_root_intr_abort(reqh)
1959 1.1 augustss usbd_request_handle reqh;
1960 1.1 augustss {
1961 1.3 augustss /* No need to abort. */
1962 1.1 augustss }
1963 1.1 augustss
1964 1.1 augustss /* Close the root pipe. */
1965 1.1 augustss void
1966 1.1 augustss ohci_root_intr_close(pipe)
1967 1.1 augustss usbd_pipe_handle pipe;
1968 1.1 augustss {
1969 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1970 1.1 augustss
1971 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
1972 1.34 augustss
1973 1.34 augustss sc->sc_intrreqh = 0;
1974 1.1 augustss }
1975 1.1 augustss
1976 1.1 augustss /************************/
1977 1.1 augustss
1978 1.1 augustss usbd_status
1979 1.1 augustss ohci_device_ctrl_transfer(reqh)
1980 1.1 augustss usbd_request_handle reqh;
1981 1.1 augustss {
1982 1.17 augustss usbd_status r;
1983 1.17 augustss
1984 1.46 augustss /* Insert last in queue. */
1985 1.17 augustss r = usb_insert_transfer(reqh);
1986 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1987 1.17 augustss return (r);
1988 1.46 augustss
1989 1.46 augustss /* Pipe isn't running, start first */
1990 1.46 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1991 1.17 augustss }
1992 1.17 augustss
1993 1.17 augustss usbd_status
1994 1.17 augustss ohci_device_ctrl_start(reqh)
1995 1.17 augustss usbd_request_handle reqh;
1996 1.17 augustss {
1997 1.6 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1998 1.1 augustss usbd_status r;
1999 1.1 augustss
2000 1.42 augustss #ifdef DIAGNOSTIC
2001 1.42 augustss if (!(reqh->rqflags & URQ_REQUEST)) {
2002 1.1 augustss /* XXX panic */
2003 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2004 1.1 augustss return (USBD_INVAL);
2005 1.1 augustss }
2006 1.42 augustss #endif
2007 1.1 augustss
2008 1.1 augustss r = ohci_device_request(reqh);
2009 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
2010 1.1 augustss return (r);
2011 1.1 augustss
2012 1.6 augustss if (sc->sc_bus.use_polling)
2013 1.6 augustss ohci_waitintr(sc, reqh);
2014 1.1 augustss return (USBD_IN_PROGRESS);
2015 1.1 augustss }
2016 1.1 augustss
2017 1.1 augustss /* Abort a device control request. */
2018 1.1 augustss void
2019 1.1 augustss ohci_device_ctrl_abort(reqh)
2020 1.1 augustss usbd_request_handle reqh;
2021 1.1 augustss {
2022 1.34 augustss DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh));
2023 1.38 augustss ohci_abort_req(reqh, USBD_CANCELLED);
2024 1.1 augustss }
2025 1.1 augustss
2026 1.1 augustss /* Close a device control pipe. */
2027 1.1 augustss void
2028 1.1 augustss ohci_device_ctrl_close(pipe)
2029 1.1 augustss usbd_pipe_handle pipe;
2030 1.1 augustss {
2031 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2032 1.1 augustss
2033 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2034 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2035 1.3 augustss }
2036 1.3 augustss
2037 1.3 augustss /************************/
2038 1.37 augustss
2039 1.37 augustss void
2040 1.37 augustss ohci_device_clear_toggle(pipe)
2041 1.37 augustss usbd_pipe_handle pipe;
2042 1.37 augustss {
2043 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2044 1.37 augustss
2045 1.39 augustss opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY);
2046 1.37 augustss }
2047 1.37 augustss
2048 1.37 augustss void
2049 1.37 augustss ohci_noop(pipe)
2050 1.37 augustss usbd_pipe_handle pipe;
2051 1.37 augustss {
2052 1.37 augustss }
2053 1.3 augustss
2054 1.3 augustss usbd_status
2055 1.3 augustss ohci_device_bulk_transfer(reqh)
2056 1.3 augustss usbd_request_handle reqh;
2057 1.3 augustss {
2058 1.17 augustss usbd_status r;
2059 1.17 augustss
2060 1.46 augustss /* Insert last in queue. */
2061 1.17 augustss r = usb_insert_transfer(reqh);
2062 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2063 1.17 augustss return (r);
2064 1.46 augustss
2065 1.46 augustss /* Pipe isn't running, start first */
2066 1.46 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2067 1.17 augustss }
2068 1.17 augustss
2069 1.17 augustss usbd_status
2070 1.17 augustss ohci_device_bulk_start(reqh)
2071 1.17 augustss usbd_request_handle reqh;
2072 1.17 augustss {
2073 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2074 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2075 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2076 1.3 augustss int addr = dev->address;
2077 1.3 augustss ohci_soft_td_t *xfer, *tail;
2078 1.3 augustss ohci_soft_ed_t *sed;
2079 1.40 augustss int s, len, isread, endpt;
2080 1.3 augustss
2081 1.34 augustss #ifdef DIAGNOSTIC
2082 1.42 augustss if (reqh->rqflags & URQ_REQUEST) {
2083 1.3 augustss /* XXX panic */
2084 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2085 1.3 augustss return (USBD_INVAL);
2086 1.3 augustss }
2087 1.34 augustss #endif
2088 1.3 augustss
2089 1.3 augustss len = reqh->length;
2090 1.40 augustss endpt = reqh->pipe->endpoint->edesc->bEndpointAddress;
2091 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2092 1.3 augustss sed = opipe->sed;
2093 1.3 augustss
2094 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d "
2095 1.34 augustss "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags,
2096 1.40 augustss endpt));
2097 1.34 augustss
2098 1.32 augustss opipe->u.bulk.isread = isread;
2099 1.3 augustss opipe->u.bulk.length = len;
2100 1.3 augustss
2101 1.3 augustss tail = ohci_alloc_std(sc);
2102 1.43 augustss if (!tail)
2103 1.43 augustss return (USBD_NOMEM);
2104 1.3 augustss tail->reqh = 0;
2105 1.3 augustss
2106 1.3 augustss /* Update device address */
2107 1.39 augustss sed->ed.ed_flags = LE(
2108 1.39 augustss (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2109 1.16 augustss OHCI_ED_SET_FA(addr));
2110 1.3 augustss
2111 1.3 augustss /* Set up data transaction */
2112 1.3 augustss xfer = opipe->tail;
2113 1.39 augustss xfer->td.td_flags = LE(
2114 1.3 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
2115 1.19 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY |
2116 1.19 augustss (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
2117 1.43 augustss xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
2118 1.3 augustss xfer->nexttd = tail;
2119 1.39 augustss xfer->td.td_nexttd = LE(tail->physaddr);
2120 1.39 augustss xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1);
2121 1.3 augustss xfer->len = len;
2122 1.3 augustss xfer->reqh = reqh;
2123 1.34 augustss xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2124 1.3 augustss reqh->hcpriv = xfer;
2125 1.3 augustss
2126 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2127 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2128 1.39 augustss (int)LE(sed->ed.ed_flags), (int)LE(xfer->td.td_flags),
2129 1.39 augustss (int)LE(xfer->td.td_cbp), (int)LE(xfer->td.td_be)));
2130 1.34 augustss
2131 1.34 augustss #ifdef USB_DEBUG
2132 1.34 augustss if (ohcidebug > 4) {
2133 1.34 augustss ohci_dump_ed(sed);
2134 1.34 augustss ohci_dump_tds(xfer);
2135 1.34 augustss }
2136 1.34 augustss #endif
2137 1.34 augustss
2138 1.3 augustss /* Insert ED in schedule */
2139 1.3 augustss s = splusb();
2140 1.3 augustss ohci_hash_add_td(sc, xfer);
2141 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2142 1.3 augustss opipe->tail = tail;
2143 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2144 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2145 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
2146 1.15 augustss usb_timeout(ohci_timeout, reqh,
2147 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2148 1.15 augustss }
2149 1.34 augustss
2150 1.34 augustss #ifdef USB_DEBUG
2151 1.34 augustss if (ohcidebug > 5) {
2152 1.34 augustss delay(5000);
2153 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2154 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2155 1.34 augustss ohci_dump_ed(sed);
2156 1.34 augustss ohci_dump_tds(xfer);
2157 1.34 augustss }
2158 1.34 augustss #endif
2159 1.34 augustss
2160 1.3 augustss splx(s);
2161 1.3 augustss
2162 1.3 augustss return (USBD_IN_PROGRESS);
2163 1.3 augustss }
2164 1.3 augustss
2165 1.3 augustss void
2166 1.3 augustss ohci_device_bulk_abort(reqh)
2167 1.3 augustss usbd_request_handle reqh;
2168 1.3 augustss {
2169 1.34 augustss DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh));
2170 1.38 augustss ohci_abort_req(reqh, USBD_CANCELLED);
2171 1.3 augustss }
2172 1.3 augustss
2173 1.34 augustss /*
2174 1.34 augustss * Close a device bulk pipe.
2175 1.34 augustss */
2176 1.3 augustss void
2177 1.3 augustss ohci_device_bulk_close(pipe)
2178 1.3 augustss usbd_pipe_handle pipe;
2179 1.3 augustss {
2180 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2181 1.3 augustss
2182 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2183 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2184 1.1 augustss }
2185 1.1 augustss
2186 1.1 augustss /************************/
2187 1.1 augustss
2188 1.1 augustss usbd_status
2189 1.1 augustss ohci_device_intr_transfer(reqh)
2190 1.17 augustss usbd_request_handle reqh;
2191 1.17 augustss {
2192 1.17 augustss usbd_status r;
2193 1.17 augustss
2194 1.46 augustss /* Insert last in queue. */
2195 1.17 augustss r = usb_insert_transfer(reqh);
2196 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2197 1.17 augustss return (r);
2198 1.46 augustss
2199 1.46 augustss /* Pipe isn't running, start first */
2200 1.46 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2201 1.17 augustss }
2202 1.17 augustss
2203 1.17 augustss usbd_status
2204 1.17 augustss ohci_device_intr_start(reqh)
2205 1.1 augustss usbd_request_handle reqh;
2206 1.1 augustss {
2207 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2208 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2209 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2210 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2211 1.1 augustss ohci_soft_td_t *xfer, *tail;
2212 1.1 augustss int len;
2213 1.1 augustss int s;
2214 1.1 augustss
2215 1.43 augustss DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p len=%d "
2216 1.14 augustss "flags=%d priv=%p\n",
2217 1.43 augustss reqh, reqh->length, reqh->flags, reqh->priv));
2218 1.1 augustss
2219 1.42 augustss #ifdef DIAGNOSTIC
2220 1.42 augustss if (reqh->rqflags & URQ_REQUEST)
2221 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2222 1.42 augustss #endif
2223 1.1 augustss
2224 1.1 augustss len = reqh->length;
2225 1.1 augustss
2226 1.1 augustss xfer = opipe->tail;
2227 1.1 augustss tail = ohci_alloc_std(sc);
2228 1.43 augustss if (!tail)
2229 1.43 augustss return (USBD_NOMEM);
2230 1.1 augustss tail->reqh = 0;
2231 1.1 augustss
2232 1.39 augustss xfer->td.td_flags = LE(
2233 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2234 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2235 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
2236 1.39 augustss xfer->td.td_flags |= LE(OHCI_TD_R);
2237 1.43 augustss xfer->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
2238 1.1 augustss xfer->nexttd = tail;
2239 1.39 augustss xfer->td.td_nexttd = LE(tail->physaddr);
2240 1.39 augustss xfer->td.td_be = LE(LE(xfer->td.td_cbp) + len - 1);
2241 1.1 augustss xfer->len = len;
2242 1.1 augustss xfer->reqh = reqh;
2243 1.34 augustss xfer->flags = OHCI_CALL_DONE | OHCI_SET_LEN;
2244 1.1 augustss reqh->hcpriv = xfer;
2245 1.1 augustss
2246 1.1 augustss #if USB_DEBUG
2247 1.1 augustss if (ohcidebug > 5) {
2248 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2249 1.1 augustss ohci_dump_ed(sed);
2250 1.1 augustss ohci_dump_tds(xfer);
2251 1.1 augustss }
2252 1.1 augustss #endif
2253 1.1 augustss
2254 1.1 augustss /* Insert ED in schedule */
2255 1.1 augustss s = splusb();
2256 1.1 augustss ohci_hash_add_td(sc, xfer);
2257 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2258 1.1 augustss opipe->tail = tail;
2259 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2260 1.1 augustss
2261 1.1 augustss #ifdef USB_DEBUG
2262 1.1 augustss if (ohcidebug > 5) {
2263 1.1 augustss delay(5000);
2264 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2265 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2266 1.1 augustss ohci_dump_ed(sed);
2267 1.1 augustss ohci_dump_tds(xfer);
2268 1.1 augustss }
2269 1.1 augustss #endif
2270 1.26 augustss splx(s);
2271 1.1 augustss
2272 1.1 augustss return (USBD_IN_PROGRESS);
2273 1.1 augustss }
2274 1.1 augustss
2275 1.1 augustss /* Abort a device control request. */
2276 1.1 augustss void
2277 1.1 augustss ohci_device_intr_abort(reqh)
2278 1.1 augustss usbd_request_handle reqh;
2279 1.1 augustss {
2280 1.34 augustss if (reqh->pipe->intrreqh == reqh) {
2281 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2282 1.34 augustss reqh->pipe->intrreqh = 0;
2283 1.1 augustss }
2284 1.38 augustss ohci_abort_req(reqh, USBD_CANCELLED);
2285 1.1 augustss }
2286 1.1 augustss
2287 1.1 augustss /* Close a device interrupt pipe. */
2288 1.1 augustss void
2289 1.1 augustss ohci_device_intr_close(pipe)
2290 1.1 augustss usbd_pipe_handle pipe;
2291 1.1 augustss {
2292 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2293 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2294 1.1 augustss int nslots = opipe->u.intr.nslots;
2295 1.1 augustss int pos = opipe->u.intr.pos;
2296 1.1 augustss int j;
2297 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2298 1.1 augustss int s;
2299 1.1 augustss
2300 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2301 1.1 augustss pipe, nslots, pos));
2302 1.1 augustss s = splusb();
2303 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
2304 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
2305 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
2306 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2307 1.1 augustss
2308 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2309 1.1 augustss ;
2310 1.1 augustss if (!p)
2311 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2312 1.1 augustss p->next = sed->next;
2313 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
2314 1.1 augustss splx(s);
2315 1.1 augustss
2316 1.1 augustss for (j = 0; j < nslots; j++)
2317 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2318 1.1 augustss
2319 1.1 augustss ohci_free_std(sc, opipe->tail);
2320 1.1 augustss ohci_free_sed(sc, opipe->sed);
2321 1.1 augustss }
2322 1.1 augustss
2323 1.1 augustss usbd_status
2324 1.1 augustss ohci_device_setintr(sc, opipe, ival)
2325 1.1 augustss ohci_softc_t *sc;
2326 1.1 augustss struct ohci_pipe *opipe;
2327 1.1 augustss int ival;
2328 1.1 augustss {
2329 1.1 augustss int i, j, s, best;
2330 1.1 augustss u_int npoll, slow, shigh, nslots;
2331 1.1 augustss u_int bestbw, bw;
2332 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2333 1.1 augustss
2334 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2335 1.1 augustss if (ival == 0) {
2336 1.1 augustss printf("ohci_setintr: 0 interval\n");
2337 1.1 augustss return (USBD_INVAL);
2338 1.1 augustss }
2339 1.1 augustss
2340 1.1 augustss npoll = OHCI_NO_INTRS;
2341 1.1 augustss while (npoll > ival)
2342 1.1 augustss npoll /= 2;
2343 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2344 1.1 augustss
2345 1.1 augustss /*
2346 1.1 augustss * We now know which level in the tree the ED must go into.
2347 1.1 augustss * Figure out which slot has most bandwidth left over.
2348 1.1 augustss * Slots to examine:
2349 1.1 augustss * npoll
2350 1.1 augustss * 1 0
2351 1.1 augustss * 2 1 2
2352 1.1 augustss * 4 3 4 5 6
2353 1.1 augustss * 8 7 8 9 10 11 12 13 14
2354 1.1 augustss * N (N-1) .. (N-1+N-1)
2355 1.1 augustss */
2356 1.1 augustss slow = npoll-1;
2357 1.1 augustss shigh = slow + npoll;
2358 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2359 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2360 1.1 augustss bw = 0;
2361 1.1 augustss for (j = 0; j < nslots; j++)
2362 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2363 1.1 augustss if (bw < bestbw) {
2364 1.1 augustss best = i;
2365 1.1 augustss bestbw = bw;
2366 1.1 augustss }
2367 1.1 augustss }
2368 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2369 1.1 augustss best, slow, shigh, bestbw));
2370 1.1 augustss
2371 1.1 augustss s = splusb();
2372 1.1 augustss hsed = sc->sc_eds[best];
2373 1.1 augustss sed->next = hsed->next;
2374 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
2375 1.1 augustss hsed->next = sed;
2376 1.39 augustss hsed->ed.ed_nexted = LE(sed->physaddr);
2377 1.1 augustss splx(s);
2378 1.1 augustss
2379 1.1 augustss for (j = 0; j < nslots; j++)
2380 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2381 1.1 augustss opipe->u.intr.nslots = nslots;
2382 1.1 augustss opipe->u.intr.pos = best;
2383 1.1 augustss
2384 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2385 1.1 augustss return (USBD_NORMAL_COMPLETION);
2386 1.1 augustss }
2387 1.1 augustss
2388