ohci.c revision 1.48 1 1.48 augustss /* $NetBSD: ohci.c,v 1.48 1999/09/15 21:14:03 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Open Host Controller driver.
42 1.1 augustss *
43 1.30 augustss * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
44 1.30 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
45 1.1 augustss */
46 1.1 augustss
47 1.1 augustss #include <sys/param.h>
48 1.1 augustss #include <sys/systm.h>
49 1.1 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
52 1.1 augustss #include <sys/device.h>
53 1.15 augustss #elif defined(__FreeBSD__)
54 1.15 augustss #include <sys/module.h>
55 1.15 augustss #include <sys/bus.h>
56 1.15 augustss #endif
57 1.1 augustss #include <sys/proc.h>
58 1.1 augustss #include <sys/queue.h>
59 1.1 augustss #include <sys/select.h>
60 1.1 augustss
61 1.4 augustss #include <machine/bus.h>
62 1.16 augustss #include <machine/endian.h>
63 1.4 augustss
64 1.1 augustss #include <dev/usb/usb.h>
65 1.1 augustss #include <dev/usb/usbdi.h>
66 1.1 augustss #include <dev/usb/usbdivar.h>
67 1.38 augustss #include <dev/usb/usb_mem.h>
68 1.1 augustss #include <dev/usb/usb_quirks.h>
69 1.1 augustss
70 1.1 augustss #include <dev/usb/ohcireg.h>
71 1.1 augustss #include <dev/usb/ohcivar.h>
72 1.1 augustss
73 1.15 augustss #if defined(__FreeBSD__)
74 1.15 augustss #include <machine/clock.h>
75 1.15 augustss
76 1.15 augustss #define delay(d) DELAY(d)
77 1.15 augustss
78 1.15 augustss #endif
79 1.1 augustss
80 1.36 augustss #if defined(__OpenBSD__)
81 1.36 augustss struct cfdriver ohci_cd = {
82 1.36 augustss NULL, "ohci", DV_DULL
83 1.36 augustss };
84 1.36 augustss #endif
85 1.36 augustss
86 1.16 augustss /*
87 1.16 augustss * The OHCI controller is little endian, so on big endian machines
88 1.16 augustss * the data strored in memory needs to be swapped.
89 1.16 augustss */
90 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
91 1.16 augustss #define LE(x) (bswap32(x))
92 1.16 augustss #else
93 1.16 augustss #define LE(x) (x)
94 1.16 augustss #endif
95 1.16 augustss
96 1.1 augustss struct ohci_pipe;
97 1.1 augustss
98 1.1 augustss ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
99 1.1 augustss void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
100 1.1 augustss
101 1.1 augustss ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
102 1.1 augustss void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
103 1.1 augustss
104 1.48 augustss void ohci_free_std_chain __P((ohci_softc_t *,
105 1.48 augustss ohci_soft_td_t *, ohci_soft_td_t *));
106 1.48 augustss usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *, ohci_softc_t *,
107 1.48 augustss int, int, int, usb_dma_t *,
108 1.48 augustss ohci_soft_td_t *,
109 1.48 augustss ohci_soft_td_t **));
110 1.48 augustss
111 1.33 augustss void ohci_power __P((int, void *));
112 1.1 augustss usbd_status ohci_open __P((usbd_pipe_handle));
113 1.5 augustss void ohci_poll __P((struct usbd_bus *));
114 1.1 augustss void ohci_waitintr __P((ohci_softc_t *, usbd_request_handle));
115 1.1 augustss void ohci_rhsc __P((ohci_softc_t *, usbd_request_handle));
116 1.1 augustss void ohci_process_done __P((ohci_softc_t *, ohci_physaddr_t));
117 1.1 augustss
118 1.1 augustss usbd_status ohci_device_request __P((usbd_request_handle reqh));
119 1.3 augustss void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
120 1.3 augustss void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
121 1.1 augustss void ohci_hash_add_td __P((ohci_softc_t *, ohci_soft_td_t *));
122 1.1 augustss void ohci_hash_rem_td __P((ohci_softc_t *, ohci_soft_td_t *));
123 1.1 augustss ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *, ohci_physaddr_t));
124 1.1 augustss
125 1.42 augustss usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *, u_int32_t));
126 1.42 augustss void ohci_freem __P((struct usbd_bus *, usb_dma_t *));
127 1.42 augustss
128 1.1 augustss usbd_status ohci_root_ctrl_transfer __P((usbd_request_handle));
129 1.17 augustss usbd_status ohci_root_ctrl_start __P((usbd_request_handle));
130 1.1 augustss void ohci_root_ctrl_abort __P((usbd_request_handle));
131 1.1 augustss void ohci_root_ctrl_close __P((usbd_pipe_handle));
132 1.1 augustss
133 1.1 augustss usbd_status ohci_root_intr_transfer __P((usbd_request_handle));
134 1.17 augustss usbd_status ohci_root_intr_start __P((usbd_request_handle));
135 1.1 augustss void ohci_root_intr_abort __P((usbd_request_handle));
136 1.1 augustss void ohci_root_intr_close __P((usbd_pipe_handle));
137 1.38 augustss void ohci_root_intr_done __P((usbd_request_handle));
138 1.1 augustss
139 1.1 augustss usbd_status ohci_device_ctrl_transfer __P((usbd_request_handle));
140 1.17 augustss usbd_status ohci_device_ctrl_start __P((usbd_request_handle));
141 1.1 augustss void ohci_device_ctrl_abort __P((usbd_request_handle));
142 1.1 augustss void ohci_device_ctrl_close __P((usbd_pipe_handle));
143 1.38 augustss void ohci_device_ctrl_done __P((usbd_request_handle));
144 1.1 augustss
145 1.3 augustss usbd_status ohci_device_bulk_transfer __P((usbd_request_handle));
146 1.17 augustss usbd_status ohci_device_bulk_start __P((usbd_request_handle));
147 1.3 augustss void ohci_device_bulk_abort __P((usbd_request_handle));
148 1.3 augustss void ohci_device_bulk_close __P((usbd_pipe_handle));
149 1.38 augustss void ohci_device_bulk_done __P((usbd_request_handle));
150 1.3 augustss
151 1.1 augustss usbd_status ohci_device_intr_transfer __P((usbd_request_handle));
152 1.17 augustss usbd_status ohci_device_intr_start __P((usbd_request_handle));
153 1.1 augustss void ohci_device_intr_abort __P((usbd_request_handle));
154 1.1 augustss void ohci_device_intr_close __P((usbd_pipe_handle));
155 1.38 augustss void ohci_device_intr_done __P((usbd_request_handle));
156 1.38 augustss
157 1.43 augustss usbd_status ohci_device_isoc_transfer __P((usbd_request_handle));
158 1.43 augustss usbd_status ohci_device_isoc_start __P((usbd_request_handle));
159 1.43 augustss void ohci_device_isoc_abort __P((usbd_request_handle));
160 1.43 augustss void ohci_device_isoc_close __P((usbd_pipe_handle));
161 1.43 augustss void ohci_device_isoc_done __P((usbd_request_handle));
162 1.43 augustss
163 1.1 augustss usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
164 1.1 augustss struct ohci_pipe *pipe, int ival));
165 1.1 augustss
166 1.1 augustss int ohci_str __P((usb_string_descriptor_t *, int, char *));
167 1.1 augustss
168 1.1 augustss void ohci_timeout __P((void *));
169 1.1 augustss void ohci_rhsc_able __P((ohci_softc_t *, int));
170 1.1 augustss
171 1.34 augustss void ohci_close_pipe __P((usbd_pipe_handle pipe,
172 1.34 augustss ohci_soft_ed_t *head));
173 1.38 augustss void ohci_abort_req __P((usbd_request_handle reqh,
174 1.38 augustss usbd_status status));
175 1.38 augustss void ohci_abort_req_end __P((void *));
176 1.34 augustss
177 1.37 augustss void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
178 1.37 augustss void ohci_noop __P((usbd_pipe_handle pipe));
179 1.37 augustss
180 1.1 augustss #ifdef USB_DEBUG
181 1.1 augustss ohci_softc_t *thesc;
182 1.1 augustss void ohci_dumpregs __P((ohci_softc_t *));
183 1.1 augustss void ohci_dump_tds __P((ohci_soft_td_t *));
184 1.1 augustss void ohci_dump_td __P((ohci_soft_td_t *));
185 1.1 augustss void ohci_dump_ed __P((ohci_soft_ed_t *));
186 1.1 augustss #endif
187 1.1 augustss
188 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
189 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
190 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
191 1.1 augustss
192 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
193 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
194 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
195 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
196 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
197 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
198 1.1 augustss
199 1.1 augustss struct ohci_pipe {
200 1.1 augustss struct usbd_pipe pipe;
201 1.1 augustss ohci_soft_ed_t *sed;
202 1.1 augustss ohci_soft_td_t *tail;
203 1.1 augustss /* Info needed for different pipe kinds. */
204 1.1 augustss union {
205 1.1 augustss /* Control pipe */
206 1.1 augustss struct {
207 1.4 augustss usb_dma_t reqdma;
208 1.1 augustss u_int length;
209 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
210 1.1 augustss } ctl;
211 1.1 augustss /* Interrupt pipe */
212 1.1 augustss struct {
213 1.1 augustss int nslots;
214 1.1 augustss int pos;
215 1.1 augustss } intr;
216 1.3 augustss /* Bulk pipe */
217 1.3 augustss struct {
218 1.3 augustss u_int length;
219 1.32 augustss int isread;
220 1.3 augustss } bulk;
221 1.43 augustss /* Iso pipe */
222 1.43 augustss struct iso {
223 1.43 augustss int xxxxx;
224 1.43 augustss } iso;
225 1.1 augustss } u;
226 1.1 augustss };
227 1.1 augustss
228 1.1 augustss #define OHCI_INTR_ENDPT 1
229 1.1 augustss
230 1.42 augustss struct usbd_bus_methods ohci_bus_methods = {
231 1.42 augustss ohci_open,
232 1.42 augustss ohci_poll,
233 1.42 augustss ohci_allocm,
234 1.42 augustss ohci_freem,
235 1.42 augustss };
236 1.42 augustss
237 1.42 augustss struct usbd_pipe_methods ohci_root_ctrl_methods = {
238 1.1 augustss ohci_root_ctrl_transfer,
239 1.17 augustss ohci_root_ctrl_start,
240 1.1 augustss ohci_root_ctrl_abort,
241 1.1 augustss ohci_root_ctrl_close,
242 1.37 augustss ohci_noop,
243 1.7 augustss 0,
244 1.1 augustss };
245 1.1 augustss
246 1.42 augustss struct usbd_pipe_methods ohci_root_intr_methods = {
247 1.1 augustss ohci_root_intr_transfer,
248 1.17 augustss ohci_root_intr_start,
249 1.1 augustss ohci_root_intr_abort,
250 1.1 augustss ohci_root_intr_close,
251 1.37 augustss ohci_noop,
252 1.38 augustss ohci_root_intr_done,
253 1.1 augustss };
254 1.1 augustss
255 1.42 augustss struct usbd_pipe_methods ohci_device_ctrl_methods = {
256 1.1 augustss ohci_device_ctrl_transfer,
257 1.17 augustss ohci_device_ctrl_start,
258 1.1 augustss ohci_device_ctrl_abort,
259 1.1 augustss ohci_device_ctrl_close,
260 1.37 augustss ohci_noop,
261 1.38 augustss ohci_device_ctrl_done,
262 1.1 augustss };
263 1.1 augustss
264 1.42 augustss struct usbd_pipe_methods ohci_device_intr_methods = {
265 1.1 augustss ohci_device_intr_transfer,
266 1.17 augustss ohci_device_intr_start,
267 1.1 augustss ohci_device_intr_abort,
268 1.1 augustss ohci_device_intr_close,
269 1.37 augustss ohci_device_clear_toggle,
270 1.38 augustss ohci_device_intr_done,
271 1.1 augustss };
272 1.1 augustss
273 1.42 augustss struct usbd_pipe_methods ohci_device_bulk_methods = {
274 1.3 augustss ohci_device_bulk_transfer,
275 1.17 augustss ohci_device_bulk_start,
276 1.3 augustss ohci_device_bulk_abort,
277 1.3 augustss ohci_device_bulk_close,
278 1.37 augustss ohci_device_clear_toggle,
279 1.38 augustss ohci_device_bulk_done,
280 1.3 augustss };
281 1.3 augustss
282 1.43 augustss #if 0
283 1.43 augustss struct usbd_pipe_methods ohci_device_isoc_methods = {
284 1.43 augustss ohci_device_isoc_transfer,
285 1.43 augustss ohci_device_isoc_start,
286 1.43 augustss ohci_device_isoc_abort,
287 1.43 augustss ohci_device_isoc_close,
288 1.43 augustss ohci_noop,
289 1.43 augustss ohci_device_isoc_done,
290 1.43 augustss };
291 1.43 augustss #endif
292 1.43 augustss
293 1.47 augustss int
294 1.47 augustss ohci_activate(self, act)
295 1.47 augustss device_ptr_t self;
296 1.47 augustss enum devact act;
297 1.47 augustss {
298 1.47 augustss /*struct ohci_softc *sc = (struct ohci_softc *)self;*/
299 1.47 augustss int rv = 0;
300 1.47 augustss
301 1.47 augustss switch (act) {
302 1.47 augustss case DVACT_ACTIVATE:
303 1.47 augustss return (EOPNOTSUPP);
304 1.47 augustss break;
305 1.47 augustss
306 1.47 augustss case DVACT_DEACTIVATE:
307 1.47 augustss break;
308 1.47 augustss }
309 1.47 augustss return (rv);
310 1.47 augustss }
311 1.47 augustss
312 1.47 augustss int
313 1.47 augustss ohci_detach(self, flags)
314 1.47 augustss device_ptr_t self;
315 1.47 augustss int flags;
316 1.47 augustss {
317 1.47 augustss struct ohci_softc *sc = (struct ohci_softc *)self;
318 1.47 augustss int rv = 0;
319 1.47 augustss
320 1.47 augustss if (sc->sc_child != NULL)
321 1.47 augustss rv = config_detach(sc->sc_child, flags);
322 1.47 augustss
323 1.47 augustss if (rv != 0)
324 1.47 augustss return (rv);
325 1.47 augustss
326 1.47 augustss powerhook_disestablish(sc->sc_powerhook);
327 1.47 augustss /* free data structures XXX */
328 1.47 augustss
329 1.47 augustss return (rv);
330 1.47 augustss }
331 1.47 augustss
332 1.1 augustss ohci_soft_ed_t *
333 1.1 augustss ohci_alloc_sed(sc)
334 1.1 augustss ohci_softc_t *sc;
335 1.1 augustss {
336 1.1 augustss ohci_soft_ed_t *sed;
337 1.1 augustss usbd_status r;
338 1.1 augustss int i, offs;
339 1.4 augustss usb_dma_t dma;
340 1.1 augustss
341 1.1 augustss if (!sc->sc_freeeds) {
342 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
343 1.44 augustss r = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
344 1.4 augustss OHCI_ED_ALIGN, &dma);
345 1.39 augustss if (r != USBD_NORMAL_COMPLETION)
346 1.39 augustss return (0);
347 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
348 1.39 augustss offs = i * OHCI_SED_SIZE;
349 1.39 augustss sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
350 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
351 1.1 augustss sed->next = sc->sc_freeeds;
352 1.1 augustss sc->sc_freeeds = sed;
353 1.1 augustss }
354 1.1 augustss }
355 1.1 augustss sed = sc->sc_freeeds;
356 1.1 augustss sc->sc_freeeds = sed->next;
357 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
358 1.1 augustss sed->next = 0;
359 1.39 augustss return (sed);
360 1.1 augustss }
361 1.1 augustss
362 1.1 augustss void
363 1.1 augustss ohci_free_sed(sc, sed)
364 1.1 augustss ohci_softc_t *sc;
365 1.1 augustss ohci_soft_ed_t *sed;
366 1.1 augustss {
367 1.1 augustss sed->next = sc->sc_freeeds;
368 1.1 augustss sc->sc_freeeds = sed;
369 1.1 augustss }
370 1.1 augustss
371 1.1 augustss ohci_soft_td_t *
372 1.1 augustss ohci_alloc_std(sc)
373 1.1 augustss ohci_softc_t *sc;
374 1.1 augustss {
375 1.1 augustss ohci_soft_td_t *std;
376 1.1 augustss usbd_status r;
377 1.1 augustss int i, offs;
378 1.4 augustss usb_dma_t dma;
379 1.1 augustss
380 1.1 augustss if (!sc->sc_freetds) {
381 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
382 1.44 augustss r = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
383 1.4 augustss OHCI_TD_ALIGN, &dma);
384 1.39 augustss if (r != USBD_NORMAL_COMPLETION)
385 1.39 augustss return (0);
386 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
387 1.39 augustss offs = i * OHCI_STD_SIZE;
388 1.39 augustss std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
389 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
390 1.1 augustss std->nexttd = sc->sc_freetds;
391 1.1 augustss sc->sc_freetds = std;
392 1.1 augustss }
393 1.1 augustss }
394 1.1 augustss std = sc->sc_freetds;
395 1.1 augustss sc->sc_freetds = std->nexttd;
396 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
397 1.1 augustss std->nexttd = 0;
398 1.1 augustss return (std);
399 1.1 augustss }
400 1.1 augustss
401 1.1 augustss void
402 1.1 augustss ohci_free_std(sc, std)
403 1.1 augustss ohci_softc_t *sc;
404 1.1 augustss ohci_soft_td_t *std;
405 1.1 augustss {
406 1.1 augustss std->nexttd = sc->sc_freetds;
407 1.1 augustss sc->sc_freetds = std;
408 1.1 augustss }
409 1.1 augustss
410 1.1 augustss usbd_status
411 1.48 augustss ohci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep)
412 1.48 augustss struct ohci_pipe *upipe;
413 1.48 augustss ohci_softc_t *sc;
414 1.48 augustss int len, rd, shortok;
415 1.48 augustss usb_dma_t *dma;
416 1.48 augustss ohci_soft_td_t *sp, **ep;
417 1.48 augustss {
418 1.48 augustss ohci_soft_td_t *next, *cur;
419 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
420 1.48 augustss u_int32_t intr;
421 1.48 augustss int curlen;
422 1.48 augustss
423 1.48 augustss DPRINTFN(len >= 4096,("ohci_alloc_std_chain: start len=%d\n", len));
424 1.48 augustss cur = sp;
425 1.48 augustss dataphys = DMAADDR(dma);
426 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
427 1.48 augustss for (;;) {
428 1.48 augustss next = ohci_alloc_std(sc);
429 1.48 augustss if (next == 0) {
430 1.48 augustss /* XXX free chain */
431 1.48 augustss return (USBD_NOMEM);
432 1.48 augustss }
433 1.48 augustss
434 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
435 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
436 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
437 1.48 augustss /* we can handle it in this TD */
438 1.48 augustss curlen = len;
439 1.48 augustss } else {
440 1.48 augustss /* must use multiple TDs, fill as much as possible. */
441 1.48 augustss curlen = 2 * OHCI_PAGE_SIZE -
442 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
443 1.48 augustss }
444 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
445 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
446 1.48 augustss dataphys, dataphysend,
447 1.48 augustss len, curlen));
448 1.48 augustss len -= curlen;
449 1.48 augustss
450 1.48 augustss intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR;
451 1.48 augustss cur->td.td_flags = LE(
452 1.48 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
453 1.48 augustss intr | OHCI_TD_TOGGLE_CARRY |
454 1.48 augustss (shortok ? OHCI_TD_R : 0));
455 1.48 augustss cur->td.td_cbp = LE(dataphys);
456 1.48 augustss cur->nexttd = next;
457 1.48 augustss cur->td.td_nexttd = LE(next->physaddr);
458 1.48 augustss cur->td.td_be = LE(dataphys + curlen - 1);
459 1.48 augustss cur->len = curlen;
460 1.48 augustss cur->flags = OHCI_ADD_LEN;
461 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
462 1.48 augustss dataphys, dataphys + curlen - 1));
463 1.48 augustss if (len == 0)
464 1.48 augustss break;
465 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
466 1.48 augustss dataphys += curlen;
467 1.48 augustss cur = next;
468 1.48 augustss }
469 1.48 augustss cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
470 1.48 augustss *ep = next;
471 1.48 augustss
472 1.48 augustss return (USBD_NORMAL_COMPLETION);
473 1.48 augustss }
474 1.48 augustss
475 1.48 augustss void
476 1.48 augustss ohci_free_std_chain(sc, std, stdend)
477 1.48 augustss ohci_softc_t *sc;
478 1.48 augustss ohci_soft_td_t *std;
479 1.48 augustss ohci_soft_td_t *stdend;
480 1.48 augustss {
481 1.48 augustss ohci_soft_td_t *p;
482 1.48 augustss
483 1.48 augustss for (; std != stdend; std = p) {
484 1.48 augustss p = std->nexttd;
485 1.48 augustss ohci_free_std(sc, std);
486 1.48 augustss }
487 1.48 augustss }
488 1.48 augustss
489 1.48 augustss usbd_status
490 1.1 augustss ohci_init(sc)
491 1.1 augustss ohci_softc_t *sc;
492 1.1 augustss {
493 1.1 augustss ohci_soft_ed_t *sed, *psed;
494 1.1 augustss usbd_status r;
495 1.1 augustss int rev;
496 1.1 augustss int i;
497 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
498 1.16 augustss
499 1.1 augustss DPRINTF(("ohci_init: start\n"));
500 1.1 augustss rev = OREAD4(sc, OHCI_REVISION);
501 1.36 augustss #if defined(__OpenBSD__)
502 1.36 augustss printf(", OHCI version %d.%d%s\n",
503 1.36 augustss #else
504 1.15 augustss printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
505 1.36 augustss #endif
506 1.1 augustss OHCI_REV_HI(rev), OHCI_REV_LO(rev),
507 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
508 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
509 1.1 augustss printf("%s: unsupported OHCI revision\n",
510 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
511 1.1 augustss return (USBD_INVAL);
512 1.1 augustss }
513 1.1 augustss
514 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
515 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
516 1.1 augustss
517 1.1 augustss /* Allocate the HCCA area. */
518 1.44 augustss r = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
519 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
520 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
521 1.1 augustss return (r);
522 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
523 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
524 1.1 augustss
525 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
526 1.1 augustss
527 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
528 1.1 augustss if (!sc->sc_ctrl_head) {
529 1.1 augustss r = USBD_NOMEM;
530 1.1 augustss goto bad1;
531 1.1 augustss }
532 1.39 augustss sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
533 1.34 augustss
534 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
535 1.1 augustss if (!sc->sc_bulk_head) {
536 1.1 augustss r = USBD_NOMEM;
537 1.1 augustss goto bad2;
538 1.1 augustss }
539 1.39 augustss sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
540 1.1 augustss
541 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
542 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
543 1.1 augustss sed = ohci_alloc_sed(sc);
544 1.1 augustss if (!sed) {
545 1.1 augustss while (--i >= 0)
546 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
547 1.1 augustss r = USBD_NOMEM;
548 1.1 augustss goto bad3;
549 1.1 augustss }
550 1.1 augustss /* All ED fields are set to 0. */
551 1.1 augustss sc->sc_eds[i] = sed;
552 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
553 1.1 augustss if (i != 0) {
554 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
555 1.1 augustss sed->next = psed;
556 1.39 augustss sed->ed.ed_nexted = LE(psed->physaddr);
557 1.1 augustss }
558 1.1 augustss }
559 1.1 augustss /*
560 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
561 1.1 augustss * the tree set up properly to spread the interrupts.
562 1.1 augustss */
563 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
564 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
565 1.16 augustss LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
566 1.1 augustss
567 1.1 augustss /* Determine in what context we are running. */
568 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
569 1.1 augustss if (ctl & OHCI_IR) {
570 1.1 augustss /* SMM active, request change */
571 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
572 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
573 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
574 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
575 1.1 augustss delay(1000);
576 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
577 1.1 augustss }
578 1.1 augustss if ((ctl & OHCI_IR) == 0) {
579 1.15 augustss printf("%s: SMM does not respond, resetting\n",
580 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
581 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
582 1.1 augustss goto reset;
583 1.1 augustss }
584 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
585 1.1 augustss /* BIOS started controller. */
586 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
587 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
588 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
589 1.1 augustss delay(USB_RESUME_DELAY * 1000);
590 1.1 augustss }
591 1.1 augustss } else {
592 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
593 1.1 augustss reset:
594 1.1 augustss /* Controller was cold started. */
595 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
596 1.1 augustss }
597 1.1 augustss
598 1.16 augustss /*
599 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
600 1.25 augustss * without it some controllers do not start.
601 1.16 augustss */
602 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
603 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
604 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
605 1.16 augustss
606 1.1 augustss /* We now own the host controller and the bus has been reset. */
607 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
608 1.1 augustss
609 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
610 1.1 augustss /* Nominal time for a reset is 10 us. */
611 1.1 augustss for (i = 0; i < 10; i++) {
612 1.1 augustss delay(10);
613 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
614 1.1 augustss if (!hcr)
615 1.1 augustss break;
616 1.1 augustss }
617 1.1 augustss if (hcr) {
618 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
619 1.1 augustss r = USBD_IOERROR;
620 1.1 augustss goto bad3;
621 1.1 augustss }
622 1.1 augustss #ifdef USB_DEBUG
623 1.1 augustss thesc = sc;
624 1.1 augustss if (ohcidebug > 15)
625 1.1 augustss ohci_dumpregs(sc);
626 1.1 augustss #endif
627 1.1 augustss
628 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
629 1.1 augustss
630 1.1 augustss /* Set up HC registers. */
631 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
632 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
633 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
634 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
635 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
636 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
637 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
638 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
639 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
640 1.1 augustss /* And finally start it! */
641 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
642 1.1 augustss
643 1.1 augustss /*
644 1.1 augustss * The controller is now OPERATIONAL. Set a some final
645 1.1 augustss * registers that should be set earlier, but that the
646 1.1 augustss * controller ignores when in the SUSPEND state.
647 1.1 augustss */
648 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
649 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
650 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
651 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
652 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
653 1.1 augustss
654 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
655 1.1 augustss
656 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
657 1.1 augustss
658 1.1 augustss #ifdef USB_DEBUG
659 1.1 augustss if (ohcidebug > 5)
660 1.1 augustss ohci_dumpregs(sc);
661 1.1 augustss #endif
662 1.1 augustss
663 1.1 augustss /* Set up the bus struct. */
664 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
665 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
666 1.1 augustss
667 1.47 augustss sc->sc_powerhook = powerhook_establish(ohci_power, sc);
668 1.33 augustss
669 1.1 augustss return (USBD_NORMAL_COMPLETION);
670 1.1 augustss
671 1.1 augustss bad3:
672 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
673 1.1 augustss bad2:
674 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
675 1.1 augustss bad1:
676 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
677 1.1 augustss return (r);
678 1.1 augustss }
679 1.1 augustss
680 1.42 augustss usbd_status
681 1.42 augustss ohci_allocm(bus, dma, size)
682 1.42 augustss struct usbd_bus *bus;
683 1.42 augustss usb_dma_t *dma;
684 1.42 augustss u_int32_t size;
685 1.42 augustss {
686 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
687 1.42 augustss
688 1.44 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
689 1.42 augustss }
690 1.42 augustss
691 1.42 augustss void
692 1.42 augustss ohci_freem(bus, dma)
693 1.42 augustss struct usbd_bus *bus;
694 1.42 augustss usb_dma_t *dma;
695 1.42 augustss {
696 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
697 1.42 augustss
698 1.44 augustss usb_freemem(&sc->sc_bus, dma);
699 1.42 augustss }
700 1.42 augustss
701 1.36 augustss #if !defined(__OpenBSD__)
702 1.33 augustss void
703 1.33 augustss ohci_power(why, v)
704 1.33 augustss int why;
705 1.33 augustss void *v;
706 1.33 augustss {
707 1.33 augustss #ifdef USB_DEBUG
708 1.33 augustss ohci_softc_t *sc = v;
709 1.33 augustss
710 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
711 1.33 augustss /* XXX should suspend/resume */
712 1.33 augustss ohci_dumpregs(sc);
713 1.33 augustss #endif
714 1.33 augustss }
715 1.36 augustss #endif /* !defined(__OpenBSD__) */
716 1.33 augustss
717 1.1 augustss #ifdef USB_DEBUG
718 1.1 augustss void ohcidump(void);
719 1.1 augustss void ohcidump(void) { ohci_dumpregs(thesc); }
720 1.1 augustss
721 1.1 augustss void
722 1.1 augustss ohci_dumpregs(sc)
723 1.1 augustss ohci_softc_t *sc;
724 1.1 augustss {
725 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
726 1.41 augustss OREAD4(sc, OHCI_REVISION),
727 1.41 augustss OREAD4(sc, OHCI_CONTROL),
728 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
729 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
730 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
731 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
732 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
733 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
734 1.41 augustss OREAD4(sc, OHCI_HCCA),
735 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
736 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
737 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
738 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
739 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
740 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
741 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
742 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
743 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
744 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
745 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
746 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
747 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
748 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
749 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
750 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
751 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
752 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
753 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
754 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
755 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
756 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
757 1.41 augustss LE(sc->sc_hcca->hcca_frame_number),
758 1.41 augustss LE(sc->sc_hcca->hcca_done_head)));
759 1.1 augustss }
760 1.1 augustss #endif
761 1.1 augustss
762 1.1 augustss int
763 1.1 augustss ohci_intr(p)
764 1.1 augustss void *p;
765 1.1 augustss {
766 1.1 augustss ohci_softc_t *sc = p;
767 1.1 augustss u_int32_t intrs, eintrs;
768 1.1 augustss ohci_physaddr_t done;
769 1.1 augustss
770 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
771 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
772 1.15 augustss #ifdef DIAGNOSTIC
773 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
774 1.15 augustss #endif
775 1.15 augustss return (0);
776 1.15 augustss }
777 1.15 augustss
778 1.27 augustss intrs = 0;
779 1.16 augustss done = LE(sc->sc_hcca->hcca_done_head);
780 1.1 augustss if (done != 0) {
781 1.26 augustss sc->sc_hcca->hcca_done_head = 0;
782 1.26 augustss if (done & ~OHCI_DONE_INTRS)
783 1.26 augustss intrs = OHCI_WDH;
784 1.1 augustss if (done & OHCI_DONE_INTRS)
785 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
786 1.1 augustss } else
787 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
788 1.1 augustss if (!intrs)
789 1.1 augustss return (0);
790 1.1 augustss intrs &= ~OHCI_MIE;
791 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
792 1.1 augustss eintrs = intrs & sc->sc_eintrs;
793 1.1 augustss if (!eintrs)
794 1.1 augustss return (0);
795 1.1 augustss
796 1.45 augustss sc->sc_bus.intr_context++;
797 1.44 augustss sc->sc_bus.no_intrs++;
798 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
799 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
800 1.1 augustss (u_int)eintrs));
801 1.1 augustss
802 1.1 augustss if (eintrs & OHCI_SO) {
803 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
804 1.1 augustss /* XXX do what */
805 1.1 augustss intrs &= ~OHCI_SO;
806 1.1 augustss }
807 1.1 augustss if (eintrs & OHCI_WDH) {
808 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
809 1.1 augustss intrs &= ~OHCI_WDH;
810 1.1 augustss }
811 1.1 augustss if (eintrs & OHCI_RD) {
812 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
813 1.1 augustss /* XXX process resume detect */
814 1.1 augustss }
815 1.1 augustss if (eintrs & OHCI_UE) {
816 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
817 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
818 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
819 1.1 augustss /* XXX what else */
820 1.1 augustss }
821 1.1 augustss if (eintrs & OHCI_RHSC) {
822 1.1 augustss ohci_rhsc(sc, sc->sc_intrreqh);
823 1.1 augustss intrs &= ~OHCI_RHSC;
824 1.1 augustss
825 1.1 augustss /*
826 1.1 augustss * Disable RHSC interrupt for now, because it will be
827 1.1 augustss * on until the port has been reset.
828 1.1 augustss */
829 1.1 augustss ohci_rhsc_able(sc, 0);
830 1.1 augustss }
831 1.1 augustss
832 1.45 augustss sc->sc_bus.intr_context--;
833 1.44 augustss
834 1.1 augustss /* Block unprocessed interrupts. XXX */
835 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
836 1.1 augustss sc->sc_eintrs &= ~intrs;
837 1.1 augustss
838 1.1 augustss return (1);
839 1.1 augustss }
840 1.1 augustss
841 1.1 augustss void
842 1.1 augustss ohci_rhsc_able(sc, on)
843 1.1 augustss ohci_softc_t *sc;
844 1.1 augustss int on;
845 1.1 augustss {
846 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
847 1.1 augustss if (on) {
848 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
849 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
850 1.1 augustss } else {
851 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
852 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
853 1.1 augustss }
854 1.1 augustss }
855 1.1 augustss
856 1.13 augustss #ifdef USB_DEBUG
857 1.13 augustss char *ohci_cc_strs[] = {
858 1.13 augustss "NO_ERROR",
859 1.13 augustss "CRC",
860 1.13 augustss "BIT_STUFFING",
861 1.13 augustss "DATA_TOGGLE_MISMATCH",
862 1.13 augustss "STALL",
863 1.13 augustss "DEVICE_NOT_RESPONDING",
864 1.13 augustss "PID_CHECK_FAILURE",
865 1.13 augustss "UNEXPECTED_PID",
866 1.13 augustss "DATA_OVERRUN",
867 1.13 augustss "DATA_UNDERRUN",
868 1.13 augustss "BUFFER_OVERRUN",
869 1.13 augustss "BUFFER_UNDERRUN",
870 1.13 augustss "NOT_ACCESSED",
871 1.13 augustss };
872 1.13 augustss #endif
873 1.13 augustss
874 1.1 augustss void
875 1.1 augustss ohci_process_done(sc, done)
876 1.1 augustss ohci_softc_t *sc;
877 1.1 augustss ohci_physaddr_t done;
878 1.1 augustss {
879 1.48 augustss ohci_soft_td_t *std, *sdone, *stdnext;
880 1.1 augustss usbd_request_handle reqh;
881 1.1 augustss int len, cc;
882 1.1 augustss
883 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
884 1.1 augustss
885 1.1 augustss /* Reverse the done list. */
886 1.39 augustss for (sdone = 0; done; done = LE(std->td.td_nexttd)) {
887 1.1 augustss std = ohci_hash_find_td(sc, done);
888 1.1 augustss std->dnext = sdone;
889 1.1 augustss sdone = std;
890 1.1 augustss }
891 1.1 augustss
892 1.1 augustss #ifdef USB_DEBUG
893 1.1 augustss if (ohcidebug > 10) {
894 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
895 1.1 augustss ohci_dump_tds(sdone);
896 1.1 augustss }
897 1.1 augustss #endif
898 1.1 augustss
899 1.48 augustss for (std = sdone; std; std = stdnext) {
900 1.1 augustss reqh = std->reqh;
901 1.48 augustss stdnext = std->dnext;
902 1.27 augustss DPRINTFN(10, ("ohci_process_done: std=%p reqh=%p hcpriv=%p\n",
903 1.27 augustss std, reqh, reqh->hcpriv));
904 1.39 augustss cc = OHCI_TD_GET_CC(LE(std->td.td_flags));
905 1.38 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
906 1.34 augustss if (reqh->status == USBD_CANCELLED ||
907 1.34 augustss reqh->status == USBD_TIMEOUT) {
908 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
909 1.34 augustss reqh));
910 1.38 augustss /* Handled by abort routine. */
911 1.34 augustss } else if (cc == OHCI_CC_NO_ERROR) {
912 1.34 augustss len = std->len;
913 1.39 augustss if (std->td.td_cbp != 0)
914 1.39 augustss len -= LE(std->td.td_be) -
915 1.39 augustss LE(std->td.td_cbp) + 1;
916 1.48 augustss if (std->flags & OHCI_ADD_LEN)
917 1.48 augustss reqh->actlen += len;
918 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
919 1.34 augustss reqh->status = USBD_NORMAL_COMPLETION;
920 1.38 augustss usb_transfer_complete(reqh);
921 1.21 augustss }
922 1.48 augustss ohci_hash_rem_td(sc, std);
923 1.48 augustss ohci_free_std(sc, std);
924 1.1 augustss } else {
925 1.48 augustss /*
926 1.48 augustss * Endpoint is halted. First unlink all the TDs
927 1.48 augustss * belonging to the failed transfer, and then restart
928 1.48 augustss * the endpoint.
929 1.48 augustss */
930 1.1 augustss ohci_soft_td_t *p, *n;
931 1.1 augustss struct ohci_pipe *opipe =
932 1.1 augustss (struct ohci_pipe *)reqh->pipe;
933 1.48 augustss
934 1.13 augustss DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
935 1.39 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
936 1.39 augustss ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))]));
937 1.48 augustss
938 1.48 augustss /* remove TDs */
939 1.48 augustss for (p = std; p->reqh == reqh; p = n) {
940 1.1 augustss n = p->nexttd;
941 1.1 augustss ohci_hash_rem_td(sc, p);
942 1.1 augustss ohci_free_std(sc, p);
943 1.1 augustss }
944 1.48 augustss
945 1.16 augustss /* clear halt */
946 1.39 augustss opipe->sed->ed.ed_headp = LE(p->physaddr);
947 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
948 1.48 augustss
949 1.1 augustss if (cc == OHCI_CC_STALL)
950 1.1 augustss reqh->status = USBD_STALLED;
951 1.1 augustss else
952 1.1 augustss reqh->status = USBD_IOERROR;
953 1.38 augustss usb_transfer_complete(reqh);
954 1.1 augustss }
955 1.1 augustss }
956 1.1 augustss }
957 1.1 augustss
958 1.1 augustss void
959 1.38 augustss ohci_device_ctrl_done(reqh)
960 1.1 augustss usbd_request_handle reqh;
961 1.1 augustss {
962 1.1 augustss DPRINTFN(10,("ohci_ctrl_done: reqh=%p\n", reqh));
963 1.1 augustss
964 1.38 augustss #ifdef DIAGNOSTIC
965 1.42 augustss if (!(reqh->rqflags & URQ_REQUEST)) {
966 1.8 augustss panic("ohci_ctrl_done: not a request\n");
967 1.1 augustss }
968 1.38 augustss #endif
969 1.38 augustss reqh->hcpriv = 0;
970 1.1 augustss }
971 1.1 augustss
972 1.1 augustss void
973 1.38 augustss ohci_device_intr_done(reqh)
974 1.1 augustss usbd_request_handle reqh;
975 1.1 augustss {
976 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
977 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
978 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
979 1.48 augustss ohci_soft_td_t *data, *tail;
980 1.1 augustss
981 1.1 augustss
982 1.1 augustss DPRINTFN(10,("ohci_intr_done: reqh=%p, actlen=%d\n",
983 1.1 augustss reqh, reqh->actlen));
984 1.1 augustss
985 1.38 augustss reqh->hcpriv = 0;
986 1.38 augustss
987 1.38 augustss if (reqh->pipe->repeat) {
988 1.48 augustss data = opipe->tail;
989 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
990 1.1 augustss if (!tail) {
991 1.1 augustss reqh->status = USBD_NOMEM;
992 1.1 augustss return;
993 1.1 augustss }
994 1.1 augustss tail->reqh = 0;
995 1.1 augustss
996 1.48 augustss data->td.td_flags = LE(
997 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
998 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
999 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
1000 1.48 augustss data->td.td_flags |= LE(OHCI_TD_R);
1001 1.48 augustss data->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
1002 1.48 augustss data->nexttd = tail;
1003 1.48 augustss data->td.td_nexttd = LE(tail->physaddr);
1004 1.48 augustss data->td.td_be = LE(LE(data->td.td_cbp) + reqh->length - 1);
1005 1.48 augustss data->len = reqh->length;
1006 1.48 augustss data->reqh = reqh;
1007 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1008 1.48 augustss reqh->hcpriv = data;
1009 1.48 augustss reqh->actlen = 0;
1010 1.1 augustss
1011 1.48 augustss ohci_hash_add_td(sc, data);
1012 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1013 1.1 augustss opipe->tail = tail;
1014 1.1 augustss }
1015 1.1 augustss }
1016 1.1 augustss
1017 1.1 augustss void
1018 1.38 augustss ohci_device_bulk_done(reqh)
1019 1.3 augustss usbd_request_handle reqh;
1020 1.3 augustss {
1021 1.3 augustss DPRINTFN(10,("ohci_bulk_done: reqh=%p, actlen=%d\n",
1022 1.3 augustss reqh, reqh->actlen));
1023 1.3 augustss
1024 1.38 augustss reqh->hcpriv = 0;
1025 1.3 augustss }
1026 1.3 augustss
1027 1.3 augustss void
1028 1.1 augustss ohci_rhsc(sc, reqh)
1029 1.1 augustss ohci_softc_t *sc;
1030 1.1 augustss usbd_request_handle reqh;
1031 1.1 augustss {
1032 1.1 augustss usbd_pipe_handle pipe;
1033 1.1 augustss struct ohci_pipe *opipe;
1034 1.1 augustss u_char *p;
1035 1.1 augustss int i, m;
1036 1.1 augustss int hstatus;
1037 1.1 augustss
1038 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1039 1.1 augustss DPRINTF(("ohci_rhsc: sc=%p reqh=%p hstatus=0x%08x\n",
1040 1.1 augustss sc, reqh, hstatus));
1041 1.1 augustss
1042 1.1 augustss if (reqh == 0) {
1043 1.1 augustss /* Just ignore the change. */
1044 1.1 augustss return;
1045 1.1 augustss }
1046 1.1 augustss
1047 1.1 augustss pipe = reqh->pipe;
1048 1.1 augustss opipe = (struct ohci_pipe *)pipe;
1049 1.1 augustss
1050 1.43 augustss p = KERNADDR(&reqh->dmabuf);
1051 1.1 augustss m = min(sc->sc_noport, reqh->length * 8 - 1);
1052 1.1 augustss memset(p, 0, reqh->length);
1053 1.1 augustss for (i = 1; i <= m; i++) {
1054 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1055 1.1 augustss p[i/8] |= 1 << (i%8);
1056 1.1 augustss }
1057 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1058 1.1 augustss reqh->actlen = reqh->length;
1059 1.1 augustss reqh->status = USBD_NORMAL_COMPLETION;
1060 1.1 augustss
1061 1.38 augustss usb_transfer_complete(reqh);
1062 1.38 augustss }
1063 1.38 augustss
1064 1.38 augustss void
1065 1.38 augustss ohci_root_intr_done(reqh)
1066 1.38 augustss usbd_request_handle reqh;
1067 1.38 augustss {
1068 1.38 augustss reqh->hcpriv = 0;
1069 1.1 augustss }
1070 1.1 augustss
1071 1.1 augustss /*
1072 1.1 augustss * Wait here until controller claims to have an interrupt.
1073 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1074 1.1 augustss * too long.
1075 1.1 augustss */
1076 1.1 augustss void
1077 1.1 augustss ohci_waitintr(sc, reqh)
1078 1.1 augustss ohci_softc_t *sc;
1079 1.1 augustss usbd_request_handle reqh;
1080 1.1 augustss {
1081 1.1 augustss int timo = reqh->timeout;
1082 1.1 augustss int usecs;
1083 1.1 augustss u_int32_t intrs;
1084 1.1 augustss
1085 1.1 augustss reqh->status = USBD_IN_PROGRESS;
1086 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1087 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1088 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1089 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1090 1.1 augustss #ifdef USB_DEBUG
1091 1.1 augustss if (ohcidebug > 15)
1092 1.1 augustss ohci_dumpregs(sc);
1093 1.1 augustss #endif
1094 1.1 augustss if (intrs) {
1095 1.1 augustss ohci_intr(sc);
1096 1.1 augustss if (reqh->status != USBD_IN_PROGRESS)
1097 1.1 augustss return;
1098 1.1 augustss }
1099 1.1 augustss }
1100 1.15 augustss
1101 1.15 augustss /* Timeout */
1102 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1103 1.1 augustss reqh->status = USBD_TIMEOUT;
1104 1.38 augustss usb_transfer_complete(reqh);
1105 1.15 augustss /* XXX should free TD */
1106 1.5 augustss }
1107 1.5 augustss
1108 1.5 augustss void
1109 1.5 augustss ohci_poll(bus)
1110 1.5 augustss struct usbd_bus *bus;
1111 1.5 augustss {
1112 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1113 1.5 augustss
1114 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1115 1.5 augustss ohci_intr(sc);
1116 1.1 augustss }
1117 1.1 augustss
1118 1.1 augustss usbd_status
1119 1.1 augustss ohci_device_request(reqh)
1120 1.1 augustss usbd_request_handle reqh;
1121 1.1 augustss {
1122 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1123 1.1 augustss usb_device_request_t *req = &reqh->request;
1124 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1125 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1126 1.1 augustss int addr = dev->address;
1127 1.48 augustss ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail;
1128 1.1 augustss ohci_soft_ed_t *sed;
1129 1.1 augustss int isread;
1130 1.1 augustss int len;
1131 1.1 augustss usbd_status r;
1132 1.1 augustss int s;
1133 1.1 augustss
1134 1.1 augustss isread = req->bmRequestType & UT_READ;
1135 1.1 augustss len = UGETW(req->wLength);
1136 1.1 augustss
1137 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1138 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1139 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1140 1.1 augustss UGETW(req->wIndex), len, addr,
1141 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1142 1.1 augustss
1143 1.1 augustss setup = opipe->tail;
1144 1.1 augustss stat = ohci_alloc_std(sc);
1145 1.1 augustss if (!stat) {
1146 1.1 augustss r = USBD_NOMEM;
1147 1.1 augustss goto bad1;
1148 1.1 augustss }
1149 1.1 augustss tail = ohci_alloc_std(sc);
1150 1.1 augustss if (!tail) {
1151 1.1 augustss r = USBD_NOMEM;
1152 1.1 augustss goto bad2;
1153 1.1 augustss }
1154 1.1 augustss tail->reqh = 0;
1155 1.1 augustss
1156 1.1 augustss sed = opipe->sed;
1157 1.1 augustss opipe->u.ctl.length = len;
1158 1.1 augustss
1159 1.10 augustss /* Update device address and length since they may have changed. */
1160 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1161 1.39 augustss sed->ed.ed_flags = LE(
1162 1.39 augustss (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1163 1.16 augustss OHCI_ED_SET_FA(addr) |
1164 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1165 1.1 augustss
1166 1.1 augustss /* Set up data transaction */
1167 1.1 augustss if (len != 0) {
1168 1.48 augustss data = ohci_alloc_std(sc);
1169 1.48 augustss if (!data) {
1170 1.1 augustss r = USBD_NOMEM;
1171 1.1 augustss goto bad3;
1172 1.1 augustss }
1173 1.48 augustss data->td.td_flags = LE(
1174 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1175 1.19 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1176 1.19 augustss (reqh->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1177 1.48 augustss data->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
1178 1.48 augustss data->nexttd = stat;
1179 1.48 augustss data->td.td_nexttd = LE(stat->physaddr);
1180 1.48 augustss data->td.td_be = LE(LE(data->td.td_cbp) + len - 1);
1181 1.48 augustss data->len = len;
1182 1.48 augustss data->reqh = reqh;
1183 1.48 augustss data->flags = OHCI_ADD_LEN;
1184 1.1 augustss
1185 1.48 augustss next = data;
1186 1.34 augustss stat->flags = OHCI_CALL_DONE;
1187 1.34 augustss } else {
1188 1.1 augustss next = stat;
1189 1.48 augustss /* XXX ADD_LEN? */
1190 1.48 augustss stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1191 1.34 augustss }
1192 1.1 augustss
1193 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1194 1.1 augustss
1195 1.39 augustss setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1196 1.16 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1197 1.39 augustss setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1198 1.1 augustss setup->nexttd = next;
1199 1.39 augustss setup->td.td_nexttd = LE(next->physaddr);
1200 1.39 augustss setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1);
1201 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
1202 1.1 augustss setup->reqh = reqh;
1203 1.34 augustss setup->flags = 0;
1204 1.34 augustss reqh->hcpriv = setup;
1205 1.1 augustss
1206 1.39 augustss stat->td.td_flags = LE(
1207 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1208 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1209 1.39 augustss stat->td.td_cbp = 0;
1210 1.1 augustss stat->nexttd = tail;
1211 1.39 augustss stat->td.td_nexttd = LE(tail->physaddr);
1212 1.39 augustss stat->td.td_be = 0;
1213 1.1 augustss stat->len = 0;
1214 1.1 augustss stat->reqh = reqh;
1215 1.1 augustss
1216 1.1 augustss #if USB_DEBUG
1217 1.1 augustss if (ohcidebug > 5) {
1218 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1219 1.1 augustss ohci_dump_ed(sed);
1220 1.1 augustss ohci_dump_tds(setup);
1221 1.1 augustss }
1222 1.1 augustss #endif
1223 1.1 augustss
1224 1.1 augustss /* Insert ED in schedule */
1225 1.1 augustss s = splusb();
1226 1.1 augustss ohci_hash_add_td(sc, setup);
1227 1.1 augustss if (len != 0)
1228 1.48 augustss ohci_hash_add_td(sc, data);
1229 1.1 augustss ohci_hash_add_td(sc, stat);
1230 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1231 1.1 augustss opipe->tail = tail;
1232 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1233 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
1234 1.15 augustss usb_timeout(ohci_timeout, reqh,
1235 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
1236 1.15 augustss }
1237 1.1 augustss splx(s);
1238 1.1 augustss
1239 1.1 augustss #if USB_DEBUG
1240 1.1 augustss if (ohcidebug > 5) {
1241 1.1 augustss delay(5000);
1242 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1243 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1244 1.1 augustss ohci_dump_ed(sed);
1245 1.1 augustss ohci_dump_tds(setup);
1246 1.1 augustss }
1247 1.1 augustss #endif
1248 1.1 augustss
1249 1.1 augustss return (USBD_NORMAL_COMPLETION);
1250 1.1 augustss
1251 1.1 augustss bad3:
1252 1.1 augustss ohci_free_std(sc, tail);
1253 1.1 augustss bad2:
1254 1.1 augustss ohci_free_std(sc, stat);
1255 1.1 augustss bad1:
1256 1.1 augustss return (r);
1257 1.1 augustss }
1258 1.1 augustss
1259 1.1 augustss /*
1260 1.1 augustss * Add an ED to the schedule. Called at splusb().
1261 1.1 augustss */
1262 1.1 augustss void
1263 1.3 augustss ohci_add_ed(sed, head)
1264 1.1 augustss ohci_soft_ed_t *sed;
1265 1.1 augustss ohci_soft_ed_t *head;
1266 1.1 augustss {
1267 1.46 augustss SPLUSBCHECK;
1268 1.1 augustss sed->next = head->next;
1269 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1270 1.1 augustss head->next = sed;
1271 1.39 augustss head->ed.ed_nexted = LE(sed->physaddr);
1272 1.1 augustss }
1273 1.1 augustss
1274 1.1 augustss /*
1275 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1276 1.3 augustss */
1277 1.3 augustss void
1278 1.3 augustss ohci_rem_ed(sed, head)
1279 1.3 augustss ohci_soft_ed_t *sed;
1280 1.3 augustss ohci_soft_ed_t *head;
1281 1.3 augustss {
1282 1.3 augustss ohci_soft_ed_t *p;
1283 1.3 augustss
1284 1.46 augustss SPLUSBCHECK;
1285 1.46 augustss
1286 1.3 augustss /* XXX */
1287 1.3 augustss for (p = head; p && p->next != sed; p = p->next)
1288 1.3 augustss ;
1289 1.3 augustss if (!p)
1290 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1291 1.3 augustss p->next = sed->next;
1292 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1293 1.3 augustss }
1294 1.3 augustss
1295 1.3 augustss /*
1296 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1297 1.1 augustss * the host controller. This queue is the processed by software.
1298 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1299 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1300 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1301 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1302 1.1 augustss * hash value.
1303 1.1 augustss */
1304 1.1 augustss
1305 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1306 1.1 augustss /* Called at splusb() */
1307 1.1 augustss void
1308 1.1 augustss ohci_hash_add_td(sc, std)
1309 1.1 augustss ohci_softc_t *sc;
1310 1.1 augustss ohci_soft_td_t *std;
1311 1.1 augustss {
1312 1.1 augustss int h = HASH(std->physaddr);
1313 1.1 augustss
1314 1.46 augustss SPLUSBCHECK;
1315 1.46 augustss
1316 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1317 1.1 augustss }
1318 1.1 augustss
1319 1.1 augustss /* Called at splusb() */
1320 1.1 augustss void
1321 1.1 augustss ohci_hash_rem_td(sc, std)
1322 1.1 augustss ohci_softc_t *sc;
1323 1.1 augustss ohci_soft_td_t *std;
1324 1.1 augustss {
1325 1.46 augustss SPLUSBCHECK;
1326 1.46 augustss
1327 1.1 augustss LIST_REMOVE(std, hnext);
1328 1.1 augustss }
1329 1.1 augustss
1330 1.1 augustss ohci_soft_td_t *
1331 1.1 augustss ohci_hash_find_td(sc, a)
1332 1.1 augustss ohci_softc_t *sc;
1333 1.1 augustss ohci_physaddr_t a;
1334 1.1 augustss {
1335 1.1 augustss int h = HASH(a);
1336 1.1 augustss ohci_soft_td_t *std;
1337 1.1 augustss
1338 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1339 1.1 augustss std != 0;
1340 1.1 augustss std = LIST_NEXT(std, hnext))
1341 1.1 augustss if (std->physaddr == a)
1342 1.1 augustss return (std);
1343 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1344 1.1 augustss }
1345 1.1 augustss
1346 1.1 augustss void
1347 1.1 augustss ohci_timeout(addr)
1348 1.1 augustss void *addr;
1349 1.1 augustss {
1350 1.38 augustss usbd_request_handle reqh = addr;
1351 1.48 augustss int s;
1352 1.1 augustss
1353 1.1 augustss DPRINTF(("ohci_timeout: reqh=%p\n", reqh));
1354 1.45 augustss
1355 1.48 augustss s = splusb();
1356 1.45 augustss reqh->device->bus->intr_context++;
1357 1.38 augustss ohci_abort_req(reqh, USBD_TIMEOUT);
1358 1.45 augustss reqh->device->bus->intr_context--;
1359 1.48 augustss splx(s);
1360 1.1 augustss }
1361 1.1 augustss
1362 1.1 augustss #ifdef USB_DEBUG
1363 1.1 augustss void
1364 1.1 augustss ohci_dump_tds(std)
1365 1.1 augustss ohci_soft_td_t *std;
1366 1.1 augustss {
1367 1.1 augustss for (; std; std = std->nexttd)
1368 1.1 augustss ohci_dump_td(std);
1369 1.1 augustss }
1370 1.1 augustss
1371 1.1 augustss void
1372 1.1 augustss ohci_dump_td(std)
1373 1.1 augustss ohci_soft_td_t *std;
1374 1.1 augustss {
1375 1.41 augustss DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1376 1.41 augustss "nexttd=0x%08lx be=0x%08lx\n",
1377 1.41 augustss std, (u_long)std->physaddr,
1378 1.41 augustss (int)LE(std->td.td_flags),
1379 1.41 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1380 1.41 augustss OHCI_TD_GET_DI(LE(std->td.td_flags)),
1381 1.41 augustss OHCI_TD_GET_EC(LE(std->td.td_flags)),
1382 1.41 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
1383 1.41 augustss (u_long)LE(std->td.td_cbp),
1384 1.41 augustss (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be)));
1385 1.1 augustss }
1386 1.1 augustss
1387 1.1 augustss void
1388 1.1 augustss ohci_dump_ed(sed)
1389 1.1 augustss ohci_soft_ed_t *sed;
1390 1.1 augustss {
1391 1.41 augustss DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1392 1.41 augustss "headp=%b nexted=0x%08lx\n",
1393 1.41 augustss sed, (u_long)sed->physaddr,
1394 1.41 augustss OHCI_ED_GET_FA(LE(sed->ed.ed_flags)),
1395 1.41 augustss OHCI_ED_GET_EN(LE(sed->ed.ed_flags)),
1396 1.41 augustss OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)),
1397 1.41 augustss (int)LE(sed->ed.ed_flags),
1398 1.41 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1399 1.41 augustss (u_long)LE(sed->ed.ed_tailp),
1400 1.41 augustss (u_long)LE(sed->ed.ed_headp), "\20\1HALT\2CARRY",
1401 1.41 augustss (u_long)LE(sed->ed.ed_nexted)));
1402 1.1 augustss }
1403 1.1 augustss #endif
1404 1.1 augustss
1405 1.1 augustss usbd_status
1406 1.1 augustss ohci_open(pipe)
1407 1.1 augustss usbd_pipe_handle pipe;
1408 1.1 augustss {
1409 1.1 augustss usbd_device_handle dev = pipe->device;
1410 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1411 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1412 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1413 1.1 augustss u_int8_t addr = dev->address;
1414 1.1 augustss ohci_soft_ed_t *sed;
1415 1.1 augustss ohci_soft_td_t *std;
1416 1.1 augustss usbd_status r;
1417 1.1 augustss int s;
1418 1.1 augustss
1419 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1420 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1421 1.1 augustss if (addr == sc->sc_addr) {
1422 1.1 augustss switch (ed->bEndpointAddress) {
1423 1.1 augustss case USB_CONTROL_ENDPOINT:
1424 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1425 1.1 augustss break;
1426 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
1427 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1428 1.1 augustss break;
1429 1.1 augustss default:
1430 1.1 augustss return (USBD_INVAL);
1431 1.1 augustss }
1432 1.1 augustss } else {
1433 1.1 augustss sed = ohci_alloc_sed(sc);
1434 1.1 augustss if (sed == 0)
1435 1.1 augustss goto bad0;
1436 1.1 augustss std = ohci_alloc_std(sc);
1437 1.1 augustss if (std == 0)
1438 1.1 augustss goto bad1;
1439 1.1 augustss opipe->sed = sed;
1440 1.1 augustss opipe->tail = std;
1441 1.39 augustss sed->ed.ed_flags = LE(
1442 1.1 augustss OHCI_ED_SET_FA(addr) |
1443 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1444 1.1 augustss OHCI_ED_DIR_TD |
1445 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1446 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1447 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1448 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1449 1.39 augustss sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr);
1450 1.1 augustss
1451 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1452 1.1 augustss case UE_CONTROL:
1453 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1454 1.44 augustss r = usb_allocmem(&sc->sc_bus,
1455 1.4 augustss sizeof(usb_device_request_t),
1456 1.4 augustss 0, &opipe->u.ctl.reqdma);
1457 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
1458 1.1 augustss goto bad;
1459 1.1 augustss s = splusb();
1460 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1461 1.1 augustss splx(s);
1462 1.1 augustss break;
1463 1.1 augustss case UE_INTERRUPT:
1464 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1465 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1466 1.1 augustss case UE_ISOCHRONOUS:
1467 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1468 1.43 augustss return (USBD_INVAL);
1469 1.1 augustss case UE_BULK:
1470 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1471 1.3 augustss s = splusb();
1472 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1473 1.3 augustss splx(s);
1474 1.3 augustss break;
1475 1.1 augustss }
1476 1.1 augustss }
1477 1.1 augustss return (USBD_NORMAL_COMPLETION);
1478 1.1 augustss
1479 1.1 augustss bad:
1480 1.1 augustss ohci_free_std(sc, std);
1481 1.1 augustss bad1:
1482 1.1 augustss ohci_free_sed(sc, sed);
1483 1.1 augustss bad0:
1484 1.1 augustss return (USBD_NOMEM);
1485 1.1 augustss
1486 1.1 augustss }
1487 1.1 augustss
1488 1.1 augustss /*
1489 1.34 augustss * Close a reqular pipe.
1490 1.34 augustss * Assumes that there are no pending transactions.
1491 1.34 augustss */
1492 1.34 augustss void
1493 1.34 augustss ohci_close_pipe(pipe, head)
1494 1.34 augustss usbd_pipe_handle pipe;
1495 1.34 augustss ohci_soft_ed_t *head;
1496 1.34 augustss {
1497 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1498 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1499 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
1500 1.34 augustss int s;
1501 1.34 augustss
1502 1.34 augustss s = splusb();
1503 1.34 augustss #ifdef DIAGNOSTIC
1504 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
1505 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1506 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK))) {
1507 1.39 augustss ohci_physaddr_t td = sed->ed.ed_headp;
1508 1.34 augustss ohci_soft_td_t *std;
1509 1.34 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1510 1.34 augustss std != 0;
1511 1.34 augustss std = LIST_NEXT(std, hnext))
1512 1.34 augustss if (std->physaddr == td)
1513 1.34 augustss break;
1514 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1515 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
1516 1.39 augustss (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp),
1517 1.34 augustss pipe, std);
1518 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
1519 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1520 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
1521 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
1522 1.34 augustss }
1523 1.34 augustss #endif
1524 1.34 augustss ohci_rem_ed(sed, head);
1525 1.34 augustss splx(s);
1526 1.34 augustss ohci_free_std(sc, opipe->tail);
1527 1.34 augustss ohci_free_sed(sc, opipe->sed);
1528 1.34 augustss }
1529 1.34 augustss
1530 1.34 augustss /*
1531 1.34 augustss * Abort a device request.
1532 1.34 augustss * If this routine is called at splusb() it guarantees that the request
1533 1.34 augustss * will be removed from the hardware scheduling and that the callback
1534 1.34 augustss * for it will be called with USBD_CANCELLED status.
1535 1.34 augustss * It's impossible to guarantee that the requested transfer will not
1536 1.34 augustss * have happened since the hardware runs concurrently.
1537 1.34 augustss * If the transaction has already happened we rely on the ordinary
1538 1.34 augustss * interrupt processing to process it.
1539 1.34 augustss */
1540 1.34 augustss void
1541 1.38 augustss ohci_abort_req(reqh, status)
1542 1.34 augustss usbd_request_handle reqh;
1543 1.38 augustss usbd_status status;
1544 1.34 augustss {
1545 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1546 1.34 augustss ohci_soft_ed_t *sed;
1547 1.34 augustss
1548 1.38 augustss DPRINTF(("ohci_abort_req: reqh=%p pipe=%p\n", reqh, opipe));
1549 1.34 augustss
1550 1.38 augustss reqh->status = status;
1551 1.34 augustss
1552 1.38 augustss usb_untimeout(ohci_timeout, reqh, reqh->timo_handle);
1553 1.34 augustss
1554 1.34 augustss sed = opipe->sed;
1555 1.38 augustss DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed));
1556 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1557 1.34 augustss
1558 1.44 augustss if (reqh->device->bus->intr_context) {
1559 1.44 augustss /* We have no process context, so we can't use tsleep(). */
1560 1.44 augustss timeout(ohci_abort_req_end, reqh, hz / USB_FRAMES_PER_SECOND);
1561 1.44 augustss } else {
1562 1.38 augustss usb_delay_ms(opipe->pipe.device->bus, 1);
1563 1.38 augustss ohci_abort_req_end(reqh);
1564 1.38 augustss }
1565 1.38 augustss }
1566 1.38 augustss
1567 1.38 augustss void
1568 1.38 augustss ohci_abort_req_end(v)
1569 1.38 augustss void *v;
1570 1.38 augustss {
1571 1.38 augustss usbd_request_handle reqh = v;
1572 1.38 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
1573 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1574 1.38 augustss ohci_soft_ed_t *sed;
1575 1.38 augustss ohci_soft_td_t *p, *n;
1576 1.38 augustss int s;
1577 1.38 augustss
1578 1.38 augustss s = splusb();
1579 1.38 augustss
1580 1.38 augustss p = reqh->hcpriv;
1581 1.34 augustss #ifdef DIAGNOSTIC
1582 1.38 augustss if (!p) {
1583 1.38 augustss printf("ohci_abort_req: hcpriv==0\n");
1584 1.38 augustss return;
1585 1.38 augustss }
1586 1.34 augustss #endif
1587 1.38 augustss for (; p->reqh == reqh; p = n) {
1588 1.38 augustss n = p->nexttd;
1589 1.38 augustss ohci_hash_rem_td(sc, p);
1590 1.38 augustss ohci_free_std(sc, p);
1591 1.34 augustss }
1592 1.34 augustss
1593 1.38 augustss sed = opipe->sed;
1594 1.38 augustss DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n",
1595 1.39 augustss (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp)));
1596 1.39 augustss sed->ed.ed_headp = p->physaddr; /* unlink TDs */
1597 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1598 1.38 augustss
1599 1.38 augustss usb_transfer_complete(reqh);
1600 1.38 augustss
1601 1.34 augustss splx(s);
1602 1.34 augustss }
1603 1.34 augustss
1604 1.34 augustss /*
1605 1.1 augustss * Data structures and routines to emulate the root hub.
1606 1.1 augustss */
1607 1.1 augustss usb_device_descriptor_t ohci_devd = {
1608 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1609 1.1 augustss UDESC_DEVICE, /* type */
1610 1.1 augustss {0x00, 0x01}, /* USB version */
1611 1.1 augustss UCLASS_HUB, /* class */
1612 1.1 augustss USUBCLASS_HUB, /* subclass */
1613 1.1 augustss 0, /* protocol */
1614 1.1 augustss 64, /* max packet */
1615 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1616 1.1 augustss 1,2,0, /* string indicies */
1617 1.1 augustss 1 /* # of configurations */
1618 1.1 augustss };
1619 1.1 augustss
1620 1.1 augustss usb_config_descriptor_t ohci_confd = {
1621 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1622 1.1 augustss UDESC_CONFIG,
1623 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1624 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1625 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1626 1.1 augustss 1,
1627 1.1 augustss 1,
1628 1.1 augustss 0,
1629 1.1 augustss UC_SELF_POWERED,
1630 1.1 augustss 0 /* max power */
1631 1.1 augustss };
1632 1.1 augustss
1633 1.1 augustss usb_interface_descriptor_t ohci_ifcd = {
1634 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1635 1.1 augustss UDESC_INTERFACE,
1636 1.1 augustss 0,
1637 1.1 augustss 0,
1638 1.1 augustss 1,
1639 1.1 augustss UCLASS_HUB,
1640 1.1 augustss USUBCLASS_HUB,
1641 1.1 augustss 0,
1642 1.1 augustss 0
1643 1.1 augustss };
1644 1.1 augustss
1645 1.1 augustss usb_endpoint_descriptor_t ohci_endpd = {
1646 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1647 1.1 augustss UDESC_ENDPOINT,
1648 1.40 augustss UE_DIR_IN | OHCI_INTR_ENDPT,
1649 1.1 augustss UE_INTERRUPT,
1650 1.1 augustss {8, 0}, /* max packet */
1651 1.1 augustss 255
1652 1.1 augustss };
1653 1.1 augustss
1654 1.1 augustss usb_hub_descriptor_t ohci_hubd = {
1655 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1656 1.1 augustss UDESC_HUB,
1657 1.1 augustss 0,
1658 1.1 augustss {0,0},
1659 1.1 augustss 0,
1660 1.1 augustss 0,
1661 1.1 augustss {0},
1662 1.1 augustss };
1663 1.1 augustss
1664 1.1 augustss int
1665 1.1 augustss ohci_str(p, l, s)
1666 1.1 augustss usb_string_descriptor_t *p;
1667 1.1 augustss int l;
1668 1.1 augustss char *s;
1669 1.1 augustss {
1670 1.1 augustss int i;
1671 1.1 augustss
1672 1.1 augustss if (l == 0)
1673 1.1 augustss return (0);
1674 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1675 1.1 augustss if (l == 1)
1676 1.1 augustss return (1);
1677 1.1 augustss p->bDescriptorType = UDESC_STRING;
1678 1.1 augustss l -= 2;
1679 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1680 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1681 1.1 augustss return (2*i+2);
1682 1.1 augustss }
1683 1.1 augustss
1684 1.1 augustss /*
1685 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1686 1.1 augustss */
1687 1.1 augustss usbd_status
1688 1.1 augustss ohci_root_ctrl_transfer(reqh)
1689 1.1 augustss usbd_request_handle reqh;
1690 1.1 augustss {
1691 1.17 augustss usbd_status r;
1692 1.17 augustss
1693 1.46 augustss /* Insert last in queue. */
1694 1.17 augustss r = usb_insert_transfer(reqh);
1695 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
1696 1.17 augustss return (r);
1697 1.46 augustss
1698 1.46 augustss /* Pipe isn't running, start first */
1699 1.46 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
1700 1.17 augustss }
1701 1.17 augustss
1702 1.17 augustss usbd_status
1703 1.17 augustss ohci_root_ctrl_start(reqh)
1704 1.17 augustss usbd_request_handle reqh;
1705 1.17 augustss {
1706 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
1707 1.1 augustss usb_device_request_t *req;
1708 1.1 augustss void *buf;
1709 1.1 augustss int port, i;
1710 1.46 augustss int s, len, value, index, l, totlen = 0;
1711 1.1 augustss usb_port_status_t ps;
1712 1.1 augustss usb_hub_descriptor_t hubd;
1713 1.1 augustss usbd_status r;
1714 1.1 augustss u_int32_t v;
1715 1.1 augustss
1716 1.42 augustss #ifdef DIAGNOSTIC
1717 1.42 augustss if (!(reqh->rqflags & URQ_REQUEST))
1718 1.1 augustss /* XXX panic */
1719 1.1 augustss return (USBD_INVAL);
1720 1.42 augustss #endif
1721 1.1 augustss req = &reqh->request;
1722 1.1 augustss
1723 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1724 1.1 augustss req->bmRequestType, req->bRequest));
1725 1.1 augustss
1726 1.1 augustss len = UGETW(req->wLength);
1727 1.1 augustss value = UGETW(req->wValue);
1728 1.1 augustss index = UGETW(req->wIndex);
1729 1.43 augustss
1730 1.43 augustss if (len != 0)
1731 1.43 augustss buf = KERNADDR(&reqh->dmabuf);
1732 1.43 augustss #ifdef DIAGNOSTIC
1733 1.43 augustss else
1734 1.43 augustss buf = 0;
1735 1.43 augustss #endif
1736 1.43 augustss
1737 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1738 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1739 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1740 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1741 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1742 1.1 augustss /*
1743 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1744 1.1 augustss * for the integrated root hub.
1745 1.1 augustss */
1746 1.1 augustss break;
1747 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1748 1.1 augustss if (len > 0) {
1749 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1750 1.1 augustss totlen = 1;
1751 1.1 augustss }
1752 1.1 augustss break;
1753 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1754 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1755 1.1 augustss switch(value >> 8) {
1756 1.1 augustss case UDESC_DEVICE:
1757 1.1 augustss if ((value & 0xff) != 0) {
1758 1.1 augustss r = USBD_IOERROR;
1759 1.1 augustss goto ret;
1760 1.1 augustss }
1761 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1762 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1763 1.1 augustss memcpy(buf, &ohci_devd, l);
1764 1.1 augustss break;
1765 1.1 augustss case UDESC_CONFIG:
1766 1.1 augustss if ((value & 0xff) != 0) {
1767 1.1 augustss r = USBD_IOERROR;
1768 1.1 augustss goto ret;
1769 1.1 augustss }
1770 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1771 1.1 augustss memcpy(buf, &ohci_confd, l);
1772 1.1 augustss buf = (char *)buf + l;
1773 1.1 augustss len -= l;
1774 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1775 1.1 augustss totlen += l;
1776 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1777 1.1 augustss buf = (char *)buf + l;
1778 1.1 augustss len -= l;
1779 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1780 1.1 augustss totlen += l;
1781 1.1 augustss memcpy(buf, &ohci_endpd, l);
1782 1.1 augustss break;
1783 1.1 augustss case UDESC_STRING:
1784 1.1 augustss if (len == 0)
1785 1.1 augustss break;
1786 1.1 augustss *(u_int8_t *)buf = 0;
1787 1.1 augustss totlen = 1;
1788 1.1 augustss switch (value & 0xff) {
1789 1.1 augustss case 1: /* Vendor */
1790 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1791 1.1 augustss break;
1792 1.1 augustss case 2: /* Product */
1793 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1794 1.1 augustss break;
1795 1.1 augustss }
1796 1.1 augustss break;
1797 1.1 augustss default:
1798 1.1 augustss r = USBD_IOERROR;
1799 1.1 augustss goto ret;
1800 1.1 augustss }
1801 1.1 augustss break;
1802 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1803 1.1 augustss if (len > 0) {
1804 1.1 augustss *(u_int8_t *)buf = 0;
1805 1.1 augustss totlen = 1;
1806 1.1 augustss }
1807 1.1 augustss break;
1808 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1809 1.1 augustss if (len > 1) {
1810 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1811 1.1 augustss totlen = 2;
1812 1.1 augustss }
1813 1.1 augustss break;
1814 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1815 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1816 1.1 augustss if (len > 1) {
1817 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1818 1.1 augustss totlen = 2;
1819 1.1 augustss }
1820 1.1 augustss break;
1821 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1822 1.1 augustss if (value >= USB_MAX_DEVICES) {
1823 1.1 augustss r = USBD_IOERROR;
1824 1.1 augustss goto ret;
1825 1.1 augustss }
1826 1.1 augustss sc->sc_addr = value;
1827 1.1 augustss break;
1828 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1829 1.1 augustss if (value != 0 && value != 1) {
1830 1.1 augustss r = USBD_IOERROR;
1831 1.1 augustss goto ret;
1832 1.1 augustss }
1833 1.1 augustss sc->sc_conf = value;
1834 1.1 augustss break;
1835 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1836 1.1 augustss break;
1837 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1838 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1839 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1840 1.1 augustss r = USBD_IOERROR;
1841 1.1 augustss goto ret;
1842 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1843 1.1 augustss break;
1844 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1845 1.1 augustss break;
1846 1.1 augustss /* Hub requests */
1847 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1848 1.1 augustss break;
1849 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1850 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1851 1.14 augustss "port=%d feature=%d\n",
1852 1.1 augustss index, value));
1853 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1854 1.1 augustss r = USBD_IOERROR;
1855 1.1 augustss goto ret;
1856 1.1 augustss }
1857 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1858 1.1 augustss switch(value) {
1859 1.1 augustss case UHF_PORT_ENABLE:
1860 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1861 1.1 augustss break;
1862 1.1 augustss case UHF_PORT_SUSPEND:
1863 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1864 1.1 augustss break;
1865 1.1 augustss case UHF_PORT_POWER:
1866 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1867 1.1 augustss break;
1868 1.1 augustss case UHF_C_PORT_CONNECTION:
1869 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1870 1.1 augustss break;
1871 1.1 augustss case UHF_C_PORT_ENABLE:
1872 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1873 1.1 augustss break;
1874 1.1 augustss case UHF_C_PORT_SUSPEND:
1875 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1876 1.1 augustss break;
1877 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1878 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1879 1.1 augustss break;
1880 1.1 augustss case UHF_C_PORT_RESET:
1881 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1882 1.1 augustss break;
1883 1.1 augustss default:
1884 1.1 augustss r = USBD_IOERROR;
1885 1.1 augustss goto ret;
1886 1.1 augustss }
1887 1.1 augustss switch(value) {
1888 1.1 augustss case UHF_C_PORT_CONNECTION:
1889 1.1 augustss case UHF_C_PORT_ENABLE:
1890 1.1 augustss case UHF_C_PORT_SUSPEND:
1891 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1892 1.1 augustss case UHF_C_PORT_RESET:
1893 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1894 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1895 1.1 augustss ohci_rhsc_able(sc, 1);
1896 1.1 augustss break;
1897 1.1 augustss default:
1898 1.1 augustss break;
1899 1.1 augustss }
1900 1.1 augustss break;
1901 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1902 1.1 augustss if (value != 0) {
1903 1.1 augustss r = USBD_IOERROR;
1904 1.1 augustss goto ret;
1905 1.1 augustss }
1906 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1907 1.1 augustss hubd = ohci_hubd;
1908 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1909 1.15 augustss USETW(hubd.wHubCharacteristics,
1910 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1911 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1912 1.1 augustss /* XXX overcurrent */
1913 1.1 augustss );
1914 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1915 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1916 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1917 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
1918 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1919 1.1 augustss l = min(len, hubd.bDescLength);
1920 1.1 augustss totlen = l;
1921 1.1 augustss memcpy(buf, &hubd, l);
1922 1.1 augustss break;
1923 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1924 1.1 augustss if (len != 4) {
1925 1.1 augustss r = USBD_IOERROR;
1926 1.1 augustss goto ret;
1927 1.1 augustss }
1928 1.1 augustss memset(buf, 0, len); /* ? XXX */
1929 1.1 augustss totlen = len;
1930 1.1 augustss break;
1931 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1932 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1933 1.1 augustss index));
1934 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1935 1.1 augustss r = USBD_IOERROR;
1936 1.1 augustss goto ret;
1937 1.1 augustss }
1938 1.1 augustss if (len != 4) {
1939 1.1 augustss r = USBD_IOERROR;
1940 1.1 augustss goto ret;
1941 1.1 augustss }
1942 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1943 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1944 1.1 augustss v));
1945 1.1 augustss USETW(ps.wPortStatus, v);
1946 1.1 augustss USETW(ps.wPortChange, v >> 16);
1947 1.1 augustss l = min(len, sizeof ps);
1948 1.1 augustss memcpy(buf, &ps, l);
1949 1.1 augustss totlen = l;
1950 1.1 augustss break;
1951 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1952 1.1 augustss r = USBD_IOERROR;
1953 1.1 augustss goto ret;
1954 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1955 1.1 augustss break;
1956 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1957 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1958 1.1 augustss r = USBD_IOERROR;
1959 1.1 augustss goto ret;
1960 1.1 augustss }
1961 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1962 1.1 augustss switch(value) {
1963 1.1 augustss case UHF_PORT_ENABLE:
1964 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
1965 1.1 augustss break;
1966 1.1 augustss case UHF_PORT_SUSPEND:
1967 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
1968 1.1 augustss break;
1969 1.1 augustss case UHF_PORT_RESET:
1970 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
1971 1.14 augustss index));
1972 1.1 augustss OWRITE4(sc, port, UPS_RESET);
1973 1.1 augustss for (i = 0; i < 10; i++) {
1974 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
1975 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
1976 1.1 augustss break;
1977 1.1 augustss }
1978 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
1979 1.1 augustss index, OREAD4(sc, port)));
1980 1.1 augustss break;
1981 1.1 augustss case UHF_PORT_POWER:
1982 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
1983 1.14 augustss "%d\n", index));
1984 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
1985 1.1 augustss break;
1986 1.1 augustss default:
1987 1.1 augustss r = USBD_IOERROR;
1988 1.1 augustss goto ret;
1989 1.1 augustss }
1990 1.1 augustss break;
1991 1.1 augustss default:
1992 1.1 augustss r = USBD_IOERROR;
1993 1.1 augustss goto ret;
1994 1.1 augustss }
1995 1.1 augustss reqh->actlen = totlen;
1996 1.1 augustss r = USBD_NORMAL_COMPLETION;
1997 1.1 augustss ret:
1998 1.1 augustss reqh->status = r;
1999 1.46 augustss s = splusb();
2000 1.38 augustss usb_transfer_complete(reqh);
2001 1.46 augustss splx(s);
2002 1.1 augustss return (USBD_IN_PROGRESS);
2003 1.1 augustss }
2004 1.1 augustss
2005 1.1 augustss /* Abort a root control request. */
2006 1.1 augustss void
2007 1.1 augustss ohci_root_ctrl_abort(reqh)
2008 1.1 augustss usbd_request_handle reqh;
2009 1.1 augustss {
2010 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2011 1.1 augustss }
2012 1.1 augustss
2013 1.1 augustss /* Close the root pipe. */
2014 1.1 augustss void
2015 1.1 augustss ohci_root_ctrl_close(pipe)
2016 1.1 augustss usbd_pipe_handle pipe;
2017 1.1 augustss {
2018 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2019 1.34 augustss /* Nothing to do. */
2020 1.1 augustss }
2021 1.1 augustss
2022 1.1 augustss usbd_status
2023 1.1 augustss ohci_root_intr_transfer(reqh)
2024 1.1 augustss usbd_request_handle reqh;
2025 1.1 augustss {
2026 1.17 augustss usbd_status r;
2027 1.17 augustss
2028 1.46 augustss /* Insert last in queue. */
2029 1.17 augustss r = usb_insert_transfer(reqh);
2030 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2031 1.17 augustss return (r);
2032 1.46 augustss
2033 1.46 augustss /* Pipe isn't running, start first */
2034 1.46 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2035 1.17 augustss }
2036 1.17 augustss
2037 1.17 augustss usbd_status
2038 1.17 augustss ohci_root_intr_start(reqh)
2039 1.17 augustss usbd_request_handle reqh;
2040 1.17 augustss {
2041 1.1 augustss usbd_pipe_handle pipe = reqh->pipe;
2042 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2043 1.1 augustss
2044 1.1 augustss sc->sc_intrreqh = reqh;
2045 1.1 augustss
2046 1.1 augustss return (USBD_IN_PROGRESS);
2047 1.1 augustss }
2048 1.1 augustss
2049 1.3 augustss /* Abort a root interrupt request. */
2050 1.1 augustss void
2051 1.1 augustss ohci_root_intr_abort(reqh)
2052 1.1 augustss usbd_request_handle reqh;
2053 1.1 augustss {
2054 1.3 augustss /* No need to abort. */
2055 1.1 augustss }
2056 1.1 augustss
2057 1.1 augustss /* Close the root pipe. */
2058 1.1 augustss void
2059 1.1 augustss ohci_root_intr_close(pipe)
2060 1.1 augustss usbd_pipe_handle pipe;
2061 1.1 augustss {
2062 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2063 1.1 augustss
2064 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2065 1.34 augustss
2066 1.34 augustss sc->sc_intrreqh = 0;
2067 1.1 augustss }
2068 1.1 augustss
2069 1.1 augustss /************************/
2070 1.1 augustss
2071 1.1 augustss usbd_status
2072 1.1 augustss ohci_device_ctrl_transfer(reqh)
2073 1.1 augustss usbd_request_handle reqh;
2074 1.1 augustss {
2075 1.17 augustss usbd_status r;
2076 1.17 augustss
2077 1.46 augustss /* Insert last in queue. */
2078 1.17 augustss r = usb_insert_transfer(reqh);
2079 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2080 1.17 augustss return (r);
2081 1.46 augustss
2082 1.46 augustss /* Pipe isn't running, start first */
2083 1.46 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2084 1.17 augustss }
2085 1.17 augustss
2086 1.17 augustss usbd_status
2087 1.17 augustss ohci_device_ctrl_start(reqh)
2088 1.17 augustss usbd_request_handle reqh;
2089 1.17 augustss {
2090 1.6 augustss ohci_softc_t *sc = (ohci_softc_t *)reqh->pipe->device->bus;
2091 1.1 augustss usbd_status r;
2092 1.1 augustss
2093 1.42 augustss #ifdef DIAGNOSTIC
2094 1.42 augustss if (!(reqh->rqflags & URQ_REQUEST)) {
2095 1.1 augustss /* XXX panic */
2096 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2097 1.1 augustss return (USBD_INVAL);
2098 1.1 augustss }
2099 1.42 augustss #endif
2100 1.1 augustss
2101 1.1 augustss r = ohci_device_request(reqh);
2102 1.1 augustss if (r != USBD_NORMAL_COMPLETION)
2103 1.1 augustss return (r);
2104 1.1 augustss
2105 1.6 augustss if (sc->sc_bus.use_polling)
2106 1.6 augustss ohci_waitintr(sc, reqh);
2107 1.1 augustss return (USBD_IN_PROGRESS);
2108 1.1 augustss }
2109 1.1 augustss
2110 1.1 augustss /* Abort a device control request. */
2111 1.1 augustss void
2112 1.1 augustss ohci_device_ctrl_abort(reqh)
2113 1.1 augustss usbd_request_handle reqh;
2114 1.1 augustss {
2115 1.34 augustss DPRINTF(("ohci_device_ctrl_abort: reqh=%p\n", reqh));
2116 1.38 augustss ohci_abort_req(reqh, USBD_CANCELLED);
2117 1.1 augustss }
2118 1.1 augustss
2119 1.1 augustss /* Close a device control pipe. */
2120 1.1 augustss void
2121 1.1 augustss ohci_device_ctrl_close(pipe)
2122 1.1 augustss usbd_pipe_handle pipe;
2123 1.1 augustss {
2124 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2125 1.1 augustss
2126 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2127 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2128 1.3 augustss }
2129 1.3 augustss
2130 1.3 augustss /************************/
2131 1.37 augustss
2132 1.37 augustss void
2133 1.37 augustss ohci_device_clear_toggle(pipe)
2134 1.37 augustss usbd_pipe_handle pipe;
2135 1.37 augustss {
2136 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2137 1.37 augustss
2138 1.39 augustss opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY);
2139 1.37 augustss }
2140 1.37 augustss
2141 1.37 augustss void
2142 1.37 augustss ohci_noop(pipe)
2143 1.37 augustss usbd_pipe_handle pipe;
2144 1.37 augustss {
2145 1.37 augustss }
2146 1.3 augustss
2147 1.3 augustss usbd_status
2148 1.3 augustss ohci_device_bulk_transfer(reqh)
2149 1.3 augustss usbd_request_handle reqh;
2150 1.3 augustss {
2151 1.17 augustss usbd_status r;
2152 1.17 augustss
2153 1.46 augustss /* Insert last in queue. */
2154 1.17 augustss r = usb_insert_transfer(reqh);
2155 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2156 1.17 augustss return (r);
2157 1.46 augustss
2158 1.46 augustss /* Pipe isn't running, start first */
2159 1.46 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2160 1.17 augustss }
2161 1.17 augustss
2162 1.17 augustss usbd_status
2163 1.17 augustss ohci_device_bulk_start(reqh)
2164 1.17 augustss usbd_request_handle reqh;
2165 1.17 augustss {
2166 1.3 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2167 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2168 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2169 1.3 augustss int addr = dev->address;
2170 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2171 1.3 augustss ohci_soft_ed_t *sed;
2172 1.40 augustss int s, len, isread, endpt;
2173 1.48 augustss usbd_status r;
2174 1.3 augustss
2175 1.34 augustss #ifdef DIAGNOSTIC
2176 1.42 augustss if (reqh->rqflags & URQ_REQUEST) {
2177 1.3 augustss /* XXX panic */
2178 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2179 1.3 augustss return (USBD_INVAL);
2180 1.3 augustss }
2181 1.34 augustss #endif
2182 1.3 augustss
2183 1.3 augustss len = reqh->length;
2184 1.40 augustss endpt = reqh->pipe->endpoint->edesc->bEndpointAddress;
2185 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2186 1.3 augustss sed = opipe->sed;
2187 1.3 augustss
2188 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: reqh=%p len=%d isread=%d "
2189 1.34 augustss "flags=%d endpt=%d\n", reqh, len, isread, reqh->flags,
2190 1.40 augustss endpt));
2191 1.34 augustss
2192 1.32 augustss opipe->u.bulk.isread = isread;
2193 1.3 augustss opipe->u.bulk.length = len;
2194 1.3 augustss
2195 1.3 augustss /* Update device address */
2196 1.39 augustss sed->ed.ed_flags = LE(
2197 1.39 augustss (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2198 1.16 augustss OHCI_ED_SET_FA(addr));
2199 1.3 augustss
2200 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2201 1.48 augustss data = opipe->tail;
2202 1.48 augustss r = ohci_alloc_std_chain(opipe, sc, len, isread,
2203 1.48 augustss reqh->flags & USBD_SHORT_XFER_OK,
2204 1.48 augustss &reqh->dmabuf, data, &tail);
2205 1.48 augustss if (r != USBD_NORMAL_COMPLETION)
2206 1.48 augustss return (r);
2207 1.48 augustss
2208 1.48 augustss tail->reqh = 0;
2209 1.48 augustss reqh->hcpriv = data;
2210 1.3 augustss
2211 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2212 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2213 1.48 augustss (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags),
2214 1.48 augustss (int)LE(data->td.td_cbp), (int)LE(data->td.td_be)));
2215 1.34 augustss
2216 1.34 augustss #ifdef USB_DEBUG
2217 1.34 augustss if (ohcidebug > 4) {
2218 1.34 augustss ohci_dump_ed(sed);
2219 1.48 augustss ohci_dump_tds(data);
2220 1.34 augustss }
2221 1.34 augustss #endif
2222 1.34 augustss
2223 1.3 augustss /* Insert ED in schedule */
2224 1.3 augustss s = splusb();
2225 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2226 1.48 augustss tdp->reqh = reqh;
2227 1.48 augustss ohci_hash_add_td(sc, tdp);
2228 1.48 augustss }
2229 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2230 1.3 augustss opipe->tail = tail;
2231 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2232 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2233 1.15 augustss if (reqh->timeout && !sc->sc_bus.use_polling) {
2234 1.15 augustss usb_timeout(ohci_timeout, reqh,
2235 1.15 augustss MS_TO_TICKS(reqh->timeout), reqh->timo_handle);
2236 1.15 augustss }
2237 1.34 augustss
2238 1.34 augustss #ifdef USB_DEBUG
2239 1.34 augustss if (ohcidebug > 5) {
2240 1.34 augustss delay(5000);
2241 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2242 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2243 1.34 augustss ohci_dump_ed(sed);
2244 1.48 augustss ohci_dump_tds(data);
2245 1.34 augustss }
2246 1.34 augustss #endif
2247 1.34 augustss
2248 1.3 augustss splx(s);
2249 1.3 augustss
2250 1.3 augustss return (USBD_IN_PROGRESS);
2251 1.3 augustss }
2252 1.3 augustss
2253 1.3 augustss void
2254 1.3 augustss ohci_device_bulk_abort(reqh)
2255 1.3 augustss usbd_request_handle reqh;
2256 1.3 augustss {
2257 1.34 augustss DPRINTF(("ohci_device_bulk_abort: reqh=%p\n", reqh));
2258 1.38 augustss ohci_abort_req(reqh, USBD_CANCELLED);
2259 1.3 augustss }
2260 1.3 augustss
2261 1.34 augustss /*
2262 1.34 augustss * Close a device bulk pipe.
2263 1.34 augustss */
2264 1.3 augustss void
2265 1.3 augustss ohci_device_bulk_close(pipe)
2266 1.3 augustss usbd_pipe_handle pipe;
2267 1.3 augustss {
2268 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2269 1.3 augustss
2270 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2271 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2272 1.1 augustss }
2273 1.1 augustss
2274 1.1 augustss /************************/
2275 1.1 augustss
2276 1.1 augustss usbd_status
2277 1.1 augustss ohci_device_intr_transfer(reqh)
2278 1.17 augustss usbd_request_handle reqh;
2279 1.17 augustss {
2280 1.17 augustss usbd_status r;
2281 1.17 augustss
2282 1.46 augustss /* Insert last in queue. */
2283 1.17 augustss r = usb_insert_transfer(reqh);
2284 1.17 augustss if (r != USBD_NORMAL_COMPLETION)
2285 1.17 augustss return (r);
2286 1.46 augustss
2287 1.46 augustss /* Pipe isn't running, start first */
2288 1.46 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&reqh->pipe->queue)));
2289 1.17 augustss }
2290 1.17 augustss
2291 1.17 augustss usbd_status
2292 1.17 augustss ohci_device_intr_start(reqh)
2293 1.1 augustss usbd_request_handle reqh;
2294 1.1 augustss {
2295 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)reqh->pipe;
2296 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2297 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2298 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2299 1.48 augustss ohci_soft_td_t *data, *tail;
2300 1.1 augustss int len;
2301 1.1 augustss int s;
2302 1.1 augustss
2303 1.43 augustss DPRINTFN(3, ("ohci_device_intr_transfer: reqh=%p len=%d "
2304 1.14 augustss "flags=%d priv=%p\n",
2305 1.43 augustss reqh, reqh->length, reqh->flags, reqh->priv));
2306 1.1 augustss
2307 1.42 augustss #ifdef DIAGNOSTIC
2308 1.42 augustss if (reqh->rqflags & URQ_REQUEST)
2309 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2310 1.42 augustss #endif
2311 1.1 augustss
2312 1.1 augustss len = reqh->length;
2313 1.1 augustss
2314 1.48 augustss data = opipe->tail;
2315 1.1 augustss tail = ohci_alloc_std(sc);
2316 1.43 augustss if (!tail)
2317 1.43 augustss return (USBD_NOMEM);
2318 1.1 augustss tail->reqh = 0;
2319 1.1 augustss
2320 1.48 augustss data->td.td_flags = LE(
2321 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2322 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2323 1.19 augustss if (reqh->flags & USBD_SHORT_XFER_OK)
2324 1.48 augustss data->td.td_flags |= LE(OHCI_TD_R);
2325 1.48 augustss data->td.td_cbp = LE(DMAADDR(&reqh->dmabuf));
2326 1.48 augustss data->nexttd = tail;
2327 1.48 augustss data->td.td_nexttd = LE(tail->physaddr);
2328 1.48 augustss data->td.td_be = LE(LE(data->td.td_cbp) + len - 1);
2329 1.48 augustss data->len = len;
2330 1.48 augustss data->reqh = reqh;
2331 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2332 1.48 augustss reqh->hcpriv = data;
2333 1.1 augustss
2334 1.1 augustss #if USB_DEBUG
2335 1.1 augustss if (ohcidebug > 5) {
2336 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2337 1.1 augustss ohci_dump_ed(sed);
2338 1.48 augustss ohci_dump_tds(data);
2339 1.1 augustss }
2340 1.1 augustss #endif
2341 1.1 augustss
2342 1.1 augustss /* Insert ED in schedule */
2343 1.1 augustss s = splusb();
2344 1.48 augustss ohci_hash_add_td(sc, data);
2345 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2346 1.1 augustss opipe->tail = tail;
2347 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2348 1.1 augustss
2349 1.1 augustss #ifdef USB_DEBUG
2350 1.1 augustss if (ohcidebug > 5) {
2351 1.1 augustss delay(5000);
2352 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2353 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2354 1.1 augustss ohci_dump_ed(sed);
2355 1.48 augustss ohci_dump_tds(data);
2356 1.1 augustss }
2357 1.1 augustss #endif
2358 1.26 augustss splx(s);
2359 1.1 augustss
2360 1.1 augustss return (USBD_IN_PROGRESS);
2361 1.1 augustss }
2362 1.1 augustss
2363 1.1 augustss /* Abort a device control request. */
2364 1.1 augustss void
2365 1.1 augustss ohci_device_intr_abort(reqh)
2366 1.1 augustss usbd_request_handle reqh;
2367 1.1 augustss {
2368 1.34 augustss if (reqh->pipe->intrreqh == reqh) {
2369 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2370 1.34 augustss reqh->pipe->intrreqh = 0;
2371 1.1 augustss }
2372 1.38 augustss ohci_abort_req(reqh, USBD_CANCELLED);
2373 1.1 augustss }
2374 1.1 augustss
2375 1.1 augustss /* Close a device interrupt pipe. */
2376 1.1 augustss void
2377 1.1 augustss ohci_device_intr_close(pipe)
2378 1.1 augustss usbd_pipe_handle pipe;
2379 1.1 augustss {
2380 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2381 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2382 1.1 augustss int nslots = opipe->u.intr.nslots;
2383 1.1 augustss int pos = opipe->u.intr.pos;
2384 1.1 augustss int j;
2385 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2386 1.1 augustss int s;
2387 1.1 augustss
2388 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2389 1.1 augustss pipe, nslots, pos));
2390 1.1 augustss s = splusb();
2391 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
2392 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
2393 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
2394 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2395 1.1 augustss
2396 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2397 1.1 augustss ;
2398 1.1 augustss if (!p)
2399 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2400 1.1 augustss p->next = sed->next;
2401 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
2402 1.1 augustss splx(s);
2403 1.1 augustss
2404 1.1 augustss for (j = 0; j < nslots; j++)
2405 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2406 1.1 augustss
2407 1.1 augustss ohci_free_std(sc, opipe->tail);
2408 1.1 augustss ohci_free_sed(sc, opipe->sed);
2409 1.1 augustss }
2410 1.1 augustss
2411 1.1 augustss usbd_status
2412 1.1 augustss ohci_device_setintr(sc, opipe, ival)
2413 1.1 augustss ohci_softc_t *sc;
2414 1.1 augustss struct ohci_pipe *opipe;
2415 1.1 augustss int ival;
2416 1.1 augustss {
2417 1.1 augustss int i, j, s, best;
2418 1.1 augustss u_int npoll, slow, shigh, nslots;
2419 1.1 augustss u_int bestbw, bw;
2420 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2421 1.1 augustss
2422 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2423 1.1 augustss if (ival == 0) {
2424 1.1 augustss printf("ohci_setintr: 0 interval\n");
2425 1.1 augustss return (USBD_INVAL);
2426 1.1 augustss }
2427 1.1 augustss
2428 1.1 augustss npoll = OHCI_NO_INTRS;
2429 1.1 augustss while (npoll > ival)
2430 1.1 augustss npoll /= 2;
2431 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2432 1.1 augustss
2433 1.1 augustss /*
2434 1.1 augustss * We now know which level in the tree the ED must go into.
2435 1.1 augustss * Figure out which slot has most bandwidth left over.
2436 1.1 augustss * Slots to examine:
2437 1.1 augustss * npoll
2438 1.1 augustss * 1 0
2439 1.1 augustss * 2 1 2
2440 1.1 augustss * 4 3 4 5 6
2441 1.1 augustss * 8 7 8 9 10 11 12 13 14
2442 1.1 augustss * N (N-1) .. (N-1+N-1)
2443 1.1 augustss */
2444 1.1 augustss slow = npoll-1;
2445 1.1 augustss shigh = slow + npoll;
2446 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2447 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2448 1.1 augustss bw = 0;
2449 1.1 augustss for (j = 0; j < nslots; j++)
2450 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2451 1.1 augustss if (bw < bestbw) {
2452 1.1 augustss best = i;
2453 1.1 augustss bestbw = bw;
2454 1.1 augustss }
2455 1.1 augustss }
2456 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2457 1.1 augustss best, slow, shigh, bestbw));
2458 1.1 augustss
2459 1.1 augustss s = splusb();
2460 1.1 augustss hsed = sc->sc_eds[best];
2461 1.1 augustss sed->next = hsed->next;
2462 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
2463 1.1 augustss hsed->next = sed;
2464 1.39 augustss hsed->ed.ed_nexted = LE(sed->physaddr);
2465 1.1 augustss splx(s);
2466 1.1 augustss
2467 1.1 augustss for (j = 0; j < nslots; j++)
2468 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2469 1.1 augustss opipe->u.intr.nslots = nslots;
2470 1.1 augustss opipe->u.intr.pos = best;
2471 1.1 augustss
2472 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2473 1.1 augustss return (USBD_NORMAL_COMPLETION);
2474 1.1 augustss }
2475 1.1 augustss
2476