ohci.c revision 1.49.2.1 1 1.49.2.1 wrstuden /* $NetBSD: ohci.c,v 1.49.2.1 1999/12/27 18:35:40 wrstuden Exp $ */
2 1.49.2.1 wrstuden /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Open Host Controller driver.
43 1.1 augustss *
44 1.30 augustss * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
45 1.30 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
46 1.1 augustss */
47 1.1 augustss
48 1.1 augustss #include <sys/param.h>
49 1.1 augustss #include <sys/systm.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
52 1.49.2.1 wrstuden #include <sys/kernel.h>
53 1.1 augustss #include <sys/device.h>
54 1.49.2.1 wrstuden #include <sys/select.h>
55 1.15 augustss #elif defined(__FreeBSD__)
56 1.15 augustss #include <sys/module.h>
57 1.15 augustss #include <sys/bus.h>
58 1.49.2.1 wrstuden #include <machine/bus_pio.h>
59 1.49.2.1 wrstuden #include <machine/bus_memio.h>
60 1.49.2.1 wrstuden #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
61 1.49.2.1 wrstuden #include <machine/cpu.h>
62 1.49.2.1 wrstuden #endif
63 1.15 augustss #endif
64 1.1 augustss #include <sys/proc.h>
65 1.1 augustss #include <sys/queue.h>
66 1.1 augustss
67 1.4 augustss #include <machine/bus.h>
68 1.16 augustss #include <machine/endian.h>
69 1.4 augustss
70 1.1 augustss #include <dev/usb/usb.h>
71 1.1 augustss #include <dev/usb/usbdi.h>
72 1.1 augustss #include <dev/usb/usbdivar.h>
73 1.38 augustss #include <dev/usb/usb_mem.h>
74 1.1 augustss #include <dev/usb/usb_quirks.h>
75 1.1 augustss
76 1.1 augustss #include <dev/usb/ohcireg.h>
77 1.1 augustss #include <dev/usb/ohcivar.h>
78 1.1 augustss
79 1.15 augustss #if defined(__FreeBSD__)
80 1.15 augustss #include <machine/clock.h>
81 1.15 augustss
82 1.15 augustss #define delay(d) DELAY(d)
83 1.15 augustss #endif
84 1.1 augustss
85 1.36 augustss #if defined(__OpenBSD__)
86 1.36 augustss struct cfdriver ohci_cd = {
87 1.36 augustss NULL, "ohci", DV_DULL
88 1.36 augustss };
89 1.36 augustss #endif
90 1.36 augustss
91 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
92 1.49.2.1 wrstuden #define DPRINTF(x) if (ohcidebug) logprintf x
93 1.49.2.1 wrstuden #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
94 1.49.2.1 wrstuden int ohcidebug = 0;
95 1.49.2.1 wrstuden #else
96 1.49.2.1 wrstuden #define DPRINTF(x)
97 1.49.2.1 wrstuden #define DPRINTFN(n,x)
98 1.49.2.1 wrstuden #endif
99 1.49.2.1 wrstuden
100 1.16 augustss /*
101 1.16 augustss * The OHCI controller is little endian, so on big endian machines
102 1.16 augustss * the data strored in memory needs to be swapped.
103 1.16 augustss */
104 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
105 1.16 augustss #define LE(x) (bswap32(x))
106 1.16 augustss #else
107 1.16 augustss #define LE(x) (x)
108 1.16 augustss #endif
109 1.16 augustss
110 1.1 augustss struct ohci_pipe;
111 1.1 augustss
112 1.49.2.1 wrstuden static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
113 1.49.2.1 wrstuden static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
114 1.49.2.1 wrstuden
115 1.49.2.1 wrstuden static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
116 1.49.2.1 wrstuden static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
117 1.1 augustss
118 1.49.2.1 wrstuden #if 0
119 1.49.2.1 wrstuden static void ohci_free_std_chain __P((ohci_softc_t *,
120 1.49.2.1 wrstuden ohci_soft_td_t *, ohci_soft_td_t *));
121 1.49.2.1 wrstuden #endif
122 1.49.2.1 wrstuden static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *,
123 1.49.2.1 wrstuden ohci_softc_t *, int, int, int, usb_dma_t *,
124 1.49.2.1 wrstuden ohci_soft_td_t *, ohci_soft_td_t **));
125 1.49.2.1 wrstuden
126 1.49.2.1 wrstuden static void ohci_power __P((int, void *));
127 1.49.2.1 wrstuden static usbd_status ohci_open __P((usbd_pipe_handle));
128 1.49.2.1 wrstuden static void ohci_poll __P((struct usbd_bus *));
129 1.49.2.1 wrstuden static void ohci_waitintr __P((ohci_softc_t *,
130 1.49.2.1 wrstuden usbd_xfer_handle));
131 1.49.2.1 wrstuden static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle));
132 1.49.2.1 wrstuden static void ohci_process_done __P((ohci_softc_t *,
133 1.49.2.1 wrstuden ohci_physaddr_t));
134 1.49.2.1 wrstuden
135 1.49.2.1 wrstuden static usbd_status ohci_device_request __P((usbd_xfer_handle xfer));
136 1.49.2.1 wrstuden static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
137 1.49.2.1 wrstuden static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
138 1.49.2.1 wrstuden static void ohci_hash_add_td __P((ohci_softc_t *,
139 1.49.2.1 wrstuden ohci_soft_td_t *));
140 1.49.2.1 wrstuden static void ohci_hash_rem_td __P((ohci_softc_t *,
141 1.49.2.1 wrstuden ohci_soft_td_t *));
142 1.49.2.1 wrstuden static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *,
143 1.49.2.1 wrstuden ohci_physaddr_t));
144 1.49.2.1 wrstuden
145 1.49.2.1 wrstuden static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *,
146 1.49.2.1 wrstuden u_int32_t));
147 1.49.2.1 wrstuden static void ohci_freem __P((struct usbd_bus *, usb_dma_t *));
148 1.49.2.1 wrstuden
149 1.49.2.1 wrstuden static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle));
150 1.49.2.1 wrstuden static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle));
151 1.49.2.1 wrstuden static void ohci_root_ctrl_abort __P((usbd_xfer_handle));
152 1.49.2.1 wrstuden static void ohci_root_ctrl_close __P((usbd_pipe_handle));
153 1.49.2.1 wrstuden
154 1.49.2.1 wrstuden static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle));
155 1.49.2.1 wrstuden static usbd_status ohci_root_intr_start __P((usbd_xfer_handle));
156 1.49.2.1 wrstuden static void ohci_root_intr_abort __P((usbd_xfer_handle));
157 1.49.2.1 wrstuden static void ohci_root_intr_close __P((usbd_pipe_handle));
158 1.49.2.1 wrstuden static void ohci_root_intr_done __P((usbd_xfer_handle));
159 1.49.2.1 wrstuden
160 1.49.2.1 wrstuden static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle));
161 1.49.2.1 wrstuden static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle));
162 1.49.2.1 wrstuden static void ohci_device_ctrl_abort __P((usbd_xfer_handle));
163 1.49.2.1 wrstuden static void ohci_device_ctrl_close __P((usbd_pipe_handle));
164 1.49.2.1 wrstuden static void ohci_device_ctrl_done __P((usbd_xfer_handle));
165 1.49.2.1 wrstuden
166 1.49.2.1 wrstuden static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle));
167 1.49.2.1 wrstuden static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle));
168 1.49.2.1 wrstuden static void ohci_device_bulk_abort __P((usbd_xfer_handle));
169 1.49.2.1 wrstuden static void ohci_device_bulk_close __P((usbd_pipe_handle));
170 1.49.2.1 wrstuden static void ohci_device_bulk_done __P((usbd_xfer_handle));
171 1.49.2.1 wrstuden
172 1.49.2.1 wrstuden static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle));
173 1.49.2.1 wrstuden static usbd_status ohci_device_intr_start __P((usbd_xfer_handle));
174 1.49.2.1 wrstuden static void ohci_device_intr_abort __P((usbd_xfer_handle));
175 1.49.2.1 wrstuden static void ohci_device_intr_close __P((usbd_pipe_handle));
176 1.49.2.1 wrstuden static void ohci_device_intr_done __P((usbd_xfer_handle));
177 1.1 augustss
178 1.49.2.1 wrstuden #if 0
179 1.49.2.1 wrstuden static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle));
180 1.49.2.1 wrstuden static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle));
181 1.49.2.1 wrstuden static void ohci_device_isoc_abort __P((usbd_xfer_handle));
182 1.49.2.1 wrstuden static void ohci_device_isoc_close __P((usbd_pipe_handle));
183 1.49.2.1 wrstuden static void ohci_device_isoc_done __P((usbd_xfer_handle));
184 1.49.2.1 wrstuden #endif
185 1.49.2.1 wrstuden
186 1.49.2.1 wrstuden static usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
187 1.49.2.1 wrstuden struct ohci_pipe *pipe, int ival));
188 1.49.2.1 wrstuden
189 1.49.2.1 wrstuden static int ohci_str __P((usb_string_descriptor_t *, int, char *));
190 1.49.2.1 wrstuden
191 1.49.2.1 wrstuden static void ohci_timeout __P((void *));
192 1.49.2.1 wrstuden static void ohci_rhsc_able __P((ohci_softc_t *, int));
193 1.49.2.1 wrstuden
194 1.49.2.1 wrstuden static void ohci_close_pipe __P((usbd_pipe_handle pipe,
195 1.49.2.1 wrstuden ohci_soft_ed_t *head));
196 1.49.2.1 wrstuden static void ohci_abort_xfer __P((usbd_xfer_handle xfer,
197 1.49.2.1 wrstuden usbd_status status));
198 1.49.2.1 wrstuden static void ohci_abort_xfer_end __P((void *));
199 1.49.2.1 wrstuden
200 1.49.2.1 wrstuden static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
201 1.49.2.1 wrstuden static void ohci_noop __P((usbd_pipe_handle pipe));
202 1.49.2.1 wrstuden
203 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
204 1.49.2.1 wrstuden static void ohci_dumpregs __P((ohci_softc_t *));
205 1.49.2.1 wrstuden static void ohci_dump_tds __P((ohci_soft_td_t *));
206 1.49.2.1 wrstuden static void ohci_dump_td __P((ohci_soft_td_t *));
207 1.49.2.1 wrstuden static void ohci_dump_ed __P((ohci_soft_ed_t *));
208 1.1 augustss #endif
209 1.1 augustss
210 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
211 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
212 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
213 1.1 augustss
214 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
215 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
216 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
217 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
218 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
219 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
220 1.1 augustss
221 1.1 augustss struct ohci_pipe {
222 1.1 augustss struct usbd_pipe pipe;
223 1.1 augustss ohci_soft_ed_t *sed;
224 1.1 augustss ohci_soft_td_t *tail;
225 1.1 augustss /* Info needed for different pipe kinds. */
226 1.1 augustss union {
227 1.1 augustss /* Control pipe */
228 1.1 augustss struct {
229 1.4 augustss usb_dma_t reqdma;
230 1.1 augustss u_int length;
231 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
232 1.1 augustss } ctl;
233 1.1 augustss /* Interrupt pipe */
234 1.1 augustss struct {
235 1.1 augustss int nslots;
236 1.1 augustss int pos;
237 1.1 augustss } intr;
238 1.3 augustss /* Bulk pipe */
239 1.3 augustss struct {
240 1.3 augustss u_int length;
241 1.32 augustss int isread;
242 1.3 augustss } bulk;
243 1.43 augustss /* Iso pipe */
244 1.43 augustss struct iso {
245 1.43 augustss int xxxxx;
246 1.43 augustss } iso;
247 1.1 augustss } u;
248 1.1 augustss };
249 1.1 augustss
250 1.1 augustss #define OHCI_INTR_ENDPT 1
251 1.1 augustss
252 1.49.2.1 wrstuden static struct usbd_bus_methods ohci_bus_methods = {
253 1.42 augustss ohci_open,
254 1.42 augustss ohci_poll,
255 1.42 augustss ohci_allocm,
256 1.42 augustss ohci_freem,
257 1.42 augustss };
258 1.42 augustss
259 1.49.2.1 wrstuden static struct usbd_pipe_methods ohci_root_ctrl_methods = {
260 1.1 augustss ohci_root_ctrl_transfer,
261 1.17 augustss ohci_root_ctrl_start,
262 1.1 augustss ohci_root_ctrl_abort,
263 1.1 augustss ohci_root_ctrl_close,
264 1.37 augustss ohci_noop,
265 1.7 augustss 0,
266 1.1 augustss };
267 1.1 augustss
268 1.49.2.1 wrstuden static struct usbd_pipe_methods ohci_root_intr_methods = {
269 1.1 augustss ohci_root_intr_transfer,
270 1.17 augustss ohci_root_intr_start,
271 1.1 augustss ohci_root_intr_abort,
272 1.1 augustss ohci_root_intr_close,
273 1.37 augustss ohci_noop,
274 1.38 augustss ohci_root_intr_done,
275 1.1 augustss };
276 1.1 augustss
277 1.49.2.1 wrstuden static struct usbd_pipe_methods ohci_device_ctrl_methods = {
278 1.1 augustss ohci_device_ctrl_transfer,
279 1.17 augustss ohci_device_ctrl_start,
280 1.1 augustss ohci_device_ctrl_abort,
281 1.1 augustss ohci_device_ctrl_close,
282 1.37 augustss ohci_noop,
283 1.38 augustss ohci_device_ctrl_done,
284 1.1 augustss };
285 1.1 augustss
286 1.49.2.1 wrstuden static struct usbd_pipe_methods ohci_device_intr_methods = {
287 1.1 augustss ohci_device_intr_transfer,
288 1.17 augustss ohci_device_intr_start,
289 1.1 augustss ohci_device_intr_abort,
290 1.1 augustss ohci_device_intr_close,
291 1.37 augustss ohci_device_clear_toggle,
292 1.38 augustss ohci_device_intr_done,
293 1.1 augustss };
294 1.1 augustss
295 1.49.2.1 wrstuden static struct usbd_pipe_methods ohci_device_bulk_methods = {
296 1.3 augustss ohci_device_bulk_transfer,
297 1.17 augustss ohci_device_bulk_start,
298 1.3 augustss ohci_device_bulk_abort,
299 1.3 augustss ohci_device_bulk_close,
300 1.37 augustss ohci_device_clear_toggle,
301 1.38 augustss ohci_device_bulk_done,
302 1.3 augustss };
303 1.3 augustss
304 1.43 augustss #if 0
305 1.49.2.1 wrstuden static struct usbd_pipe_methods ohci_device_isoc_methods = {
306 1.43 augustss ohci_device_isoc_transfer,
307 1.43 augustss ohci_device_isoc_start,
308 1.43 augustss ohci_device_isoc_abort,
309 1.43 augustss ohci_device_isoc_close,
310 1.43 augustss ohci_noop,
311 1.43 augustss ohci_device_isoc_done,
312 1.43 augustss };
313 1.43 augustss #endif
314 1.43 augustss
315 1.49.2.1 wrstuden #if defined(__NetBSD__) || defined(__OpenBSD__)
316 1.47 augustss int
317 1.47 augustss ohci_activate(self, act)
318 1.47 augustss device_ptr_t self;
319 1.47 augustss enum devact act;
320 1.47 augustss {
321 1.49 augustss struct ohci_softc *sc = (struct ohci_softc *)self;
322 1.47 augustss int rv = 0;
323 1.47 augustss
324 1.47 augustss switch (act) {
325 1.47 augustss case DVACT_ACTIVATE:
326 1.47 augustss return (EOPNOTSUPP);
327 1.47 augustss break;
328 1.47 augustss
329 1.47 augustss case DVACT_DEACTIVATE:
330 1.49 augustss if (sc->sc_child != NULL)
331 1.49 augustss rv = config_deactivate(sc->sc_child);
332 1.47 augustss break;
333 1.47 augustss }
334 1.47 augustss return (rv);
335 1.47 augustss }
336 1.47 augustss
337 1.47 augustss int
338 1.49.2.1 wrstuden ohci_detach(sc, flags)
339 1.49.2.1 wrstuden struct ohci_softc *sc;
340 1.47 augustss int flags;
341 1.47 augustss {
342 1.47 augustss int rv = 0;
343 1.47 augustss
344 1.47 augustss if (sc->sc_child != NULL)
345 1.47 augustss rv = config_detach(sc->sc_child, flags);
346 1.47 augustss
347 1.47 augustss if (rv != 0)
348 1.47 augustss return (rv);
349 1.47 augustss
350 1.47 augustss powerhook_disestablish(sc->sc_powerhook);
351 1.47 augustss /* free data structures XXX */
352 1.47 augustss
353 1.47 augustss return (rv);
354 1.47 augustss }
355 1.49.2.1 wrstuden #endif
356 1.47 augustss
357 1.1 augustss ohci_soft_ed_t *
358 1.1 augustss ohci_alloc_sed(sc)
359 1.1 augustss ohci_softc_t *sc;
360 1.1 augustss {
361 1.1 augustss ohci_soft_ed_t *sed;
362 1.49.2.1 wrstuden usbd_status err;
363 1.1 augustss int i, offs;
364 1.4 augustss usb_dma_t dma;
365 1.1 augustss
366 1.49.2.1 wrstuden if (sc->sc_freeeds == NULL) {
367 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
368 1.49.2.1 wrstuden err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
369 1.49.2.1 wrstuden OHCI_ED_ALIGN, &dma);
370 1.49.2.1 wrstuden if (err)
371 1.39 augustss return (0);
372 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
373 1.39 augustss offs = i * OHCI_SED_SIZE;
374 1.39 augustss sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
375 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
376 1.1 augustss sed->next = sc->sc_freeeds;
377 1.1 augustss sc->sc_freeeds = sed;
378 1.1 augustss }
379 1.1 augustss }
380 1.1 augustss sed = sc->sc_freeeds;
381 1.1 augustss sc->sc_freeeds = sed->next;
382 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
383 1.1 augustss sed->next = 0;
384 1.39 augustss return (sed);
385 1.1 augustss }
386 1.1 augustss
387 1.1 augustss void
388 1.1 augustss ohci_free_sed(sc, sed)
389 1.1 augustss ohci_softc_t *sc;
390 1.1 augustss ohci_soft_ed_t *sed;
391 1.1 augustss {
392 1.1 augustss sed->next = sc->sc_freeeds;
393 1.1 augustss sc->sc_freeeds = sed;
394 1.1 augustss }
395 1.1 augustss
396 1.1 augustss ohci_soft_td_t *
397 1.1 augustss ohci_alloc_std(sc)
398 1.1 augustss ohci_softc_t *sc;
399 1.1 augustss {
400 1.1 augustss ohci_soft_td_t *std;
401 1.49.2.1 wrstuden usbd_status err;
402 1.1 augustss int i, offs;
403 1.4 augustss usb_dma_t dma;
404 1.1 augustss
405 1.49.2.1 wrstuden if (sc->sc_freetds == NULL) {
406 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
407 1.49.2.1 wrstuden err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
408 1.49.2.1 wrstuden OHCI_TD_ALIGN, &dma);
409 1.49.2.1 wrstuden if (err)
410 1.39 augustss return (0);
411 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
412 1.39 augustss offs = i * OHCI_STD_SIZE;
413 1.39 augustss std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
414 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
415 1.1 augustss std->nexttd = sc->sc_freetds;
416 1.1 augustss sc->sc_freetds = std;
417 1.1 augustss }
418 1.1 augustss }
419 1.1 augustss std = sc->sc_freetds;
420 1.1 augustss sc->sc_freetds = std->nexttd;
421 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
422 1.1 augustss std->nexttd = 0;
423 1.1 augustss return (std);
424 1.1 augustss }
425 1.1 augustss
426 1.1 augustss void
427 1.1 augustss ohci_free_std(sc, std)
428 1.1 augustss ohci_softc_t *sc;
429 1.1 augustss ohci_soft_td_t *std;
430 1.1 augustss {
431 1.1 augustss std->nexttd = sc->sc_freetds;
432 1.1 augustss sc->sc_freetds = std;
433 1.1 augustss }
434 1.1 augustss
435 1.1 augustss usbd_status
436 1.48 augustss ohci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep)
437 1.48 augustss struct ohci_pipe *upipe;
438 1.48 augustss ohci_softc_t *sc;
439 1.48 augustss int len, rd, shortok;
440 1.48 augustss usb_dma_t *dma;
441 1.48 augustss ohci_soft_td_t *sp, **ep;
442 1.48 augustss {
443 1.48 augustss ohci_soft_td_t *next, *cur;
444 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
445 1.48 augustss u_int32_t intr;
446 1.48 augustss int curlen;
447 1.48 augustss
448 1.49.2.1 wrstuden DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len));
449 1.48 augustss cur = sp;
450 1.48 augustss dataphys = DMAADDR(dma);
451 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
452 1.48 augustss for (;;) {
453 1.48 augustss next = ohci_alloc_std(sc);
454 1.48 augustss if (next == 0) {
455 1.48 augustss /* XXX free chain */
456 1.48 augustss return (USBD_NOMEM);
457 1.48 augustss }
458 1.48 augustss
459 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
460 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
461 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
462 1.48 augustss /* we can handle it in this TD */
463 1.48 augustss curlen = len;
464 1.48 augustss } else {
465 1.48 augustss /* must use multiple TDs, fill as much as possible. */
466 1.48 augustss curlen = 2 * OHCI_PAGE_SIZE -
467 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
468 1.48 augustss }
469 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
470 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
471 1.48 augustss dataphys, dataphysend,
472 1.48 augustss len, curlen));
473 1.48 augustss len -= curlen;
474 1.48 augustss
475 1.48 augustss intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR;
476 1.48 augustss cur->td.td_flags = LE(
477 1.48 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
478 1.48 augustss intr | OHCI_TD_TOGGLE_CARRY |
479 1.48 augustss (shortok ? OHCI_TD_R : 0));
480 1.48 augustss cur->td.td_cbp = LE(dataphys);
481 1.48 augustss cur->nexttd = next;
482 1.48 augustss cur->td.td_nexttd = LE(next->physaddr);
483 1.48 augustss cur->td.td_be = LE(dataphys + curlen - 1);
484 1.48 augustss cur->len = curlen;
485 1.48 augustss cur->flags = OHCI_ADD_LEN;
486 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
487 1.48 augustss dataphys, dataphys + curlen - 1));
488 1.48 augustss if (len == 0)
489 1.48 augustss break;
490 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
491 1.48 augustss dataphys += curlen;
492 1.48 augustss cur = next;
493 1.48 augustss }
494 1.48 augustss cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
495 1.48 augustss *ep = next;
496 1.48 augustss
497 1.48 augustss return (USBD_NORMAL_COMPLETION);
498 1.48 augustss }
499 1.48 augustss
500 1.49.2.1 wrstuden #if 0
501 1.49.2.1 wrstuden static void
502 1.48 augustss ohci_free_std_chain(sc, std, stdend)
503 1.48 augustss ohci_softc_t *sc;
504 1.48 augustss ohci_soft_td_t *std;
505 1.48 augustss ohci_soft_td_t *stdend;
506 1.48 augustss {
507 1.48 augustss ohci_soft_td_t *p;
508 1.48 augustss
509 1.48 augustss for (; std != stdend; std = p) {
510 1.48 augustss p = std->nexttd;
511 1.48 augustss ohci_free_std(sc, std);
512 1.48 augustss }
513 1.48 augustss }
514 1.49.2.1 wrstuden #endif
515 1.48 augustss
516 1.48 augustss usbd_status
517 1.1 augustss ohci_init(sc)
518 1.1 augustss ohci_softc_t *sc;
519 1.1 augustss {
520 1.1 augustss ohci_soft_ed_t *sed, *psed;
521 1.49.2.1 wrstuden usbd_status err;
522 1.1 augustss int rev;
523 1.1 augustss int i;
524 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
525 1.16 augustss
526 1.1 augustss DPRINTF(("ohci_init: start\n"));
527 1.36 augustss #if defined(__OpenBSD__)
528 1.49.2.1 wrstuden printf(",");
529 1.36 augustss #else
530 1.49.2.1 wrstuden printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
531 1.36 augustss #endif
532 1.49.2.1 wrstuden rev = OREAD4(sc, OHCI_REVISION);
533 1.49.2.1 wrstuden printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
534 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
535 1.49.2.1 wrstuden
536 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
537 1.1 augustss printf("%s: unsupported OHCI revision\n",
538 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
539 1.49.2.1 wrstuden sc->sc_bus.usbrev = USBREV_UNKNOWN;
540 1.1 augustss return (USBD_INVAL);
541 1.1 augustss }
542 1.49.2.1 wrstuden sc->sc_bus.usbrev = USBREV_1_0;
543 1.1 augustss
544 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
545 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
546 1.1 augustss
547 1.1 augustss /* Allocate the HCCA area. */
548 1.49.2.1 wrstuden err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
549 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
550 1.49.2.1 wrstuden if (err)
551 1.49.2.1 wrstuden return (err);
552 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
553 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
554 1.1 augustss
555 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
556 1.1 augustss
557 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
558 1.49.2.1 wrstuden if (sc->sc_ctrl_head == NULL) {
559 1.49.2.1 wrstuden err = USBD_NOMEM;
560 1.1 augustss goto bad1;
561 1.1 augustss }
562 1.39 augustss sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
563 1.34 augustss
564 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
565 1.49.2.1 wrstuden if (sc->sc_bulk_head == NULL) {
566 1.49.2.1 wrstuden err = USBD_NOMEM;
567 1.1 augustss goto bad2;
568 1.1 augustss }
569 1.39 augustss sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
570 1.1 augustss
571 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
572 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
573 1.1 augustss sed = ohci_alloc_sed(sc);
574 1.49.2.1 wrstuden if (sed == NULL) {
575 1.1 augustss while (--i >= 0)
576 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
577 1.49.2.1 wrstuden err = USBD_NOMEM;
578 1.1 augustss goto bad3;
579 1.1 augustss }
580 1.1 augustss /* All ED fields are set to 0. */
581 1.1 augustss sc->sc_eds[i] = sed;
582 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
583 1.1 augustss if (i != 0) {
584 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
585 1.1 augustss sed->next = psed;
586 1.39 augustss sed->ed.ed_nexted = LE(psed->physaddr);
587 1.1 augustss }
588 1.1 augustss }
589 1.1 augustss /*
590 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
591 1.1 augustss * the tree set up properly to spread the interrupts.
592 1.1 augustss */
593 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
594 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
595 1.16 augustss LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
596 1.1 augustss
597 1.1 augustss /* Determine in what context we are running. */
598 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
599 1.1 augustss if (ctl & OHCI_IR) {
600 1.1 augustss /* SMM active, request change */
601 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
602 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
603 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
604 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
605 1.49.2.1 wrstuden usb_delay_ms(&sc->sc_bus, 1);
606 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
607 1.1 augustss }
608 1.1 augustss if ((ctl & OHCI_IR) == 0) {
609 1.15 augustss printf("%s: SMM does not respond, resetting\n",
610 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
611 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
612 1.1 augustss goto reset;
613 1.1 augustss }
614 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
615 1.1 augustss /* BIOS started controller. */
616 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
617 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
618 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
619 1.49.2.1 wrstuden usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
620 1.1 augustss }
621 1.1 augustss } else {
622 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
623 1.1 augustss reset:
624 1.1 augustss /* Controller was cold started. */
625 1.49.2.1 wrstuden usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
626 1.1 augustss }
627 1.1 augustss
628 1.16 augustss /*
629 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
630 1.25 augustss * without it some controllers do not start.
631 1.16 augustss */
632 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
633 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
634 1.49.2.1 wrstuden usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
635 1.16 augustss
636 1.1 augustss /* We now own the host controller and the bus has been reset. */
637 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
638 1.1 augustss
639 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
640 1.1 augustss /* Nominal time for a reset is 10 us. */
641 1.1 augustss for (i = 0; i < 10; i++) {
642 1.1 augustss delay(10);
643 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
644 1.1 augustss if (!hcr)
645 1.1 augustss break;
646 1.1 augustss }
647 1.1 augustss if (hcr) {
648 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
649 1.49.2.1 wrstuden err = USBD_IOERROR;
650 1.1 augustss goto bad3;
651 1.1 augustss }
652 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
653 1.1 augustss if (ohcidebug > 15)
654 1.1 augustss ohci_dumpregs(sc);
655 1.1 augustss #endif
656 1.1 augustss
657 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
658 1.1 augustss
659 1.1 augustss /* Set up HC registers. */
660 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
661 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
662 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
663 1.49.2.1 wrstuden /* disable all interrupts and then switch on all desired interrupts */
664 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
665 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
666 1.49.2.1 wrstuden /* switch on desired functional features */
667 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
668 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
669 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
670 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
671 1.1 augustss /* And finally start it! */
672 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
673 1.1 augustss
674 1.1 augustss /*
675 1.1 augustss * The controller is now OPERATIONAL. Set a some final
676 1.1 augustss * registers that should be set earlier, but that the
677 1.1 augustss * controller ignores when in the SUSPEND state.
678 1.1 augustss */
679 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
680 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
681 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
682 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
683 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
684 1.1 augustss
685 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
686 1.1 augustss
687 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
688 1.1 augustss
689 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
690 1.1 augustss if (ohcidebug > 5)
691 1.1 augustss ohci_dumpregs(sc);
692 1.1 augustss #endif
693 1.1 augustss
694 1.1 augustss /* Set up the bus struct. */
695 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
696 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
697 1.1 augustss
698 1.47 augustss sc->sc_powerhook = powerhook_establish(ohci_power, sc);
699 1.33 augustss
700 1.1 augustss return (USBD_NORMAL_COMPLETION);
701 1.1 augustss
702 1.1 augustss bad3:
703 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
704 1.1 augustss bad2:
705 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
706 1.1 augustss bad1:
707 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
708 1.49.2.1 wrstuden return (err);
709 1.1 augustss }
710 1.1 augustss
711 1.42 augustss usbd_status
712 1.42 augustss ohci_allocm(bus, dma, size)
713 1.42 augustss struct usbd_bus *bus;
714 1.42 augustss usb_dma_t *dma;
715 1.42 augustss u_int32_t size;
716 1.42 augustss {
717 1.49.2.1 wrstuden #if defined(__NetBSD__) || defined(__OpenBSD__)
718 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
719 1.49.2.1 wrstuden #endif
720 1.42 augustss
721 1.44 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
722 1.42 augustss }
723 1.42 augustss
724 1.42 augustss void
725 1.42 augustss ohci_freem(bus, dma)
726 1.42 augustss struct usbd_bus *bus;
727 1.42 augustss usb_dma_t *dma;
728 1.42 augustss {
729 1.49.2.1 wrstuden #if defined(__NetBSD__) || defined(__OpenBSD__)
730 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
731 1.49.2.1 wrstuden #endif
732 1.42 augustss
733 1.44 augustss usb_freemem(&sc->sc_bus, dma);
734 1.42 augustss }
735 1.42 augustss
736 1.49.2.1 wrstuden #if defined(__NetBSD__)
737 1.33 augustss void
738 1.33 augustss ohci_power(why, v)
739 1.33 augustss int why;
740 1.33 augustss void *v;
741 1.33 augustss {
742 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
743 1.33 augustss ohci_softc_t *sc = v;
744 1.33 augustss
745 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
746 1.33 augustss /* XXX should suspend/resume */
747 1.33 augustss ohci_dumpregs(sc);
748 1.33 augustss #endif
749 1.33 augustss }
750 1.49.2.1 wrstuden #endif /* defined(__NetBSD__) */
751 1.1 augustss
752 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
753 1.1 augustss void
754 1.1 augustss ohci_dumpregs(sc)
755 1.1 augustss ohci_softc_t *sc;
756 1.1 augustss {
757 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
758 1.41 augustss OREAD4(sc, OHCI_REVISION),
759 1.41 augustss OREAD4(sc, OHCI_CONTROL),
760 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
761 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
762 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
763 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
764 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
765 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
766 1.41 augustss OREAD4(sc, OHCI_HCCA),
767 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
768 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
769 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
770 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
771 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
772 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
773 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
774 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
775 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
776 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
777 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
778 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
779 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
780 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
781 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
782 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
783 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
784 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
785 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
786 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
787 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
788 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
789 1.41 augustss LE(sc->sc_hcca->hcca_frame_number),
790 1.41 augustss LE(sc->sc_hcca->hcca_done_head)));
791 1.1 augustss }
792 1.1 augustss #endif
793 1.1 augustss
794 1.49.2.1 wrstuden static int ohci_intr1 __P((ohci_softc_t *));
795 1.49.2.1 wrstuden
796 1.1 augustss int
797 1.1 augustss ohci_intr(p)
798 1.1 augustss void *p;
799 1.1 augustss {
800 1.1 augustss ohci_softc_t *sc = p;
801 1.49.2.1 wrstuden
802 1.49.2.1 wrstuden /* If we get an interrupt while polling, then just ignore it. */
803 1.49.2.1 wrstuden if (sc->sc_bus.use_polling) {
804 1.49.2.1 wrstuden #ifdef DIAGNOSTIC
805 1.49.2.1 wrstuden printf("ohci_intr: ignored interrupt while polling\n");
806 1.49.2.1 wrstuden #endif
807 1.49.2.1 wrstuden return (0);
808 1.49.2.1 wrstuden }
809 1.49.2.1 wrstuden
810 1.49.2.1 wrstuden return (ohci_intr1(sc));
811 1.49.2.1 wrstuden }
812 1.49.2.1 wrstuden
813 1.49.2.1 wrstuden static int
814 1.49.2.1 wrstuden ohci_intr1(sc)
815 1.49.2.1 wrstuden ohci_softc_t *sc;
816 1.49.2.1 wrstuden {
817 1.1 augustss u_int32_t intrs, eintrs;
818 1.1 augustss ohci_physaddr_t done;
819 1.1 augustss
820 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
821 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
822 1.15 augustss #ifdef DIAGNOSTIC
823 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
824 1.15 augustss #endif
825 1.15 augustss return (0);
826 1.15 augustss }
827 1.15 augustss
828 1.27 augustss intrs = 0;
829 1.16 augustss done = LE(sc->sc_hcca->hcca_done_head);
830 1.1 augustss if (done != 0) {
831 1.26 augustss sc->sc_hcca->hcca_done_head = 0;
832 1.26 augustss if (done & ~OHCI_DONE_INTRS)
833 1.26 augustss intrs = OHCI_WDH;
834 1.1 augustss if (done & OHCI_DONE_INTRS)
835 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
836 1.1 augustss } else
837 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
838 1.49.2.1 wrstuden
839 1.1 augustss if (!intrs)
840 1.1 augustss return (0);
841 1.49.2.1 wrstuden
842 1.1 augustss intrs &= ~OHCI_MIE;
843 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
844 1.1 augustss eintrs = intrs & sc->sc_eintrs;
845 1.1 augustss if (!eintrs)
846 1.1 augustss return (0);
847 1.1 augustss
848 1.45 augustss sc->sc_bus.intr_context++;
849 1.44 augustss sc->sc_bus.no_intrs++;
850 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
851 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
852 1.1 augustss (u_int)eintrs));
853 1.1 augustss
854 1.1 augustss if (eintrs & OHCI_SO) {
855 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
856 1.1 augustss /* XXX do what */
857 1.1 augustss intrs &= ~OHCI_SO;
858 1.1 augustss }
859 1.1 augustss if (eintrs & OHCI_WDH) {
860 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
861 1.1 augustss intrs &= ~OHCI_WDH;
862 1.1 augustss }
863 1.1 augustss if (eintrs & OHCI_RD) {
864 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
865 1.1 augustss /* XXX process resume detect */
866 1.1 augustss }
867 1.1 augustss if (eintrs & OHCI_UE) {
868 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
869 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
870 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
871 1.1 augustss /* XXX what else */
872 1.1 augustss }
873 1.1 augustss if (eintrs & OHCI_RHSC) {
874 1.49.2.1 wrstuden ohci_rhsc(sc, sc->sc_intrxfer);
875 1.1 augustss intrs &= ~OHCI_RHSC;
876 1.1 augustss
877 1.1 augustss /*
878 1.1 augustss * Disable RHSC interrupt for now, because it will be
879 1.1 augustss * on until the port has been reset.
880 1.1 augustss */
881 1.1 augustss ohci_rhsc_able(sc, 0);
882 1.1 augustss }
883 1.1 augustss
884 1.45 augustss sc->sc_bus.intr_context--;
885 1.44 augustss
886 1.1 augustss /* Block unprocessed interrupts. XXX */
887 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
888 1.1 augustss sc->sc_eintrs &= ~intrs;
889 1.1 augustss
890 1.1 augustss return (1);
891 1.1 augustss }
892 1.1 augustss
893 1.1 augustss void
894 1.1 augustss ohci_rhsc_able(sc, on)
895 1.1 augustss ohci_softc_t *sc;
896 1.1 augustss int on;
897 1.1 augustss {
898 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
899 1.1 augustss if (on) {
900 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
901 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
902 1.1 augustss } else {
903 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
904 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
905 1.1 augustss }
906 1.1 augustss }
907 1.1 augustss
908 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
909 1.13 augustss char *ohci_cc_strs[] = {
910 1.13 augustss "NO_ERROR",
911 1.13 augustss "CRC",
912 1.13 augustss "BIT_STUFFING",
913 1.13 augustss "DATA_TOGGLE_MISMATCH",
914 1.13 augustss "STALL",
915 1.13 augustss "DEVICE_NOT_RESPONDING",
916 1.13 augustss "PID_CHECK_FAILURE",
917 1.13 augustss "UNEXPECTED_PID",
918 1.13 augustss "DATA_OVERRUN",
919 1.13 augustss "DATA_UNDERRUN",
920 1.13 augustss "BUFFER_OVERRUN",
921 1.13 augustss "BUFFER_UNDERRUN",
922 1.13 augustss "NOT_ACCESSED",
923 1.13 augustss };
924 1.13 augustss #endif
925 1.13 augustss
926 1.1 augustss void
927 1.1 augustss ohci_process_done(sc, done)
928 1.1 augustss ohci_softc_t *sc;
929 1.1 augustss ohci_physaddr_t done;
930 1.1 augustss {
931 1.48 augustss ohci_soft_td_t *std, *sdone, *stdnext;
932 1.49.2.1 wrstuden usbd_xfer_handle xfer;
933 1.1 augustss int len, cc;
934 1.1 augustss
935 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
936 1.1 augustss
937 1.1 augustss /* Reverse the done list. */
938 1.39 augustss for (sdone = 0; done; done = LE(std->td.td_nexttd)) {
939 1.1 augustss std = ohci_hash_find_td(sc, done);
940 1.1 augustss std->dnext = sdone;
941 1.1 augustss sdone = std;
942 1.1 augustss }
943 1.1 augustss
944 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
945 1.1 augustss if (ohcidebug > 10) {
946 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
947 1.1 augustss ohci_dump_tds(sdone);
948 1.1 augustss }
949 1.1 augustss #endif
950 1.1 augustss
951 1.48 augustss for (std = sdone; std; std = stdnext) {
952 1.49.2.1 wrstuden xfer = std->xfer;
953 1.48 augustss stdnext = std->dnext;
954 1.49.2.1 wrstuden DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
955 1.49.2.1 wrstuden std, xfer, xfer->hcpriv));
956 1.39 augustss cc = OHCI_TD_GET_CC(LE(std->td.td_flags));
957 1.49.2.1 wrstuden usb_untimeout(ohci_timeout, xfer, xfer->timo_handle);
958 1.49.2.1 wrstuden if (xfer->status == USBD_CANCELLED ||
959 1.49.2.1 wrstuden xfer->status == USBD_TIMEOUT) {
960 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
961 1.49.2.1 wrstuden xfer));
962 1.38 augustss /* Handled by abort routine. */
963 1.34 augustss } else if (cc == OHCI_CC_NO_ERROR) {
964 1.34 augustss len = std->len;
965 1.39 augustss if (std->td.td_cbp != 0)
966 1.39 augustss len -= LE(std->td.td_be) -
967 1.39 augustss LE(std->td.td_cbp) + 1;
968 1.48 augustss if (std->flags & OHCI_ADD_LEN)
969 1.49.2.1 wrstuden xfer->actlen += len;
970 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
971 1.49.2.1 wrstuden xfer->status = USBD_NORMAL_COMPLETION;
972 1.49.2.1 wrstuden usb_transfer_complete(xfer);
973 1.21 augustss }
974 1.48 augustss ohci_hash_rem_td(sc, std);
975 1.48 augustss ohci_free_std(sc, std);
976 1.1 augustss } else {
977 1.48 augustss /*
978 1.48 augustss * Endpoint is halted. First unlink all the TDs
979 1.48 augustss * belonging to the failed transfer, and then restart
980 1.48 augustss * the endpoint.
981 1.48 augustss */
982 1.1 augustss ohci_soft_td_t *p, *n;
983 1.1 augustss struct ohci_pipe *opipe =
984 1.49.2.1 wrstuden (struct ohci_pipe *)xfer->pipe;
985 1.48 augustss
986 1.49.2.1 wrstuden DPRINTF(("ohci_process_done: error cc=%d (%s)\n",
987 1.49.2.1 wrstuden OHCI_TD_GET_CC(LE(std->td.td_flags)),
988 1.49.2.1 wrstuden ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))]));
989 1.48 augustss
990 1.48 augustss /* remove TDs */
991 1.49.2.1 wrstuden for (p = std; p->xfer == xfer; p = n) {
992 1.1 augustss n = p->nexttd;
993 1.1 augustss ohci_hash_rem_td(sc, p);
994 1.1 augustss ohci_free_std(sc, p);
995 1.1 augustss }
996 1.48 augustss
997 1.16 augustss /* clear halt */
998 1.39 augustss opipe->sed->ed.ed_headp = LE(p->physaddr);
999 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1000 1.48 augustss
1001 1.1 augustss if (cc == OHCI_CC_STALL)
1002 1.49.2.1 wrstuden xfer->status = USBD_STALLED;
1003 1.1 augustss else
1004 1.49.2.1 wrstuden xfer->status = USBD_IOERROR;
1005 1.49.2.1 wrstuden usb_transfer_complete(xfer);
1006 1.1 augustss }
1007 1.1 augustss }
1008 1.1 augustss }
1009 1.1 augustss
1010 1.1 augustss void
1011 1.49.2.1 wrstuden ohci_device_ctrl_done(xfer)
1012 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1013 1.1 augustss {
1014 1.49.2.1 wrstuden DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer));
1015 1.1 augustss
1016 1.38 augustss #ifdef DIAGNOSTIC
1017 1.49.2.1 wrstuden if (!(xfer->rqflags & URQ_REQUEST)) {
1018 1.8 augustss panic("ohci_ctrl_done: not a request\n");
1019 1.1 augustss }
1020 1.38 augustss #endif
1021 1.49.2.1 wrstuden xfer->hcpriv = NULL;
1022 1.1 augustss }
1023 1.1 augustss
1024 1.1 augustss void
1025 1.49.2.1 wrstuden ohci_device_intr_done(xfer)
1026 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1027 1.1 augustss {
1028 1.49.2.1 wrstuden struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1029 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1030 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1031 1.48 augustss ohci_soft_td_t *data, *tail;
1032 1.1 augustss
1033 1.1 augustss
1034 1.49.2.1 wrstuden DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n",
1035 1.49.2.1 wrstuden xfer, xfer->actlen));
1036 1.1 augustss
1037 1.49.2.1 wrstuden xfer->hcpriv = NULL;
1038 1.38 augustss
1039 1.49.2.1 wrstuden if (xfer->pipe->repeat) {
1040 1.48 augustss data = opipe->tail;
1041 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1042 1.49.2.1 wrstuden if (tail == NULL) {
1043 1.49.2.1 wrstuden xfer->status = USBD_NOMEM;
1044 1.1 augustss return;
1045 1.1 augustss }
1046 1.49.2.1 wrstuden tail->xfer = NULL;
1047 1.1 augustss
1048 1.48 augustss data->td.td_flags = LE(
1049 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1050 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1051 1.49.2.1 wrstuden if (xfer->flags & USBD_SHORT_XFER_OK)
1052 1.48 augustss data->td.td_flags |= LE(OHCI_TD_R);
1053 1.49.2.1 wrstuden data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf));
1054 1.48 augustss data->nexttd = tail;
1055 1.48 augustss data->td.td_nexttd = LE(tail->physaddr);
1056 1.49.2.1 wrstuden data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1);
1057 1.49.2.1 wrstuden data->len = xfer->length;
1058 1.49.2.1 wrstuden data->xfer = xfer;
1059 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1060 1.49.2.1 wrstuden xfer->hcpriv = data;
1061 1.49.2.1 wrstuden xfer->actlen = 0;
1062 1.1 augustss
1063 1.48 augustss ohci_hash_add_td(sc, data);
1064 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1065 1.1 augustss opipe->tail = tail;
1066 1.1 augustss }
1067 1.1 augustss }
1068 1.1 augustss
1069 1.1 augustss void
1070 1.49.2.1 wrstuden ohci_device_bulk_done(xfer)
1071 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1072 1.3 augustss {
1073 1.49.2.1 wrstuden DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n",
1074 1.49.2.1 wrstuden xfer, xfer->actlen));
1075 1.3 augustss
1076 1.49.2.1 wrstuden xfer->hcpriv = NULL;
1077 1.3 augustss }
1078 1.3 augustss
1079 1.3 augustss void
1080 1.49.2.1 wrstuden ohci_rhsc(sc, xfer)
1081 1.1 augustss ohci_softc_t *sc;
1082 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1083 1.1 augustss {
1084 1.1 augustss usbd_pipe_handle pipe;
1085 1.1 augustss struct ohci_pipe *opipe;
1086 1.1 augustss u_char *p;
1087 1.1 augustss int i, m;
1088 1.1 augustss int hstatus;
1089 1.1 augustss
1090 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1091 1.49.2.1 wrstuden DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1092 1.49.2.1 wrstuden sc, xfer, hstatus));
1093 1.1 augustss
1094 1.49.2.1 wrstuden if (xfer == NULL) {
1095 1.1 augustss /* Just ignore the change. */
1096 1.1 augustss return;
1097 1.1 augustss }
1098 1.1 augustss
1099 1.49.2.1 wrstuden pipe = xfer->pipe;
1100 1.1 augustss opipe = (struct ohci_pipe *)pipe;
1101 1.1 augustss
1102 1.49.2.1 wrstuden p = KERNADDR(&xfer->dmabuf);
1103 1.49.2.1 wrstuden m = min(sc->sc_noport, xfer->length * 8 - 1);
1104 1.49.2.1 wrstuden memset(p, 0, xfer->length);
1105 1.1 augustss for (i = 1; i <= m; i++) {
1106 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1107 1.1 augustss p[i/8] |= 1 << (i%8);
1108 1.1 augustss }
1109 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1110 1.49.2.1 wrstuden xfer->actlen = xfer->length;
1111 1.49.2.1 wrstuden xfer->status = USBD_NORMAL_COMPLETION;
1112 1.1 augustss
1113 1.49.2.1 wrstuden usb_transfer_complete(xfer);
1114 1.38 augustss }
1115 1.38 augustss
1116 1.38 augustss void
1117 1.49.2.1 wrstuden ohci_root_intr_done(xfer)
1118 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1119 1.38 augustss {
1120 1.49.2.1 wrstuden xfer->hcpriv = NULL;
1121 1.1 augustss }
1122 1.1 augustss
1123 1.1 augustss /*
1124 1.1 augustss * Wait here until controller claims to have an interrupt.
1125 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1126 1.1 augustss * too long.
1127 1.1 augustss */
1128 1.1 augustss void
1129 1.49.2.1 wrstuden ohci_waitintr(sc, xfer)
1130 1.1 augustss ohci_softc_t *sc;
1131 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1132 1.1 augustss {
1133 1.49.2.1 wrstuden int timo = xfer->timeout;
1134 1.1 augustss int usecs;
1135 1.1 augustss u_int32_t intrs;
1136 1.1 augustss
1137 1.49.2.1 wrstuden xfer->status = USBD_IN_PROGRESS;
1138 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1139 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1140 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1141 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1142 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
1143 1.1 augustss if (ohcidebug > 15)
1144 1.1 augustss ohci_dumpregs(sc);
1145 1.1 augustss #endif
1146 1.1 augustss if (intrs) {
1147 1.49.2.1 wrstuden ohci_intr1(sc);
1148 1.49.2.1 wrstuden if (xfer->status != USBD_IN_PROGRESS)
1149 1.1 augustss return;
1150 1.1 augustss }
1151 1.1 augustss }
1152 1.15 augustss
1153 1.15 augustss /* Timeout */
1154 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1155 1.49.2.1 wrstuden xfer->status = USBD_TIMEOUT;
1156 1.49.2.1 wrstuden usb_transfer_complete(xfer);
1157 1.15 augustss /* XXX should free TD */
1158 1.5 augustss }
1159 1.5 augustss
1160 1.5 augustss void
1161 1.5 augustss ohci_poll(bus)
1162 1.5 augustss struct usbd_bus *bus;
1163 1.5 augustss {
1164 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1165 1.5 augustss
1166 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1167 1.49.2.1 wrstuden ohci_intr1(sc);
1168 1.1 augustss }
1169 1.1 augustss
1170 1.1 augustss usbd_status
1171 1.49.2.1 wrstuden ohci_device_request(xfer)
1172 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1173 1.1 augustss {
1174 1.49.2.1 wrstuden struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1175 1.49.2.1 wrstuden usb_device_request_t *req = &xfer->request;
1176 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1177 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1178 1.1 augustss int addr = dev->address;
1179 1.48 augustss ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail;
1180 1.1 augustss ohci_soft_ed_t *sed;
1181 1.1 augustss int isread;
1182 1.1 augustss int len;
1183 1.49.2.1 wrstuden usbd_status err;
1184 1.1 augustss int s;
1185 1.1 augustss
1186 1.1 augustss isread = req->bmRequestType & UT_READ;
1187 1.1 augustss len = UGETW(req->wLength);
1188 1.1 augustss
1189 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1190 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1191 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1192 1.1 augustss UGETW(req->wIndex), len, addr,
1193 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1194 1.1 augustss
1195 1.1 augustss setup = opipe->tail;
1196 1.1 augustss stat = ohci_alloc_std(sc);
1197 1.49.2.1 wrstuden if (stat == NULL) {
1198 1.49.2.1 wrstuden err = USBD_NOMEM;
1199 1.1 augustss goto bad1;
1200 1.1 augustss }
1201 1.1 augustss tail = ohci_alloc_std(sc);
1202 1.49.2.1 wrstuden if (tail == NULL) {
1203 1.49.2.1 wrstuden err = USBD_NOMEM;
1204 1.1 augustss goto bad2;
1205 1.1 augustss }
1206 1.49.2.1 wrstuden tail->xfer = NULL;
1207 1.1 augustss
1208 1.1 augustss sed = opipe->sed;
1209 1.1 augustss opipe->u.ctl.length = len;
1210 1.1 augustss
1211 1.10 augustss /* Update device address and length since they may have changed. */
1212 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1213 1.39 augustss sed->ed.ed_flags = LE(
1214 1.39 augustss (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1215 1.16 augustss OHCI_ED_SET_FA(addr) |
1216 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1217 1.1 augustss
1218 1.1 augustss /* Set up data transaction */
1219 1.1 augustss if (len != 0) {
1220 1.48 augustss data = ohci_alloc_std(sc);
1221 1.49.2.1 wrstuden if (data == NULL) {
1222 1.49.2.1 wrstuden err = USBD_NOMEM;
1223 1.1 augustss goto bad3;
1224 1.1 augustss }
1225 1.48 augustss data->td.td_flags = LE(
1226 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1227 1.19 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1228 1.49.2.1 wrstuden (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1229 1.49.2.1 wrstuden data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf));
1230 1.48 augustss data->nexttd = stat;
1231 1.48 augustss data->td.td_nexttd = LE(stat->physaddr);
1232 1.48 augustss data->td.td_be = LE(LE(data->td.td_cbp) + len - 1);
1233 1.48 augustss data->len = len;
1234 1.49.2.1 wrstuden data->xfer = xfer;
1235 1.48 augustss data->flags = OHCI_ADD_LEN;
1236 1.1 augustss
1237 1.48 augustss next = data;
1238 1.34 augustss stat->flags = OHCI_CALL_DONE;
1239 1.34 augustss } else {
1240 1.1 augustss next = stat;
1241 1.48 augustss /* XXX ADD_LEN? */
1242 1.48 augustss stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1243 1.34 augustss }
1244 1.1 augustss
1245 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1246 1.1 augustss
1247 1.39 augustss setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1248 1.49.2.1 wrstuden OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1249 1.39 augustss setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1250 1.1 augustss setup->nexttd = next;
1251 1.39 augustss setup->td.td_nexttd = LE(next->physaddr);
1252 1.39 augustss setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1);
1253 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
1254 1.49.2.1 wrstuden setup->xfer = xfer;
1255 1.34 augustss setup->flags = 0;
1256 1.49.2.1 wrstuden xfer->hcpriv = setup;
1257 1.1 augustss
1258 1.39 augustss stat->td.td_flags = LE(
1259 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1260 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1261 1.39 augustss stat->td.td_cbp = 0;
1262 1.1 augustss stat->nexttd = tail;
1263 1.39 augustss stat->td.td_nexttd = LE(tail->physaddr);
1264 1.39 augustss stat->td.td_be = 0;
1265 1.1 augustss stat->len = 0;
1266 1.49.2.1 wrstuden stat->xfer = xfer;
1267 1.1 augustss
1268 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
1269 1.1 augustss if (ohcidebug > 5) {
1270 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1271 1.1 augustss ohci_dump_ed(sed);
1272 1.1 augustss ohci_dump_tds(setup);
1273 1.1 augustss }
1274 1.1 augustss #endif
1275 1.1 augustss
1276 1.1 augustss /* Insert ED in schedule */
1277 1.1 augustss s = splusb();
1278 1.1 augustss ohci_hash_add_td(sc, setup);
1279 1.1 augustss if (len != 0)
1280 1.48 augustss ohci_hash_add_td(sc, data);
1281 1.1 augustss ohci_hash_add_td(sc, stat);
1282 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1283 1.1 augustss opipe->tail = tail;
1284 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1285 1.49.2.1 wrstuden if (xfer->timeout && !sc->sc_bus.use_polling) {
1286 1.49.2.1 wrstuden usb_timeout(ohci_timeout, xfer,
1287 1.49.2.1 wrstuden MS_TO_TICKS(xfer->timeout), xfer->timo_handle);
1288 1.15 augustss }
1289 1.1 augustss splx(s);
1290 1.1 augustss
1291 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
1292 1.1 augustss if (ohcidebug > 5) {
1293 1.49.2.1 wrstuden usb_delay_ms(&sc->sc_bus, 5);
1294 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1295 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1296 1.1 augustss ohci_dump_ed(sed);
1297 1.1 augustss ohci_dump_tds(setup);
1298 1.1 augustss }
1299 1.1 augustss #endif
1300 1.1 augustss
1301 1.1 augustss return (USBD_NORMAL_COMPLETION);
1302 1.1 augustss
1303 1.1 augustss bad3:
1304 1.1 augustss ohci_free_std(sc, tail);
1305 1.1 augustss bad2:
1306 1.1 augustss ohci_free_std(sc, stat);
1307 1.1 augustss bad1:
1308 1.49.2.1 wrstuden return (err);
1309 1.1 augustss }
1310 1.1 augustss
1311 1.1 augustss /*
1312 1.1 augustss * Add an ED to the schedule. Called at splusb().
1313 1.1 augustss */
1314 1.1 augustss void
1315 1.3 augustss ohci_add_ed(sed, head)
1316 1.1 augustss ohci_soft_ed_t *sed;
1317 1.1 augustss ohci_soft_ed_t *head;
1318 1.1 augustss {
1319 1.46 augustss SPLUSBCHECK;
1320 1.1 augustss sed->next = head->next;
1321 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1322 1.1 augustss head->next = sed;
1323 1.39 augustss head->ed.ed_nexted = LE(sed->physaddr);
1324 1.1 augustss }
1325 1.1 augustss
1326 1.1 augustss /*
1327 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1328 1.3 augustss */
1329 1.3 augustss void
1330 1.3 augustss ohci_rem_ed(sed, head)
1331 1.3 augustss ohci_soft_ed_t *sed;
1332 1.3 augustss ohci_soft_ed_t *head;
1333 1.3 augustss {
1334 1.3 augustss ohci_soft_ed_t *p;
1335 1.3 augustss
1336 1.46 augustss SPLUSBCHECK;
1337 1.46 augustss
1338 1.3 augustss /* XXX */
1339 1.49.2.1 wrstuden for (p = head; p == NULL && p->next != sed; p = p->next)
1340 1.3 augustss ;
1341 1.49.2.1 wrstuden if (p == NULL)
1342 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1343 1.3 augustss p->next = sed->next;
1344 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1345 1.3 augustss }
1346 1.3 augustss
1347 1.3 augustss /*
1348 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1349 1.1 augustss * the host controller. This queue is the processed by software.
1350 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1351 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1352 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1353 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1354 1.1 augustss * hash value.
1355 1.1 augustss */
1356 1.1 augustss
1357 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1358 1.1 augustss /* Called at splusb() */
1359 1.1 augustss void
1360 1.1 augustss ohci_hash_add_td(sc, std)
1361 1.1 augustss ohci_softc_t *sc;
1362 1.1 augustss ohci_soft_td_t *std;
1363 1.1 augustss {
1364 1.1 augustss int h = HASH(std->physaddr);
1365 1.1 augustss
1366 1.46 augustss SPLUSBCHECK;
1367 1.46 augustss
1368 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1369 1.1 augustss }
1370 1.1 augustss
1371 1.1 augustss /* Called at splusb() */
1372 1.1 augustss void
1373 1.1 augustss ohci_hash_rem_td(sc, std)
1374 1.1 augustss ohci_softc_t *sc;
1375 1.1 augustss ohci_soft_td_t *std;
1376 1.1 augustss {
1377 1.46 augustss SPLUSBCHECK;
1378 1.46 augustss
1379 1.1 augustss LIST_REMOVE(std, hnext);
1380 1.1 augustss }
1381 1.1 augustss
1382 1.1 augustss ohci_soft_td_t *
1383 1.1 augustss ohci_hash_find_td(sc, a)
1384 1.1 augustss ohci_softc_t *sc;
1385 1.1 augustss ohci_physaddr_t a;
1386 1.1 augustss {
1387 1.1 augustss int h = HASH(a);
1388 1.1 augustss ohci_soft_td_t *std;
1389 1.1 augustss
1390 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1391 1.49.2.1 wrstuden std != NULL;
1392 1.1 augustss std = LIST_NEXT(std, hnext))
1393 1.1 augustss if (std->physaddr == a)
1394 1.1 augustss return (std);
1395 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1396 1.1 augustss }
1397 1.1 augustss
1398 1.1 augustss void
1399 1.1 augustss ohci_timeout(addr)
1400 1.1 augustss void *addr;
1401 1.1 augustss {
1402 1.49.2.1 wrstuden usbd_xfer_handle xfer = addr;
1403 1.48 augustss int s;
1404 1.1 augustss
1405 1.49.2.1 wrstuden DPRINTF(("ohci_timeout: xfer=%p\n", xfer));
1406 1.45 augustss
1407 1.48 augustss s = splusb();
1408 1.49.2.1 wrstuden xfer->device->bus->intr_context++;
1409 1.49.2.1 wrstuden ohci_abort_xfer(xfer, USBD_TIMEOUT);
1410 1.49.2.1 wrstuden xfer->device->bus->intr_context--;
1411 1.48 augustss splx(s);
1412 1.1 augustss }
1413 1.1 augustss
1414 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
1415 1.1 augustss void
1416 1.1 augustss ohci_dump_tds(std)
1417 1.1 augustss ohci_soft_td_t *std;
1418 1.1 augustss {
1419 1.1 augustss for (; std; std = std->nexttd)
1420 1.1 augustss ohci_dump_td(std);
1421 1.1 augustss }
1422 1.1 augustss
1423 1.1 augustss void
1424 1.1 augustss ohci_dump_td(std)
1425 1.1 augustss ohci_soft_td_t *std;
1426 1.1 augustss {
1427 1.41 augustss DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1428 1.41 augustss "nexttd=0x%08lx be=0x%08lx\n",
1429 1.41 augustss std, (u_long)std->physaddr,
1430 1.41 augustss (int)LE(std->td.td_flags),
1431 1.41 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1432 1.41 augustss OHCI_TD_GET_DI(LE(std->td.td_flags)),
1433 1.41 augustss OHCI_TD_GET_EC(LE(std->td.td_flags)),
1434 1.41 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
1435 1.41 augustss (u_long)LE(std->td.td_cbp),
1436 1.41 augustss (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be)));
1437 1.1 augustss }
1438 1.1 augustss
1439 1.1 augustss void
1440 1.1 augustss ohci_dump_ed(sed)
1441 1.1 augustss ohci_soft_ed_t *sed;
1442 1.1 augustss {
1443 1.41 augustss DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1444 1.41 augustss "headp=%b nexted=0x%08lx\n",
1445 1.41 augustss sed, (u_long)sed->physaddr,
1446 1.41 augustss OHCI_ED_GET_FA(LE(sed->ed.ed_flags)),
1447 1.41 augustss OHCI_ED_GET_EN(LE(sed->ed.ed_flags)),
1448 1.41 augustss OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)),
1449 1.41 augustss (int)LE(sed->ed.ed_flags),
1450 1.41 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1451 1.41 augustss (u_long)LE(sed->ed.ed_tailp),
1452 1.49.2.1 wrstuden (u_long)LE(sed->ed.ed_headp),
1453 1.49.2.1 wrstuden "\20\1HALT\2CARRY",
1454 1.41 augustss (u_long)LE(sed->ed.ed_nexted)));
1455 1.1 augustss }
1456 1.1 augustss #endif
1457 1.1 augustss
1458 1.1 augustss usbd_status
1459 1.1 augustss ohci_open(pipe)
1460 1.1 augustss usbd_pipe_handle pipe;
1461 1.1 augustss {
1462 1.1 augustss usbd_device_handle dev = pipe->device;
1463 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1464 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1465 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1466 1.1 augustss u_int8_t addr = dev->address;
1467 1.1 augustss ohci_soft_ed_t *sed;
1468 1.1 augustss ohci_soft_td_t *std;
1469 1.49.2.1 wrstuden usbd_status err;
1470 1.1 augustss int s;
1471 1.1 augustss
1472 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1473 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1474 1.1 augustss if (addr == sc->sc_addr) {
1475 1.1 augustss switch (ed->bEndpointAddress) {
1476 1.1 augustss case USB_CONTROL_ENDPOINT:
1477 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1478 1.1 augustss break;
1479 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
1480 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1481 1.1 augustss break;
1482 1.1 augustss default:
1483 1.1 augustss return (USBD_INVAL);
1484 1.1 augustss }
1485 1.1 augustss } else {
1486 1.1 augustss sed = ohci_alloc_sed(sc);
1487 1.49.2.1 wrstuden if (sed == NULL)
1488 1.1 augustss goto bad0;
1489 1.1 augustss std = ohci_alloc_std(sc);
1490 1.49.2.1 wrstuden if (std == NULL)
1491 1.1 augustss goto bad1;
1492 1.1 augustss opipe->sed = sed;
1493 1.1 augustss opipe->tail = std;
1494 1.39 augustss sed->ed.ed_flags = LE(
1495 1.1 augustss OHCI_ED_SET_FA(addr) |
1496 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1497 1.1 augustss OHCI_ED_DIR_TD |
1498 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1499 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1500 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1501 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1502 1.39 augustss sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr);
1503 1.1 augustss
1504 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1505 1.1 augustss case UE_CONTROL:
1506 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1507 1.49.2.1 wrstuden err = usb_allocmem(&sc->sc_bus,
1508 1.49.2.1 wrstuden sizeof(usb_device_request_t),
1509 1.49.2.1 wrstuden 0, &opipe->u.ctl.reqdma);
1510 1.49.2.1 wrstuden if (err)
1511 1.1 augustss goto bad;
1512 1.1 augustss s = splusb();
1513 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1514 1.1 augustss splx(s);
1515 1.1 augustss break;
1516 1.1 augustss case UE_INTERRUPT:
1517 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1518 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1519 1.1 augustss case UE_ISOCHRONOUS:
1520 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1521 1.43 augustss return (USBD_INVAL);
1522 1.1 augustss case UE_BULK:
1523 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1524 1.3 augustss s = splusb();
1525 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1526 1.3 augustss splx(s);
1527 1.3 augustss break;
1528 1.1 augustss }
1529 1.1 augustss }
1530 1.1 augustss return (USBD_NORMAL_COMPLETION);
1531 1.1 augustss
1532 1.1 augustss bad:
1533 1.1 augustss ohci_free_std(sc, std);
1534 1.1 augustss bad1:
1535 1.1 augustss ohci_free_sed(sc, sed);
1536 1.1 augustss bad0:
1537 1.1 augustss return (USBD_NOMEM);
1538 1.1 augustss
1539 1.1 augustss }
1540 1.1 augustss
1541 1.1 augustss /*
1542 1.34 augustss * Close a reqular pipe.
1543 1.34 augustss * Assumes that there are no pending transactions.
1544 1.34 augustss */
1545 1.34 augustss void
1546 1.34 augustss ohci_close_pipe(pipe, head)
1547 1.34 augustss usbd_pipe_handle pipe;
1548 1.34 augustss ohci_soft_ed_t *head;
1549 1.34 augustss {
1550 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1551 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1552 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
1553 1.34 augustss int s;
1554 1.34 augustss
1555 1.34 augustss s = splusb();
1556 1.34 augustss #ifdef DIAGNOSTIC
1557 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
1558 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1559 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK))) {
1560 1.39 augustss ohci_physaddr_t td = sed->ed.ed_headp;
1561 1.34 augustss ohci_soft_td_t *std;
1562 1.34 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1563 1.49.2.1 wrstuden std != NULL;
1564 1.34 augustss std = LIST_NEXT(std, hnext))
1565 1.34 augustss if (std->physaddr == td)
1566 1.34 augustss break;
1567 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1568 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
1569 1.39 augustss (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp),
1570 1.34 augustss pipe, std);
1571 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
1572 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1573 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
1574 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
1575 1.34 augustss }
1576 1.34 augustss #endif
1577 1.34 augustss ohci_rem_ed(sed, head);
1578 1.34 augustss splx(s);
1579 1.34 augustss ohci_free_std(sc, opipe->tail);
1580 1.34 augustss ohci_free_sed(sc, opipe->sed);
1581 1.34 augustss }
1582 1.34 augustss
1583 1.34 augustss /*
1584 1.34 augustss * Abort a device request.
1585 1.34 augustss * If this routine is called at splusb() it guarantees that the request
1586 1.34 augustss * will be removed from the hardware scheduling and that the callback
1587 1.34 augustss * for it will be called with USBD_CANCELLED status.
1588 1.34 augustss * It's impossible to guarantee that the requested transfer will not
1589 1.34 augustss * have happened since the hardware runs concurrently.
1590 1.34 augustss * If the transaction has already happened we rely on the ordinary
1591 1.34 augustss * interrupt processing to process it.
1592 1.34 augustss */
1593 1.34 augustss void
1594 1.49.2.1 wrstuden ohci_abort_xfer(xfer, status)
1595 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1596 1.38 augustss usbd_status status;
1597 1.34 augustss {
1598 1.49.2.1 wrstuden struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1599 1.34 augustss ohci_soft_ed_t *sed;
1600 1.34 augustss
1601 1.49.2.1 wrstuden DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe));
1602 1.34 augustss
1603 1.49.2.1 wrstuden xfer->status = status;
1604 1.34 augustss
1605 1.49.2.1 wrstuden usb_untimeout(ohci_timeout, xfer, xfer->timo_handle);
1606 1.34 augustss
1607 1.34 augustss sed = opipe->sed;
1608 1.49.2.1 wrstuden DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
1609 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1610 1.34 augustss
1611 1.49.2.1 wrstuden if (xfer->device->bus->intr_context) {
1612 1.44 augustss /* We have no process context, so we can't use tsleep(). */
1613 1.49.2.1 wrstuden timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND);
1614 1.44 augustss } else {
1615 1.49.2.1 wrstuden #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
1616 1.49.2.1 wrstuden KASSERT(intr_nesting_level == 0,
1617 1.49.2.1 wrstuden ("ohci_abort_req in interrupt context"));
1618 1.49.2.1 wrstuden #endif
1619 1.38 augustss usb_delay_ms(opipe->pipe.device->bus, 1);
1620 1.49.2.1 wrstuden ohci_abort_xfer_end(xfer);
1621 1.38 augustss }
1622 1.38 augustss }
1623 1.38 augustss
1624 1.38 augustss void
1625 1.49.2.1 wrstuden ohci_abort_xfer_end(v)
1626 1.38 augustss void *v;
1627 1.38 augustss {
1628 1.49.2.1 wrstuden usbd_xfer_handle xfer = v;
1629 1.49.2.1 wrstuden struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1630 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1631 1.38 augustss ohci_soft_ed_t *sed;
1632 1.38 augustss ohci_soft_td_t *p, *n;
1633 1.38 augustss int s;
1634 1.38 augustss
1635 1.38 augustss s = splusb();
1636 1.38 augustss
1637 1.49.2.1 wrstuden p = xfer->hcpriv;
1638 1.34 augustss #ifdef DIAGNOSTIC
1639 1.49.2.1 wrstuden if (p == NULL) {
1640 1.49.2.1 wrstuden printf("ohci_abort_xfer: hcpriv==0\n");
1641 1.38 augustss return;
1642 1.38 augustss }
1643 1.34 augustss #endif
1644 1.49.2.1 wrstuden for (; p->xfer == xfer; p = n) {
1645 1.38 augustss n = p->nexttd;
1646 1.38 augustss ohci_hash_rem_td(sc, p);
1647 1.38 augustss ohci_free_std(sc, p);
1648 1.34 augustss }
1649 1.34 augustss
1650 1.38 augustss sed = opipe->sed;
1651 1.49.2.1 wrstuden DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n",
1652 1.39 augustss (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp)));
1653 1.39 augustss sed->ed.ed_headp = p->physaddr; /* unlink TDs */
1654 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1655 1.38 augustss
1656 1.49.2.1 wrstuden usb_transfer_complete(xfer);
1657 1.38 augustss
1658 1.34 augustss splx(s);
1659 1.34 augustss }
1660 1.34 augustss
1661 1.34 augustss /*
1662 1.1 augustss * Data structures and routines to emulate the root hub.
1663 1.1 augustss */
1664 1.49.2.1 wrstuden static usb_device_descriptor_t ohci_devd = {
1665 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1666 1.1 augustss UDESC_DEVICE, /* type */
1667 1.1 augustss {0x00, 0x01}, /* USB version */
1668 1.1 augustss UCLASS_HUB, /* class */
1669 1.1 augustss USUBCLASS_HUB, /* subclass */
1670 1.1 augustss 0, /* protocol */
1671 1.1 augustss 64, /* max packet */
1672 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1673 1.1 augustss 1,2,0, /* string indicies */
1674 1.1 augustss 1 /* # of configurations */
1675 1.1 augustss };
1676 1.1 augustss
1677 1.49.2.1 wrstuden static usb_config_descriptor_t ohci_confd = {
1678 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1679 1.1 augustss UDESC_CONFIG,
1680 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1681 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1682 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1683 1.1 augustss 1,
1684 1.1 augustss 1,
1685 1.1 augustss 0,
1686 1.1 augustss UC_SELF_POWERED,
1687 1.1 augustss 0 /* max power */
1688 1.1 augustss };
1689 1.1 augustss
1690 1.49.2.1 wrstuden static usb_interface_descriptor_t ohci_ifcd = {
1691 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1692 1.1 augustss UDESC_INTERFACE,
1693 1.1 augustss 0,
1694 1.1 augustss 0,
1695 1.1 augustss 1,
1696 1.1 augustss UCLASS_HUB,
1697 1.1 augustss USUBCLASS_HUB,
1698 1.1 augustss 0,
1699 1.1 augustss 0
1700 1.1 augustss };
1701 1.1 augustss
1702 1.49.2.1 wrstuden static usb_endpoint_descriptor_t ohci_endpd = {
1703 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1704 1.1 augustss UDESC_ENDPOINT,
1705 1.40 augustss UE_DIR_IN | OHCI_INTR_ENDPT,
1706 1.1 augustss UE_INTERRUPT,
1707 1.1 augustss {8, 0}, /* max packet */
1708 1.1 augustss 255
1709 1.1 augustss };
1710 1.1 augustss
1711 1.49.2.1 wrstuden static usb_hub_descriptor_t ohci_hubd = {
1712 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1713 1.1 augustss UDESC_HUB,
1714 1.1 augustss 0,
1715 1.1 augustss {0,0},
1716 1.1 augustss 0,
1717 1.1 augustss 0,
1718 1.1 augustss {0},
1719 1.1 augustss };
1720 1.1 augustss
1721 1.49.2.1 wrstuden static int
1722 1.1 augustss ohci_str(p, l, s)
1723 1.1 augustss usb_string_descriptor_t *p;
1724 1.1 augustss int l;
1725 1.1 augustss char *s;
1726 1.1 augustss {
1727 1.1 augustss int i;
1728 1.1 augustss
1729 1.1 augustss if (l == 0)
1730 1.1 augustss return (0);
1731 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1732 1.1 augustss if (l == 1)
1733 1.1 augustss return (1);
1734 1.1 augustss p->bDescriptorType = UDESC_STRING;
1735 1.1 augustss l -= 2;
1736 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1737 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1738 1.1 augustss return (2*i+2);
1739 1.1 augustss }
1740 1.1 augustss
1741 1.1 augustss /*
1742 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1743 1.1 augustss */
1744 1.49.2.1 wrstuden static usbd_status
1745 1.49.2.1 wrstuden ohci_root_ctrl_transfer(xfer)
1746 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1747 1.1 augustss {
1748 1.49.2.1 wrstuden usbd_status err;
1749 1.17 augustss
1750 1.46 augustss /* Insert last in queue. */
1751 1.49.2.1 wrstuden err = usb_insert_transfer(xfer);
1752 1.49.2.1 wrstuden if (err)
1753 1.49.2.1 wrstuden return (err);
1754 1.46 augustss
1755 1.46 augustss /* Pipe isn't running, start first */
1756 1.49.2.1 wrstuden return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1757 1.17 augustss }
1758 1.17 augustss
1759 1.49.2.1 wrstuden static usbd_status
1760 1.49.2.1 wrstuden ohci_root_ctrl_start(xfer)
1761 1.49.2.1 wrstuden usbd_xfer_handle xfer;
1762 1.17 augustss {
1763 1.49.2.1 wrstuden ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
1764 1.1 augustss usb_device_request_t *req;
1765 1.49.2.1 wrstuden void *buf = NULL;
1766 1.1 augustss int port, i;
1767 1.46 augustss int s, len, value, index, l, totlen = 0;
1768 1.1 augustss usb_port_status_t ps;
1769 1.1 augustss usb_hub_descriptor_t hubd;
1770 1.49.2.1 wrstuden usbd_status err;
1771 1.1 augustss u_int32_t v;
1772 1.1 augustss
1773 1.42 augustss #ifdef DIAGNOSTIC
1774 1.49.2.1 wrstuden if (!(xfer->rqflags & URQ_REQUEST))
1775 1.1 augustss /* XXX panic */
1776 1.1 augustss return (USBD_INVAL);
1777 1.42 augustss #endif
1778 1.49.2.1 wrstuden req = &xfer->request;
1779 1.1 augustss
1780 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1781 1.1 augustss req->bmRequestType, req->bRequest));
1782 1.1 augustss
1783 1.1 augustss len = UGETW(req->wLength);
1784 1.1 augustss value = UGETW(req->wValue);
1785 1.1 augustss index = UGETW(req->wIndex);
1786 1.43 augustss
1787 1.43 augustss if (len != 0)
1788 1.49.2.1 wrstuden buf = KERNADDR(&xfer->dmabuf);
1789 1.43 augustss
1790 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1791 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1792 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1793 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1794 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1795 1.1 augustss /*
1796 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1797 1.1 augustss * for the integrated root hub.
1798 1.1 augustss */
1799 1.1 augustss break;
1800 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1801 1.1 augustss if (len > 0) {
1802 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1803 1.1 augustss totlen = 1;
1804 1.1 augustss }
1805 1.1 augustss break;
1806 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1807 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1808 1.1 augustss switch(value >> 8) {
1809 1.1 augustss case UDESC_DEVICE:
1810 1.1 augustss if ((value & 0xff) != 0) {
1811 1.49.2.1 wrstuden err = USBD_IOERROR;
1812 1.1 augustss goto ret;
1813 1.1 augustss }
1814 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1815 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1816 1.1 augustss memcpy(buf, &ohci_devd, l);
1817 1.1 augustss break;
1818 1.1 augustss case UDESC_CONFIG:
1819 1.1 augustss if ((value & 0xff) != 0) {
1820 1.49.2.1 wrstuden err = USBD_IOERROR;
1821 1.1 augustss goto ret;
1822 1.1 augustss }
1823 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1824 1.1 augustss memcpy(buf, &ohci_confd, l);
1825 1.1 augustss buf = (char *)buf + l;
1826 1.1 augustss len -= l;
1827 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1828 1.1 augustss totlen += l;
1829 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1830 1.1 augustss buf = (char *)buf + l;
1831 1.1 augustss len -= l;
1832 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1833 1.1 augustss totlen += l;
1834 1.1 augustss memcpy(buf, &ohci_endpd, l);
1835 1.1 augustss break;
1836 1.1 augustss case UDESC_STRING:
1837 1.1 augustss if (len == 0)
1838 1.1 augustss break;
1839 1.1 augustss *(u_int8_t *)buf = 0;
1840 1.1 augustss totlen = 1;
1841 1.1 augustss switch (value & 0xff) {
1842 1.1 augustss case 1: /* Vendor */
1843 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1844 1.1 augustss break;
1845 1.1 augustss case 2: /* Product */
1846 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1847 1.1 augustss break;
1848 1.1 augustss }
1849 1.1 augustss break;
1850 1.1 augustss default:
1851 1.49.2.1 wrstuden err = USBD_IOERROR;
1852 1.1 augustss goto ret;
1853 1.1 augustss }
1854 1.1 augustss break;
1855 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1856 1.1 augustss if (len > 0) {
1857 1.1 augustss *(u_int8_t *)buf = 0;
1858 1.1 augustss totlen = 1;
1859 1.1 augustss }
1860 1.1 augustss break;
1861 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1862 1.1 augustss if (len > 1) {
1863 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1864 1.1 augustss totlen = 2;
1865 1.1 augustss }
1866 1.1 augustss break;
1867 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1868 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1869 1.1 augustss if (len > 1) {
1870 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1871 1.1 augustss totlen = 2;
1872 1.1 augustss }
1873 1.1 augustss break;
1874 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1875 1.1 augustss if (value >= USB_MAX_DEVICES) {
1876 1.49.2.1 wrstuden err = USBD_IOERROR;
1877 1.1 augustss goto ret;
1878 1.1 augustss }
1879 1.1 augustss sc->sc_addr = value;
1880 1.1 augustss break;
1881 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1882 1.1 augustss if (value != 0 && value != 1) {
1883 1.49.2.1 wrstuden err = USBD_IOERROR;
1884 1.1 augustss goto ret;
1885 1.1 augustss }
1886 1.1 augustss sc->sc_conf = value;
1887 1.1 augustss break;
1888 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1889 1.1 augustss break;
1890 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1891 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1892 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1893 1.49.2.1 wrstuden err = USBD_IOERROR;
1894 1.1 augustss goto ret;
1895 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1896 1.1 augustss break;
1897 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1898 1.1 augustss break;
1899 1.1 augustss /* Hub requests */
1900 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1901 1.1 augustss break;
1902 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1903 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1904 1.14 augustss "port=%d feature=%d\n",
1905 1.1 augustss index, value));
1906 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1907 1.49.2.1 wrstuden err = USBD_IOERROR;
1908 1.1 augustss goto ret;
1909 1.1 augustss }
1910 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1911 1.1 augustss switch(value) {
1912 1.1 augustss case UHF_PORT_ENABLE:
1913 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1914 1.1 augustss break;
1915 1.1 augustss case UHF_PORT_SUSPEND:
1916 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1917 1.1 augustss break;
1918 1.1 augustss case UHF_PORT_POWER:
1919 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1920 1.1 augustss break;
1921 1.1 augustss case UHF_C_PORT_CONNECTION:
1922 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1923 1.1 augustss break;
1924 1.1 augustss case UHF_C_PORT_ENABLE:
1925 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1926 1.1 augustss break;
1927 1.1 augustss case UHF_C_PORT_SUSPEND:
1928 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1929 1.1 augustss break;
1930 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1931 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1932 1.1 augustss break;
1933 1.1 augustss case UHF_C_PORT_RESET:
1934 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1935 1.1 augustss break;
1936 1.1 augustss default:
1937 1.49.2.1 wrstuden err = USBD_IOERROR;
1938 1.1 augustss goto ret;
1939 1.1 augustss }
1940 1.1 augustss switch(value) {
1941 1.1 augustss case UHF_C_PORT_CONNECTION:
1942 1.1 augustss case UHF_C_PORT_ENABLE:
1943 1.1 augustss case UHF_C_PORT_SUSPEND:
1944 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1945 1.1 augustss case UHF_C_PORT_RESET:
1946 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1947 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1948 1.1 augustss ohci_rhsc_able(sc, 1);
1949 1.1 augustss break;
1950 1.1 augustss default:
1951 1.1 augustss break;
1952 1.1 augustss }
1953 1.1 augustss break;
1954 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1955 1.1 augustss if (value != 0) {
1956 1.49.2.1 wrstuden err = USBD_IOERROR;
1957 1.1 augustss goto ret;
1958 1.1 augustss }
1959 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1960 1.1 augustss hubd = ohci_hubd;
1961 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1962 1.15 augustss USETW(hubd.wHubCharacteristics,
1963 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1964 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1965 1.1 augustss /* XXX overcurrent */
1966 1.1 augustss );
1967 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1968 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1969 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1970 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
1971 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1972 1.1 augustss l = min(len, hubd.bDescLength);
1973 1.1 augustss totlen = l;
1974 1.1 augustss memcpy(buf, &hubd, l);
1975 1.1 augustss break;
1976 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1977 1.1 augustss if (len != 4) {
1978 1.49.2.1 wrstuden err = USBD_IOERROR;
1979 1.1 augustss goto ret;
1980 1.1 augustss }
1981 1.1 augustss memset(buf, 0, len); /* ? XXX */
1982 1.1 augustss totlen = len;
1983 1.1 augustss break;
1984 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1985 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1986 1.1 augustss index));
1987 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1988 1.49.2.1 wrstuden err = USBD_IOERROR;
1989 1.1 augustss goto ret;
1990 1.1 augustss }
1991 1.1 augustss if (len != 4) {
1992 1.49.2.1 wrstuden err = USBD_IOERROR;
1993 1.1 augustss goto ret;
1994 1.1 augustss }
1995 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1996 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1997 1.1 augustss v));
1998 1.1 augustss USETW(ps.wPortStatus, v);
1999 1.1 augustss USETW(ps.wPortChange, v >> 16);
2000 1.1 augustss l = min(len, sizeof ps);
2001 1.1 augustss memcpy(buf, &ps, l);
2002 1.1 augustss totlen = l;
2003 1.1 augustss break;
2004 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2005 1.49.2.1 wrstuden err = USBD_IOERROR;
2006 1.1 augustss goto ret;
2007 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2008 1.1 augustss break;
2009 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2010 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2011 1.49.2.1 wrstuden err = USBD_IOERROR;
2012 1.1 augustss goto ret;
2013 1.1 augustss }
2014 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2015 1.1 augustss switch(value) {
2016 1.1 augustss case UHF_PORT_ENABLE:
2017 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2018 1.1 augustss break;
2019 1.1 augustss case UHF_PORT_SUSPEND:
2020 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2021 1.1 augustss break;
2022 1.1 augustss case UHF_PORT_RESET:
2023 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2024 1.14 augustss index));
2025 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2026 1.1 augustss for (i = 0; i < 10; i++) {
2027 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
2028 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2029 1.1 augustss break;
2030 1.1 augustss }
2031 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2032 1.1 augustss index, OREAD4(sc, port)));
2033 1.1 augustss break;
2034 1.1 augustss case UHF_PORT_POWER:
2035 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2036 1.14 augustss "%d\n", index));
2037 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2038 1.1 augustss break;
2039 1.1 augustss default:
2040 1.49.2.1 wrstuden err = USBD_IOERROR;
2041 1.1 augustss goto ret;
2042 1.1 augustss }
2043 1.1 augustss break;
2044 1.1 augustss default:
2045 1.49.2.1 wrstuden err = USBD_IOERROR;
2046 1.1 augustss goto ret;
2047 1.1 augustss }
2048 1.49.2.1 wrstuden xfer->actlen = totlen;
2049 1.49.2.1 wrstuden err = USBD_NORMAL_COMPLETION;
2050 1.1 augustss ret:
2051 1.49.2.1 wrstuden xfer->status = err;
2052 1.46 augustss s = splusb();
2053 1.49.2.1 wrstuden usb_transfer_complete(xfer);
2054 1.46 augustss splx(s);
2055 1.1 augustss return (USBD_IN_PROGRESS);
2056 1.1 augustss }
2057 1.1 augustss
2058 1.1 augustss /* Abort a root control request. */
2059 1.49.2.1 wrstuden static void
2060 1.49.2.1 wrstuden ohci_root_ctrl_abort(xfer)
2061 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2062 1.1 augustss {
2063 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2064 1.1 augustss }
2065 1.1 augustss
2066 1.1 augustss /* Close the root pipe. */
2067 1.49.2.1 wrstuden static void
2068 1.1 augustss ohci_root_ctrl_close(pipe)
2069 1.1 augustss usbd_pipe_handle pipe;
2070 1.1 augustss {
2071 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2072 1.34 augustss /* Nothing to do. */
2073 1.1 augustss }
2074 1.1 augustss
2075 1.49.2.1 wrstuden static usbd_status
2076 1.49.2.1 wrstuden ohci_root_intr_transfer(xfer)
2077 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2078 1.1 augustss {
2079 1.49.2.1 wrstuden usbd_status err;
2080 1.17 augustss
2081 1.46 augustss /* Insert last in queue. */
2082 1.49.2.1 wrstuden err = usb_insert_transfer(xfer);
2083 1.49.2.1 wrstuden if (err)
2084 1.49.2.1 wrstuden return (err);
2085 1.46 augustss
2086 1.46 augustss /* Pipe isn't running, start first */
2087 1.49.2.1 wrstuden return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2088 1.17 augustss }
2089 1.17 augustss
2090 1.49.2.1 wrstuden static usbd_status
2091 1.49.2.1 wrstuden ohci_root_intr_start(xfer)
2092 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2093 1.17 augustss {
2094 1.49.2.1 wrstuden usbd_pipe_handle pipe = xfer->pipe;
2095 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2096 1.1 augustss
2097 1.49.2.1 wrstuden sc->sc_intrxfer = xfer;
2098 1.1 augustss
2099 1.1 augustss return (USBD_IN_PROGRESS);
2100 1.1 augustss }
2101 1.1 augustss
2102 1.3 augustss /* Abort a root interrupt request. */
2103 1.49.2.1 wrstuden static void
2104 1.49.2.1 wrstuden ohci_root_intr_abort(xfer)
2105 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2106 1.1 augustss {
2107 1.49.2.1 wrstuden int s;
2108 1.49.2.1 wrstuden
2109 1.49.2.1 wrstuden if (xfer->pipe->intrxfer == xfer) {
2110 1.49.2.1 wrstuden DPRINTF(("ohci_root_intr_abort: remove\n"));
2111 1.49.2.1 wrstuden xfer->pipe->intrxfer = NULL;
2112 1.49.2.1 wrstuden }
2113 1.49.2.1 wrstuden xfer->status = USBD_CANCELLED;
2114 1.49.2.1 wrstuden s = splusb();
2115 1.49.2.1 wrstuden usb_transfer_complete(xfer);
2116 1.49.2.1 wrstuden splx(s);
2117 1.1 augustss }
2118 1.1 augustss
2119 1.1 augustss /* Close the root pipe. */
2120 1.49.2.1 wrstuden static void
2121 1.1 augustss ohci_root_intr_close(pipe)
2122 1.1 augustss usbd_pipe_handle pipe;
2123 1.1 augustss {
2124 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2125 1.1 augustss
2126 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2127 1.34 augustss
2128 1.49.2.1 wrstuden sc->sc_intrxfer = NULL;
2129 1.1 augustss }
2130 1.1 augustss
2131 1.1 augustss /************************/
2132 1.1 augustss
2133 1.49.2.1 wrstuden static usbd_status
2134 1.49.2.1 wrstuden ohci_device_ctrl_transfer(xfer)
2135 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2136 1.1 augustss {
2137 1.49.2.1 wrstuden usbd_status err;
2138 1.17 augustss
2139 1.46 augustss /* Insert last in queue. */
2140 1.49.2.1 wrstuden err = usb_insert_transfer(xfer);
2141 1.49.2.1 wrstuden if (err)
2142 1.49.2.1 wrstuden return (err);
2143 1.46 augustss
2144 1.46 augustss /* Pipe isn't running, start first */
2145 1.49.2.1 wrstuden return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2146 1.17 augustss }
2147 1.17 augustss
2148 1.49.2.1 wrstuden static usbd_status
2149 1.49.2.1 wrstuden ohci_device_ctrl_start(xfer)
2150 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2151 1.17 augustss {
2152 1.49.2.1 wrstuden ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2153 1.49.2.1 wrstuden usbd_status err;
2154 1.1 augustss
2155 1.42 augustss #ifdef DIAGNOSTIC
2156 1.49.2.1 wrstuden if (!(xfer->rqflags & URQ_REQUEST)) {
2157 1.1 augustss /* XXX panic */
2158 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2159 1.1 augustss return (USBD_INVAL);
2160 1.1 augustss }
2161 1.42 augustss #endif
2162 1.1 augustss
2163 1.49.2.1 wrstuden err = ohci_device_request(xfer);
2164 1.49.2.1 wrstuden if (err)
2165 1.49.2.1 wrstuden return (err);
2166 1.1 augustss
2167 1.6 augustss if (sc->sc_bus.use_polling)
2168 1.49.2.1 wrstuden ohci_waitintr(sc, xfer);
2169 1.1 augustss return (USBD_IN_PROGRESS);
2170 1.1 augustss }
2171 1.1 augustss
2172 1.1 augustss /* Abort a device control request. */
2173 1.49.2.1 wrstuden static void
2174 1.49.2.1 wrstuden ohci_device_ctrl_abort(xfer)
2175 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2176 1.1 augustss {
2177 1.49.2.1 wrstuden DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2178 1.49.2.1 wrstuden ohci_abort_xfer(xfer, USBD_CANCELLED);
2179 1.1 augustss }
2180 1.1 augustss
2181 1.1 augustss /* Close a device control pipe. */
2182 1.49.2.1 wrstuden static void
2183 1.1 augustss ohci_device_ctrl_close(pipe)
2184 1.1 augustss usbd_pipe_handle pipe;
2185 1.1 augustss {
2186 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2187 1.1 augustss
2188 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2189 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2190 1.3 augustss }
2191 1.3 augustss
2192 1.3 augustss /************************/
2193 1.37 augustss
2194 1.49.2.1 wrstuden static void
2195 1.37 augustss ohci_device_clear_toggle(pipe)
2196 1.37 augustss usbd_pipe_handle pipe;
2197 1.37 augustss {
2198 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2199 1.37 augustss
2200 1.39 augustss opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY);
2201 1.37 augustss }
2202 1.37 augustss
2203 1.49.2.1 wrstuden static void
2204 1.37 augustss ohci_noop(pipe)
2205 1.37 augustss usbd_pipe_handle pipe;
2206 1.37 augustss {
2207 1.37 augustss }
2208 1.3 augustss
2209 1.49.2.1 wrstuden static usbd_status
2210 1.49.2.1 wrstuden ohci_device_bulk_transfer(xfer)
2211 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2212 1.3 augustss {
2213 1.49.2.1 wrstuden usbd_status err;
2214 1.17 augustss
2215 1.46 augustss /* Insert last in queue. */
2216 1.49.2.1 wrstuden err = usb_insert_transfer(xfer);
2217 1.49.2.1 wrstuden if (err)
2218 1.49.2.1 wrstuden return (err);
2219 1.46 augustss
2220 1.46 augustss /* Pipe isn't running, start first */
2221 1.49.2.1 wrstuden return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2222 1.17 augustss }
2223 1.17 augustss
2224 1.49.2.1 wrstuden static usbd_status
2225 1.49.2.1 wrstuden ohci_device_bulk_start(xfer)
2226 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2227 1.17 augustss {
2228 1.49.2.1 wrstuden struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2229 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2230 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2231 1.3 augustss int addr = dev->address;
2232 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2233 1.3 augustss ohci_soft_ed_t *sed;
2234 1.40 augustss int s, len, isread, endpt;
2235 1.49.2.1 wrstuden usbd_status err;
2236 1.3 augustss
2237 1.34 augustss #ifdef DIAGNOSTIC
2238 1.49.2.1 wrstuden if (xfer->rqflags & URQ_REQUEST) {
2239 1.3 augustss /* XXX panic */
2240 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2241 1.3 augustss return (USBD_INVAL);
2242 1.3 augustss }
2243 1.34 augustss #endif
2244 1.3 augustss
2245 1.49.2.1 wrstuden len = xfer->length;
2246 1.49.2.1 wrstuden endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2247 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2248 1.3 augustss sed = opipe->sed;
2249 1.3 augustss
2250 1.49.2.1 wrstuden DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2251 1.49.2.1 wrstuden "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2252 1.40 augustss endpt));
2253 1.34 augustss
2254 1.32 augustss opipe->u.bulk.isread = isread;
2255 1.3 augustss opipe->u.bulk.length = len;
2256 1.3 augustss
2257 1.3 augustss /* Update device address */
2258 1.39 augustss sed->ed.ed_flags = LE(
2259 1.39 augustss (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2260 1.16 augustss OHCI_ED_SET_FA(addr));
2261 1.3 augustss
2262 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2263 1.48 augustss data = opipe->tail;
2264 1.49.2.1 wrstuden err = ohci_alloc_std_chain(opipe, sc, len, isread,
2265 1.49.2.1 wrstuden xfer->flags & USBD_SHORT_XFER_OK,
2266 1.49.2.1 wrstuden &xfer->dmabuf, data, &tail);
2267 1.49.2.1 wrstuden if (err)
2268 1.49.2.1 wrstuden return (err);
2269 1.48 augustss
2270 1.49.2.1 wrstuden tail->xfer = NULL;
2271 1.49.2.1 wrstuden xfer->hcpriv = data;
2272 1.3 augustss
2273 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2274 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2275 1.48 augustss (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags),
2276 1.48 augustss (int)LE(data->td.td_cbp), (int)LE(data->td.td_be)));
2277 1.34 augustss
2278 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
2279 1.34 augustss if (ohcidebug > 4) {
2280 1.34 augustss ohci_dump_ed(sed);
2281 1.48 augustss ohci_dump_tds(data);
2282 1.34 augustss }
2283 1.34 augustss #endif
2284 1.34 augustss
2285 1.3 augustss /* Insert ED in schedule */
2286 1.3 augustss s = splusb();
2287 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2288 1.49.2.1 wrstuden tdp->xfer = xfer;
2289 1.48 augustss ohci_hash_add_td(sc, tdp);
2290 1.48 augustss }
2291 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2292 1.3 augustss opipe->tail = tail;
2293 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2294 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2295 1.49.2.1 wrstuden if (xfer->timeout && !sc->sc_bus.use_polling) {
2296 1.49.2.1 wrstuden usb_timeout(ohci_timeout, xfer,
2297 1.49.2.1 wrstuden MS_TO_TICKS(xfer->timeout), xfer->timo_handle);
2298 1.15 augustss }
2299 1.34 augustss
2300 1.49.2.1 wrstuden #if 0
2301 1.49.2.1 wrstuden /* This goes wrong if we are too slow. */
2302 1.34 augustss if (ohcidebug > 5) {
2303 1.49.2.1 wrstuden usb_delay_ms(&sc->sc_bus, 5);
2304 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2305 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2306 1.34 augustss ohci_dump_ed(sed);
2307 1.48 augustss ohci_dump_tds(data);
2308 1.34 augustss }
2309 1.34 augustss #endif
2310 1.34 augustss
2311 1.3 augustss splx(s);
2312 1.3 augustss
2313 1.3 augustss return (USBD_IN_PROGRESS);
2314 1.3 augustss }
2315 1.3 augustss
2316 1.49.2.1 wrstuden static void
2317 1.49.2.1 wrstuden ohci_device_bulk_abort(xfer)
2318 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2319 1.3 augustss {
2320 1.49.2.1 wrstuden DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2321 1.49.2.1 wrstuden ohci_abort_xfer(xfer, USBD_CANCELLED);
2322 1.3 augustss }
2323 1.3 augustss
2324 1.34 augustss /*
2325 1.34 augustss * Close a device bulk pipe.
2326 1.34 augustss */
2327 1.49.2.1 wrstuden static void
2328 1.3 augustss ohci_device_bulk_close(pipe)
2329 1.3 augustss usbd_pipe_handle pipe;
2330 1.3 augustss {
2331 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2332 1.3 augustss
2333 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2334 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2335 1.1 augustss }
2336 1.1 augustss
2337 1.1 augustss /************************/
2338 1.1 augustss
2339 1.49.2.1 wrstuden static usbd_status
2340 1.49.2.1 wrstuden ohci_device_intr_transfer(xfer)
2341 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2342 1.17 augustss {
2343 1.49.2.1 wrstuden usbd_status err;
2344 1.17 augustss
2345 1.46 augustss /* Insert last in queue. */
2346 1.49.2.1 wrstuden err = usb_insert_transfer(xfer);
2347 1.49.2.1 wrstuden if (err)
2348 1.49.2.1 wrstuden return (err);
2349 1.46 augustss
2350 1.46 augustss /* Pipe isn't running, start first */
2351 1.49.2.1 wrstuden return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2352 1.17 augustss }
2353 1.17 augustss
2354 1.49.2.1 wrstuden static usbd_status
2355 1.49.2.1 wrstuden ohci_device_intr_start(xfer)
2356 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2357 1.1 augustss {
2358 1.49.2.1 wrstuden struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2359 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2360 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2361 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2362 1.48 augustss ohci_soft_td_t *data, *tail;
2363 1.1 augustss int len;
2364 1.1 augustss int s;
2365 1.1 augustss
2366 1.49.2.1 wrstuden DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2367 1.14 augustss "flags=%d priv=%p\n",
2368 1.49.2.1 wrstuden xfer, xfer->length, xfer->flags, xfer->priv));
2369 1.1 augustss
2370 1.42 augustss #ifdef DIAGNOSTIC
2371 1.49.2.1 wrstuden if (xfer->rqflags & URQ_REQUEST)
2372 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2373 1.42 augustss #endif
2374 1.1 augustss
2375 1.49.2.1 wrstuden len = xfer->length;
2376 1.1 augustss
2377 1.48 augustss data = opipe->tail;
2378 1.1 augustss tail = ohci_alloc_std(sc);
2379 1.49.2.1 wrstuden if (tail == NULL)
2380 1.43 augustss return (USBD_NOMEM);
2381 1.49.2.1 wrstuden tail->xfer = NULL;
2382 1.1 augustss
2383 1.48 augustss data->td.td_flags = LE(
2384 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2385 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2386 1.49.2.1 wrstuden if (xfer->flags & USBD_SHORT_XFER_OK)
2387 1.48 augustss data->td.td_flags |= LE(OHCI_TD_R);
2388 1.49.2.1 wrstuden data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf));
2389 1.48 augustss data->nexttd = tail;
2390 1.48 augustss data->td.td_nexttd = LE(tail->physaddr);
2391 1.48 augustss data->td.td_be = LE(LE(data->td.td_cbp) + len - 1);
2392 1.48 augustss data->len = len;
2393 1.49.2.1 wrstuden data->xfer = xfer;
2394 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2395 1.49.2.1 wrstuden xfer->hcpriv = data;
2396 1.1 augustss
2397 1.49.2.1 wrstuden #ifdef OHCI_DEBUG
2398 1.1 augustss if (ohcidebug > 5) {
2399 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2400 1.1 augustss ohci_dump_ed(sed);
2401 1.48 augustss ohci_dump_tds(data);
2402 1.1 augustss }
2403 1.1 augustss #endif
2404 1.1 augustss
2405 1.1 augustss /* Insert ED in schedule */
2406 1.1 augustss s = splusb();
2407 1.48 augustss ohci_hash_add_td(sc, data);
2408 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2409 1.1 augustss opipe->tail = tail;
2410 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2411 1.1 augustss
2412 1.49.2.1 wrstuden #if 0
2413 1.49.2.1 wrstuden /*
2414 1.49.2.1 wrstuden * This goes horribly wrong, printing thousands of descriptors,
2415 1.49.2.1 wrstuden * because false references are followed due to the fact that the
2416 1.49.2.1 wrstuden * TD is gone.
2417 1.49.2.1 wrstuden */
2418 1.1 augustss if (ohcidebug > 5) {
2419 1.49.2.1 wrstuden usb_delay_ms(&sc->sc_bus, 5);
2420 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2421 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2422 1.1 augustss ohci_dump_ed(sed);
2423 1.48 augustss ohci_dump_tds(data);
2424 1.1 augustss }
2425 1.1 augustss #endif
2426 1.26 augustss splx(s);
2427 1.1 augustss
2428 1.1 augustss return (USBD_IN_PROGRESS);
2429 1.1 augustss }
2430 1.1 augustss
2431 1.1 augustss /* Abort a device control request. */
2432 1.49.2.1 wrstuden static void
2433 1.49.2.1 wrstuden ohci_device_intr_abort(xfer)
2434 1.49.2.1 wrstuden usbd_xfer_handle xfer;
2435 1.1 augustss {
2436 1.49.2.1 wrstuden if (xfer->pipe->intrxfer == xfer) {
2437 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2438 1.49.2.1 wrstuden xfer->pipe->intrxfer = NULL;
2439 1.1 augustss }
2440 1.49.2.1 wrstuden ohci_abort_xfer(xfer, USBD_CANCELLED);
2441 1.1 augustss }
2442 1.1 augustss
2443 1.1 augustss /* Close a device interrupt pipe. */
2444 1.49.2.1 wrstuden static void
2445 1.1 augustss ohci_device_intr_close(pipe)
2446 1.1 augustss usbd_pipe_handle pipe;
2447 1.1 augustss {
2448 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2449 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2450 1.1 augustss int nslots = opipe->u.intr.nslots;
2451 1.1 augustss int pos = opipe->u.intr.pos;
2452 1.1 augustss int j;
2453 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2454 1.1 augustss int s;
2455 1.1 augustss
2456 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2457 1.1 augustss pipe, nslots, pos));
2458 1.1 augustss s = splusb();
2459 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
2460 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
2461 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
2462 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2463 1.1 augustss
2464 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2465 1.1 augustss ;
2466 1.49.2.1 wrstuden #ifdef DIAGNOSTIC
2467 1.49.2.1 wrstuden if (p == NULL)
2468 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2469 1.49.2.1 wrstuden #endif
2470 1.1 augustss p->next = sed->next;
2471 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
2472 1.1 augustss splx(s);
2473 1.1 augustss
2474 1.1 augustss for (j = 0; j < nslots; j++)
2475 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2476 1.1 augustss
2477 1.1 augustss ohci_free_std(sc, opipe->tail);
2478 1.1 augustss ohci_free_sed(sc, opipe->sed);
2479 1.1 augustss }
2480 1.1 augustss
2481 1.49.2.1 wrstuden static usbd_status
2482 1.1 augustss ohci_device_setintr(sc, opipe, ival)
2483 1.1 augustss ohci_softc_t *sc;
2484 1.1 augustss struct ohci_pipe *opipe;
2485 1.1 augustss int ival;
2486 1.1 augustss {
2487 1.1 augustss int i, j, s, best;
2488 1.1 augustss u_int npoll, slow, shigh, nslots;
2489 1.1 augustss u_int bestbw, bw;
2490 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2491 1.1 augustss
2492 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2493 1.1 augustss if (ival == 0) {
2494 1.1 augustss printf("ohci_setintr: 0 interval\n");
2495 1.1 augustss return (USBD_INVAL);
2496 1.1 augustss }
2497 1.1 augustss
2498 1.1 augustss npoll = OHCI_NO_INTRS;
2499 1.1 augustss while (npoll > ival)
2500 1.1 augustss npoll /= 2;
2501 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2502 1.1 augustss
2503 1.1 augustss /*
2504 1.1 augustss * We now know which level in the tree the ED must go into.
2505 1.1 augustss * Figure out which slot has most bandwidth left over.
2506 1.1 augustss * Slots to examine:
2507 1.1 augustss * npoll
2508 1.1 augustss * 1 0
2509 1.1 augustss * 2 1 2
2510 1.1 augustss * 4 3 4 5 6
2511 1.1 augustss * 8 7 8 9 10 11 12 13 14
2512 1.1 augustss * N (N-1) .. (N-1+N-1)
2513 1.1 augustss */
2514 1.1 augustss slow = npoll-1;
2515 1.1 augustss shigh = slow + npoll;
2516 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2517 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2518 1.1 augustss bw = 0;
2519 1.1 augustss for (j = 0; j < nslots; j++)
2520 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2521 1.1 augustss if (bw < bestbw) {
2522 1.1 augustss best = i;
2523 1.1 augustss bestbw = bw;
2524 1.1 augustss }
2525 1.1 augustss }
2526 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2527 1.1 augustss best, slow, shigh, bestbw));
2528 1.1 augustss
2529 1.1 augustss s = splusb();
2530 1.1 augustss hsed = sc->sc_eds[best];
2531 1.1 augustss sed->next = hsed->next;
2532 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
2533 1.1 augustss hsed->next = sed;
2534 1.39 augustss hsed->ed.ed_nexted = LE(sed->physaddr);
2535 1.1 augustss splx(s);
2536 1.1 augustss
2537 1.1 augustss for (j = 0; j < nslots; j++)
2538 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2539 1.1 augustss opipe->u.intr.nslots = nslots;
2540 1.1 augustss opipe->u.intr.pos = best;
2541 1.1 augustss
2542 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2543 1.1 augustss return (USBD_NORMAL_COMPLETION);
2544 1.1 augustss }
2545