ohci.c revision 1.52.2.5 1 1.52.2.5 bouyer /* $NetBSD: ohci.c,v 1.52.2.5 2001/02/11 19:16:23 bouyer Exp $ */
2 1.52.2.1 bouyer /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.52.2.1 bouyer * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Open Host Controller driver.
43 1.1 augustss *
44 1.52.2.4 bouyer * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html
45 1.52.2.4 bouyer * USB spec: http://www.usb.org/developers/data/usbspec.zip
46 1.1 augustss */
47 1.1 augustss
48 1.1 augustss #include <sys/param.h>
49 1.1 augustss #include <sys/systm.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
52 1.52.2.1 bouyer #include <sys/kernel.h>
53 1.1 augustss #include <sys/device.h>
54 1.52.2.1 bouyer #include <sys/select.h>
55 1.15 augustss #elif defined(__FreeBSD__)
56 1.15 augustss #include <sys/module.h>
57 1.15 augustss #include <sys/bus.h>
58 1.52 augustss #include <machine/bus_pio.h>
59 1.52 augustss #include <machine/bus_memio.h>
60 1.52.2.1 bouyer #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
61 1.52.2.1 bouyer #include <machine/cpu.h>
62 1.52.2.1 bouyer #endif
63 1.15 augustss #endif
64 1.1 augustss #include <sys/proc.h>
65 1.1 augustss #include <sys/queue.h>
66 1.1 augustss
67 1.4 augustss #include <machine/bus.h>
68 1.16 augustss #include <machine/endian.h>
69 1.4 augustss
70 1.1 augustss #include <dev/usb/usb.h>
71 1.1 augustss #include <dev/usb/usbdi.h>
72 1.1 augustss #include <dev/usb/usbdivar.h>
73 1.38 augustss #include <dev/usb/usb_mem.h>
74 1.1 augustss #include <dev/usb/usb_quirks.h>
75 1.1 augustss
76 1.1 augustss #include <dev/usb/ohcireg.h>
77 1.1 augustss #include <dev/usb/ohcivar.h>
78 1.1 augustss
79 1.15 augustss #if defined(__FreeBSD__)
80 1.15 augustss #include <machine/clock.h>
81 1.52.2.1 bouyer
82 1.15 augustss #define delay(d) DELAY(d)
83 1.15 augustss #endif
84 1.1 augustss
85 1.36 augustss #if defined(__OpenBSD__)
86 1.36 augustss struct cfdriver ohci_cd = {
87 1.36 augustss NULL, "ohci", DV_DULL
88 1.36 augustss };
89 1.36 augustss #endif
90 1.36 augustss
91 1.52 augustss #ifdef OHCI_DEBUG
92 1.52 augustss #define DPRINTF(x) if (ohcidebug) logprintf x
93 1.52 augustss #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
94 1.52 augustss int ohcidebug = 0;
95 1.52.2.1 bouyer #ifndef __NetBSD__
96 1.52.2.1 bouyer #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f))
97 1.52.2.1 bouyer #endif
98 1.52 augustss #else
99 1.52 augustss #define DPRINTF(x)
100 1.52 augustss #define DPRINTFN(n,x)
101 1.52 augustss #endif
102 1.52 augustss
103 1.16 augustss /*
104 1.16 augustss * The OHCI controller is little endian, so on big endian machines
105 1.16 augustss * the data strored in memory needs to be swapped.
106 1.16 augustss */
107 1.52.2.1 bouyer #if defined(__FreeBSD__) || defined(__OpenBSD__)
108 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
109 1.52.2.1 bouyer #define htole32(x) (bswap32(x))
110 1.52.2.1 bouyer #define le32toh(x) (bswap32(x))
111 1.16 augustss #else
112 1.52.2.1 bouyer #define htole32(x) (x)
113 1.52.2.1 bouyer #define le32toh(x) (x)
114 1.52.2.1 bouyer #endif
115 1.16 augustss #endif
116 1.16 augustss
117 1.1 augustss struct ohci_pipe;
118 1.1 augustss
119 1.52.2.1 bouyer Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
120 1.52.2.1 bouyer Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
121 1.1 augustss
122 1.52.2.1 bouyer Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
123 1.52.2.1 bouyer Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
124 1.34 augustss
125 1.52.2.1 bouyer Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
126 1.52.2.1 bouyer Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
127 1.37 augustss
128 1.52.2.1 bouyer #if 0
129 1.52.2.1 bouyer Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
130 1.52.2.1 bouyer ohci_soft_td_t *);
131 1.1 augustss #endif
132 1.52.2.1 bouyer Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
133 1.52.2.1 bouyer ohci_softc_t *, int, int, usbd_xfer_handle,
134 1.52.2.1 bouyer ohci_soft_td_t *, ohci_soft_td_t **);
135 1.52.2.1 bouyer
136 1.52.2.1 bouyer Static void ohci_shutdown(void *v);
137 1.52.2.1 bouyer Static void ohci_power(int, void *);
138 1.52.2.1 bouyer Static usbd_status ohci_open(usbd_pipe_handle);
139 1.52.2.1 bouyer Static void ohci_poll(struct usbd_bus *);
140 1.52.2.5 bouyer Static void ohci_softintr(void *);
141 1.52.2.1 bouyer Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
142 1.52.2.1 bouyer Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
143 1.52.2.1 bouyer Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
144 1.52.2.1 bouyer
145 1.52.2.1 bouyer Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
146 1.52.2.1 bouyer Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
147 1.52.2.1 bouyer Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
148 1.52.2.1 bouyer Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
149 1.52.2.1 bouyer Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
150 1.52.2.1 bouyer Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
151 1.52.2.1 bouyer Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
152 1.52.2.1 bouyer Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
153 1.52.2.1 bouyer Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
154 1.52.2.1 bouyer
155 1.52.2.1 bouyer Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
156 1.52.2.1 bouyer Static void ohci_device_isoc_enter(usbd_xfer_handle);
157 1.52.2.1 bouyer
158 1.52.2.1 bouyer Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
159 1.52.2.1 bouyer Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
160 1.52.2.1 bouyer
161 1.52.2.1 bouyer Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
162 1.52.2.1 bouyer Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
163 1.52.2.1 bouyer
164 1.52.2.1 bouyer Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
165 1.52.2.1 bouyer Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
166 1.52.2.1 bouyer Static void ohci_root_ctrl_abort(usbd_xfer_handle);
167 1.52.2.1 bouyer Static void ohci_root_ctrl_close(usbd_pipe_handle);
168 1.52.2.1 bouyer Static void ohci_root_ctrl_done(usbd_xfer_handle);
169 1.52.2.1 bouyer
170 1.52.2.1 bouyer Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
171 1.52.2.1 bouyer Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
172 1.52.2.1 bouyer Static void ohci_root_intr_abort(usbd_xfer_handle);
173 1.52.2.1 bouyer Static void ohci_root_intr_close(usbd_pipe_handle);
174 1.52.2.1 bouyer Static void ohci_root_intr_done(usbd_xfer_handle);
175 1.52.2.1 bouyer
176 1.52.2.1 bouyer Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
177 1.52.2.1 bouyer Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
178 1.52.2.1 bouyer Static void ohci_device_ctrl_abort(usbd_xfer_handle);
179 1.52.2.1 bouyer Static void ohci_device_ctrl_close(usbd_pipe_handle);
180 1.52.2.1 bouyer Static void ohci_device_ctrl_done(usbd_xfer_handle);
181 1.52.2.1 bouyer
182 1.52.2.1 bouyer Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
183 1.52.2.1 bouyer Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
184 1.52.2.1 bouyer Static void ohci_device_bulk_abort(usbd_xfer_handle);
185 1.52.2.1 bouyer Static void ohci_device_bulk_close(usbd_pipe_handle);
186 1.52.2.1 bouyer Static void ohci_device_bulk_done(usbd_xfer_handle);
187 1.52.2.1 bouyer
188 1.52.2.1 bouyer Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
189 1.52.2.1 bouyer Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
190 1.52.2.1 bouyer Static void ohci_device_intr_abort(usbd_xfer_handle);
191 1.52.2.1 bouyer Static void ohci_device_intr_close(usbd_pipe_handle);
192 1.52.2.1 bouyer Static void ohci_device_intr_done(usbd_xfer_handle);
193 1.52.2.1 bouyer
194 1.52.2.1 bouyer Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
195 1.52.2.1 bouyer Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
196 1.52.2.1 bouyer Static void ohci_device_isoc_abort(usbd_xfer_handle);
197 1.52.2.1 bouyer Static void ohci_device_isoc_close(usbd_pipe_handle);
198 1.52.2.1 bouyer Static void ohci_device_isoc_done(usbd_xfer_handle);
199 1.52.2.1 bouyer
200 1.52.2.1 bouyer Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
201 1.52.2.1 bouyer struct ohci_pipe *pipe, int ival);
202 1.52.2.1 bouyer
203 1.52.2.1 bouyer Static int ohci_str(usb_string_descriptor_t *, int, char *);
204 1.52.2.1 bouyer
205 1.52.2.1 bouyer Static void ohci_timeout(void *);
206 1.52.2.1 bouyer Static void ohci_rhsc_able(ohci_softc_t *, int);
207 1.52.2.1 bouyer
208 1.52.2.1 bouyer Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
209 1.52.2.1 bouyer Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
210 1.52.2.1 bouyer Static void ohci_abort_xfer_end(void *);
211 1.1 augustss
212 1.52.2.1 bouyer Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
213 1.52.2.1 bouyer Static void ohci_noop(usbd_pipe_handle pipe);
214 1.52.2.1 bouyer
215 1.52.2.1 bouyer #ifdef OHCI_DEBUG
216 1.52.2.1 bouyer Static void ohci_dumpregs(ohci_softc_t *);
217 1.52.2.1 bouyer Static void ohci_dump_tds(ohci_soft_td_t *);
218 1.52.2.1 bouyer Static void ohci_dump_td(ohci_soft_td_t *);
219 1.52.2.1 bouyer Static void ohci_dump_ed(ohci_soft_ed_t *);
220 1.52.2.1 bouyer Static void ohci_dump_itd(ohci_soft_itd_t *);
221 1.52.2.1 bouyer Static void ohci_dump_itds(ohci_soft_itd_t *);
222 1.52.2.1 bouyer #endif
223 1.52.2.1 bouyer
224 1.52.2.1 bouyer #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
225 1.52.2.1 bouyer BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
226 1.52.2.1 bouyer #define OWRITE1(sc, r, x) \
227 1.52.2.1 bouyer do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
228 1.52.2.1 bouyer #define OWRITE2(sc, r, x) \
229 1.52.2.1 bouyer do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
230 1.52.2.1 bouyer #define OWRITE4(sc, r, x) \
231 1.52.2.1 bouyer do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
232 1.52.2.1 bouyer #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
233 1.52.2.1 bouyer #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
234 1.52.2.1 bouyer #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
235 1.1 augustss
236 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
237 1.52.2.1 bouyer Static u_int8_t revbits[OHCI_NO_INTRS] =
238 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
239 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
240 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
241 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
242 1.1 augustss
243 1.1 augustss struct ohci_pipe {
244 1.1 augustss struct usbd_pipe pipe;
245 1.1 augustss ohci_soft_ed_t *sed;
246 1.52.2.1 bouyer union {
247 1.52.2.1 bouyer ohci_soft_td_t *td;
248 1.52.2.1 bouyer ohci_soft_itd_t *itd;
249 1.52.2.1 bouyer } tail;
250 1.1 augustss /* Info needed for different pipe kinds. */
251 1.1 augustss union {
252 1.1 augustss /* Control pipe */
253 1.1 augustss struct {
254 1.4 augustss usb_dma_t reqdma;
255 1.1 augustss u_int length;
256 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
257 1.1 augustss } ctl;
258 1.1 augustss /* Interrupt pipe */
259 1.1 augustss struct {
260 1.1 augustss int nslots;
261 1.1 augustss int pos;
262 1.1 augustss } intr;
263 1.3 augustss /* Bulk pipe */
264 1.3 augustss struct {
265 1.3 augustss u_int length;
266 1.32 augustss int isread;
267 1.3 augustss } bulk;
268 1.43 augustss /* Iso pipe */
269 1.43 augustss struct iso {
270 1.52.2.1 bouyer int next, inuse;
271 1.43 augustss } iso;
272 1.1 augustss } u;
273 1.1 augustss };
274 1.1 augustss
275 1.1 augustss #define OHCI_INTR_ENDPT 1
276 1.1 augustss
277 1.52.2.1 bouyer Static struct usbd_bus_methods ohci_bus_methods = {
278 1.42 augustss ohci_open,
279 1.52.2.1 bouyer ohci_softintr,
280 1.42 augustss ohci_poll,
281 1.42 augustss ohci_allocm,
282 1.42 augustss ohci_freem,
283 1.52.2.1 bouyer ohci_allocx,
284 1.52.2.1 bouyer ohci_freex,
285 1.42 augustss };
286 1.42 augustss
287 1.52.2.1 bouyer Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
288 1.1 augustss ohci_root_ctrl_transfer,
289 1.17 augustss ohci_root_ctrl_start,
290 1.1 augustss ohci_root_ctrl_abort,
291 1.1 augustss ohci_root_ctrl_close,
292 1.37 augustss ohci_noop,
293 1.52.2.1 bouyer ohci_root_ctrl_done,
294 1.1 augustss };
295 1.1 augustss
296 1.52.2.1 bouyer Static struct usbd_pipe_methods ohci_root_intr_methods = {
297 1.1 augustss ohci_root_intr_transfer,
298 1.17 augustss ohci_root_intr_start,
299 1.1 augustss ohci_root_intr_abort,
300 1.1 augustss ohci_root_intr_close,
301 1.37 augustss ohci_noop,
302 1.38 augustss ohci_root_intr_done,
303 1.1 augustss };
304 1.1 augustss
305 1.52.2.1 bouyer Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
306 1.1 augustss ohci_device_ctrl_transfer,
307 1.17 augustss ohci_device_ctrl_start,
308 1.1 augustss ohci_device_ctrl_abort,
309 1.1 augustss ohci_device_ctrl_close,
310 1.37 augustss ohci_noop,
311 1.38 augustss ohci_device_ctrl_done,
312 1.1 augustss };
313 1.1 augustss
314 1.52.2.1 bouyer Static struct usbd_pipe_methods ohci_device_intr_methods = {
315 1.1 augustss ohci_device_intr_transfer,
316 1.17 augustss ohci_device_intr_start,
317 1.1 augustss ohci_device_intr_abort,
318 1.1 augustss ohci_device_intr_close,
319 1.37 augustss ohci_device_clear_toggle,
320 1.38 augustss ohci_device_intr_done,
321 1.1 augustss };
322 1.1 augustss
323 1.52.2.1 bouyer Static struct usbd_pipe_methods ohci_device_bulk_methods = {
324 1.3 augustss ohci_device_bulk_transfer,
325 1.17 augustss ohci_device_bulk_start,
326 1.3 augustss ohci_device_bulk_abort,
327 1.3 augustss ohci_device_bulk_close,
328 1.37 augustss ohci_device_clear_toggle,
329 1.38 augustss ohci_device_bulk_done,
330 1.3 augustss };
331 1.3 augustss
332 1.52.2.1 bouyer Static struct usbd_pipe_methods ohci_device_isoc_methods = {
333 1.43 augustss ohci_device_isoc_transfer,
334 1.43 augustss ohci_device_isoc_start,
335 1.43 augustss ohci_device_isoc_abort,
336 1.43 augustss ohci_device_isoc_close,
337 1.43 augustss ohci_noop,
338 1.43 augustss ohci_device_isoc_done,
339 1.43 augustss };
340 1.43 augustss
341 1.52.2.1 bouyer #if defined(__NetBSD__) || defined(__OpenBSD__)
342 1.47 augustss int
343 1.52.2.1 bouyer ohci_activate(device_ptr_t self, enum devact act)
344 1.47 augustss {
345 1.49 augustss struct ohci_softc *sc = (struct ohci_softc *)self;
346 1.47 augustss int rv = 0;
347 1.47 augustss
348 1.47 augustss switch (act) {
349 1.47 augustss case DVACT_ACTIVATE:
350 1.47 augustss return (EOPNOTSUPP);
351 1.47 augustss break;
352 1.47 augustss
353 1.47 augustss case DVACT_DEACTIVATE:
354 1.49 augustss if (sc->sc_child != NULL)
355 1.49 augustss rv = config_deactivate(sc->sc_child);
356 1.52.2.1 bouyer sc->sc_dying = 1;
357 1.47 augustss break;
358 1.47 augustss }
359 1.47 augustss return (rv);
360 1.47 augustss }
361 1.47 augustss
362 1.47 augustss int
363 1.52.2.1 bouyer ohci_detach(struct ohci_softc *sc, int flags)
364 1.47 augustss {
365 1.47 augustss int rv = 0;
366 1.47 augustss
367 1.47 augustss if (sc->sc_child != NULL)
368 1.47 augustss rv = config_detach(sc->sc_child, flags);
369 1.47 augustss
370 1.47 augustss if (rv != 0)
371 1.47 augustss return (rv);
372 1.47 augustss
373 1.52.2.1 bouyer #if defined(__NetBSD__) || defined(__OpenBSD__)
374 1.47 augustss powerhook_disestablish(sc->sc_powerhook);
375 1.52.2.1 bouyer shutdownhook_disestablish(sc->sc_shutdownhook);
376 1.52.2.1 bouyer #endif
377 1.52.2.1 bouyer
378 1.47 augustss /* free data structures XXX */
379 1.47 augustss
380 1.47 augustss return (rv);
381 1.47 augustss }
382 1.52.2.1 bouyer #endif
383 1.47 augustss
384 1.1 augustss ohci_soft_ed_t *
385 1.52.2.1 bouyer ohci_alloc_sed(ohci_softc_t *sc)
386 1.1 augustss {
387 1.1 augustss ohci_soft_ed_t *sed;
388 1.52.2.1 bouyer usbd_status err;
389 1.1 augustss int i, offs;
390 1.4 augustss usb_dma_t dma;
391 1.1 augustss
392 1.52.2.1 bouyer if (sc->sc_freeeds == NULL) {
393 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
394 1.52.2.1 bouyer err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
395 1.52.2.1 bouyer OHCI_ED_ALIGN, &dma);
396 1.52.2.1 bouyer if (err)
397 1.39 augustss return (0);
398 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
399 1.39 augustss offs = i * OHCI_SED_SIZE;
400 1.39 augustss sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
401 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
402 1.1 augustss sed->next = sc->sc_freeeds;
403 1.1 augustss sc->sc_freeeds = sed;
404 1.1 augustss }
405 1.1 augustss }
406 1.1 augustss sed = sc->sc_freeeds;
407 1.1 augustss sc->sc_freeeds = sed->next;
408 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
409 1.1 augustss sed->next = 0;
410 1.39 augustss return (sed);
411 1.1 augustss }
412 1.1 augustss
413 1.1 augustss void
414 1.52.2.1 bouyer ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
415 1.1 augustss {
416 1.1 augustss sed->next = sc->sc_freeeds;
417 1.1 augustss sc->sc_freeeds = sed;
418 1.1 augustss }
419 1.1 augustss
420 1.1 augustss ohci_soft_td_t *
421 1.52.2.1 bouyer ohci_alloc_std(ohci_softc_t *sc)
422 1.1 augustss {
423 1.1 augustss ohci_soft_td_t *std;
424 1.52.2.1 bouyer usbd_status err;
425 1.1 augustss int i, offs;
426 1.4 augustss usb_dma_t dma;
427 1.52.2.1 bouyer int s;
428 1.1 augustss
429 1.52.2.1 bouyer if (sc->sc_freetds == NULL) {
430 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
431 1.52.2.1 bouyer err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
432 1.52.2.1 bouyer OHCI_TD_ALIGN, &dma);
433 1.52.2.1 bouyer if (err)
434 1.52.2.1 bouyer return (NULL);
435 1.52.2.1 bouyer s = splusb();
436 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
437 1.39 augustss offs = i * OHCI_STD_SIZE;
438 1.39 augustss std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
439 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
440 1.1 augustss std->nexttd = sc->sc_freetds;
441 1.1 augustss sc->sc_freetds = std;
442 1.1 augustss }
443 1.52.2.1 bouyer splx(s);
444 1.1 augustss }
445 1.52.2.1 bouyer
446 1.52.2.1 bouyer s = splusb();
447 1.1 augustss std = sc->sc_freetds;
448 1.1 augustss sc->sc_freetds = std->nexttd;
449 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
450 1.52.2.1 bouyer std->nexttd = NULL;
451 1.52.2.1 bouyer std->xfer = NULL;
452 1.52.2.1 bouyer ohci_hash_add_td(sc, std);
453 1.52.2.1 bouyer splx(s);
454 1.52.2.1 bouyer
455 1.1 augustss return (std);
456 1.1 augustss }
457 1.1 augustss
458 1.1 augustss void
459 1.52.2.1 bouyer ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
460 1.1 augustss {
461 1.52.2.1 bouyer int s;
462 1.52.2.1 bouyer
463 1.52.2.1 bouyer s = splusb();
464 1.52.2.1 bouyer ohci_hash_rem_td(sc, std);
465 1.1 augustss std->nexttd = sc->sc_freetds;
466 1.1 augustss sc->sc_freetds = std;
467 1.52.2.1 bouyer splx(s);
468 1.1 augustss }
469 1.1 augustss
470 1.1 augustss usbd_status
471 1.52.2.1 bouyer ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
472 1.52.2.1 bouyer int alen, int rd, usbd_xfer_handle xfer,
473 1.52.2.1 bouyer ohci_soft_td_t *sp, ohci_soft_td_t **ep)
474 1.48 augustss {
475 1.48 augustss ohci_soft_td_t *next, *cur;
476 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
477 1.52.2.1 bouyer u_int32_t tdflags;
478 1.52.2.1 bouyer int len, curlen;
479 1.52.2.1 bouyer usb_dma_t *dma = &xfer->dmabuf;
480 1.52.2.1 bouyer u_int16_t flags = xfer->flags;
481 1.48 augustss
482 1.52.2.1 bouyer DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
483 1.52.2.1 bouyer
484 1.52.2.1 bouyer len = alen;
485 1.48 augustss cur = sp;
486 1.48 augustss dataphys = DMAADDR(dma);
487 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
488 1.52.2.1 bouyer tdflags = htole32(
489 1.52.2.1 bouyer (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
490 1.52.2.1 bouyer (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
491 1.52.2.1 bouyer OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
492 1.52.2.1 bouyer
493 1.48 augustss for (;;) {
494 1.48 augustss next = ohci_alloc_std(sc);
495 1.52.2.1 bouyer if (next == NULL)
496 1.52.2.1 bouyer goto nomem;
497 1.48 augustss
498 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
499 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
500 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
501 1.48 augustss /* we can handle it in this TD */
502 1.48 augustss curlen = len;
503 1.48 augustss } else {
504 1.48 augustss /* must use multiple TDs, fill as much as possible. */
505 1.48 augustss curlen = 2 * OHCI_PAGE_SIZE -
506 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
507 1.52.2.1 bouyer /* the length must be a multiple of the max size */
508 1.52.2.1 bouyer curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
509 1.52.2.1 bouyer #ifdef DIAGNOSTIC
510 1.52.2.1 bouyer if (curlen == 0)
511 1.52.2.1 bouyer panic("ohci_alloc_std: curlen == 0\n");
512 1.52.2.1 bouyer #endif
513 1.48 augustss }
514 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
515 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
516 1.48 augustss dataphys, dataphysend,
517 1.48 augustss len, curlen));
518 1.48 augustss len -= curlen;
519 1.48 augustss
520 1.52.2.1 bouyer cur->td.td_flags = tdflags;
521 1.52.2.1 bouyer cur->td.td_cbp = htole32(dataphys);
522 1.48 augustss cur->nexttd = next;
523 1.52.2.1 bouyer cur->td.td_nexttd = htole32(next->physaddr);
524 1.52.2.1 bouyer cur->td.td_be = htole32(dataphys + curlen - 1);
525 1.48 augustss cur->len = curlen;
526 1.48 augustss cur->flags = OHCI_ADD_LEN;
527 1.52.2.1 bouyer cur->xfer = xfer;
528 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
529 1.48 augustss dataphys, dataphys + curlen - 1));
530 1.48 augustss if (len == 0)
531 1.48 augustss break;
532 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
533 1.48 augustss dataphys += curlen;
534 1.48 augustss cur = next;
535 1.48 augustss }
536 1.52.2.1 bouyer if ((flags & USBD_FORCE_SHORT_XFER) &&
537 1.52.2.1 bouyer alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
538 1.52.2.1 bouyer /* Force a 0 length transfer at the end. */
539 1.52.2.1 bouyer
540 1.52.2.1 bouyer cur = next;
541 1.52.2.1 bouyer next = ohci_alloc_std(sc);
542 1.52.2.1 bouyer if (next == NULL)
543 1.52.2.1 bouyer goto nomem;
544 1.52.2.1 bouyer
545 1.52.2.1 bouyer cur->td.td_flags = tdflags;
546 1.52.2.1 bouyer cur->td.td_cbp = 0; /* indicate 0 length packet */
547 1.52.2.1 bouyer cur->nexttd = next;
548 1.52.2.1 bouyer cur->td.td_nexttd = htole32(next->physaddr);
549 1.52.2.1 bouyer cur->td.td_be = ~0;
550 1.52.2.1 bouyer cur->len = 0;
551 1.52.2.1 bouyer cur->flags = 0;
552 1.52.2.1 bouyer cur->xfer = xfer;
553 1.52.2.1 bouyer DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
554 1.52.2.1 bouyer }
555 1.52.2.1 bouyer *ep = cur;
556 1.48 augustss
557 1.48 augustss return (USBD_NORMAL_COMPLETION);
558 1.52.2.1 bouyer
559 1.52.2.1 bouyer nomem:
560 1.52.2.1 bouyer /* XXX free chain */
561 1.52.2.1 bouyer return (USBD_NOMEM);
562 1.48 augustss }
563 1.48 augustss
564 1.52.2.1 bouyer #if 0
565 1.52.2.1 bouyer Static void
566 1.52.2.1 bouyer ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
567 1.52.2.1 bouyer ohci_soft_td_t *stdend)
568 1.48 augustss {
569 1.48 augustss ohci_soft_td_t *p;
570 1.48 augustss
571 1.48 augustss for (; std != stdend; std = p) {
572 1.48 augustss p = std->nexttd;
573 1.48 augustss ohci_free_std(sc, std);
574 1.48 augustss }
575 1.48 augustss }
576 1.52.2.1 bouyer #endif
577 1.52.2.1 bouyer
578 1.52.2.1 bouyer ohci_soft_itd_t *
579 1.52.2.1 bouyer ohci_alloc_sitd(ohci_softc_t *sc)
580 1.52.2.1 bouyer {
581 1.52.2.1 bouyer ohci_soft_itd_t *sitd;
582 1.52.2.1 bouyer usbd_status err;
583 1.52.2.1 bouyer int i, s, offs;
584 1.52.2.1 bouyer usb_dma_t dma;
585 1.52.2.1 bouyer
586 1.52.2.1 bouyer if (sc->sc_freeitds == NULL) {
587 1.52.2.1 bouyer DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
588 1.52.2.1 bouyer err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
589 1.52.2.1 bouyer OHCI_ITD_ALIGN, &dma);
590 1.52.2.1 bouyer if (err)
591 1.52.2.1 bouyer return (NULL);
592 1.52.2.1 bouyer for(i = 0; i < OHCI_SITD_CHUNK; i++) {
593 1.52.2.1 bouyer offs = i * OHCI_SITD_SIZE;
594 1.52.2.1 bouyer sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs);
595 1.52.2.1 bouyer sitd->physaddr = DMAADDR(&dma) + offs;
596 1.52.2.1 bouyer sitd->nextitd = sc->sc_freeitds;
597 1.52.2.1 bouyer sc->sc_freeitds = sitd;
598 1.52.2.1 bouyer }
599 1.52.2.1 bouyer }
600 1.52.2.1 bouyer
601 1.52.2.1 bouyer s = splusb();
602 1.52.2.1 bouyer sitd = sc->sc_freeitds;
603 1.52.2.1 bouyer sc->sc_freeitds = sitd->nextitd;
604 1.52.2.1 bouyer memset(&sitd->itd, 0, sizeof(ohci_itd_t));
605 1.52.2.1 bouyer sitd->nextitd = NULL;
606 1.52.2.1 bouyer sitd->xfer = NULL;
607 1.52.2.1 bouyer ohci_hash_add_itd(sc, sitd);
608 1.52.2.1 bouyer splx(s);
609 1.52.2.1 bouyer
610 1.52.2.1 bouyer #ifdef DIAGNOSTIC
611 1.52.2.1 bouyer sitd->isdone = 0;
612 1.52.2.1 bouyer #endif
613 1.52.2.1 bouyer
614 1.52.2.1 bouyer return (sitd);
615 1.52.2.1 bouyer }
616 1.52.2.1 bouyer
617 1.52.2.1 bouyer void
618 1.52.2.1 bouyer ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
619 1.52.2.1 bouyer {
620 1.52.2.1 bouyer int s;
621 1.52.2.1 bouyer
622 1.52.2.1 bouyer DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
623 1.52.2.1 bouyer
624 1.52.2.1 bouyer #ifdef DIAGNOSTIC
625 1.52.2.1 bouyer if (!sitd->isdone) {
626 1.52.2.1 bouyer panic("ohci_free_sitd: sitd=%p not done\n", sitd);
627 1.52.2.1 bouyer return;
628 1.52.2.1 bouyer }
629 1.52.2.1 bouyer #endif
630 1.52.2.1 bouyer
631 1.52.2.1 bouyer s = splusb();
632 1.52.2.1 bouyer ohci_hash_rem_itd(sc, sitd);
633 1.52.2.1 bouyer sitd->nextitd = sc->sc_freeitds;
634 1.52.2.1 bouyer sc->sc_freeitds = sitd;
635 1.52.2.1 bouyer splx(s);
636 1.52.2.1 bouyer }
637 1.48 augustss
638 1.48 augustss usbd_status
639 1.52.2.1 bouyer ohci_init(ohci_softc_t *sc)
640 1.1 augustss {
641 1.1 augustss ohci_soft_ed_t *sed, *psed;
642 1.52.2.1 bouyer usbd_status err;
643 1.1 augustss int i;
644 1.52.2.1 bouyer u_int32_t s, ctl, ival, hcr, fm, per, rev, desca;
645 1.16 augustss
646 1.1 augustss DPRINTF(("ohci_init: start\n"));
647 1.36 augustss #if defined(__OpenBSD__)
648 1.52.2.1 bouyer printf(",");
649 1.36 augustss #else
650 1.52.2.1 bouyer printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
651 1.36 augustss #endif
652 1.52.2.1 bouyer rev = OREAD4(sc, OHCI_REVISION);
653 1.52.2.1 bouyer printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
654 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
655 1.52.2.1 bouyer
656 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
657 1.1 augustss printf("%s: unsupported OHCI revision\n",
658 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
659 1.52.2.1 bouyer sc->sc_bus.usbrev = USBREV_UNKNOWN;
660 1.1 augustss return (USBD_INVAL);
661 1.1 augustss }
662 1.52.2.1 bouyer sc->sc_bus.usbrev = USBREV_1_0;
663 1.1 augustss
664 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
665 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
666 1.52.2.1 bouyer for (i = 0; i < OHCI_HASH_SIZE; i++)
667 1.52.2.1 bouyer LIST_INIT(&sc->sc_hash_itds[i]);
668 1.1 augustss
669 1.52.2.1 bouyer SIMPLEQ_INIT(&sc->sc_free_xfers);
670 1.52.2.1 bouyer
671 1.52.2.1 bouyer /* XXX determine alignment by R/W */
672 1.1 augustss /* Allocate the HCCA area. */
673 1.52.2.1 bouyer err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
674 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
675 1.52.2.1 bouyer if (err)
676 1.52.2.1 bouyer return (err);
677 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
678 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
679 1.1 augustss
680 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
681 1.1 augustss
682 1.52.2.1 bouyer /* Allocate dummy ED that starts the control list. */
683 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
684 1.52.2.1 bouyer if (sc->sc_ctrl_head == NULL) {
685 1.52.2.1 bouyer err = USBD_NOMEM;
686 1.1 augustss goto bad1;
687 1.1 augustss }
688 1.52.2.1 bouyer sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
689 1.34 augustss
690 1.52.2.1 bouyer /* Allocate dummy ED that starts the bulk list. */
691 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
692 1.52.2.1 bouyer if (sc->sc_bulk_head == NULL) {
693 1.52.2.1 bouyer err = USBD_NOMEM;
694 1.1 augustss goto bad2;
695 1.1 augustss }
696 1.52.2.1 bouyer sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
697 1.52.2.1 bouyer
698 1.52.2.1 bouyer /* Allocate dummy ED that starts the isochronous list. */
699 1.52.2.1 bouyer sc->sc_isoc_head = ohci_alloc_sed(sc);
700 1.52.2.1 bouyer if (sc->sc_isoc_head == NULL) {
701 1.52.2.1 bouyer err = USBD_NOMEM;
702 1.52.2.1 bouyer goto bad3;
703 1.52.2.1 bouyer }
704 1.52.2.1 bouyer sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
705 1.1 augustss
706 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
707 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
708 1.1 augustss sed = ohci_alloc_sed(sc);
709 1.52.2.1 bouyer if (sed == NULL) {
710 1.1 augustss while (--i >= 0)
711 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
712 1.52.2.1 bouyer err = USBD_NOMEM;
713 1.52.2.1 bouyer goto bad4;
714 1.1 augustss }
715 1.1 augustss /* All ED fields are set to 0. */
716 1.1 augustss sc->sc_eds[i] = sed;
717 1.52.2.1 bouyer sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
718 1.52.2.1 bouyer if (i != 0)
719 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
720 1.52.2.1 bouyer else
721 1.52.2.1 bouyer psed= sc->sc_isoc_head;
722 1.52.2.1 bouyer sed->next = psed;
723 1.52.2.1 bouyer sed->ed.ed_nexted = htole32(psed->physaddr);
724 1.1 augustss }
725 1.1 augustss /*
726 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
727 1.1 augustss * the tree set up properly to spread the interrupts.
728 1.1 augustss */
729 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
730 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
731 1.52.2.1 bouyer htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
732 1.52.2.1 bouyer
733 1.52.2.1 bouyer #ifdef OHCI_DEBUG
734 1.52.2.1 bouyer if (ohcidebug > 15) {
735 1.52.2.1 bouyer for (i = 0; i < OHCI_NO_EDS; i++) {
736 1.52.2.1 bouyer printf("ed#%d ", i);
737 1.52.2.1 bouyer ohci_dump_ed(sc->sc_eds[i]);
738 1.52.2.1 bouyer }
739 1.52.2.1 bouyer printf("iso ");
740 1.52.2.1 bouyer ohci_dump_ed(sc->sc_isoc_head);
741 1.52.2.1 bouyer }
742 1.52.2.1 bouyer #endif
743 1.1 augustss
744 1.1 augustss /* Determine in what context we are running. */
745 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
746 1.1 augustss if (ctl & OHCI_IR) {
747 1.1 augustss /* SMM active, request change */
748 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
749 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
750 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
751 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
752 1.52.2.1 bouyer usb_delay_ms(&sc->sc_bus, 1);
753 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
754 1.1 augustss }
755 1.1 augustss if ((ctl & OHCI_IR) == 0) {
756 1.15 augustss printf("%s: SMM does not respond, resetting\n",
757 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
758 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
759 1.1 augustss goto reset;
760 1.1 augustss }
761 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
762 1.1 augustss /* BIOS started controller. */
763 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
764 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
765 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
766 1.52.2.1 bouyer usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
767 1.1 augustss }
768 1.1 augustss } else {
769 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
770 1.1 augustss reset:
771 1.1 augustss /* Controller was cold started. */
772 1.52.2.1 bouyer usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
773 1.1 augustss }
774 1.1 augustss
775 1.16 augustss /*
776 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
777 1.25 augustss * without it some controllers do not start.
778 1.16 augustss */
779 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
780 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
781 1.52.2.1 bouyer usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
782 1.16 augustss
783 1.1 augustss /* We now own the host controller and the bus has been reset. */
784 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
785 1.1 augustss
786 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
787 1.1 augustss /* Nominal time for a reset is 10 us. */
788 1.1 augustss for (i = 0; i < 10; i++) {
789 1.1 augustss delay(10);
790 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
791 1.1 augustss if (!hcr)
792 1.1 augustss break;
793 1.1 augustss }
794 1.1 augustss if (hcr) {
795 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
796 1.52.2.1 bouyer err = USBD_IOERROR;
797 1.52.2.1 bouyer goto bad5;
798 1.1 augustss }
799 1.52 augustss #ifdef OHCI_DEBUG
800 1.1 augustss if (ohcidebug > 15)
801 1.1 augustss ohci_dumpregs(sc);
802 1.1 augustss #endif
803 1.1 augustss
804 1.52.2.1 bouyer /* The controller is now in SUSPEND state, we have 2ms to finish. */
805 1.1 augustss
806 1.1 augustss /* Set up HC registers. */
807 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
808 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
809 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
810 1.52.2.1 bouyer /* disable all interrupts and then switch on all desired interrupts */
811 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
812 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
813 1.52.2.1 bouyer /* switch on desired functional features */
814 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
815 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
816 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
817 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
818 1.1 augustss /* And finally start it! */
819 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
820 1.1 augustss
821 1.1 augustss /*
822 1.1 augustss * The controller is now OPERATIONAL. Set a some final
823 1.1 augustss * registers that should be set earlier, but that the
824 1.1 augustss * controller ignores when in the SUSPEND state.
825 1.1 augustss */
826 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
827 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
828 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
829 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
830 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
831 1.1 augustss
832 1.52.2.1 bouyer /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
833 1.52.2.1 bouyer desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
834 1.52.2.1 bouyer OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
835 1.52.2.1 bouyer OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
836 1.52.2.1 bouyer usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
837 1.52.2.1 bouyer OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
838 1.1 augustss
839 1.52.2.1 bouyer /*
840 1.52.2.1 bouyer * The AMD756 requires a delay before re-reading the register,
841 1.52.2.1 bouyer * otherwise it will occasionally report 0 ports.
842 1.52.2.1 bouyer */
843 1.52.2.1 bouyer usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
844 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
845 1.1 augustss
846 1.52 augustss #ifdef OHCI_DEBUG
847 1.1 augustss if (ohcidebug > 5)
848 1.1 augustss ohci_dumpregs(sc);
849 1.1 augustss #endif
850 1.1 augustss
851 1.1 augustss /* Set up the bus struct. */
852 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
853 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
854 1.1 augustss
855 1.52.2.1 bouyer #if defined(__NetBSD__) || defined(__OpenBSD__)
856 1.47 augustss sc->sc_powerhook = powerhook_establish(ohci_power, sc);
857 1.52.2.1 bouyer sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
858 1.52.2.1 bouyer #endif
859 1.33 augustss
860 1.1 augustss return (USBD_NORMAL_COMPLETION);
861 1.1 augustss
862 1.52.2.1 bouyer bad5:
863 1.52.2.1 bouyer for (i = 0; i < OHCI_NO_EDS; i++)
864 1.52.2.1 bouyer ohci_free_sed(sc, sc->sc_eds[i]);
865 1.52.2.1 bouyer bad4:
866 1.52.2.1 bouyer ohci_free_sed(sc, sc->sc_isoc_head);
867 1.1 augustss bad3:
868 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
869 1.1 augustss bad2:
870 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
871 1.1 augustss bad1:
872 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
873 1.52.2.1 bouyer return (err);
874 1.1 augustss }
875 1.1 augustss
876 1.42 augustss usbd_status
877 1.52.2.1 bouyer ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
878 1.42 augustss {
879 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
880 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
881 1.52 augustss #endif
882 1.42 augustss
883 1.44 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
884 1.42 augustss }
885 1.42 augustss
886 1.42 augustss void
887 1.52.2.1 bouyer ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
888 1.42 augustss {
889 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
890 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
891 1.52 augustss #endif
892 1.42 augustss
893 1.44 augustss usb_freemem(&sc->sc_bus, dma);
894 1.42 augustss }
895 1.42 augustss
896 1.52.2.1 bouyer usbd_xfer_handle
897 1.52.2.1 bouyer ohci_allocx(struct usbd_bus *bus)
898 1.52.2.1 bouyer {
899 1.52.2.1 bouyer struct ohci_softc *sc = (struct ohci_softc *)bus;
900 1.52.2.1 bouyer usbd_xfer_handle xfer;
901 1.52.2.1 bouyer
902 1.52.2.1 bouyer xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
903 1.52.2.1 bouyer if (xfer != NULL)
904 1.52.2.1 bouyer SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
905 1.52.2.1 bouyer else
906 1.52.2.1 bouyer xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT);
907 1.52.2.1 bouyer if (xfer != NULL)
908 1.52.2.1 bouyer memset(xfer, 0, sizeof *xfer);
909 1.52.2.1 bouyer return (xfer);
910 1.52.2.1 bouyer }
911 1.52.2.1 bouyer
912 1.52.2.1 bouyer void
913 1.52.2.1 bouyer ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
914 1.52.2.1 bouyer {
915 1.52.2.1 bouyer struct ohci_softc *sc = (struct ohci_softc *)bus;
916 1.52.2.1 bouyer
917 1.52.2.1 bouyer SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
918 1.52.2.1 bouyer }
919 1.52.2.1 bouyer
920 1.52.2.1 bouyer /*
921 1.52.2.1 bouyer * Shut down the controller when the system is going down.
922 1.52.2.1 bouyer */
923 1.33 augustss void
924 1.52.2.1 bouyer ohci_shutdown(void *v)
925 1.52.2.1 bouyer {
926 1.52.2.1 bouyer ohci_softc_t *sc = v;
927 1.52.2.1 bouyer
928 1.52.2.1 bouyer DPRINTF(("ohci_shutdown: stopping the HC\n"));
929 1.52.2.1 bouyer OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
930 1.52.2.1 bouyer }
931 1.52.2.1 bouyer
932 1.52.2.1 bouyer /*
933 1.52.2.1 bouyer * Handle suspend/resume.
934 1.52.2.1 bouyer *
935 1.52.2.1 bouyer * We need to switch to polling mode here, because this routine is
936 1.52.2.1 bouyer * called from an intterupt context. This is all right since we
937 1.52.2.1 bouyer * are almost suspended anyway.
938 1.52.2.1 bouyer */
939 1.52.2.1 bouyer void
940 1.52.2.1 bouyer ohci_power(int why, void *v)
941 1.33 augustss {
942 1.33 augustss ohci_softc_t *sc = v;
943 1.52.2.4 bouyer u_int32_t ctl;
944 1.52.2.3 bouyer int s;
945 1.33 augustss
946 1.52.2.3 bouyer #ifdef OHCI_DEBUG
947 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
948 1.33 augustss ohci_dumpregs(sc);
949 1.33 augustss #endif
950 1.52.2.3 bouyer
951 1.52.2.5 bouyer s = splhardusb();
952 1.52.2.3 bouyer switch (why) {
953 1.52.2.3 bouyer case PWR_SUSPEND:
954 1.52.2.3 bouyer case PWR_STANDBY:
955 1.52.2.4 bouyer sc->sc_bus.use_polling++;
956 1.52.2.4 bouyer ctl = OREAD4(sc, OHCI_CONTROL);
957 1.52.2.4 bouyer ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_SUSPEND;
958 1.52.2.4 bouyer OWRITE4(sc, OHCI_CONTROL, ctl);
959 1.52.2.4 bouyer usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT);
960 1.52.2.4 bouyer sc->sc_bus.use_polling--;
961 1.52.2.3 bouyer break;
962 1.52.2.3 bouyer case PWR_RESUME:
963 1.52.2.4 bouyer sc->sc_bus.use_polling++;
964 1.52.2.4 bouyer ctl = OREAD4(sc, OHCI_CONTROL);
965 1.52.2.4 bouyer ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_RESUME;
966 1.52.2.4 bouyer OWRITE4(sc, OHCI_CONTROL, ctl);
967 1.52.2.4 bouyer usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
968 1.52.2.4 bouyer ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL;
969 1.52.2.4 bouyer OWRITE4(sc, OHCI_CONTROL, ctl);
970 1.52.2.4 bouyer usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY);
971 1.52.2.4 bouyer sc->sc_bus.use_polling--;
972 1.52.2.3 bouyer break;
973 1.52.2.3 bouyer case PWR_SOFTSUSPEND:
974 1.52.2.3 bouyer case PWR_SOFTSTANDBY:
975 1.52.2.3 bouyer case PWR_SOFTRESUME:
976 1.52.2.3 bouyer break;
977 1.52.2.3 bouyer }
978 1.52.2.3 bouyer splx(s);
979 1.33 augustss }
980 1.33 augustss
981 1.52 augustss #ifdef OHCI_DEBUG
982 1.1 augustss void
983 1.52.2.1 bouyer ohci_dumpregs(ohci_softc_t *sc)
984 1.1 augustss {
985 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
986 1.41 augustss OREAD4(sc, OHCI_REVISION),
987 1.41 augustss OREAD4(sc, OHCI_CONTROL),
988 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
989 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
990 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
991 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
992 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
993 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
994 1.41 augustss OREAD4(sc, OHCI_HCCA),
995 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
996 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
997 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
998 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
999 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
1000 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
1001 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
1002 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
1003 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
1004 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
1005 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
1006 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
1007 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
1008 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
1009 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
1010 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
1011 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
1012 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
1013 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
1014 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
1015 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
1016 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
1017 1.52.2.1 bouyer le32toh(sc->sc_hcca->hcca_frame_number),
1018 1.52.2.1 bouyer le32toh(sc->sc_hcca->hcca_done_head)));
1019 1.1 augustss }
1020 1.1 augustss #endif
1021 1.1 augustss
1022 1.52.2.1 bouyer Static int ohci_intr1(ohci_softc_t *);
1023 1.52.2.1 bouyer
1024 1.1 augustss int
1025 1.52.2.1 bouyer ohci_intr(void *p)
1026 1.1 augustss {
1027 1.1 augustss ohci_softc_t *sc = p;
1028 1.52.2.1 bouyer
1029 1.52.2.1 bouyer /* If we get an interrupt while polling, then just ignore it. */
1030 1.52.2.1 bouyer if (sc->sc_bus.use_polling) {
1031 1.52.2.1 bouyer #ifdef DIAGNOSTIC
1032 1.52.2.1 bouyer printf("ohci_intr: ignored interrupt while polling\n");
1033 1.52.2.1 bouyer #endif
1034 1.52.2.1 bouyer return (0);
1035 1.52.2.1 bouyer }
1036 1.52.2.1 bouyer
1037 1.52.2.1 bouyer return (ohci_intr1(sc));
1038 1.52.2.1 bouyer }
1039 1.52.2.1 bouyer
1040 1.52.2.1 bouyer Static int
1041 1.52.2.1 bouyer ohci_intr1(ohci_softc_t *sc)
1042 1.52.2.1 bouyer {
1043 1.1 augustss u_int32_t intrs, eintrs;
1044 1.1 augustss ohci_physaddr_t done;
1045 1.1 augustss
1046 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1047 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1048 1.15 augustss #ifdef DIAGNOSTIC
1049 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1050 1.15 augustss #endif
1051 1.15 augustss return (0);
1052 1.15 augustss }
1053 1.15 augustss
1054 1.27 augustss intrs = 0;
1055 1.52.2.1 bouyer done = le32toh(sc->sc_hcca->hcca_done_head);
1056 1.1 augustss if (done != 0) {
1057 1.26 augustss if (done & ~OHCI_DONE_INTRS)
1058 1.26 augustss intrs = OHCI_WDH;
1059 1.1 augustss if (done & OHCI_DONE_INTRS)
1060 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1061 1.1 augustss } else
1062 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1063 1.52.2.1 bouyer
1064 1.1 augustss if (!intrs)
1065 1.1 augustss return (0);
1066 1.52.2.1 bouyer
1067 1.1 augustss intrs &= ~OHCI_MIE;
1068 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1069 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1070 1.1 augustss if (!eintrs)
1071 1.1 augustss return (0);
1072 1.1 augustss
1073 1.45 augustss sc->sc_bus.intr_context++;
1074 1.44 augustss sc->sc_bus.no_intrs++;
1075 1.52.2.1 bouyer DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1076 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1077 1.1 augustss (u_int)eintrs));
1078 1.1 augustss
1079 1.1 augustss if (eintrs & OHCI_SO) {
1080 1.52.2.5 bouyer sc->sc_overrun_cnt++;
1081 1.52.2.5 bouyer if (usbd_ratecheck(&sc->sc_overrun_ntc)) {
1082 1.52.2.5 bouyer printf("%s: %u scheduling overruns\n",
1083 1.52.2.5 bouyer USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt);
1084 1.52.2.5 bouyer sc->sc_overrun_cnt = 0;
1085 1.52.2.5 bouyer }
1086 1.1 augustss /* XXX do what */
1087 1.1 augustss intrs &= ~OHCI_SO;
1088 1.1 augustss }
1089 1.1 augustss if (eintrs & OHCI_WDH) {
1090 1.52.2.1 bouyer ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1091 1.52.2.1 bouyer sc->sc_hcca->hcca_done_head = 0;
1092 1.52.2.1 bouyer usb_schedsoftintr(&sc->sc_bus);
1093 1.1 augustss intrs &= ~OHCI_WDH;
1094 1.1 augustss }
1095 1.1 augustss if (eintrs & OHCI_RD) {
1096 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1097 1.1 augustss /* XXX process resume detect */
1098 1.1 augustss }
1099 1.1 augustss if (eintrs & OHCI_UE) {
1100 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1101 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
1102 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1103 1.1 augustss /* XXX what else */
1104 1.1 augustss }
1105 1.1 augustss if (eintrs & OHCI_RHSC) {
1106 1.52.2.1 bouyer ohci_rhsc(sc, sc->sc_intrxfer);
1107 1.1 augustss intrs &= ~OHCI_RHSC;
1108 1.1 augustss
1109 1.1 augustss /*
1110 1.1 augustss * Disable RHSC interrupt for now, because it will be
1111 1.1 augustss * on until the port has been reset.
1112 1.1 augustss */
1113 1.1 augustss ohci_rhsc_able(sc, 0);
1114 1.1 augustss }
1115 1.1 augustss
1116 1.45 augustss sc->sc_bus.intr_context--;
1117 1.44 augustss
1118 1.1 augustss /* Block unprocessed interrupts. XXX */
1119 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
1120 1.1 augustss sc->sc_eintrs &= ~intrs;
1121 1.1 augustss
1122 1.1 augustss return (1);
1123 1.1 augustss }
1124 1.1 augustss
1125 1.1 augustss void
1126 1.52.2.1 bouyer ohci_rhsc_able(ohci_softc_t *sc, int on)
1127 1.1 augustss {
1128 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1129 1.1 augustss if (on) {
1130 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
1131 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1132 1.1 augustss } else {
1133 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
1134 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1135 1.1 augustss }
1136 1.1 augustss }
1137 1.1 augustss
1138 1.52 augustss #ifdef OHCI_DEBUG
1139 1.13 augustss char *ohci_cc_strs[] = {
1140 1.13 augustss "NO_ERROR",
1141 1.13 augustss "CRC",
1142 1.13 augustss "BIT_STUFFING",
1143 1.13 augustss "DATA_TOGGLE_MISMATCH",
1144 1.13 augustss "STALL",
1145 1.13 augustss "DEVICE_NOT_RESPONDING",
1146 1.13 augustss "PID_CHECK_FAILURE",
1147 1.13 augustss "UNEXPECTED_PID",
1148 1.13 augustss "DATA_OVERRUN",
1149 1.13 augustss "DATA_UNDERRUN",
1150 1.13 augustss "BUFFER_OVERRUN",
1151 1.13 augustss "BUFFER_UNDERRUN",
1152 1.52.2.1 bouyer "reserved",
1153 1.52.2.1 bouyer "reserved",
1154 1.52.2.1 bouyer "NOT_ACCESSED",
1155 1.13 augustss "NOT_ACCESSED",
1156 1.13 augustss };
1157 1.13 augustss #endif
1158 1.13 augustss
1159 1.1 augustss void
1160 1.52.2.1 bouyer ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1161 1.1 augustss {
1162 1.52.2.1 bouyer ohci_soft_itd_t *sitd, *sidone, **ip;
1163 1.52.2.1 bouyer ohci_soft_td_t *std, *sdone, **p;
1164 1.1 augustss
1165 1.1 augustss /* Reverse the done list. */
1166 1.52.2.1 bouyer for (sdone = NULL, sidone = NULL; done != 0; ) {
1167 1.1 augustss std = ohci_hash_find_td(sc, done);
1168 1.52.2.1 bouyer if (std != NULL) {
1169 1.52.2.1 bouyer std->dnext = sdone;
1170 1.52.2.1 bouyer done = le32toh(std->td.td_nexttd);
1171 1.52.2.1 bouyer sdone = std;
1172 1.52.2.1 bouyer DPRINTFN(10,("add TD %p\n", std));
1173 1.52.2.1 bouyer continue;
1174 1.52.2.1 bouyer }
1175 1.52.2.1 bouyer sitd = ohci_hash_find_itd(sc, done);
1176 1.52.2.1 bouyer if (sitd != NULL) {
1177 1.52.2.1 bouyer sitd->dnext = sidone;
1178 1.52.2.1 bouyer done = le32toh(sitd->itd.itd_nextitd);
1179 1.52.2.1 bouyer sidone = sitd;
1180 1.52.2.1 bouyer DPRINTFN(5,("add ITD %p\n", sitd));
1181 1.52.2.1 bouyer continue;
1182 1.52.2.1 bouyer }
1183 1.52.2.1 bouyer panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done);
1184 1.52.2.1 bouyer }
1185 1.52.2.1 bouyer
1186 1.52.2.1 bouyer /* sdone & sidone now hold the done lists. */
1187 1.52.2.1 bouyer /* Put them on the already processed lists. */
1188 1.52.2.1 bouyer for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1189 1.52.2.1 bouyer ;
1190 1.52.2.1 bouyer *p = sdone;
1191 1.52.2.1 bouyer for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1192 1.52.2.1 bouyer ;
1193 1.52.2.1 bouyer *ip = sidone;
1194 1.52.2.1 bouyer }
1195 1.52.2.1 bouyer
1196 1.52.2.1 bouyer void
1197 1.52.2.5 bouyer ohci_softintr(void *v)
1198 1.52.2.1 bouyer {
1199 1.52.2.5 bouyer ohci_softc_t *sc = v;
1200 1.52.2.1 bouyer ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1201 1.52.2.1 bouyer ohci_soft_td_t *std, *sdone, *stdnext;
1202 1.52.2.1 bouyer usbd_xfer_handle xfer;
1203 1.52.2.1 bouyer int len, cc, s;
1204 1.52.2.1 bouyer
1205 1.52.2.1 bouyer sc->sc_bus.intr_context++;
1206 1.52.2.1 bouyer
1207 1.52.2.1 bouyer s = splhardusb();
1208 1.52.2.1 bouyer sdone = sc->sc_sdone;
1209 1.52.2.1 bouyer sc->sc_sdone = NULL;
1210 1.52.2.1 bouyer sidone = sc->sc_sidone;
1211 1.52.2.1 bouyer sc->sc_sidone = NULL;
1212 1.52.2.1 bouyer splx(s);
1213 1.52.2.1 bouyer
1214 1.52.2.1 bouyer DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone));
1215 1.1 augustss
1216 1.52 augustss #ifdef OHCI_DEBUG
1217 1.1 augustss if (ohcidebug > 10) {
1218 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1219 1.1 augustss ohci_dump_tds(sdone);
1220 1.1 augustss }
1221 1.1 augustss #endif
1222 1.1 augustss
1223 1.48 augustss for (std = sdone; std; std = stdnext) {
1224 1.52.2.1 bouyer xfer = std->xfer;
1225 1.48 augustss stdnext = std->dnext;
1226 1.52.2.1 bouyer DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1227 1.52.2.1 bouyer std, xfer, xfer ? xfer->hcpriv : 0));
1228 1.52.2.1 bouyer if (xfer == NULL) {
1229 1.52.2.1 bouyer /* xfer == NULL: There seems to be no xfer associated
1230 1.52.2.1 bouyer * with this TD. It is tailp that happened to end up on
1231 1.52.2.1 bouyer * the done queue.
1232 1.52.2.1 bouyer */
1233 1.52.2.1 bouyer continue;
1234 1.52.2.1 bouyer }
1235 1.52.2.1 bouyer if (xfer->status == USBD_CANCELLED ||
1236 1.52.2.1 bouyer xfer->status == USBD_TIMEOUT) {
1237 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1238 1.52.2.1 bouyer xfer));
1239 1.38 augustss /* Handled by abort routine. */
1240 1.52.2.1 bouyer continue;
1241 1.52.2.1 bouyer }
1242 1.52.2.1 bouyer usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1243 1.52.2.1 bouyer cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1244 1.52.2.1 bouyer if (cc == OHCI_CC_NO_ERROR) {
1245 1.34 augustss len = std->len;
1246 1.39 augustss if (std->td.td_cbp != 0)
1247 1.52.2.1 bouyer len -= le32toh(std->td.td_be) -
1248 1.52.2.1 bouyer le32toh(std->td.td_cbp) + 1;
1249 1.52.2.1 bouyer DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n",
1250 1.52.2.1 bouyer len, std->flags));
1251 1.48 augustss if (std->flags & OHCI_ADD_LEN)
1252 1.52.2.1 bouyer xfer->actlen += len;
1253 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1254 1.52.2.1 bouyer xfer->status = USBD_NORMAL_COMPLETION;
1255 1.52.2.1 bouyer usb_transfer_complete(xfer);
1256 1.21 augustss }
1257 1.48 augustss ohci_free_std(sc, std);
1258 1.1 augustss } else {
1259 1.48 augustss /*
1260 1.48 augustss * Endpoint is halted. First unlink all the TDs
1261 1.48 augustss * belonging to the failed transfer, and then restart
1262 1.48 augustss * the endpoint.
1263 1.48 augustss */
1264 1.1 augustss ohci_soft_td_t *p, *n;
1265 1.1 augustss struct ohci_pipe *opipe =
1266 1.52.2.1 bouyer (struct ohci_pipe *)xfer->pipe;
1267 1.48 augustss
1268 1.52.2.1 bouyer DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1269 1.52.2.1 bouyer OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1270 1.52.2.1 bouyer ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1271 1.48 augustss
1272 1.48 augustss /* remove TDs */
1273 1.52.2.1 bouyer for (p = std; p->xfer == xfer; p = n) {
1274 1.1 augustss n = p->nexttd;
1275 1.1 augustss ohci_free_std(sc, p);
1276 1.1 augustss }
1277 1.48 augustss
1278 1.16 augustss /* clear halt */
1279 1.52.2.1 bouyer opipe->sed->ed.ed_headp = htole32(p->physaddr);
1280 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1281 1.48 augustss
1282 1.1 augustss if (cc == OHCI_CC_STALL)
1283 1.52.2.1 bouyer xfer->status = USBD_STALLED;
1284 1.1 augustss else
1285 1.52.2.1 bouyer xfer->status = USBD_IOERROR;
1286 1.52.2.1 bouyer usb_transfer_complete(xfer);
1287 1.1 augustss }
1288 1.1 augustss }
1289 1.52.2.1 bouyer
1290 1.52.2.1 bouyer #ifdef OHCI_DEBUG
1291 1.52.2.1 bouyer if (ohcidebug > 10) {
1292 1.52.2.1 bouyer DPRINTF(("ohci_process_done: ITD done:\n"));
1293 1.52.2.1 bouyer ohci_dump_itds(sidone);
1294 1.52.2.1 bouyer }
1295 1.52.2.1 bouyer #endif
1296 1.52.2.1 bouyer
1297 1.52.2.1 bouyer for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1298 1.52.2.1 bouyer xfer = sitd->xfer;
1299 1.52.2.1 bouyer sitdnext = sitd->dnext;
1300 1.52.2.1 bouyer DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1301 1.52.2.1 bouyer sitd, xfer, xfer ? xfer->hcpriv : 0));
1302 1.52.2.1 bouyer if (xfer == NULL)
1303 1.52.2.1 bouyer continue;
1304 1.52.2.1 bouyer if (xfer->status == USBD_CANCELLED ||
1305 1.52.2.1 bouyer xfer->status == USBD_TIMEOUT) {
1306 1.52.2.1 bouyer DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1307 1.52.2.1 bouyer xfer));
1308 1.52.2.1 bouyer /* Handled by abort routine. */
1309 1.52.2.1 bouyer continue;
1310 1.52.2.1 bouyer }
1311 1.52.2.1 bouyer #ifdef DIAGNOSTIC
1312 1.52.2.1 bouyer if (sitd->isdone)
1313 1.52.2.1 bouyer printf("ohci_softintr: sitd=%p is done\n", sitd);
1314 1.52.2.1 bouyer sitd->isdone = 1;
1315 1.52.2.1 bouyer #endif
1316 1.52.2.1 bouyer cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1317 1.52.2.1 bouyer if (cc == OHCI_CC_NO_ERROR) {
1318 1.52.2.1 bouyer /* XXX compute length for input */
1319 1.52.2.1 bouyer struct ohci_pipe *opipe =
1320 1.52.2.1 bouyer (struct ohci_pipe *)xfer->pipe;
1321 1.52.2.1 bouyer if (sitd->flags & OHCI_CALL_DONE) {
1322 1.52.2.1 bouyer opipe->u.iso.inuse -= xfer->nframes;
1323 1.52.2.2 bouyer /* XXX update frlengths with actual length */
1324 1.52.2.1 bouyer /* XXX xfer->actlen = actlen; */
1325 1.52.2.1 bouyer xfer->status = USBD_NORMAL_COMPLETION;
1326 1.52.2.1 bouyer usb_transfer_complete(xfer);
1327 1.52.2.1 bouyer }
1328 1.52.2.1 bouyer } else {
1329 1.52.2.1 bouyer /* XXX Do more */
1330 1.52.2.1 bouyer xfer->status = USBD_IOERROR;
1331 1.52.2.1 bouyer usb_transfer_complete(xfer);
1332 1.52.2.1 bouyer }
1333 1.52.2.1 bouyer }
1334 1.52.2.1 bouyer
1335 1.52.2.1 bouyer sc->sc_bus.intr_context--;
1336 1.1 augustss }
1337 1.1 augustss
1338 1.1 augustss void
1339 1.52.2.1 bouyer ohci_device_ctrl_done(usbd_xfer_handle xfer)
1340 1.1 augustss {
1341 1.52.2.1 bouyer DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer));
1342 1.1 augustss
1343 1.38 augustss #ifdef DIAGNOSTIC
1344 1.52.2.1 bouyer if (!(xfer->rqflags & URQ_REQUEST)) {
1345 1.8 augustss panic("ohci_ctrl_done: not a request\n");
1346 1.1 augustss }
1347 1.38 augustss #endif
1348 1.52.2.1 bouyer xfer->hcpriv = NULL;
1349 1.1 augustss }
1350 1.1 augustss
1351 1.1 augustss void
1352 1.52.2.1 bouyer ohci_device_intr_done(usbd_xfer_handle xfer)
1353 1.1 augustss {
1354 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1355 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1356 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1357 1.48 augustss ohci_soft_td_t *data, *tail;
1358 1.1 augustss
1359 1.1 augustss
1360 1.52.2.1 bouyer DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n",
1361 1.52.2.1 bouyer xfer, xfer->actlen));
1362 1.1 augustss
1363 1.52.2.1 bouyer xfer->hcpriv = NULL;
1364 1.38 augustss
1365 1.52.2.1 bouyer if (xfer->pipe->repeat) {
1366 1.52.2.1 bouyer data = opipe->tail.td;
1367 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1368 1.52.2.1 bouyer if (tail == NULL) {
1369 1.52.2.1 bouyer xfer->status = USBD_NOMEM;
1370 1.1 augustss return;
1371 1.1 augustss }
1372 1.52.2.1 bouyer tail->xfer = NULL;
1373 1.1 augustss
1374 1.52.2.1 bouyer data->td.td_flags = htole32(
1375 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1376 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1377 1.52.2.1 bouyer if (xfer->flags & USBD_SHORT_XFER_OK)
1378 1.52.2.1 bouyer data->td.td_flags |= htole32(OHCI_TD_R);
1379 1.52.2.1 bouyer data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf));
1380 1.48 augustss data->nexttd = tail;
1381 1.52.2.1 bouyer data->td.td_nexttd = htole32(tail->physaddr);
1382 1.52.2.1 bouyer data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1383 1.52.2.1 bouyer xfer->length - 1);
1384 1.52.2.1 bouyer data->len = xfer->length;
1385 1.52.2.1 bouyer data->xfer = xfer;
1386 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1387 1.52.2.1 bouyer xfer->hcpriv = data;
1388 1.52.2.1 bouyer xfer->actlen = 0;
1389 1.1 augustss
1390 1.52.2.1 bouyer sed->ed.ed_tailp = htole32(tail->physaddr);
1391 1.52.2.1 bouyer opipe->tail.td = tail;
1392 1.1 augustss }
1393 1.1 augustss }
1394 1.1 augustss
1395 1.1 augustss void
1396 1.52.2.1 bouyer ohci_device_bulk_done(usbd_xfer_handle xfer)
1397 1.3 augustss {
1398 1.52.2.1 bouyer DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n",
1399 1.52.2.1 bouyer xfer, xfer->actlen));
1400 1.3 augustss
1401 1.52.2.1 bouyer xfer->hcpriv = NULL;
1402 1.3 augustss }
1403 1.3 augustss
1404 1.3 augustss void
1405 1.52.2.1 bouyer ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1406 1.1 augustss {
1407 1.1 augustss usbd_pipe_handle pipe;
1408 1.1 augustss struct ohci_pipe *opipe;
1409 1.1 augustss u_char *p;
1410 1.1 augustss int i, m;
1411 1.1 augustss int hstatus;
1412 1.1 augustss
1413 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1414 1.52.2.1 bouyer DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1415 1.52.2.1 bouyer sc, xfer, hstatus));
1416 1.1 augustss
1417 1.52.2.1 bouyer if (xfer == NULL) {
1418 1.1 augustss /* Just ignore the change. */
1419 1.1 augustss return;
1420 1.1 augustss }
1421 1.1 augustss
1422 1.52.2.1 bouyer pipe = xfer->pipe;
1423 1.1 augustss opipe = (struct ohci_pipe *)pipe;
1424 1.1 augustss
1425 1.52.2.1 bouyer p = KERNADDR(&xfer->dmabuf);
1426 1.52.2.1 bouyer m = min(sc->sc_noport, xfer->length * 8 - 1);
1427 1.52.2.1 bouyer memset(p, 0, xfer->length);
1428 1.1 augustss for (i = 1; i <= m; i++) {
1429 1.52.2.1 bouyer /* Pick out CHANGE bits from the status reg. */
1430 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1431 1.1 augustss p[i/8] |= 1 << (i%8);
1432 1.1 augustss }
1433 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1434 1.52.2.1 bouyer xfer->actlen = xfer->length;
1435 1.52.2.1 bouyer xfer->status = USBD_NORMAL_COMPLETION;
1436 1.1 augustss
1437 1.52.2.1 bouyer usb_transfer_complete(xfer);
1438 1.38 augustss }
1439 1.38 augustss
1440 1.38 augustss void
1441 1.52.2.1 bouyer ohci_root_intr_done(usbd_xfer_handle xfer)
1442 1.38 augustss {
1443 1.52.2.1 bouyer xfer->hcpriv = NULL;
1444 1.52.2.1 bouyer }
1445 1.52.2.1 bouyer
1446 1.52.2.1 bouyer void
1447 1.52.2.1 bouyer ohci_root_ctrl_done(usbd_xfer_handle xfer)
1448 1.52.2.1 bouyer {
1449 1.52.2.1 bouyer xfer->hcpriv = NULL;
1450 1.1 augustss }
1451 1.1 augustss
1452 1.1 augustss /*
1453 1.1 augustss * Wait here until controller claims to have an interrupt.
1454 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1455 1.1 augustss * too long.
1456 1.1 augustss */
1457 1.1 augustss void
1458 1.52.2.1 bouyer ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1459 1.1 augustss {
1460 1.52.2.1 bouyer int timo = xfer->timeout;
1461 1.1 augustss int usecs;
1462 1.1 augustss u_int32_t intrs;
1463 1.1 augustss
1464 1.52.2.1 bouyer xfer->status = USBD_IN_PROGRESS;
1465 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1466 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1467 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1468 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1469 1.52 augustss #ifdef OHCI_DEBUG
1470 1.1 augustss if (ohcidebug > 15)
1471 1.1 augustss ohci_dumpregs(sc);
1472 1.1 augustss #endif
1473 1.1 augustss if (intrs) {
1474 1.52.2.1 bouyer ohci_intr1(sc);
1475 1.52.2.1 bouyer if (xfer->status != USBD_IN_PROGRESS)
1476 1.1 augustss return;
1477 1.1 augustss }
1478 1.1 augustss }
1479 1.15 augustss
1480 1.15 augustss /* Timeout */
1481 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1482 1.52.2.1 bouyer xfer->status = USBD_TIMEOUT;
1483 1.52.2.1 bouyer usb_transfer_complete(xfer);
1484 1.15 augustss /* XXX should free TD */
1485 1.5 augustss }
1486 1.5 augustss
1487 1.5 augustss void
1488 1.52.2.1 bouyer ohci_poll(struct usbd_bus *bus)
1489 1.5 augustss {
1490 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1491 1.5 augustss
1492 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1493 1.52.2.1 bouyer ohci_intr1(sc);
1494 1.1 augustss }
1495 1.1 augustss
1496 1.1 augustss usbd_status
1497 1.52.2.1 bouyer ohci_device_request(usbd_xfer_handle xfer)
1498 1.1 augustss {
1499 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1500 1.52.2.1 bouyer usb_device_request_t *req = &xfer->request;
1501 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1502 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1503 1.1 augustss int addr = dev->address;
1504 1.52.2.1 bouyer ohci_soft_td_t *setup, *stat, *next, *tail;
1505 1.1 augustss ohci_soft_ed_t *sed;
1506 1.1 augustss int isread;
1507 1.1 augustss int len;
1508 1.52.2.1 bouyer usbd_status err;
1509 1.1 augustss int s;
1510 1.1 augustss
1511 1.1 augustss isread = req->bmRequestType & UT_READ;
1512 1.1 augustss len = UGETW(req->wLength);
1513 1.1 augustss
1514 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1515 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1516 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1517 1.1 augustss UGETW(req->wIndex), len, addr,
1518 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1519 1.1 augustss
1520 1.52.2.1 bouyer setup = opipe->tail.td;
1521 1.1 augustss stat = ohci_alloc_std(sc);
1522 1.52.2.1 bouyer if (stat == NULL) {
1523 1.52.2.1 bouyer err = USBD_NOMEM;
1524 1.1 augustss goto bad1;
1525 1.1 augustss }
1526 1.1 augustss tail = ohci_alloc_std(sc);
1527 1.52.2.1 bouyer if (tail == NULL) {
1528 1.52.2.1 bouyer err = USBD_NOMEM;
1529 1.1 augustss goto bad2;
1530 1.1 augustss }
1531 1.52.2.1 bouyer tail->xfer = NULL;
1532 1.1 augustss
1533 1.1 augustss sed = opipe->sed;
1534 1.1 augustss opipe->u.ctl.length = len;
1535 1.1 augustss
1536 1.10 augustss /* Update device address and length since they may have changed. */
1537 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1538 1.52.2.1 bouyer /* XXXX Should not touch ED here! */
1539 1.52.2.1 bouyer sed->ed.ed_flags = htole32(
1540 1.52.2.1 bouyer (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1541 1.16 augustss OHCI_ED_SET_FA(addr) |
1542 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1543 1.1 augustss
1544 1.52.2.1 bouyer next = stat;
1545 1.52.2.1 bouyer
1546 1.1 augustss /* Set up data transaction */
1547 1.1 augustss if (len != 0) {
1548 1.52.2.1 bouyer ohci_soft_td_t *std = stat;
1549 1.1 augustss
1550 1.52.2.1 bouyer err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1551 1.52.2.1 bouyer std, &stat);
1552 1.52.2.1 bouyer stat = stat->nexttd; /* point at free TD */
1553 1.52.2.1 bouyer if (err)
1554 1.52.2.1 bouyer goto bad3;
1555 1.52.2.1 bouyer /* Start toggle at 1 and then use the carried toggle. */
1556 1.52.2.1 bouyer std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1557 1.52.2.1 bouyer std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1558 1.34 augustss }
1559 1.1 augustss
1560 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1561 1.1 augustss
1562 1.52.2.1 bouyer setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1563 1.52.2.1 bouyer OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1564 1.52.2.1 bouyer setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma));
1565 1.1 augustss setup->nexttd = next;
1566 1.52.2.1 bouyer setup->td.td_nexttd = htole32(next->physaddr);
1567 1.52.2.1 bouyer setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1568 1.52.2.1 bouyer setup->len = 0;
1569 1.52.2.1 bouyer setup->xfer = xfer;
1570 1.34 augustss setup->flags = 0;
1571 1.52.2.1 bouyer xfer->hcpriv = setup;
1572 1.1 augustss
1573 1.52.2.1 bouyer stat->td.td_flags = htole32(
1574 1.52.2.1 bouyer (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1575 1.52.2.1 bouyer OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1576 1.39 augustss stat->td.td_cbp = 0;
1577 1.1 augustss stat->nexttd = tail;
1578 1.52.2.1 bouyer stat->td.td_nexttd = htole32(tail->physaddr);
1579 1.39 augustss stat->td.td_be = 0;
1580 1.52.2.1 bouyer stat->flags = OHCI_CALL_DONE;
1581 1.1 augustss stat->len = 0;
1582 1.52.2.1 bouyer stat->xfer = xfer;
1583 1.1 augustss
1584 1.52 augustss #ifdef OHCI_DEBUG
1585 1.1 augustss if (ohcidebug > 5) {
1586 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1587 1.1 augustss ohci_dump_ed(sed);
1588 1.1 augustss ohci_dump_tds(setup);
1589 1.1 augustss }
1590 1.1 augustss #endif
1591 1.1 augustss
1592 1.1 augustss /* Insert ED in schedule */
1593 1.1 augustss s = splusb();
1594 1.52.2.1 bouyer sed->ed.ed_tailp = htole32(tail->physaddr);
1595 1.52.2.1 bouyer opipe->tail.td = tail;
1596 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1597 1.52.2.1 bouyer if (xfer->timeout && !sc->sc_bus.use_polling) {
1598 1.52.2.1 bouyer usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1599 1.52.2.1 bouyer ohci_timeout, xfer);
1600 1.15 augustss }
1601 1.1 augustss splx(s);
1602 1.1 augustss
1603 1.52.2.1 bouyer #if 0
1604 1.52.2.1 bouyer if (ohcidebug > 10) {
1605 1.52.2.1 bouyer delay(10000);
1606 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1607 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1608 1.1 augustss ohci_dump_ed(sed);
1609 1.1 augustss ohci_dump_tds(setup);
1610 1.1 augustss }
1611 1.1 augustss #endif
1612 1.1 augustss
1613 1.1 augustss return (USBD_NORMAL_COMPLETION);
1614 1.1 augustss
1615 1.1 augustss bad3:
1616 1.1 augustss ohci_free_std(sc, tail);
1617 1.1 augustss bad2:
1618 1.1 augustss ohci_free_std(sc, stat);
1619 1.1 augustss bad1:
1620 1.52.2.1 bouyer return (err);
1621 1.1 augustss }
1622 1.1 augustss
1623 1.1 augustss /*
1624 1.1 augustss * Add an ED to the schedule. Called at splusb().
1625 1.1 augustss */
1626 1.1 augustss void
1627 1.52.2.1 bouyer ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1628 1.1 augustss {
1629 1.46 augustss SPLUSBCHECK;
1630 1.1 augustss sed->next = head->next;
1631 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1632 1.1 augustss head->next = sed;
1633 1.52.2.1 bouyer head->ed.ed_nexted = htole32(sed->physaddr);
1634 1.1 augustss }
1635 1.1 augustss
1636 1.1 augustss /*
1637 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1638 1.3 augustss */
1639 1.3 augustss void
1640 1.52.2.1 bouyer ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1641 1.3 augustss {
1642 1.3 augustss ohci_soft_ed_t *p;
1643 1.3 augustss
1644 1.46 augustss SPLUSBCHECK;
1645 1.46 augustss
1646 1.3 augustss /* XXX */
1647 1.52.2.1 bouyer for (p = head; p == NULL && p->next != sed; p = p->next)
1648 1.3 augustss ;
1649 1.52.2.1 bouyer if (p == NULL)
1650 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1651 1.3 augustss p->next = sed->next;
1652 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1653 1.3 augustss }
1654 1.3 augustss
1655 1.3 augustss /*
1656 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1657 1.1 augustss * the host controller. This queue is the processed by software.
1658 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1659 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1660 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1661 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1662 1.1 augustss * hash value.
1663 1.1 augustss */
1664 1.1 augustss
1665 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1666 1.1 augustss /* Called at splusb() */
1667 1.1 augustss void
1668 1.52.2.1 bouyer ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1669 1.1 augustss {
1670 1.1 augustss int h = HASH(std->physaddr);
1671 1.1 augustss
1672 1.46 augustss SPLUSBCHECK;
1673 1.46 augustss
1674 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1675 1.1 augustss }
1676 1.1 augustss
1677 1.1 augustss /* Called at splusb() */
1678 1.1 augustss void
1679 1.52.2.1 bouyer ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1680 1.1 augustss {
1681 1.46 augustss SPLUSBCHECK;
1682 1.46 augustss
1683 1.1 augustss LIST_REMOVE(std, hnext);
1684 1.1 augustss }
1685 1.1 augustss
1686 1.1 augustss ohci_soft_td_t *
1687 1.52.2.1 bouyer ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1688 1.1 augustss {
1689 1.1 augustss int h = HASH(a);
1690 1.1 augustss ohci_soft_td_t *std;
1691 1.1 augustss
1692 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1693 1.52.2.1 bouyer std != NULL;
1694 1.1 augustss std = LIST_NEXT(std, hnext))
1695 1.1 augustss if (std->physaddr == a)
1696 1.1 augustss return (std);
1697 1.52.2.1 bouyer return (NULL);
1698 1.52.2.1 bouyer }
1699 1.52.2.1 bouyer
1700 1.52.2.1 bouyer /* Called at splusb() */
1701 1.52.2.1 bouyer void
1702 1.52.2.1 bouyer ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1703 1.52.2.1 bouyer {
1704 1.52.2.1 bouyer int h = HASH(sitd->physaddr);
1705 1.52.2.1 bouyer
1706 1.52.2.1 bouyer SPLUSBCHECK;
1707 1.52.2.1 bouyer
1708 1.52.2.1 bouyer DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1709 1.52.2.1 bouyer sitd, (u_long)sitd->physaddr));
1710 1.52.2.1 bouyer
1711 1.52.2.1 bouyer LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1712 1.1 augustss }
1713 1.1 augustss
1714 1.52.2.1 bouyer /* Called at splusb() */
1715 1.1 augustss void
1716 1.52.2.1 bouyer ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1717 1.1 augustss {
1718 1.52.2.1 bouyer SPLUSBCHECK;
1719 1.52.2.1 bouyer
1720 1.52.2.1 bouyer DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1721 1.52.2.1 bouyer sitd, (u_long)sitd->physaddr));
1722 1.52.2.1 bouyer
1723 1.52.2.1 bouyer LIST_REMOVE(sitd, hnext);
1724 1.52.2.1 bouyer }
1725 1.52.2.1 bouyer
1726 1.52.2.1 bouyer ohci_soft_itd_t *
1727 1.52.2.1 bouyer ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1728 1.52.2.1 bouyer {
1729 1.52.2.1 bouyer int h = HASH(a);
1730 1.52.2.1 bouyer ohci_soft_itd_t *sitd;
1731 1.52.2.1 bouyer
1732 1.52.2.1 bouyer for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1733 1.52.2.1 bouyer sitd != NULL;
1734 1.52.2.1 bouyer sitd = LIST_NEXT(sitd, hnext))
1735 1.52.2.1 bouyer if (sitd->physaddr == a)
1736 1.52.2.1 bouyer return (sitd);
1737 1.52.2.1 bouyer return (NULL);
1738 1.52.2.1 bouyer }
1739 1.52.2.1 bouyer
1740 1.52.2.1 bouyer void
1741 1.52.2.1 bouyer ohci_timeout(void *addr)
1742 1.52.2.1 bouyer {
1743 1.52.2.1 bouyer usbd_xfer_handle xfer = addr;
1744 1.48 augustss int s;
1745 1.1 augustss
1746 1.52.2.1 bouyer DPRINTF(("ohci_timeout: xfer=%p\n", xfer));
1747 1.45 augustss
1748 1.48 augustss s = splusb();
1749 1.52.2.1 bouyer xfer->device->bus->intr_context++;
1750 1.52.2.1 bouyer ohci_abort_xfer(xfer, USBD_TIMEOUT);
1751 1.52.2.1 bouyer xfer->device->bus->intr_context--;
1752 1.48 augustss splx(s);
1753 1.1 augustss }
1754 1.1 augustss
1755 1.52 augustss #ifdef OHCI_DEBUG
1756 1.1 augustss void
1757 1.52.2.1 bouyer ohci_dump_tds(ohci_soft_td_t *std)
1758 1.1 augustss {
1759 1.1 augustss for (; std; std = std->nexttd)
1760 1.1 augustss ohci_dump_td(std);
1761 1.1 augustss }
1762 1.1 augustss
1763 1.1 augustss void
1764 1.52.2.1 bouyer ohci_dump_td(ohci_soft_td_t *std)
1765 1.1 augustss {
1766 1.52.2.1 bouyer char sbuf[128];
1767 1.52.2.1 bouyer
1768 1.52.2.1 bouyer bitmask_snprintf((int)le32toh(std->td.td_flags),
1769 1.52.2.1 bouyer "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1770 1.52.2.1 bouyer sbuf, sizeof(sbuf));
1771 1.52.2.1 bouyer
1772 1.52.2.1 bouyer DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1773 1.41 augustss "nexttd=0x%08lx be=0x%08lx\n",
1774 1.52.2.1 bouyer std, (u_long)std->physaddr, sbuf,
1775 1.52.2.1 bouyer OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
1776 1.52.2.1 bouyer OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
1777 1.52.2.1 bouyer OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1778 1.52.2.1 bouyer (u_long)le32toh(std->td.td_cbp),
1779 1.52.2.1 bouyer (u_long)le32toh(std->td.td_nexttd),
1780 1.52.2.1 bouyer (u_long)le32toh(std->td.td_be)));
1781 1.1 augustss }
1782 1.1 augustss
1783 1.1 augustss void
1784 1.52.2.1 bouyer ohci_dump_itd(ohci_soft_itd_t *sitd)
1785 1.52.2.1 bouyer {
1786 1.52.2.1 bouyer int i;
1787 1.52.2.1 bouyer
1788 1.52.2.1 bouyer DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1789 1.52.2.1 bouyer "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1790 1.52.2.1 bouyer sitd, (u_long)sitd->physaddr,
1791 1.52.2.1 bouyer OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
1792 1.52.2.1 bouyer OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
1793 1.52.2.1 bouyer OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
1794 1.52.2.1 bouyer OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
1795 1.52.2.1 bouyer (u_long)le32toh(sitd->itd.itd_bp0),
1796 1.52.2.1 bouyer (u_long)le32toh(sitd->itd.itd_nextitd),
1797 1.52.2.1 bouyer (u_long)le32toh(sitd->itd.itd_be)));
1798 1.52.2.1 bouyer for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1799 1.52.2.1 bouyer DPRINTF(("offs[%d]=0x%04x ", i,
1800 1.52.2.1 bouyer (u_int)le16toh(sitd->itd.itd_offset[i])));
1801 1.52.2.1 bouyer DPRINTF(("\n"));
1802 1.52.2.1 bouyer }
1803 1.52.2.1 bouyer
1804 1.52.2.1 bouyer void
1805 1.52.2.1 bouyer ohci_dump_itds(ohci_soft_itd_t *sitd)
1806 1.1 augustss {
1807 1.52.2.1 bouyer for (; sitd; sitd = sitd->nextitd)
1808 1.52.2.1 bouyer ohci_dump_itd(sitd);
1809 1.52.2.1 bouyer }
1810 1.52.2.1 bouyer
1811 1.52.2.1 bouyer void
1812 1.52.2.1 bouyer ohci_dump_ed(ohci_soft_ed_t *sed)
1813 1.52.2.1 bouyer {
1814 1.52.2.1 bouyer char sbuf[128], sbuf2[128];
1815 1.52.2.1 bouyer
1816 1.52.2.1 bouyer bitmask_snprintf((int)le32toh(sed->ed.ed_flags),
1817 1.52.2.1 bouyer "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1818 1.52.2.1 bouyer sbuf, sizeof(sbuf));
1819 1.52.2.1 bouyer bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp),
1820 1.52.2.1 bouyer "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2));
1821 1.52.2.1 bouyer
1822 1.52.2.1 bouyer DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx "
1823 1.52.2.1 bouyer "headflags=%s headp=0x%08lx nexted=0x%08lx\n",
1824 1.41 augustss sed, (u_long)sed->physaddr,
1825 1.52.2.1 bouyer OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
1826 1.52.2.1 bouyer OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
1827 1.52.2.1 bouyer OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf,
1828 1.52.2.1 bouyer (u_long)le32toh(sed->ed.ed_tailp), sbuf2,
1829 1.52.2.1 bouyer (u_long)le32toh(sed->ed.ed_headp),
1830 1.52.2.1 bouyer (u_long)le32toh(sed->ed.ed_nexted)));
1831 1.1 augustss }
1832 1.1 augustss #endif
1833 1.1 augustss
1834 1.1 augustss usbd_status
1835 1.52.2.1 bouyer ohci_open(usbd_pipe_handle pipe)
1836 1.1 augustss {
1837 1.1 augustss usbd_device_handle dev = pipe->device;
1838 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1839 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1840 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1841 1.1 augustss u_int8_t addr = dev->address;
1842 1.52.2.1 bouyer u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1843 1.1 augustss ohci_soft_ed_t *sed;
1844 1.1 augustss ohci_soft_td_t *std;
1845 1.52.2.1 bouyer ohci_soft_itd_t *sitd;
1846 1.52.2.1 bouyer ohci_physaddr_t tdphys;
1847 1.52.2.1 bouyer u_int32_t fmt;
1848 1.52.2.1 bouyer usbd_status err;
1849 1.1 augustss int s;
1850 1.52.2.1 bouyer int ival;
1851 1.1 augustss
1852 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1853 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1854 1.52.2.1 bouyer
1855 1.52.2.1 bouyer std = NULL;
1856 1.52.2.1 bouyer sed = NULL;
1857 1.52.2.1 bouyer
1858 1.1 augustss if (addr == sc->sc_addr) {
1859 1.1 augustss switch (ed->bEndpointAddress) {
1860 1.1 augustss case USB_CONTROL_ENDPOINT:
1861 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1862 1.1 augustss break;
1863 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
1864 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1865 1.1 augustss break;
1866 1.1 augustss default:
1867 1.1 augustss return (USBD_INVAL);
1868 1.1 augustss }
1869 1.1 augustss } else {
1870 1.1 augustss sed = ohci_alloc_sed(sc);
1871 1.52.2.1 bouyer if (sed == NULL)
1872 1.1 augustss goto bad0;
1873 1.1 augustss opipe->sed = sed;
1874 1.52.2.1 bouyer if (xfertype == UE_ISOCHRONOUS) {
1875 1.52.2.1 bouyer sitd = ohci_alloc_sitd(sc);
1876 1.52.2.1 bouyer if (sitd == NULL) {
1877 1.52.2.1 bouyer ohci_free_sitd(sc, sitd);
1878 1.52.2.1 bouyer goto bad1;
1879 1.52.2.1 bouyer }
1880 1.52.2.1 bouyer opipe->tail.itd = sitd;
1881 1.52.2.1 bouyer tdphys = sitd->physaddr;
1882 1.52.2.1 bouyer fmt = OHCI_ED_FORMAT_ISO;
1883 1.52.2.1 bouyer if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
1884 1.52.2.1 bouyer fmt |= OHCI_ED_DIR_IN;
1885 1.52.2.1 bouyer else
1886 1.52.2.1 bouyer fmt |= OHCI_ED_DIR_OUT;
1887 1.52.2.1 bouyer } else {
1888 1.52.2.1 bouyer std = ohci_alloc_std(sc);
1889 1.52.2.1 bouyer if (std == NULL) {
1890 1.52.2.1 bouyer ohci_free_std(sc, std);
1891 1.52.2.1 bouyer goto bad1;
1892 1.52.2.1 bouyer }
1893 1.52.2.1 bouyer opipe->tail.td = std;
1894 1.52.2.1 bouyer tdphys = std->physaddr;
1895 1.52.2.1 bouyer fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
1896 1.52.2.1 bouyer }
1897 1.52.2.1 bouyer sed->ed.ed_flags = htole32(
1898 1.1 augustss OHCI_ED_SET_FA(addr) |
1899 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1900 1.52.2.1 bouyer (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt |
1901 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1902 1.52.2.1 bouyer sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
1903 1.1 augustss
1904 1.52.2.1 bouyer switch (xfertype) {
1905 1.1 augustss case UE_CONTROL:
1906 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1907 1.52.2.1 bouyer err = usb_allocmem(&sc->sc_bus,
1908 1.52.2.1 bouyer sizeof(usb_device_request_t),
1909 1.52.2.1 bouyer 0, &opipe->u.ctl.reqdma);
1910 1.52.2.1 bouyer if (err)
1911 1.1 augustss goto bad;
1912 1.1 augustss s = splusb();
1913 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1914 1.1 augustss splx(s);
1915 1.1 augustss break;
1916 1.1 augustss case UE_INTERRUPT:
1917 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1918 1.52.2.1 bouyer ival = pipe->interval;
1919 1.52.2.1 bouyer if (ival == USBD_DEFAULT_INTERVAL)
1920 1.52.2.1 bouyer ival = ed->bInterval;
1921 1.52.2.1 bouyer return (ohci_device_setintr(sc, opipe, ival));
1922 1.1 augustss case UE_ISOCHRONOUS:
1923 1.52.2.1 bouyer pipe->methods = &ohci_device_isoc_methods;
1924 1.52.2.1 bouyer return (ohci_setup_isoc(pipe));
1925 1.1 augustss case UE_BULK:
1926 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1927 1.3 augustss s = splusb();
1928 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1929 1.3 augustss splx(s);
1930 1.3 augustss break;
1931 1.1 augustss }
1932 1.1 augustss }
1933 1.1 augustss return (USBD_NORMAL_COMPLETION);
1934 1.1 augustss
1935 1.1 augustss bad:
1936 1.52.2.1 bouyer if (std != NULL)
1937 1.52.2.1 bouyer ohci_free_std(sc, std);
1938 1.1 augustss bad1:
1939 1.52.2.1 bouyer if (sed != NULL)
1940 1.52.2.1 bouyer ohci_free_sed(sc, sed);
1941 1.1 augustss bad0:
1942 1.1 augustss return (USBD_NOMEM);
1943 1.1 augustss
1944 1.1 augustss }
1945 1.1 augustss
1946 1.1 augustss /*
1947 1.34 augustss * Close a reqular pipe.
1948 1.34 augustss * Assumes that there are no pending transactions.
1949 1.34 augustss */
1950 1.34 augustss void
1951 1.52.2.1 bouyer ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
1952 1.34 augustss {
1953 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1954 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1955 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
1956 1.34 augustss int s;
1957 1.34 augustss
1958 1.34 augustss s = splusb();
1959 1.34 augustss #ifdef DIAGNOSTIC
1960 1.52.2.1 bouyer sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
1961 1.52.2.1 bouyer if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
1962 1.52.2.1 bouyer (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
1963 1.52.2.1 bouyer ohci_physaddr_t td = le32toh(sed->ed.ed_headp);
1964 1.34 augustss ohci_soft_td_t *std;
1965 1.34 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1966 1.52.2.1 bouyer std != NULL;
1967 1.34 augustss std = LIST_NEXT(std, hnext))
1968 1.34 augustss if (std->physaddr == td)
1969 1.34 augustss break;
1970 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1971 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
1972 1.52.2.1 bouyer (int)le32toh(sed->ed.ed_headp),
1973 1.52.2.1 bouyer (int)le32toh(sed->ed.ed_tailp),
1974 1.34 augustss pipe, std);
1975 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
1976 1.52.2.1 bouyer if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
1977 1.52.2.1 bouyer (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
1978 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
1979 1.34 augustss }
1980 1.34 augustss #endif
1981 1.34 augustss ohci_rem_ed(sed, head);
1982 1.34 augustss splx(s);
1983 1.34 augustss ohci_free_sed(sc, opipe->sed);
1984 1.34 augustss }
1985 1.34 augustss
1986 1.34 augustss /*
1987 1.34 augustss * Abort a device request.
1988 1.34 augustss * If this routine is called at splusb() it guarantees that the request
1989 1.34 augustss * will be removed from the hardware scheduling and that the callback
1990 1.34 augustss * for it will be called with USBD_CANCELLED status.
1991 1.34 augustss * It's impossible to guarantee that the requested transfer will not
1992 1.34 augustss * have happened since the hardware runs concurrently.
1993 1.34 augustss * If the transaction has already happened we rely on the ordinary
1994 1.34 augustss * interrupt processing to process it.
1995 1.34 augustss */
1996 1.34 augustss void
1997 1.52.2.1 bouyer ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1998 1.34 augustss {
1999 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2000 1.34 augustss ohci_soft_ed_t *sed;
2001 1.34 augustss
2002 1.52.2.1 bouyer DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe));
2003 1.34 augustss
2004 1.52.2.1 bouyer xfer->status = status;
2005 1.34 augustss
2006 1.52.2.1 bouyer usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
2007 1.34 augustss
2008 1.34 augustss sed = opipe->sed;
2009 1.52.2.1 bouyer DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
2010 1.52.2.1 bouyer sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
2011 1.34 augustss
2012 1.52.2.1 bouyer #if 1
2013 1.52.2.1 bouyer if (xfer->device->bus->intr_context) {
2014 1.44 augustss /* We have no process context, so we can't use tsleep(). */
2015 1.52.2.1 bouyer usb_callout(xfer->pipe->abort_handle,
2016 1.52.2.1 bouyer hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer);
2017 1.44 augustss } else {
2018 1.52.2.1 bouyer #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
2019 1.52.2.1 bouyer KASSERT(intr_nesting_level == 0,
2020 1.52.2.1 bouyer ("ohci_abort_req in interrupt context"));
2021 1.52.2.1 bouyer #endif
2022 1.38 augustss usb_delay_ms(opipe->pipe.device->bus, 1);
2023 1.52.2.1 bouyer ohci_abort_xfer_end(xfer);
2024 1.38 augustss }
2025 1.52.2.1 bouyer #else
2026 1.52.2.1 bouyer delay(1000);
2027 1.52.2.1 bouyer ohci_abort_xfer_end(xfer);
2028 1.52.2.1 bouyer #endif
2029 1.38 augustss }
2030 1.38 augustss
2031 1.38 augustss void
2032 1.52.2.1 bouyer ohci_abort_xfer_end(void *v)
2033 1.38 augustss {
2034 1.52.2.1 bouyer usbd_xfer_handle xfer = v;
2035 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2036 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
2037 1.38 augustss ohci_soft_ed_t *sed;
2038 1.38 augustss ohci_soft_td_t *p, *n;
2039 1.38 augustss int s;
2040 1.38 augustss
2041 1.38 augustss s = splusb();
2042 1.38 augustss
2043 1.52.2.1 bouyer p = xfer->hcpriv;
2044 1.34 augustss #ifdef DIAGNOSTIC
2045 1.52.2.1 bouyer if (p == NULL) {
2046 1.52.2.1 bouyer printf("ohci_abort_xfer: hcpriv==0\n");
2047 1.38 augustss return;
2048 1.38 augustss }
2049 1.34 augustss #endif
2050 1.52.2.1 bouyer for (; p->xfer == xfer; p = n) {
2051 1.38 augustss n = p->nexttd;
2052 1.38 augustss ohci_free_std(sc, p);
2053 1.34 augustss }
2054 1.34 augustss
2055 1.38 augustss sed = opipe->sed;
2056 1.52.2.1 bouyer DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n",
2057 1.52.2.1 bouyer (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2058 1.52.2.1 bouyer sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2059 1.52.2.1 bouyer sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2060 1.38 augustss
2061 1.52.2.1 bouyer usb_transfer_complete(xfer);
2062 1.38 augustss
2063 1.34 augustss splx(s);
2064 1.34 augustss }
2065 1.34 augustss
2066 1.34 augustss /*
2067 1.1 augustss * Data structures and routines to emulate the root hub.
2068 1.1 augustss */
2069 1.52.2.1 bouyer Static usb_device_descriptor_t ohci_devd = {
2070 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2071 1.1 augustss UDESC_DEVICE, /* type */
2072 1.1 augustss {0x00, 0x01}, /* USB version */
2073 1.52.2.1 bouyer UDCLASS_HUB, /* class */
2074 1.52.2.1 bouyer UDSUBCLASS_HUB, /* subclass */
2075 1.1 augustss 0, /* protocol */
2076 1.1 augustss 64, /* max packet */
2077 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2078 1.1 augustss 1,2,0, /* string indicies */
2079 1.1 augustss 1 /* # of configurations */
2080 1.1 augustss };
2081 1.1 augustss
2082 1.52.2.1 bouyer Static usb_config_descriptor_t ohci_confd = {
2083 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2084 1.1 augustss UDESC_CONFIG,
2085 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2086 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2087 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2088 1.1 augustss 1,
2089 1.1 augustss 1,
2090 1.1 augustss 0,
2091 1.1 augustss UC_SELF_POWERED,
2092 1.1 augustss 0 /* max power */
2093 1.1 augustss };
2094 1.1 augustss
2095 1.52.2.1 bouyer Static usb_interface_descriptor_t ohci_ifcd = {
2096 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2097 1.1 augustss UDESC_INTERFACE,
2098 1.1 augustss 0,
2099 1.1 augustss 0,
2100 1.1 augustss 1,
2101 1.52.2.1 bouyer UICLASS_HUB,
2102 1.52.2.1 bouyer UISUBCLASS_HUB,
2103 1.1 augustss 0,
2104 1.1 augustss 0
2105 1.1 augustss };
2106 1.1 augustss
2107 1.52.2.1 bouyer Static usb_endpoint_descriptor_t ohci_endpd = {
2108 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2109 1.1 augustss UDESC_ENDPOINT,
2110 1.40 augustss UE_DIR_IN | OHCI_INTR_ENDPT,
2111 1.1 augustss UE_INTERRUPT,
2112 1.1 augustss {8, 0}, /* max packet */
2113 1.1 augustss 255
2114 1.1 augustss };
2115 1.1 augustss
2116 1.52.2.1 bouyer Static usb_hub_descriptor_t ohci_hubd = {
2117 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2118 1.1 augustss UDESC_HUB,
2119 1.1 augustss 0,
2120 1.1 augustss {0,0},
2121 1.1 augustss 0,
2122 1.1 augustss 0,
2123 1.1 augustss {0},
2124 1.1 augustss };
2125 1.1 augustss
2126 1.52.2.1 bouyer Static int
2127 1.1 augustss ohci_str(p, l, s)
2128 1.1 augustss usb_string_descriptor_t *p;
2129 1.1 augustss int l;
2130 1.1 augustss char *s;
2131 1.1 augustss {
2132 1.1 augustss int i;
2133 1.1 augustss
2134 1.1 augustss if (l == 0)
2135 1.1 augustss return (0);
2136 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2137 1.1 augustss if (l == 1)
2138 1.1 augustss return (1);
2139 1.1 augustss p->bDescriptorType = UDESC_STRING;
2140 1.1 augustss l -= 2;
2141 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2142 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2143 1.1 augustss return (2*i+2);
2144 1.1 augustss }
2145 1.1 augustss
2146 1.1 augustss /*
2147 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2148 1.1 augustss */
2149 1.52.2.1 bouyer Static usbd_status
2150 1.52.2.1 bouyer ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2151 1.1 augustss {
2152 1.52.2.1 bouyer usbd_status err;
2153 1.17 augustss
2154 1.46 augustss /* Insert last in queue. */
2155 1.52.2.1 bouyer err = usb_insert_transfer(xfer);
2156 1.52.2.1 bouyer if (err)
2157 1.52.2.1 bouyer return (err);
2158 1.46 augustss
2159 1.46 augustss /* Pipe isn't running, start first */
2160 1.52.2.1 bouyer return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2161 1.17 augustss }
2162 1.17 augustss
2163 1.52.2.1 bouyer Static usbd_status
2164 1.52.2.1 bouyer ohci_root_ctrl_start(usbd_xfer_handle xfer)
2165 1.17 augustss {
2166 1.52.2.1 bouyer ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2167 1.1 augustss usb_device_request_t *req;
2168 1.52 augustss void *buf = NULL;
2169 1.1 augustss int port, i;
2170 1.46 augustss int s, len, value, index, l, totlen = 0;
2171 1.1 augustss usb_port_status_t ps;
2172 1.1 augustss usb_hub_descriptor_t hubd;
2173 1.52.2.1 bouyer usbd_status err;
2174 1.1 augustss u_int32_t v;
2175 1.1 augustss
2176 1.52.2.1 bouyer if (sc->sc_dying)
2177 1.52.2.1 bouyer return (USBD_IOERROR);
2178 1.52.2.1 bouyer
2179 1.42 augustss #ifdef DIAGNOSTIC
2180 1.52.2.1 bouyer if (!(xfer->rqflags & URQ_REQUEST))
2181 1.1 augustss /* XXX panic */
2182 1.1 augustss return (USBD_INVAL);
2183 1.42 augustss #endif
2184 1.52.2.1 bouyer req = &xfer->request;
2185 1.1 augustss
2186 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2187 1.1 augustss req->bmRequestType, req->bRequest));
2188 1.1 augustss
2189 1.1 augustss len = UGETW(req->wLength);
2190 1.1 augustss value = UGETW(req->wValue);
2191 1.1 augustss index = UGETW(req->wIndex);
2192 1.43 augustss
2193 1.43 augustss if (len != 0)
2194 1.52.2.1 bouyer buf = KERNADDR(&xfer->dmabuf);
2195 1.43 augustss
2196 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2197 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2198 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2199 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2200 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2201 1.1 augustss /*
2202 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2203 1.1 augustss * for the integrated root hub.
2204 1.1 augustss */
2205 1.1 augustss break;
2206 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2207 1.1 augustss if (len > 0) {
2208 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2209 1.1 augustss totlen = 1;
2210 1.1 augustss }
2211 1.1 augustss break;
2212 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2213 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2214 1.1 augustss switch(value >> 8) {
2215 1.1 augustss case UDESC_DEVICE:
2216 1.1 augustss if ((value & 0xff) != 0) {
2217 1.52.2.1 bouyer err = USBD_IOERROR;
2218 1.1 augustss goto ret;
2219 1.1 augustss }
2220 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2221 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2222 1.1 augustss memcpy(buf, &ohci_devd, l);
2223 1.1 augustss break;
2224 1.1 augustss case UDESC_CONFIG:
2225 1.1 augustss if ((value & 0xff) != 0) {
2226 1.52.2.1 bouyer err = USBD_IOERROR;
2227 1.1 augustss goto ret;
2228 1.1 augustss }
2229 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2230 1.1 augustss memcpy(buf, &ohci_confd, l);
2231 1.1 augustss buf = (char *)buf + l;
2232 1.1 augustss len -= l;
2233 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2234 1.1 augustss totlen += l;
2235 1.1 augustss memcpy(buf, &ohci_ifcd, l);
2236 1.1 augustss buf = (char *)buf + l;
2237 1.1 augustss len -= l;
2238 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2239 1.1 augustss totlen += l;
2240 1.1 augustss memcpy(buf, &ohci_endpd, l);
2241 1.1 augustss break;
2242 1.1 augustss case UDESC_STRING:
2243 1.1 augustss if (len == 0)
2244 1.1 augustss break;
2245 1.1 augustss *(u_int8_t *)buf = 0;
2246 1.1 augustss totlen = 1;
2247 1.1 augustss switch (value & 0xff) {
2248 1.1 augustss case 1: /* Vendor */
2249 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
2250 1.1 augustss break;
2251 1.1 augustss case 2: /* Product */
2252 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
2253 1.1 augustss break;
2254 1.1 augustss }
2255 1.1 augustss break;
2256 1.1 augustss default:
2257 1.52.2.1 bouyer err = USBD_IOERROR;
2258 1.1 augustss goto ret;
2259 1.1 augustss }
2260 1.1 augustss break;
2261 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2262 1.1 augustss if (len > 0) {
2263 1.1 augustss *(u_int8_t *)buf = 0;
2264 1.1 augustss totlen = 1;
2265 1.1 augustss }
2266 1.1 augustss break;
2267 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2268 1.1 augustss if (len > 1) {
2269 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2270 1.1 augustss totlen = 2;
2271 1.1 augustss }
2272 1.1 augustss break;
2273 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2274 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2275 1.1 augustss if (len > 1) {
2276 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2277 1.1 augustss totlen = 2;
2278 1.1 augustss }
2279 1.1 augustss break;
2280 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2281 1.1 augustss if (value >= USB_MAX_DEVICES) {
2282 1.52.2.1 bouyer err = USBD_IOERROR;
2283 1.1 augustss goto ret;
2284 1.1 augustss }
2285 1.1 augustss sc->sc_addr = value;
2286 1.1 augustss break;
2287 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2288 1.1 augustss if (value != 0 && value != 1) {
2289 1.52.2.1 bouyer err = USBD_IOERROR;
2290 1.1 augustss goto ret;
2291 1.1 augustss }
2292 1.1 augustss sc->sc_conf = value;
2293 1.1 augustss break;
2294 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2295 1.1 augustss break;
2296 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2297 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2298 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2299 1.52.2.1 bouyer err = USBD_IOERROR;
2300 1.1 augustss goto ret;
2301 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2302 1.1 augustss break;
2303 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2304 1.1 augustss break;
2305 1.1 augustss /* Hub requests */
2306 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2307 1.1 augustss break;
2308 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2309 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2310 1.14 augustss "port=%d feature=%d\n",
2311 1.1 augustss index, value));
2312 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2313 1.52.2.1 bouyer err = USBD_IOERROR;
2314 1.1 augustss goto ret;
2315 1.1 augustss }
2316 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2317 1.1 augustss switch(value) {
2318 1.1 augustss case UHF_PORT_ENABLE:
2319 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2320 1.1 augustss break;
2321 1.1 augustss case UHF_PORT_SUSPEND:
2322 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2323 1.1 augustss break;
2324 1.1 augustss case UHF_PORT_POWER:
2325 1.52.2.1 bouyer /* Yes, writing to the LOW_SPEED bit clears power. */
2326 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2327 1.1 augustss break;
2328 1.1 augustss case UHF_C_PORT_CONNECTION:
2329 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2330 1.1 augustss break;
2331 1.1 augustss case UHF_C_PORT_ENABLE:
2332 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2333 1.1 augustss break;
2334 1.1 augustss case UHF_C_PORT_SUSPEND:
2335 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2336 1.1 augustss break;
2337 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2338 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2339 1.1 augustss break;
2340 1.1 augustss case UHF_C_PORT_RESET:
2341 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2342 1.1 augustss break;
2343 1.1 augustss default:
2344 1.52.2.1 bouyer err = USBD_IOERROR;
2345 1.1 augustss goto ret;
2346 1.1 augustss }
2347 1.1 augustss switch(value) {
2348 1.1 augustss case UHF_C_PORT_CONNECTION:
2349 1.1 augustss case UHF_C_PORT_ENABLE:
2350 1.1 augustss case UHF_C_PORT_SUSPEND:
2351 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2352 1.1 augustss case UHF_C_PORT_RESET:
2353 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2354 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2355 1.1 augustss ohci_rhsc_able(sc, 1);
2356 1.1 augustss break;
2357 1.1 augustss default:
2358 1.1 augustss break;
2359 1.1 augustss }
2360 1.1 augustss break;
2361 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2362 1.1 augustss if (value != 0) {
2363 1.52.2.1 bouyer err = USBD_IOERROR;
2364 1.1 augustss goto ret;
2365 1.1 augustss }
2366 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2367 1.1 augustss hubd = ohci_hubd;
2368 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2369 1.15 augustss USETW(hubd.wHubCharacteristics,
2370 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2371 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2372 1.1 augustss /* XXX overcurrent */
2373 1.1 augustss );
2374 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2375 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2376 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2377 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
2378 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2379 1.1 augustss l = min(len, hubd.bDescLength);
2380 1.1 augustss totlen = l;
2381 1.1 augustss memcpy(buf, &hubd, l);
2382 1.1 augustss break;
2383 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2384 1.1 augustss if (len != 4) {
2385 1.52.2.1 bouyer err = USBD_IOERROR;
2386 1.1 augustss goto ret;
2387 1.1 augustss }
2388 1.1 augustss memset(buf, 0, len); /* ? XXX */
2389 1.1 augustss totlen = len;
2390 1.1 augustss break;
2391 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2392 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2393 1.1 augustss index));
2394 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2395 1.52.2.1 bouyer err = USBD_IOERROR;
2396 1.1 augustss goto ret;
2397 1.1 augustss }
2398 1.1 augustss if (len != 4) {
2399 1.52.2.1 bouyer err = USBD_IOERROR;
2400 1.1 augustss goto ret;
2401 1.1 augustss }
2402 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2403 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2404 1.1 augustss v));
2405 1.1 augustss USETW(ps.wPortStatus, v);
2406 1.1 augustss USETW(ps.wPortChange, v >> 16);
2407 1.1 augustss l = min(len, sizeof ps);
2408 1.1 augustss memcpy(buf, &ps, l);
2409 1.1 augustss totlen = l;
2410 1.1 augustss break;
2411 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2412 1.52.2.1 bouyer err = USBD_IOERROR;
2413 1.1 augustss goto ret;
2414 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2415 1.1 augustss break;
2416 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2417 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2418 1.52.2.1 bouyer err = USBD_IOERROR;
2419 1.1 augustss goto ret;
2420 1.1 augustss }
2421 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2422 1.1 augustss switch(value) {
2423 1.1 augustss case UHF_PORT_ENABLE:
2424 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2425 1.1 augustss break;
2426 1.1 augustss case UHF_PORT_SUSPEND:
2427 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2428 1.1 augustss break;
2429 1.1 augustss case UHF_PORT_RESET:
2430 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2431 1.14 augustss index));
2432 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2433 1.1 augustss for (i = 0; i < 10; i++) {
2434 1.52.2.1 bouyer usb_delay_ms(&sc->sc_bus, 10); /* XXX */
2435 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2436 1.1 augustss break;
2437 1.1 augustss }
2438 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2439 1.1 augustss index, OREAD4(sc, port)));
2440 1.1 augustss break;
2441 1.1 augustss case UHF_PORT_POWER:
2442 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2443 1.14 augustss "%d\n", index));
2444 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2445 1.1 augustss break;
2446 1.1 augustss default:
2447 1.52.2.1 bouyer err = USBD_IOERROR;
2448 1.1 augustss goto ret;
2449 1.1 augustss }
2450 1.1 augustss break;
2451 1.1 augustss default:
2452 1.52.2.1 bouyer err = USBD_IOERROR;
2453 1.1 augustss goto ret;
2454 1.1 augustss }
2455 1.52.2.1 bouyer xfer->actlen = totlen;
2456 1.52.2.1 bouyer err = USBD_NORMAL_COMPLETION;
2457 1.1 augustss ret:
2458 1.52.2.1 bouyer xfer->status = err;
2459 1.46 augustss s = splusb();
2460 1.52.2.1 bouyer usb_transfer_complete(xfer);
2461 1.46 augustss splx(s);
2462 1.1 augustss return (USBD_IN_PROGRESS);
2463 1.1 augustss }
2464 1.1 augustss
2465 1.1 augustss /* Abort a root control request. */
2466 1.52.2.1 bouyer Static void
2467 1.52.2.1 bouyer ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2468 1.1 augustss {
2469 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2470 1.1 augustss }
2471 1.1 augustss
2472 1.1 augustss /* Close the root pipe. */
2473 1.52.2.1 bouyer Static void
2474 1.52.2.1 bouyer ohci_root_ctrl_close(usbd_pipe_handle pipe)
2475 1.1 augustss {
2476 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2477 1.34 augustss /* Nothing to do. */
2478 1.1 augustss }
2479 1.1 augustss
2480 1.52.2.1 bouyer Static usbd_status
2481 1.52.2.1 bouyer ohci_root_intr_transfer(usbd_xfer_handle xfer)
2482 1.1 augustss {
2483 1.52.2.1 bouyer usbd_status err;
2484 1.17 augustss
2485 1.46 augustss /* Insert last in queue. */
2486 1.52.2.1 bouyer err = usb_insert_transfer(xfer);
2487 1.52.2.1 bouyer if (err)
2488 1.52.2.1 bouyer return (err);
2489 1.46 augustss
2490 1.46 augustss /* Pipe isn't running, start first */
2491 1.52.2.1 bouyer return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2492 1.17 augustss }
2493 1.17 augustss
2494 1.52.2.1 bouyer Static usbd_status
2495 1.52.2.1 bouyer ohci_root_intr_start(usbd_xfer_handle xfer)
2496 1.17 augustss {
2497 1.52.2.1 bouyer usbd_pipe_handle pipe = xfer->pipe;
2498 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2499 1.1 augustss
2500 1.52.2.1 bouyer if (sc->sc_dying)
2501 1.52.2.1 bouyer return (USBD_IOERROR);
2502 1.52.2.1 bouyer
2503 1.52.2.1 bouyer sc->sc_intrxfer = xfer;
2504 1.1 augustss
2505 1.1 augustss return (USBD_IN_PROGRESS);
2506 1.1 augustss }
2507 1.1 augustss
2508 1.3 augustss /* Abort a root interrupt request. */
2509 1.52.2.1 bouyer Static void
2510 1.52.2.1 bouyer ohci_root_intr_abort(usbd_xfer_handle xfer)
2511 1.1 augustss {
2512 1.52.2.1 bouyer int s;
2513 1.52.2.1 bouyer
2514 1.52.2.1 bouyer if (xfer->pipe->intrxfer == xfer) {
2515 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2516 1.52.2.1 bouyer xfer->pipe->intrxfer = NULL;
2517 1.51 augustss }
2518 1.52.2.1 bouyer xfer->status = USBD_CANCELLED;
2519 1.52.2.1 bouyer s = splusb();
2520 1.52.2.1 bouyer usb_transfer_complete(xfer);
2521 1.52.2.1 bouyer splx(s);
2522 1.1 augustss }
2523 1.1 augustss
2524 1.1 augustss /* Close the root pipe. */
2525 1.52.2.1 bouyer Static void
2526 1.52.2.1 bouyer ohci_root_intr_close(usbd_pipe_handle pipe)
2527 1.1 augustss {
2528 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2529 1.1 augustss
2530 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2531 1.34 augustss
2532 1.52.2.1 bouyer sc->sc_intrxfer = NULL;
2533 1.1 augustss }
2534 1.1 augustss
2535 1.1 augustss /************************/
2536 1.1 augustss
2537 1.52.2.1 bouyer Static usbd_status
2538 1.52.2.1 bouyer ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2539 1.1 augustss {
2540 1.52.2.1 bouyer usbd_status err;
2541 1.17 augustss
2542 1.46 augustss /* Insert last in queue. */
2543 1.52.2.1 bouyer err = usb_insert_transfer(xfer);
2544 1.52.2.1 bouyer if (err)
2545 1.52.2.1 bouyer return (err);
2546 1.46 augustss
2547 1.46 augustss /* Pipe isn't running, start first */
2548 1.52.2.1 bouyer return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2549 1.17 augustss }
2550 1.17 augustss
2551 1.52.2.1 bouyer Static usbd_status
2552 1.52.2.1 bouyer ohci_device_ctrl_start(usbd_xfer_handle xfer)
2553 1.17 augustss {
2554 1.52.2.1 bouyer ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2555 1.52.2.1 bouyer usbd_status err;
2556 1.52.2.1 bouyer
2557 1.52.2.1 bouyer if (sc->sc_dying)
2558 1.52.2.1 bouyer return (USBD_IOERROR);
2559 1.1 augustss
2560 1.42 augustss #ifdef DIAGNOSTIC
2561 1.52.2.1 bouyer if (!(xfer->rqflags & URQ_REQUEST)) {
2562 1.1 augustss /* XXX panic */
2563 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2564 1.1 augustss return (USBD_INVAL);
2565 1.1 augustss }
2566 1.42 augustss #endif
2567 1.1 augustss
2568 1.52.2.1 bouyer err = ohci_device_request(xfer);
2569 1.52.2.1 bouyer if (err)
2570 1.52.2.1 bouyer return (err);
2571 1.1 augustss
2572 1.6 augustss if (sc->sc_bus.use_polling)
2573 1.52.2.1 bouyer ohci_waitintr(sc, xfer);
2574 1.1 augustss return (USBD_IN_PROGRESS);
2575 1.1 augustss }
2576 1.1 augustss
2577 1.1 augustss /* Abort a device control request. */
2578 1.52.2.1 bouyer Static void
2579 1.52.2.1 bouyer ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2580 1.1 augustss {
2581 1.52.2.1 bouyer DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2582 1.52.2.1 bouyer ohci_abort_xfer(xfer, USBD_CANCELLED);
2583 1.1 augustss }
2584 1.1 augustss
2585 1.1 augustss /* Close a device control pipe. */
2586 1.52.2.1 bouyer Static void
2587 1.52.2.1 bouyer ohci_device_ctrl_close(usbd_pipe_handle pipe)
2588 1.1 augustss {
2589 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2590 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2591 1.1 augustss
2592 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2593 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2594 1.52.2.1 bouyer ohci_free_std(sc, opipe->tail.td);
2595 1.3 augustss }
2596 1.3 augustss
2597 1.3 augustss /************************/
2598 1.37 augustss
2599 1.52.2.1 bouyer Static void
2600 1.52.2.1 bouyer ohci_device_clear_toggle(usbd_pipe_handle pipe)
2601 1.37 augustss {
2602 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2603 1.37 augustss
2604 1.52.2.1 bouyer opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2605 1.37 augustss }
2606 1.37 augustss
2607 1.52.2.1 bouyer Static void
2608 1.52.2.1 bouyer ohci_noop(usbd_pipe_handle pipe)
2609 1.37 augustss {
2610 1.37 augustss }
2611 1.3 augustss
2612 1.52.2.1 bouyer Static usbd_status
2613 1.52.2.1 bouyer ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2614 1.3 augustss {
2615 1.52.2.1 bouyer usbd_status err;
2616 1.17 augustss
2617 1.46 augustss /* Insert last in queue. */
2618 1.52.2.1 bouyer err = usb_insert_transfer(xfer);
2619 1.52.2.1 bouyer if (err)
2620 1.52.2.1 bouyer return (err);
2621 1.46 augustss
2622 1.46 augustss /* Pipe isn't running, start first */
2623 1.52.2.1 bouyer return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2624 1.17 augustss }
2625 1.17 augustss
2626 1.52.2.1 bouyer Static usbd_status
2627 1.52.2.1 bouyer ohci_device_bulk_start(usbd_xfer_handle xfer)
2628 1.17 augustss {
2629 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2630 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2631 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2632 1.3 augustss int addr = dev->address;
2633 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2634 1.3 augustss ohci_soft_ed_t *sed;
2635 1.40 augustss int s, len, isread, endpt;
2636 1.52.2.1 bouyer usbd_status err;
2637 1.52.2.1 bouyer
2638 1.52.2.1 bouyer if (sc->sc_dying)
2639 1.52.2.1 bouyer return (USBD_IOERROR);
2640 1.3 augustss
2641 1.34 augustss #ifdef DIAGNOSTIC
2642 1.52.2.1 bouyer if (xfer->rqflags & URQ_REQUEST) {
2643 1.3 augustss /* XXX panic */
2644 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2645 1.3 augustss return (USBD_INVAL);
2646 1.3 augustss }
2647 1.34 augustss #endif
2648 1.3 augustss
2649 1.52.2.1 bouyer len = xfer->length;
2650 1.52.2.1 bouyer endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2651 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2652 1.3 augustss sed = opipe->sed;
2653 1.3 augustss
2654 1.52.2.1 bouyer DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2655 1.52.2.1 bouyer "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2656 1.40 augustss endpt));
2657 1.34 augustss
2658 1.32 augustss opipe->u.bulk.isread = isread;
2659 1.3 augustss opipe->u.bulk.length = len;
2660 1.3 augustss
2661 1.3 augustss /* Update device address */
2662 1.52.2.1 bouyer sed->ed.ed_flags = htole32(
2663 1.52.2.1 bouyer (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2664 1.16 augustss OHCI_ED_SET_FA(addr));
2665 1.3 augustss
2666 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2667 1.52.2.1 bouyer data = opipe->tail.td;
2668 1.52.2.1 bouyer err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2669 1.52.2.1 bouyer data, &tail);
2670 1.52.2.1 bouyer /* We want interrupt at the end of the transfer. */
2671 1.52.2.1 bouyer tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2672 1.52.2.1 bouyer tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2673 1.52.2.1 bouyer tail->flags |= OHCI_CALL_DONE;
2674 1.52.2.1 bouyer tail = tail->nexttd; /* point at sentinel */
2675 1.52.2.1 bouyer if (err)
2676 1.52.2.1 bouyer return (err);
2677 1.48 augustss
2678 1.52.2.1 bouyer tail->xfer = NULL;
2679 1.52.2.1 bouyer xfer->hcpriv = data;
2680 1.3 augustss
2681 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2682 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2683 1.52.2.1 bouyer (int)le32toh(sed->ed.ed_flags),
2684 1.52.2.1 bouyer (int)le32toh(data->td.td_flags),
2685 1.52.2.1 bouyer (int)le32toh(data->td.td_cbp),
2686 1.52.2.1 bouyer (int)le32toh(data->td.td_be)));
2687 1.34 augustss
2688 1.52 augustss #ifdef OHCI_DEBUG
2689 1.52.2.1 bouyer if (ohcidebug > 5) {
2690 1.34 augustss ohci_dump_ed(sed);
2691 1.48 augustss ohci_dump_tds(data);
2692 1.34 augustss }
2693 1.34 augustss #endif
2694 1.34 augustss
2695 1.3 augustss /* Insert ED in schedule */
2696 1.3 augustss s = splusb();
2697 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2698 1.52.2.1 bouyer tdp->xfer = xfer;
2699 1.48 augustss }
2700 1.52.2.1 bouyer sed->ed.ed_tailp = htole32(tail->physaddr);
2701 1.52.2.1 bouyer opipe->tail.td = tail;
2702 1.52.2.1 bouyer sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2703 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2704 1.52.2.1 bouyer if (xfer->timeout && !sc->sc_bus.use_polling) {
2705 1.52.2.1 bouyer usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2706 1.52.2.1 bouyer ohci_timeout, xfer);
2707 1.15 augustss }
2708 1.34 augustss
2709 1.52 augustss #if 0
2710 1.52 augustss /* This goes wrong if we are too slow. */
2711 1.52.2.1 bouyer if (ohcidebug > 10) {
2712 1.52.2.1 bouyer delay(10000);
2713 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2714 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2715 1.34 augustss ohci_dump_ed(sed);
2716 1.48 augustss ohci_dump_tds(data);
2717 1.34 augustss }
2718 1.34 augustss #endif
2719 1.34 augustss
2720 1.3 augustss splx(s);
2721 1.3 augustss
2722 1.3 augustss return (USBD_IN_PROGRESS);
2723 1.3 augustss }
2724 1.3 augustss
2725 1.52.2.1 bouyer Static void
2726 1.52.2.1 bouyer ohci_device_bulk_abort(usbd_xfer_handle xfer)
2727 1.3 augustss {
2728 1.52.2.1 bouyer DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2729 1.52.2.1 bouyer ohci_abort_xfer(xfer, USBD_CANCELLED);
2730 1.3 augustss }
2731 1.3 augustss
2732 1.34 augustss /*
2733 1.34 augustss * Close a device bulk pipe.
2734 1.34 augustss */
2735 1.52.2.1 bouyer Static void
2736 1.52.2.1 bouyer ohci_device_bulk_close(usbd_pipe_handle pipe)
2737 1.3 augustss {
2738 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2739 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2740 1.3 augustss
2741 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2742 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2743 1.52.2.1 bouyer ohci_free_std(sc, opipe->tail.td);
2744 1.1 augustss }
2745 1.1 augustss
2746 1.1 augustss /************************/
2747 1.1 augustss
2748 1.52.2.1 bouyer Static usbd_status
2749 1.52.2.1 bouyer ohci_device_intr_transfer(usbd_xfer_handle xfer)
2750 1.17 augustss {
2751 1.52.2.1 bouyer usbd_status err;
2752 1.17 augustss
2753 1.46 augustss /* Insert last in queue. */
2754 1.52.2.1 bouyer err = usb_insert_transfer(xfer);
2755 1.52.2.1 bouyer if (err)
2756 1.52.2.1 bouyer return (err);
2757 1.46 augustss
2758 1.46 augustss /* Pipe isn't running, start first */
2759 1.52.2.1 bouyer return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2760 1.17 augustss }
2761 1.17 augustss
2762 1.52.2.1 bouyer Static usbd_status
2763 1.52.2.1 bouyer ohci_device_intr_start(usbd_xfer_handle xfer)
2764 1.1 augustss {
2765 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2766 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2767 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2768 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2769 1.48 augustss ohci_soft_td_t *data, *tail;
2770 1.1 augustss int len;
2771 1.1 augustss int s;
2772 1.1 augustss
2773 1.52.2.1 bouyer if (sc->sc_dying)
2774 1.52.2.1 bouyer return (USBD_IOERROR);
2775 1.52.2.1 bouyer
2776 1.52.2.1 bouyer DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2777 1.14 augustss "flags=%d priv=%p\n",
2778 1.52.2.1 bouyer xfer, xfer->length, xfer->flags, xfer->priv));
2779 1.1 augustss
2780 1.42 augustss #ifdef DIAGNOSTIC
2781 1.52.2.1 bouyer if (xfer->rqflags & URQ_REQUEST)
2782 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2783 1.42 augustss #endif
2784 1.1 augustss
2785 1.52.2.1 bouyer len = xfer->length;
2786 1.1 augustss
2787 1.52.2.1 bouyer data = opipe->tail.td;
2788 1.1 augustss tail = ohci_alloc_std(sc);
2789 1.52.2.1 bouyer if (tail == NULL)
2790 1.43 augustss return (USBD_NOMEM);
2791 1.52.2.1 bouyer tail->xfer = NULL;
2792 1.1 augustss
2793 1.52.2.1 bouyer data->td.td_flags = htole32(
2794 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2795 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2796 1.52.2.1 bouyer if (xfer->flags & USBD_SHORT_XFER_OK)
2797 1.52.2.1 bouyer data->td.td_flags |= htole32(OHCI_TD_R);
2798 1.52.2.1 bouyer data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf));
2799 1.48 augustss data->nexttd = tail;
2800 1.52.2.1 bouyer data->td.td_nexttd = htole32(tail->physaddr);
2801 1.52.2.1 bouyer data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
2802 1.48 augustss data->len = len;
2803 1.52.2.1 bouyer data->xfer = xfer;
2804 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2805 1.52.2.1 bouyer xfer->hcpriv = data;
2806 1.1 augustss
2807 1.52 augustss #ifdef OHCI_DEBUG
2808 1.1 augustss if (ohcidebug > 5) {
2809 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2810 1.1 augustss ohci_dump_ed(sed);
2811 1.48 augustss ohci_dump_tds(data);
2812 1.1 augustss }
2813 1.1 augustss #endif
2814 1.1 augustss
2815 1.1 augustss /* Insert ED in schedule */
2816 1.1 augustss s = splusb();
2817 1.52.2.1 bouyer sed->ed.ed_tailp = htole32(tail->physaddr);
2818 1.52.2.1 bouyer opipe->tail.td = tail;
2819 1.52.2.1 bouyer sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2820 1.1 augustss
2821 1.52 augustss #if 0
2822 1.52 augustss /*
2823 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
2824 1.52 augustss * because false references are followed due to the fact that the
2825 1.52 augustss * TD is gone.
2826 1.52 augustss */
2827 1.1 augustss if (ohcidebug > 5) {
2828 1.52.2.1 bouyer usb_delay_ms(&sc->sc_bus, 5);
2829 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2830 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2831 1.1 augustss ohci_dump_ed(sed);
2832 1.48 augustss ohci_dump_tds(data);
2833 1.1 augustss }
2834 1.1 augustss #endif
2835 1.26 augustss splx(s);
2836 1.1 augustss
2837 1.1 augustss return (USBD_IN_PROGRESS);
2838 1.1 augustss }
2839 1.1 augustss
2840 1.1 augustss /* Abort a device control request. */
2841 1.52.2.1 bouyer Static void
2842 1.52.2.1 bouyer ohci_device_intr_abort(usbd_xfer_handle xfer)
2843 1.1 augustss {
2844 1.52.2.1 bouyer if (xfer->pipe->intrxfer == xfer) {
2845 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2846 1.52.2.1 bouyer xfer->pipe->intrxfer = NULL;
2847 1.1 augustss }
2848 1.52.2.1 bouyer ohci_abort_xfer(xfer, USBD_CANCELLED);
2849 1.1 augustss }
2850 1.1 augustss
2851 1.1 augustss /* Close a device interrupt pipe. */
2852 1.52.2.1 bouyer Static void
2853 1.52.2.1 bouyer ohci_device_intr_close(usbd_pipe_handle pipe)
2854 1.1 augustss {
2855 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2856 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2857 1.1 augustss int nslots = opipe->u.intr.nslots;
2858 1.1 augustss int pos = opipe->u.intr.pos;
2859 1.1 augustss int j;
2860 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2861 1.1 augustss int s;
2862 1.1 augustss
2863 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2864 1.1 augustss pipe, nslots, pos));
2865 1.1 augustss s = splusb();
2866 1.52.2.1 bouyer sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2867 1.52.2.1 bouyer if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2868 1.52.2.1 bouyer (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2869 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2870 1.1 augustss
2871 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2872 1.1 augustss ;
2873 1.52.2.1 bouyer #ifdef DIAGNOSTIC
2874 1.52.2.1 bouyer if (p == NULL)
2875 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2876 1.52.2.1 bouyer #endif
2877 1.1 augustss p->next = sed->next;
2878 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
2879 1.1 augustss splx(s);
2880 1.1 augustss
2881 1.1 augustss for (j = 0; j < nslots; j++)
2882 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2883 1.1 augustss
2884 1.52.2.1 bouyer ohci_free_std(sc, opipe->tail.td);
2885 1.1 augustss ohci_free_sed(sc, opipe->sed);
2886 1.1 augustss }
2887 1.1 augustss
2888 1.52.2.1 bouyer Static usbd_status
2889 1.52.2.1 bouyer ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
2890 1.1 augustss {
2891 1.1 augustss int i, j, s, best;
2892 1.1 augustss u_int npoll, slow, shigh, nslots;
2893 1.1 augustss u_int bestbw, bw;
2894 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2895 1.1 augustss
2896 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2897 1.1 augustss if (ival == 0) {
2898 1.1 augustss printf("ohci_setintr: 0 interval\n");
2899 1.1 augustss return (USBD_INVAL);
2900 1.1 augustss }
2901 1.1 augustss
2902 1.1 augustss npoll = OHCI_NO_INTRS;
2903 1.1 augustss while (npoll > ival)
2904 1.1 augustss npoll /= 2;
2905 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2906 1.1 augustss
2907 1.1 augustss /*
2908 1.1 augustss * We now know which level in the tree the ED must go into.
2909 1.1 augustss * Figure out which slot has most bandwidth left over.
2910 1.1 augustss * Slots to examine:
2911 1.1 augustss * npoll
2912 1.1 augustss * 1 0
2913 1.1 augustss * 2 1 2
2914 1.1 augustss * 4 3 4 5 6
2915 1.1 augustss * 8 7 8 9 10 11 12 13 14
2916 1.1 augustss * N (N-1) .. (N-1+N-1)
2917 1.1 augustss */
2918 1.1 augustss slow = npoll-1;
2919 1.1 augustss shigh = slow + npoll;
2920 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2921 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2922 1.1 augustss bw = 0;
2923 1.1 augustss for (j = 0; j < nslots; j++)
2924 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2925 1.1 augustss if (bw < bestbw) {
2926 1.1 augustss best = i;
2927 1.1 augustss bestbw = bw;
2928 1.1 augustss }
2929 1.1 augustss }
2930 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2931 1.1 augustss best, slow, shigh, bestbw));
2932 1.1 augustss
2933 1.1 augustss s = splusb();
2934 1.1 augustss hsed = sc->sc_eds[best];
2935 1.1 augustss sed->next = hsed->next;
2936 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
2937 1.1 augustss hsed->next = sed;
2938 1.52.2.1 bouyer hsed->ed.ed_nexted = htole32(sed->physaddr);
2939 1.1 augustss splx(s);
2940 1.1 augustss
2941 1.1 augustss for (j = 0; j < nslots; j++)
2942 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2943 1.1 augustss opipe->u.intr.nslots = nslots;
2944 1.1 augustss opipe->u.intr.pos = best;
2945 1.1 augustss
2946 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2947 1.1 augustss return (USBD_NORMAL_COMPLETION);
2948 1.1 augustss }
2949 1.1 augustss
2950 1.52.2.1 bouyer /***********************/
2951 1.52.2.1 bouyer
2952 1.52.2.1 bouyer usbd_status
2953 1.52.2.1 bouyer ohci_device_isoc_transfer(usbd_xfer_handle xfer)
2954 1.52.2.1 bouyer {
2955 1.52.2.1 bouyer usbd_status err;
2956 1.52.2.1 bouyer
2957 1.52.2.1 bouyer DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
2958 1.52.2.1 bouyer
2959 1.52.2.1 bouyer /* Put it on our queue, */
2960 1.52.2.1 bouyer err = usb_insert_transfer(xfer);
2961 1.52.2.1 bouyer
2962 1.52.2.1 bouyer /* bail out on error, */
2963 1.52.2.1 bouyer if (err && err != USBD_IN_PROGRESS)
2964 1.52.2.1 bouyer return (err);
2965 1.52.2.1 bouyer
2966 1.52.2.1 bouyer /* XXX should check inuse here */
2967 1.52.2.1 bouyer
2968 1.52.2.1 bouyer /* insert into schedule, */
2969 1.52.2.1 bouyer ohci_device_isoc_enter(xfer);
2970 1.52.2.1 bouyer
2971 1.52.2.1 bouyer /* and start if the pipe wasn't running */
2972 1.52.2.1 bouyer if (!err)
2973 1.52.2.1 bouyer ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2974 1.52.2.1 bouyer
2975 1.52.2.1 bouyer return (err);
2976 1.52.2.1 bouyer }
2977 1.52.2.1 bouyer
2978 1.52.2.1 bouyer void
2979 1.52.2.1 bouyer ohci_device_isoc_enter(usbd_xfer_handle xfer)
2980 1.52.2.1 bouyer {
2981 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2982 1.52.2.1 bouyer usbd_device_handle dev = opipe->pipe.device;
2983 1.52.2.1 bouyer ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2984 1.52.2.1 bouyer ohci_soft_ed_t *sed = opipe->sed;
2985 1.52.2.1 bouyer struct iso *iso = &opipe->u.iso;
2986 1.52.2.1 bouyer ohci_soft_itd_t *sitd, *nsitd;
2987 1.52.2.1 bouyer ohci_physaddr_t buf, offs, noffs, bp0;
2988 1.52.2.1 bouyer int i, ncur, nframes;
2989 1.52.2.1 bouyer int s;
2990 1.52.2.1 bouyer
2991 1.52.2.1 bouyer DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
2992 1.52.2.1 bouyer "nframes=%d\n",
2993 1.52.2.1 bouyer iso->inuse, iso->next, xfer, xfer->nframes));
2994 1.52.2.1 bouyer
2995 1.52.2.1 bouyer if (sc->sc_dying)
2996 1.52.2.1 bouyer return;
2997 1.52.2.1 bouyer
2998 1.52.2.1 bouyer if (iso->next == -1) {
2999 1.52.2.1 bouyer /* Not in use yet, schedule it a few frames ahead. */
3000 1.52.2.1 bouyer iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
3001 1.52.2.1 bouyer DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
3002 1.52.2.1 bouyer iso->next));
3003 1.52.2.1 bouyer }
3004 1.52.2.1 bouyer
3005 1.52.2.1 bouyer sitd = opipe->tail.itd;
3006 1.52.2.1 bouyer buf = DMAADDR(&xfer->dmabuf);
3007 1.52.2.1 bouyer bp0 = OHCI_PAGE(buf);
3008 1.52.2.1 bouyer offs = OHCI_PAGE_OFFSET(buf);
3009 1.52.2.1 bouyer nframes = xfer->nframes;
3010 1.52.2.1 bouyer xfer->hcpriv = sitd;
3011 1.52.2.1 bouyer for (i = ncur = 0; i < nframes; i++, ncur++) {
3012 1.52.2.1 bouyer noffs = offs + xfer->frlengths[i];
3013 1.52.2.1 bouyer if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
3014 1.52.2.1 bouyer OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
3015 1.52.2.1 bouyer
3016 1.52.2.1 bouyer /* Allocate next ITD */
3017 1.52.2.1 bouyer nsitd = ohci_alloc_sitd(sc);
3018 1.52.2.1 bouyer if (nsitd == NULL) {
3019 1.52.2.1 bouyer /* XXX what now? */
3020 1.52.2.1 bouyer printf("%s: isoc TD alloc failed\n",
3021 1.52.2.1 bouyer USBDEVNAME(sc->sc_bus.bdev));
3022 1.52.2.1 bouyer return;
3023 1.52.2.1 bouyer }
3024 1.52.2.1 bouyer
3025 1.52.2.1 bouyer /* Fill current ITD */
3026 1.52.2.1 bouyer sitd->itd.itd_flags = htole32(
3027 1.52.2.1 bouyer OHCI_ITD_NOCC |
3028 1.52.2.1 bouyer OHCI_ITD_SET_SF(iso->next) |
3029 1.52.2.1 bouyer OHCI_ITD_SET_DI(6) | /* delay intr a little */
3030 1.52.2.1 bouyer OHCI_ITD_SET_FC(ncur));
3031 1.52.2.1 bouyer sitd->itd.itd_bp0 = htole32(bp0);
3032 1.52.2.1 bouyer sitd->nextitd = nsitd;
3033 1.52.2.1 bouyer sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3034 1.52.2.1 bouyer sitd->itd.itd_be = htole32(bp0 + offs - 1);
3035 1.52.2.1 bouyer sitd->xfer = xfer;
3036 1.52.2.1 bouyer sitd->flags = 0;
3037 1.52.2.1 bouyer
3038 1.52.2.1 bouyer sitd = nsitd;
3039 1.52.2.1 bouyer iso->next = iso->next + ncur;
3040 1.52.2.1 bouyer bp0 = OHCI_PAGE(buf + offs);
3041 1.52.2.1 bouyer ncur = 0;
3042 1.52.2.1 bouyer }
3043 1.52.2.1 bouyer sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
3044 1.52.2.1 bouyer offs = noffs;
3045 1.52.2.1 bouyer }
3046 1.52.2.1 bouyer nsitd = ohci_alloc_sitd(sc);
3047 1.52.2.1 bouyer if (nsitd == NULL) {
3048 1.52.2.1 bouyer /* XXX what now? */
3049 1.52.2.1 bouyer printf("%s: isoc TD alloc failed\n",
3050 1.52.2.1 bouyer USBDEVNAME(sc->sc_bus.bdev));
3051 1.52.2.1 bouyer return;
3052 1.52.2.1 bouyer }
3053 1.52.2.1 bouyer /* Fixup last used ITD */
3054 1.52.2.1 bouyer sitd->itd.itd_flags = htole32(
3055 1.52.2.1 bouyer OHCI_ITD_NOCC |
3056 1.52.2.1 bouyer OHCI_ITD_SET_SF(iso->next) |
3057 1.52.2.1 bouyer OHCI_ITD_SET_DI(0) |
3058 1.52.2.1 bouyer OHCI_ITD_SET_FC(ncur));
3059 1.52.2.1 bouyer sitd->itd.itd_bp0 = htole32(bp0);
3060 1.52.2.1 bouyer sitd->nextitd = nsitd;
3061 1.52.2.1 bouyer sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3062 1.52.2.1 bouyer sitd->itd.itd_be = htole32(bp0 + offs - 1);
3063 1.52.2.1 bouyer sitd->xfer = xfer;
3064 1.52.2.1 bouyer sitd->flags = OHCI_CALL_DONE;
3065 1.52.2.1 bouyer
3066 1.52.2.1 bouyer iso->next = iso->next + ncur;
3067 1.52.2.1 bouyer iso->inuse += nframes;
3068 1.52.2.1 bouyer
3069 1.52.2.1 bouyer xfer->actlen = offs; /* XXX pretend we did it all */
3070 1.52.2.1 bouyer
3071 1.52.2.1 bouyer xfer->status = USBD_IN_PROGRESS;
3072 1.52.2.1 bouyer
3073 1.52.2.1 bouyer #ifdef OHCI_DEBUG
3074 1.52.2.1 bouyer if (ohcidebug > 5) {
3075 1.52.2.1 bouyer DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3076 1.52.2.1 bouyer le32toh(sc->sc_hcca->hcca_frame_number)));
3077 1.52.2.1 bouyer ohci_dump_itds(xfer->hcpriv);
3078 1.52.2.1 bouyer ohci_dump_ed(sed);
3079 1.52.2.1 bouyer }
3080 1.52.2.1 bouyer #endif
3081 1.52.2.1 bouyer
3082 1.52.2.1 bouyer s = splusb();
3083 1.52.2.1 bouyer opipe->tail.itd = nsitd;
3084 1.52.2.1 bouyer sed->ed.ed_tailp = htole32(nsitd->physaddr);
3085 1.52.2.1 bouyer splx(s);
3086 1.52.2.1 bouyer
3087 1.52.2.1 bouyer #ifdef OHCI_DEBUG
3088 1.52.2.1 bouyer if (ohcidebug > 5) {
3089 1.52.2.1 bouyer delay(150000);
3090 1.52.2.1 bouyer DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3091 1.52.2.1 bouyer le32toh(sc->sc_hcca->hcca_frame_number)));
3092 1.52.2.1 bouyer ohci_dump_itds(xfer->hcpriv);
3093 1.52.2.1 bouyer ohci_dump_ed(sed);
3094 1.52.2.1 bouyer }
3095 1.52.2.1 bouyer #endif
3096 1.52.2.1 bouyer }
3097 1.52.2.1 bouyer
3098 1.52.2.1 bouyer usbd_status
3099 1.52.2.1 bouyer ohci_device_isoc_start(usbd_xfer_handle xfer)
3100 1.52.2.1 bouyer {
3101 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3102 1.52.2.1 bouyer ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3103 1.52.2.1 bouyer
3104 1.52.2.1 bouyer DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3105 1.52.2.1 bouyer
3106 1.52.2.1 bouyer if (sc->sc_dying)
3107 1.52.2.1 bouyer return (USBD_IOERROR);
3108 1.52.2.1 bouyer
3109 1.52.2.1 bouyer #ifdef DIAGNOSTIC
3110 1.52.2.1 bouyer if (xfer->status != USBD_IN_PROGRESS)
3111 1.52.2.1 bouyer printf("uhci_device_isoc_start: not in progress %p\n", xfer);
3112 1.52.2.1 bouyer #endif
3113 1.52.2.1 bouyer
3114 1.52.2.1 bouyer /* XXX anything to do? */
3115 1.52.2.1 bouyer
3116 1.52.2.1 bouyer return (USBD_IN_PROGRESS);
3117 1.52.2.1 bouyer }
3118 1.52.2.1 bouyer
3119 1.52.2.1 bouyer void
3120 1.52.2.1 bouyer ohci_device_isoc_abort(usbd_xfer_handle xfer)
3121 1.52.2.1 bouyer {
3122 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3123 1.52.2.1 bouyer ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3124 1.52.2.1 bouyer ohci_soft_ed_t *sed;
3125 1.52.2.1 bouyer ohci_soft_itd_t *sitd;
3126 1.52.2.1 bouyer int s;
3127 1.52.2.1 bouyer
3128 1.52.2.1 bouyer s = splusb();
3129 1.52.2.1 bouyer
3130 1.52.2.1 bouyer DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3131 1.52.2.1 bouyer
3132 1.52.2.1 bouyer /* Transfer is already done. */
3133 1.52.2.1 bouyer if (xfer->status != USBD_NOT_STARTED &&
3134 1.52.2.1 bouyer xfer->status != USBD_IN_PROGRESS) {
3135 1.52.2.1 bouyer splx(s);
3136 1.52.2.1 bouyer printf("ohci_device_isoc_abort: early return\n");
3137 1.52.2.1 bouyer return;
3138 1.52.2.1 bouyer }
3139 1.52.2.1 bouyer
3140 1.52.2.1 bouyer /* Give xfer the requested abort code. */
3141 1.52.2.1 bouyer xfer->status = USBD_CANCELLED;
3142 1.52.2.1 bouyer
3143 1.52.2.1 bouyer sed = opipe->sed;
3144 1.52.2.1 bouyer sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3145 1.52.2.1 bouyer
3146 1.52.2.1 bouyer sitd = xfer->hcpriv;
3147 1.52.2.1 bouyer #ifdef DIAGNOSTIC
3148 1.52.2.1 bouyer if (sitd == NULL) {
3149 1.52.2.1 bouyer printf("ohci_device_isoc_abort: hcpriv==0\n");
3150 1.52.2.1 bouyer return;
3151 1.52.2.1 bouyer }
3152 1.52.2.1 bouyer #endif
3153 1.52.2.1 bouyer for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3154 1.52.2.1 bouyer #ifdef DIAGNOSTIC
3155 1.52.2.1 bouyer DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3156 1.52.2.1 bouyer sitd->isdone = 1;
3157 1.52.2.1 bouyer #endif
3158 1.52.2.1 bouyer }
3159 1.52.2.1 bouyer
3160 1.52.2.1 bouyer splx(s);
3161 1.52.2.1 bouyer
3162 1.52.2.1 bouyer usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3163 1.52.2.1 bouyer
3164 1.52.2.1 bouyer s = splusb();
3165 1.52.2.1 bouyer
3166 1.52.2.1 bouyer /* Run callback. */
3167 1.52.2.1 bouyer usb_transfer_complete(xfer);
3168 1.52.2.1 bouyer
3169 1.52.2.1 bouyer sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */
3170 1.52.2.1 bouyer sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3171 1.52.2.1 bouyer
3172 1.52.2.1 bouyer splx(s);
3173 1.52.2.1 bouyer }
3174 1.52.2.1 bouyer
3175 1.52.2.1 bouyer void
3176 1.52.2.1 bouyer ohci_device_isoc_done(usbd_xfer_handle xfer)
3177 1.52.2.1 bouyer {
3178 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3179 1.52.2.1 bouyer ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3180 1.52.2.1 bouyer ohci_soft_itd_t *sitd, *nsitd;
3181 1.52.2.1 bouyer
3182 1.52.2.1 bouyer DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3183 1.52.2.1 bouyer
3184 1.52.2.1 bouyer for (sitd = xfer->hcpriv;
3185 1.52.2.1 bouyer !(sitd->flags & OHCI_CALL_DONE);
3186 1.52.2.1 bouyer sitd = nsitd) {
3187 1.52.2.1 bouyer nsitd = sitd->nextitd;
3188 1.52.2.1 bouyer DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd));
3189 1.52.2.1 bouyer ohci_free_sitd(sc, sitd);
3190 1.52.2.1 bouyer }
3191 1.52.2.1 bouyer ohci_free_sitd(sc, sitd);
3192 1.52.2.1 bouyer xfer->hcpriv = NULL;
3193 1.52.2.1 bouyer }
3194 1.52.2.1 bouyer
3195 1.52.2.1 bouyer usbd_status
3196 1.52.2.1 bouyer ohci_setup_isoc(usbd_pipe_handle pipe)
3197 1.52.2.1 bouyer {
3198 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3199 1.52.2.1 bouyer ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3200 1.52.2.1 bouyer struct iso *iso = &opipe->u.iso;
3201 1.52.2.1 bouyer int s;
3202 1.52.2.1 bouyer
3203 1.52.2.1 bouyer iso->next = -1;
3204 1.52.2.1 bouyer iso->inuse = 0;
3205 1.52.2.1 bouyer
3206 1.52.2.1 bouyer s = splusb();
3207 1.52.2.1 bouyer ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3208 1.52.2.1 bouyer splx(s);
3209 1.52.2.1 bouyer
3210 1.52.2.1 bouyer return (USBD_NORMAL_COMPLETION);
3211 1.52.2.1 bouyer }
3212 1.52.2.1 bouyer
3213 1.52.2.1 bouyer void
3214 1.52.2.1 bouyer ohci_device_isoc_close(usbd_pipe_handle pipe)
3215 1.52.2.1 bouyer {
3216 1.52.2.1 bouyer struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3217 1.52.2.1 bouyer ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3218 1.52.2.1 bouyer int s;
3219 1.52.2.1 bouyer
3220 1.52.2.1 bouyer DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3221 1.52.2.1 bouyer
3222 1.52.2.1 bouyer s = splusb();
3223 1.52.2.1 bouyer ohci_rem_ed(opipe->sed, sc->sc_isoc_head);
3224 1.52.2.1 bouyer splx(s);
3225 1.52.2.1 bouyer ohci_close_pipe(pipe, sc->sc_isoc_head);
3226 1.52.2.1 bouyer #ifdef DIAGNOSTIC
3227 1.52.2.1 bouyer opipe->tail.itd->isdone = 1;
3228 1.52.2.1 bouyer #endif
3229 1.52.2.1 bouyer ohci_free_sitd(sc, opipe->tail.itd);
3230 1.52.2.1 bouyer }
3231