ohci.c revision 1.53 1 1.53 augustss /* $NetBSD: ohci.c,v 1.53 1999/11/12 00:34:57 augustss Exp $ */
2 1.1 augustss
3 1.1 augustss /*
4 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.1 augustss * All rights reserved.
6 1.1 augustss *
7 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
8 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
9 1.11 augustss * Carlstedt Research & Technology.
10 1.1 augustss *
11 1.1 augustss * Redistribution and use in source and binary forms, with or without
12 1.1 augustss * modification, are permitted provided that the following conditions
13 1.1 augustss * are met:
14 1.1 augustss * 1. Redistributions of source code must retain the above copyright
15 1.1 augustss * notice, this list of conditions and the following disclaimer.
16 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
17 1.1 augustss * notice, this list of conditions and the following disclaimer in the
18 1.1 augustss * documentation and/or other materials provided with the distribution.
19 1.1 augustss * 3. All advertising materials mentioning features or use of this software
20 1.1 augustss * must display the following acknowledgement:
21 1.1 augustss * This product includes software developed by the NetBSD
22 1.1 augustss * Foundation, Inc. and its contributors.
23 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.1 augustss * contributors may be used to endorse or promote products derived
25 1.1 augustss * from this software without specific prior written permission.
26 1.1 augustss *
27 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
38 1.1 augustss */
39 1.1 augustss
40 1.1 augustss /*
41 1.1 augustss * USB Open Host Controller driver.
42 1.1 augustss *
43 1.30 augustss * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
44 1.30 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
45 1.1 augustss */
46 1.1 augustss
47 1.1 augustss #include <sys/param.h>
48 1.1 augustss #include <sys/systm.h>
49 1.1 augustss #include <sys/kernel.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
52 1.1 augustss #include <sys/device.h>
53 1.15 augustss #elif defined(__FreeBSD__)
54 1.15 augustss #include <sys/module.h>
55 1.15 augustss #include <sys/bus.h>
56 1.52 augustss #include <machine/bus_pio.h>
57 1.52 augustss #include <machine/bus_memio.h>
58 1.15 augustss #endif
59 1.1 augustss #include <sys/proc.h>
60 1.1 augustss #include <sys/queue.h>
61 1.1 augustss #include <sys/select.h>
62 1.1 augustss
63 1.4 augustss #include <machine/bus.h>
64 1.16 augustss #include <machine/endian.h>
65 1.4 augustss
66 1.1 augustss #include <dev/usb/usb.h>
67 1.1 augustss #include <dev/usb/usbdi.h>
68 1.1 augustss #include <dev/usb/usbdivar.h>
69 1.38 augustss #include <dev/usb/usb_mem.h>
70 1.1 augustss #include <dev/usb/usb_quirks.h>
71 1.1 augustss
72 1.1 augustss #include <dev/usb/ohcireg.h>
73 1.1 augustss #include <dev/usb/ohcivar.h>
74 1.1 augustss
75 1.15 augustss #if defined(__FreeBSD__)
76 1.15 augustss #include <machine/clock.h>
77 1.15 augustss #define delay(d) DELAY(d)
78 1.15 augustss #endif
79 1.1 augustss
80 1.36 augustss #if defined(__OpenBSD__)
81 1.36 augustss struct cfdriver ohci_cd = {
82 1.36 augustss NULL, "ohci", DV_DULL
83 1.36 augustss };
84 1.36 augustss #endif
85 1.36 augustss
86 1.52 augustss #ifdef OHCI_DEBUG
87 1.52 augustss #define DPRINTF(x) if (ohcidebug) logprintf x
88 1.52 augustss #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
89 1.52 augustss int ohcidebug = 0;
90 1.52 augustss #else
91 1.52 augustss #define DPRINTF(x)
92 1.52 augustss #define DPRINTFN(n,x)
93 1.52 augustss #endif
94 1.52 augustss
95 1.16 augustss /*
96 1.16 augustss * The OHCI controller is little endian, so on big endian machines
97 1.16 augustss * the data strored in memory needs to be swapped.
98 1.16 augustss */
99 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
100 1.16 augustss #define LE(x) (bswap32(x))
101 1.16 augustss #else
102 1.16 augustss #define LE(x) (x)
103 1.16 augustss #endif
104 1.16 augustss
105 1.1 augustss struct ohci_pipe;
106 1.1 augustss
107 1.53 augustss static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
108 1.53 augustss static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
109 1.1 augustss
110 1.53 augustss static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
111 1.53 augustss static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
112 1.1 augustss
113 1.53 augustss #if 0
114 1.53 augustss static void ohci_free_std_chain __P((ohci_softc_t *,
115 1.53 augustss ohci_soft_td_t *, ohci_soft_td_t *));
116 1.53 augustss #endif
117 1.53 augustss static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *,
118 1.53 augustss ohci_softc_t *, int, int, int, usb_dma_t *,
119 1.53 augustss ohci_soft_td_t *, ohci_soft_td_t **));
120 1.53 augustss
121 1.53 augustss static void ohci_power __P((int, void *));
122 1.53 augustss static usbd_status ohci_open __P((usbd_pipe_handle));
123 1.53 augustss static void ohci_poll __P((struct usbd_bus *));
124 1.53 augustss static void ohci_waitintr __P((ohci_softc_t *,
125 1.53 augustss usbd_xfer_handle));
126 1.53 augustss static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle));
127 1.53 augustss static void ohci_process_done __P((ohci_softc_t *,
128 1.53 augustss ohci_physaddr_t));
129 1.53 augustss
130 1.53 augustss static usbd_status ohci_device_request __P((usbd_xfer_handle xfer));
131 1.53 augustss static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
132 1.53 augustss static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
133 1.53 augustss static void ohci_hash_add_td __P((ohci_softc_t *,
134 1.53 augustss ohci_soft_td_t *));
135 1.53 augustss static void ohci_hash_rem_td __P((ohci_softc_t *,
136 1.53 augustss ohci_soft_td_t *));
137 1.53 augustss static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *,
138 1.53 augustss ohci_physaddr_t));
139 1.53 augustss
140 1.53 augustss static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *,
141 1.53 augustss u_int32_t));
142 1.53 augustss static void ohci_freem __P((struct usbd_bus *, usb_dma_t *));
143 1.53 augustss
144 1.53 augustss static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle));
145 1.53 augustss static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle));
146 1.53 augustss static void ohci_root_ctrl_abort __P((usbd_xfer_handle));
147 1.53 augustss static void ohci_root_ctrl_close __P((usbd_pipe_handle));
148 1.53 augustss
149 1.53 augustss static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle));
150 1.53 augustss static usbd_status ohci_root_intr_start __P((usbd_xfer_handle));
151 1.53 augustss static void ohci_root_intr_abort __P((usbd_xfer_handle));
152 1.53 augustss static void ohci_root_intr_close __P((usbd_pipe_handle));
153 1.53 augustss static void ohci_root_intr_done __P((usbd_xfer_handle));
154 1.53 augustss
155 1.53 augustss static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle));
156 1.53 augustss static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle));
157 1.53 augustss static void ohci_device_ctrl_abort __P((usbd_xfer_handle));
158 1.53 augustss static void ohci_device_ctrl_close __P((usbd_pipe_handle));
159 1.53 augustss static void ohci_device_ctrl_done __P((usbd_xfer_handle));
160 1.53 augustss
161 1.53 augustss static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle));
162 1.53 augustss static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle));
163 1.53 augustss static void ohci_device_bulk_abort __P((usbd_xfer_handle));
164 1.53 augustss static void ohci_device_bulk_close __P((usbd_pipe_handle));
165 1.53 augustss static void ohci_device_bulk_done __P((usbd_xfer_handle));
166 1.53 augustss
167 1.53 augustss static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle));
168 1.53 augustss static usbd_status ohci_device_intr_start __P((usbd_xfer_handle));
169 1.53 augustss static void ohci_device_intr_abort __P((usbd_xfer_handle));
170 1.53 augustss static void ohci_device_intr_close __P((usbd_pipe_handle));
171 1.53 augustss static void ohci_device_intr_done __P((usbd_xfer_handle));
172 1.53 augustss
173 1.53 augustss #if 0
174 1.53 augustss static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle));
175 1.53 augustss static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle));
176 1.53 augustss static void ohci_device_isoc_abort __P((usbd_xfer_handle));
177 1.53 augustss static void ohci_device_isoc_close __P((usbd_pipe_handle));
178 1.53 augustss static void ohci_device_isoc_done __P((usbd_xfer_handle));
179 1.53 augustss #endif
180 1.53 augustss
181 1.53 augustss static usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
182 1.53 augustss struct ohci_pipe *pipe, int ival));
183 1.53 augustss
184 1.53 augustss static int ohci_str __P((usb_string_descriptor_t *, int, char *));
185 1.53 augustss
186 1.53 augustss static void ohci_timeout __P((void *));
187 1.53 augustss static void ohci_rhsc_able __P((ohci_softc_t *, int));
188 1.34 augustss
189 1.53 augustss static void ohci_close_pipe __P((usbd_pipe_handle pipe,
190 1.53 augustss ohci_soft_ed_t *head));
191 1.53 augustss static void ohci_abort_req __P((usbd_xfer_handle xfer,
192 1.53 augustss usbd_status status));
193 1.53 augustss static void ohci_abort_req_end __P((void *));
194 1.53 augustss
195 1.53 augustss static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
196 1.53 augustss static void ohci_noop __P((usbd_pipe_handle pipe));
197 1.37 augustss
198 1.52 augustss #ifdef OHCI_DEBUG
199 1.53 augustss static ohci_softc_t *thesc;
200 1.53 augustss static void ohci_dumpregs __P((ohci_softc_t *));
201 1.53 augustss static void ohci_dump_tds __P((ohci_soft_td_t *));
202 1.53 augustss static void ohci_dump_td __P((ohci_soft_td_t *));
203 1.53 augustss static void ohci_dump_ed __P((ohci_soft_ed_t *));
204 1.1 augustss #endif
205 1.1 augustss
206 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
207 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
208 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
209 1.1 augustss
210 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
211 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
212 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
213 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
214 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
215 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
216 1.1 augustss
217 1.1 augustss struct ohci_pipe {
218 1.1 augustss struct usbd_pipe pipe;
219 1.1 augustss ohci_soft_ed_t *sed;
220 1.1 augustss ohci_soft_td_t *tail;
221 1.1 augustss /* Info needed for different pipe kinds. */
222 1.1 augustss union {
223 1.1 augustss /* Control pipe */
224 1.1 augustss struct {
225 1.4 augustss usb_dma_t reqdma;
226 1.1 augustss u_int length;
227 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
228 1.1 augustss } ctl;
229 1.1 augustss /* Interrupt pipe */
230 1.1 augustss struct {
231 1.1 augustss int nslots;
232 1.1 augustss int pos;
233 1.1 augustss } intr;
234 1.3 augustss /* Bulk pipe */
235 1.3 augustss struct {
236 1.3 augustss u_int length;
237 1.32 augustss int isread;
238 1.3 augustss } bulk;
239 1.43 augustss /* Iso pipe */
240 1.43 augustss struct iso {
241 1.43 augustss int xxxxx;
242 1.43 augustss } iso;
243 1.1 augustss } u;
244 1.1 augustss };
245 1.1 augustss
246 1.1 augustss #define OHCI_INTR_ENDPT 1
247 1.1 augustss
248 1.53 augustss static struct usbd_bus_methods ohci_bus_methods = {
249 1.42 augustss ohci_open,
250 1.42 augustss ohci_poll,
251 1.42 augustss ohci_allocm,
252 1.42 augustss ohci_freem,
253 1.42 augustss };
254 1.42 augustss
255 1.53 augustss static struct usbd_pipe_methods ohci_root_ctrl_methods = {
256 1.1 augustss ohci_root_ctrl_transfer,
257 1.17 augustss ohci_root_ctrl_start,
258 1.1 augustss ohci_root_ctrl_abort,
259 1.1 augustss ohci_root_ctrl_close,
260 1.37 augustss ohci_noop,
261 1.7 augustss 0,
262 1.1 augustss };
263 1.1 augustss
264 1.53 augustss static struct usbd_pipe_methods ohci_root_intr_methods = {
265 1.1 augustss ohci_root_intr_transfer,
266 1.17 augustss ohci_root_intr_start,
267 1.1 augustss ohci_root_intr_abort,
268 1.1 augustss ohci_root_intr_close,
269 1.37 augustss ohci_noop,
270 1.38 augustss ohci_root_intr_done,
271 1.1 augustss };
272 1.1 augustss
273 1.53 augustss static struct usbd_pipe_methods ohci_device_ctrl_methods = {
274 1.1 augustss ohci_device_ctrl_transfer,
275 1.17 augustss ohci_device_ctrl_start,
276 1.1 augustss ohci_device_ctrl_abort,
277 1.1 augustss ohci_device_ctrl_close,
278 1.37 augustss ohci_noop,
279 1.38 augustss ohci_device_ctrl_done,
280 1.1 augustss };
281 1.1 augustss
282 1.53 augustss static struct usbd_pipe_methods ohci_device_intr_methods = {
283 1.1 augustss ohci_device_intr_transfer,
284 1.17 augustss ohci_device_intr_start,
285 1.1 augustss ohci_device_intr_abort,
286 1.1 augustss ohci_device_intr_close,
287 1.37 augustss ohci_device_clear_toggle,
288 1.38 augustss ohci_device_intr_done,
289 1.1 augustss };
290 1.1 augustss
291 1.53 augustss static struct usbd_pipe_methods ohci_device_bulk_methods = {
292 1.3 augustss ohci_device_bulk_transfer,
293 1.17 augustss ohci_device_bulk_start,
294 1.3 augustss ohci_device_bulk_abort,
295 1.3 augustss ohci_device_bulk_close,
296 1.37 augustss ohci_device_clear_toggle,
297 1.38 augustss ohci_device_bulk_done,
298 1.3 augustss };
299 1.3 augustss
300 1.43 augustss #if 0
301 1.53 augustss static struct usbd_pipe_methods ohci_device_isoc_methods = {
302 1.43 augustss ohci_device_isoc_transfer,
303 1.43 augustss ohci_device_isoc_start,
304 1.43 augustss ohci_device_isoc_abort,
305 1.43 augustss ohci_device_isoc_close,
306 1.43 augustss ohci_noop,
307 1.43 augustss ohci_device_isoc_done,
308 1.43 augustss };
309 1.43 augustss #endif
310 1.43 augustss
311 1.47 augustss int
312 1.47 augustss ohci_activate(self, act)
313 1.47 augustss device_ptr_t self;
314 1.47 augustss enum devact act;
315 1.47 augustss {
316 1.49 augustss struct ohci_softc *sc = (struct ohci_softc *)self;
317 1.47 augustss int rv = 0;
318 1.47 augustss
319 1.47 augustss switch (act) {
320 1.47 augustss case DVACT_ACTIVATE:
321 1.47 augustss return (EOPNOTSUPP);
322 1.47 augustss break;
323 1.47 augustss
324 1.47 augustss case DVACT_DEACTIVATE:
325 1.49 augustss if (sc->sc_child != NULL)
326 1.49 augustss rv = config_deactivate(sc->sc_child);
327 1.47 augustss break;
328 1.47 augustss }
329 1.47 augustss return (rv);
330 1.47 augustss }
331 1.47 augustss
332 1.47 augustss int
333 1.50 augustss ohci_detach(sc, flags)
334 1.50 augustss struct ohci_softc *sc;
335 1.47 augustss int flags;
336 1.47 augustss {
337 1.47 augustss int rv = 0;
338 1.47 augustss
339 1.47 augustss if (sc->sc_child != NULL)
340 1.47 augustss rv = config_detach(sc->sc_child, flags);
341 1.47 augustss
342 1.47 augustss if (rv != 0)
343 1.47 augustss return (rv);
344 1.47 augustss
345 1.47 augustss powerhook_disestablish(sc->sc_powerhook);
346 1.47 augustss /* free data structures XXX */
347 1.47 augustss
348 1.47 augustss return (rv);
349 1.47 augustss }
350 1.47 augustss
351 1.1 augustss ohci_soft_ed_t *
352 1.1 augustss ohci_alloc_sed(sc)
353 1.1 augustss ohci_softc_t *sc;
354 1.1 augustss {
355 1.1 augustss ohci_soft_ed_t *sed;
356 1.53 augustss usbd_status err;
357 1.1 augustss int i, offs;
358 1.4 augustss usb_dma_t dma;
359 1.1 augustss
360 1.53 augustss if (sc->sc_freeeds == NULL) {
361 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
362 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
363 1.53 augustss OHCI_ED_ALIGN, &dma);
364 1.53 augustss if (err)
365 1.39 augustss return (0);
366 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
367 1.39 augustss offs = i * OHCI_SED_SIZE;
368 1.39 augustss sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
369 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
370 1.1 augustss sed->next = sc->sc_freeeds;
371 1.1 augustss sc->sc_freeeds = sed;
372 1.1 augustss }
373 1.1 augustss }
374 1.1 augustss sed = sc->sc_freeeds;
375 1.1 augustss sc->sc_freeeds = sed->next;
376 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
377 1.1 augustss sed->next = 0;
378 1.39 augustss return (sed);
379 1.1 augustss }
380 1.1 augustss
381 1.1 augustss void
382 1.1 augustss ohci_free_sed(sc, sed)
383 1.1 augustss ohci_softc_t *sc;
384 1.1 augustss ohci_soft_ed_t *sed;
385 1.1 augustss {
386 1.1 augustss sed->next = sc->sc_freeeds;
387 1.1 augustss sc->sc_freeeds = sed;
388 1.1 augustss }
389 1.1 augustss
390 1.1 augustss ohci_soft_td_t *
391 1.1 augustss ohci_alloc_std(sc)
392 1.1 augustss ohci_softc_t *sc;
393 1.1 augustss {
394 1.1 augustss ohci_soft_td_t *std;
395 1.53 augustss usbd_status err;
396 1.1 augustss int i, offs;
397 1.4 augustss usb_dma_t dma;
398 1.1 augustss
399 1.53 augustss if (sc->sc_freetds == NULL) {
400 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
401 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
402 1.53 augustss OHCI_TD_ALIGN, &dma);
403 1.53 augustss if (err)
404 1.39 augustss return (0);
405 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
406 1.39 augustss offs = i * OHCI_STD_SIZE;
407 1.39 augustss std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
408 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
409 1.1 augustss std->nexttd = sc->sc_freetds;
410 1.1 augustss sc->sc_freetds = std;
411 1.1 augustss }
412 1.1 augustss }
413 1.1 augustss std = sc->sc_freetds;
414 1.1 augustss sc->sc_freetds = std->nexttd;
415 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
416 1.1 augustss std->nexttd = 0;
417 1.1 augustss return (std);
418 1.1 augustss }
419 1.1 augustss
420 1.1 augustss void
421 1.1 augustss ohci_free_std(sc, std)
422 1.1 augustss ohci_softc_t *sc;
423 1.1 augustss ohci_soft_td_t *std;
424 1.1 augustss {
425 1.1 augustss std->nexttd = sc->sc_freetds;
426 1.1 augustss sc->sc_freetds = std;
427 1.1 augustss }
428 1.1 augustss
429 1.1 augustss usbd_status
430 1.48 augustss ohci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep)
431 1.48 augustss struct ohci_pipe *upipe;
432 1.48 augustss ohci_softc_t *sc;
433 1.48 augustss int len, rd, shortok;
434 1.48 augustss usb_dma_t *dma;
435 1.48 augustss ohci_soft_td_t *sp, **ep;
436 1.48 augustss {
437 1.48 augustss ohci_soft_td_t *next, *cur;
438 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
439 1.48 augustss u_int32_t intr;
440 1.48 augustss int curlen;
441 1.48 augustss
442 1.48 augustss DPRINTFN(len >= 4096,("ohci_alloc_std_chain: start len=%d\n", len));
443 1.48 augustss cur = sp;
444 1.48 augustss dataphys = DMAADDR(dma);
445 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
446 1.48 augustss for (;;) {
447 1.48 augustss next = ohci_alloc_std(sc);
448 1.48 augustss if (next == 0) {
449 1.48 augustss /* XXX free chain */
450 1.48 augustss return (USBD_NOMEM);
451 1.48 augustss }
452 1.48 augustss
453 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
454 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
455 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
456 1.48 augustss /* we can handle it in this TD */
457 1.48 augustss curlen = len;
458 1.48 augustss } else {
459 1.48 augustss /* must use multiple TDs, fill as much as possible. */
460 1.48 augustss curlen = 2 * OHCI_PAGE_SIZE -
461 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
462 1.48 augustss }
463 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
464 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
465 1.48 augustss dataphys, dataphysend,
466 1.48 augustss len, curlen));
467 1.48 augustss len -= curlen;
468 1.48 augustss
469 1.48 augustss intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR;
470 1.48 augustss cur->td.td_flags = LE(
471 1.48 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
472 1.48 augustss intr | OHCI_TD_TOGGLE_CARRY |
473 1.48 augustss (shortok ? OHCI_TD_R : 0));
474 1.48 augustss cur->td.td_cbp = LE(dataphys);
475 1.48 augustss cur->nexttd = next;
476 1.48 augustss cur->td.td_nexttd = LE(next->physaddr);
477 1.48 augustss cur->td.td_be = LE(dataphys + curlen - 1);
478 1.48 augustss cur->len = curlen;
479 1.48 augustss cur->flags = OHCI_ADD_LEN;
480 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
481 1.48 augustss dataphys, dataphys + curlen - 1));
482 1.48 augustss if (len == 0)
483 1.48 augustss break;
484 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
485 1.48 augustss dataphys += curlen;
486 1.48 augustss cur = next;
487 1.48 augustss }
488 1.48 augustss cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
489 1.48 augustss *ep = next;
490 1.48 augustss
491 1.48 augustss return (USBD_NORMAL_COMPLETION);
492 1.48 augustss }
493 1.48 augustss
494 1.53 augustss #if 0
495 1.53 augustss static void
496 1.48 augustss ohci_free_std_chain(sc, std, stdend)
497 1.48 augustss ohci_softc_t *sc;
498 1.48 augustss ohci_soft_td_t *std;
499 1.48 augustss ohci_soft_td_t *stdend;
500 1.48 augustss {
501 1.48 augustss ohci_soft_td_t *p;
502 1.48 augustss
503 1.48 augustss for (; std != stdend; std = p) {
504 1.48 augustss p = std->nexttd;
505 1.48 augustss ohci_free_std(sc, std);
506 1.48 augustss }
507 1.48 augustss }
508 1.53 augustss #endif
509 1.48 augustss
510 1.48 augustss usbd_status
511 1.1 augustss ohci_init(sc)
512 1.1 augustss ohci_softc_t *sc;
513 1.1 augustss {
514 1.1 augustss ohci_soft_ed_t *sed, *psed;
515 1.53 augustss usbd_status err;
516 1.1 augustss int rev;
517 1.1 augustss int i;
518 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
519 1.16 augustss
520 1.1 augustss DPRINTF(("ohci_init: start\n"));
521 1.1 augustss rev = OREAD4(sc, OHCI_REVISION);
522 1.36 augustss #if defined(__OpenBSD__)
523 1.36 augustss printf(", OHCI version %d.%d%s\n",
524 1.36 augustss #else
525 1.15 augustss printf("%s: OHCI version %d.%d%s\n", USBDEVNAME(sc->sc_bus.bdev),
526 1.36 augustss #endif
527 1.1 augustss OHCI_REV_HI(rev), OHCI_REV_LO(rev),
528 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
529 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
530 1.1 augustss printf("%s: unsupported OHCI revision\n",
531 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
532 1.1 augustss return (USBD_INVAL);
533 1.1 augustss }
534 1.1 augustss
535 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
536 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
537 1.1 augustss
538 1.1 augustss /* Allocate the HCCA area. */
539 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
540 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
541 1.53 augustss if (err)
542 1.53 augustss return (err);
543 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
544 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
545 1.1 augustss
546 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
547 1.1 augustss
548 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
549 1.53 augustss if (sc->sc_ctrl_head == NULL) {
550 1.53 augustss err = USBD_NOMEM;
551 1.1 augustss goto bad1;
552 1.1 augustss }
553 1.39 augustss sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
554 1.34 augustss
555 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
556 1.53 augustss if (sc->sc_bulk_head == NULL) {
557 1.53 augustss err = USBD_NOMEM;
558 1.1 augustss goto bad2;
559 1.1 augustss }
560 1.39 augustss sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
561 1.1 augustss
562 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
563 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
564 1.1 augustss sed = ohci_alloc_sed(sc);
565 1.53 augustss if (sed == NULL) {
566 1.1 augustss while (--i >= 0)
567 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
568 1.53 augustss err = USBD_NOMEM;
569 1.1 augustss goto bad3;
570 1.1 augustss }
571 1.1 augustss /* All ED fields are set to 0. */
572 1.1 augustss sc->sc_eds[i] = sed;
573 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
574 1.1 augustss if (i != 0) {
575 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
576 1.1 augustss sed->next = psed;
577 1.39 augustss sed->ed.ed_nexted = LE(psed->physaddr);
578 1.1 augustss }
579 1.1 augustss }
580 1.1 augustss /*
581 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
582 1.1 augustss * the tree set up properly to spread the interrupts.
583 1.1 augustss */
584 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
585 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
586 1.16 augustss LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
587 1.1 augustss
588 1.1 augustss /* Determine in what context we are running. */
589 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
590 1.1 augustss if (ctl & OHCI_IR) {
591 1.1 augustss /* SMM active, request change */
592 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
593 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
594 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
595 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
596 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
597 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
598 1.1 augustss }
599 1.1 augustss if ((ctl & OHCI_IR) == 0) {
600 1.15 augustss printf("%s: SMM does not respond, resetting\n",
601 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
602 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
603 1.1 augustss goto reset;
604 1.1 augustss }
605 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
606 1.1 augustss /* BIOS started controller. */
607 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
608 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
609 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
610 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
611 1.1 augustss }
612 1.1 augustss } else {
613 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
614 1.1 augustss reset:
615 1.1 augustss /* Controller was cold started. */
616 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
617 1.1 augustss }
618 1.1 augustss
619 1.16 augustss /*
620 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
621 1.25 augustss * without it some controllers do not start.
622 1.16 augustss */
623 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
624 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
625 1.16 augustss delay(USB_BUS_RESET_DELAY * 1000);
626 1.16 augustss
627 1.1 augustss /* We now own the host controller and the bus has been reset. */
628 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
629 1.1 augustss
630 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
631 1.1 augustss /* Nominal time for a reset is 10 us. */
632 1.1 augustss for (i = 0; i < 10; i++) {
633 1.1 augustss delay(10);
634 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
635 1.1 augustss if (!hcr)
636 1.1 augustss break;
637 1.1 augustss }
638 1.1 augustss if (hcr) {
639 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
640 1.53 augustss err = USBD_IOERROR;
641 1.1 augustss goto bad3;
642 1.1 augustss }
643 1.52 augustss #ifdef OHCI_DEBUG
644 1.1 augustss thesc = sc;
645 1.1 augustss if (ohcidebug > 15)
646 1.1 augustss ohci_dumpregs(sc);
647 1.1 augustss #endif
648 1.1 augustss
649 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
650 1.1 augustss
651 1.1 augustss /* Set up HC registers. */
652 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
653 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
654 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
655 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
656 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
657 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
658 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
659 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
660 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
661 1.1 augustss /* And finally start it! */
662 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
663 1.1 augustss
664 1.1 augustss /*
665 1.1 augustss * The controller is now OPERATIONAL. Set a some final
666 1.1 augustss * registers that should be set earlier, but that the
667 1.1 augustss * controller ignores when in the SUSPEND state.
668 1.1 augustss */
669 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
670 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
671 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
672 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
673 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
674 1.1 augustss
675 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
676 1.1 augustss
677 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
678 1.1 augustss
679 1.52 augustss #ifdef OHCI_DEBUG
680 1.1 augustss if (ohcidebug > 5)
681 1.1 augustss ohci_dumpregs(sc);
682 1.1 augustss #endif
683 1.1 augustss
684 1.1 augustss /* Set up the bus struct. */
685 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
686 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
687 1.1 augustss
688 1.47 augustss sc->sc_powerhook = powerhook_establish(ohci_power, sc);
689 1.33 augustss
690 1.1 augustss return (USBD_NORMAL_COMPLETION);
691 1.1 augustss
692 1.1 augustss bad3:
693 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
694 1.1 augustss bad2:
695 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
696 1.1 augustss bad1:
697 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
698 1.53 augustss return (err);
699 1.1 augustss }
700 1.1 augustss
701 1.42 augustss usbd_status
702 1.42 augustss ohci_allocm(bus, dma, size)
703 1.42 augustss struct usbd_bus *bus;
704 1.42 augustss usb_dma_t *dma;
705 1.42 augustss u_int32_t size;
706 1.42 augustss {
707 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
708 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
709 1.52 augustss #endif
710 1.42 augustss
711 1.44 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
712 1.42 augustss }
713 1.42 augustss
714 1.42 augustss void
715 1.42 augustss ohci_freem(bus, dma)
716 1.42 augustss struct usbd_bus *bus;
717 1.42 augustss usb_dma_t *dma;
718 1.42 augustss {
719 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
720 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
721 1.52 augustss #endif
722 1.42 augustss
723 1.44 augustss usb_freemem(&sc->sc_bus, dma);
724 1.42 augustss }
725 1.42 augustss
726 1.52 augustss #if defined(__NetBSD__)
727 1.33 augustss void
728 1.33 augustss ohci_power(why, v)
729 1.33 augustss int why;
730 1.33 augustss void *v;
731 1.33 augustss {
732 1.52 augustss #ifdef OHCI_DEBUG
733 1.33 augustss ohci_softc_t *sc = v;
734 1.33 augustss
735 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
736 1.33 augustss /* XXX should suspend/resume */
737 1.33 augustss ohci_dumpregs(sc);
738 1.33 augustss #endif
739 1.33 augustss }
740 1.52 augustss #endif /* defined(__NetBSD__) */
741 1.33 augustss
742 1.52 augustss #ifdef OHCI_DEBUG
743 1.1 augustss void ohcidump(void);
744 1.1 augustss void ohcidump(void) { ohci_dumpregs(thesc); }
745 1.1 augustss
746 1.1 augustss void
747 1.1 augustss ohci_dumpregs(sc)
748 1.1 augustss ohci_softc_t *sc;
749 1.1 augustss {
750 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
751 1.41 augustss OREAD4(sc, OHCI_REVISION),
752 1.41 augustss OREAD4(sc, OHCI_CONTROL),
753 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
754 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
755 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
756 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
757 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
758 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
759 1.41 augustss OREAD4(sc, OHCI_HCCA),
760 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
761 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
762 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
763 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
764 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
765 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
766 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
767 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
768 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
769 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
770 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
771 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
772 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
773 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
774 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
775 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
776 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
777 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
778 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
779 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
780 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
781 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
782 1.41 augustss LE(sc->sc_hcca->hcca_frame_number),
783 1.41 augustss LE(sc->sc_hcca->hcca_done_head)));
784 1.1 augustss }
785 1.1 augustss #endif
786 1.1 augustss
787 1.53 augustss int ohci_intr1 __P((ohci_softc_t *));
788 1.53 augustss
789 1.1 augustss int
790 1.1 augustss ohci_intr(p)
791 1.1 augustss void *p;
792 1.1 augustss {
793 1.1 augustss ohci_softc_t *sc = p;
794 1.53 augustss
795 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
796 1.53 augustss if (sc->sc_bus.use_polling)
797 1.53 augustss return (0);
798 1.53 augustss
799 1.53 augustss return (ohci_intr1(sc));
800 1.53 augustss }
801 1.53 augustss
802 1.53 augustss int
803 1.53 augustss ohci_intr1(sc)
804 1.53 augustss ohci_softc_t *sc;
805 1.53 augustss {
806 1.1 augustss u_int32_t intrs, eintrs;
807 1.1 augustss ohci_physaddr_t done;
808 1.1 augustss
809 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
810 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
811 1.15 augustss #ifdef DIAGNOSTIC
812 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
813 1.15 augustss #endif
814 1.15 augustss return (0);
815 1.15 augustss }
816 1.15 augustss
817 1.27 augustss intrs = 0;
818 1.16 augustss done = LE(sc->sc_hcca->hcca_done_head);
819 1.1 augustss if (done != 0) {
820 1.26 augustss sc->sc_hcca->hcca_done_head = 0;
821 1.26 augustss if (done & ~OHCI_DONE_INTRS)
822 1.26 augustss intrs = OHCI_WDH;
823 1.1 augustss if (done & OHCI_DONE_INTRS)
824 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
825 1.1 augustss } else
826 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
827 1.1 augustss if (!intrs)
828 1.1 augustss return (0);
829 1.1 augustss intrs &= ~OHCI_MIE;
830 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
831 1.1 augustss eintrs = intrs & sc->sc_eintrs;
832 1.1 augustss if (!eintrs)
833 1.1 augustss return (0);
834 1.1 augustss
835 1.45 augustss sc->sc_bus.intr_context++;
836 1.44 augustss sc->sc_bus.no_intrs++;
837 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
838 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
839 1.1 augustss (u_int)eintrs));
840 1.1 augustss
841 1.1 augustss if (eintrs & OHCI_SO) {
842 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
843 1.1 augustss /* XXX do what */
844 1.1 augustss intrs &= ~OHCI_SO;
845 1.1 augustss }
846 1.1 augustss if (eintrs & OHCI_WDH) {
847 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
848 1.1 augustss intrs &= ~OHCI_WDH;
849 1.1 augustss }
850 1.1 augustss if (eintrs & OHCI_RD) {
851 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
852 1.1 augustss /* XXX process resume detect */
853 1.1 augustss }
854 1.1 augustss if (eintrs & OHCI_UE) {
855 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
856 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
857 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
858 1.1 augustss /* XXX what else */
859 1.1 augustss }
860 1.1 augustss if (eintrs & OHCI_RHSC) {
861 1.53 augustss ohci_rhsc(sc, sc->sc_intrxfer);
862 1.1 augustss intrs &= ~OHCI_RHSC;
863 1.1 augustss
864 1.1 augustss /*
865 1.1 augustss * Disable RHSC interrupt for now, because it will be
866 1.1 augustss * on until the port has been reset.
867 1.1 augustss */
868 1.1 augustss ohci_rhsc_able(sc, 0);
869 1.1 augustss }
870 1.1 augustss
871 1.45 augustss sc->sc_bus.intr_context--;
872 1.44 augustss
873 1.1 augustss /* Block unprocessed interrupts. XXX */
874 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
875 1.1 augustss sc->sc_eintrs &= ~intrs;
876 1.1 augustss
877 1.1 augustss return (1);
878 1.1 augustss }
879 1.1 augustss
880 1.1 augustss void
881 1.1 augustss ohci_rhsc_able(sc, on)
882 1.1 augustss ohci_softc_t *sc;
883 1.1 augustss int on;
884 1.1 augustss {
885 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
886 1.1 augustss if (on) {
887 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
888 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
889 1.1 augustss } else {
890 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
891 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
892 1.1 augustss }
893 1.1 augustss }
894 1.1 augustss
895 1.52 augustss #ifdef OHCI_DEBUG
896 1.13 augustss char *ohci_cc_strs[] = {
897 1.13 augustss "NO_ERROR",
898 1.13 augustss "CRC",
899 1.13 augustss "BIT_STUFFING",
900 1.13 augustss "DATA_TOGGLE_MISMATCH",
901 1.13 augustss "STALL",
902 1.13 augustss "DEVICE_NOT_RESPONDING",
903 1.13 augustss "PID_CHECK_FAILURE",
904 1.13 augustss "UNEXPECTED_PID",
905 1.13 augustss "DATA_OVERRUN",
906 1.13 augustss "DATA_UNDERRUN",
907 1.13 augustss "BUFFER_OVERRUN",
908 1.13 augustss "BUFFER_UNDERRUN",
909 1.13 augustss "NOT_ACCESSED",
910 1.13 augustss };
911 1.13 augustss #endif
912 1.13 augustss
913 1.1 augustss void
914 1.1 augustss ohci_process_done(sc, done)
915 1.1 augustss ohci_softc_t *sc;
916 1.1 augustss ohci_physaddr_t done;
917 1.1 augustss {
918 1.48 augustss ohci_soft_td_t *std, *sdone, *stdnext;
919 1.53 augustss usbd_xfer_handle xfer;
920 1.1 augustss int len, cc;
921 1.1 augustss
922 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
923 1.1 augustss
924 1.1 augustss /* Reverse the done list. */
925 1.39 augustss for (sdone = 0; done; done = LE(std->td.td_nexttd)) {
926 1.1 augustss std = ohci_hash_find_td(sc, done);
927 1.1 augustss std->dnext = sdone;
928 1.1 augustss sdone = std;
929 1.1 augustss }
930 1.1 augustss
931 1.52 augustss #ifdef OHCI_DEBUG
932 1.1 augustss if (ohcidebug > 10) {
933 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
934 1.1 augustss ohci_dump_tds(sdone);
935 1.1 augustss }
936 1.1 augustss #endif
937 1.1 augustss
938 1.48 augustss for (std = sdone; std; std = stdnext) {
939 1.53 augustss xfer = std->xfer;
940 1.48 augustss stdnext = std->dnext;
941 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
942 1.53 augustss std, xfer, xfer->hcpriv));
943 1.39 augustss cc = OHCI_TD_GET_CC(LE(std->td.td_flags));
944 1.53 augustss usb_untimeout(ohci_timeout, xfer, xfer->timo_handle);
945 1.53 augustss if (xfer->status == USBD_CANCELLED ||
946 1.53 augustss xfer->status == USBD_TIMEOUT) {
947 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
948 1.53 augustss xfer));
949 1.38 augustss /* Handled by abort routine. */
950 1.34 augustss } else if (cc == OHCI_CC_NO_ERROR) {
951 1.34 augustss len = std->len;
952 1.39 augustss if (std->td.td_cbp != 0)
953 1.39 augustss len -= LE(std->td.td_be) -
954 1.39 augustss LE(std->td.td_cbp) + 1;
955 1.48 augustss if (std->flags & OHCI_ADD_LEN)
956 1.53 augustss xfer->actlen += len;
957 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
958 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
959 1.53 augustss usb_transfer_complete(xfer);
960 1.21 augustss }
961 1.48 augustss ohci_hash_rem_td(sc, std);
962 1.48 augustss ohci_free_std(sc, std);
963 1.1 augustss } else {
964 1.48 augustss /*
965 1.48 augustss * Endpoint is halted. First unlink all the TDs
966 1.48 augustss * belonging to the failed transfer, and then restart
967 1.48 augustss * the endpoint.
968 1.48 augustss */
969 1.1 augustss ohci_soft_td_t *p, *n;
970 1.1 augustss struct ohci_pipe *opipe =
971 1.53 augustss (struct ohci_pipe *)xfer->pipe;
972 1.48 augustss
973 1.13 augustss DPRINTFN(-1,("ohci_process_done: error cc=%d (%s)\n",
974 1.53 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
975 1.53 augustss ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))]));
976 1.48 augustss
977 1.48 augustss /* remove TDs */
978 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
979 1.1 augustss n = p->nexttd;
980 1.1 augustss ohci_hash_rem_td(sc, p);
981 1.1 augustss ohci_free_std(sc, p);
982 1.1 augustss }
983 1.48 augustss
984 1.16 augustss /* clear halt */
985 1.39 augustss opipe->sed->ed.ed_headp = LE(p->physaddr);
986 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
987 1.48 augustss
988 1.1 augustss if (cc == OHCI_CC_STALL)
989 1.53 augustss xfer->status = USBD_STALLED;
990 1.1 augustss else
991 1.53 augustss xfer->status = USBD_IOERROR;
992 1.53 augustss usb_transfer_complete(xfer);
993 1.1 augustss }
994 1.1 augustss }
995 1.1 augustss }
996 1.1 augustss
997 1.1 augustss void
998 1.53 augustss ohci_device_ctrl_done(xfer)
999 1.53 augustss usbd_xfer_handle xfer;
1000 1.1 augustss {
1001 1.53 augustss DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer));
1002 1.1 augustss
1003 1.38 augustss #ifdef DIAGNOSTIC
1004 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1005 1.8 augustss panic("ohci_ctrl_done: not a request\n");
1006 1.1 augustss }
1007 1.38 augustss #endif
1008 1.53 augustss xfer->hcpriv = 0;
1009 1.1 augustss }
1010 1.1 augustss
1011 1.1 augustss void
1012 1.53 augustss ohci_device_intr_done(xfer)
1013 1.53 augustss usbd_xfer_handle xfer;
1014 1.1 augustss {
1015 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1016 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1017 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1018 1.48 augustss ohci_soft_td_t *data, *tail;
1019 1.1 augustss
1020 1.1 augustss
1021 1.53 augustss DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n",
1022 1.53 augustss xfer, xfer->actlen));
1023 1.1 augustss
1024 1.53 augustss xfer->hcpriv = 0;
1025 1.38 augustss
1026 1.53 augustss if (xfer->pipe->repeat) {
1027 1.48 augustss data = opipe->tail;
1028 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1029 1.53 augustss if (tail == NULL) {
1030 1.53 augustss xfer->status = USBD_NOMEM;
1031 1.1 augustss return;
1032 1.1 augustss }
1033 1.53 augustss tail->xfer = 0;
1034 1.1 augustss
1035 1.48 augustss data->td.td_flags = LE(
1036 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1037 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1038 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1039 1.48 augustss data->td.td_flags |= LE(OHCI_TD_R);
1040 1.53 augustss data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf));
1041 1.48 augustss data->nexttd = tail;
1042 1.48 augustss data->td.td_nexttd = LE(tail->physaddr);
1043 1.53 augustss data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1);
1044 1.53 augustss data->len = xfer->length;
1045 1.53 augustss data->xfer = xfer;
1046 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1047 1.53 augustss xfer->hcpriv = data;
1048 1.53 augustss xfer->actlen = 0;
1049 1.1 augustss
1050 1.48 augustss ohci_hash_add_td(sc, data);
1051 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1052 1.1 augustss opipe->tail = tail;
1053 1.1 augustss }
1054 1.1 augustss }
1055 1.1 augustss
1056 1.1 augustss void
1057 1.53 augustss ohci_device_bulk_done(xfer)
1058 1.53 augustss usbd_xfer_handle xfer;
1059 1.3 augustss {
1060 1.53 augustss DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n",
1061 1.53 augustss xfer, xfer->actlen));
1062 1.3 augustss
1063 1.53 augustss xfer->hcpriv = NULL;
1064 1.3 augustss }
1065 1.3 augustss
1066 1.3 augustss void
1067 1.53 augustss ohci_rhsc(sc, xfer)
1068 1.1 augustss ohci_softc_t *sc;
1069 1.53 augustss usbd_xfer_handle xfer;
1070 1.1 augustss {
1071 1.1 augustss usbd_pipe_handle pipe;
1072 1.1 augustss struct ohci_pipe *opipe;
1073 1.1 augustss u_char *p;
1074 1.1 augustss int i, m;
1075 1.1 augustss int hstatus;
1076 1.1 augustss
1077 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1078 1.53 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1079 1.53 augustss sc, xfer, hstatus));
1080 1.1 augustss
1081 1.53 augustss if (xfer == NULL) {
1082 1.1 augustss /* Just ignore the change. */
1083 1.1 augustss return;
1084 1.1 augustss }
1085 1.1 augustss
1086 1.53 augustss pipe = xfer->pipe;
1087 1.1 augustss opipe = (struct ohci_pipe *)pipe;
1088 1.1 augustss
1089 1.53 augustss p = KERNADDR(&xfer->dmabuf);
1090 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1091 1.53 augustss memset(p, 0, xfer->length);
1092 1.1 augustss for (i = 1; i <= m; i++) {
1093 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1094 1.1 augustss p[i/8] |= 1 << (i%8);
1095 1.1 augustss }
1096 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1097 1.53 augustss xfer->actlen = xfer->length;
1098 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1099 1.1 augustss
1100 1.53 augustss usb_transfer_complete(xfer);
1101 1.38 augustss }
1102 1.38 augustss
1103 1.38 augustss void
1104 1.53 augustss ohci_root_intr_done(xfer)
1105 1.53 augustss usbd_xfer_handle xfer;
1106 1.38 augustss {
1107 1.53 augustss xfer->hcpriv = NULL;
1108 1.1 augustss }
1109 1.1 augustss
1110 1.1 augustss /*
1111 1.1 augustss * Wait here until controller claims to have an interrupt.
1112 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1113 1.1 augustss * too long.
1114 1.1 augustss */
1115 1.1 augustss void
1116 1.53 augustss ohci_waitintr(sc, xfer)
1117 1.1 augustss ohci_softc_t *sc;
1118 1.53 augustss usbd_xfer_handle xfer;
1119 1.1 augustss {
1120 1.53 augustss int timo = xfer->timeout;
1121 1.1 augustss int usecs;
1122 1.1 augustss u_int32_t intrs;
1123 1.1 augustss
1124 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1125 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1126 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1127 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1128 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1129 1.52 augustss #ifdef OHCI_DEBUG
1130 1.1 augustss if (ohcidebug > 15)
1131 1.1 augustss ohci_dumpregs(sc);
1132 1.1 augustss #endif
1133 1.1 augustss if (intrs) {
1134 1.53 augustss ohci_intr1(sc);
1135 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1136 1.1 augustss return;
1137 1.1 augustss }
1138 1.1 augustss }
1139 1.15 augustss
1140 1.15 augustss /* Timeout */
1141 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1142 1.53 augustss xfer->status = USBD_TIMEOUT;
1143 1.53 augustss usb_transfer_complete(xfer);
1144 1.15 augustss /* XXX should free TD */
1145 1.5 augustss }
1146 1.5 augustss
1147 1.5 augustss void
1148 1.5 augustss ohci_poll(bus)
1149 1.5 augustss struct usbd_bus *bus;
1150 1.5 augustss {
1151 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1152 1.5 augustss
1153 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1154 1.53 augustss ohci_intr1(sc);
1155 1.1 augustss }
1156 1.1 augustss
1157 1.1 augustss usbd_status
1158 1.53 augustss ohci_device_request(xfer)
1159 1.53 augustss usbd_xfer_handle xfer;
1160 1.1 augustss {
1161 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1162 1.53 augustss usb_device_request_t *req = &xfer->request;
1163 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1164 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1165 1.1 augustss int addr = dev->address;
1166 1.48 augustss ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail;
1167 1.1 augustss ohci_soft_ed_t *sed;
1168 1.1 augustss int isread;
1169 1.1 augustss int len;
1170 1.53 augustss usbd_status err;
1171 1.1 augustss int s;
1172 1.1 augustss
1173 1.1 augustss isread = req->bmRequestType & UT_READ;
1174 1.1 augustss len = UGETW(req->wLength);
1175 1.1 augustss
1176 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1177 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1178 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1179 1.1 augustss UGETW(req->wIndex), len, addr,
1180 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1181 1.1 augustss
1182 1.1 augustss setup = opipe->tail;
1183 1.1 augustss stat = ohci_alloc_std(sc);
1184 1.53 augustss if (stat == NULL) {
1185 1.53 augustss err = USBD_NOMEM;
1186 1.1 augustss goto bad1;
1187 1.1 augustss }
1188 1.1 augustss tail = ohci_alloc_std(sc);
1189 1.53 augustss if (tail == NULL) {
1190 1.53 augustss err = USBD_NOMEM;
1191 1.1 augustss goto bad2;
1192 1.1 augustss }
1193 1.53 augustss tail->xfer = 0;
1194 1.1 augustss
1195 1.1 augustss sed = opipe->sed;
1196 1.1 augustss opipe->u.ctl.length = len;
1197 1.1 augustss
1198 1.10 augustss /* Update device address and length since they may have changed. */
1199 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1200 1.39 augustss sed->ed.ed_flags = LE(
1201 1.39 augustss (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1202 1.16 augustss OHCI_ED_SET_FA(addr) |
1203 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1204 1.1 augustss
1205 1.1 augustss /* Set up data transaction */
1206 1.1 augustss if (len != 0) {
1207 1.48 augustss data = ohci_alloc_std(sc);
1208 1.53 augustss if (data == NULL) {
1209 1.53 augustss err = USBD_NOMEM;
1210 1.1 augustss goto bad3;
1211 1.1 augustss }
1212 1.48 augustss data->td.td_flags = LE(
1213 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1214 1.19 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1215 1.53 augustss (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1216 1.53 augustss data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf));
1217 1.48 augustss data->nexttd = stat;
1218 1.48 augustss data->td.td_nexttd = LE(stat->physaddr);
1219 1.48 augustss data->td.td_be = LE(LE(data->td.td_cbp) + len - 1);
1220 1.48 augustss data->len = len;
1221 1.53 augustss data->xfer = xfer;
1222 1.48 augustss data->flags = OHCI_ADD_LEN;
1223 1.1 augustss
1224 1.48 augustss next = data;
1225 1.34 augustss stat->flags = OHCI_CALL_DONE;
1226 1.34 augustss } else {
1227 1.1 augustss next = stat;
1228 1.48 augustss /* XXX ADD_LEN? */
1229 1.48 augustss stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1230 1.34 augustss }
1231 1.1 augustss
1232 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1233 1.1 augustss
1234 1.39 augustss setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1235 1.16 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1236 1.39 augustss setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1237 1.1 augustss setup->nexttd = next;
1238 1.39 augustss setup->td.td_nexttd = LE(next->physaddr);
1239 1.39 augustss setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1);
1240 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
1241 1.53 augustss setup->xfer = xfer;
1242 1.34 augustss setup->flags = 0;
1243 1.53 augustss xfer->hcpriv = setup;
1244 1.1 augustss
1245 1.39 augustss stat->td.td_flags = LE(
1246 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1247 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1248 1.39 augustss stat->td.td_cbp = 0;
1249 1.1 augustss stat->nexttd = tail;
1250 1.39 augustss stat->td.td_nexttd = LE(tail->physaddr);
1251 1.39 augustss stat->td.td_be = 0;
1252 1.1 augustss stat->len = 0;
1253 1.53 augustss stat->xfer = xfer;
1254 1.1 augustss
1255 1.52 augustss #ifdef OHCI_DEBUG
1256 1.1 augustss if (ohcidebug > 5) {
1257 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1258 1.1 augustss ohci_dump_ed(sed);
1259 1.1 augustss ohci_dump_tds(setup);
1260 1.1 augustss }
1261 1.1 augustss #endif
1262 1.1 augustss
1263 1.1 augustss /* Insert ED in schedule */
1264 1.1 augustss s = splusb();
1265 1.1 augustss ohci_hash_add_td(sc, setup);
1266 1.1 augustss if (len != 0)
1267 1.48 augustss ohci_hash_add_td(sc, data);
1268 1.1 augustss ohci_hash_add_td(sc, stat);
1269 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1270 1.1 augustss opipe->tail = tail;
1271 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1272 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1273 1.53 augustss usb_timeout(ohci_timeout, xfer,
1274 1.53 augustss MS_TO_TICKS(xfer->timeout), xfer->timo_handle);
1275 1.15 augustss }
1276 1.1 augustss splx(s);
1277 1.1 augustss
1278 1.52 augustss #ifdef OHCI_DEBUG
1279 1.1 augustss if (ohcidebug > 5) {
1280 1.1 augustss delay(5000);
1281 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1282 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1283 1.1 augustss ohci_dump_ed(sed);
1284 1.1 augustss ohci_dump_tds(setup);
1285 1.1 augustss }
1286 1.1 augustss #endif
1287 1.1 augustss
1288 1.1 augustss return (USBD_NORMAL_COMPLETION);
1289 1.1 augustss
1290 1.1 augustss bad3:
1291 1.1 augustss ohci_free_std(sc, tail);
1292 1.1 augustss bad2:
1293 1.1 augustss ohci_free_std(sc, stat);
1294 1.1 augustss bad1:
1295 1.53 augustss return (err);
1296 1.1 augustss }
1297 1.1 augustss
1298 1.1 augustss /*
1299 1.1 augustss * Add an ED to the schedule. Called at splusb().
1300 1.1 augustss */
1301 1.1 augustss void
1302 1.3 augustss ohci_add_ed(sed, head)
1303 1.1 augustss ohci_soft_ed_t *sed;
1304 1.1 augustss ohci_soft_ed_t *head;
1305 1.1 augustss {
1306 1.46 augustss SPLUSBCHECK;
1307 1.1 augustss sed->next = head->next;
1308 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1309 1.1 augustss head->next = sed;
1310 1.39 augustss head->ed.ed_nexted = LE(sed->physaddr);
1311 1.1 augustss }
1312 1.1 augustss
1313 1.1 augustss /*
1314 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1315 1.3 augustss */
1316 1.3 augustss void
1317 1.3 augustss ohci_rem_ed(sed, head)
1318 1.3 augustss ohci_soft_ed_t *sed;
1319 1.3 augustss ohci_soft_ed_t *head;
1320 1.3 augustss {
1321 1.3 augustss ohci_soft_ed_t *p;
1322 1.3 augustss
1323 1.46 augustss SPLUSBCHECK;
1324 1.46 augustss
1325 1.3 augustss /* XXX */
1326 1.3 augustss for (p = head; p && p->next != sed; p = p->next)
1327 1.3 augustss ;
1328 1.3 augustss if (!p)
1329 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1330 1.3 augustss p->next = sed->next;
1331 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1332 1.3 augustss }
1333 1.3 augustss
1334 1.3 augustss /*
1335 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1336 1.1 augustss * the host controller. This queue is the processed by software.
1337 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1338 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1339 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1340 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1341 1.1 augustss * hash value.
1342 1.1 augustss */
1343 1.1 augustss
1344 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1345 1.1 augustss /* Called at splusb() */
1346 1.1 augustss void
1347 1.1 augustss ohci_hash_add_td(sc, std)
1348 1.1 augustss ohci_softc_t *sc;
1349 1.1 augustss ohci_soft_td_t *std;
1350 1.1 augustss {
1351 1.1 augustss int h = HASH(std->physaddr);
1352 1.1 augustss
1353 1.46 augustss SPLUSBCHECK;
1354 1.46 augustss
1355 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1356 1.1 augustss }
1357 1.1 augustss
1358 1.1 augustss /* Called at splusb() */
1359 1.1 augustss void
1360 1.1 augustss ohci_hash_rem_td(sc, std)
1361 1.1 augustss ohci_softc_t *sc;
1362 1.1 augustss ohci_soft_td_t *std;
1363 1.1 augustss {
1364 1.46 augustss SPLUSBCHECK;
1365 1.46 augustss
1366 1.1 augustss LIST_REMOVE(std, hnext);
1367 1.1 augustss }
1368 1.1 augustss
1369 1.1 augustss ohci_soft_td_t *
1370 1.1 augustss ohci_hash_find_td(sc, a)
1371 1.1 augustss ohci_softc_t *sc;
1372 1.1 augustss ohci_physaddr_t a;
1373 1.1 augustss {
1374 1.1 augustss int h = HASH(a);
1375 1.1 augustss ohci_soft_td_t *std;
1376 1.1 augustss
1377 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1378 1.53 augustss std != NULL;
1379 1.1 augustss std = LIST_NEXT(std, hnext))
1380 1.1 augustss if (std->physaddr == a)
1381 1.1 augustss return (std);
1382 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1383 1.1 augustss }
1384 1.1 augustss
1385 1.1 augustss void
1386 1.1 augustss ohci_timeout(addr)
1387 1.1 augustss void *addr;
1388 1.1 augustss {
1389 1.53 augustss usbd_xfer_handle xfer = addr;
1390 1.48 augustss int s;
1391 1.1 augustss
1392 1.53 augustss DPRINTF(("ohci_timeout: xfer=%p\n", xfer));
1393 1.45 augustss
1394 1.48 augustss s = splusb();
1395 1.53 augustss xfer->device->bus->intr_context++;
1396 1.53 augustss ohci_abort_req(xfer, USBD_TIMEOUT);
1397 1.53 augustss xfer->device->bus->intr_context--;
1398 1.48 augustss splx(s);
1399 1.1 augustss }
1400 1.1 augustss
1401 1.52 augustss #ifdef OHCI_DEBUG
1402 1.1 augustss void
1403 1.1 augustss ohci_dump_tds(std)
1404 1.1 augustss ohci_soft_td_t *std;
1405 1.1 augustss {
1406 1.1 augustss for (; std; std = std->nexttd)
1407 1.1 augustss ohci_dump_td(std);
1408 1.1 augustss }
1409 1.1 augustss
1410 1.1 augustss void
1411 1.1 augustss ohci_dump_td(std)
1412 1.1 augustss ohci_soft_td_t *std;
1413 1.1 augustss {
1414 1.41 augustss DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1415 1.41 augustss "nexttd=0x%08lx be=0x%08lx\n",
1416 1.41 augustss std, (u_long)std->physaddr,
1417 1.41 augustss (int)LE(std->td.td_flags),
1418 1.41 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1419 1.41 augustss OHCI_TD_GET_DI(LE(std->td.td_flags)),
1420 1.41 augustss OHCI_TD_GET_EC(LE(std->td.td_flags)),
1421 1.41 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
1422 1.41 augustss (u_long)LE(std->td.td_cbp),
1423 1.41 augustss (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be)));
1424 1.1 augustss }
1425 1.1 augustss
1426 1.1 augustss void
1427 1.1 augustss ohci_dump_ed(sed)
1428 1.1 augustss ohci_soft_ed_t *sed;
1429 1.1 augustss {
1430 1.41 augustss DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1431 1.41 augustss "headp=%b nexted=0x%08lx\n",
1432 1.41 augustss sed, (u_long)sed->physaddr,
1433 1.41 augustss OHCI_ED_GET_FA(LE(sed->ed.ed_flags)),
1434 1.41 augustss OHCI_ED_GET_EN(LE(sed->ed.ed_flags)),
1435 1.41 augustss OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)),
1436 1.41 augustss (int)LE(sed->ed.ed_flags),
1437 1.41 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1438 1.41 augustss (u_long)LE(sed->ed.ed_tailp),
1439 1.52 augustss (u_long)LE(sed->ed.ed_headp),
1440 1.52 augustss "\20\1HALT\2CARRY",
1441 1.41 augustss (u_long)LE(sed->ed.ed_nexted)));
1442 1.1 augustss }
1443 1.1 augustss #endif
1444 1.1 augustss
1445 1.1 augustss usbd_status
1446 1.1 augustss ohci_open(pipe)
1447 1.1 augustss usbd_pipe_handle pipe;
1448 1.1 augustss {
1449 1.1 augustss usbd_device_handle dev = pipe->device;
1450 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1451 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1452 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1453 1.1 augustss u_int8_t addr = dev->address;
1454 1.1 augustss ohci_soft_ed_t *sed;
1455 1.1 augustss ohci_soft_td_t *std;
1456 1.53 augustss usbd_status err;
1457 1.1 augustss int s;
1458 1.1 augustss
1459 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1460 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1461 1.1 augustss if (addr == sc->sc_addr) {
1462 1.1 augustss switch (ed->bEndpointAddress) {
1463 1.1 augustss case USB_CONTROL_ENDPOINT:
1464 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1465 1.1 augustss break;
1466 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
1467 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1468 1.1 augustss break;
1469 1.1 augustss default:
1470 1.1 augustss return (USBD_INVAL);
1471 1.1 augustss }
1472 1.1 augustss } else {
1473 1.1 augustss sed = ohci_alloc_sed(sc);
1474 1.53 augustss if (sed == NULL)
1475 1.1 augustss goto bad0;
1476 1.1 augustss std = ohci_alloc_std(sc);
1477 1.53 augustss if (std == NULL)
1478 1.1 augustss goto bad1;
1479 1.1 augustss opipe->sed = sed;
1480 1.1 augustss opipe->tail = std;
1481 1.39 augustss sed->ed.ed_flags = LE(
1482 1.1 augustss OHCI_ED_SET_FA(addr) |
1483 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1484 1.1 augustss OHCI_ED_DIR_TD |
1485 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1486 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1487 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1488 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1489 1.39 augustss sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr);
1490 1.1 augustss
1491 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1492 1.1 augustss case UE_CONTROL:
1493 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1494 1.53 augustss err = usb_allocmem(&sc->sc_bus,
1495 1.53 augustss sizeof(usb_device_request_t),
1496 1.53 augustss 0, &opipe->u.ctl.reqdma);
1497 1.53 augustss if (err)
1498 1.1 augustss goto bad;
1499 1.1 augustss s = splusb();
1500 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1501 1.1 augustss splx(s);
1502 1.1 augustss break;
1503 1.1 augustss case UE_INTERRUPT:
1504 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1505 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1506 1.1 augustss case UE_ISOCHRONOUS:
1507 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1508 1.43 augustss return (USBD_INVAL);
1509 1.1 augustss case UE_BULK:
1510 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1511 1.3 augustss s = splusb();
1512 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1513 1.3 augustss splx(s);
1514 1.3 augustss break;
1515 1.1 augustss }
1516 1.1 augustss }
1517 1.1 augustss return (USBD_NORMAL_COMPLETION);
1518 1.1 augustss
1519 1.1 augustss bad:
1520 1.1 augustss ohci_free_std(sc, std);
1521 1.1 augustss bad1:
1522 1.1 augustss ohci_free_sed(sc, sed);
1523 1.1 augustss bad0:
1524 1.1 augustss return (USBD_NOMEM);
1525 1.1 augustss
1526 1.1 augustss }
1527 1.1 augustss
1528 1.1 augustss /*
1529 1.34 augustss * Close a reqular pipe.
1530 1.34 augustss * Assumes that there are no pending transactions.
1531 1.34 augustss */
1532 1.34 augustss void
1533 1.34 augustss ohci_close_pipe(pipe, head)
1534 1.34 augustss usbd_pipe_handle pipe;
1535 1.34 augustss ohci_soft_ed_t *head;
1536 1.34 augustss {
1537 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1538 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1539 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
1540 1.34 augustss int s;
1541 1.34 augustss
1542 1.34 augustss s = splusb();
1543 1.34 augustss #ifdef DIAGNOSTIC
1544 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
1545 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1546 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK))) {
1547 1.39 augustss ohci_physaddr_t td = sed->ed.ed_headp;
1548 1.34 augustss ohci_soft_td_t *std;
1549 1.34 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1550 1.53 augustss std != NULL;
1551 1.34 augustss std = LIST_NEXT(std, hnext))
1552 1.34 augustss if (std->physaddr == td)
1553 1.34 augustss break;
1554 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1555 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
1556 1.39 augustss (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp),
1557 1.34 augustss pipe, std);
1558 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
1559 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1560 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
1561 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
1562 1.34 augustss }
1563 1.34 augustss #endif
1564 1.34 augustss ohci_rem_ed(sed, head);
1565 1.34 augustss splx(s);
1566 1.34 augustss ohci_free_std(sc, opipe->tail);
1567 1.34 augustss ohci_free_sed(sc, opipe->sed);
1568 1.34 augustss }
1569 1.34 augustss
1570 1.34 augustss /*
1571 1.34 augustss * Abort a device request.
1572 1.34 augustss * If this routine is called at splusb() it guarantees that the request
1573 1.34 augustss * will be removed from the hardware scheduling and that the callback
1574 1.34 augustss * for it will be called with USBD_CANCELLED status.
1575 1.34 augustss * It's impossible to guarantee that the requested transfer will not
1576 1.34 augustss * have happened since the hardware runs concurrently.
1577 1.34 augustss * If the transaction has already happened we rely on the ordinary
1578 1.34 augustss * interrupt processing to process it.
1579 1.34 augustss */
1580 1.34 augustss void
1581 1.53 augustss ohci_abort_req(xfer, status)
1582 1.53 augustss usbd_xfer_handle xfer;
1583 1.38 augustss usbd_status status;
1584 1.34 augustss {
1585 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1586 1.34 augustss ohci_soft_ed_t *sed;
1587 1.34 augustss
1588 1.53 augustss DPRINTF(("ohci_abort_req: xfer=%p pipe=%p\n", xfer, opipe));
1589 1.34 augustss
1590 1.53 augustss xfer->status = status;
1591 1.34 augustss
1592 1.53 augustss usb_untimeout(ohci_timeout, xfer, xfer->timo_handle);
1593 1.34 augustss
1594 1.34 augustss sed = opipe->sed;
1595 1.38 augustss DPRINTFN(1,("ohci_abort_req: stop ed=%p\n", sed));
1596 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1597 1.34 augustss
1598 1.53 augustss if (xfer->device->bus->intr_context) {
1599 1.44 augustss /* We have no process context, so we can't use tsleep(). */
1600 1.53 augustss timeout(ohci_abort_req_end, xfer, hz / USB_FRAMES_PER_SECOND);
1601 1.44 augustss } else {
1602 1.38 augustss usb_delay_ms(opipe->pipe.device->bus, 1);
1603 1.53 augustss ohci_abort_req_end(xfer);
1604 1.38 augustss }
1605 1.38 augustss }
1606 1.38 augustss
1607 1.38 augustss void
1608 1.38 augustss ohci_abort_req_end(v)
1609 1.38 augustss void *v;
1610 1.38 augustss {
1611 1.53 augustss usbd_xfer_handle xfer = v;
1612 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1613 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1614 1.38 augustss ohci_soft_ed_t *sed;
1615 1.38 augustss ohci_soft_td_t *p, *n;
1616 1.38 augustss int s;
1617 1.38 augustss
1618 1.38 augustss s = splusb();
1619 1.38 augustss
1620 1.53 augustss p = xfer->hcpriv;
1621 1.34 augustss #ifdef DIAGNOSTIC
1622 1.38 augustss if (!p) {
1623 1.38 augustss printf("ohci_abort_req: hcpriv==0\n");
1624 1.38 augustss return;
1625 1.38 augustss }
1626 1.34 augustss #endif
1627 1.53 augustss for (; p->xfer == xfer; p = n) {
1628 1.38 augustss n = p->nexttd;
1629 1.38 augustss ohci_hash_rem_td(sc, p);
1630 1.38 augustss ohci_free_std(sc, p);
1631 1.34 augustss }
1632 1.34 augustss
1633 1.38 augustss sed = opipe->sed;
1634 1.38 augustss DPRINTFN(2,("ohci_abort_req: set hd=%x, tl=%x\n",
1635 1.39 augustss (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp)));
1636 1.39 augustss sed->ed.ed_headp = p->physaddr; /* unlink TDs */
1637 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1638 1.38 augustss
1639 1.53 augustss usb_transfer_complete(xfer);
1640 1.38 augustss
1641 1.34 augustss splx(s);
1642 1.34 augustss }
1643 1.34 augustss
1644 1.34 augustss /*
1645 1.1 augustss * Data structures and routines to emulate the root hub.
1646 1.1 augustss */
1647 1.53 augustss static usb_device_descriptor_t ohci_devd = {
1648 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1649 1.1 augustss UDESC_DEVICE, /* type */
1650 1.1 augustss {0x00, 0x01}, /* USB version */
1651 1.1 augustss UCLASS_HUB, /* class */
1652 1.1 augustss USUBCLASS_HUB, /* subclass */
1653 1.1 augustss 0, /* protocol */
1654 1.1 augustss 64, /* max packet */
1655 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1656 1.1 augustss 1,2,0, /* string indicies */
1657 1.1 augustss 1 /* # of configurations */
1658 1.1 augustss };
1659 1.1 augustss
1660 1.53 augustss static usb_config_descriptor_t ohci_confd = {
1661 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1662 1.1 augustss UDESC_CONFIG,
1663 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1664 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1665 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1666 1.1 augustss 1,
1667 1.1 augustss 1,
1668 1.1 augustss 0,
1669 1.1 augustss UC_SELF_POWERED,
1670 1.1 augustss 0 /* max power */
1671 1.1 augustss };
1672 1.1 augustss
1673 1.53 augustss static usb_interface_descriptor_t ohci_ifcd = {
1674 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1675 1.1 augustss UDESC_INTERFACE,
1676 1.1 augustss 0,
1677 1.1 augustss 0,
1678 1.1 augustss 1,
1679 1.1 augustss UCLASS_HUB,
1680 1.1 augustss USUBCLASS_HUB,
1681 1.1 augustss 0,
1682 1.1 augustss 0
1683 1.1 augustss };
1684 1.1 augustss
1685 1.53 augustss static usb_endpoint_descriptor_t ohci_endpd = {
1686 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1687 1.1 augustss UDESC_ENDPOINT,
1688 1.40 augustss UE_DIR_IN | OHCI_INTR_ENDPT,
1689 1.1 augustss UE_INTERRUPT,
1690 1.1 augustss {8, 0}, /* max packet */
1691 1.1 augustss 255
1692 1.1 augustss };
1693 1.1 augustss
1694 1.53 augustss static usb_hub_descriptor_t ohci_hubd = {
1695 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1696 1.1 augustss UDESC_HUB,
1697 1.1 augustss 0,
1698 1.1 augustss {0,0},
1699 1.1 augustss 0,
1700 1.1 augustss 0,
1701 1.1 augustss {0},
1702 1.1 augustss };
1703 1.1 augustss
1704 1.1 augustss int
1705 1.1 augustss ohci_str(p, l, s)
1706 1.1 augustss usb_string_descriptor_t *p;
1707 1.1 augustss int l;
1708 1.1 augustss char *s;
1709 1.1 augustss {
1710 1.1 augustss int i;
1711 1.1 augustss
1712 1.1 augustss if (l == 0)
1713 1.1 augustss return (0);
1714 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1715 1.1 augustss if (l == 1)
1716 1.1 augustss return (1);
1717 1.1 augustss p->bDescriptorType = UDESC_STRING;
1718 1.1 augustss l -= 2;
1719 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1720 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1721 1.1 augustss return (2*i+2);
1722 1.1 augustss }
1723 1.1 augustss
1724 1.1 augustss /*
1725 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1726 1.1 augustss */
1727 1.1 augustss usbd_status
1728 1.53 augustss ohci_root_ctrl_transfer(xfer)
1729 1.53 augustss usbd_xfer_handle xfer;
1730 1.1 augustss {
1731 1.53 augustss usbd_status err;
1732 1.17 augustss
1733 1.46 augustss /* Insert last in queue. */
1734 1.53 augustss err = usb_insert_transfer(xfer);
1735 1.53 augustss if (err)
1736 1.53 augustss return (err);
1737 1.46 augustss
1738 1.46 augustss /* Pipe isn't running, start first */
1739 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1740 1.17 augustss }
1741 1.17 augustss
1742 1.17 augustss usbd_status
1743 1.53 augustss ohci_root_ctrl_start(xfer)
1744 1.53 augustss usbd_xfer_handle xfer;
1745 1.17 augustss {
1746 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
1747 1.1 augustss usb_device_request_t *req;
1748 1.52 augustss void *buf = NULL;
1749 1.1 augustss int port, i;
1750 1.46 augustss int s, len, value, index, l, totlen = 0;
1751 1.1 augustss usb_port_status_t ps;
1752 1.1 augustss usb_hub_descriptor_t hubd;
1753 1.53 augustss usbd_status err;
1754 1.1 augustss u_int32_t v;
1755 1.1 augustss
1756 1.42 augustss #ifdef DIAGNOSTIC
1757 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
1758 1.1 augustss /* XXX panic */
1759 1.1 augustss return (USBD_INVAL);
1760 1.42 augustss #endif
1761 1.53 augustss req = &xfer->request;
1762 1.1 augustss
1763 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1764 1.1 augustss req->bmRequestType, req->bRequest));
1765 1.1 augustss
1766 1.1 augustss len = UGETW(req->wLength);
1767 1.1 augustss value = UGETW(req->wValue);
1768 1.1 augustss index = UGETW(req->wIndex);
1769 1.43 augustss
1770 1.43 augustss if (len != 0)
1771 1.53 augustss buf = KERNADDR(&xfer->dmabuf);
1772 1.43 augustss
1773 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1774 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1775 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1776 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1777 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1778 1.1 augustss /*
1779 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1780 1.1 augustss * for the integrated root hub.
1781 1.1 augustss */
1782 1.1 augustss break;
1783 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1784 1.1 augustss if (len > 0) {
1785 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1786 1.1 augustss totlen = 1;
1787 1.1 augustss }
1788 1.1 augustss break;
1789 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1790 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1791 1.1 augustss switch(value >> 8) {
1792 1.1 augustss case UDESC_DEVICE:
1793 1.1 augustss if ((value & 0xff) != 0) {
1794 1.53 augustss err = USBD_IOERROR;
1795 1.1 augustss goto ret;
1796 1.1 augustss }
1797 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1798 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1799 1.1 augustss memcpy(buf, &ohci_devd, l);
1800 1.1 augustss break;
1801 1.1 augustss case UDESC_CONFIG:
1802 1.1 augustss if ((value & 0xff) != 0) {
1803 1.53 augustss err = USBD_IOERROR;
1804 1.1 augustss goto ret;
1805 1.1 augustss }
1806 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1807 1.1 augustss memcpy(buf, &ohci_confd, l);
1808 1.1 augustss buf = (char *)buf + l;
1809 1.1 augustss len -= l;
1810 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1811 1.1 augustss totlen += l;
1812 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1813 1.1 augustss buf = (char *)buf + l;
1814 1.1 augustss len -= l;
1815 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1816 1.1 augustss totlen += l;
1817 1.1 augustss memcpy(buf, &ohci_endpd, l);
1818 1.1 augustss break;
1819 1.1 augustss case UDESC_STRING:
1820 1.1 augustss if (len == 0)
1821 1.1 augustss break;
1822 1.1 augustss *(u_int8_t *)buf = 0;
1823 1.1 augustss totlen = 1;
1824 1.1 augustss switch (value & 0xff) {
1825 1.1 augustss case 1: /* Vendor */
1826 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1827 1.1 augustss break;
1828 1.1 augustss case 2: /* Product */
1829 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1830 1.1 augustss break;
1831 1.1 augustss }
1832 1.1 augustss break;
1833 1.1 augustss default:
1834 1.53 augustss err = USBD_IOERROR;
1835 1.1 augustss goto ret;
1836 1.1 augustss }
1837 1.1 augustss break;
1838 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1839 1.1 augustss if (len > 0) {
1840 1.1 augustss *(u_int8_t *)buf = 0;
1841 1.1 augustss totlen = 1;
1842 1.1 augustss }
1843 1.1 augustss break;
1844 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1845 1.1 augustss if (len > 1) {
1846 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1847 1.1 augustss totlen = 2;
1848 1.1 augustss }
1849 1.1 augustss break;
1850 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1851 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1852 1.1 augustss if (len > 1) {
1853 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1854 1.1 augustss totlen = 2;
1855 1.1 augustss }
1856 1.1 augustss break;
1857 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1858 1.1 augustss if (value >= USB_MAX_DEVICES) {
1859 1.53 augustss err = USBD_IOERROR;
1860 1.1 augustss goto ret;
1861 1.1 augustss }
1862 1.1 augustss sc->sc_addr = value;
1863 1.1 augustss break;
1864 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1865 1.1 augustss if (value != 0 && value != 1) {
1866 1.53 augustss err = USBD_IOERROR;
1867 1.1 augustss goto ret;
1868 1.1 augustss }
1869 1.1 augustss sc->sc_conf = value;
1870 1.1 augustss break;
1871 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1872 1.1 augustss break;
1873 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1874 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1875 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1876 1.53 augustss err = USBD_IOERROR;
1877 1.1 augustss goto ret;
1878 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1879 1.1 augustss break;
1880 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1881 1.1 augustss break;
1882 1.1 augustss /* Hub requests */
1883 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1884 1.1 augustss break;
1885 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1886 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1887 1.14 augustss "port=%d feature=%d\n",
1888 1.1 augustss index, value));
1889 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1890 1.53 augustss err = USBD_IOERROR;
1891 1.1 augustss goto ret;
1892 1.1 augustss }
1893 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1894 1.1 augustss switch(value) {
1895 1.1 augustss case UHF_PORT_ENABLE:
1896 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1897 1.1 augustss break;
1898 1.1 augustss case UHF_PORT_SUSPEND:
1899 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1900 1.1 augustss break;
1901 1.1 augustss case UHF_PORT_POWER:
1902 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1903 1.1 augustss break;
1904 1.1 augustss case UHF_C_PORT_CONNECTION:
1905 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1906 1.1 augustss break;
1907 1.1 augustss case UHF_C_PORT_ENABLE:
1908 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1909 1.1 augustss break;
1910 1.1 augustss case UHF_C_PORT_SUSPEND:
1911 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1912 1.1 augustss break;
1913 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1914 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1915 1.1 augustss break;
1916 1.1 augustss case UHF_C_PORT_RESET:
1917 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1918 1.1 augustss break;
1919 1.1 augustss default:
1920 1.53 augustss err = USBD_IOERROR;
1921 1.1 augustss goto ret;
1922 1.1 augustss }
1923 1.1 augustss switch(value) {
1924 1.1 augustss case UHF_C_PORT_CONNECTION:
1925 1.1 augustss case UHF_C_PORT_ENABLE:
1926 1.1 augustss case UHF_C_PORT_SUSPEND:
1927 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1928 1.1 augustss case UHF_C_PORT_RESET:
1929 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1930 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1931 1.1 augustss ohci_rhsc_able(sc, 1);
1932 1.1 augustss break;
1933 1.1 augustss default:
1934 1.1 augustss break;
1935 1.1 augustss }
1936 1.1 augustss break;
1937 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1938 1.1 augustss if (value != 0) {
1939 1.53 augustss err = USBD_IOERROR;
1940 1.1 augustss goto ret;
1941 1.1 augustss }
1942 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1943 1.1 augustss hubd = ohci_hubd;
1944 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1945 1.15 augustss USETW(hubd.wHubCharacteristics,
1946 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1947 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1948 1.1 augustss /* XXX overcurrent */
1949 1.1 augustss );
1950 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1951 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1952 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1953 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
1954 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1955 1.1 augustss l = min(len, hubd.bDescLength);
1956 1.1 augustss totlen = l;
1957 1.1 augustss memcpy(buf, &hubd, l);
1958 1.1 augustss break;
1959 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
1960 1.1 augustss if (len != 4) {
1961 1.53 augustss err = USBD_IOERROR;
1962 1.1 augustss goto ret;
1963 1.1 augustss }
1964 1.1 augustss memset(buf, 0, len); /* ? XXX */
1965 1.1 augustss totlen = len;
1966 1.1 augustss break;
1967 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
1968 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
1969 1.1 augustss index));
1970 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1971 1.53 augustss err = USBD_IOERROR;
1972 1.1 augustss goto ret;
1973 1.1 augustss }
1974 1.1 augustss if (len != 4) {
1975 1.53 augustss err = USBD_IOERROR;
1976 1.1 augustss goto ret;
1977 1.1 augustss }
1978 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
1979 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
1980 1.1 augustss v));
1981 1.1 augustss USETW(ps.wPortStatus, v);
1982 1.1 augustss USETW(ps.wPortChange, v >> 16);
1983 1.1 augustss l = min(len, sizeof ps);
1984 1.1 augustss memcpy(buf, &ps, l);
1985 1.1 augustss totlen = l;
1986 1.1 augustss break;
1987 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
1988 1.53 augustss err = USBD_IOERROR;
1989 1.1 augustss goto ret;
1990 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
1991 1.1 augustss break;
1992 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
1993 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1994 1.53 augustss err = USBD_IOERROR;
1995 1.1 augustss goto ret;
1996 1.1 augustss }
1997 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1998 1.1 augustss switch(value) {
1999 1.1 augustss case UHF_PORT_ENABLE:
2000 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2001 1.1 augustss break;
2002 1.1 augustss case UHF_PORT_SUSPEND:
2003 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2004 1.1 augustss break;
2005 1.1 augustss case UHF_PORT_RESET:
2006 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2007 1.14 augustss index));
2008 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2009 1.1 augustss for (i = 0; i < 10; i++) {
2010 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
2011 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2012 1.1 augustss break;
2013 1.1 augustss }
2014 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2015 1.1 augustss index, OREAD4(sc, port)));
2016 1.1 augustss break;
2017 1.1 augustss case UHF_PORT_POWER:
2018 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2019 1.14 augustss "%d\n", index));
2020 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2021 1.1 augustss break;
2022 1.1 augustss default:
2023 1.53 augustss err = USBD_IOERROR;
2024 1.1 augustss goto ret;
2025 1.1 augustss }
2026 1.1 augustss break;
2027 1.1 augustss default:
2028 1.53 augustss err = USBD_IOERROR;
2029 1.1 augustss goto ret;
2030 1.1 augustss }
2031 1.53 augustss xfer->actlen = totlen;
2032 1.53 augustss err = USBD_NORMAL_COMPLETION;
2033 1.1 augustss ret:
2034 1.53 augustss xfer->status = err;
2035 1.46 augustss s = splusb();
2036 1.53 augustss usb_transfer_complete(xfer);
2037 1.46 augustss splx(s);
2038 1.1 augustss return (USBD_IN_PROGRESS);
2039 1.1 augustss }
2040 1.1 augustss
2041 1.1 augustss /* Abort a root control request. */
2042 1.1 augustss void
2043 1.53 augustss ohci_root_ctrl_abort(xfer)
2044 1.53 augustss usbd_xfer_handle xfer;
2045 1.1 augustss {
2046 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2047 1.1 augustss }
2048 1.1 augustss
2049 1.1 augustss /* Close the root pipe. */
2050 1.1 augustss void
2051 1.1 augustss ohci_root_ctrl_close(pipe)
2052 1.1 augustss usbd_pipe_handle pipe;
2053 1.1 augustss {
2054 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2055 1.34 augustss /* Nothing to do. */
2056 1.1 augustss }
2057 1.1 augustss
2058 1.1 augustss usbd_status
2059 1.53 augustss ohci_root_intr_transfer(xfer)
2060 1.53 augustss usbd_xfer_handle xfer;
2061 1.1 augustss {
2062 1.53 augustss usbd_status err;
2063 1.17 augustss
2064 1.46 augustss /* Insert last in queue. */
2065 1.53 augustss err = usb_insert_transfer(xfer);
2066 1.53 augustss if (err)
2067 1.53 augustss return (err);
2068 1.46 augustss
2069 1.46 augustss /* Pipe isn't running, start first */
2070 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2071 1.17 augustss }
2072 1.17 augustss
2073 1.17 augustss usbd_status
2074 1.53 augustss ohci_root_intr_start(xfer)
2075 1.53 augustss usbd_xfer_handle xfer;
2076 1.17 augustss {
2077 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2078 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2079 1.1 augustss
2080 1.53 augustss sc->sc_intrxfer = xfer;
2081 1.1 augustss
2082 1.1 augustss return (USBD_IN_PROGRESS);
2083 1.1 augustss }
2084 1.1 augustss
2085 1.3 augustss /* Abort a root interrupt request. */
2086 1.1 augustss void
2087 1.53 augustss ohci_root_intr_abort(xfer)
2088 1.53 augustss usbd_xfer_handle xfer;
2089 1.1 augustss {
2090 1.53 augustss int s;
2091 1.53 augustss
2092 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2093 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2094 1.53 augustss xfer->pipe->intrxfer = NULL;
2095 1.51 augustss }
2096 1.53 augustss xfer->status = USBD_CANCELLED;
2097 1.53 augustss s = splusb();
2098 1.53 augustss usb_transfer_complete(xfer);
2099 1.53 augustss splx(s);
2100 1.1 augustss }
2101 1.1 augustss
2102 1.1 augustss /* Close the root pipe. */
2103 1.1 augustss void
2104 1.1 augustss ohci_root_intr_close(pipe)
2105 1.1 augustss usbd_pipe_handle pipe;
2106 1.1 augustss {
2107 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2108 1.1 augustss
2109 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2110 1.34 augustss
2111 1.53 augustss sc->sc_intrxfer = NULL;
2112 1.1 augustss }
2113 1.1 augustss
2114 1.1 augustss /************************/
2115 1.1 augustss
2116 1.1 augustss usbd_status
2117 1.53 augustss ohci_device_ctrl_transfer(xfer)
2118 1.53 augustss usbd_xfer_handle xfer;
2119 1.1 augustss {
2120 1.53 augustss usbd_status err;
2121 1.17 augustss
2122 1.46 augustss /* Insert last in queue. */
2123 1.53 augustss err = usb_insert_transfer(xfer);
2124 1.53 augustss if (err)
2125 1.53 augustss return (err);
2126 1.46 augustss
2127 1.46 augustss /* Pipe isn't running, start first */
2128 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2129 1.17 augustss }
2130 1.17 augustss
2131 1.17 augustss usbd_status
2132 1.53 augustss ohci_device_ctrl_start(xfer)
2133 1.53 augustss usbd_xfer_handle xfer;
2134 1.17 augustss {
2135 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2136 1.53 augustss usbd_status err;
2137 1.1 augustss
2138 1.42 augustss #ifdef DIAGNOSTIC
2139 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2140 1.1 augustss /* XXX panic */
2141 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2142 1.1 augustss return (USBD_INVAL);
2143 1.1 augustss }
2144 1.42 augustss #endif
2145 1.1 augustss
2146 1.53 augustss err = ohci_device_request(xfer);
2147 1.53 augustss if (err)
2148 1.53 augustss return (err);
2149 1.1 augustss
2150 1.6 augustss if (sc->sc_bus.use_polling)
2151 1.53 augustss ohci_waitintr(sc, xfer);
2152 1.1 augustss return (USBD_IN_PROGRESS);
2153 1.1 augustss }
2154 1.1 augustss
2155 1.1 augustss /* Abort a device control request. */
2156 1.1 augustss void
2157 1.53 augustss ohci_device_ctrl_abort(xfer)
2158 1.53 augustss usbd_xfer_handle xfer;
2159 1.1 augustss {
2160 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2161 1.53 augustss ohci_abort_req(xfer, USBD_CANCELLED);
2162 1.1 augustss }
2163 1.1 augustss
2164 1.1 augustss /* Close a device control pipe. */
2165 1.1 augustss void
2166 1.1 augustss ohci_device_ctrl_close(pipe)
2167 1.1 augustss usbd_pipe_handle pipe;
2168 1.1 augustss {
2169 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2170 1.1 augustss
2171 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2172 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2173 1.3 augustss }
2174 1.3 augustss
2175 1.3 augustss /************************/
2176 1.37 augustss
2177 1.37 augustss void
2178 1.37 augustss ohci_device_clear_toggle(pipe)
2179 1.37 augustss usbd_pipe_handle pipe;
2180 1.37 augustss {
2181 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2182 1.37 augustss
2183 1.39 augustss opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY);
2184 1.37 augustss }
2185 1.37 augustss
2186 1.37 augustss void
2187 1.37 augustss ohci_noop(pipe)
2188 1.37 augustss usbd_pipe_handle pipe;
2189 1.37 augustss {
2190 1.37 augustss }
2191 1.3 augustss
2192 1.3 augustss usbd_status
2193 1.53 augustss ohci_device_bulk_transfer(xfer)
2194 1.53 augustss usbd_xfer_handle xfer;
2195 1.3 augustss {
2196 1.53 augustss usbd_status err;
2197 1.17 augustss
2198 1.46 augustss /* Insert last in queue. */
2199 1.53 augustss err = usb_insert_transfer(xfer);
2200 1.53 augustss if (err)
2201 1.53 augustss return (err);
2202 1.46 augustss
2203 1.46 augustss /* Pipe isn't running, start first */
2204 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2205 1.17 augustss }
2206 1.17 augustss
2207 1.17 augustss usbd_status
2208 1.53 augustss ohci_device_bulk_start(xfer)
2209 1.53 augustss usbd_xfer_handle xfer;
2210 1.17 augustss {
2211 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2212 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2213 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2214 1.3 augustss int addr = dev->address;
2215 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2216 1.3 augustss ohci_soft_ed_t *sed;
2217 1.40 augustss int s, len, isread, endpt;
2218 1.53 augustss usbd_status err;
2219 1.3 augustss
2220 1.34 augustss #ifdef DIAGNOSTIC
2221 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
2222 1.3 augustss /* XXX panic */
2223 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2224 1.3 augustss return (USBD_INVAL);
2225 1.3 augustss }
2226 1.34 augustss #endif
2227 1.3 augustss
2228 1.53 augustss len = xfer->length;
2229 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2230 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2231 1.3 augustss sed = opipe->sed;
2232 1.3 augustss
2233 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2234 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2235 1.40 augustss endpt));
2236 1.34 augustss
2237 1.32 augustss opipe->u.bulk.isread = isread;
2238 1.3 augustss opipe->u.bulk.length = len;
2239 1.3 augustss
2240 1.3 augustss /* Update device address */
2241 1.39 augustss sed->ed.ed_flags = LE(
2242 1.39 augustss (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2243 1.16 augustss OHCI_ED_SET_FA(addr));
2244 1.3 augustss
2245 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2246 1.48 augustss data = opipe->tail;
2247 1.53 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread,
2248 1.53 augustss xfer->flags & USBD_SHORT_XFER_OK,
2249 1.53 augustss &xfer->dmabuf, data, &tail);
2250 1.53 augustss if (err)
2251 1.53 augustss return (err);
2252 1.48 augustss
2253 1.53 augustss tail->xfer = NULL;
2254 1.53 augustss xfer->hcpriv = data;
2255 1.3 augustss
2256 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2257 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2258 1.48 augustss (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags),
2259 1.48 augustss (int)LE(data->td.td_cbp), (int)LE(data->td.td_be)));
2260 1.34 augustss
2261 1.52 augustss #ifdef OHCI_DEBUG
2262 1.34 augustss if (ohcidebug > 4) {
2263 1.34 augustss ohci_dump_ed(sed);
2264 1.48 augustss ohci_dump_tds(data);
2265 1.34 augustss }
2266 1.34 augustss #endif
2267 1.34 augustss
2268 1.3 augustss /* Insert ED in schedule */
2269 1.3 augustss s = splusb();
2270 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2271 1.53 augustss tdp->xfer = xfer;
2272 1.48 augustss ohci_hash_add_td(sc, tdp);
2273 1.48 augustss }
2274 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2275 1.3 augustss opipe->tail = tail;
2276 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2277 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2278 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2279 1.53 augustss usb_timeout(ohci_timeout, xfer,
2280 1.53 augustss MS_TO_TICKS(xfer->timeout), xfer->timo_handle);
2281 1.15 augustss }
2282 1.34 augustss
2283 1.52 augustss #if 0
2284 1.52 augustss /* This goes wrong if we are too slow. */
2285 1.34 augustss if (ohcidebug > 5) {
2286 1.34 augustss delay(5000);
2287 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2288 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2289 1.34 augustss ohci_dump_ed(sed);
2290 1.48 augustss ohci_dump_tds(data);
2291 1.34 augustss }
2292 1.34 augustss #endif
2293 1.34 augustss
2294 1.3 augustss splx(s);
2295 1.3 augustss
2296 1.3 augustss return (USBD_IN_PROGRESS);
2297 1.3 augustss }
2298 1.3 augustss
2299 1.3 augustss void
2300 1.53 augustss ohci_device_bulk_abort(xfer)
2301 1.53 augustss usbd_xfer_handle xfer;
2302 1.3 augustss {
2303 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2304 1.53 augustss ohci_abort_req(xfer, USBD_CANCELLED);
2305 1.3 augustss }
2306 1.3 augustss
2307 1.34 augustss /*
2308 1.34 augustss * Close a device bulk pipe.
2309 1.34 augustss */
2310 1.3 augustss void
2311 1.3 augustss ohci_device_bulk_close(pipe)
2312 1.3 augustss usbd_pipe_handle pipe;
2313 1.3 augustss {
2314 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2315 1.3 augustss
2316 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2317 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2318 1.1 augustss }
2319 1.1 augustss
2320 1.1 augustss /************************/
2321 1.1 augustss
2322 1.1 augustss usbd_status
2323 1.53 augustss ohci_device_intr_transfer(xfer)
2324 1.53 augustss usbd_xfer_handle xfer;
2325 1.17 augustss {
2326 1.53 augustss usbd_status err;
2327 1.17 augustss
2328 1.46 augustss /* Insert last in queue. */
2329 1.53 augustss err = usb_insert_transfer(xfer);
2330 1.53 augustss if (err)
2331 1.53 augustss return (err);
2332 1.46 augustss
2333 1.46 augustss /* Pipe isn't running, start first */
2334 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2335 1.17 augustss }
2336 1.17 augustss
2337 1.17 augustss usbd_status
2338 1.53 augustss ohci_device_intr_start(xfer)
2339 1.53 augustss usbd_xfer_handle xfer;
2340 1.1 augustss {
2341 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2342 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2343 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2344 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2345 1.48 augustss ohci_soft_td_t *data, *tail;
2346 1.1 augustss int len;
2347 1.1 augustss int s;
2348 1.1 augustss
2349 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2350 1.14 augustss "flags=%d priv=%p\n",
2351 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
2352 1.1 augustss
2353 1.42 augustss #ifdef DIAGNOSTIC
2354 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
2355 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2356 1.42 augustss #endif
2357 1.1 augustss
2358 1.53 augustss len = xfer->length;
2359 1.1 augustss
2360 1.48 augustss data = opipe->tail;
2361 1.1 augustss tail = ohci_alloc_std(sc);
2362 1.43 augustss if (!tail)
2363 1.43 augustss return (USBD_NOMEM);
2364 1.53 augustss tail->xfer = NULL;
2365 1.1 augustss
2366 1.48 augustss data->td.td_flags = LE(
2367 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2368 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2369 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
2370 1.48 augustss data->td.td_flags |= LE(OHCI_TD_R);
2371 1.53 augustss data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf));
2372 1.48 augustss data->nexttd = tail;
2373 1.48 augustss data->td.td_nexttd = LE(tail->physaddr);
2374 1.48 augustss data->td.td_be = LE(LE(data->td.td_cbp) + len - 1);
2375 1.48 augustss data->len = len;
2376 1.53 augustss data->xfer = xfer;
2377 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2378 1.53 augustss xfer->hcpriv = data;
2379 1.1 augustss
2380 1.52 augustss #ifdef OHCI_DEBUG
2381 1.1 augustss if (ohcidebug > 5) {
2382 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2383 1.1 augustss ohci_dump_ed(sed);
2384 1.48 augustss ohci_dump_tds(data);
2385 1.1 augustss }
2386 1.1 augustss #endif
2387 1.1 augustss
2388 1.1 augustss /* Insert ED in schedule */
2389 1.1 augustss s = splusb();
2390 1.48 augustss ohci_hash_add_td(sc, data);
2391 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2392 1.1 augustss opipe->tail = tail;
2393 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2394 1.1 augustss
2395 1.52 augustss #if 0
2396 1.52 augustss /*
2397 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
2398 1.52 augustss * because false references are followed due to the fact that the
2399 1.52 augustss * TD is gone.
2400 1.52 augustss */
2401 1.1 augustss if (ohcidebug > 5) {
2402 1.1 augustss delay(5000);
2403 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2404 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2405 1.1 augustss ohci_dump_ed(sed);
2406 1.48 augustss ohci_dump_tds(data);
2407 1.1 augustss }
2408 1.1 augustss #endif
2409 1.26 augustss splx(s);
2410 1.1 augustss
2411 1.1 augustss return (USBD_IN_PROGRESS);
2412 1.1 augustss }
2413 1.1 augustss
2414 1.1 augustss /* Abort a device control request. */
2415 1.1 augustss void
2416 1.53 augustss ohci_device_intr_abort(xfer)
2417 1.53 augustss usbd_xfer_handle xfer;
2418 1.1 augustss {
2419 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2420 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2421 1.53 augustss xfer->pipe->intrxfer = 0;
2422 1.1 augustss }
2423 1.53 augustss ohci_abort_req(xfer, USBD_CANCELLED);
2424 1.1 augustss }
2425 1.1 augustss
2426 1.1 augustss /* Close a device interrupt pipe. */
2427 1.1 augustss void
2428 1.1 augustss ohci_device_intr_close(pipe)
2429 1.1 augustss usbd_pipe_handle pipe;
2430 1.1 augustss {
2431 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2432 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2433 1.1 augustss int nslots = opipe->u.intr.nslots;
2434 1.1 augustss int pos = opipe->u.intr.pos;
2435 1.1 augustss int j;
2436 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2437 1.1 augustss int s;
2438 1.1 augustss
2439 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2440 1.1 augustss pipe, nslots, pos));
2441 1.1 augustss s = splusb();
2442 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
2443 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
2444 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
2445 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2446 1.1 augustss
2447 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2448 1.1 augustss ;
2449 1.53 augustss #ifdef DIAGNOSTIC
2450 1.53 augustss if (p == NULL)
2451 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2452 1.53 augustss #endif
2453 1.1 augustss p->next = sed->next;
2454 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
2455 1.1 augustss splx(s);
2456 1.1 augustss
2457 1.1 augustss for (j = 0; j < nslots; j++)
2458 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2459 1.1 augustss
2460 1.1 augustss ohci_free_std(sc, opipe->tail);
2461 1.1 augustss ohci_free_sed(sc, opipe->sed);
2462 1.1 augustss }
2463 1.1 augustss
2464 1.1 augustss usbd_status
2465 1.1 augustss ohci_device_setintr(sc, opipe, ival)
2466 1.1 augustss ohci_softc_t *sc;
2467 1.1 augustss struct ohci_pipe *opipe;
2468 1.1 augustss int ival;
2469 1.1 augustss {
2470 1.1 augustss int i, j, s, best;
2471 1.1 augustss u_int npoll, slow, shigh, nslots;
2472 1.1 augustss u_int bestbw, bw;
2473 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2474 1.1 augustss
2475 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2476 1.1 augustss if (ival == 0) {
2477 1.1 augustss printf("ohci_setintr: 0 interval\n");
2478 1.1 augustss return (USBD_INVAL);
2479 1.1 augustss }
2480 1.1 augustss
2481 1.1 augustss npoll = OHCI_NO_INTRS;
2482 1.1 augustss while (npoll > ival)
2483 1.1 augustss npoll /= 2;
2484 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2485 1.1 augustss
2486 1.1 augustss /*
2487 1.1 augustss * We now know which level in the tree the ED must go into.
2488 1.1 augustss * Figure out which slot has most bandwidth left over.
2489 1.1 augustss * Slots to examine:
2490 1.1 augustss * npoll
2491 1.1 augustss * 1 0
2492 1.1 augustss * 2 1 2
2493 1.1 augustss * 4 3 4 5 6
2494 1.1 augustss * 8 7 8 9 10 11 12 13 14
2495 1.1 augustss * N (N-1) .. (N-1+N-1)
2496 1.1 augustss */
2497 1.1 augustss slow = npoll-1;
2498 1.1 augustss shigh = slow + npoll;
2499 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2500 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2501 1.1 augustss bw = 0;
2502 1.1 augustss for (j = 0; j < nslots; j++)
2503 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2504 1.1 augustss if (bw < bestbw) {
2505 1.1 augustss best = i;
2506 1.1 augustss bestbw = bw;
2507 1.1 augustss }
2508 1.1 augustss }
2509 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2510 1.1 augustss best, slow, shigh, bestbw));
2511 1.1 augustss
2512 1.1 augustss s = splusb();
2513 1.1 augustss hsed = sc->sc_eds[best];
2514 1.1 augustss sed->next = hsed->next;
2515 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
2516 1.1 augustss hsed->next = sed;
2517 1.39 augustss hsed->ed.ed_nexted = LE(sed->physaddr);
2518 1.1 augustss splx(s);
2519 1.1 augustss
2520 1.1 augustss for (j = 0; j < nslots; j++)
2521 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2522 1.1 augustss opipe->u.intr.nslots = nslots;
2523 1.1 augustss opipe->u.intr.pos = best;
2524 1.1 augustss
2525 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2526 1.1 augustss return (USBD_NORMAL_COMPLETION);
2527 1.1 augustss }
2528