ohci.c revision 1.59 1 1.59 augustss /* $NetBSD: ohci.c,v 1.59 2000/01/16 10:27:51 augustss Exp $ */
2 1.55 augustss /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.11 augustss * by Lennart Augustsson (augustss (at) carlstedt.se) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Open Host Controller driver.
43 1.1 augustss *
44 1.30 augustss * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
45 1.30 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
46 1.1 augustss */
47 1.1 augustss
48 1.1 augustss #include <sys/param.h>
49 1.1 augustss #include <sys/systm.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
52 1.55 augustss #include <sys/kernel.h>
53 1.1 augustss #include <sys/device.h>
54 1.55 augustss #include <sys/select.h>
55 1.15 augustss #elif defined(__FreeBSD__)
56 1.15 augustss #include <sys/module.h>
57 1.15 augustss #include <sys/bus.h>
58 1.52 augustss #include <machine/bus_pio.h>
59 1.52 augustss #include <machine/bus_memio.h>
60 1.55 augustss #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
61 1.55 augustss #include <machine/cpu.h>
62 1.55 augustss #endif
63 1.15 augustss #endif
64 1.1 augustss #include <sys/proc.h>
65 1.1 augustss #include <sys/queue.h>
66 1.1 augustss
67 1.4 augustss #include <machine/bus.h>
68 1.16 augustss #include <machine/endian.h>
69 1.4 augustss
70 1.1 augustss #include <dev/usb/usb.h>
71 1.1 augustss #include <dev/usb/usbdi.h>
72 1.1 augustss #include <dev/usb/usbdivar.h>
73 1.38 augustss #include <dev/usb/usb_mem.h>
74 1.1 augustss #include <dev/usb/usb_quirks.h>
75 1.1 augustss
76 1.1 augustss #include <dev/usb/ohcireg.h>
77 1.1 augustss #include <dev/usb/ohcivar.h>
78 1.1 augustss
79 1.15 augustss #if defined(__FreeBSD__)
80 1.15 augustss #include <machine/clock.h>
81 1.55 augustss
82 1.15 augustss #define delay(d) DELAY(d)
83 1.15 augustss #endif
84 1.1 augustss
85 1.36 augustss #if defined(__OpenBSD__)
86 1.36 augustss struct cfdriver ohci_cd = {
87 1.36 augustss NULL, "ohci", DV_DULL
88 1.36 augustss };
89 1.36 augustss #endif
90 1.36 augustss
91 1.52 augustss #ifdef OHCI_DEBUG
92 1.52 augustss #define DPRINTF(x) if (ohcidebug) logprintf x
93 1.52 augustss #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
94 1.52 augustss int ohcidebug = 0;
95 1.52 augustss #else
96 1.52 augustss #define DPRINTF(x)
97 1.52 augustss #define DPRINTFN(n,x)
98 1.52 augustss #endif
99 1.52 augustss
100 1.16 augustss /*
101 1.16 augustss * The OHCI controller is little endian, so on big endian machines
102 1.16 augustss * the data strored in memory needs to be swapped.
103 1.16 augustss */
104 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
105 1.16 augustss #define LE(x) (bswap32(x))
106 1.16 augustss #else
107 1.16 augustss #define LE(x) (x)
108 1.16 augustss #endif
109 1.16 augustss
110 1.1 augustss struct ohci_pipe;
111 1.1 augustss
112 1.53 augustss static ohci_soft_ed_t *ohci_alloc_sed __P((ohci_softc_t *));
113 1.53 augustss static void ohci_free_sed __P((ohci_softc_t *, ohci_soft_ed_t *));
114 1.1 augustss
115 1.53 augustss static ohci_soft_td_t *ohci_alloc_std __P((ohci_softc_t *));
116 1.53 augustss static void ohci_free_std __P((ohci_softc_t *, ohci_soft_td_t *));
117 1.1 augustss
118 1.53 augustss #if 0
119 1.53 augustss static void ohci_free_std_chain __P((ohci_softc_t *,
120 1.53 augustss ohci_soft_td_t *, ohci_soft_td_t *));
121 1.53 augustss #endif
122 1.53 augustss static usbd_status ohci_alloc_std_chain __P((struct ohci_pipe *,
123 1.53 augustss ohci_softc_t *, int, int, int, usb_dma_t *,
124 1.53 augustss ohci_soft_td_t *, ohci_soft_td_t **));
125 1.53 augustss
126 1.59 augustss static void ohci_shutdown __P((void *v));
127 1.53 augustss static void ohci_power __P((int, void *));
128 1.53 augustss static usbd_status ohci_open __P((usbd_pipe_handle));
129 1.53 augustss static void ohci_poll __P((struct usbd_bus *));
130 1.53 augustss static void ohci_waitintr __P((ohci_softc_t *,
131 1.53 augustss usbd_xfer_handle));
132 1.53 augustss static void ohci_rhsc __P((ohci_softc_t *, usbd_xfer_handle));
133 1.53 augustss static void ohci_process_done __P((ohci_softc_t *,
134 1.53 augustss ohci_physaddr_t));
135 1.53 augustss
136 1.53 augustss static usbd_status ohci_device_request __P((usbd_xfer_handle xfer));
137 1.53 augustss static void ohci_add_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
138 1.53 augustss static void ohci_rem_ed __P((ohci_soft_ed_t *, ohci_soft_ed_t *));
139 1.53 augustss static void ohci_hash_add_td __P((ohci_softc_t *,
140 1.53 augustss ohci_soft_td_t *));
141 1.53 augustss static void ohci_hash_rem_td __P((ohci_softc_t *,
142 1.53 augustss ohci_soft_td_t *));
143 1.53 augustss static ohci_soft_td_t *ohci_hash_find_td __P((ohci_softc_t *,
144 1.53 augustss ohci_physaddr_t));
145 1.53 augustss
146 1.53 augustss static usbd_status ohci_allocm __P((struct usbd_bus *, usb_dma_t *,
147 1.53 augustss u_int32_t));
148 1.53 augustss static void ohci_freem __P((struct usbd_bus *, usb_dma_t *));
149 1.53 augustss
150 1.53 augustss static usbd_status ohci_root_ctrl_transfer __P((usbd_xfer_handle));
151 1.53 augustss static usbd_status ohci_root_ctrl_start __P((usbd_xfer_handle));
152 1.53 augustss static void ohci_root_ctrl_abort __P((usbd_xfer_handle));
153 1.53 augustss static void ohci_root_ctrl_close __P((usbd_pipe_handle));
154 1.53 augustss
155 1.53 augustss static usbd_status ohci_root_intr_transfer __P((usbd_xfer_handle));
156 1.53 augustss static usbd_status ohci_root_intr_start __P((usbd_xfer_handle));
157 1.53 augustss static void ohci_root_intr_abort __P((usbd_xfer_handle));
158 1.53 augustss static void ohci_root_intr_close __P((usbd_pipe_handle));
159 1.53 augustss static void ohci_root_intr_done __P((usbd_xfer_handle));
160 1.53 augustss
161 1.53 augustss static usbd_status ohci_device_ctrl_transfer __P((usbd_xfer_handle));
162 1.53 augustss static usbd_status ohci_device_ctrl_start __P((usbd_xfer_handle));
163 1.53 augustss static void ohci_device_ctrl_abort __P((usbd_xfer_handle));
164 1.53 augustss static void ohci_device_ctrl_close __P((usbd_pipe_handle));
165 1.53 augustss static void ohci_device_ctrl_done __P((usbd_xfer_handle));
166 1.53 augustss
167 1.53 augustss static usbd_status ohci_device_bulk_transfer __P((usbd_xfer_handle));
168 1.53 augustss static usbd_status ohci_device_bulk_start __P((usbd_xfer_handle));
169 1.53 augustss static void ohci_device_bulk_abort __P((usbd_xfer_handle));
170 1.53 augustss static void ohci_device_bulk_close __P((usbd_pipe_handle));
171 1.53 augustss static void ohci_device_bulk_done __P((usbd_xfer_handle));
172 1.53 augustss
173 1.53 augustss static usbd_status ohci_device_intr_transfer __P((usbd_xfer_handle));
174 1.53 augustss static usbd_status ohci_device_intr_start __P((usbd_xfer_handle));
175 1.53 augustss static void ohci_device_intr_abort __P((usbd_xfer_handle));
176 1.53 augustss static void ohci_device_intr_close __P((usbd_pipe_handle));
177 1.53 augustss static void ohci_device_intr_done __P((usbd_xfer_handle));
178 1.53 augustss
179 1.53 augustss #if 0
180 1.53 augustss static usbd_status ohci_device_isoc_transfer __P((usbd_xfer_handle));
181 1.53 augustss static usbd_status ohci_device_isoc_start __P((usbd_xfer_handle));
182 1.53 augustss static void ohci_device_isoc_abort __P((usbd_xfer_handle));
183 1.53 augustss static void ohci_device_isoc_close __P((usbd_pipe_handle));
184 1.53 augustss static void ohci_device_isoc_done __P((usbd_xfer_handle));
185 1.53 augustss #endif
186 1.53 augustss
187 1.53 augustss static usbd_status ohci_device_setintr __P((ohci_softc_t *sc,
188 1.53 augustss struct ohci_pipe *pipe, int ival));
189 1.53 augustss
190 1.53 augustss static int ohci_str __P((usb_string_descriptor_t *, int, char *));
191 1.53 augustss
192 1.53 augustss static void ohci_timeout __P((void *));
193 1.53 augustss static void ohci_rhsc_able __P((ohci_softc_t *, int));
194 1.34 augustss
195 1.53 augustss static void ohci_close_pipe __P((usbd_pipe_handle pipe,
196 1.53 augustss ohci_soft_ed_t *head));
197 1.54 augustss static void ohci_abort_xfer __P((usbd_xfer_handle xfer,
198 1.53 augustss usbd_status status));
199 1.54 augustss static void ohci_abort_xfer_end __P((void *));
200 1.53 augustss
201 1.53 augustss static void ohci_device_clear_toggle __P((usbd_pipe_handle pipe));
202 1.53 augustss static void ohci_noop __P((usbd_pipe_handle pipe));
203 1.37 augustss
204 1.52 augustss #ifdef OHCI_DEBUG
205 1.53 augustss static void ohci_dumpregs __P((ohci_softc_t *));
206 1.53 augustss static void ohci_dump_tds __P((ohci_soft_td_t *));
207 1.53 augustss static void ohci_dump_td __P((ohci_soft_td_t *));
208 1.53 augustss static void ohci_dump_ed __P((ohci_soft_ed_t *));
209 1.1 augustss #endif
210 1.1 augustss
211 1.1 augustss #define OWRITE4(sc, r, x) bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x))
212 1.1 augustss #define OREAD4(sc, r) bus_space_read_4((sc)->iot, (sc)->ioh, (r))
213 1.1 augustss #define OREAD2(sc, r) bus_space_read_2((sc)->iot, (sc)->ioh, (r))
214 1.1 augustss
215 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
216 1.1 augustss static u_int8_t revbits[OHCI_NO_INTRS] =
217 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
218 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
219 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
220 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
221 1.1 augustss
222 1.1 augustss struct ohci_pipe {
223 1.1 augustss struct usbd_pipe pipe;
224 1.1 augustss ohci_soft_ed_t *sed;
225 1.1 augustss ohci_soft_td_t *tail;
226 1.1 augustss /* Info needed for different pipe kinds. */
227 1.1 augustss union {
228 1.1 augustss /* Control pipe */
229 1.1 augustss struct {
230 1.4 augustss usb_dma_t reqdma;
231 1.1 augustss u_int length;
232 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
233 1.1 augustss } ctl;
234 1.1 augustss /* Interrupt pipe */
235 1.1 augustss struct {
236 1.1 augustss int nslots;
237 1.1 augustss int pos;
238 1.1 augustss } intr;
239 1.3 augustss /* Bulk pipe */
240 1.3 augustss struct {
241 1.3 augustss u_int length;
242 1.32 augustss int isread;
243 1.3 augustss } bulk;
244 1.43 augustss /* Iso pipe */
245 1.43 augustss struct iso {
246 1.43 augustss int xxxxx;
247 1.43 augustss } iso;
248 1.1 augustss } u;
249 1.1 augustss };
250 1.1 augustss
251 1.1 augustss #define OHCI_INTR_ENDPT 1
252 1.1 augustss
253 1.53 augustss static struct usbd_bus_methods ohci_bus_methods = {
254 1.42 augustss ohci_open,
255 1.42 augustss ohci_poll,
256 1.42 augustss ohci_allocm,
257 1.42 augustss ohci_freem,
258 1.42 augustss };
259 1.42 augustss
260 1.53 augustss static struct usbd_pipe_methods ohci_root_ctrl_methods = {
261 1.1 augustss ohci_root_ctrl_transfer,
262 1.17 augustss ohci_root_ctrl_start,
263 1.1 augustss ohci_root_ctrl_abort,
264 1.1 augustss ohci_root_ctrl_close,
265 1.37 augustss ohci_noop,
266 1.7 augustss 0,
267 1.1 augustss };
268 1.1 augustss
269 1.53 augustss static struct usbd_pipe_methods ohci_root_intr_methods = {
270 1.1 augustss ohci_root_intr_transfer,
271 1.17 augustss ohci_root_intr_start,
272 1.1 augustss ohci_root_intr_abort,
273 1.1 augustss ohci_root_intr_close,
274 1.37 augustss ohci_noop,
275 1.38 augustss ohci_root_intr_done,
276 1.1 augustss };
277 1.1 augustss
278 1.53 augustss static struct usbd_pipe_methods ohci_device_ctrl_methods = {
279 1.1 augustss ohci_device_ctrl_transfer,
280 1.17 augustss ohci_device_ctrl_start,
281 1.1 augustss ohci_device_ctrl_abort,
282 1.1 augustss ohci_device_ctrl_close,
283 1.37 augustss ohci_noop,
284 1.38 augustss ohci_device_ctrl_done,
285 1.1 augustss };
286 1.1 augustss
287 1.53 augustss static struct usbd_pipe_methods ohci_device_intr_methods = {
288 1.1 augustss ohci_device_intr_transfer,
289 1.17 augustss ohci_device_intr_start,
290 1.1 augustss ohci_device_intr_abort,
291 1.1 augustss ohci_device_intr_close,
292 1.37 augustss ohci_device_clear_toggle,
293 1.38 augustss ohci_device_intr_done,
294 1.1 augustss };
295 1.1 augustss
296 1.53 augustss static struct usbd_pipe_methods ohci_device_bulk_methods = {
297 1.3 augustss ohci_device_bulk_transfer,
298 1.17 augustss ohci_device_bulk_start,
299 1.3 augustss ohci_device_bulk_abort,
300 1.3 augustss ohci_device_bulk_close,
301 1.37 augustss ohci_device_clear_toggle,
302 1.38 augustss ohci_device_bulk_done,
303 1.3 augustss };
304 1.3 augustss
305 1.43 augustss #if 0
306 1.53 augustss static struct usbd_pipe_methods ohci_device_isoc_methods = {
307 1.43 augustss ohci_device_isoc_transfer,
308 1.43 augustss ohci_device_isoc_start,
309 1.43 augustss ohci_device_isoc_abort,
310 1.43 augustss ohci_device_isoc_close,
311 1.43 augustss ohci_noop,
312 1.43 augustss ohci_device_isoc_done,
313 1.43 augustss };
314 1.43 augustss #endif
315 1.43 augustss
316 1.55 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
317 1.47 augustss int
318 1.47 augustss ohci_activate(self, act)
319 1.47 augustss device_ptr_t self;
320 1.47 augustss enum devact act;
321 1.47 augustss {
322 1.49 augustss struct ohci_softc *sc = (struct ohci_softc *)self;
323 1.47 augustss int rv = 0;
324 1.47 augustss
325 1.47 augustss switch (act) {
326 1.47 augustss case DVACT_ACTIVATE:
327 1.47 augustss return (EOPNOTSUPP);
328 1.47 augustss break;
329 1.47 augustss
330 1.47 augustss case DVACT_DEACTIVATE:
331 1.49 augustss if (sc->sc_child != NULL)
332 1.49 augustss rv = config_deactivate(sc->sc_child);
333 1.47 augustss break;
334 1.47 augustss }
335 1.47 augustss return (rv);
336 1.47 augustss }
337 1.47 augustss
338 1.47 augustss int
339 1.50 augustss ohci_detach(sc, flags)
340 1.50 augustss struct ohci_softc *sc;
341 1.47 augustss int flags;
342 1.47 augustss {
343 1.47 augustss int rv = 0;
344 1.47 augustss
345 1.47 augustss if (sc->sc_child != NULL)
346 1.47 augustss rv = config_detach(sc->sc_child, flags);
347 1.47 augustss
348 1.47 augustss if (rv != 0)
349 1.47 augustss return (rv);
350 1.47 augustss
351 1.47 augustss powerhook_disestablish(sc->sc_powerhook);
352 1.59 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
353 1.59 augustss
354 1.47 augustss /* free data structures XXX */
355 1.47 augustss
356 1.47 augustss return (rv);
357 1.47 augustss }
358 1.55 augustss #endif
359 1.47 augustss
360 1.1 augustss ohci_soft_ed_t *
361 1.1 augustss ohci_alloc_sed(sc)
362 1.1 augustss ohci_softc_t *sc;
363 1.1 augustss {
364 1.1 augustss ohci_soft_ed_t *sed;
365 1.53 augustss usbd_status err;
366 1.1 augustss int i, offs;
367 1.4 augustss usb_dma_t dma;
368 1.1 augustss
369 1.53 augustss if (sc->sc_freeeds == NULL) {
370 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
371 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
372 1.53 augustss OHCI_ED_ALIGN, &dma);
373 1.53 augustss if (err)
374 1.39 augustss return (0);
375 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
376 1.39 augustss offs = i * OHCI_SED_SIZE;
377 1.39 augustss sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
378 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
379 1.1 augustss sed->next = sc->sc_freeeds;
380 1.1 augustss sc->sc_freeeds = sed;
381 1.1 augustss }
382 1.1 augustss }
383 1.1 augustss sed = sc->sc_freeeds;
384 1.1 augustss sc->sc_freeeds = sed->next;
385 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
386 1.1 augustss sed->next = 0;
387 1.39 augustss return (sed);
388 1.1 augustss }
389 1.1 augustss
390 1.1 augustss void
391 1.1 augustss ohci_free_sed(sc, sed)
392 1.1 augustss ohci_softc_t *sc;
393 1.1 augustss ohci_soft_ed_t *sed;
394 1.1 augustss {
395 1.1 augustss sed->next = sc->sc_freeeds;
396 1.1 augustss sc->sc_freeeds = sed;
397 1.1 augustss }
398 1.1 augustss
399 1.1 augustss ohci_soft_td_t *
400 1.1 augustss ohci_alloc_std(sc)
401 1.1 augustss ohci_softc_t *sc;
402 1.1 augustss {
403 1.1 augustss ohci_soft_td_t *std;
404 1.53 augustss usbd_status err;
405 1.1 augustss int i, offs;
406 1.4 augustss usb_dma_t dma;
407 1.1 augustss
408 1.53 augustss if (sc->sc_freetds == NULL) {
409 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
410 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
411 1.53 augustss OHCI_TD_ALIGN, &dma);
412 1.53 augustss if (err)
413 1.39 augustss return (0);
414 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
415 1.39 augustss offs = i * OHCI_STD_SIZE;
416 1.39 augustss std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
417 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
418 1.1 augustss std->nexttd = sc->sc_freetds;
419 1.1 augustss sc->sc_freetds = std;
420 1.1 augustss }
421 1.1 augustss }
422 1.1 augustss std = sc->sc_freetds;
423 1.1 augustss sc->sc_freetds = std->nexttd;
424 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
425 1.1 augustss std->nexttd = 0;
426 1.1 augustss return (std);
427 1.1 augustss }
428 1.1 augustss
429 1.1 augustss void
430 1.1 augustss ohci_free_std(sc, std)
431 1.1 augustss ohci_softc_t *sc;
432 1.1 augustss ohci_soft_td_t *std;
433 1.1 augustss {
434 1.1 augustss std->nexttd = sc->sc_freetds;
435 1.1 augustss sc->sc_freetds = std;
436 1.1 augustss }
437 1.1 augustss
438 1.1 augustss usbd_status
439 1.48 augustss ohci_alloc_std_chain(upipe, sc, len, rd, shortok, dma, sp, ep)
440 1.48 augustss struct ohci_pipe *upipe;
441 1.48 augustss ohci_softc_t *sc;
442 1.48 augustss int len, rd, shortok;
443 1.48 augustss usb_dma_t *dma;
444 1.48 augustss ohci_soft_td_t *sp, **ep;
445 1.48 augustss {
446 1.48 augustss ohci_soft_td_t *next, *cur;
447 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
448 1.48 augustss u_int32_t intr;
449 1.48 augustss int curlen;
450 1.48 augustss
451 1.55 augustss DPRINTFN(len < 4096,("ohci_alloc_std_chain: start len=%d\n", len));
452 1.48 augustss cur = sp;
453 1.48 augustss dataphys = DMAADDR(dma);
454 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
455 1.48 augustss for (;;) {
456 1.48 augustss next = ohci_alloc_std(sc);
457 1.48 augustss if (next == 0) {
458 1.48 augustss /* XXX free chain */
459 1.48 augustss return (USBD_NOMEM);
460 1.48 augustss }
461 1.48 augustss
462 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
463 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
464 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
465 1.48 augustss /* we can handle it in this TD */
466 1.48 augustss curlen = len;
467 1.48 augustss } else {
468 1.48 augustss /* must use multiple TDs, fill as much as possible. */
469 1.48 augustss curlen = 2 * OHCI_PAGE_SIZE -
470 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
471 1.48 augustss }
472 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
473 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
474 1.48 augustss dataphys, dataphysend,
475 1.48 augustss len, curlen));
476 1.48 augustss len -= curlen;
477 1.48 augustss
478 1.48 augustss intr = len == 0 ? OHCI_TD_SET_DI(1) : OHCI_TD_NOINTR;
479 1.48 augustss cur->td.td_flags = LE(
480 1.48 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
481 1.48 augustss intr | OHCI_TD_TOGGLE_CARRY |
482 1.48 augustss (shortok ? OHCI_TD_R : 0));
483 1.48 augustss cur->td.td_cbp = LE(dataphys);
484 1.48 augustss cur->nexttd = next;
485 1.48 augustss cur->td.td_nexttd = LE(next->physaddr);
486 1.48 augustss cur->td.td_be = LE(dataphys + curlen - 1);
487 1.48 augustss cur->len = curlen;
488 1.48 augustss cur->flags = OHCI_ADD_LEN;
489 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
490 1.48 augustss dataphys, dataphys + curlen - 1));
491 1.48 augustss if (len == 0)
492 1.48 augustss break;
493 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
494 1.48 augustss dataphys += curlen;
495 1.48 augustss cur = next;
496 1.48 augustss }
497 1.48 augustss cur->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
498 1.48 augustss *ep = next;
499 1.48 augustss
500 1.48 augustss return (USBD_NORMAL_COMPLETION);
501 1.48 augustss }
502 1.48 augustss
503 1.53 augustss #if 0
504 1.53 augustss static void
505 1.48 augustss ohci_free_std_chain(sc, std, stdend)
506 1.48 augustss ohci_softc_t *sc;
507 1.48 augustss ohci_soft_td_t *std;
508 1.48 augustss ohci_soft_td_t *stdend;
509 1.48 augustss {
510 1.48 augustss ohci_soft_td_t *p;
511 1.48 augustss
512 1.48 augustss for (; std != stdend; std = p) {
513 1.48 augustss p = std->nexttd;
514 1.48 augustss ohci_free_std(sc, std);
515 1.48 augustss }
516 1.48 augustss }
517 1.53 augustss #endif
518 1.48 augustss
519 1.48 augustss usbd_status
520 1.1 augustss ohci_init(sc)
521 1.1 augustss ohci_softc_t *sc;
522 1.1 augustss {
523 1.1 augustss ohci_soft_ed_t *sed, *psed;
524 1.53 augustss usbd_status err;
525 1.1 augustss int rev;
526 1.1 augustss int i;
527 1.1 augustss u_int32_t s, ctl, ival, hcr, fm, per;
528 1.16 augustss
529 1.1 augustss DPRINTF(("ohci_init: start\n"));
530 1.36 augustss #if defined(__OpenBSD__)
531 1.55 augustss printf(",");
532 1.36 augustss #else
533 1.55 augustss printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
534 1.36 augustss #endif
535 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
536 1.55 augustss printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
537 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
538 1.55 augustss
539 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
540 1.1 augustss printf("%s: unsupported OHCI revision\n",
541 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
542 1.56 augustss sc->sc_bus.usbrev = USBREV_UNKNOWN;
543 1.1 augustss return (USBD_INVAL);
544 1.1 augustss }
545 1.56 augustss sc->sc_bus.usbrev = USBREV_1_0;
546 1.1 augustss
547 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
548 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
549 1.1 augustss
550 1.1 augustss /* Allocate the HCCA area. */
551 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
552 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
553 1.53 augustss if (err)
554 1.53 augustss return (err);
555 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
556 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
557 1.1 augustss
558 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
559 1.1 augustss
560 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
561 1.53 augustss if (sc->sc_ctrl_head == NULL) {
562 1.53 augustss err = USBD_NOMEM;
563 1.1 augustss goto bad1;
564 1.1 augustss }
565 1.39 augustss sc->sc_ctrl_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
566 1.34 augustss
567 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
568 1.53 augustss if (sc->sc_bulk_head == NULL) {
569 1.53 augustss err = USBD_NOMEM;
570 1.1 augustss goto bad2;
571 1.1 augustss }
572 1.39 augustss sc->sc_bulk_head->ed.ed_flags |= LE(OHCI_ED_SKIP);
573 1.1 augustss
574 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
575 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
576 1.1 augustss sed = ohci_alloc_sed(sc);
577 1.53 augustss if (sed == NULL) {
578 1.1 augustss while (--i >= 0)
579 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
580 1.53 augustss err = USBD_NOMEM;
581 1.1 augustss goto bad3;
582 1.1 augustss }
583 1.1 augustss /* All ED fields are set to 0. */
584 1.1 augustss sc->sc_eds[i] = sed;
585 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
586 1.1 augustss if (i != 0) {
587 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
588 1.1 augustss sed->next = psed;
589 1.39 augustss sed->ed.ed_nexted = LE(psed->physaddr);
590 1.1 augustss }
591 1.1 augustss }
592 1.1 augustss /*
593 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
594 1.1 augustss * the tree set up properly to spread the interrupts.
595 1.1 augustss */
596 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
597 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
598 1.16 augustss LE(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
599 1.1 augustss
600 1.1 augustss /* Determine in what context we are running. */
601 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
602 1.1 augustss if (ctl & OHCI_IR) {
603 1.1 augustss /* SMM active, request change */
604 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
605 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
606 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
607 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
608 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
609 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
610 1.1 augustss }
611 1.1 augustss if ((ctl & OHCI_IR) == 0) {
612 1.15 augustss printf("%s: SMM does not respond, resetting\n",
613 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
614 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
615 1.1 augustss goto reset;
616 1.1 augustss }
617 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
618 1.1 augustss /* BIOS started controller. */
619 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
620 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
621 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
622 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
623 1.1 augustss }
624 1.1 augustss } else {
625 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
626 1.1 augustss reset:
627 1.1 augustss /* Controller was cold started. */
628 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
629 1.1 augustss }
630 1.1 augustss
631 1.16 augustss /*
632 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
633 1.25 augustss * without it some controllers do not start.
634 1.16 augustss */
635 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
636 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
637 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
638 1.16 augustss
639 1.1 augustss /* We now own the host controller and the bus has been reset. */
640 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
641 1.1 augustss
642 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
643 1.1 augustss /* Nominal time for a reset is 10 us. */
644 1.1 augustss for (i = 0; i < 10; i++) {
645 1.1 augustss delay(10);
646 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
647 1.1 augustss if (!hcr)
648 1.1 augustss break;
649 1.1 augustss }
650 1.1 augustss if (hcr) {
651 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
652 1.53 augustss err = USBD_IOERROR;
653 1.1 augustss goto bad3;
654 1.1 augustss }
655 1.52 augustss #ifdef OHCI_DEBUG
656 1.1 augustss if (ohcidebug > 15)
657 1.1 augustss ohci_dumpregs(sc);
658 1.1 augustss #endif
659 1.1 augustss
660 1.1 augustss /* The controller is now in suspend state, we have 2ms to finish. */
661 1.1 augustss
662 1.1 augustss /* Set up HC registers. */
663 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
664 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
665 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
666 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
667 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
668 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
669 1.55 augustss /* switch on desired functional features */
670 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
671 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
672 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
673 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
674 1.1 augustss /* And finally start it! */
675 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
676 1.1 augustss
677 1.1 augustss /*
678 1.1 augustss * The controller is now OPERATIONAL. Set a some final
679 1.1 augustss * registers that should be set earlier, but that the
680 1.1 augustss * controller ignores when in the SUSPEND state.
681 1.1 augustss */
682 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
683 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
684 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
685 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
686 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
687 1.1 augustss
688 1.1 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
689 1.1 augustss
690 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
691 1.1 augustss
692 1.52 augustss #ifdef OHCI_DEBUG
693 1.1 augustss if (ohcidebug > 5)
694 1.1 augustss ohci_dumpregs(sc);
695 1.1 augustss #endif
696 1.1 augustss
697 1.1 augustss /* Set up the bus struct. */
698 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
699 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
700 1.1 augustss
701 1.47 augustss sc->sc_powerhook = powerhook_establish(ohci_power, sc);
702 1.33 augustss
703 1.59 augustss sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
704 1.59 augustss
705 1.1 augustss return (USBD_NORMAL_COMPLETION);
706 1.1 augustss
707 1.1 augustss bad3:
708 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
709 1.1 augustss bad2:
710 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
711 1.1 augustss bad1:
712 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
713 1.53 augustss return (err);
714 1.1 augustss }
715 1.1 augustss
716 1.42 augustss usbd_status
717 1.42 augustss ohci_allocm(bus, dma, size)
718 1.42 augustss struct usbd_bus *bus;
719 1.42 augustss usb_dma_t *dma;
720 1.42 augustss u_int32_t size;
721 1.42 augustss {
722 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
723 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
724 1.52 augustss #endif
725 1.42 augustss
726 1.44 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
727 1.42 augustss }
728 1.42 augustss
729 1.42 augustss void
730 1.42 augustss ohci_freem(bus, dma)
731 1.42 augustss struct usbd_bus *bus;
732 1.42 augustss usb_dma_t *dma;
733 1.42 augustss {
734 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
735 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
736 1.52 augustss #endif
737 1.42 augustss
738 1.44 augustss usb_freemem(&sc->sc_bus, dma);
739 1.42 augustss }
740 1.42 augustss
741 1.59 augustss /*
742 1.59 augustss * Shut down the controller when the system is going down.
743 1.59 augustss */
744 1.59 augustss void
745 1.59 augustss ohci_shutdown(v)
746 1.59 augustss void *v;
747 1.59 augustss {
748 1.59 augustss ohci_softc_t *sc = v;
749 1.59 augustss
750 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
751 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
752 1.59 augustss }
753 1.59 augustss
754 1.59 augustss /*
755 1.59 augustss * Handle suspend/resume.
756 1.59 augustss *
757 1.59 augustss * We need to switch to polling mode here, because this routine is
758 1.59 augustss * called from an intterupt context. This is all right since we
759 1.59 augustss * are almost suspended anyway.
760 1.59 augustss */
761 1.33 augustss void
762 1.33 augustss ohci_power(why, v)
763 1.33 augustss int why;
764 1.33 augustss void *v;
765 1.33 augustss {
766 1.52 augustss #ifdef OHCI_DEBUG
767 1.33 augustss ohci_softc_t *sc = v;
768 1.33 augustss
769 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
770 1.33 augustss /* XXX should suspend/resume */
771 1.33 augustss ohci_dumpregs(sc);
772 1.33 augustss #endif
773 1.33 augustss }
774 1.33 augustss
775 1.52 augustss #ifdef OHCI_DEBUG
776 1.1 augustss void
777 1.1 augustss ohci_dumpregs(sc)
778 1.1 augustss ohci_softc_t *sc;
779 1.1 augustss {
780 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
781 1.41 augustss OREAD4(sc, OHCI_REVISION),
782 1.41 augustss OREAD4(sc, OHCI_CONTROL),
783 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
784 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
785 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
786 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
787 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
788 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
789 1.41 augustss OREAD4(sc, OHCI_HCCA),
790 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
791 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
792 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
793 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
794 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
795 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
796 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
797 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
798 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
799 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
800 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
801 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
802 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
803 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
804 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
805 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
806 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
807 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
808 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
809 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
810 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
811 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
812 1.41 augustss LE(sc->sc_hcca->hcca_frame_number),
813 1.41 augustss LE(sc->sc_hcca->hcca_done_head)));
814 1.1 augustss }
815 1.1 augustss #endif
816 1.1 augustss
817 1.55 augustss static int ohci_intr1 __P((ohci_softc_t *));
818 1.53 augustss
819 1.1 augustss int
820 1.1 augustss ohci_intr(p)
821 1.1 augustss void *p;
822 1.1 augustss {
823 1.1 augustss ohci_softc_t *sc = p;
824 1.53 augustss
825 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
826 1.57 augustss if (sc->sc_bus.use_polling) {
827 1.57 augustss #ifdef DIAGNOSTIC
828 1.57 augustss printf("ohci_intr: ignored interrupt while polling\n");
829 1.57 augustss #endif
830 1.53 augustss return (0);
831 1.57 augustss }
832 1.53 augustss
833 1.53 augustss return (ohci_intr1(sc));
834 1.53 augustss }
835 1.53 augustss
836 1.55 augustss static int
837 1.53 augustss ohci_intr1(sc)
838 1.53 augustss ohci_softc_t *sc;
839 1.53 augustss {
840 1.1 augustss u_int32_t intrs, eintrs;
841 1.1 augustss ohci_physaddr_t done;
842 1.1 augustss
843 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
844 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
845 1.15 augustss #ifdef DIAGNOSTIC
846 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
847 1.15 augustss #endif
848 1.15 augustss return (0);
849 1.15 augustss }
850 1.15 augustss
851 1.27 augustss intrs = 0;
852 1.16 augustss done = LE(sc->sc_hcca->hcca_done_head);
853 1.1 augustss if (done != 0) {
854 1.26 augustss sc->sc_hcca->hcca_done_head = 0;
855 1.26 augustss if (done & ~OHCI_DONE_INTRS)
856 1.26 augustss intrs = OHCI_WDH;
857 1.1 augustss if (done & OHCI_DONE_INTRS)
858 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
859 1.1 augustss } else
860 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
861 1.55 augustss
862 1.1 augustss if (!intrs)
863 1.1 augustss return (0);
864 1.55 augustss
865 1.1 augustss intrs &= ~OHCI_MIE;
866 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
867 1.1 augustss eintrs = intrs & sc->sc_eintrs;
868 1.1 augustss if (!eintrs)
869 1.1 augustss return (0);
870 1.1 augustss
871 1.45 augustss sc->sc_bus.intr_context++;
872 1.44 augustss sc->sc_bus.no_intrs++;
873 1.1 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=%x(%x) eintr=%x\n",
874 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
875 1.1 augustss (u_int)eintrs));
876 1.1 augustss
877 1.1 augustss if (eintrs & OHCI_SO) {
878 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
879 1.1 augustss /* XXX do what */
880 1.1 augustss intrs &= ~OHCI_SO;
881 1.1 augustss }
882 1.1 augustss if (eintrs & OHCI_WDH) {
883 1.1 augustss ohci_process_done(sc, done &~ OHCI_DONE_INTRS);
884 1.1 augustss intrs &= ~OHCI_WDH;
885 1.1 augustss }
886 1.1 augustss if (eintrs & OHCI_RD) {
887 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
888 1.1 augustss /* XXX process resume detect */
889 1.1 augustss }
890 1.1 augustss if (eintrs & OHCI_UE) {
891 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
892 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
893 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
894 1.1 augustss /* XXX what else */
895 1.1 augustss }
896 1.1 augustss if (eintrs & OHCI_RHSC) {
897 1.53 augustss ohci_rhsc(sc, sc->sc_intrxfer);
898 1.1 augustss intrs &= ~OHCI_RHSC;
899 1.1 augustss
900 1.1 augustss /*
901 1.1 augustss * Disable RHSC interrupt for now, because it will be
902 1.1 augustss * on until the port has been reset.
903 1.1 augustss */
904 1.1 augustss ohci_rhsc_able(sc, 0);
905 1.1 augustss }
906 1.1 augustss
907 1.45 augustss sc->sc_bus.intr_context--;
908 1.44 augustss
909 1.1 augustss /* Block unprocessed interrupts. XXX */
910 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
911 1.1 augustss sc->sc_eintrs &= ~intrs;
912 1.1 augustss
913 1.1 augustss return (1);
914 1.1 augustss }
915 1.1 augustss
916 1.1 augustss void
917 1.1 augustss ohci_rhsc_able(sc, on)
918 1.1 augustss ohci_softc_t *sc;
919 1.1 augustss int on;
920 1.1 augustss {
921 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
922 1.1 augustss if (on) {
923 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
924 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
925 1.1 augustss } else {
926 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
927 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
928 1.1 augustss }
929 1.1 augustss }
930 1.1 augustss
931 1.52 augustss #ifdef OHCI_DEBUG
932 1.13 augustss char *ohci_cc_strs[] = {
933 1.13 augustss "NO_ERROR",
934 1.13 augustss "CRC",
935 1.13 augustss "BIT_STUFFING",
936 1.13 augustss "DATA_TOGGLE_MISMATCH",
937 1.13 augustss "STALL",
938 1.13 augustss "DEVICE_NOT_RESPONDING",
939 1.13 augustss "PID_CHECK_FAILURE",
940 1.13 augustss "UNEXPECTED_PID",
941 1.13 augustss "DATA_OVERRUN",
942 1.13 augustss "DATA_UNDERRUN",
943 1.13 augustss "BUFFER_OVERRUN",
944 1.13 augustss "BUFFER_UNDERRUN",
945 1.13 augustss "NOT_ACCESSED",
946 1.13 augustss };
947 1.13 augustss #endif
948 1.13 augustss
949 1.1 augustss void
950 1.1 augustss ohci_process_done(sc, done)
951 1.1 augustss ohci_softc_t *sc;
952 1.1 augustss ohci_physaddr_t done;
953 1.1 augustss {
954 1.48 augustss ohci_soft_td_t *std, *sdone, *stdnext;
955 1.53 augustss usbd_xfer_handle xfer;
956 1.1 augustss int len, cc;
957 1.1 augustss
958 1.1 augustss DPRINTFN(10,("ohci_process_done: done=0x%08lx\n", (u_long)done));
959 1.1 augustss
960 1.1 augustss /* Reverse the done list. */
961 1.39 augustss for (sdone = 0; done; done = LE(std->td.td_nexttd)) {
962 1.1 augustss std = ohci_hash_find_td(sc, done);
963 1.1 augustss std->dnext = sdone;
964 1.1 augustss sdone = std;
965 1.1 augustss }
966 1.1 augustss
967 1.52 augustss #ifdef OHCI_DEBUG
968 1.1 augustss if (ohcidebug > 10) {
969 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
970 1.1 augustss ohci_dump_tds(sdone);
971 1.1 augustss }
972 1.1 augustss #endif
973 1.1 augustss
974 1.48 augustss for (std = sdone; std; std = stdnext) {
975 1.53 augustss xfer = std->xfer;
976 1.48 augustss stdnext = std->dnext;
977 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
978 1.53 augustss std, xfer, xfer->hcpriv));
979 1.39 augustss cc = OHCI_TD_GET_CC(LE(std->td.td_flags));
980 1.53 augustss usb_untimeout(ohci_timeout, xfer, xfer->timo_handle);
981 1.53 augustss if (xfer->status == USBD_CANCELLED ||
982 1.53 augustss xfer->status == USBD_TIMEOUT) {
983 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
984 1.53 augustss xfer));
985 1.38 augustss /* Handled by abort routine. */
986 1.34 augustss } else if (cc == OHCI_CC_NO_ERROR) {
987 1.34 augustss len = std->len;
988 1.39 augustss if (std->td.td_cbp != 0)
989 1.39 augustss len -= LE(std->td.td_be) -
990 1.39 augustss LE(std->td.td_cbp) + 1;
991 1.48 augustss if (std->flags & OHCI_ADD_LEN)
992 1.53 augustss xfer->actlen += len;
993 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
994 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
995 1.53 augustss usb_transfer_complete(xfer);
996 1.21 augustss }
997 1.48 augustss ohci_hash_rem_td(sc, std);
998 1.48 augustss ohci_free_std(sc, std);
999 1.1 augustss } else {
1000 1.48 augustss /*
1001 1.48 augustss * Endpoint is halted. First unlink all the TDs
1002 1.48 augustss * belonging to the failed transfer, and then restart
1003 1.48 augustss * the endpoint.
1004 1.48 augustss */
1005 1.1 augustss ohci_soft_td_t *p, *n;
1006 1.1 augustss struct ohci_pipe *opipe =
1007 1.53 augustss (struct ohci_pipe *)xfer->pipe;
1008 1.48 augustss
1009 1.55 augustss DPRINTF(("ohci_process_done: error cc=%d (%s)\n",
1010 1.53 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
1011 1.53 augustss ohci_cc_strs[OHCI_TD_GET_CC(LE(std->td.td_flags))]));
1012 1.48 augustss
1013 1.48 augustss /* remove TDs */
1014 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1015 1.1 augustss n = p->nexttd;
1016 1.1 augustss ohci_hash_rem_td(sc, p);
1017 1.1 augustss ohci_free_std(sc, p);
1018 1.1 augustss }
1019 1.48 augustss
1020 1.16 augustss /* clear halt */
1021 1.39 augustss opipe->sed->ed.ed_headp = LE(p->physaddr);
1022 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1023 1.48 augustss
1024 1.1 augustss if (cc == OHCI_CC_STALL)
1025 1.53 augustss xfer->status = USBD_STALLED;
1026 1.1 augustss else
1027 1.53 augustss xfer->status = USBD_IOERROR;
1028 1.53 augustss usb_transfer_complete(xfer);
1029 1.1 augustss }
1030 1.1 augustss }
1031 1.1 augustss }
1032 1.1 augustss
1033 1.1 augustss void
1034 1.53 augustss ohci_device_ctrl_done(xfer)
1035 1.53 augustss usbd_xfer_handle xfer;
1036 1.1 augustss {
1037 1.53 augustss DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer));
1038 1.1 augustss
1039 1.38 augustss #ifdef DIAGNOSTIC
1040 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1041 1.8 augustss panic("ohci_ctrl_done: not a request\n");
1042 1.1 augustss }
1043 1.38 augustss #endif
1044 1.55 augustss xfer->hcpriv = NULL;
1045 1.1 augustss }
1046 1.1 augustss
1047 1.1 augustss void
1048 1.53 augustss ohci_device_intr_done(xfer)
1049 1.53 augustss usbd_xfer_handle xfer;
1050 1.1 augustss {
1051 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1052 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1053 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1054 1.48 augustss ohci_soft_td_t *data, *tail;
1055 1.1 augustss
1056 1.1 augustss
1057 1.53 augustss DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n",
1058 1.53 augustss xfer, xfer->actlen));
1059 1.1 augustss
1060 1.55 augustss xfer->hcpriv = NULL;
1061 1.38 augustss
1062 1.53 augustss if (xfer->pipe->repeat) {
1063 1.48 augustss data = opipe->tail;
1064 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1065 1.53 augustss if (tail == NULL) {
1066 1.53 augustss xfer->status = USBD_NOMEM;
1067 1.1 augustss return;
1068 1.1 augustss }
1069 1.55 augustss tail->xfer = NULL;
1070 1.1 augustss
1071 1.48 augustss data->td.td_flags = LE(
1072 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1073 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1074 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1075 1.48 augustss data->td.td_flags |= LE(OHCI_TD_R);
1076 1.53 augustss data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf));
1077 1.48 augustss data->nexttd = tail;
1078 1.48 augustss data->td.td_nexttd = LE(tail->physaddr);
1079 1.53 augustss data->td.td_be = LE(LE(data->td.td_cbp) + xfer->length - 1);
1080 1.53 augustss data->len = xfer->length;
1081 1.53 augustss data->xfer = xfer;
1082 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1083 1.53 augustss xfer->hcpriv = data;
1084 1.53 augustss xfer->actlen = 0;
1085 1.1 augustss
1086 1.48 augustss ohci_hash_add_td(sc, data);
1087 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1088 1.1 augustss opipe->tail = tail;
1089 1.1 augustss }
1090 1.1 augustss }
1091 1.1 augustss
1092 1.1 augustss void
1093 1.53 augustss ohci_device_bulk_done(xfer)
1094 1.53 augustss usbd_xfer_handle xfer;
1095 1.3 augustss {
1096 1.53 augustss DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n",
1097 1.53 augustss xfer, xfer->actlen));
1098 1.3 augustss
1099 1.53 augustss xfer->hcpriv = NULL;
1100 1.3 augustss }
1101 1.3 augustss
1102 1.3 augustss void
1103 1.53 augustss ohci_rhsc(sc, xfer)
1104 1.1 augustss ohci_softc_t *sc;
1105 1.53 augustss usbd_xfer_handle xfer;
1106 1.1 augustss {
1107 1.1 augustss usbd_pipe_handle pipe;
1108 1.1 augustss struct ohci_pipe *opipe;
1109 1.1 augustss u_char *p;
1110 1.1 augustss int i, m;
1111 1.1 augustss int hstatus;
1112 1.1 augustss
1113 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1114 1.53 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1115 1.53 augustss sc, xfer, hstatus));
1116 1.1 augustss
1117 1.53 augustss if (xfer == NULL) {
1118 1.1 augustss /* Just ignore the change. */
1119 1.1 augustss return;
1120 1.1 augustss }
1121 1.1 augustss
1122 1.53 augustss pipe = xfer->pipe;
1123 1.1 augustss opipe = (struct ohci_pipe *)pipe;
1124 1.1 augustss
1125 1.53 augustss p = KERNADDR(&xfer->dmabuf);
1126 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1127 1.53 augustss memset(p, 0, xfer->length);
1128 1.1 augustss for (i = 1; i <= m; i++) {
1129 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1130 1.1 augustss p[i/8] |= 1 << (i%8);
1131 1.1 augustss }
1132 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1133 1.53 augustss xfer->actlen = xfer->length;
1134 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1135 1.1 augustss
1136 1.53 augustss usb_transfer_complete(xfer);
1137 1.38 augustss }
1138 1.38 augustss
1139 1.38 augustss void
1140 1.53 augustss ohci_root_intr_done(xfer)
1141 1.53 augustss usbd_xfer_handle xfer;
1142 1.38 augustss {
1143 1.53 augustss xfer->hcpriv = NULL;
1144 1.1 augustss }
1145 1.1 augustss
1146 1.1 augustss /*
1147 1.1 augustss * Wait here until controller claims to have an interrupt.
1148 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1149 1.1 augustss * too long.
1150 1.1 augustss */
1151 1.1 augustss void
1152 1.53 augustss ohci_waitintr(sc, xfer)
1153 1.1 augustss ohci_softc_t *sc;
1154 1.53 augustss usbd_xfer_handle xfer;
1155 1.1 augustss {
1156 1.53 augustss int timo = xfer->timeout;
1157 1.1 augustss int usecs;
1158 1.1 augustss u_int32_t intrs;
1159 1.1 augustss
1160 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1161 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1162 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1163 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1164 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1165 1.52 augustss #ifdef OHCI_DEBUG
1166 1.1 augustss if (ohcidebug > 15)
1167 1.1 augustss ohci_dumpregs(sc);
1168 1.1 augustss #endif
1169 1.1 augustss if (intrs) {
1170 1.53 augustss ohci_intr1(sc);
1171 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1172 1.1 augustss return;
1173 1.1 augustss }
1174 1.1 augustss }
1175 1.15 augustss
1176 1.15 augustss /* Timeout */
1177 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1178 1.53 augustss xfer->status = USBD_TIMEOUT;
1179 1.53 augustss usb_transfer_complete(xfer);
1180 1.15 augustss /* XXX should free TD */
1181 1.5 augustss }
1182 1.5 augustss
1183 1.5 augustss void
1184 1.5 augustss ohci_poll(bus)
1185 1.5 augustss struct usbd_bus *bus;
1186 1.5 augustss {
1187 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1188 1.5 augustss
1189 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1190 1.53 augustss ohci_intr1(sc);
1191 1.1 augustss }
1192 1.1 augustss
1193 1.1 augustss usbd_status
1194 1.53 augustss ohci_device_request(xfer)
1195 1.53 augustss usbd_xfer_handle xfer;
1196 1.1 augustss {
1197 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1198 1.53 augustss usb_device_request_t *req = &xfer->request;
1199 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1200 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1201 1.1 augustss int addr = dev->address;
1202 1.48 augustss ohci_soft_td_t *setup, *data = 0, *stat, *next, *tail;
1203 1.1 augustss ohci_soft_ed_t *sed;
1204 1.1 augustss int isread;
1205 1.1 augustss int len;
1206 1.53 augustss usbd_status err;
1207 1.1 augustss int s;
1208 1.1 augustss
1209 1.1 augustss isread = req->bmRequestType & UT_READ;
1210 1.1 augustss len = UGETW(req->wLength);
1211 1.1 augustss
1212 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1213 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1214 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1215 1.1 augustss UGETW(req->wIndex), len, addr,
1216 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1217 1.1 augustss
1218 1.1 augustss setup = opipe->tail;
1219 1.1 augustss stat = ohci_alloc_std(sc);
1220 1.53 augustss if (stat == NULL) {
1221 1.53 augustss err = USBD_NOMEM;
1222 1.1 augustss goto bad1;
1223 1.1 augustss }
1224 1.1 augustss tail = ohci_alloc_std(sc);
1225 1.53 augustss if (tail == NULL) {
1226 1.53 augustss err = USBD_NOMEM;
1227 1.1 augustss goto bad2;
1228 1.1 augustss }
1229 1.55 augustss tail->xfer = NULL;
1230 1.1 augustss
1231 1.1 augustss sed = opipe->sed;
1232 1.1 augustss opipe->u.ctl.length = len;
1233 1.1 augustss
1234 1.10 augustss /* Update device address and length since they may have changed. */
1235 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1236 1.39 augustss sed->ed.ed_flags = LE(
1237 1.39 augustss (LE(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1238 1.16 augustss OHCI_ED_SET_FA(addr) |
1239 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1240 1.1 augustss
1241 1.1 augustss /* Set up data transaction */
1242 1.1 augustss if (len != 0) {
1243 1.48 augustss data = ohci_alloc_std(sc);
1244 1.53 augustss if (data == NULL) {
1245 1.53 augustss err = USBD_NOMEM;
1246 1.1 augustss goto bad3;
1247 1.1 augustss }
1248 1.48 augustss data->td.td_flags = LE(
1249 1.1 augustss (isread ? OHCI_TD_IN : OHCI_TD_OUT) | OHCI_TD_NOCC |
1250 1.19 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_NOINTR |
1251 1.53 augustss (xfer->flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0));
1252 1.53 augustss data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf));
1253 1.48 augustss data->nexttd = stat;
1254 1.48 augustss data->td.td_nexttd = LE(stat->physaddr);
1255 1.48 augustss data->td.td_be = LE(LE(data->td.td_cbp) + len - 1);
1256 1.48 augustss data->len = len;
1257 1.53 augustss data->xfer = xfer;
1258 1.48 augustss data->flags = OHCI_ADD_LEN;
1259 1.1 augustss
1260 1.48 augustss next = data;
1261 1.34 augustss stat->flags = OHCI_CALL_DONE;
1262 1.34 augustss } else {
1263 1.1 augustss next = stat;
1264 1.48 augustss /* XXX ADD_LEN? */
1265 1.48 augustss stat->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1266 1.34 augustss }
1267 1.1 augustss
1268 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1269 1.1 augustss
1270 1.39 augustss setup->td.td_flags = LE(OHCI_TD_SETUP | OHCI_TD_NOCC |
1271 1.58 augustss OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1272 1.39 augustss setup->td.td_cbp = LE(DMAADDR(&opipe->u.ctl.reqdma));
1273 1.1 augustss setup->nexttd = next;
1274 1.39 augustss setup->td.td_nexttd = LE(next->physaddr);
1275 1.39 augustss setup->td.td_be = LE(LE(setup->td.td_cbp) + sizeof *req - 1);
1276 1.1 augustss setup->len = 0; /* XXX The number of byte we count */
1277 1.53 augustss setup->xfer = xfer;
1278 1.34 augustss setup->flags = 0;
1279 1.53 augustss xfer->hcpriv = setup;
1280 1.1 augustss
1281 1.39 augustss stat->td.td_flags = LE(
1282 1.1 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) | OHCI_TD_NOCC |
1283 1.16 augustss OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1284 1.39 augustss stat->td.td_cbp = 0;
1285 1.1 augustss stat->nexttd = tail;
1286 1.39 augustss stat->td.td_nexttd = LE(tail->physaddr);
1287 1.39 augustss stat->td.td_be = 0;
1288 1.1 augustss stat->len = 0;
1289 1.53 augustss stat->xfer = xfer;
1290 1.1 augustss
1291 1.52 augustss #ifdef OHCI_DEBUG
1292 1.1 augustss if (ohcidebug > 5) {
1293 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1294 1.1 augustss ohci_dump_ed(sed);
1295 1.1 augustss ohci_dump_tds(setup);
1296 1.1 augustss }
1297 1.1 augustss #endif
1298 1.1 augustss
1299 1.1 augustss /* Insert ED in schedule */
1300 1.1 augustss s = splusb();
1301 1.1 augustss ohci_hash_add_td(sc, setup);
1302 1.1 augustss if (len != 0)
1303 1.48 augustss ohci_hash_add_td(sc, data);
1304 1.1 augustss ohci_hash_add_td(sc, stat);
1305 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
1306 1.1 augustss opipe->tail = tail;
1307 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1308 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1309 1.53 augustss usb_timeout(ohci_timeout, xfer,
1310 1.53 augustss MS_TO_TICKS(xfer->timeout), xfer->timo_handle);
1311 1.15 augustss }
1312 1.1 augustss splx(s);
1313 1.1 augustss
1314 1.52 augustss #ifdef OHCI_DEBUG
1315 1.1 augustss if (ohcidebug > 5) {
1316 1.55 augustss usb_delay_ms(&sc->sc_bus, 5);
1317 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1318 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1319 1.1 augustss ohci_dump_ed(sed);
1320 1.1 augustss ohci_dump_tds(setup);
1321 1.1 augustss }
1322 1.1 augustss #endif
1323 1.1 augustss
1324 1.1 augustss return (USBD_NORMAL_COMPLETION);
1325 1.1 augustss
1326 1.1 augustss bad3:
1327 1.1 augustss ohci_free_std(sc, tail);
1328 1.1 augustss bad2:
1329 1.1 augustss ohci_free_std(sc, stat);
1330 1.1 augustss bad1:
1331 1.53 augustss return (err);
1332 1.1 augustss }
1333 1.1 augustss
1334 1.1 augustss /*
1335 1.1 augustss * Add an ED to the schedule. Called at splusb().
1336 1.1 augustss */
1337 1.1 augustss void
1338 1.3 augustss ohci_add_ed(sed, head)
1339 1.1 augustss ohci_soft_ed_t *sed;
1340 1.1 augustss ohci_soft_ed_t *head;
1341 1.1 augustss {
1342 1.46 augustss SPLUSBCHECK;
1343 1.1 augustss sed->next = head->next;
1344 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1345 1.1 augustss head->next = sed;
1346 1.39 augustss head->ed.ed_nexted = LE(sed->physaddr);
1347 1.1 augustss }
1348 1.1 augustss
1349 1.1 augustss /*
1350 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1351 1.3 augustss */
1352 1.3 augustss void
1353 1.3 augustss ohci_rem_ed(sed, head)
1354 1.3 augustss ohci_soft_ed_t *sed;
1355 1.3 augustss ohci_soft_ed_t *head;
1356 1.3 augustss {
1357 1.3 augustss ohci_soft_ed_t *p;
1358 1.3 augustss
1359 1.46 augustss SPLUSBCHECK;
1360 1.46 augustss
1361 1.3 augustss /* XXX */
1362 1.55 augustss for (p = head; p == NULL && p->next != sed; p = p->next)
1363 1.3 augustss ;
1364 1.55 augustss if (p == NULL)
1365 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1366 1.3 augustss p->next = sed->next;
1367 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1368 1.3 augustss }
1369 1.3 augustss
1370 1.3 augustss /*
1371 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1372 1.1 augustss * the host controller. This queue is the processed by software.
1373 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1374 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1375 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1376 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1377 1.1 augustss * hash value.
1378 1.1 augustss */
1379 1.1 augustss
1380 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1381 1.1 augustss /* Called at splusb() */
1382 1.1 augustss void
1383 1.1 augustss ohci_hash_add_td(sc, std)
1384 1.1 augustss ohci_softc_t *sc;
1385 1.1 augustss ohci_soft_td_t *std;
1386 1.1 augustss {
1387 1.1 augustss int h = HASH(std->physaddr);
1388 1.1 augustss
1389 1.46 augustss SPLUSBCHECK;
1390 1.46 augustss
1391 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1392 1.1 augustss }
1393 1.1 augustss
1394 1.1 augustss /* Called at splusb() */
1395 1.1 augustss void
1396 1.1 augustss ohci_hash_rem_td(sc, std)
1397 1.1 augustss ohci_softc_t *sc;
1398 1.1 augustss ohci_soft_td_t *std;
1399 1.1 augustss {
1400 1.46 augustss SPLUSBCHECK;
1401 1.46 augustss
1402 1.1 augustss LIST_REMOVE(std, hnext);
1403 1.1 augustss }
1404 1.1 augustss
1405 1.1 augustss ohci_soft_td_t *
1406 1.1 augustss ohci_hash_find_td(sc, a)
1407 1.1 augustss ohci_softc_t *sc;
1408 1.1 augustss ohci_physaddr_t a;
1409 1.1 augustss {
1410 1.1 augustss int h = HASH(a);
1411 1.1 augustss ohci_soft_td_t *std;
1412 1.1 augustss
1413 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1414 1.53 augustss std != NULL;
1415 1.1 augustss std = LIST_NEXT(std, hnext))
1416 1.1 augustss if (std->physaddr == a)
1417 1.1 augustss return (std);
1418 1.1 augustss panic("ohci_hash_find_td: addr 0x%08lx not found\n", (u_long)a);
1419 1.1 augustss }
1420 1.1 augustss
1421 1.1 augustss void
1422 1.1 augustss ohci_timeout(addr)
1423 1.1 augustss void *addr;
1424 1.1 augustss {
1425 1.53 augustss usbd_xfer_handle xfer = addr;
1426 1.48 augustss int s;
1427 1.1 augustss
1428 1.53 augustss DPRINTF(("ohci_timeout: xfer=%p\n", xfer));
1429 1.45 augustss
1430 1.48 augustss s = splusb();
1431 1.53 augustss xfer->device->bus->intr_context++;
1432 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
1433 1.53 augustss xfer->device->bus->intr_context--;
1434 1.48 augustss splx(s);
1435 1.1 augustss }
1436 1.1 augustss
1437 1.52 augustss #ifdef OHCI_DEBUG
1438 1.1 augustss void
1439 1.1 augustss ohci_dump_tds(std)
1440 1.1 augustss ohci_soft_td_t *std;
1441 1.1 augustss {
1442 1.1 augustss for (; std; std = std->nexttd)
1443 1.1 augustss ohci_dump_td(std);
1444 1.1 augustss }
1445 1.1 augustss
1446 1.1 augustss void
1447 1.1 augustss ohci_dump_td(std)
1448 1.1 augustss ohci_soft_td_t *std;
1449 1.1 augustss {
1450 1.41 augustss DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1451 1.41 augustss "nexttd=0x%08lx be=0x%08lx\n",
1452 1.41 augustss std, (u_long)std->physaddr,
1453 1.41 augustss (int)LE(std->td.td_flags),
1454 1.41 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1455 1.41 augustss OHCI_TD_GET_DI(LE(std->td.td_flags)),
1456 1.41 augustss OHCI_TD_GET_EC(LE(std->td.td_flags)),
1457 1.41 augustss OHCI_TD_GET_CC(LE(std->td.td_flags)),
1458 1.41 augustss (u_long)LE(std->td.td_cbp),
1459 1.41 augustss (u_long)LE(std->td.td_nexttd), (u_long)LE(std->td.td_be)));
1460 1.1 augustss }
1461 1.1 augustss
1462 1.1 augustss void
1463 1.1 augustss ohci_dump_ed(sed)
1464 1.1 augustss ohci_soft_ed_t *sed;
1465 1.1 augustss {
1466 1.41 augustss DPRINTF(("ED(%p) at %08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1467 1.41 augustss "headp=%b nexted=0x%08lx\n",
1468 1.41 augustss sed, (u_long)sed->physaddr,
1469 1.41 augustss OHCI_ED_GET_FA(LE(sed->ed.ed_flags)),
1470 1.41 augustss OHCI_ED_GET_EN(LE(sed->ed.ed_flags)),
1471 1.41 augustss OHCI_ED_GET_MAXP(LE(sed->ed.ed_flags)),
1472 1.41 augustss (int)LE(sed->ed.ed_flags),
1473 1.41 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1474 1.41 augustss (u_long)LE(sed->ed.ed_tailp),
1475 1.52 augustss (u_long)LE(sed->ed.ed_headp),
1476 1.52 augustss "\20\1HALT\2CARRY",
1477 1.41 augustss (u_long)LE(sed->ed.ed_nexted)));
1478 1.1 augustss }
1479 1.1 augustss #endif
1480 1.1 augustss
1481 1.1 augustss usbd_status
1482 1.1 augustss ohci_open(pipe)
1483 1.1 augustss usbd_pipe_handle pipe;
1484 1.1 augustss {
1485 1.1 augustss usbd_device_handle dev = pipe->device;
1486 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1487 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1488 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1489 1.1 augustss u_int8_t addr = dev->address;
1490 1.1 augustss ohci_soft_ed_t *sed;
1491 1.1 augustss ohci_soft_td_t *std;
1492 1.53 augustss usbd_status err;
1493 1.1 augustss int s;
1494 1.1 augustss
1495 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1496 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1497 1.1 augustss if (addr == sc->sc_addr) {
1498 1.1 augustss switch (ed->bEndpointAddress) {
1499 1.1 augustss case USB_CONTROL_ENDPOINT:
1500 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1501 1.1 augustss break;
1502 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
1503 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1504 1.1 augustss break;
1505 1.1 augustss default:
1506 1.1 augustss return (USBD_INVAL);
1507 1.1 augustss }
1508 1.1 augustss } else {
1509 1.1 augustss sed = ohci_alloc_sed(sc);
1510 1.53 augustss if (sed == NULL)
1511 1.1 augustss goto bad0;
1512 1.1 augustss std = ohci_alloc_std(sc);
1513 1.53 augustss if (std == NULL)
1514 1.1 augustss goto bad1;
1515 1.1 augustss opipe->sed = sed;
1516 1.1 augustss opipe->tail = std;
1517 1.39 augustss sed->ed.ed_flags = LE(
1518 1.1 augustss OHCI_ED_SET_FA(addr) |
1519 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1520 1.1 augustss OHCI_ED_DIR_TD |
1521 1.1 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) |
1522 1.1 augustss ((ed->bmAttributes & UE_XFERTYPE) == UE_ISOCHRONOUS ?
1523 1.1 augustss OHCI_ED_FORMAT_ISO : OHCI_ED_FORMAT_GEN) |
1524 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1525 1.39 augustss sed->ed.ed_headp = sed->ed.ed_tailp = LE(std->physaddr);
1526 1.1 augustss
1527 1.1 augustss switch (ed->bmAttributes & UE_XFERTYPE) {
1528 1.1 augustss case UE_CONTROL:
1529 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1530 1.53 augustss err = usb_allocmem(&sc->sc_bus,
1531 1.53 augustss sizeof(usb_device_request_t),
1532 1.53 augustss 0, &opipe->u.ctl.reqdma);
1533 1.53 augustss if (err)
1534 1.1 augustss goto bad;
1535 1.1 augustss s = splusb();
1536 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1537 1.1 augustss splx(s);
1538 1.1 augustss break;
1539 1.1 augustss case UE_INTERRUPT:
1540 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1541 1.1 augustss return (ohci_device_setintr(sc, opipe, ed->bInterval));
1542 1.1 augustss case UE_ISOCHRONOUS:
1543 1.1 augustss printf("ohci_open: open iso unimplemented\n");
1544 1.43 augustss return (USBD_INVAL);
1545 1.1 augustss case UE_BULK:
1546 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1547 1.3 augustss s = splusb();
1548 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1549 1.3 augustss splx(s);
1550 1.3 augustss break;
1551 1.1 augustss }
1552 1.1 augustss }
1553 1.1 augustss return (USBD_NORMAL_COMPLETION);
1554 1.1 augustss
1555 1.1 augustss bad:
1556 1.1 augustss ohci_free_std(sc, std);
1557 1.1 augustss bad1:
1558 1.1 augustss ohci_free_sed(sc, sed);
1559 1.1 augustss bad0:
1560 1.1 augustss return (USBD_NOMEM);
1561 1.1 augustss
1562 1.1 augustss }
1563 1.1 augustss
1564 1.1 augustss /*
1565 1.34 augustss * Close a reqular pipe.
1566 1.34 augustss * Assumes that there are no pending transactions.
1567 1.34 augustss */
1568 1.34 augustss void
1569 1.34 augustss ohci_close_pipe(pipe, head)
1570 1.34 augustss usbd_pipe_handle pipe;
1571 1.34 augustss ohci_soft_ed_t *head;
1572 1.34 augustss {
1573 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1574 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1575 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
1576 1.34 augustss int s;
1577 1.34 augustss
1578 1.34 augustss s = splusb();
1579 1.34 augustss #ifdef DIAGNOSTIC
1580 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
1581 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1582 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK))) {
1583 1.39 augustss ohci_physaddr_t td = sed->ed.ed_headp;
1584 1.34 augustss ohci_soft_td_t *std;
1585 1.34 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1586 1.53 augustss std != NULL;
1587 1.34 augustss std = LIST_NEXT(std, hnext))
1588 1.34 augustss if (std->physaddr == td)
1589 1.34 augustss break;
1590 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1591 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
1592 1.39 augustss (int)LE(sed->ed.ed_headp), (int)LE(sed->ed.ed_tailp),
1593 1.34 augustss pipe, std);
1594 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
1595 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
1596 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
1597 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
1598 1.34 augustss }
1599 1.34 augustss #endif
1600 1.34 augustss ohci_rem_ed(sed, head);
1601 1.34 augustss splx(s);
1602 1.34 augustss ohci_free_std(sc, opipe->tail);
1603 1.34 augustss ohci_free_sed(sc, opipe->sed);
1604 1.34 augustss }
1605 1.34 augustss
1606 1.34 augustss /*
1607 1.34 augustss * Abort a device request.
1608 1.34 augustss * If this routine is called at splusb() it guarantees that the request
1609 1.34 augustss * will be removed from the hardware scheduling and that the callback
1610 1.34 augustss * for it will be called with USBD_CANCELLED status.
1611 1.34 augustss * It's impossible to guarantee that the requested transfer will not
1612 1.34 augustss * have happened since the hardware runs concurrently.
1613 1.34 augustss * If the transaction has already happened we rely on the ordinary
1614 1.34 augustss * interrupt processing to process it.
1615 1.34 augustss */
1616 1.34 augustss void
1617 1.54 augustss ohci_abort_xfer(xfer, status)
1618 1.53 augustss usbd_xfer_handle xfer;
1619 1.38 augustss usbd_status status;
1620 1.34 augustss {
1621 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1622 1.34 augustss ohci_soft_ed_t *sed;
1623 1.34 augustss
1624 1.54 augustss DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe));
1625 1.34 augustss
1626 1.53 augustss xfer->status = status;
1627 1.34 augustss
1628 1.53 augustss usb_untimeout(ohci_timeout, xfer, xfer->timo_handle);
1629 1.34 augustss
1630 1.34 augustss sed = opipe->sed;
1631 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
1632 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP); /* force hardware skip */
1633 1.34 augustss
1634 1.53 augustss if (xfer->device->bus->intr_context) {
1635 1.44 augustss /* We have no process context, so we can't use tsleep(). */
1636 1.54 augustss timeout(ohci_abort_xfer_end, xfer, hz / USB_FRAMES_PER_SECOND);
1637 1.44 augustss } else {
1638 1.55 augustss #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
1639 1.55 augustss KASSERT(intr_nesting_level == 0,
1640 1.55 augustss ("ohci_abort_req in interrupt context"));
1641 1.55 augustss #endif
1642 1.38 augustss usb_delay_ms(opipe->pipe.device->bus, 1);
1643 1.54 augustss ohci_abort_xfer_end(xfer);
1644 1.38 augustss }
1645 1.38 augustss }
1646 1.38 augustss
1647 1.38 augustss void
1648 1.54 augustss ohci_abort_xfer_end(v)
1649 1.38 augustss void *v;
1650 1.38 augustss {
1651 1.53 augustss usbd_xfer_handle xfer = v;
1652 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1653 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1654 1.38 augustss ohci_soft_ed_t *sed;
1655 1.38 augustss ohci_soft_td_t *p, *n;
1656 1.38 augustss int s;
1657 1.38 augustss
1658 1.38 augustss s = splusb();
1659 1.38 augustss
1660 1.53 augustss p = xfer->hcpriv;
1661 1.34 augustss #ifdef DIAGNOSTIC
1662 1.55 augustss if (p == NULL) {
1663 1.54 augustss printf("ohci_abort_xfer: hcpriv==0\n");
1664 1.38 augustss return;
1665 1.38 augustss }
1666 1.34 augustss #endif
1667 1.53 augustss for (; p->xfer == xfer; p = n) {
1668 1.38 augustss n = p->nexttd;
1669 1.38 augustss ohci_hash_rem_td(sc, p);
1670 1.38 augustss ohci_free_std(sc, p);
1671 1.34 augustss }
1672 1.34 augustss
1673 1.38 augustss sed = opipe->sed;
1674 1.54 augustss DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n",
1675 1.39 augustss (int)LE(p->physaddr), (int)LE(sed->ed.ed_tailp)));
1676 1.39 augustss sed->ed.ed_headp = p->physaddr; /* unlink TDs */
1677 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP); /* remove hardware skip */
1678 1.38 augustss
1679 1.53 augustss usb_transfer_complete(xfer);
1680 1.38 augustss
1681 1.34 augustss splx(s);
1682 1.34 augustss }
1683 1.34 augustss
1684 1.34 augustss /*
1685 1.1 augustss * Data structures and routines to emulate the root hub.
1686 1.1 augustss */
1687 1.53 augustss static usb_device_descriptor_t ohci_devd = {
1688 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
1689 1.1 augustss UDESC_DEVICE, /* type */
1690 1.1 augustss {0x00, 0x01}, /* USB version */
1691 1.1 augustss UCLASS_HUB, /* class */
1692 1.1 augustss USUBCLASS_HUB, /* subclass */
1693 1.1 augustss 0, /* protocol */
1694 1.1 augustss 64, /* max packet */
1695 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
1696 1.1 augustss 1,2,0, /* string indicies */
1697 1.1 augustss 1 /* # of configurations */
1698 1.1 augustss };
1699 1.1 augustss
1700 1.53 augustss static usb_config_descriptor_t ohci_confd = {
1701 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
1702 1.1 augustss UDESC_CONFIG,
1703 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
1704 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
1705 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
1706 1.1 augustss 1,
1707 1.1 augustss 1,
1708 1.1 augustss 0,
1709 1.1 augustss UC_SELF_POWERED,
1710 1.1 augustss 0 /* max power */
1711 1.1 augustss };
1712 1.1 augustss
1713 1.53 augustss static usb_interface_descriptor_t ohci_ifcd = {
1714 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
1715 1.1 augustss UDESC_INTERFACE,
1716 1.1 augustss 0,
1717 1.1 augustss 0,
1718 1.1 augustss 1,
1719 1.1 augustss UCLASS_HUB,
1720 1.1 augustss USUBCLASS_HUB,
1721 1.1 augustss 0,
1722 1.1 augustss 0
1723 1.1 augustss };
1724 1.1 augustss
1725 1.53 augustss static usb_endpoint_descriptor_t ohci_endpd = {
1726 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
1727 1.1 augustss UDESC_ENDPOINT,
1728 1.40 augustss UE_DIR_IN | OHCI_INTR_ENDPT,
1729 1.1 augustss UE_INTERRUPT,
1730 1.1 augustss {8, 0}, /* max packet */
1731 1.1 augustss 255
1732 1.1 augustss };
1733 1.1 augustss
1734 1.53 augustss static usb_hub_descriptor_t ohci_hubd = {
1735 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
1736 1.1 augustss UDESC_HUB,
1737 1.1 augustss 0,
1738 1.1 augustss {0,0},
1739 1.1 augustss 0,
1740 1.1 augustss 0,
1741 1.1 augustss {0},
1742 1.1 augustss };
1743 1.1 augustss
1744 1.55 augustss static int
1745 1.1 augustss ohci_str(p, l, s)
1746 1.1 augustss usb_string_descriptor_t *p;
1747 1.1 augustss int l;
1748 1.1 augustss char *s;
1749 1.1 augustss {
1750 1.1 augustss int i;
1751 1.1 augustss
1752 1.1 augustss if (l == 0)
1753 1.1 augustss return (0);
1754 1.1 augustss p->bLength = 2 * strlen(s) + 2;
1755 1.1 augustss if (l == 1)
1756 1.1 augustss return (1);
1757 1.1 augustss p->bDescriptorType = UDESC_STRING;
1758 1.1 augustss l -= 2;
1759 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
1760 1.1 augustss USETW2(p->bString[i], 0, s[i]);
1761 1.1 augustss return (2*i+2);
1762 1.1 augustss }
1763 1.1 augustss
1764 1.1 augustss /*
1765 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
1766 1.1 augustss */
1767 1.55 augustss static usbd_status
1768 1.53 augustss ohci_root_ctrl_transfer(xfer)
1769 1.53 augustss usbd_xfer_handle xfer;
1770 1.1 augustss {
1771 1.53 augustss usbd_status err;
1772 1.17 augustss
1773 1.46 augustss /* Insert last in queue. */
1774 1.53 augustss err = usb_insert_transfer(xfer);
1775 1.53 augustss if (err)
1776 1.53 augustss return (err);
1777 1.46 augustss
1778 1.46 augustss /* Pipe isn't running, start first */
1779 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
1780 1.17 augustss }
1781 1.17 augustss
1782 1.55 augustss static usbd_status
1783 1.53 augustss ohci_root_ctrl_start(xfer)
1784 1.53 augustss usbd_xfer_handle xfer;
1785 1.17 augustss {
1786 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
1787 1.1 augustss usb_device_request_t *req;
1788 1.52 augustss void *buf = NULL;
1789 1.1 augustss int port, i;
1790 1.46 augustss int s, len, value, index, l, totlen = 0;
1791 1.1 augustss usb_port_status_t ps;
1792 1.1 augustss usb_hub_descriptor_t hubd;
1793 1.53 augustss usbd_status err;
1794 1.1 augustss u_int32_t v;
1795 1.1 augustss
1796 1.42 augustss #ifdef DIAGNOSTIC
1797 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
1798 1.1 augustss /* XXX panic */
1799 1.1 augustss return (USBD_INVAL);
1800 1.42 augustss #endif
1801 1.53 augustss req = &xfer->request;
1802 1.1 augustss
1803 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
1804 1.1 augustss req->bmRequestType, req->bRequest));
1805 1.1 augustss
1806 1.1 augustss len = UGETW(req->wLength);
1807 1.1 augustss value = UGETW(req->wValue);
1808 1.1 augustss index = UGETW(req->wIndex);
1809 1.43 augustss
1810 1.43 augustss if (len != 0)
1811 1.53 augustss buf = KERNADDR(&xfer->dmabuf);
1812 1.43 augustss
1813 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
1814 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
1815 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
1816 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
1817 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
1818 1.1 augustss /*
1819 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
1820 1.1 augustss * for the integrated root hub.
1821 1.1 augustss */
1822 1.1 augustss break;
1823 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
1824 1.1 augustss if (len > 0) {
1825 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
1826 1.1 augustss totlen = 1;
1827 1.1 augustss }
1828 1.1 augustss break;
1829 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
1830 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
1831 1.1 augustss switch(value >> 8) {
1832 1.1 augustss case UDESC_DEVICE:
1833 1.1 augustss if ((value & 0xff) != 0) {
1834 1.53 augustss err = USBD_IOERROR;
1835 1.1 augustss goto ret;
1836 1.1 augustss }
1837 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
1838 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
1839 1.1 augustss memcpy(buf, &ohci_devd, l);
1840 1.1 augustss break;
1841 1.1 augustss case UDESC_CONFIG:
1842 1.1 augustss if ((value & 0xff) != 0) {
1843 1.53 augustss err = USBD_IOERROR;
1844 1.1 augustss goto ret;
1845 1.1 augustss }
1846 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
1847 1.1 augustss memcpy(buf, &ohci_confd, l);
1848 1.1 augustss buf = (char *)buf + l;
1849 1.1 augustss len -= l;
1850 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
1851 1.1 augustss totlen += l;
1852 1.1 augustss memcpy(buf, &ohci_ifcd, l);
1853 1.1 augustss buf = (char *)buf + l;
1854 1.1 augustss len -= l;
1855 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
1856 1.1 augustss totlen += l;
1857 1.1 augustss memcpy(buf, &ohci_endpd, l);
1858 1.1 augustss break;
1859 1.1 augustss case UDESC_STRING:
1860 1.1 augustss if (len == 0)
1861 1.1 augustss break;
1862 1.1 augustss *(u_int8_t *)buf = 0;
1863 1.1 augustss totlen = 1;
1864 1.1 augustss switch (value & 0xff) {
1865 1.1 augustss case 1: /* Vendor */
1866 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
1867 1.1 augustss break;
1868 1.1 augustss case 2: /* Product */
1869 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
1870 1.1 augustss break;
1871 1.1 augustss }
1872 1.1 augustss break;
1873 1.1 augustss default:
1874 1.53 augustss err = USBD_IOERROR;
1875 1.1 augustss goto ret;
1876 1.1 augustss }
1877 1.1 augustss break;
1878 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
1879 1.1 augustss if (len > 0) {
1880 1.1 augustss *(u_int8_t *)buf = 0;
1881 1.1 augustss totlen = 1;
1882 1.1 augustss }
1883 1.1 augustss break;
1884 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
1885 1.1 augustss if (len > 1) {
1886 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
1887 1.1 augustss totlen = 2;
1888 1.1 augustss }
1889 1.1 augustss break;
1890 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
1891 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
1892 1.1 augustss if (len > 1) {
1893 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
1894 1.1 augustss totlen = 2;
1895 1.1 augustss }
1896 1.1 augustss break;
1897 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
1898 1.1 augustss if (value >= USB_MAX_DEVICES) {
1899 1.53 augustss err = USBD_IOERROR;
1900 1.1 augustss goto ret;
1901 1.1 augustss }
1902 1.1 augustss sc->sc_addr = value;
1903 1.1 augustss break;
1904 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
1905 1.1 augustss if (value != 0 && value != 1) {
1906 1.53 augustss err = USBD_IOERROR;
1907 1.1 augustss goto ret;
1908 1.1 augustss }
1909 1.1 augustss sc->sc_conf = value;
1910 1.1 augustss break;
1911 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
1912 1.1 augustss break;
1913 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
1914 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
1915 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
1916 1.53 augustss err = USBD_IOERROR;
1917 1.1 augustss goto ret;
1918 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
1919 1.1 augustss break;
1920 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
1921 1.1 augustss break;
1922 1.1 augustss /* Hub requests */
1923 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
1924 1.1 augustss break;
1925 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
1926 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
1927 1.14 augustss "port=%d feature=%d\n",
1928 1.1 augustss index, value));
1929 1.1 augustss if (index < 1 || index > sc->sc_noport) {
1930 1.53 augustss err = USBD_IOERROR;
1931 1.1 augustss goto ret;
1932 1.1 augustss }
1933 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
1934 1.1 augustss switch(value) {
1935 1.1 augustss case UHF_PORT_ENABLE:
1936 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
1937 1.1 augustss break;
1938 1.1 augustss case UHF_PORT_SUSPEND:
1939 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
1940 1.1 augustss break;
1941 1.1 augustss case UHF_PORT_POWER:
1942 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
1943 1.1 augustss break;
1944 1.1 augustss case UHF_C_PORT_CONNECTION:
1945 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
1946 1.1 augustss break;
1947 1.1 augustss case UHF_C_PORT_ENABLE:
1948 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
1949 1.1 augustss break;
1950 1.1 augustss case UHF_C_PORT_SUSPEND:
1951 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
1952 1.1 augustss break;
1953 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1954 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
1955 1.1 augustss break;
1956 1.1 augustss case UHF_C_PORT_RESET:
1957 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
1958 1.1 augustss break;
1959 1.1 augustss default:
1960 1.53 augustss err = USBD_IOERROR;
1961 1.1 augustss goto ret;
1962 1.1 augustss }
1963 1.1 augustss switch(value) {
1964 1.1 augustss case UHF_C_PORT_CONNECTION:
1965 1.1 augustss case UHF_C_PORT_ENABLE:
1966 1.1 augustss case UHF_C_PORT_SUSPEND:
1967 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
1968 1.1 augustss case UHF_C_PORT_RESET:
1969 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
1970 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
1971 1.1 augustss ohci_rhsc_able(sc, 1);
1972 1.1 augustss break;
1973 1.1 augustss default:
1974 1.1 augustss break;
1975 1.1 augustss }
1976 1.1 augustss break;
1977 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
1978 1.1 augustss if (value != 0) {
1979 1.53 augustss err = USBD_IOERROR;
1980 1.1 augustss goto ret;
1981 1.1 augustss }
1982 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
1983 1.1 augustss hubd = ohci_hubd;
1984 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
1985 1.15 augustss USETW(hubd.wHubCharacteristics,
1986 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
1987 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
1988 1.1 augustss /* XXX overcurrent */
1989 1.1 augustss );
1990 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
1991 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
1992 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
1993 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
1994 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
1995 1.1 augustss l = min(len, hubd.bDescLength);
1996 1.1 augustss totlen = l;
1997 1.1 augustss memcpy(buf, &hubd, l);
1998 1.1 augustss break;
1999 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2000 1.1 augustss if (len != 4) {
2001 1.53 augustss err = USBD_IOERROR;
2002 1.1 augustss goto ret;
2003 1.1 augustss }
2004 1.1 augustss memset(buf, 0, len); /* ? XXX */
2005 1.1 augustss totlen = len;
2006 1.1 augustss break;
2007 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2008 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2009 1.1 augustss index));
2010 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2011 1.53 augustss err = USBD_IOERROR;
2012 1.1 augustss goto ret;
2013 1.1 augustss }
2014 1.1 augustss if (len != 4) {
2015 1.53 augustss err = USBD_IOERROR;
2016 1.1 augustss goto ret;
2017 1.1 augustss }
2018 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2019 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2020 1.1 augustss v));
2021 1.1 augustss USETW(ps.wPortStatus, v);
2022 1.1 augustss USETW(ps.wPortChange, v >> 16);
2023 1.1 augustss l = min(len, sizeof ps);
2024 1.1 augustss memcpy(buf, &ps, l);
2025 1.1 augustss totlen = l;
2026 1.1 augustss break;
2027 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2028 1.53 augustss err = USBD_IOERROR;
2029 1.1 augustss goto ret;
2030 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2031 1.1 augustss break;
2032 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2033 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2034 1.53 augustss err = USBD_IOERROR;
2035 1.1 augustss goto ret;
2036 1.1 augustss }
2037 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2038 1.1 augustss switch(value) {
2039 1.1 augustss case UHF_PORT_ENABLE:
2040 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2041 1.1 augustss break;
2042 1.1 augustss case UHF_PORT_SUSPEND:
2043 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2044 1.1 augustss break;
2045 1.1 augustss case UHF_PORT_RESET:
2046 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2047 1.14 augustss index));
2048 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2049 1.1 augustss for (i = 0; i < 10; i++) {
2050 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
2051 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2052 1.1 augustss break;
2053 1.1 augustss }
2054 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2055 1.1 augustss index, OREAD4(sc, port)));
2056 1.1 augustss break;
2057 1.1 augustss case UHF_PORT_POWER:
2058 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2059 1.14 augustss "%d\n", index));
2060 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2061 1.1 augustss break;
2062 1.1 augustss default:
2063 1.53 augustss err = USBD_IOERROR;
2064 1.1 augustss goto ret;
2065 1.1 augustss }
2066 1.1 augustss break;
2067 1.1 augustss default:
2068 1.53 augustss err = USBD_IOERROR;
2069 1.1 augustss goto ret;
2070 1.1 augustss }
2071 1.53 augustss xfer->actlen = totlen;
2072 1.53 augustss err = USBD_NORMAL_COMPLETION;
2073 1.1 augustss ret:
2074 1.53 augustss xfer->status = err;
2075 1.46 augustss s = splusb();
2076 1.53 augustss usb_transfer_complete(xfer);
2077 1.46 augustss splx(s);
2078 1.1 augustss return (USBD_IN_PROGRESS);
2079 1.1 augustss }
2080 1.1 augustss
2081 1.1 augustss /* Abort a root control request. */
2082 1.55 augustss static void
2083 1.53 augustss ohci_root_ctrl_abort(xfer)
2084 1.53 augustss usbd_xfer_handle xfer;
2085 1.1 augustss {
2086 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2087 1.1 augustss }
2088 1.1 augustss
2089 1.1 augustss /* Close the root pipe. */
2090 1.55 augustss static void
2091 1.1 augustss ohci_root_ctrl_close(pipe)
2092 1.1 augustss usbd_pipe_handle pipe;
2093 1.1 augustss {
2094 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2095 1.34 augustss /* Nothing to do. */
2096 1.1 augustss }
2097 1.1 augustss
2098 1.55 augustss static usbd_status
2099 1.53 augustss ohci_root_intr_transfer(xfer)
2100 1.53 augustss usbd_xfer_handle xfer;
2101 1.1 augustss {
2102 1.53 augustss usbd_status err;
2103 1.17 augustss
2104 1.46 augustss /* Insert last in queue. */
2105 1.53 augustss err = usb_insert_transfer(xfer);
2106 1.53 augustss if (err)
2107 1.53 augustss return (err);
2108 1.46 augustss
2109 1.46 augustss /* Pipe isn't running, start first */
2110 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2111 1.17 augustss }
2112 1.17 augustss
2113 1.55 augustss static usbd_status
2114 1.53 augustss ohci_root_intr_start(xfer)
2115 1.53 augustss usbd_xfer_handle xfer;
2116 1.17 augustss {
2117 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2118 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2119 1.1 augustss
2120 1.53 augustss sc->sc_intrxfer = xfer;
2121 1.1 augustss
2122 1.1 augustss return (USBD_IN_PROGRESS);
2123 1.1 augustss }
2124 1.1 augustss
2125 1.3 augustss /* Abort a root interrupt request. */
2126 1.55 augustss static void
2127 1.53 augustss ohci_root_intr_abort(xfer)
2128 1.53 augustss usbd_xfer_handle xfer;
2129 1.1 augustss {
2130 1.53 augustss int s;
2131 1.53 augustss
2132 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2133 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2134 1.53 augustss xfer->pipe->intrxfer = NULL;
2135 1.51 augustss }
2136 1.53 augustss xfer->status = USBD_CANCELLED;
2137 1.53 augustss s = splusb();
2138 1.53 augustss usb_transfer_complete(xfer);
2139 1.53 augustss splx(s);
2140 1.1 augustss }
2141 1.1 augustss
2142 1.1 augustss /* Close the root pipe. */
2143 1.55 augustss static void
2144 1.1 augustss ohci_root_intr_close(pipe)
2145 1.1 augustss usbd_pipe_handle pipe;
2146 1.1 augustss {
2147 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2148 1.1 augustss
2149 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2150 1.34 augustss
2151 1.53 augustss sc->sc_intrxfer = NULL;
2152 1.1 augustss }
2153 1.1 augustss
2154 1.1 augustss /************************/
2155 1.1 augustss
2156 1.55 augustss static usbd_status
2157 1.53 augustss ohci_device_ctrl_transfer(xfer)
2158 1.53 augustss usbd_xfer_handle xfer;
2159 1.1 augustss {
2160 1.53 augustss usbd_status err;
2161 1.17 augustss
2162 1.46 augustss /* Insert last in queue. */
2163 1.53 augustss err = usb_insert_transfer(xfer);
2164 1.53 augustss if (err)
2165 1.53 augustss return (err);
2166 1.46 augustss
2167 1.46 augustss /* Pipe isn't running, start first */
2168 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2169 1.17 augustss }
2170 1.17 augustss
2171 1.55 augustss static usbd_status
2172 1.53 augustss ohci_device_ctrl_start(xfer)
2173 1.53 augustss usbd_xfer_handle xfer;
2174 1.17 augustss {
2175 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2176 1.53 augustss usbd_status err;
2177 1.1 augustss
2178 1.42 augustss #ifdef DIAGNOSTIC
2179 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2180 1.1 augustss /* XXX panic */
2181 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2182 1.1 augustss return (USBD_INVAL);
2183 1.1 augustss }
2184 1.42 augustss #endif
2185 1.1 augustss
2186 1.53 augustss err = ohci_device_request(xfer);
2187 1.53 augustss if (err)
2188 1.53 augustss return (err);
2189 1.1 augustss
2190 1.6 augustss if (sc->sc_bus.use_polling)
2191 1.53 augustss ohci_waitintr(sc, xfer);
2192 1.1 augustss return (USBD_IN_PROGRESS);
2193 1.1 augustss }
2194 1.1 augustss
2195 1.1 augustss /* Abort a device control request. */
2196 1.55 augustss static void
2197 1.53 augustss ohci_device_ctrl_abort(xfer)
2198 1.53 augustss usbd_xfer_handle xfer;
2199 1.1 augustss {
2200 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2201 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2202 1.1 augustss }
2203 1.1 augustss
2204 1.1 augustss /* Close a device control pipe. */
2205 1.55 augustss static void
2206 1.1 augustss ohci_device_ctrl_close(pipe)
2207 1.1 augustss usbd_pipe_handle pipe;
2208 1.1 augustss {
2209 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2210 1.1 augustss
2211 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2212 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2213 1.3 augustss }
2214 1.3 augustss
2215 1.3 augustss /************************/
2216 1.37 augustss
2217 1.55 augustss static void
2218 1.37 augustss ohci_device_clear_toggle(pipe)
2219 1.37 augustss usbd_pipe_handle pipe;
2220 1.37 augustss {
2221 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2222 1.37 augustss
2223 1.39 augustss opipe->sed->ed.ed_tailp &= LE(~OHCI_TOGGLECARRY);
2224 1.37 augustss }
2225 1.37 augustss
2226 1.55 augustss static void
2227 1.37 augustss ohci_noop(pipe)
2228 1.37 augustss usbd_pipe_handle pipe;
2229 1.37 augustss {
2230 1.37 augustss }
2231 1.3 augustss
2232 1.55 augustss static usbd_status
2233 1.53 augustss ohci_device_bulk_transfer(xfer)
2234 1.53 augustss usbd_xfer_handle xfer;
2235 1.3 augustss {
2236 1.53 augustss usbd_status err;
2237 1.17 augustss
2238 1.46 augustss /* Insert last in queue. */
2239 1.53 augustss err = usb_insert_transfer(xfer);
2240 1.53 augustss if (err)
2241 1.53 augustss return (err);
2242 1.46 augustss
2243 1.46 augustss /* Pipe isn't running, start first */
2244 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2245 1.17 augustss }
2246 1.17 augustss
2247 1.55 augustss static usbd_status
2248 1.53 augustss ohci_device_bulk_start(xfer)
2249 1.53 augustss usbd_xfer_handle xfer;
2250 1.17 augustss {
2251 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2252 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2253 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2254 1.3 augustss int addr = dev->address;
2255 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2256 1.3 augustss ohci_soft_ed_t *sed;
2257 1.40 augustss int s, len, isread, endpt;
2258 1.53 augustss usbd_status err;
2259 1.3 augustss
2260 1.34 augustss #ifdef DIAGNOSTIC
2261 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
2262 1.3 augustss /* XXX panic */
2263 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2264 1.3 augustss return (USBD_INVAL);
2265 1.3 augustss }
2266 1.34 augustss #endif
2267 1.3 augustss
2268 1.53 augustss len = xfer->length;
2269 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2270 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2271 1.3 augustss sed = opipe->sed;
2272 1.3 augustss
2273 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2274 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2275 1.40 augustss endpt));
2276 1.34 augustss
2277 1.32 augustss opipe->u.bulk.isread = isread;
2278 1.3 augustss opipe->u.bulk.length = len;
2279 1.3 augustss
2280 1.3 augustss /* Update device address */
2281 1.39 augustss sed->ed.ed_flags = LE(
2282 1.39 augustss (LE(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2283 1.16 augustss OHCI_ED_SET_FA(addr));
2284 1.3 augustss
2285 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2286 1.48 augustss data = opipe->tail;
2287 1.53 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread,
2288 1.53 augustss xfer->flags & USBD_SHORT_XFER_OK,
2289 1.53 augustss &xfer->dmabuf, data, &tail);
2290 1.53 augustss if (err)
2291 1.53 augustss return (err);
2292 1.48 augustss
2293 1.53 augustss tail->xfer = NULL;
2294 1.53 augustss xfer->hcpriv = data;
2295 1.3 augustss
2296 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2297 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2298 1.48 augustss (int)LE(sed->ed.ed_flags), (int)LE(data->td.td_flags),
2299 1.48 augustss (int)LE(data->td.td_cbp), (int)LE(data->td.td_be)));
2300 1.34 augustss
2301 1.52 augustss #ifdef OHCI_DEBUG
2302 1.34 augustss if (ohcidebug > 4) {
2303 1.34 augustss ohci_dump_ed(sed);
2304 1.48 augustss ohci_dump_tds(data);
2305 1.34 augustss }
2306 1.34 augustss #endif
2307 1.34 augustss
2308 1.3 augustss /* Insert ED in schedule */
2309 1.3 augustss s = splusb();
2310 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2311 1.53 augustss tdp->xfer = xfer;
2312 1.48 augustss ohci_hash_add_td(sc, tdp);
2313 1.48 augustss }
2314 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2315 1.3 augustss opipe->tail = tail;
2316 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2317 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2318 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2319 1.53 augustss usb_timeout(ohci_timeout, xfer,
2320 1.53 augustss MS_TO_TICKS(xfer->timeout), xfer->timo_handle);
2321 1.15 augustss }
2322 1.34 augustss
2323 1.52 augustss #if 0
2324 1.52 augustss /* This goes wrong if we are too slow. */
2325 1.34 augustss if (ohcidebug > 5) {
2326 1.55 augustss usb_delay_ms(&sc->sc_bus, 5);
2327 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2328 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2329 1.34 augustss ohci_dump_ed(sed);
2330 1.48 augustss ohci_dump_tds(data);
2331 1.34 augustss }
2332 1.34 augustss #endif
2333 1.34 augustss
2334 1.3 augustss splx(s);
2335 1.3 augustss
2336 1.3 augustss return (USBD_IN_PROGRESS);
2337 1.3 augustss }
2338 1.3 augustss
2339 1.55 augustss static void
2340 1.53 augustss ohci_device_bulk_abort(xfer)
2341 1.53 augustss usbd_xfer_handle xfer;
2342 1.3 augustss {
2343 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2344 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2345 1.3 augustss }
2346 1.3 augustss
2347 1.34 augustss /*
2348 1.34 augustss * Close a device bulk pipe.
2349 1.34 augustss */
2350 1.55 augustss static void
2351 1.3 augustss ohci_device_bulk_close(pipe)
2352 1.3 augustss usbd_pipe_handle pipe;
2353 1.3 augustss {
2354 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2355 1.3 augustss
2356 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2357 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2358 1.1 augustss }
2359 1.1 augustss
2360 1.1 augustss /************************/
2361 1.1 augustss
2362 1.55 augustss static usbd_status
2363 1.53 augustss ohci_device_intr_transfer(xfer)
2364 1.53 augustss usbd_xfer_handle xfer;
2365 1.17 augustss {
2366 1.53 augustss usbd_status err;
2367 1.17 augustss
2368 1.46 augustss /* Insert last in queue. */
2369 1.53 augustss err = usb_insert_transfer(xfer);
2370 1.53 augustss if (err)
2371 1.53 augustss return (err);
2372 1.46 augustss
2373 1.46 augustss /* Pipe isn't running, start first */
2374 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2375 1.17 augustss }
2376 1.17 augustss
2377 1.55 augustss static usbd_status
2378 1.53 augustss ohci_device_intr_start(xfer)
2379 1.53 augustss usbd_xfer_handle xfer;
2380 1.1 augustss {
2381 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2382 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2383 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2384 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2385 1.48 augustss ohci_soft_td_t *data, *tail;
2386 1.1 augustss int len;
2387 1.1 augustss int s;
2388 1.1 augustss
2389 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2390 1.14 augustss "flags=%d priv=%p\n",
2391 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
2392 1.1 augustss
2393 1.42 augustss #ifdef DIAGNOSTIC
2394 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
2395 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2396 1.42 augustss #endif
2397 1.1 augustss
2398 1.53 augustss len = xfer->length;
2399 1.1 augustss
2400 1.48 augustss data = opipe->tail;
2401 1.1 augustss tail = ohci_alloc_std(sc);
2402 1.55 augustss if (tail == NULL)
2403 1.43 augustss return (USBD_NOMEM);
2404 1.53 augustss tail->xfer = NULL;
2405 1.1 augustss
2406 1.48 augustss data->td.td_flags = LE(
2407 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2408 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2409 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
2410 1.48 augustss data->td.td_flags |= LE(OHCI_TD_R);
2411 1.53 augustss data->td.td_cbp = LE(DMAADDR(&xfer->dmabuf));
2412 1.48 augustss data->nexttd = tail;
2413 1.48 augustss data->td.td_nexttd = LE(tail->physaddr);
2414 1.48 augustss data->td.td_be = LE(LE(data->td.td_cbp) + len - 1);
2415 1.48 augustss data->len = len;
2416 1.53 augustss data->xfer = xfer;
2417 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2418 1.53 augustss xfer->hcpriv = data;
2419 1.1 augustss
2420 1.52 augustss #ifdef OHCI_DEBUG
2421 1.1 augustss if (ohcidebug > 5) {
2422 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2423 1.1 augustss ohci_dump_ed(sed);
2424 1.48 augustss ohci_dump_tds(data);
2425 1.1 augustss }
2426 1.1 augustss #endif
2427 1.1 augustss
2428 1.1 augustss /* Insert ED in schedule */
2429 1.1 augustss s = splusb();
2430 1.48 augustss ohci_hash_add_td(sc, data);
2431 1.39 augustss sed->ed.ed_tailp = LE(tail->physaddr);
2432 1.1 augustss opipe->tail = tail;
2433 1.39 augustss sed->ed.ed_flags &= LE(~OHCI_ED_SKIP);
2434 1.1 augustss
2435 1.52 augustss #if 0
2436 1.52 augustss /*
2437 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
2438 1.52 augustss * because false references are followed due to the fact that the
2439 1.52 augustss * TD is gone.
2440 1.52 augustss */
2441 1.1 augustss if (ohcidebug > 5) {
2442 1.55 augustss usb_delay_ms(&sc->sc_bus, 5);
2443 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2444 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2445 1.1 augustss ohci_dump_ed(sed);
2446 1.48 augustss ohci_dump_tds(data);
2447 1.1 augustss }
2448 1.1 augustss #endif
2449 1.26 augustss splx(s);
2450 1.1 augustss
2451 1.1 augustss return (USBD_IN_PROGRESS);
2452 1.1 augustss }
2453 1.1 augustss
2454 1.1 augustss /* Abort a device control request. */
2455 1.55 augustss static void
2456 1.53 augustss ohci_device_intr_abort(xfer)
2457 1.53 augustss usbd_xfer_handle xfer;
2458 1.1 augustss {
2459 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2460 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2461 1.55 augustss xfer->pipe->intrxfer = NULL;
2462 1.1 augustss }
2463 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2464 1.1 augustss }
2465 1.1 augustss
2466 1.1 augustss /* Close a device interrupt pipe. */
2467 1.55 augustss static void
2468 1.1 augustss ohci_device_intr_close(pipe)
2469 1.1 augustss usbd_pipe_handle pipe;
2470 1.1 augustss {
2471 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2472 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2473 1.1 augustss int nslots = opipe->u.intr.nslots;
2474 1.1 augustss int pos = opipe->u.intr.pos;
2475 1.1 augustss int j;
2476 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2477 1.1 augustss int s;
2478 1.1 augustss
2479 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2480 1.1 augustss pipe, nslots, pos));
2481 1.1 augustss s = splusb();
2482 1.39 augustss sed->ed.ed_flags |= LE(OHCI_ED_SKIP);
2483 1.39 augustss if ((sed->ed.ed_tailp & LE(OHCI_TAILMASK)) !=
2484 1.39 augustss (sed->ed.ed_headp & LE(OHCI_TAILMASK)))
2485 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2486 1.1 augustss
2487 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2488 1.1 augustss ;
2489 1.53 augustss #ifdef DIAGNOSTIC
2490 1.53 augustss if (p == NULL)
2491 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2492 1.53 augustss #endif
2493 1.1 augustss p->next = sed->next;
2494 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
2495 1.1 augustss splx(s);
2496 1.1 augustss
2497 1.1 augustss for (j = 0; j < nslots; j++)
2498 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2499 1.1 augustss
2500 1.1 augustss ohci_free_std(sc, opipe->tail);
2501 1.1 augustss ohci_free_sed(sc, opipe->sed);
2502 1.1 augustss }
2503 1.1 augustss
2504 1.55 augustss static usbd_status
2505 1.1 augustss ohci_device_setintr(sc, opipe, ival)
2506 1.1 augustss ohci_softc_t *sc;
2507 1.1 augustss struct ohci_pipe *opipe;
2508 1.1 augustss int ival;
2509 1.1 augustss {
2510 1.1 augustss int i, j, s, best;
2511 1.1 augustss u_int npoll, slow, shigh, nslots;
2512 1.1 augustss u_int bestbw, bw;
2513 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2514 1.1 augustss
2515 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2516 1.1 augustss if (ival == 0) {
2517 1.1 augustss printf("ohci_setintr: 0 interval\n");
2518 1.1 augustss return (USBD_INVAL);
2519 1.1 augustss }
2520 1.1 augustss
2521 1.1 augustss npoll = OHCI_NO_INTRS;
2522 1.1 augustss while (npoll > ival)
2523 1.1 augustss npoll /= 2;
2524 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2525 1.1 augustss
2526 1.1 augustss /*
2527 1.1 augustss * We now know which level in the tree the ED must go into.
2528 1.1 augustss * Figure out which slot has most bandwidth left over.
2529 1.1 augustss * Slots to examine:
2530 1.1 augustss * npoll
2531 1.1 augustss * 1 0
2532 1.1 augustss * 2 1 2
2533 1.1 augustss * 4 3 4 5 6
2534 1.1 augustss * 8 7 8 9 10 11 12 13 14
2535 1.1 augustss * N (N-1) .. (N-1+N-1)
2536 1.1 augustss */
2537 1.1 augustss slow = npoll-1;
2538 1.1 augustss shigh = slow + npoll;
2539 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2540 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2541 1.1 augustss bw = 0;
2542 1.1 augustss for (j = 0; j < nslots; j++)
2543 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2544 1.1 augustss if (bw < bestbw) {
2545 1.1 augustss best = i;
2546 1.1 augustss bestbw = bw;
2547 1.1 augustss }
2548 1.1 augustss }
2549 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2550 1.1 augustss best, slow, shigh, bestbw));
2551 1.1 augustss
2552 1.1 augustss s = splusb();
2553 1.1 augustss hsed = sc->sc_eds[best];
2554 1.1 augustss sed->next = hsed->next;
2555 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
2556 1.1 augustss hsed->next = sed;
2557 1.39 augustss hsed->ed.ed_nexted = LE(sed->physaddr);
2558 1.1 augustss splx(s);
2559 1.1 augustss
2560 1.1 augustss for (j = 0; j < nslots; j++)
2561 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2562 1.1 augustss opipe->u.intr.nslots = nslots;
2563 1.1 augustss opipe->u.intr.pos = best;
2564 1.1 augustss
2565 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2566 1.1 augustss return (USBD_NORMAL_COMPLETION);
2567 1.1 augustss }
2568