ohci.c revision 1.90.2.1 1 1.90.2.1 minoura /* $NetBSD: ohci.c,v 1.90.2.1 2000/06/22 17:08:31 minoura Exp $ */
2 1.55 augustss /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */
3 1.1 augustss
4 1.1 augustss /*
5 1.1 augustss * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 1.1 augustss * All rights reserved.
7 1.1 augustss *
8 1.11 augustss * This code is derived from software contributed to The NetBSD Foundation
9 1.89 augustss * by Lennart Augustsson (lennart (at) augustsson.net) at
10 1.11 augustss * Carlstedt Research & Technology.
11 1.1 augustss *
12 1.1 augustss * Redistribution and use in source and binary forms, with or without
13 1.1 augustss * modification, are permitted provided that the following conditions
14 1.1 augustss * are met:
15 1.1 augustss * 1. Redistributions of source code must retain the above copyright
16 1.1 augustss * notice, this list of conditions and the following disclaimer.
17 1.1 augustss * 2. Redistributions in binary form must reproduce the above copyright
18 1.1 augustss * notice, this list of conditions and the following disclaimer in the
19 1.1 augustss * documentation and/or other materials provided with the distribution.
20 1.1 augustss * 3. All advertising materials mentioning features or use of this software
21 1.1 augustss * must display the following acknowledgement:
22 1.1 augustss * This product includes software developed by the NetBSD
23 1.1 augustss * Foundation, Inc. and its contributors.
24 1.1 augustss * 4. Neither the name of The NetBSD Foundation nor the names of its
25 1.1 augustss * contributors may be used to endorse or promote products derived
26 1.1 augustss * from this software without specific prior written permission.
27 1.1 augustss *
28 1.1 augustss * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 1.1 augustss * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 1.1 augustss * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 1.1 augustss * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 1.1 augustss * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 1.1 augustss * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 1.1 augustss * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 1.1 augustss * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 1.1 augustss * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 1.1 augustss * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 1.1 augustss * POSSIBILITY OF SUCH DAMAGE.
39 1.1 augustss */
40 1.1 augustss
41 1.1 augustss /*
42 1.1 augustss * USB Open Host Controller driver.
43 1.1 augustss *
44 1.30 augustss * OHCI spec: ftp://ftp.compaq.com/pub/supportinformation/papers/hcir1_0a.exe
45 1.30 augustss * USB spec: http://www.usb.org/developers/data/usb11.pdf
46 1.1 augustss */
47 1.1 augustss
48 1.1 augustss #include <sys/param.h>
49 1.1 augustss #include <sys/systm.h>
50 1.1 augustss #include <sys/malloc.h>
51 1.36 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
52 1.55 augustss #include <sys/kernel.h>
53 1.1 augustss #include <sys/device.h>
54 1.55 augustss #include <sys/select.h>
55 1.15 augustss #elif defined(__FreeBSD__)
56 1.15 augustss #include <sys/module.h>
57 1.15 augustss #include <sys/bus.h>
58 1.52 augustss #include <machine/bus_pio.h>
59 1.52 augustss #include <machine/bus_memio.h>
60 1.55 augustss #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
61 1.55 augustss #include <machine/cpu.h>
62 1.55 augustss #endif
63 1.15 augustss #endif
64 1.1 augustss #include <sys/proc.h>
65 1.1 augustss #include <sys/queue.h>
66 1.1 augustss
67 1.4 augustss #include <machine/bus.h>
68 1.16 augustss #include <machine/endian.h>
69 1.4 augustss
70 1.1 augustss #include <dev/usb/usb.h>
71 1.1 augustss #include <dev/usb/usbdi.h>
72 1.1 augustss #include <dev/usb/usbdivar.h>
73 1.38 augustss #include <dev/usb/usb_mem.h>
74 1.1 augustss #include <dev/usb/usb_quirks.h>
75 1.1 augustss
76 1.1 augustss #include <dev/usb/ohcireg.h>
77 1.1 augustss #include <dev/usb/ohcivar.h>
78 1.1 augustss
79 1.15 augustss #if defined(__FreeBSD__)
80 1.15 augustss #include <machine/clock.h>
81 1.55 augustss
82 1.15 augustss #define delay(d) DELAY(d)
83 1.15 augustss #endif
84 1.1 augustss
85 1.36 augustss #if defined(__OpenBSD__)
86 1.36 augustss struct cfdriver ohci_cd = {
87 1.36 augustss NULL, "ohci", DV_DULL
88 1.36 augustss };
89 1.36 augustss #endif
90 1.36 augustss
91 1.52 augustss #ifdef OHCI_DEBUG
92 1.52 augustss #define DPRINTF(x) if (ohcidebug) logprintf x
93 1.52 augustss #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x
94 1.52 augustss int ohcidebug = 0;
95 1.52 augustss #else
96 1.52 augustss #define DPRINTF(x)
97 1.52 augustss #define DPRINTFN(n,x)
98 1.52 augustss #endif
99 1.52 augustss
100 1.16 augustss /*
101 1.16 augustss * The OHCI controller is little endian, so on big endian machines
102 1.16 augustss * the data strored in memory needs to be swapped.
103 1.16 augustss */
104 1.84 augustss #if defined(__FreeBSD__) || defined(__OpenBSD__)
105 1.16 augustss #if BYTE_ORDER == BIG_ENDIAN
106 1.76 tsutsui #define htole32(x) (bswap32(x))
107 1.76 tsutsui #define le32toh(x) (bswap32(x))
108 1.16 augustss #else
109 1.76 tsutsui #define htole32(x) (x)
110 1.76 tsutsui #define le32toh(x) (x)
111 1.76 tsutsui #endif
112 1.16 augustss #endif
113 1.16 augustss
114 1.1 augustss struct ohci_pipe;
115 1.1 augustss
116 1.90.2.1 minoura Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *);
117 1.90.2.1 minoura Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *);
118 1.1 augustss
119 1.90.2.1 minoura Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *);
120 1.90.2.1 minoura Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *);
121 1.1 augustss
122 1.90.2.1 minoura Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *);
123 1.90.2.1 minoura Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *);
124 1.60 augustss
125 1.53 augustss #if 0
126 1.90.2.1 minoura Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *,
127 1.90.2.1 minoura ohci_soft_td_t *);
128 1.53 augustss #endif
129 1.90.2.1 minoura Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *,
130 1.77 augustss ohci_softc_t *, int, int, usbd_xfer_handle,
131 1.90.2.1 minoura ohci_soft_td_t *, ohci_soft_td_t **);
132 1.53 augustss
133 1.90.2.1 minoura Static void ohci_shutdown(void *v);
134 1.90.2.1 minoura Static void ohci_power(int, void *);
135 1.90.2.1 minoura Static usbd_status ohci_open(usbd_pipe_handle);
136 1.90.2.1 minoura Static void ohci_poll(struct usbd_bus *);
137 1.90.2.1 minoura Static void ohci_softintr(struct usbd_bus *);
138 1.90.2.1 minoura Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle);
139 1.90.2.1 minoura Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t);
140 1.90.2.1 minoura Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle);
141 1.90.2.1 minoura
142 1.90.2.1 minoura Static usbd_status ohci_device_request(usbd_xfer_handle xfer);
143 1.90.2.1 minoura Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
144 1.90.2.1 minoura Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *);
145 1.90.2.1 minoura Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *);
146 1.90.2.1 minoura Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *);
147 1.90.2.1 minoura Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t);
148 1.90.2.1 minoura Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *);
149 1.90.2.1 minoura Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *);
150 1.90.2.1 minoura Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t);
151 1.90.2.1 minoura
152 1.90.2.1 minoura Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe);
153 1.90.2.1 minoura Static void ohci_device_isoc_enter(usbd_xfer_handle);
154 1.90.2.1 minoura
155 1.90.2.1 minoura Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t);
156 1.90.2.1 minoura Static void ohci_freem(struct usbd_bus *, usb_dma_t *);
157 1.90.2.1 minoura
158 1.90.2.1 minoura Static usbd_xfer_handle ohci_allocx(struct usbd_bus *);
159 1.90.2.1 minoura Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle);
160 1.90.2.1 minoura
161 1.90.2.1 minoura Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle);
162 1.90.2.1 minoura Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle);
163 1.90.2.1 minoura Static void ohci_root_ctrl_abort(usbd_xfer_handle);
164 1.90.2.1 minoura Static void ohci_root_ctrl_close(usbd_pipe_handle);
165 1.90.2.1 minoura Static void ohci_root_ctrl_done(usbd_xfer_handle);
166 1.90.2.1 minoura
167 1.90.2.1 minoura Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle);
168 1.90.2.1 minoura Static usbd_status ohci_root_intr_start(usbd_xfer_handle);
169 1.90.2.1 minoura Static void ohci_root_intr_abort(usbd_xfer_handle);
170 1.90.2.1 minoura Static void ohci_root_intr_close(usbd_pipe_handle);
171 1.90.2.1 minoura Static void ohci_root_intr_done(usbd_xfer_handle);
172 1.90.2.1 minoura
173 1.90.2.1 minoura Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle);
174 1.90.2.1 minoura Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle);
175 1.90.2.1 minoura Static void ohci_device_ctrl_abort(usbd_xfer_handle);
176 1.90.2.1 minoura Static void ohci_device_ctrl_close(usbd_pipe_handle);
177 1.90.2.1 minoura Static void ohci_device_ctrl_done(usbd_xfer_handle);
178 1.90.2.1 minoura
179 1.90.2.1 minoura Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle);
180 1.90.2.1 minoura Static usbd_status ohci_device_bulk_start(usbd_xfer_handle);
181 1.90.2.1 minoura Static void ohci_device_bulk_abort(usbd_xfer_handle);
182 1.90.2.1 minoura Static void ohci_device_bulk_close(usbd_pipe_handle);
183 1.90.2.1 minoura Static void ohci_device_bulk_done(usbd_xfer_handle);
184 1.90.2.1 minoura
185 1.90.2.1 minoura Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle);
186 1.90.2.1 minoura Static usbd_status ohci_device_intr_start(usbd_xfer_handle);
187 1.90.2.1 minoura Static void ohci_device_intr_abort(usbd_xfer_handle);
188 1.90.2.1 minoura Static void ohci_device_intr_close(usbd_pipe_handle);
189 1.90.2.1 minoura Static void ohci_device_intr_done(usbd_xfer_handle);
190 1.90.2.1 minoura
191 1.90.2.1 minoura Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle);
192 1.90.2.1 minoura Static usbd_status ohci_device_isoc_start(usbd_xfer_handle);
193 1.90.2.1 minoura Static void ohci_device_isoc_abort(usbd_xfer_handle);
194 1.90.2.1 minoura Static void ohci_device_isoc_close(usbd_pipe_handle);
195 1.90.2.1 minoura Static void ohci_device_isoc_done(usbd_xfer_handle);
196 1.90.2.1 minoura
197 1.90.2.1 minoura Static usbd_status ohci_device_setintr(ohci_softc_t *sc,
198 1.90.2.1 minoura struct ohci_pipe *pipe, int ival);
199 1.90.2.1 minoura
200 1.90.2.1 minoura Static int ohci_str(usb_string_descriptor_t *, int, char *);
201 1.90.2.1 minoura
202 1.90.2.1 minoura Static void ohci_timeout(void *);
203 1.90.2.1 minoura Static void ohci_rhsc_able(ohci_softc_t *, int);
204 1.90.2.1 minoura
205 1.90.2.1 minoura Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *);
206 1.90.2.1 minoura Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status);
207 1.90.2.1 minoura Static void ohci_abort_xfer_end(void *);
208 1.53 augustss
209 1.90.2.1 minoura Static void ohci_device_clear_toggle(usbd_pipe_handle pipe);
210 1.90.2.1 minoura Static void ohci_noop(usbd_pipe_handle pipe);
211 1.37 augustss
212 1.52 augustss #ifdef OHCI_DEBUG
213 1.90.2.1 minoura Static void ohci_dumpregs(ohci_softc_t *);
214 1.90.2.1 minoura Static void ohci_dump_tds(ohci_soft_td_t *);
215 1.90.2.1 minoura Static void ohci_dump_td(ohci_soft_td_t *);
216 1.90.2.1 minoura Static void ohci_dump_ed(ohci_soft_ed_t *);
217 1.90.2.1 minoura Static void ohci_dump_itd(ohci_soft_itd_t *);
218 1.90.2.1 minoura Static void ohci_dump_itds(ohci_soft_itd_t *);
219 1.1 augustss #endif
220 1.1 augustss
221 1.88 augustss #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \
222 1.88 augustss BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
223 1.88 augustss #define OWRITE1(sc, r, x) \
224 1.88 augustss do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
225 1.88 augustss #define OWRITE2(sc, r, x) \
226 1.88 augustss do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
227 1.88 augustss #define OWRITE4(sc, r, x) \
228 1.88 augustss do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0)
229 1.88 augustss #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r)))
230 1.88 augustss #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r)))
231 1.88 augustss #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r)))
232 1.1 augustss
233 1.1 augustss /* Reverse the bits in a value 0 .. 31 */
234 1.82 augustss Static u_int8_t revbits[OHCI_NO_INTRS] =
235 1.1 augustss { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c,
236 1.1 augustss 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e,
237 1.1 augustss 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d,
238 1.1 augustss 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f };
239 1.1 augustss
240 1.1 augustss struct ohci_pipe {
241 1.1 augustss struct usbd_pipe pipe;
242 1.1 augustss ohci_soft_ed_t *sed;
243 1.60 augustss union {
244 1.60 augustss ohci_soft_td_t *td;
245 1.60 augustss ohci_soft_itd_t *itd;
246 1.60 augustss } tail;
247 1.1 augustss /* Info needed for different pipe kinds. */
248 1.1 augustss union {
249 1.1 augustss /* Control pipe */
250 1.1 augustss struct {
251 1.4 augustss usb_dma_t reqdma;
252 1.1 augustss u_int length;
253 1.48 augustss ohci_soft_td_t *setup, *data, *stat;
254 1.1 augustss } ctl;
255 1.1 augustss /* Interrupt pipe */
256 1.1 augustss struct {
257 1.1 augustss int nslots;
258 1.1 augustss int pos;
259 1.1 augustss } intr;
260 1.3 augustss /* Bulk pipe */
261 1.3 augustss struct {
262 1.3 augustss u_int length;
263 1.32 augustss int isread;
264 1.3 augustss } bulk;
265 1.43 augustss /* Iso pipe */
266 1.43 augustss struct iso {
267 1.60 augustss int next, inuse;
268 1.43 augustss } iso;
269 1.1 augustss } u;
270 1.1 augustss };
271 1.1 augustss
272 1.1 augustss #define OHCI_INTR_ENDPT 1
273 1.1 augustss
274 1.82 augustss Static struct usbd_bus_methods ohci_bus_methods = {
275 1.42 augustss ohci_open,
276 1.73 augustss ohci_softintr,
277 1.42 augustss ohci_poll,
278 1.42 augustss ohci_allocm,
279 1.42 augustss ohci_freem,
280 1.62 augustss ohci_allocx,
281 1.62 augustss ohci_freex,
282 1.42 augustss };
283 1.42 augustss
284 1.82 augustss Static struct usbd_pipe_methods ohci_root_ctrl_methods = {
285 1.1 augustss ohci_root_ctrl_transfer,
286 1.17 augustss ohci_root_ctrl_start,
287 1.1 augustss ohci_root_ctrl_abort,
288 1.1 augustss ohci_root_ctrl_close,
289 1.37 augustss ohci_noop,
290 1.65 augustss ohci_root_ctrl_done,
291 1.1 augustss };
292 1.1 augustss
293 1.82 augustss Static struct usbd_pipe_methods ohci_root_intr_methods = {
294 1.1 augustss ohci_root_intr_transfer,
295 1.17 augustss ohci_root_intr_start,
296 1.1 augustss ohci_root_intr_abort,
297 1.1 augustss ohci_root_intr_close,
298 1.37 augustss ohci_noop,
299 1.38 augustss ohci_root_intr_done,
300 1.1 augustss };
301 1.1 augustss
302 1.82 augustss Static struct usbd_pipe_methods ohci_device_ctrl_methods = {
303 1.1 augustss ohci_device_ctrl_transfer,
304 1.17 augustss ohci_device_ctrl_start,
305 1.1 augustss ohci_device_ctrl_abort,
306 1.1 augustss ohci_device_ctrl_close,
307 1.37 augustss ohci_noop,
308 1.38 augustss ohci_device_ctrl_done,
309 1.1 augustss };
310 1.1 augustss
311 1.82 augustss Static struct usbd_pipe_methods ohci_device_intr_methods = {
312 1.1 augustss ohci_device_intr_transfer,
313 1.17 augustss ohci_device_intr_start,
314 1.1 augustss ohci_device_intr_abort,
315 1.1 augustss ohci_device_intr_close,
316 1.37 augustss ohci_device_clear_toggle,
317 1.38 augustss ohci_device_intr_done,
318 1.1 augustss };
319 1.1 augustss
320 1.82 augustss Static struct usbd_pipe_methods ohci_device_bulk_methods = {
321 1.3 augustss ohci_device_bulk_transfer,
322 1.17 augustss ohci_device_bulk_start,
323 1.3 augustss ohci_device_bulk_abort,
324 1.3 augustss ohci_device_bulk_close,
325 1.37 augustss ohci_device_clear_toggle,
326 1.38 augustss ohci_device_bulk_done,
327 1.3 augustss };
328 1.3 augustss
329 1.82 augustss Static struct usbd_pipe_methods ohci_device_isoc_methods = {
330 1.43 augustss ohci_device_isoc_transfer,
331 1.43 augustss ohci_device_isoc_start,
332 1.43 augustss ohci_device_isoc_abort,
333 1.43 augustss ohci_device_isoc_close,
334 1.43 augustss ohci_noop,
335 1.43 augustss ohci_device_isoc_done,
336 1.43 augustss };
337 1.43 augustss
338 1.55 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
339 1.47 augustss int
340 1.90.2.1 minoura ohci_activate(device_ptr_t self, enum devact act)
341 1.47 augustss {
342 1.49 augustss struct ohci_softc *sc = (struct ohci_softc *)self;
343 1.47 augustss int rv = 0;
344 1.47 augustss
345 1.47 augustss switch (act) {
346 1.47 augustss case DVACT_ACTIVATE:
347 1.47 augustss return (EOPNOTSUPP);
348 1.47 augustss break;
349 1.47 augustss
350 1.47 augustss case DVACT_DEACTIVATE:
351 1.49 augustss if (sc->sc_child != NULL)
352 1.49 augustss rv = config_deactivate(sc->sc_child);
353 1.83 augustss sc->sc_dying = 1;
354 1.47 augustss break;
355 1.47 augustss }
356 1.47 augustss return (rv);
357 1.47 augustss }
358 1.47 augustss
359 1.47 augustss int
360 1.90.2.1 minoura ohci_detach(struct ohci_softc *sc, int flags)
361 1.47 augustss {
362 1.47 augustss int rv = 0;
363 1.47 augustss
364 1.47 augustss if (sc->sc_child != NULL)
365 1.47 augustss rv = config_detach(sc->sc_child, flags);
366 1.47 augustss
367 1.47 augustss if (rv != 0)
368 1.47 augustss return (rv);
369 1.47 augustss
370 1.71 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
371 1.47 augustss powerhook_disestablish(sc->sc_powerhook);
372 1.59 augustss shutdownhook_disestablish(sc->sc_shutdownhook);
373 1.71 augustss #endif
374 1.59 augustss
375 1.47 augustss /* free data structures XXX */
376 1.47 augustss
377 1.47 augustss return (rv);
378 1.47 augustss }
379 1.55 augustss #endif
380 1.47 augustss
381 1.1 augustss ohci_soft_ed_t *
382 1.90.2.1 minoura ohci_alloc_sed(ohci_softc_t *sc)
383 1.1 augustss {
384 1.1 augustss ohci_soft_ed_t *sed;
385 1.53 augustss usbd_status err;
386 1.1 augustss int i, offs;
387 1.4 augustss usb_dma_t dma;
388 1.1 augustss
389 1.53 augustss if (sc->sc_freeeds == NULL) {
390 1.1 augustss DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n"));
391 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK,
392 1.53 augustss OHCI_ED_ALIGN, &dma);
393 1.53 augustss if (err)
394 1.39 augustss return (0);
395 1.39 augustss for(i = 0; i < OHCI_SED_CHUNK; i++) {
396 1.39 augustss offs = i * OHCI_SED_SIZE;
397 1.39 augustss sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs);
398 1.1 augustss sed->physaddr = DMAADDR(&dma) + offs;
399 1.1 augustss sed->next = sc->sc_freeeds;
400 1.1 augustss sc->sc_freeeds = sed;
401 1.1 augustss }
402 1.1 augustss }
403 1.1 augustss sed = sc->sc_freeeds;
404 1.1 augustss sc->sc_freeeds = sed->next;
405 1.39 augustss memset(&sed->ed, 0, sizeof(ohci_ed_t));
406 1.1 augustss sed->next = 0;
407 1.39 augustss return (sed);
408 1.1 augustss }
409 1.1 augustss
410 1.1 augustss void
411 1.90.2.1 minoura ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed)
412 1.1 augustss {
413 1.1 augustss sed->next = sc->sc_freeeds;
414 1.1 augustss sc->sc_freeeds = sed;
415 1.1 augustss }
416 1.1 augustss
417 1.1 augustss ohci_soft_td_t *
418 1.90.2.1 minoura ohci_alloc_std(ohci_softc_t *sc)
419 1.1 augustss {
420 1.1 augustss ohci_soft_td_t *std;
421 1.53 augustss usbd_status err;
422 1.1 augustss int i, offs;
423 1.4 augustss usb_dma_t dma;
424 1.69 augustss int s;
425 1.1 augustss
426 1.53 augustss if (sc->sc_freetds == NULL) {
427 1.1 augustss DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n"));
428 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK,
429 1.53 augustss OHCI_TD_ALIGN, &dma);
430 1.53 augustss if (err)
431 1.83 augustss return (NULL);
432 1.69 augustss s = splusb();
433 1.39 augustss for(i = 0; i < OHCI_STD_CHUNK; i++) {
434 1.39 augustss offs = i * OHCI_STD_SIZE;
435 1.39 augustss std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs);
436 1.1 augustss std->physaddr = DMAADDR(&dma) + offs;
437 1.1 augustss std->nexttd = sc->sc_freetds;
438 1.1 augustss sc->sc_freetds = std;
439 1.1 augustss }
440 1.69 augustss splx(s);
441 1.1 augustss }
442 1.69 augustss
443 1.69 augustss s = splusb();
444 1.1 augustss std = sc->sc_freetds;
445 1.1 augustss sc->sc_freetds = std->nexttd;
446 1.39 augustss memset(&std->td, 0, sizeof(ohci_td_t));
447 1.83 augustss std->nexttd = NULL;
448 1.83 augustss std->xfer = NULL;
449 1.69 augustss ohci_hash_add_td(sc, std);
450 1.69 augustss splx(s);
451 1.69 augustss
452 1.1 augustss return (std);
453 1.1 augustss }
454 1.1 augustss
455 1.1 augustss void
456 1.90.2.1 minoura ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std)
457 1.1 augustss {
458 1.69 augustss int s;
459 1.69 augustss
460 1.69 augustss s = splusb();
461 1.69 augustss ohci_hash_rem_td(sc, std);
462 1.1 augustss std->nexttd = sc->sc_freetds;
463 1.1 augustss sc->sc_freetds = std;
464 1.69 augustss splx(s);
465 1.1 augustss }
466 1.1 augustss
467 1.1 augustss usbd_status
468 1.90.2.1 minoura ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc,
469 1.90.2.1 minoura int alen, int rd, usbd_xfer_handle xfer,
470 1.90.2.1 minoura ohci_soft_td_t *sp, ohci_soft_td_t **ep)
471 1.48 augustss {
472 1.48 augustss ohci_soft_td_t *next, *cur;
473 1.48 augustss ohci_physaddr_t dataphys, dataphysend;
474 1.77 augustss u_int32_t tdflags;
475 1.75 augustss int len, curlen;
476 1.77 augustss usb_dma_t *dma = &xfer->dmabuf;
477 1.77 augustss u_int16_t flags = xfer->flags;
478 1.48 augustss
479 1.75 augustss DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen));
480 1.75 augustss
481 1.75 augustss len = alen;
482 1.48 augustss cur = sp;
483 1.48 augustss dataphys = DMAADDR(dma);
484 1.48 augustss dataphysend = OHCI_PAGE(dataphys + len - 1);
485 1.77 augustss tdflags = htole32(
486 1.61 augustss (rd ? OHCI_TD_IN : OHCI_TD_OUT) |
487 1.77 augustss (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) |
488 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR);
489 1.61 augustss
490 1.48 augustss for (;;) {
491 1.48 augustss next = ohci_alloc_std(sc);
492 1.75 augustss if (next == NULL)
493 1.61 augustss goto nomem;
494 1.48 augustss
495 1.48 augustss /* The OHCI hardware can handle at most one page crossing. */
496 1.48 augustss if (OHCI_PAGE(dataphys) == dataphysend ||
497 1.48 augustss OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) {
498 1.48 augustss /* we can handle it in this TD */
499 1.48 augustss curlen = len;
500 1.48 augustss } else {
501 1.48 augustss /* must use multiple TDs, fill as much as possible. */
502 1.48 augustss curlen = 2 * OHCI_PAGE_SIZE -
503 1.48 augustss (dataphys & (OHCI_PAGE_SIZE-1));
504 1.78 augustss /* the length must be a multiple of the max size */
505 1.78 augustss curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize);
506 1.78 augustss #ifdef DIAGNOSTIC
507 1.78 augustss if (curlen == 0)
508 1.78 augustss panic("ohci_alloc_std: curlen == 0\n");
509 1.78 augustss #endif
510 1.48 augustss }
511 1.48 augustss DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x "
512 1.48 augustss "dataphysend=0x%08x len=%d curlen=%d\n",
513 1.48 augustss dataphys, dataphysend,
514 1.48 augustss len, curlen));
515 1.48 augustss len -= curlen;
516 1.48 augustss
517 1.77 augustss cur->td.td_flags = tdflags;
518 1.76 tsutsui cur->td.td_cbp = htole32(dataphys);
519 1.48 augustss cur->nexttd = next;
520 1.76 tsutsui cur->td.td_nexttd = htole32(next->physaddr);
521 1.76 tsutsui cur->td.td_be = htole32(dataphys + curlen - 1);
522 1.48 augustss cur->len = curlen;
523 1.48 augustss cur->flags = OHCI_ADD_LEN;
524 1.77 augustss cur->xfer = xfer;
525 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n",
526 1.48 augustss dataphys, dataphys + curlen - 1));
527 1.48 augustss if (len == 0)
528 1.48 augustss break;
529 1.48 augustss DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n"));
530 1.48 augustss dataphys += curlen;
531 1.48 augustss cur = next;
532 1.48 augustss }
533 1.61 augustss if ((flags & USBD_FORCE_SHORT_XFER) &&
534 1.75 augustss alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) {
535 1.61 augustss /* Force a 0 length transfer at the end. */
536 1.75 augustss
537 1.75 augustss cur = next;
538 1.61 augustss next = ohci_alloc_std(sc);
539 1.75 augustss if (next == NULL)
540 1.61 augustss goto nomem;
541 1.61 augustss
542 1.77 augustss cur->td.td_flags = tdflags;
543 1.61 augustss cur->td.td_cbp = 0; /* indicate 0 length packet */
544 1.61 augustss cur->nexttd = next;
545 1.76 tsutsui cur->td.td_nexttd = htole32(next->physaddr);
546 1.75 augustss cur->td.td_be = ~0;
547 1.61 augustss cur->len = 0;
548 1.61 augustss cur->flags = 0;
549 1.77 augustss cur->xfer = xfer;
550 1.61 augustss DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n"));
551 1.61 augustss }
552 1.77 augustss *ep = cur;
553 1.48 augustss
554 1.48 augustss return (USBD_NORMAL_COMPLETION);
555 1.61 augustss
556 1.61 augustss nomem:
557 1.61 augustss /* XXX free chain */
558 1.61 augustss return (USBD_NOMEM);
559 1.48 augustss }
560 1.48 augustss
561 1.53 augustss #if 0
562 1.82 augustss Static void
563 1.90.2.1 minoura ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std,
564 1.90.2.1 minoura ohci_soft_td_t *stdend)
565 1.48 augustss {
566 1.48 augustss ohci_soft_td_t *p;
567 1.48 augustss
568 1.48 augustss for (; std != stdend; std = p) {
569 1.48 augustss p = std->nexttd;
570 1.48 augustss ohci_free_std(sc, std);
571 1.48 augustss }
572 1.48 augustss }
573 1.53 augustss #endif
574 1.48 augustss
575 1.60 augustss ohci_soft_itd_t *
576 1.90.2.1 minoura ohci_alloc_sitd(ohci_softc_t *sc)
577 1.60 augustss {
578 1.60 augustss ohci_soft_itd_t *sitd;
579 1.60 augustss usbd_status err;
580 1.83 augustss int i, s, offs;
581 1.60 augustss usb_dma_t dma;
582 1.60 augustss
583 1.60 augustss if (sc->sc_freeitds == NULL) {
584 1.60 augustss DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n"));
585 1.83 augustss err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK,
586 1.83 augustss OHCI_ITD_ALIGN, &dma);
587 1.60 augustss if (err)
588 1.83 augustss return (NULL);
589 1.83 augustss for(i = 0; i < OHCI_SITD_CHUNK; i++) {
590 1.83 augustss offs = i * OHCI_SITD_SIZE;
591 1.60 augustss sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs);
592 1.60 augustss sitd->physaddr = DMAADDR(&dma) + offs;
593 1.60 augustss sitd->nextitd = sc->sc_freeitds;
594 1.60 augustss sc->sc_freeitds = sitd;
595 1.60 augustss }
596 1.60 augustss }
597 1.83 augustss
598 1.83 augustss s = splusb();
599 1.60 augustss sitd = sc->sc_freeitds;
600 1.60 augustss sc->sc_freeitds = sitd->nextitd;
601 1.60 augustss memset(&sitd->itd, 0, sizeof(ohci_itd_t));
602 1.83 augustss sitd->nextitd = NULL;
603 1.83 augustss sitd->xfer = NULL;
604 1.83 augustss ohci_hash_add_itd(sc, sitd);
605 1.83 augustss splx(s);
606 1.83 augustss
607 1.83 augustss #ifdef DIAGNOSTIC
608 1.83 augustss sitd->isdone = 0;
609 1.83 augustss #endif
610 1.83 augustss
611 1.60 augustss return (sitd);
612 1.60 augustss }
613 1.60 augustss
614 1.60 augustss void
615 1.90.2.1 minoura ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
616 1.60 augustss {
617 1.83 augustss int s;
618 1.83 augustss
619 1.83 augustss DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd));
620 1.83 augustss
621 1.83 augustss #ifdef DIAGNOSTIC
622 1.83 augustss if (!sitd->isdone) {
623 1.83 augustss panic("ohci_free_sitd: sitd=%p not done\n", sitd);
624 1.83 augustss return;
625 1.83 augustss }
626 1.83 augustss #endif
627 1.83 augustss
628 1.83 augustss s = splusb();
629 1.83 augustss ohci_hash_rem_itd(sc, sitd);
630 1.60 augustss sitd->nextitd = sc->sc_freeitds;
631 1.60 augustss sc->sc_freeitds = sitd;
632 1.83 augustss splx(s);
633 1.60 augustss }
634 1.60 augustss
635 1.48 augustss usbd_status
636 1.90.2.1 minoura ohci_init(ohci_softc_t *sc)
637 1.1 augustss {
638 1.1 augustss ohci_soft_ed_t *sed, *psed;
639 1.53 augustss usbd_status err;
640 1.1 augustss int i;
641 1.68 augustss u_int32_t s, ctl, ival, hcr, fm, per, rev, desca;
642 1.16 augustss
643 1.1 augustss DPRINTF(("ohci_init: start\n"));
644 1.36 augustss #if defined(__OpenBSD__)
645 1.55 augustss printf(",");
646 1.36 augustss #else
647 1.55 augustss printf("%s:", USBDEVNAME(sc->sc_bus.bdev));
648 1.36 augustss #endif
649 1.56 augustss rev = OREAD4(sc, OHCI_REVISION);
650 1.55 augustss printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev),
651 1.1 augustss OHCI_REV_LEGACY(rev) ? ", legacy support" : "");
652 1.55 augustss
653 1.1 augustss if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) {
654 1.1 augustss printf("%s: unsupported OHCI revision\n",
655 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
656 1.56 augustss sc->sc_bus.usbrev = USBREV_UNKNOWN;
657 1.1 augustss return (USBD_INVAL);
658 1.1 augustss }
659 1.56 augustss sc->sc_bus.usbrev = USBREV_1_0;
660 1.1 augustss
661 1.1 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
662 1.1 augustss LIST_INIT(&sc->sc_hash_tds[i]);
663 1.83 augustss for (i = 0; i < OHCI_HASH_SIZE; i++)
664 1.83 augustss LIST_INIT(&sc->sc_hash_itds[i]);
665 1.1 augustss
666 1.62 augustss SIMPLEQ_INIT(&sc->sc_free_xfers);
667 1.62 augustss
668 1.73 augustss /* XXX determine alignment by R/W */
669 1.1 augustss /* Allocate the HCCA area. */
670 1.53 augustss err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE,
671 1.4 augustss OHCI_HCCA_ALIGN, &sc->sc_hccadma);
672 1.53 augustss if (err)
673 1.53 augustss return (err);
674 1.1 augustss sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma);
675 1.1 augustss memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE);
676 1.1 augustss
677 1.1 augustss sc->sc_eintrs = OHCI_NORMAL_INTRS;
678 1.1 augustss
679 1.60 augustss /* Allocate dummy ED that starts the control list. */
680 1.1 augustss sc->sc_ctrl_head = ohci_alloc_sed(sc);
681 1.53 augustss if (sc->sc_ctrl_head == NULL) {
682 1.53 augustss err = USBD_NOMEM;
683 1.1 augustss goto bad1;
684 1.1 augustss }
685 1.76 tsutsui sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
686 1.34 augustss
687 1.60 augustss /* Allocate dummy ED that starts the bulk list. */
688 1.1 augustss sc->sc_bulk_head = ohci_alloc_sed(sc);
689 1.53 augustss if (sc->sc_bulk_head == NULL) {
690 1.53 augustss err = USBD_NOMEM;
691 1.1 augustss goto bad2;
692 1.1 augustss }
693 1.76 tsutsui sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
694 1.1 augustss
695 1.60 augustss /* Allocate dummy ED that starts the isochronous list. */
696 1.60 augustss sc->sc_isoc_head = ohci_alloc_sed(sc);
697 1.60 augustss if (sc->sc_isoc_head == NULL) {
698 1.60 augustss err = USBD_NOMEM;
699 1.60 augustss goto bad3;
700 1.60 augustss }
701 1.76 tsutsui sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP);
702 1.60 augustss
703 1.1 augustss /* Allocate all the dummy EDs that make up the interrupt tree. */
704 1.1 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
705 1.1 augustss sed = ohci_alloc_sed(sc);
706 1.53 augustss if (sed == NULL) {
707 1.1 augustss while (--i >= 0)
708 1.1 augustss ohci_free_sed(sc, sc->sc_eds[i]);
709 1.53 augustss err = USBD_NOMEM;
710 1.60 augustss goto bad4;
711 1.1 augustss }
712 1.1 augustss /* All ED fields are set to 0. */
713 1.1 augustss sc->sc_eds[i] = sed;
714 1.76 tsutsui sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
715 1.60 augustss if (i != 0)
716 1.1 augustss psed = sc->sc_eds[(i-1) / 2];
717 1.60 augustss else
718 1.60 augustss psed= sc->sc_isoc_head;
719 1.60 augustss sed->next = psed;
720 1.76 tsutsui sed->ed.ed_nexted = htole32(psed->physaddr);
721 1.1 augustss }
722 1.1 augustss /*
723 1.1 augustss * Fill HCCA interrupt table. The bit reversal is to get
724 1.1 augustss * the tree set up properly to spread the interrupts.
725 1.1 augustss */
726 1.1 augustss for (i = 0; i < OHCI_NO_INTRS; i++)
727 1.1 augustss sc->sc_hcca->hcca_interrupt_table[revbits[i]] =
728 1.76 tsutsui htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr);
729 1.1 augustss
730 1.73 augustss #ifdef OHCI_DEBUG
731 1.73 augustss if (ohcidebug > 15) {
732 1.73 augustss for (i = 0; i < OHCI_NO_EDS; i++) {
733 1.73 augustss printf("ed#%d ", i);
734 1.73 augustss ohci_dump_ed(sc->sc_eds[i]);
735 1.73 augustss }
736 1.73 augustss printf("iso ");
737 1.73 augustss ohci_dump_ed(sc->sc_isoc_head);
738 1.73 augustss }
739 1.73 augustss #endif
740 1.73 augustss
741 1.1 augustss /* Determine in what context we are running. */
742 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
743 1.1 augustss if (ctl & OHCI_IR) {
744 1.1 augustss /* SMM active, request change */
745 1.1 augustss DPRINTF(("ohci_init: SMM active, request owner change\n"));
746 1.1 augustss s = OREAD4(sc, OHCI_COMMAND_STATUS);
747 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR);
748 1.1 augustss for (i = 0; i < 100 && (ctl & OHCI_IR); i++) {
749 1.53 augustss usb_delay_ms(&sc->sc_bus, 1);
750 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
751 1.1 augustss }
752 1.1 augustss if ((ctl & OHCI_IR) == 0) {
753 1.15 augustss printf("%s: SMM does not respond, resetting\n",
754 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
755 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
756 1.1 augustss goto reset;
757 1.1 augustss }
758 1.1 augustss } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) {
759 1.1 augustss /* BIOS started controller. */
760 1.1 augustss DPRINTF(("ohci_init: BIOS active\n"));
761 1.1 augustss if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) {
762 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL);
763 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY);
764 1.1 augustss }
765 1.1 augustss } else {
766 1.1 augustss DPRINTF(("ohci_init: cold started\n"));
767 1.1 augustss reset:
768 1.1 augustss /* Controller was cold started. */
769 1.53 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
770 1.1 augustss }
771 1.1 augustss
772 1.16 augustss /*
773 1.25 augustss * This reset should not be necessary according to the OHCI spec, but
774 1.25 augustss * without it some controllers do not start.
775 1.16 augustss */
776 1.16 augustss DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev)));
777 1.16 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
778 1.55 augustss usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY);
779 1.16 augustss
780 1.1 augustss /* We now own the host controller and the bus has been reset. */
781 1.1 augustss ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL));
782 1.1 augustss
783 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */
784 1.1 augustss /* Nominal time for a reset is 10 us. */
785 1.1 augustss for (i = 0; i < 10; i++) {
786 1.1 augustss delay(10);
787 1.1 augustss hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR;
788 1.1 augustss if (!hcr)
789 1.1 augustss break;
790 1.1 augustss }
791 1.1 augustss if (hcr) {
792 1.15 augustss printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev));
793 1.53 augustss err = USBD_IOERROR;
794 1.60 augustss goto bad5;
795 1.1 augustss }
796 1.52 augustss #ifdef OHCI_DEBUG
797 1.1 augustss if (ohcidebug > 15)
798 1.1 augustss ohci_dumpregs(sc);
799 1.1 augustss #endif
800 1.1 augustss
801 1.60 augustss /* The controller is now in SUSPEND state, we have 2ms to finish. */
802 1.1 augustss
803 1.1 augustss /* Set up HC registers. */
804 1.1 augustss OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma));
805 1.1 augustss OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr);
806 1.1 augustss OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr);
807 1.55 augustss /* disable all interrupts and then switch on all desired interrupts */
808 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS);
809 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE);
810 1.55 augustss /* switch on desired functional features */
811 1.1 augustss ctl = OREAD4(sc, OHCI_CONTROL);
812 1.1 augustss ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR);
813 1.1 augustss ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE |
814 1.1 augustss OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL;
815 1.1 augustss /* And finally start it! */
816 1.1 augustss OWRITE4(sc, OHCI_CONTROL, ctl);
817 1.1 augustss
818 1.1 augustss /*
819 1.1 augustss * The controller is now OPERATIONAL. Set a some final
820 1.1 augustss * registers that should be set earlier, but that the
821 1.1 augustss * controller ignores when in the SUSPEND state.
822 1.1 augustss */
823 1.1 augustss fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT;
824 1.1 augustss fm |= OHCI_FSMPS(ival) | ival;
825 1.1 augustss OWRITE4(sc, OHCI_FM_INTERVAL, fm);
826 1.1 augustss per = OHCI_PERIODIC(ival); /* 90% periodic */
827 1.1 augustss OWRITE4(sc, OHCI_PERIODIC_START, per);
828 1.1 augustss
829 1.68 augustss /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */
830 1.68 augustss desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
831 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP);
832 1.68 augustss OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */
833 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY);
834 1.68 augustss OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca);
835 1.1 augustss
836 1.85 augustss /*
837 1.85 augustss * The AMD756 requires a delay before re-reading the register,
838 1.85 augustss * otherwise it will occasionally report 0 ports.
839 1.85 augustss */
840 1.85 augustss usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY);
841 1.1 augustss sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A));
842 1.1 augustss
843 1.52 augustss #ifdef OHCI_DEBUG
844 1.1 augustss if (ohcidebug > 5)
845 1.1 augustss ohci_dumpregs(sc);
846 1.1 augustss #endif
847 1.1 augustss
848 1.1 augustss /* Set up the bus struct. */
849 1.42 augustss sc->sc_bus.methods = &ohci_bus_methods;
850 1.1 augustss sc->sc_bus.pipe_size = sizeof(struct ohci_pipe);
851 1.1 augustss
852 1.71 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
853 1.47 augustss sc->sc_powerhook = powerhook_establish(ohci_power, sc);
854 1.59 augustss sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc);
855 1.71 augustss #endif
856 1.59 augustss
857 1.1 augustss return (USBD_NORMAL_COMPLETION);
858 1.1 augustss
859 1.60 augustss bad5:
860 1.60 augustss for (i = 0; i < OHCI_NO_EDS; i++)
861 1.60 augustss ohci_free_sed(sc, sc->sc_eds[i]);
862 1.60 augustss bad4:
863 1.60 augustss ohci_free_sed(sc, sc->sc_isoc_head);
864 1.1 augustss bad3:
865 1.1 augustss ohci_free_sed(sc, sc->sc_ctrl_head);
866 1.1 augustss bad2:
867 1.1 augustss ohci_free_sed(sc, sc->sc_bulk_head);
868 1.1 augustss bad1:
869 1.44 augustss usb_freemem(&sc->sc_bus, &sc->sc_hccadma);
870 1.53 augustss return (err);
871 1.1 augustss }
872 1.1 augustss
873 1.42 augustss usbd_status
874 1.90.2.1 minoura ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size)
875 1.42 augustss {
876 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
877 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
878 1.52 augustss #endif
879 1.42 augustss
880 1.44 augustss return (usb_allocmem(&sc->sc_bus, size, 0, dma));
881 1.42 augustss }
882 1.42 augustss
883 1.42 augustss void
884 1.90.2.1 minoura ohci_freem(struct usbd_bus *bus, usb_dma_t *dma)
885 1.42 augustss {
886 1.52 augustss #if defined(__NetBSD__) || defined(__OpenBSD__)
887 1.42 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
888 1.52 augustss #endif
889 1.42 augustss
890 1.44 augustss usb_freemem(&sc->sc_bus, dma);
891 1.62 augustss }
892 1.62 augustss
893 1.62 augustss usbd_xfer_handle
894 1.90.2.1 minoura ohci_allocx(struct usbd_bus *bus)
895 1.62 augustss {
896 1.62 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
897 1.62 augustss usbd_xfer_handle xfer;
898 1.62 augustss
899 1.62 augustss xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers);
900 1.62 augustss if (xfer != NULL)
901 1.62 augustss SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next);
902 1.62 augustss else
903 1.62 augustss xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT);
904 1.63 augustss if (xfer != NULL)
905 1.63 augustss memset(xfer, 0, sizeof *xfer);
906 1.62 augustss return (xfer);
907 1.62 augustss }
908 1.62 augustss
909 1.62 augustss void
910 1.90.2.1 minoura ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer)
911 1.62 augustss {
912 1.62 augustss struct ohci_softc *sc = (struct ohci_softc *)bus;
913 1.62 augustss
914 1.62 augustss SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next);
915 1.42 augustss }
916 1.42 augustss
917 1.59 augustss /*
918 1.59 augustss * Shut down the controller when the system is going down.
919 1.59 augustss */
920 1.59 augustss void
921 1.90.2.1 minoura ohci_shutdown(void *v)
922 1.59 augustss {
923 1.59 augustss ohci_softc_t *sc = v;
924 1.59 augustss
925 1.59 augustss DPRINTF(("ohci_shutdown: stopping the HC\n"));
926 1.59 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
927 1.59 augustss }
928 1.59 augustss
929 1.59 augustss /*
930 1.59 augustss * Handle suspend/resume.
931 1.59 augustss *
932 1.59 augustss * We need to switch to polling mode here, because this routine is
933 1.59 augustss * called from an intterupt context. This is all right since we
934 1.59 augustss * are almost suspended anyway.
935 1.59 augustss */
936 1.33 augustss void
937 1.90.2.1 minoura ohci_power(int why, void *v)
938 1.33 augustss {
939 1.52 augustss #ifdef OHCI_DEBUG
940 1.33 augustss ohci_softc_t *sc = v;
941 1.33 augustss
942 1.41 augustss DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why));
943 1.33 augustss /* XXX should suspend/resume */
944 1.33 augustss ohci_dumpregs(sc);
945 1.33 augustss #endif
946 1.33 augustss }
947 1.33 augustss
948 1.52 augustss #ifdef OHCI_DEBUG
949 1.1 augustss void
950 1.90.2.1 minoura ohci_dumpregs(ohci_softc_t *sc)
951 1.1 augustss {
952 1.41 augustss DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n",
953 1.41 augustss OREAD4(sc, OHCI_REVISION),
954 1.41 augustss OREAD4(sc, OHCI_CONTROL),
955 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
956 1.41 augustss DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n",
957 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_STATUS),
958 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_ENABLE),
959 1.41 augustss OREAD4(sc, OHCI_INTERRUPT_DISABLE)));
960 1.41 augustss DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n",
961 1.41 augustss OREAD4(sc, OHCI_HCCA),
962 1.41 augustss OREAD4(sc, OHCI_PERIOD_CURRENT_ED),
963 1.41 augustss OREAD4(sc, OHCI_CONTROL_HEAD_ED)));
964 1.41 augustss DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n",
965 1.41 augustss OREAD4(sc, OHCI_CONTROL_CURRENT_ED),
966 1.41 augustss OREAD4(sc, OHCI_BULK_HEAD_ED),
967 1.41 augustss OREAD4(sc, OHCI_BULK_CURRENT_ED)));
968 1.41 augustss DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n",
969 1.41 augustss OREAD4(sc, OHCI_DONE_HEAD),
970 1.41 augustss OREAD4(sc, OHCI_FM_INTERVAL),
971 1.41 augustss OREAD4(sc, OHCI_FM_REMAINING)));
972 1.41 augustss DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n",
973 1.41 augustss OREAD4(sc, OHCI_FM_NUMBER),
974 1.41 augustss OREAD4(sc, OHCI_PERIODIC_START),
975 1.41 augustss OREAD4(sc, OHCI_LS_THRESHOLD)));
976 1.41 augustss DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n",
977 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_A),
978 1.41 augustss OREAD4(sc, OHCI_RH_DESCRIPTOR_B),
979 1.41 augustss OREAD4(sc, OHCI_RH_STATUS)));
980 1.41 augustss DPRINTF((" port1=0x%08x port2=0x%08x\n",
981 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(1)),
982 1.41 augustss OREAD4(sc, OHCI_RH_PORT_STATUS(2))));
983 1.41 augustss DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n",
984 1.76 tsutsui le32toh(sc->sc_hcca->hcca_frame_number),
985 1.76 tsutsui le32toh(sc->sc_hcca->hcca_done_head)));
986 1.1 augustss }
987 1.1 augustss #endif
988 1.1 augustss
989 1.90.2.1 minoura Static int ohci_intr1(ohci_softc_t *);
990 1.53 augustss
991 1.1 augustss int
992 1.90.2.1 minoura ohci_intr(void *p)
993 1.1 augustss {
994 1.1 augustss ohci_softc_t *sc = p;
995 1.53 augustss
996 1.53 augustss /* If we get an interrupt while polling, then just ignore it. */
997 1.57 augustss if (sc->sc_bus.use_polling) {
998 1.57 augustss #ifdef DIAGNOSTIC
999 1.57 augustss printf("ohci_intr: ignored interrupt while polling\n");
1000 1.57 augustss #endif
1001 1.53 augustss return (0);
1002 1.57 augustss }
1003 1.53 augustss
1004 1.53 augustss return (ohci_intr1(sc));
1005 1.53 augustss }
1006 1.53 augustss
1007 1.82 augustss Static int
1008 1.90.2.1 minoura ohci_intr1(ohci_softc_t *sc)
1009 1.53 augustss {
1010 1.1 augustss u_int32_t intrs, eintrs;
1011 1.1 augustss ohci_physaddr_t done;
1012 1.1 augustss
1013 1.15 augustss /* In case the interrupt occurs before initialization has completed. */
1014 1.34 augustss if (sc == NULL || sc->sc_hcca == NULL) {
1015 1.15 augustss #ifdef DIAGNOSTIC
1016 1.15 augustss printf("ohci_intr: sc->sc_hcca == NULL\n");
1017 1.15 augustss #endif
1018 1.15 augustss return (0);
1019 1.15 augustss }
1020 1.15 augustss
1021 1.27 augustss intrs = 0;
1022 1.76 tsutsui done = le32toh(sc->sc_hcca->hcca_done_head);
1023 1.1 augustss if (done != 0) {
1024 1.26 augustss if (done & ~OHCI_DONE_INTRS)
1025 1.26 augustss intrs = OHCI_WDH;
1026 1.1 augustss if (done & OHCI_DONE_INTRS)
1027 1.1 augustss intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS);
1028 1.1 augustss } else
1029 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS);
1030 1.55 augustss
1031 1.1 augustss if (!intrs)
1032 1.1 augustss return (0);
1033 1.55 augustss
1034 1.1 augustss intrs &= ~OHCI_MIE;
1035 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */
1036 1.1 augustss eintrs = intrs & sc->sc_eintrs;
1037 1.1 augustss if (!eintrs)
1038 1.1 augustss return (0);
1039 1.1 augustss
1040 1.45 augustss sc->sc_bus.intr_context++;
1041 1.44 augustss sc->sc_bus.no_intrs++;
1042 1.73 augustss DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n",
1043 1.1 augustss sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS),
1044 1.1 augustss (u_int)eintrs));
1045 1.1 augustss
1046 1.1 augustss if (eintrs & OHCI_SO) {
1047 1.15 augustss printf("%s: scheduling overrun\n",USBDEVNAME(sc->sc_bus.bdev));
1048 1.1 augustss /* XXX do what */
1049 1.1 augustss intrs &= ~OHCI_SO;
1050 1.1 augustss }
1051 1.1 augustss if (eintrs & OHCI_WDH) {
1052 1.83 augustss ohci_add_done(sc, done &~ OHCI_DONE_INTRS);
1053 1.72 augustss sc->sc_hcca->hcca_done_head = 0;
1054 1.72 augustss usb_schedsoftintr(&sc->sc_bus);
1055 1.1 augustss intrs &= ~OHCI_WDH;
1056 1.1 augustss }
1057 1.1 augustss if (eintrs & OHCI_RD) {
1058 1.33 augustss printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev));
1059 1.1 augustss /* XXX process resume detect */
1060 1.1 augustss }
1061 1.1 augustss if (eintrs & OHCI_UE) {
1062 1.15 augustss printf("%s: unrecoverable error, controller halted\n",
1063 1.15 augustss USBDEVNAME(sc->sc_bus.bdev));
1064 1.1 augustss OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET);
1065 1.1 augustss /* XXX what else */
1066 1.1 augustss }
1067 1.1 augustss if (eintrs & OHCI_RHSC) {
1068 1.53 augustss ohci_rhsc(sc, sc->sc_intrxfer);
1069 1.1 augustss intrs &= ~OHCI_RHSC;
1070 1.1 augustss
1071 1.1 augustss /*
1072 1.1 augustss * Disable RHSC interrupt for now, because it will be
1073 1.1 augustss * on until the port has been reset.
1074 1.1 augustss */
1075 1.1 augustss ohci_rhsc_able(sc, 0);
1076 1.1 augustss }
1077 1.1 augustss
1078 1.45 augustss sc->sc_bus.intr_context--;
1079 1.44 augustss
1080 1.1 augustss /* Block unprocessed interrupts. XXX */
1081 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs);
1082 1.1 augustss sc->sc_eintrs &= ~intrs;
1083 1.1 augustss
1084 1.1 augustss return (1);
1085 1.1 augustss }
1086 1.1 augustss
1087 1.1 augustss void
1088 1.90.2.1 minoura ohci_rhsc_able(ohci_softc_t *sc, int on)
1089 1.1 augustss {
1090 1.1 augustss DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on));
1091 1.1 augustss if (on) {
1092 1.1 augustss sc->sc_eintrs |= OHCI_RHSC;
1093 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC);
1094 1.1 augustss } else {
1095 1.1 augustss sc->sc_eintrs &= ~OHCI_RHSC;
1096 1.1 augustss OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC);
1097 1.1 augustss }
1098 1.1 augustss }
1099 1.1 augustss
1100 1.52 augustss #ifdef OHCI_DEBUG
1101 1.13 augustss char *ohci_cc_strs[] = {
1102 1.13 augustss "NO_ERROR",
1103 1.13 augustss "CRC",
1104 1.13 augustss "BIT_STUFFING",
1105 1.13 augustss "DATA_TOGGLE_MISMATCH",
1106 1.13 augustss "STALL",
1107 1.13 augustss "DEVICE_NOT_RESPONDING",
1108 1.13 augustss "PID_CHECK_FAILURE",
1109 1.13 augustss "UNEXPECTED_PID",
1110 1.13 augustss "DATA_OVERRUN",
1111 1.13 augustss "DATA_UNDERRUN",
1112 1.13 augustss "BUFFER_OVERRUN",
1113 1.13 augustss "BUFFER_UNDERRUN",
1114 1.67 augustss "reserved",
1115 1.67 augustss "reserved",
1116 1.67 augustss "NOT_ACCESSED",
1117 1.13 augustss "NOT_ACCESSED",
1118 1.13 augustss };
1119 1.13 augustss #endif
1120 1.13 augustss
1121 1.1 augustss void
1122 1.90.2.1 minoura ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done)
1123 1.83 augustss {
1124 1.83 augustss ohci_soft_itd_t *sitd, *sidone, **ip;
1125 1.83 augustss ohci_soft_td_t *std, *sdone, **p;
1126 1.83 augustss
1127 1.83 augustss /* Reverse the done list. */
1128 1.83 augustss for (sdone = NULL, sidone = NULL; done != 0; ) {
1129 1.83 augustss std = ohci_hash_find_td(sc, done);
1130 1.83 augustss if (std != NULL) {
1131 1.83 augustss std->dnext = sdone;
1132 1.83 augustss done = le32toh(std->td.td_nexttd);
1133 1.83 augustss sdone = std;
1134 1.83 augustss DPRINTFN(10,("add TD %p\n", std));
1135 1.83 augustss continue;
1136 1.83 augustss }
1137 1.83 augustss sitd = ohci_hash_find_itd(sc, done);
1138 1.83 augustss if (sitd != NULL) {
1139 1.83 augustss sitd->dnext = sidone;
1140 1.83 augustss done = le32toh(sitd->itd.itd_nextitd);
1141 1.83 augustss sidone = sitd;
1142 1.83 augustss DPRINTFN(5,("add ITD %p\n", sitd));
1143 1.83 augustss continue;
1144 1.83 augustss }
1145 1.83 augustss panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done);
1146 1.83 augustss }
1147 1.83 augustss
1148 1.83 augustss /* sdone & sidone now hold the done lists. */
1149 1.83 augustss /* Put them on the already processed lists. */
1150 1.83 augustss for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext)
1151 1.83 augustss ;
1152 1.83 augustss *p = sdone;
1153 1.83 augustss for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext)
1154 1.83 augustss ;
1155 1.83 augustss *ip = sidone;
1156 1.83 augustss }
1157 1.83 augustss
1158 1.83 augustss void
1159 1.90.2.1 minoura ohci_softintr(struct usbd_bus *bus)
1160 1.72 augustss {
1161 1.72 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1162 1.83 augustss ohci_soft_itd_t *sitd, *sidone, *sitdnext;
1163 1.83 augustss ohci_soft_td_t *std, *sdone, *stdnext;
1164 1.53 augustss usbd_xfer_handle xfer;
1165 1.72 augustss int len, cc, s;
1166 1.72 augustss
1167 1.72 augustss sc->sc_bus.intr_context++;
1168 1.72 augustss
1169 1.72 augustss s = splhardusb();
1170 1.83 augustss sdone = sc->sc_sdone;
1171 1.83 augustss sc->sc_sdone = NULL;
1172 1.83 augustss sidone = sc->sc_sidone;
1173 1.83 augustss sc->sc_sidone = NULL;
1174 1.72 augustss splx(s);
1175 1.1 augustss
1176 1.83 augustss DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone));
1177 1.1 augustss
1178 1.52 augustss #ifdef OHCI_DEBUG
1179 1.1 augustss if (ohcidebug > 10) {
1180 1.41 augustss DPRINTF(("ohci_process_done: TD done:\n"));
1181 1.1 augustss ohci_dump_tds(sdone);
1182 1.1 augustss }
1183 1.1 augustss #endif
1184 1.1 augustss
1185 1.48 augustss for (std = sdone; std; std = stdnext) {
1186 1.53 augustss xfer = std->xfer;
1187 1.48 augustss stdnext = std->dnext;
1188 1.53 augustss DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n",
1189 1.69 augustss std, xfer, xfer ? xfer->hcpriv : 0));
1190 1.71 augustss if (xfer == NULL) {
1191 1.71 augustss /* xfer == NULL: There seems to be no xfer associated
1192 1.71 augustss * with this TD. It is tailp that happened to end up on
1193 1.71 augustss * the done queue.
1194 1.71 augustss */
1195 1.71 augustss continue;
1196 1.71 augustss }
1197 1.53 augustss if (xfer->status == USBD_CANCELLED ||
1198 1.53 augustss xfer->status == USBD_TIMEOUT) {
1199 1.34 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1200 1.53 augustss xfer));
1201 1.38 augustss /* Handled by abort routine. */
1202 1.83 augustss continue;
1203 1.83 augustss }
1204 1.83 augustss usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1205 1.83 augustss cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags));
1206 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1207 1.34 augustss len = std->len;
1208 1.39 augustss if (std->td.td_cbp != 0)
1209 1.76 tsutsui len -= le32toh(std->td.td_be) -
1210 1.76 tsutsui le32toh(std->td.td_cbp) + 1;
1211 1.75 augustss DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n",
1212 1.75 augustss len, std->flags));
1213 1.48 augustss if (std->flags & OHCI_ADD_LEN)
1214 1.53 augustss xfer->actlen += len;
1215 1.34 augustss if (std->flags & OHCI_CALL_DONE) {
1216 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1217 1.53 augustss usb_transfer_complete(xfer);
1218 1.21 augustss }
1219 1.48 augustss ohci_free_std(sc, std);
1220 1.1 augustss } else {
1221 1.48 augustss /*
1222 1.48 augustss * Endpoint is halted. First unlink all the TDs
1223 1.48 augustss * belonging to the failed transfer, and then restart
1224 1.48 augustss * the endpoint.
1225 1.48 augustss */
1226 1.1 augustss ohci_soft_td_t *p, *n;
1227 1.1 augustss struct ohci_pipe *opipe =
1228 1.53 augustss (struct ohci_pipe *)xfer->pipe;
1229 1.48 augustss
1230 1.71 augustss DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n",
1231 1.76 tsutsui OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1232 1.76 tsutsui ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))]));
1233 1.48 augustss
1234 1.48 augustss /* remove TDs */
1235 1.53 augustss for (p = std; p->xfer == xfer; p = n) {
1236 1.1 augustss n = p->nexttd;
1237 1.1 augustss ohci_free_std(sc, p);
1238 1.1 augustss }
1239 1.48 augustss
1240 1.16 augustss /* clear halt */
1241 1.76 tsutsui opipe->sed->ed.ed_headp = htole32(p->physaddr);
1242 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1243 1.48 augustss
1244 1.1 augustss if (cc == OHCI_CC_STALL)
1245 1.53 augustss xfer->status = USBD_STALLED;
1246 1.1 augustss else
1247 1.53 augustss xfer->status = USBD_IOERROR;
1248 1.53 augustss usb_transfer_complete(xfer);
1249 1.1 augustss }
1250 1.1 augustss }
1251 1.72 augustss
1252 1.83 augustss #ifdef OHCI_DEBUG
1253 1.83 augustss if (ohcidebug > 10) {
1254 1.83 augustss DPRINTF(("ohci_process_done: ITD done:\n"));
1255 1.83 augustss ohci_dump_itds(sidone);
1256 1.83 augustss }
1257 1.83 augustss #endif
1258 1.83 augustss
1259 1.83 augustss for (sitd = sidone; sitd != NULL; sitd = sitdnext) {
1260 1.83 augustss xfer = sitd->xfer;
1261 1.83 augustss sitdnext = sitd->dnext;
1262 1.83 augustss DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n",
1263 1.83 augustss sitd, xfer, xfer ? xfer->hcpriv : 0));
1264 1.83 augustss if (xfer == NULL)
1265 1.83 augustss continue;
1266 1.83 augustss if (xfer->status == USBD_CANCELLED ||
1267 1.83 augustss xfer->status == USBD_TIMEOUT) {
1268 1.83 augustss DPRINTF(("ohci_process_done: cancel/timeout %p\n",
1269 1.83 augustss xfer));
1270 1.83 augustss /* Handled by abort routine. */
1271 1.83 augustss continue;
1272 1.83 augustss }
1273 1.83 augustss #ifdef DIAGNOSTIC
1274 1.83 augustss if (sitd->isdone)
1275 1.83 augustss printf("ohci_softintr: sitd=%p is done\n", sitd);
1276 1.83 augustss sitd->isdone = 1;
1277 1.83 augustss #endif
1278 1.83 augustss cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags));
1279 1.83 augustss if (cc == OHCI_CC_NO_ERROR) {
1280 1.83 augustss /* XXX compute length for input */
1281 1.83 augustss struct ohci_pipe *opipe =
1282 1.83 augustss (struct ohci_pipe *)xfer->pipe;
1283 1.83 augustss if (sitd->flags & OHCI_CALL_DONE) {
1284 1.83 augustss opipe->u.iso.inuse -= xfer->nframes;
1285 1.83 augustss /* XXX xfer->actlen = actlen; */
1286 1.83 augustss xfer->status = USBD_NORMAL_COMPLETION;
1287 1.83 augustss usb_transfer_complete(xfer);
1288 1.83 augustss }
1289 1.83 augustss } else {
1290 1.83 augustss /* XXX Do more */
1291 1.83 augustss xfer->status = USBD_IOERROR;
1292 1.83 augustss usb_transfer_complete(xfer);
1293 1.83 augustss }
1294 1.83 augustss }
1295 1.83 augustss
1296 1.72 augustss sc->sc_bus.intr_context--;
1297 1.1 augustss }
1298 1.1 augustss
1299 1.1 augustss void
1300 1.90.2.1 minoura ohci_device_ctrl_done(usbd_xfer_handle xfer)
1301 1.1 augustss {
1302 1.53 augustss DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer));
1303 1.1 augustss
1304 1.38 augustss #ifdef DIAGNOSTIC
1305 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
1306 1.8 augustss panic("ohci_ctrl_done: not a request\n");
1307 1.1 augustss }
1308 1.38 augustss #endif
1309 1.55 augustss xfer->hcpriv = NULL;
1310 1.1 augustss }
1311 1.1 augustss
1312 1.1 augustss void
1313 1.90.2.1 minoura ohci_device_intr_done(usbd_xfer_handle xfer)
1314 1.1 augustss {
1315 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1316 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1317 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
1318 1.48 augustss ohci_soft_td_t *data, *tail;
1319 1.1 augustss
1320 1.1 augustss
1321 1.53 augustss DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n",
1322 1.53 augustss xfer, xfer->actlen));
1323 1.1 augustss
1324 1.55 augustss xfer->hcpriv = NULL;
1325 1.38 augustss
1326 1.53 augustss if (xfer->pipe->repeat) {
1327 1.60 augustss data = opipe->tail.td;
1328 1.1 augustss tail = ohci_alloc_std(sc); /* XXX should reuse TD */
1329 1.53 augustss if (tail == NULL) {
1330 1.53 augustss xfer->status = USBD_NOMEM;
1331 1.1 augustss return;
1332 1.1 augustss }
1333 1.55 augustss tail->xfer = NULL;
1334 1.1 augustss
1335 1.76 tsutsui data->td.td_flags = htole32(
1336 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
1337 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
1338 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
1339 1.76 tsutsui data->td.td_flags |= htole32(OHCI_TD_R);
1340 1.76 tsutsui data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf));
1341 1.48 augustss data->nexttd = tail;
1342 1.76 tsutsui data->td.td_nexttd = htole32(tail->physaddr);
1343 1.76 tsutsui data->td.td_be = htole32(le32toh(data->td.td_cbp) +
1344 1.76 tsutsui xfer->length - 1);
1345 1.53 augustss data->len = xfer->length;
1346 1.53 augustss data->xfer = xfer;
1347 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
1348 1.53 augustss xfer->hcpriv = data;
1349 1.53 augustss xfer->actlen = 0;
1350 1.1 augustss
1351 1.76 tsutsui sed->ed.ed_tailp = htole32(tail->physaddr);
1352 1.60 augustss opipe->tail.td = tail;
1353 1.1 augustss }
1354 1.1 augustss }
1355 1.1 augustss
1356 1.1 augustss void
1357 1.90.2.1 minoura ohci_device_bulk_done(usbd_xfer_handle xfer)
1358 1.3 augustss {
1359 1.53 augustss DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n",
1360 1.53 augustss xfer, xfer->actlen));
1361 1.3 augustss
1362 1.53 augustss xfer->hcpriv = NULL;
1363 1.3 augustss }
1364 1.3 augustss
1365 1.3 augustss void
1366 1.90.2.1 minoura ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer)
1367 1.1 augustss {
1368 1.1 augustss usbd_pipe_handle pipe;
1369 1.1 augustss struct ohci_pipe *opipe;
1370 1.1 augustss u_char *p;
1371 1.1 augustss int i, m;
1372 1.1 augustss int hstatus;
1373 1.1 augustss
1374 1.1 augustss hstatus = OREAD4(sc, OHCI_RH_STATUS);
1375 1.53 augustss DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n",
1376 1.53 augustss sc, xfer, hstatus));
1377 1.1 augustss
1378 1.53 augustss if (xfer == NULL) {
1379 1.1 augustss /* Just ignore the change. */
1380 1.1 augustss return;
1381 1.1 augustss }
1382 1.1 augustss
1383 1.53 augustss pipe = xfer->pipe;
1384 1.1 augustss opipe = (struct ohci_pipe *)pipe;
1385 1.1 augustss
1386 1.53 augustss p = KERNADDR(&xfer->dmabuf);
1387 1.53 augustss m = min(sc->sc_noport, xfer->length * 8 - 1);
1388 1.53 augustss memset(p, 0, xfer->length);
1389 1.1 augustss for (i = 1; i <= m; i++) {
1390 1.87 augustss /* Pick out CHANGE bits from the status reg. */
1391 1.1 augustss if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16)
1392 1.1 augustss p[i/8] |= 1 << (i%8);
1393 1.1 augustss }
1394 1.1 augustss DPRINTF(("ohci_rhsc: change=0x%02x\n", *p));
1395 1.53 augustss xfer->actlen = xfer->length;
1396 1.53 augustss xfer->status = USBD_NORMAL_COMPLETION;
1397 1.1 augustss
1398 1.53 augustss usb_transfer_complete(xfer);
1399 1.38 augustss }
1400 1.38 augustss
1401 1.38 augustss void
1402 1.90.2.1 minoura ohci_root_intr_done(usbd_xfer_handle xfer)
1403 1.65 augustss {
1404 1.65 augustss xfer->hcpriv = NULL;
1405 1.65 augustss }
1406 1.65 augustss
1407 1.65 augustss void
1408 1.90.2.1 minoura ohci_root_ctrl_done(usbd_xfer_handle xfer)
1409 1.38 augustss {
1410 1.53 augustss xfer->hcpriv = NULL;
1411 1.1 augustss }
1412 1.1 augustss
1413 1.1 augustss /*
1414 1.1 augustss * Wait here until controller claims to have an interrupt.
1415 1.1 augustss * Then call ohci_intr and return. Use timeout to avoid waiting
1416 1.1 augustss * too long.
1417 1.1 augustss */
1418 1.1 augustss void
1419 1.90.2.1 minoura ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer)
1420 1.1 augustss {
1421 1.53 augustss int timo = xfer->timeout;
1422 1.1 augustss int usecs;
1423 1.1 augustss u_int32_t intrs;
1424 1.1 augustss
1425 1.53 augustss xfer->status = USBD_IN_PROGRESS;
1426 1.1 augustss for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) {
1427 1.20 augustss usb_delay_ms(&sc->sc_bus, 1);
1428 1.1 augustss intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs;
1429 1.27 augustss DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs));
1430 1.52 augustss #ifdef OHCI_DEBUG
1431 1.1 augustss if (ohcidebug > 15)
1432 1.1 augustss ohci_dumpregs(sc);
1433 1.1 augustss #endif
1434 1.1 augustss if (intrs) {
1435 1.53 augustss ohci_intr1(sc);
1436 1.53 augustss if (xfer->status != USBD_IN_PROGRESS)
1437 1.1 augustss return;
1438 1.1 augustss }
1439 1.1 augustss }
1440 1.15 augustss
1441 1.15 augustss /* Timeout */
1442 1.1 augustss DPRINTF(("ohci_waitintr: timeout\n"));
1443 1.53 augustss xfer->status = USBD_TIMEOUT;
1444 1.53 augustss usb_transfer_complete(xfer);
1445 1.15 augustss /* XXX should free TD */
1446 1.5 augustss }
1447 1.5 augustss
1448 1.5 augustss void
1449 1.90.2.1 minoura ohci_poll(struct usbd_bus *bus)
1450 1.5 augustss {
1451 1.5 augustss ohci_softc_t *sc = (ohci_softc_t *)bus;
1452 1.5 augustss
1453 1.5 augustss if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs)
1454 1.53 augustss ohci_intr1(sc);
1455 1.1 augustss }
1456 1.1 augustss
1457 1.1 augustss usbd_status
1458 1.90.2.1 minoura ohci_device_request(usbd_xfer_handle xfer)
1459 1.1 augustss {
1460 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1461 1.53 augustss usb_device_request_t *req = &xfer->request;
1462 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
1463 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1464 1.1 augustss int addr = dev->address;
1465 1.77 augustss ohci_soft_td_t *setup, *stat, *next, *tail;
1466 1.1 augustss ohci_soft_ed_t *sed;
1467 1.1 augustss int isread;
1468 1.1 augustss int len;
1469 1.53 augustss usbd_status err;
1470 1.1 augustss int s;
1471 1.1 augustss
1472 1.1 augustss isread = req->bmRequestType & UT_READ;
1473 1.1 augustss len = UGETW(req->wLength);
1474 1.1 augustss
1475 1.14 augustss DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, "
1476 1.14 augustss "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n",
1477 1.1 augustss req->bmRequestType, req->bRequest, UGETW(req->wValue),
1478 1.1 augustss UGETW(req->wIndex), len, addr,
1479 1.1 augustss opipe->pipe.endpoint->edesc->bEndpointAddress));
1480 1.1 augustss
1481 1.60 augustss setup = opipe->tail.td;
1482 1.1 augustss stat = ohci_alloc_std(sc);
1483 1.53 augustss if (stat == NULL) {
1484 1.53 augustss err = USBD_NOMEM;
1485 1.1 augustss goto bad1;
1486 1.1 augustss }
1487 1.1 augustss tail = ohci_alloc_std(sc);
1488 1.53 augustss if (tail == NULL) {
1489 1.53 augustss err = USBD_NOMEM;
1490 1.1 augustss goto bad2;
1491 1.1 augustss }
1492 1.55 augustss tail->xfer = NULL;
1493 1.1 augustss
1494 1.1 augustss sed = opipe->sed;
1495 1.1 augustss opipe->u.ctl.length = len;
1496 1.1 augustss
1497 1.10 augustss /* Update device address and length since they may have changed. */
1498 1.10 augustss /* XXX This only needs to be done once, but it's too early in open. */
1499 1.77 augustss /* XXXX Should not touch ED here! */
1500 1.76 tsutsui sed->ed.ed_flags = htole32(
1501 1.76 tsutsui (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) |
1502 1.16 augustss OHCI_ED_SET_FA(addr) |
1503 1.16 augustss OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize)));
1504 1.1 augustss
1505 1.77 augustss next = stat;
1506 1.77 augustss
1507 1.1 augustss /* Set up data transaction */
1508 1.1 augustss if (len != 0) {
1509 1.77 augustss ohci_soft_td_t *std = stat;
1510 1.77 augustss
1511 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
1512 1.77 augustss std, &stat);
1513 1.77 augustss stat = stat->nexttd; /* point at free TD */
1514 1.77 augustss if (err)
1515 1.1 augustss goto bad3;
1516 1.77 augustss /* Start toggle at 1 and then use the carried toggle. */
1517 1.77 augustss std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK);
1518 1.77 augustss std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1);
1519 1.34 augustss }
1520 1.1 augustss
1521 1.1 augustss memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req);
1522 1.1 augustss
1523 1.76 tsutsui setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC |
1524 1.76 tsutsui OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR);
1525 1.76 tsutsui setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma));
1526 1.1 augustss setup->nexttd = next;
1527 1.76 tsutsui setup->td.td_nexttd = htole32(next->physaddr);
1528 1.76 tsutsui setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1);
1529 1.77 augustss setup->len = 0;
1530 1.53 augustss setup->xfer = xfer;
1531 1.34 augustss setup->flags = 0;
1532 1.53 augustss xfer->hcpriv = setup;
1533 1.1 augustss
1534 1.76 tsutsui stat->td.td_flags = htole32(
1535 1.77 augustss (isread ? OHCI_TD_OUT : OHCI_TD_IN) |
1536 1.77 augustss OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1));
1537 1.39 augustss stat->td.td_cbp = 0;
1538 1.1 augustss stat->nexttd = tail;
1539 1.76 tsutsui stat->td.td_nexttd = htole32(tail->physaddr);
1540 1.39 augustss stat->td.td_be = 0;
1541 1.77 augustss stat->flags = OHCI_CALL_DONE;
1542 1.1 augustss stat->len = 0;
1543 1.53 augustss stat->xfer = xfer;
1544 1.1 augustss
1545 1.52 augustss #ifdef OHCI_DEBUG
1546 1.1 augustss if (ohcidebug > 5) {
1547 1.41 augustss DPRINTF(("ohci_device_request:\n"));
1548 1.1 augustss ohci_dump_ed(sed);
1549 1.1 augustss ohci_dump_tds(setup);
1550 1.1 augustss }
1551 1.1 augustss #endif
1552 1.1 augustss
1553 1.1 augustss /* Insert ED in schedule */
1554 1.1 augustss s = splusb();
1555 1.76 tsutsui sed->ed.ed_tailp = htole32(tail->physaddr);
1556 1.60 augustss opipe->tail.td = tail;
1557 1.1 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF);
1558 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
1559 1.81 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
1560 1.80 augustss ohci_timeout, xfer);
1561 1.15 augustss }
1562 1.1 augustss splx(s);
1563 1.1 augustss
1564 1.77 augustss #if 0
1565 1.77 augustss if (ohcidebug > 10) {
1566 1.77 augustss delay(10000);
1567 1.41 augustss DPRINTF(("ohci_device_request: status=%x\n",
1568 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
1569 1.1 augustss ohci_dump_ed(sed);
1570 1.1 augustss ohci_dump_tds(setup);
1571 1.1 augustss }
1572 1.1 augustss #endif
1573 1.1 augustss
1574 1.1 augustss return (USBD_NORMAL_COMPLETION);
1575 1.1 augustss
1576 1.1 augustss bad3:
1577 1.1 augustss ohci_free_std(sc, tail);
1578 1.1 augustss bad2:
1579 1.1 augustss ohci_free_std(sc, stat);
1580 1.1 augustss bad1:
1581 1.53 augustss return (err);
1582 1.1 augustss }
1583 1.1 augustss
1584 1.1 augustss /*
1585 1.1 augustss * Add an ED to the schedule. Called at splusb().
1586 1.1 augustss */
1587 1.1 augustss void
1588 1.90.2.1 minoura ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1589 1.1 augustss {
1590 1.46 augustss SPLUSBCHECK;
1591 1.1 augustss sed->next = head->next;
1592 1.39 augustss sed->ed.ed_nexted = head->ed.ed_nexted;
1593 1.1 augustss head->next = sed;
1594 1.76 tsutsui head->ed.ed_nexted = htole32(sed->physaddr);
1595 1.1 augustss }
1596 1.1 augustss
1597 1.1 augustss /*
1598 1.3 augustss * Remove an ED from the schedule. Called at splusb().
1599 1.3 augustss */
1600 1.3 augustss void
1601 1.90.2.1 minoura ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head)
1602 1.3 augustss {
1603 1.3 augustss ohci_soft_ed_t *p;
1604 1.3 augustss
1605 1.46 augustss SPLUSBCHECK;
1606 1.46 augustss
1607 1.3 augustss /* XXX */
1608 1.55 augustss for (p = head; p == NULL && p->next != sed; p = p->next)
1609 1.3 augustss ;
1610 1.55 augustss if (p == NULL)
1611 1.3 augustss panic("ohci_rem_ed: ED not found\n");
1612 1.3 augustss p->next = sed->next;
1613 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
1614 1.3 augustss }
1615 1.3 augustss
1616 1.3 augustss /*
1617 1.1 augustss * When a transfer is completed the TD is added to the done queue by
1618 1.1 augustss * the host controller. This queue is the processed by software.
1619 1.1 augustss * Unfortunately the queue contains the physical address of the TD
1620 1.9 augustss * and we have no simple way to translate this back to a kernel address.
1621 1.1 augustss * To make the translation possible (and fast) we use a hash table of
1622 1.1 augustss * TDs currently in the schedule. The physical address is used as the
1623 1.1 augustss * hash value.
1624 1.1 augustss */
1625 1.1 augustss
1626 1.1 augustss #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE)
1627 1.1 augustss /* Called at splusb() */
1628 1.1 augustss void
1629 1.90.2.1 minoura ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1630 1.1 augustss {
1631 1.1 augustss int h = HASH(std->physaddr);
1632 1.1 augustss
1633 1.46 augustss SPLUSBCHECK;
1634 1.46 augustss
1635 1.1 augustss LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext);
1636 1.1 augustss }
1637 1.1 augustss
1638 1.1 augustss /* Called at splusb() */
1639 1.1 augustss void
1640 1.90.2.1 minoura ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std)
1641 1.1 augustss {
1642 1.46 augustss SPLUSBCHECK;
1643 1.46 augustss
1644 1.1 augustss LIST_REMOVE(std, hnext);
1645 1.1 augustss }
1646 1.1 augustss
1647 1.1 augustss ohci_soft_td_t *
1648 1.90.2.1 minoura ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a)
1649 1.1 augustss {
1650 1.1 augustss int h = HASH(a);
1651 1.1 augustss ohci_soft_td_t *std;
1652 1.1 augustss
1653 1.1 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[h]);
1654 1.53 augustss std != NULL;
1655 1.1 augustss std = LIST_NEXT(std, hnext))
1656 1.1 augustss if (std->physaddr == a)
1657 1.1 augustss return (std);
1658 1.83 augustss return (NULL);
1659 1.83 augustss }
1660 1.83 augustss
1661 1.83 augustss /* Called at splusb() */
1662 1.83 augustss void
1663 1.90.2.1 minoura ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1664 1.83 augustss {
1665 1.83 augustss int h = HASH(sitd->physaddr);
1666 1.83 augustss
1667 1.83 augustss SPLUSBCHECK;
1668 1.83 augustss
1669 1.83 augustss DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n",
1670 1.83 augustss sitd, (u_long)sitd->physaddr));
1671 1.83 augustss
1672 1.83 augustss LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext);
1673 1.83 augustss }
1674 1.83 augustss
1675 1.83 augustss /* Called at splusb() */
1676 1.83 augustss void
1677 1.90.2.1 minoura ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd)
1678 1.83 augustss {
1679 1.83 augustss SPLUSBCHECK;
1680 1.83 augustss
1681 1.83 augustss DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n",
1682 1.83 augustss sitd, (u_long)sitd->physaddr));
1683 1.83 augustss
1684 1.83 augustss LIST_REMOVE(sitd, hnext);
1685 1.83 augustss }
1686 1.83 augustss
1687 1.83 augustss ohci_soft_itd_t *
1688 1.90.2.1 minoura ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a)
1689 1.83 augustss {
1690 1.83 augustss int h = HASH(a);
1691 1.83 augustss ohci_soft_itd_t *sitd;
1692 1.83 augustss
1693 1.83 augustss for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]);
1694 1.83 augustss sitd != NULL;
1695 1.83 augustss sitd = LIST_NEXT(sitd, hnext))
1696 1.83 augustss if (sitd->physaddr == a)
1697 1.83 augustss return (sitd);
1698 1.83 augustss return (NULL);
1699 1.1 augustss }
1700 1.1 augustss
1701 1.1 augustss void
1702 1.90.2.1 minoura ohci_timeout(void *addr)
1703 1.1 augustss {
1704 1.53 augustss usbd_xfer_handle xfer = addr;
1705 1.48 augustss int s;
1706 1.1 augustss
1707 1.53 augustss DPRINTF(("ohci_timeout: xfer=%p\n", xfer));
1708 1.45 augustss
1709 1.48 augustss s = splusb();
1710 1.53 augustss xfer->device->bus->intr_context++;
1711 1.54 augustss ohci_abort_xfer(xfer, USBD_TIMEOUT);
1712 1.53 augustss xfer->device->bus->intr_context--;
1713 1.48 augustss splx(s);
1714 1.1 augustss }
1715 1.1 augustss
1716 1.52 augustss #ifdef OHCI_DEBUG
1717 1.1 augustss void
1718 1.90.2.1 minoura ohci_dump_tds(ohci_soft_td_t *std)
1719 1.1 augustss {
1720 1.1 augustss for (; std; std = std->nexttd)
1721 1.1 augustss ohci_dump_td(std);
1722 1.1 augustss }
1723 1.1 augustss
1724 1.1 augustss void
1725 1.90.2.1 minoura ohci_dump_td(ohci_soft_td_t *std)
1726 1.1 augustss {
1727 1.41 augustss DPRINTF(("TD(%p) at %08lx: %b delay=%d ec=%d cc=%d\ncbp=0x%08lx "
1728 1.41 augustss "nexttd=0x%08lx be=0x%08lx\n",
1729 1.41 augustss std, (u_long)std->physaddr,
1730 1.76 tsutsui (int)le32toh(std->td.td_flags),
1731 1.41 augustss "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE",
1732 1.76 tsutsui OHCI_TD_GET_DI(le32toh(std->td.td_flags)),
1733 1.76 tsutsui OHCI_TD_GET_EC(le32toh(std->td.td_flags)),
1734 1.76 tsutsui OHCI_TD_GET_CC(le32toh(std->td.td_flags)),
1735 1.76 tsutsui (u_long)le32toh(std->td.td_cbp),
1736 1.76 tsutsui (u_long)le32toh(std->td.td_nexttd),
1737 1.76 tsutsui (u_long)le32toh(std->td.td_be)));
1738 1.1 augustss }
1739 1.1 augustss
1740 1.1 augustss void
1741 1.90.2.1 minoura ohci_dump_itd(ohci_soft_itd_t *sitd)
1742 1.83 augustss {
1743 1.83 augustss int i;
1744 1.83 augustss
1745 1.83 augustss DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n"
1746 1.83 augustss "bp0=0x%08lx next=0x%08lx be=0x%08lx\n",
1747 1.83 augustss sitd, (u_long)sitd->physaddr,
1748 1.83 augustss OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)),
1749 1.83 augustss OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)),
1750 1.83 augustss OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)),
1751 1.83 augustss OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)),
1752 1.83 augustss (u_long)le32toh(sitd->itd.itd_bp0),
1753 1.83 augustss (u_long)le32toh(sitd->itd.itd_nextitd),
1754 1.83 augustss (u_long)le32toh(sitd->itd.itd_be)));
1755 1.83 augustss for (i = 0; i < OHCI_ITD_NOFFSET; i++)
1756 1.83 augustss DPRINTF(("offs[%d]=0x%04x ", i,
1757 1.83 augustss (u_int)le16toh(sitd->itd.itd_offset[i])));
1758 1.83 augustss DPRINTF(("\n"));
1759 1.83 augustss }
1760 1.83 augustss
1761 1.83 augustss void
1762 1.90.2.1 minoura ohci_dump_itds(ohci_soft_itd_t *sitd)
1763 1.83 augustss {
1764 1.83 augustss for (; sitd; sitd = sitd->nextitd)
1765 1.83 augustss ohci_dump_itd(sitd);
1766 1.83 augustss }
1767 1.83 augustss
1768 1.83 augustss void
1769 1.90.2.1 minoura ohci_dump_ed(ohci_soft_ed_t *sed)
1770 1.1 augustss {
1771 1.73 augustss DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %b\ntailp=0x%08lx "
1772 1.73 augustss "headflags=%b headp=0x%08lx nexted=0x%08lx\n",
1773 1.41 augustss sed, (u_long)sed->physaddr,
1774 1.76 tsutsui OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)),
1775 1.76 tsutsui OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)),
1776 1.76 tsutsui OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)),
1777 1.76 tsutsui (int)le32toh(sed->ed.ed_flags),
1778 1.41 augustss "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO",
1779 1.76 tsutsui (u_long)le32toh(sed->ed.ed_tailp),
1780 1.76 tsutsui (u_long)le32toh(sed->ed.ed_headp),
1781 1.52 augustss "\20\1HALT\2CARRY",
1782 1.76 tsutsui (u_long)le32toh(sed->ed.ed_headp),
1783 1.76 tsutsui (u_long)le32toh(sed->ed.ed_nexted)));
1784 1.1 augustss }
1785 1.1 augustss #endif
1786 1.1 augustss
1787 1.1 augustss usbd_status
1788 1.90.2.1 minoura ohci_open(usbd_pipe_handle pipe)
1789 1.1 augustss {
1790 1.1 augustss usbd_device_handle dev = pipe->device;
1791 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
1792 1.1 augustss usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc;
1793 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1794 1.1 augustss u_int8_t addr = dev->address;
1795 1.60 augustss u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE;
1796 1.1 augustss ohci_soft_ed_t *sed;
1797 1.1 augustss ohci_soft_td_t *std;
1798 1.60 augustss ohci_soft_itd_t *sitd;
1799 1.60 augustss ohci_physaddr_t tdphys;
1800 1.60 augustss u_int32_t fmt;
1801 1.53 augustss usbd_status err;
1802 1.1 augustss int s;
1803 1.64 augustss int ival;
1804 1.1 augustss
1805 1.1 augustss DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n",
1806 1.1 augustss pipe, addr, ed->bEndpointAddress, sc->sc_addr));
1807 1.81 augustss
1808 1.90 thorpej std = NULL;
1809 1.90 thorpej sed = NULL;
1810 1.90 thorpej
1811 1.1 augustss if (addr == sc->sc_addr) {
1812 1.1 augustss switch (ed->bEndpointAddress) {
1813 1.1 augustss case USB_CONTROL_ENDPOINT:
1814 1.1 augustss pipe->methods = &ohci_root_ctrl_methods;
1815 1.1 augustss break;
1816 1.40 augustss case UE_DIR_IN | OHCI_INTR_ENDPT:
1817 1.1 augustss pipe->methods = &ohci_root_intr_methods;
1818 1.1 augustss break;
1819 1.1 augustss default:
1820 1.1 augustss return (USBD_INVAL);
1821 1.1 augustss }
1822 1.1 augustss } else {
1823 1.1 augustss sed = ohci_alloc_sed(sc);
1824 1.53 augustss if (sed == NULL)
1825 1.1 augustss goto bad0;
1826 1.1 augustss opipe->sed = sed;
1827 1.60 augustss if (xfertype == UE_ISOCHRONOUS) {
1828 1.60 augustss sitd = ohci_alloc_sitd(sc);
1829 1.60 augustss if (sitd == NULL) {
1830 1.60 augustss ohci_free_sitd(sc, sitd);
1831 1.60 augustss goto bad1;
1832 1.60 augustss }
1833 1.60 augustss opipe->tail.itd = sitd;
1834 1.76 tsutsui tdphys = sitd->physaddr;
1835 1.60 augustss fmt = OHCI_ED_FORMAT_ISO;
1836 1.83 augustss if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN)
1837 1.83 augustss fmt |= OHCI_ED_DIR_IN;
1838 1.83 augustss else
1839 1.83 augustss fmt |= OHCI_ED_DIR_OUT;
1840 1.60 augustss } else {
1841 1.60 augustss std = ohci_alloc_std(sc);
1842 1.60 augustss if (std == NULL) {
1843 1.60 augustss ohci_free_std(sc, std);
1844 1.60 augustss goto bad1;
1845 1.60 augustss }
1846 1.60 augustss opipe->tail.td = std;
1847 1.76 tsutsui tdphys = std->physaddr;
1848 1.83 augustss fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD;
1849 1.60 augustss }
1850 1.76 tsutsui sed->ed.ed_flags = htole32(
1851 1.1 augustss OHCI_ED_SET_FA(addr) |
1852 1.1 augustss OHCI_ED_SET_EN(ed->bEndpointAddress) |
1853 1.60 augustss (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt |
1854 1.16 augustss OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize)));
1855 1.76 tsutsui sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys);
1856 1.1 augustss
1857 1.60 augustss switch (xfertype) {
1858 1.1 augustss case UE_CONTROL:
1859 1.1 augustss pipe->methods = &ohci_device_ctrl_methods;
1860 1.53 augustss err = usb_allocmem(&sc->sc_bus,
1861 1.53 augustss sizeof(usb_device_request_t),
1862 1.53 augustss 0, &opipe->u.ctl.reqdma);
1863 1.53 augustss if (err)
1864 1.1 augustss goto bad;
1865 1.1 augustss s = splusb();
1866 1.3 augustss ohci_add_ed(sed, sc->sc_ctrl_head);
1867 1.1 augustss splx(s);
1868 1.1 augustss break;
1869 1.1 augustss case UE_INTERRUPT:
1870 1.1 augustss pipe->methods = &ohci_device_intr_methods;
1871 1.64 augustss ival = pipe->interval;
1872 1.64 augustss if (ival == USBD_DEFAULT_INTERVAL)
1873 1.64 augustss ival = ed->bInterval;
1874 1.64 augustss return (ohci_device_setintr(sc, opipe, ival));
1875 1.1 augustss case UE_ISOCHRONOUS:
1876 1.60 augustss pipe->methods = &ohci_device_isoc_methods;
1877 1.60 augustss return (ohci_setup_isoc(pipe));
1878 1.1 augustss case UE_BULK:
1879 1.3 augustss pipe->methods = &ohci_device_bulk_methods;
1880 1.3 augustss s = splusb();
1881 1.3 augustss ohci_add_ed(sed, sc->sc_bulk_head);
1882 1.3 augustss splx(s);
1883 1.3 augustss break;
1884 1.1 augustss }
1885 1.1 augustss }
1886 1.1 augustss return (USBD_NORMAL_COMPLETION);
1887 1.1 augustss
1888 1.1 augustss bad:
1889 1.90 thorpej if (std != NULL)
1890 1.90 thorpej ohci_free_std(sc, std);
1891 1.1 augustss bad1:
1892 1.90 thorpej if (sed != NULL)
1893 1.90 thorpej ohci_free_sed(sc, sed);
1894 1.1 augustss bad0:
1895 1.1 augustss return (USBD_NOMEM);
1896 1.1 augustss
1897 1.1 augustss }
1898 1.1 augustss
1899 1.1 augustss /*
1900 1.34 augustss * Close a reqular pipe.
1901 1.34 augustss * Assumes that there are no pending transactions.
1902 1.34 augustss */
1903 1.34 augustss void
1904 1.90.2.1 minoura ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head)
1905 1.34 augustss {
1906 1.34 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
1907 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
1908 1.34 augustss ohci_soft_ed_t *sed = opipe->sed;
1909 1.34 augustss int s;
1910 1.34 augustss
1911 1.34 augustss s = splusb();
1912 1.34 augustss #ifdef DIAGNOSTIC
1913 1.76 tsutsui sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
1914 1.76 tsutsui if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
1915 1.76 tsutsui (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) {
1916 1.76 tsutsui ohci_physaddr_t td = le32toh(sed->ed.ed_headp);
1917 1.34 augustss ohci_soft_td_t *std;
1918 1.34 augustss for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]);
1919 1.53 augustss std != NULL;
1920 1.34 augustss std = LIST_NEXT(std, hnext))
1921 1.34 augustss if (std->physaddr == td)
1922 1.34 augustss break;
1923 1.34 augustss printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x "
1924 1.34 augustss "tl=0x%x pipe=%p, std=%p\n", sed,
1925 1.76 tsutsui (int)le32toh(sed->ed.ed_headp),
1926 1.76 tsutsui (int)le32toh(sed->ed.ed_tailp),
1927 1.34 augustss pipe, std);
1928 1.34 augustss usb_delay_ms(&sc->sc_bus, 2);
1929 1.76 tsutsui if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
1930 1.76 tsutsui (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
1931 1.34 augustss printf("ohci_close_pipe: pipe still not empty\n");
1932 1.34 augustss }
1933 1.34 augustss #endif
1934 1.34 augustss ohci_rem_ed(sed, head);
1935 1.34 augustss splx(s);
1936 1.34 augustss ohci_free_sed(sc, opipe->sed);
1937 1.34 augustss }
1938 1.34 augustss
1939 1.34 augustss /*
1940 1.34 augustss * Abort a device request.
1941 1.34 augustss * If this routine is called at splusb() it guarantees that the request
1942 1.34 augustss * will be removed from the hardware scheduling and that the callback
1943 1.34 augustss * for it will be called with USBD_CANCELLED status.
1944 1.34 augustss * It's impossible to guarantee that the requested transfer will not
1945 1.34 augustss * have happened since the hardware runs concurrently.
1946 1.34 augustss * If the transaction has already happened we rely on the ordinary
1947 1.34 augustss * interrupt processing to process it.
1948 1.34 augustss */
1949 1.34 augustss void
1950 1.90.2.1 minoura ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status)
1951 1.34 augustss {
1952 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1953 1.34 augustss ohci_soft_ed_t *sed;
1954 1.34 augustss
1955 1.54 augustss DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe));
1956 1.34 augustss
1957 1.53 augustss xfer->status = status;
1958 1.34 augustss
1959 1.81 augustss usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer);
1960 1.34 augustss
1961 1.34 augustss sed = opipe->sed;
1962 1.54 augustss DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed));
1963 1.76 tsutsui sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
1964 1.34 augustss
1965 1.61 augustss #if 1
1966 1.53 augustss if (xfer->device->bus->intr_context) {
1967 1.44 augustss /* We have no process context, so we can't use tsleep(). */
1968 1.81 augustss usb_callout(xfer->pipe->abort_handle,
1969 1.81 augustss hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer);
1970 1.44 augustss } else {
1971 1.55 augustss #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__)
1972 1.55 augustss KASSERT(intr_nesting_level == 0,
1973 1.55 augustss ("ohci_abort_req in interrupt context"));
1974 1.55 augustss #endif
1975 1.38 augustss usb_delay_ms(opipe->pipe.device->bus, 1);
1976 1.54 augustss ohci_abort_xfer_end(xfer);
1977 1.38 augustss }
1978 1.61 augustss #else
1979 1.61 augustss delay(1000);
1980 1.61 augustss ohci_abort_xfer_end(xfer);
1981 1.61 augustss #endif
1982 1.38 augustss }
1983 1.38 augustss
1984 1.38 augustss void
1985 1.90.2.1 minoura ohci_abort_xfer_end(void *v)
1986 1.38 augustss {
1987 1.53 augustss usbd_xfer_handle xfer = v;
1988 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
1989 1.38 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
1990 1.38 augustss ohci_soft_ed_t *sed;
1991 1.38 augustss ohci_soft_td_t *p, *n;
1992 1.38 augustss int s;
1993 1.38 augustss
1994 1.38 augustss s = splusb();
1995 1.38 augustss
1996 1.53 augustss p = xfer->hcpriv;
1997 1.34 augustss #ifdef DIAGNOSTIC
1998 1.55 augustss if (p == NULL) {
1999 1.54 augustss printf("ohci_abort_xfer: hcpriv==0\n");
2000 1.38 augustss return;
2001 1.38 augustss }
2002 1.34 augustss #endif
2003 1.53 augustss for (; p->xfer == xfer; p = n) {
2004 1.38 augustss n = p->nexttd;
2005 1.38 augustss ohci_free_std(sc, p);
2006 1.34 augustss }
2007 1.34 augustss
2008 1.38 augustss sed = opipe->sed;
2009 1.54 augustss DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n",
2010 1.76 tsutsui (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp)));
2011 1.76 tsutsui sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */
2012 1.76 tsutsui sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
2013 1.38 augustss
2014 1.53 augustss usb_transfer_complete(xfer);
2015 1.38 augustss
2016 1.34 augustss splx(s);
2017 1.34 augustss }
2018 1.34 augustss
2019 1.34 augustss /*
2020 1.1 augustss * Data structures and routines to emulate the root hub.
2021 1.1 augustss */
2022 1.82 augustss Static usb_device_descriptor_t ohci_devd = {
2023 1.1 augustss USB_DEVICE_DESCRIPTOR_SIZE,
2024 1.1 augustss UDESC_DEVICE, /* type */
2025 1.1 augustss {0x00, 0x01}, /* USB version */
2026 1.74 augustss UDCLASS_HUB, /* class */
2027 1.74 augustss UDSUBCLASS_HUB, /* subclass */
2028 1.1 augustss 0, /* protocol */
2029 1.1 augustss 64, /* max packet */
2030 1.1 augustss {0},{0},{0x00,0x01}, /* device id */
2031 1.1 augustss 1,2,0, /* string indicies */
2032 1.1 augustss 1 /* # of configurations */
2033 1.1 augustss };
2034 1.1 augustss
2035 1.82 augustss Static usb_config_descriptor_t ohci_confd = {
2036 1.1 augustss USB_CONFIG_DESCRIPTOR_SIZE,
2037 1.1 augustss UDESC_CONFIG,
2038 1.1 augustss {USB_CONFIG_DESCRIPTOR_SIZE +
2039 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE +
2040 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE},
2041 1.1 augustss 1,
2042 1.1 augustss 1,
2043 1.1 augustss 0,
2044 1.1 augustss UC_SELF_POWERED,
2045 1.1 augustss 0 /* max power */
2046 1.1 augustss };
2047 1.1 augustss
2048 1.82 augustss Static usb_interface_descriptor_t ohci_ifcd = {
2049 1.1 augustss USB_INTERFACE_DESCRIPTOR_SIZE,
2050 1.1 augustss UDESC_INTERFACE,
2051 1.1 augustss 0,
2052 1.1 augustss 0,
2053 1.1 augustss 1,
2054 1.74 augustss UICLASS_HUB,
2055 1.74 augustss UISUBCLASS_HUB,
2056 1.1 augustss 0,
2057 1.1 augustss 0
2058 1.1 augustss };
2059 1.1 augustss
2060 1.82 augustss Static usb_endpoint_descriptor_t ohci_endpd = {
2061 1.1 augustss USB_ENDPOINT_DESCRIPTOR_SIZE,
2062 1.1 augustss UDESC_ENDPOINT,
2063 1.40 augustss UE_DIR_IN | OHCI_INTR_ENDPT,
2064 1.1 augustss UE_INTERRUPT,
2065 1.1 augustss {8, 0}, /* max packet */
2066 1.1 augustss 255
2067 1.1 augustss };
2068 1.1 augustss
2069 1.82 augustss Static usb_hub_descriptor_t ohci_hubd = {
2070 1.1 augustss USB_HUB_DESCRIPTOR_SIZE,
2071 1.1 augustss UDESC_HUB,
2072 1.1 augustss 0,
2073 1.1 augustss {0,0},
2074 1.1 augustss 0,
2075 1.1 augustss 0,
2076 1.1 augustss {0},
2077 1.1 augustss };
2078 1.1 augustss
2079 1.82 augustss Static int
2080 1.1 augustss ohci_str(p, l, s)
2081 1.1 augustss usb_string_descriptor_t *p;
2082 1.1 augustss int l;
2083 1.1 augustss char *s;
2084 1.1 augustss {
2085 1.1 augustss int i;
2086 1.1 augustss
2087 1.1 augustss if (l == 0)
2088 1.1 augustss return (0);
2089 1.1 augustss p->bLength = 2 * strlen(s) + 2;
2090 1.1 augustss if (l == 1)
2091 1.1 augustss return (1);
2092 1.1 augustss p->bDescriptorType = UDESC_STRING;
2093 1.1 augustss l -= 2;
2094 1.1 augustss for (i = 0; s[i] && l > 1; i++, l -= 2)
2095 1.1 augustss USETW2(p->bString[i], 0, s[i]);
2096 1.1 augustss return (2*i+2);
2097 1.1 augustss }
2098 1.1 augustss
2099 1.1 augustss /*
2100 1.1 augustss * Simulate a hardware hub by handling all the necessary requests.
2101 1.1 augustss */
2102 1.82 augustss Static usbd_status
2103 1.90.2.1 minoura ohci_root_ctrl_transfer(usbd_xfer_handle xfer)
2104 1.1 augustss {
2105 1.53 augustss usbd_status err;
2106 1.17 augustss
2107 1.46 augustss /* Insert last in queue. */
2108 1.53 augustss err = usb_insert_transfer(xfer);
2109 1.53 augustss if (err)
2110 1.53 augustss return (err);
2111 1.46 augustss
2112 1.46 augustss /* Pipe isn't running, start first */
2113 1.53 augustss return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2114 1.17 augustss }
2115 1.17 augustss
2116 1.82 augustss Static usbd_status
2117 1.90.2.1 minoura ohci_root_ctrl_start(usbd_xfer_handle xfer)
2118 1.17 augustss {
2119 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2120 1.1 augustss usb_device_request_t *req;
2121 1.52 augustss void *buf = NULL;
2122 1.1 augustss int port, i;
2123 1.46 augustss int s, len, value, index, l, totlen = 0;
2124 1.1 augustss usb_port_status_t ps;
2125 1.1 augustss usb_hub_descriptor_t hubd;
2126 1.53 augustss usbd_status err;
2127 1.1 augustss u_int32_t v;
2128 1.1 augustss
2129 1.83 augustss if (sc->sc_dying)
2130 1.83 augustss return (USBD_IOERROR);
2131 1.83 augustss
2132 1.42 augustss #ifdef DIAGNOSTIC
2133 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST))
2134 1.1 augustss /* XXX panic */
2135 1.1 augustss return (USBD_INVAL);
2136 1.42 augustss #endif
2137 1.53 augustss req = &xfer->request;
2138 1.1 augustss
2139 1.1 augustss DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n",
2140 1.1 augustss req->bmRequestType, req->bRequest));
2141 1.1 augustss
2142 1.1 augustss len = UGETW(req->wLength);
2143 1.1 augustss value = UGETW(req->wValue);
2144 1.1 augustss index = UGETW(req->wIndex);
2145 1.43 augustss
2146 1.43 augustss if (len != 0)
2147 1.53 augustss buf = KERNADDR(&xfer->dmabuf);
2148 1.43 augustss
2149 1.1 augustss #define C(x,y) ((x) | ((y) << 8))
2150 1.1 augustss switch(C(req->bRequest, req->bmRequestType)) {
2151 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE):
2152 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE):
2153 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT):
2154 1.1 augustss /*
2155 1.15 augustss * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops
2156 1.1 augustss * for the integrated root hub.
2157 1.1 augustss */
2158 1.1 augustss break;
2159 1.1 augustss case C(UR_GET_CONFIG, UT_READ_DEVICE):
2160 1.1 augustss if (len > 0) {
2161 1.1 augustss *(u_int8_t *)buf = sc->sc_conf;
2162 1.1 augustss totlen = 1;
2163 1.1 augustss }
2164 1.1 augustss break;
2165 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE):
2166 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value));
2167 1.1 augustss switch(value >> 8) {
2168 1.1 augustss case UDESC_DEVICE:
2169 1.1 augustss if ((value & 0xff) != 0) {
2170 1.53 augustss err = USBD_IOERROR;
2171 1.1 augustss goto ret;
2172 1.1 augustss }
2173 1.1 augustss totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE);
2174 1.29 augustss USETW(ohci_devd.idVendor, sc->sc_id_vendor);
2175 1.1 augustss memcpy(buf, &ohci_devd, l);
2176 1.1 augustss break;
2177 1.1 augustss case UDESC_CONFIG:
2178 1.1 augustss if ((value & 0xff) != 0) {
2179 1.53 augustss err = USBD_IOERROR;
2180 1.1 augustss goto ret;
2181 1.1 augustss }
2182 1.1 augustss totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE);
2183 1.1 augustss memcpy(buf, &ohci_confd, l);
2184 1.1 augustss buf = (char *)buf + l;
2185 1.1 augustss len -= l;
2186 1.1 augustss l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE);
2187 1.1 augustss totlen += l;
2188 1.1 augustss memcpy(buf, &ohci_ifcd, l);
2189 1.1 augustss buf = (char *)buf + l;
2190 1.1 augustss len -= l;
2191 1.1 augustss l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE);
2192 1.1 augustss totlen += l;
2193 1.1 augustss memcpy(buf, &ohci_endpd, l);
2194 1.1 augustss break;
2195 1.1 augustss case UDESC_STRING:
2196 1.1 augustss if (len == 0)
2197 1.1 augustss break;
2198 1.1 augustss *(u_int8_t *)buf = 0;
2199 1.1 augustss totlen = 1;
2200 1.1 augustss switch (value & 0xff) {
2201 1.1 augustss case 1: /* Vendor */
2202 1.1 augustss totlen = ohci_str(buf, len, sc->sc_vendor);
2203 1.1 augustss break;
2204 1.1 augustss case 2: /* Product */
2205 1.1 augustss totlen = ohci_str(buf, len, "OHCI root hub");
2206 1.1 augustss break;
2207 1.1 augustss }
2208 1.1 augustss break;
2209 1.1 augustss default:
2210 1.53 augustss err = USBD_IOERROR;
2211 1.1 augustss goto ret;
2212 1.1 augustss }
2213 1.1 augustss break;
2214 1.1 augustss case C(UR_GET_INTERFACE, UT_READ_INTERFACE):
2215 1.1 augustss if (len > 0) {
2216 1.1 augustss *(u_int8_t *)buf = 0;
2217 1.1 augustss totlen = 1;
2218 1.1 augustss }
2219 1.1 augustss break;
2220 1.1 augustss case C(UR_GET_STATUS, UT_READ_DEVICE):
2221 1.1 augustss if (len > 1) {
2222 1.1 augustss USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED);
2223 1.1 augustss totlen = 2;
2224 1.1 augustss }
2225 1.1 augustss break;
2226 1.1 augustss case C(UR_GET_STATUS, UT_READ_INTERFACE):
2227 1.1 augustss case C(UR_GET_STATUS, UT_READ_ENDPOINT):
2228 1.1 augustss if (len > 1) {
2229 1.1 augustss USETW(((usb_status_t *)buf)->wStatus, 0);
2230 1.1 augustss totlen = 2;
2231 1.1 augustss }
2232 1.1 augustss break;
2233 1.1 augustss case C(UR_SET_ADDRESS, UT_WRITE_DEVICE):
2234 1.1 augustss if (value >= USB_MAX_DEVICES) {
2235 1.53 augustss err = USBD_IOERROR;
2236 1.1 augustss goto ret;
2237 1.1 augustss }
2238 1.1 augustss sc->sc_addr = value;
2239 1.1 augustss break;
2240 1.1 augustss case C(UR_SET_CONFIG, UT_WRITE_DEVICE):
2241 1.1 augustss if (value != 0 && value != 1) {
2242 1.53 augustss err = USBD_IOERROR;
2243 1.1 augustss goto ret;
2244 1.1 augustss }
2245 1.1 augustss sc->sc_conf = value;
2246 1.1 augustss break;
2247 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE):
2248 1.1 augustss break;
2249 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_DEVICE):
2250 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_INTERFACE):
2251 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT):
2252 1.53 augustss err = USBD_IOERROR;
2253 1.1 augustss goto ret;
2254 1.1 augustss case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE):
2255 1.1 augustss break;
2256 1.1 augustss case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT):
2257 1.1 augustss break;
2258 1.1 augustss /* Hub requests */
2259 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE):
2260 1.1 augustss break;
2261 1.1 augustss case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER):
2262 1.14 augustss DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE "
2263 1.14 augustss "port=%d feature=%d\n",
2264 1.1 augustss index, value));
2265 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2266 1.53 augustss err = USBD_IOERROR;
2267 1.1 augustss goto ret;
2268 1.1 augustss }
2269 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2270 1.1 augustss switch(value) {
2271 1.1 augustss case UHF_PORT_ENABLE:
2272 1.1 augustss OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS);
2273 1.1 augustss break;
2274 1.1 augustss case UHF_PORT_SUSPEND:
2275 1.1 augustss OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR);
2276 1.1 augustss break;
2277 1.1 augustss case UHF_PORT_POWER:
2278 1.86 augustss /* Yes, writing to the LOW_SPEED bit clears power. */
2279 1.1 augustss OWRITE4(sc, port, UPS_LOW_SPEED);
2280 1.1 augustss break;
2281 1.1 augustss case UHF_C_PORT_CONNECTION:
2282 1.1 augustss OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16);
2283 1.1 augustss break;
2284 1.1 augustss case UHF_C_PORT_ENABLE:
2285 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16);
2286 1.1 augustss break;
2287 1.1 augustss case UHF_C_PORT_SUSPEND:
2288 1.1 augustss OWRITE4(sc, port, UPS_C_SUSPEND << 16);
2289 1.1 augustss break;
2290 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2291 1.1 augustss OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16);
2292 1.1 augustss break;
2293 1.1 augustss case UHF_C_PORT_RESET:
2294 1.1 augustss OWRITE4(sc, port, UPS_C_PORT_RESET << 16);
2295 1.1 augustss break;
2296 1.1 augustss default:
2297 1.53 augustss err = USBD_IOERROR;
2298 1.1 augustss goto ret;
2299 1.1 augustss }
2300 1.1 augustss switch(value) {
2301 1.1 augustss case UHF_C_PORT_CONNECTION:
2302 1.1 augustss case UHF_C_PORT_ENABLE:
2303 1.1 augustss case UHF_C_PORT_SUSPEND:
2304 1.1 augustss case UHF_C_PORT_OVER_CURRENT:
2305 1.1 augustss case UHF_C_PORT_RESET:
2306 1.1 augustss /* Enable RHSC interrupt if condition is cleared. */
2307 1.1 augustss if ((OREAD4(sc, port) >> 16) == 0)
2308 1.1 augustss ohci_rhsc_able(sc, 1);
2309 1.1 augustss break;
2310 1.1 augustss default:
2311 1.1 augustss break;
2312 1.1 augustss }
2313 1.1 augustss break;
2314 1.1 augustss case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE):
2315 1.1 augustss if (value != 0) {
2316 1.53 augustss err = USBD_IOERROR;
2317 1.1 augustss goto ret;
2318 1.1 augustss }
2319 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A);
2320 1.1 augustss hubd = ohci_hubd;
2321 1.1 augustss hubd.bNbrPorts = sc->sc_noport;
2322 1.15 augustss USETW(hubd.wHubCharacteristics,
2323 1.1 augustss (v & OHCI_NPS ? UHD_PWR_NO_SWITCH :
2324 1.1 augustss v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL)
2325 1.1 augustss /* XXX overcurrent */
2326 1.1 augustss );
2327 1.1 augustss hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v);
2328 1.1 augustss v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B);
2329 1.15 augustss for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8)
2330 1.15 augustss hubd.DeviceRemovable[i++] = (u_int8_t)v;
2331 1.15 augustss hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i;
2332 1.1 augustss l = min(len, hubd.bDescLength);
2333 1.1 augustss totlen = l;
2334 1.1 augustss memcpy(buf, &hubd, l);
2335 1.1 augustss break;
2336 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE):
2337 1.1 augustss if (len != 4) {
2338 1.53 augustss err = USBD_IOERROR;
2339 1.1 augustss goto ret;
2340 1.1 augustss }
2341 1.1 augustss memset(buf, 0, len); /* ? XXX */
2342 1.1 augustss totlen = len;
2343 1.1 augustss break;
2344 1.1 augustss case C(UR_GET_STATUS, UT_READ_CLASS_OTHER):
2345 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n",
2346 1.1 augustss index));
2347 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2348 1.53 augustss err = USBD_IOERROR;
2349 1.1 augustss goto ret;
2350 1.1 augustss }
2351 1.1 augustss if (len != 4) {
2352 1.53 augustss err = USBD_IOERROR;
2353 1.1 augustss goto ret;
2354 1.1 augustss }
2355 1.1 augustss v = OREAD4(sc, OHCI_RH_PORT_STATUS(index));
2356 1.1 augustss DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n",
2357 1.1 augustss v));
2358 1.1 augustss USETW(ps.wPortStatus, v);
2359 1.1 augustss USETW(ps.wPortChange, v >> 16);
2360 1.1 augustss l = min(len, sizeof ps);
2361 1.1 augustss memcpy(buf, &ps, l);
2362 1.1 augustss totlen = l;
2363 1.1 augustss break;
2364 1.1 augustss case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE):
2365 1.53 augustss err = USBD_IOERROR;
2366 1.1 augustss goto ret;
2367 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE):
2368 1.1 augustss break;
2369 1.1 augustss case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER):
2370 1.1 augustss if (index < 1 || index > sc->sc_noport) {
2371 1.53 augustss err = USBD_IOERROR;
2372 1.1 augustss goto ret;
2373 1.1 augustss }
2374 1.1 augustss port = OHCI_RH_PORT_STATUS(index);
2375 1.1 augustss switch(value) {
2376 1.1 augustss case UHF_PORT_ENABLE:
2377 1.1 augustss OWRITE4(sc, port, UPS_PORT_ENABLED);
2378 1.1 augustss break;
2379 1.1 augustss case UHF_PORT_SUSPEND:
2380 1.1 augustss OWRITE4(sc, port, UPS_SUSPEND);
2381 1.1 augustss break;
2382 1.1 augustss case UHF_PORT_RESET:
2383 1.14 augustss DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n",
2384 1.14 augustss index));
2385 1.1 augustss OWRITE4(sc, port, UPS_RESET);
2386 1.1 augustss for (i = 0; i < 10; i++) {
2387 1.20 augustss usb_delay_ms(&sc->sc_bus, 10);
2388 1.1 augustss if ((OREAD4(sc, port) & UPS_RESET) == 0)
2389 1.1 augustss break;
2390 1.1 augustss }
2391 1.1 augustss DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n",
2392 1.1 augustss index, OREAD4(sc, port)));
2393 1.1 augustss break;
2394 1.1 augustss case UHF_PORT_POWER:
2395 1.14 augustss DPRINTFN(2,("ohci_root_ctrl_transfer: set port power "
2396 1.14 augustss "%d\n", index));
2397 1.1 augustss OWRITE4(sc, port, UPS_PORT_POWER);
2398 1.1 augustss break;
2399 1.1 augustss default:
2400 1.53 augustss err = USBD_IOERROR;
2401 1.1 augustss goto ret;
2402 1.1 augustss }
2403 1.1 augustss break;
2404 1.1 augustss default:
2405 1.53 augustss err = USBD_IOERROR;
2406 1.1 augustss goto ret;
2407 1.1 augustss }
2408 1.53 augustss xfer->actlen = totlen;
2409 1.53 augustss err = USBD_NORMAL_COMPLETION;
2410 1.1 augustss ret:
2411 1.53 augustss xfer->status = err;
2412 1.46 augustss s = splusb();
2413 1.53 augustss usb_transfer_complete(xfer);
2414 1.46 augustss splx(s);
2415 1.1 augustss return (USBD_IN_PROGRESS);
2416 1.1 augustss }
2417 1.1 augustss
2418 1.1 augustss /* Abort a root control request. */
2419 1.82 augustss Static void
2420 1.90.2.1 minoura ohci_root_ctrl_abort(usbd_xfer_handle xfer)
2421 1.1 augustss {
2422 1.9 augustss /* Nothing to do, all transfers are synchronous. */
2423 1.1 augustss }
2424 1.1 augustss
2425 1.1 augustss /* Close the root pipe. */
2426 1.82 augustss Static void
2427 1.90.2.1 minoura ohci_root_ctrl_close(usbd_pipe_handle pipe)
2428 1.1 augustss {
2429 1.1 augustss DPRINTF(("ohci_root_ctrl_close\n"));
2430 1.34 augustss /* Nothing to do. */
2431 1.1 augustss }
2432 1.1 augustss
2433 1.82 augustss Static usbd_status
2434 1.90.2.1 minoura ohci_root_intr_transfer(usbd_xfer_handle xfer)
2435 1.1 augustss {
2436 1.53 augustss usbd_status err;
2437 1.17 augustss
2438 1.46 augustss /* Insert last in queue. */
2439 1.53 augustss err = usb_insert_transfer(xfer);
2440 1.53 augustss if (err)
2441 1.53 augustss return (err);
2442 1.46 augustss
2443 1.46 augustss /* Pipe isn't running, start first */
2444 1.53 augustss return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2445 1.17 augustss }
2446 1.17 augustss
2447 1.82 augustss Static usbd_status
2448 1.90.2.1 minoura ohci_root_intr_start(usbd_xfer_handle xfer)
2449 1.17 augustss {
2450 1.53 augustss usbd_pipe_handle pipe = xfer->pipe;
2451 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2452 1.1 augustss
2453 1.83 augustss if (sc->sc_dying)
2454 1.83 augustss return (USBD_IOERROR);
2455 1.83 augustss
2456 1.53 augustss sc->sc_intrxfer = xfer;
2457 1.1 augustss
2458 1.1 augustss return (USBD_IN_PROGRESS);
2459 1.1 augustss }
2460 1.1 augustss
2461 1.3 augustss /* Abort a root interrupt request. */
2462 1.82 augustss Static void
2463 1.90.2.1 minoura ohci_root_intr_abort(usbd_xfer_handle xfer)
2464 1.1 augustss {
2465 1.53 augustss int s;
2466 1.53 augustss
2467 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2468 1.51 augustss DPRINTF(("ohci_root_intr_abort: remove\n"));
2469 1.53 augustss xfer->pipe->intrxfer = NULL;
2470 1.51 augustss }
2471 1.53 augustss xfer->status = USBD_CANCELLED;
2472 1.53 augustss s = splusb();
2473 1.53 augustss usb_transfer_complete(xfer);
2474 1.53 augustss splx(s);
2475 1.1 augustss }
2476 1.1 augustss
2477 1.1 augustss /* Close the root pipe. */
2478 1.82 augustss Static void
2479 1.90.2.1 minoura ohci_root_intr_close(usbd_pipe_handle pipe)
2480 1.1 augustss {
2481 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2482 1.1 augustss
2483 1.1 augustss DPRINTF(("ohci_root_intr_close\n"));
2484 1.34 augustss
2485 1.53 augustss sc->sc_intrxfer = NULL;
2486 1.1 augustss }
2487 1.1 augustss
2488 1.1 augustss /************************/
2489 1.1 augustss
2490 1.82 augustss Static usbd_status
2491 1.90.2.1 minoura ohci_device_ctrl_transfer(usbd_xfer_handle xfer)
2492 1.1 augustss {
2493 1.53 augustss usbd_status err;
2494 1.17 augustss
2495 1.46 augustss /* Insert last in queue. */
2496 1.53 augustss err = usb_insert_transfer(xfer);
2497 1.53 augustss if (err)
2498 1.53 augustss return (err);
2499 1.46 augustss
2500 1.46 augustss /* Pipe isn't running, start first */
2501 1.53 augustss return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2502 1.17 augustss }
2503 1.17 augustss
2504 1.82 augustss Static usbd_status
2505 1.90.2.1 minoura ohci_device_ctrl_start(usbd_xfer_handle xfer)
2506 1.17 augustss {
2507 1.53 augustss ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus;
2508 1.53 augustss usbd_status err;
2509 1.1 augustss
2510 1.83 augustss if (sc->sc_dying)
2511 1.83 augustss return (USBD_IOERROR);
2512 1.83 augustss
2513 1.42 augustss #ifdef DIAGNOSTIC
2514 1.53 augustss if (!(xfer->rqflags & URQ_REQUEST)) {
2515 1.1 augustss /* XXX panic */
2516 1.1 augustss printf("ohci_device_ctrl_transfer: not a request\n");
2517 1.1 augustss return (USBD_INVAL);
2518 1.1 augustss }
2519 1.42 augustss #endif
2520 1.1 augustss
2521 1.53 augustss err = ohci_device_request(xfer);
2522 1.53 augustss if (err)
2523 1.53 augustss return (err);
2524 1.1 augustss
2525 1.6 augustss if (sc->sc_bus.use_polling)
2526 1.53 augustss ohci_waitintr(sc, xfer);
2527 1.1 augustss return (USBD_IN_PROGRESS);
2528 1.1 augustss }
2529 1.1 augustss
2530 1.1 augustss /* Abort a device control request. */
2531 1.82 augustss Static void
2532 1.90.2.1 minoura ohci_device_ctrl_abort(usbd_xfer_handle xfer)
2533 1.1 augustss {
2534 1.53 augustss DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer));
2535 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2536 1.1 augustss }
2537 1.1 augustss
2538 1.1 augustss /* Close a device control pipe. */
2539 1.82 augustss Static void
2540 1.90.2.1 minoura ohci_device_ctrl_close(usbd_pipe_handle pipe)
2541 1.1 augustss {
2542 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2543 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2544 1.1 augustss
2545 1.34 augustss DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe));
2546 1.34 augustss ohci_close_pipe(pipe, sc->sc_ctrl_head);
2547 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2548 1.3 augustss }
2549 1.3 augustss
2550 1.3 augustss /************************/
2551 1.37 augustss
2552 1.82 augustss Static void
2553 1.90.2.1 minoura ohci_device_clear_toggle(usbd_pipe_handle pipe)
2554 1.37 augustss {
2555 1.37 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2556 1.37 augustss
2557 1.76 tsutsui opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY);
2558 1.37 augustss }
2559 1.37 augustss
2560 1.82 augustss Static void
2561 1.90.2.1 minoura ohci_noop(usbd_pipe_handle pipe)
2562 1.37 augustss {
2563 1.37 augustss }
2564 1.3 augustss
2565 1.82 augustss Static usbd_status
2566 1.90.2.1 minoura ohci_device_bulk_transfer(usbd_xfer_handle xfer)
2567 1.3 augustss {
2568 1.53 augustss usbd_status err;
2569 1.17 augustss
2570 1.46 augustss /* Insert last in queue. */
2571 1.53 augustss err = usb_insert_transfer(xfer);
2572 1.53 augustss if (err)
2573 1.53 augustss return (err);
2574 1.46 augustss
2575 1.46 augustss /* Pipe isn't running, start first */
2576 1.53 augustss return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2577 1.17 augustss }
2578 1.17 augustss
2579 1.82 augustss Static usbd_status
2580 1.90.2.1 minoura ohci_device_bulk_start(usbd_xfer_handle xfer)
2581 1.17 augustss {
2582 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2583 1.3 augustss usbd_device_handle dev = opipe->pipe.device;
2584 1.3 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2585 1.3 augustss int addr = dev->address;
2586 1.48 augustss ohci_soft_td_t *data, *tail, *tdp;
2587 1.3 augustss ohci_soft_ed_t *sed;
2588 1.40 augustss int s, len, isread, endpt;
2589 1.53 augustss usbd_status err;
2590 1.3 augustss
2591 1.83 augustss if (sc->sc_dying)
2592 1.83 augustss return (USBD_IOERROR);
2593 1.83 augustss
2594 1.34 augustss #ifdef DIAGNOSTIC
2595 1.53 augustss if (xfer->rqflags & URQ_REQUEST) {
2596 1.3 augustss /* XXX panic */
2597 1.34 augustss printf("ohci_device_bulk_start: a request\n");
2598 1.3 augustss return (USBD_INVAL);
2599 1.3 augustss }
2600 1.34 augustss #endif
2601 1.3 augustss
2602 1.53 augustss len = xfer->length;
2603 1.53 augustss endpt = xfer->pipe->endpoint->edesc->bEndpointAddress;
2604 1.40 augustss isread = UE_GET_DIR(endpt) == UE_DIR_IN;
2605 1.3 augustss sed = opipe->sed;
2606 1.3 augustss
2607 1.53 augustss DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d "
2608 1.53 augustss "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags,
2609 1.40 augustss endpt));
2610 1.34 augustss
2611 1.32 augustss opipe->u.bulk.isread = isread;
2612 1.3 augustss opipe->u.bulk.length = len;
2613 1.3 augustss
2614 1.3 augustss /* Update device address */
2615 1.76 tsutsui sed->ed.ed_flags = htole32(
2616 1.76 tsutsui (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) |
2617 1.16 augustss OHCI_ED_SET_FA(addr));
2618 1.3 augustss
2619 1.48 augustss /* Allocate a chain of new TDs (including a new tail). */
2620 1.60 augustss data = opipe->tail.td;
2621 1.77 augustss err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer,
2622 1.77 augustss data, &tail);
2623 1.77 augustss /* We want interrupt at the end of the transfer. */
2624 1.77 augustss tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK);
2625 1.77 augustss tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1));
2626 1.77 augustss tail->flags |= OHCI_CALL_DONE;
2627 1.77 augustss tail = tail->nexttd; /* point at sentinel */
2628 1.53 augustss if (err)
2629 1.53 augustss return (err);
2630 1.48 augustss
2631 1.53 augustss tail->xfer = NULL;
2632 1.53 augustss xfer->hcpriv = data;
2633 1.3 augustss
2634 1.34 augustss DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x "
2635 1.34 augustss "td_cbp=0x%08x td_be=0x%08x\n",
2636 1.76 tsutsui (int)le32toh(sed->ed.ed_flags),
2637 1.76 tsutsui (int)le32toh(data->td.td_flags),
2638 1.76 tsutsui (int)le32toh(data->td.td_cbp),
2639 1.76 tsutsui (int)le32toh(data->td.td_be)));
2640 1.34 augustss
2641 1.52 augustss #ifdef OHCI_DEBUG
2642 1.75 augustss if (ohcidebug > 5) {
2643 1.34 augustss ohci_dump_ed(sed);
2644 1.48 augustss ohci_dump_tds(data);
2645 1.34 augustss }
2646 1.34 augustss #endif
2647 1.34 augustss
2648 1.3 augustss /* Insert ED in schedule */
2649 1.3 augustss s = splusb();
2650 1.48 augustss for (tdp = data; tdp != tail; tdp = tdp->nexttd) {
2651 1.53 augustss tdp->xfer = xfer;
2652 1.48 augustss }
2653 1.76 tsutsui sed->ed.ed_tailp = htole32(tail->physaddr);
2654 1.60 augustss opipe->tail.td = tail;
2655 1.76 tsutsui sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2656 1.3 augustss OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF);
2657 1.53 augustss if (xfer->timeout && !sc->sc_bus.use_polling) {
2658 1.81 augustss usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout),
2659 1.80 augustss ohci_timeout, xfer);
2660 1.15 augustss }
2661 1.34 augustss
2662 1.52 augustss #if 0
2663 1.52 augustss /* This goes wrong if we are too slow. */
2664 1.75 augustss if (ohcidebug > 10) {
2665 1.75 augustss delay(10000);
2666 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2667 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2668 1.34 augustss ohci_dump_ed(sed);
2669 1.48 augustss ohci_dump_tds(data);
2670 1.34 augustss }
2671 1.34 augustss #endif
2672 1.34 augustss
2673 1.3 augustss splx(s);
2674 1.3 augustss
2675 1.3 augustss return (USBD_IN_PROGRESS);
2676 1.3 augustss }
2677 1.3 augustss
2678 1.82 augustss Static void
2679 1.90.2.1 minoura ohci_device_bulk_abort(usbd_xfer_handle xfer)
2680 1.3 augustss {
2681 1.53 augustss DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer));
2682 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2683 1.3 augustss }
2684 1.3 augustss
2685 1.34 augustss /*
2686 1.34 augustss * Close a device bulk pipe.
2687 1.34 augustss */
2688 1.82 augustss Static void
2689 1.90.2.1 minoura ohci_device_bulk_close(usbd_pipe_handle pipe)
2690 1.3 augustss {
2691 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2692 1.34 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2693 1.3 augustss
2694 1.34 augustss DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe));
2695 1.34 augustss ohci_close_pipe(pipe, sc->sc_bulk_head);
2696 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2697 1.1 augustss }
2698 1.1 augustss
2699 1.1 augustss /************************/
2700 1.1 augustss
2701 1.82 augustss Static usbd_status
2702 1.90.2.1 minoura ohci_device_intr_transfer(usbd_xfer_handle xfer)
2703 1.17 augustss {
2704 1.53 augustss usbd_status err;
2705 1.17 augustss
2706 1.46 augustss /* Insert last in queue. */
2707 1.53 augustss err = usb_insert_transfer(xfer);
2708 1.53 augustss if (err)
2709 1.53 augustss return (err);
2710 1.46 augustss
2711 1.46 augustss /* Pipe isn't running, start first */
2712 1.53 augustss return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue)));
2713 1.17 augustss }
2714 1.17 augustss
2715 1.82 augustss Static usbd_status
2716 1.90.2.1 minoura ohci_device_intr_start(usbd_xfer_handle xfer)
2717 1.1 augustss {
2718 1.53 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2719 1.1 augustss usbd_device_handle dev = opipe->pipe.device;
2720 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2721 1.1 augustss ohci_soft_ed_t *sed = opipe->sed;
2722 1.48 augustss ohci_soft_td_t *data, *tail;
2723 1.1 augustss int len;
2724 1.1 augustss int s;
2725 1.1 augustss
2726 1.83 augustss if (sc->sc_dying)
2727 1.83 augustss return (USBD_IOERROR);
2728 1.83 augustss
2729 1.53 augustss DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d "
2730 1.14 augustss "flags=%d priv=%p\n",
2731 1.53 augustss xfer, xfer->length, xfer->flags, xfer->priv));
2732 1.1 augustss
2733 1.42 augustss #ifdef DIAGNOSTIC
2734 1.53 augustss if (xfer->rqflags & URQ_REQUEST)
2735 1.1 augustss panic("ohci_device_intr_transfer: a request\n");
2736 1.42 augustss #endif
2737 1.1 augustss
2738 1.53 augustss len = xfer->length;
2739 1.1 augustss
2740 1.60 augustss data = opipe->tail.td;
2741 1.1 augustss tail = ohci_alloc_std(sc);
2742 1.55 augustss if (tail == NULL)
2743 1.43 augustss return (USBD_NOMEM);
2744 1.53 augustss tail->xfer = NULL;
2745 1.1 augustss
2746 1.76 tsutsui data->td.td_flags = htole32(
2747 1.16 augustss OHCI_TD_IN | OHCI_TD_NOCC |
2748 1.16 augustss OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY);
2749 1.53 augustss if (xfer->flags & USBD_SHORT_XFER_OK)
2750 1.76 tsutsui data->td.td_flags |= htole32(OHCI_TD_R);
2751 1.76 tsutsui data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf));
2752 1.48 augustss data->nexttd = tail;
2753 1.76 tsutsui data->td.td_nexttd = htole32(tail->physaddr);
2754 1.76 tsutsui data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1);
2755 1.48 augustss data->len = len;
2756 1.53 augustss data->xfer = xfer;
2757 1.48 augustss data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN;
2758 1.53 augustss xfer->hcpriv = data;
2759 1.1 augustss
2760 1.52 augustss #ifdef OHCI_DEBUG
2761 1.1 augustss if (ohcidebug > 5) {
2762 1.41 augustss DPRINTF(("ohci_device_intr_transfer:\n"));
2763 1.1 augustss ohci_dump_ed(sed);
2764 1.48 augustss ohci_dump_tds(data);
2765 1.1 augustss }
2766 1.1 augustss #endif
2767 1.1 augustss
2768 1.1 augustss /* Insert ED in schedule */
2769 1.1 augustss s = splusb();
2770 1.76 tsutsui sed->ed.ed_tailp = htole32(tail->physaddr);
2771 1.60 augustss opipe->tail.td = tail;
2772 1.76 tsutsui sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP);
2773 1.1 augustss
2774 1.52 augustss #if 0
2775 1.52 augustss /*
2776 1.52 augustss * This goes horribly wrong, printing thousands of descriptors,
2777 1.52 augustss * because false references are followed due to the fact that the
2778 1.52 augustss * TD is gone.
2779 1.52 augustss */
2780 1.1 augustss if (ohcidebug > 5) {
2781 1.55 augustss usb_delay_ms(&sc->sc_bus, 5);
2782 1.41 augustss DPRINTF(("ohci_device_intr_transfer: status=%x\n",
2783 1.41 augustss OREAD4(sc, OHCI_COMMAND_STATUS)));
2784 1.1 augustss ohci_dump_ed(sed);
2785 1.48 augustss ohci_dump_tds(data);
2786 1.1 augustss }
2787 1.1 augustss #endif
2788 1.26 augustss splx(s);
2789 1.1 augustss
2790 1.1 augustss return (USBD_IN_PROGRESS);
2791 1.1 augustss }
2792 1.1 augustss
2793 1.1 augustss /* Abort a device control request. */
2794 1.82 augustss Static void
2795 1.90.2.1 minoura ohci_device_intr_abort(usbd_xfer_handle xfer)
2796 1.1 augustss {
2797 1.53 augustss if (xfer->pipe->intrxfer == xfer) {
2798 1.1 augustss DPRINTF(("ohci_device_intr_abort: remove\n"));
2799 1.55 augustss xfer->pipe->intrxfer = NULL;
2800 1.1 augustss }
2801 1.54 augustss ohci_abort_xfer(xfer, USBD_CANCELLED);
2802 1.1 augustss }
2803 1.1 augustss
2804 1.1 augustss /* Close a device interrupt pipe. */
2805 1.82 augustss Static void
2806 1.90.2.1 minoura ohci_device_intr_close(usbd_pipe_handle pipe)
2807 1.1 augustss {
2808 1.1 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
2809 1.1 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
2810 1.1 augustss int nslots = opipe->u.intr.nslots;
2811 1.1 augustss int pos = opipe->u.intr.pos;
2812 1.1 augustss int j;
2813 1.1 augustss ohci_soft_ed_t *p, *sed = opipe->sed;
2814 1.1 augustss int s;
2815 1.1 augustss
2816 1.1 augustss DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n",
2817 1.1 augustss pipe, nslots, pos));
2818 1.1 augustss s = splusb();
2819 1.76 tsutsui sed->ed.ed_flags |= htole32(OHCI_ED_SKIP);
2820 1.76 tsutsui if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) !=
2821 1.76 tsutsui (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK))
2822 1.20 augustss usb_delay_ms(&sc->sc_bus, 2);
2823 1.1 augustss
2824 1.1 augustss for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next)
2825 1.1 augustss ;
2826 1.53 augustss #ifdef DIAGNOSTIC
2827 1.53 augustss if (p == NULL)
2828 1.1 augustss panic("ohci_device_intr_close: ED not found\n");
2829 1.53 augustss #endif
2830 1.1 augustss p->next = sed->next;
2831 1.39 augustss p->ed.ed_nexted = sed->ed.ed_nexted;
2832 1.1 augustss splx(s);
2833 1.1 augustss
2834 1.1 augustss for (j = 0; j < nslots; j++)
2835 1.31 wrstuden --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS];
2836 1.1 augustss
2837 1.60 augustss ohci_free_std(sc, opipe->tail.td);
2838 1.1 augustss ohci_free_sed(sc, opipe->sed);
2839 1.1 augustss }
2840 1.1 augustss
2841 1.82 augustss Static usbd_status
2842 1.90.2.1 minoura ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival)
2843 1.1 augustss {
2844 1.1 augustss int i, j, s, best;
2845 1.1 augustss u_int npoll, slow, shigh, nslots;
2846 1.1 augustss u_int bestbw, bw;
2847 1.1 augustss ohci_soft_ed_t *hsed, *sed = opipe->sed;
2848 1.1 augustss
2849 1.1 augustss DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe));
2850 1.1 augustss if (ival == 0) {
2851 1.1 augustss printf("ohci_setintr: 0 interval\n");
2852 1.1 augustss return (USBD_INVAL);
2853 1.1 augustss }
2854 1.1 augustss
2855 1.1 augustss npoll = OHCI_NO_INTRS;
2856 1.1 augustss while (npoll > ival)
2857 1.1 augustss npoll /= 2;
2858 1.1 augustss DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll));
2859 1.1 augustss
2860 1.1 augustss /*
2861 1.1 augustss * We now know which level in the tree the ED must go into.
2862 1.1 augustss * Figure out which slot has most bandwidth left over.
2863 1.1 augustss * Slots to examine:
2864 1.1 augustss * npoll
2865 1.1 augustss * 1 0
2866 1.1 augustss * 2 1 2
2867 1.1 augustss * 4 3 4 5 6
2868 1.1 augustss * 8 7 8 9 10 11 12 13 14
2869 1.1 augustss * N (N-1) .. (N-1+N-1)
2870 1.1 augustss */
2871 1.1 augustss slow = npoll-1;
2872 1.1 augustss shigh = slow + npoll;
2873 1.1 augustss nslots = OHCI_NO_INTRS / npoll;
2874 1.1 augustss for (best = i = slow, bestbw = ~0; i < shigh; i++) {
2875 1.1 augustss bw = 0;
2876 1.1 augustss for (j = 0; j < nslots; j++)
2877 1.28 augustss bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS];
2878 1.1 augustss if (bw < bestbw) {
2879 1.1 augustss best = i;
2880 1.1 augustss bestbw = bw;
2881 1.1 augustss }
2882 1.1 augustss }
2883 1.1 augustss DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n",
2884 1.1 augustss best, slow, shigh, bestbw));
2885 1.1 augustss
2886 1.1 augustss s = splusb();
2887 1.1 augustss hsed = sc->sc_eds[best];
2888 1.1 augustss sed->next = hsed->next;
2889 1.39 augustss sed->ed.ed_nexted = hsed->ed.ed_nexted;
2890 1.1 augustss hsed->next = sed;
2891 1.76 tsutsui hsed->ed.ed_nexted = htole32(sed->physaddr);
2892 1.1 augustss splx(s);
2893 1.1 augustss
2894 1.1 augustss for (j = 0; j < nslots; j++)
2895 1.28 augustss ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS];
2896 1.1 augustss opipe->u.intr.nslots = nslots;
2897 1.1 augustss opipe->u.intr.pos = best;
2898 1.1 augustss
2899 1.1 augustss DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe));
2900 1.1 augustss return (USBD_NORMAL_COMPLETION);
2901 1.60 augustss }
2902 1.60 augustss
2903 1.60 augustss /***********************/
2904 1.60 augustss
2905 1.60 augustss usbd_status
2906 1.90.2.1 minoura ohci_device_isoc_transfer(usbd_xfer_handle xfer)
2907 1.60 augustss {
2908 1.60 augustss usbd_status err;
2909 1.60 augustss
2910 1.60 augustss DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer));
2911 1.60 augustss
2912 1.60 augustss /* Put it on our queue, */
2913 1.60 augustss err = usb_insert_transfer(xfer);
2914 1.60 augustss
2915 1.60 augustss /* bail out on error, */
2916 1.60 augustss if (err && err != USBD_IN_PROGRESS)
2917 1.60 augustss return (err);
2918 1.60 augustss
2919 1.60 augustss /* XXX should check inuse here */
2920 1.60 augustss
2921 1.60 augustss /* insert into schedule, */
2922 1.60 augustss ohci_device_isoc_enter(xfer);
2923 1.60 augustss
2924 1.83 augustss /* and start if the pipe wasn't running */
2925 1.60 augustss if (!err)
2926 1.60 augustss ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue));
2927 1.60 augustss
2928 1.60 augustss return (err);
2929 1.60 augustss }
2930 1.60 augustss
2931 1.60 augustss void
2932 1.90.2.1 minoura ohci_device_isoc_enter(usbd_xfer_handle xfer)
2933 1.60 augustss {
2934 1.61 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
2935 1.61 augustss usbd_device_handle dev = opipe->pipe.device;
2936 1.61 augustss ohci_softc_t *sc = (ohci_softc_t *)dev->bus;
2937 1.61 augustss ohci_soft_ed_t *sed = opipe->sed;
2938 1.61 augustss struct iso *iso = &opipe->u.iso;
2939 1.61 augustss ohci_soft_itd_t *sitd, *nsitd;
2940 1.83 augustss ohci_physaddr_t buf, offs, noffs, bp0;
2941 1.61 augustss int i, ncur, nframes;
2942 1.61 augustss int s;
2943 1.61 augustss
2944 1.83 augustss DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p "
2945 1.83 augustss "nframes=%d\n",
2946 1.83 augustss iso->inuse, iso->next, xfer, xfer->nframes));
2947 1.83 augustss
2948 1.83 augustss if (sc->sc_dying)
2949 1.83 augustss return;
2950 1.83 augustss
2951 1.83 augustss if (iso->next == -1) {
2952 1.83 augustss /* Not in use yet, schedule it a few frames ahead. */
2953 1.83 augustss iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5;
2954 1.83 augustss DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n",
2955 1.83 augustss iso->next));
2956 1.83 augustss }
2957 1.83 augustss
2958 1.61 augustss sitd = opipe->tail.itd;
2959 1.61 augustss buf = DMAADDR(&xfer->dmabuf);
2960 1.83 augustss bp0 = OHCI_PAGE(buf);
2961 1.83 augustss offs = OHCI_PAGE_OFFSET(buf);
2962 1.61 augustss nframes = xfer->nframes;
2963 1.83 augustss xfer->hcpriv = sitd;
2964 1.61 augustss for (i = ncur = 0; i < nframes; i++, ncur++) {
2965 1.83 augustss noffs = offs + xfer->frlengths[i];
2966 1.61 augustss if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */
2967 1.83 augustss OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */
2968 1.61 augustss
2969 1.83 augustss /* Allocate next ITD */
2970 1.61 augustss nsitd = ohci_alloc_sitd(sc);
2971 1.61 augustss if (nsitd == NULL) {
2972 1.61 augustss /* XXX what now? */
2973 1.83 augustss printf("%s: isoc TD alloc failed\n",
2974 1.83 augustss USBDEVNAME(sc->sc_bus.bdev));
2975 1.61 augustss return;
2976 1.61 augustss }
2977 1.83 augustss
2978 1.83 augustss /* Fill current ITD */
2979 1.76 tsutsui sitd->itd.itd_flags = htole32(
2980 1.61 augustss OHCI_ITD_NOCC |
2981 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
2982 1.83 augustss OHCI_ITD_SET_DI(6) | /* delay intr a little */
2983 1.83 augustss OHCI_ITD_SET_FC(ncur));
2984 1.83 augustss sitd->itd.itd_bp0 = htole32(bp0);
2985 1.83 augustss sitd->nextitd = nsitd;
2986 1.83 augustss sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
2987 1.83 augustss sitd->itd.itd_be = htole32(bp0 + offs - 1);
2988 1.83 augustss sitd->xfer = xfer;
2989 1.83 augustss sitd->flags = 0;
2990 1.83 augustss
2991 1.61 augustss sitd = nsitd;
2992 1.61 augustss iso->next = iso->next + ncur;
2993 1.83 augustss bp0 = OHCI_PAGE(buf + offs);
2994 1.61 augustss ncur = 0;
2995 1.61 augustss }
2996 1.83 augustss sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs));
2997 1.83 augustss offs = noffs;
2998 1.61 augustss }
2999 1.61 augustss nsitd = ohci_alloc_sitd(sc);
3000 1.61 augustss if (nsitd == NULL) {
3001 1.61 augustss /* XXX what now? */
3002 1.83 augustss printf("%s: isoc TD alloc failed\n",
3003 1.83 augustss USBDEVNAME(sc->sc_bus.bdev));
3004 1.61 augustss return;
3005 1.61 augustss }
3006 1.83 augustss /* Fixup last used ITD */
3007 1.83 augustss sitd->itd.itd_flags = htole32(
3008 1.61 augustss OHCI_ITD_NOCC |
3009 1.61 augustss OHCI_ITD_SET_SF(iso->next) |
3010 1.61 augustss OHCI_ITD_SET_DI(0) |
3011 1.61 augustss OHCI_ITD_SET_FC(ncur));
3012 1.83 augustss sitd->itd.itd_bp0 = htole32(bp0);
3013 1.83 augustss sitd->nextitd = nsitd;
3014 1.83 augustss sitd->itd.itd_nextitd = htole32(nsitd->physaddr);
3015 1.83 augustss sitd->itd.itd_be = htole32(bp0 + offs - 1);
3016 1.83 augustss sitd->xfer = xfer;
3017 1.83 augustss sitd->flags = OHCI_CALL_DONE;
3018 1.83 augustss
3019 1.61 augustss iso->next = iso->next + ncur;
3020 1.83 augustss iso->inuse += nframes;
3021 1.83 augustss
3022 1.83 augustss xfer->actlen = offs; /* XXX pretend we did it all */
3023 1.83 augustss
3024 1.83 augustss xfer->status = USBD_IN_PROGRESS;
3025 1.83 augustss
3026 1.83 augustss #ifdef OHCI_DEBUG
3027 1.83 augustss if (ohcidebug > 5) {
3028 1.83 augustss DPRINTF(("ohci_device_isoc_enter: frame=%d\n",
3029 1.83 augustss le32toh(sc->sc_hcca->hcca_frame_number)));
3030 1.83 augustss ohci_dump_itds(xfer->hcpriv);
3031 1.83 augustss ohci_dump_ed(sed);
3032 1.83 augustss }
3033 1.83 augustss #endif
3034 1.61 augustss
3035 1.83 augustss s = splusb();
3036 1.61 augustss opipe->tail.itd = nsitd;
3037 1.76 tsutsui sed->ed.ed_tailp = htole32(nsitd->physaddr);
3038 1.61 augustss splx(s);
3039 1.83 augustss
3040 1.83 augustss #ifdef OHCI_DEBUG
3041 1.83 augustss if (ohcidebug > 5) {
3042 1.83 augustss delay(150000);
3043 1.83 augustss DPRINTF(("ohci_device_isoc_enter: after frame=%d\n",
3044 1.83 augustss le32toh(sc->sc_hcca->hcca_frame_number)));
3045 1.83 augustss ohci_dump_itds(xfer->hcpriv);
3046 1.83 augustss ohci_dump_ed(sed);
3047 1.83 augustss }
3048 1.83 augustss #endif
3049 1.60 augustss }
3050 1.60 augustss
3051 1.60 augustss usbd_status
3052 1.90.2.1 minoura ohci_device_isoc_start(usbd_xfer_handle xfer)
3053 1.60 augustss {
3054 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3055 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3056 1.83 augustss
3057 1.83 augustss DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer));
3058 1.83 augustss
3059 1.83 augustss if (sc->sc_dying)
3060 1.83 augustss return (USBD_IOERROR);
3061 1.83 augustss
3062 1.83 augustss #ifdef DIAGNOSTIC
3063 1.83 augustss if (xfer->status != USBD_IN_PROGRESS)
3064 1.83 augustss printf("uhci_device_isoc_start: not in progress %p\n", xfer);
3065 1.83 augustss #endif
3066 1.83 augustss
3067 1.83 augustss /* XXX anything to do? */
3068 1.83 augustss
3069 1.83 augustss return (USBD_IN_PROGRESS);
3070 1.60 augustss }
3071 1.60 augustss
3072 1.60 augustss void
3073 1.90.2.1 minoura ohci_device_isoc_abort(usbd_xfer_handle xfer)
3074 1.60 augustss {
3075 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3076 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3077 1.83 augustss ohci_soft_ed_t *sed;
3078 1.83 augustss ohci_soft_itd_t *sitd;
3079 1.83 augustss int s;
3080 1.83 augustss
3081 1.83 augustss s = splusb();
3082 1.83 augustss
3083 1.83 augustss DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer));
3084 1.83 augustss
3085 1.83 augustss /* Transfer is already done. */
3086 1.83 augustss if (xfer->status != USBD_NOT_STARTED &&
3087 1.83 augustss xfer->status != USBD_IN_PROGRESS) {
3088 1.83 augustss splx(s);
3089 1.83 augustss printf("ohci_device_isoc_abort: early return\n");
3090 1.83 augustss return;
3091 1.83 augustss }
3092 1.83 augustss
3093 1.83 augustss /* Give xfer the requested abort code. */
3094 1.83 augustss xfer->status = USBD_CANCELLED;
3095 1.83 augustss
3096 1.83 augustss sed = opipe->sed;
3097 1.83 augustss sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */
3098 1.83 augustss
3099 1.83 augustss sitd = xfer->hcpriv;
3100 1.83 augustss #ifdef DIAGNOSTIC
3101 1.83 augustss if (sitd == NULL) {
3102 1.83 augustss printf("ohci_device_isoc_abort: hcpriv==0\n");
3103 1.83 augustss return;
3104 1.83 augustss }
3105 1.83 augustss #endif
3106 1.83 augustss for (; sitd->xfer == xfer; sitd = sitd->nextitd) {
3107 1.83 augustss #ifdef DIAGNOSTIC
3108 1.83 augustss DPRINTFN(1,("abort sets done sitd=%p\n", sitd));
3109 1.83 augustss sitd->isdone = 1;
3110 1.83 augustss #endif
3111 1.83 augustss }
3112 1.83 augustss
3113 1.83 augustss splx(s);
3114 1.83 augustss
3115 1.83 augustss usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET);
3116 1.83 augustss
3117 1.83 augustss s = splusb();
3118 1.83 augustss
3119 1.83 augustss /* Run callback. */
3120 1.83 augustss usb_transfer_complete(xfer);
3121 1.83 augustss
3122 1.83 augustss sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */
3123 1.83 augustss sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */
3124 1.83 augustss
3125 1.83 augustss splx(s);
3126 1.60 augustss }
3127 1.60 augustss
3128 1.60 augustss void
3129 1.90.2.1 minoura ohci_device_isoc_done(usbd_xfer_handle xfer)
3130 1.60 augustss {
3131 1.83 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe;
3132 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus;
3133 1.83 augustss ohci_soft_itd_t *sitd, *nsitd;
3134 1.83 augustss
3135 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer));
3136 1.83 augustss
3137 1.83 augustss for (sitd = xfer->hcpriv;
3138 1.83 augustss !(sitd->flags & OHCI_CALL_DONE);
3139 1.83 augustss sitd = nsitd) {
3140 1.83 augustss nsitd = sitd->nextitd;
3141 1.83 augustss DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd));
3142 1.83 augustss ohci_free_sitd(sc, sitd);
3143 1.83 augustss }
3144 1.83 augustss ohci_free_sitd(sc, sitd);
3145 1.83 augustss xfer->hcpriv = NULL;
3146 1.60 augustss }
3147 1.60 augustss
3148 1.60 augustss usbd_status
3149 1.90.2.1 minoura ohci_setup_isoc(usbd_pipe_handle pipe)
3150 1.60 augustss {
3151 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3152 1.83 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3153 1.60 augustss struct iso *iso = &opipe->u.iso;
3154 1.83 augustss int s;
3155 1.60 augustss
3156 1.60 augustss iso->next = -1;
3157 1.60 augustss iso->inuse = 0;
3158 1.60 augustss
3159 1.83 augustss s = splusb();
3160 1.83 augustss ohci_add_ed(opipe->sed, sc->sc_isoc_head);
3161 1.83 augustss splx(s);
3162 1.83 augustss
3163 1.60 augustss return (USBD_NORMAL_COMPLETION);
3164 1.60 augustss }
3165 1.60 augustss
3166 1.60 augustss void
3167 1.90.2.1 minoura ohci_device_isoc_close(usbd_pipe_handle pipe)
3168 1.60 augustss {
3169 1.60 augustss struct ohci_pipe *opipe = (struct ohci_pipe *)pipe;
3170 1.60 augustss ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus;
3171 1.83 augustss int s;
3172 1.60 augustss
3173 1.60 augustss DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe));
3174 1.83 augustss
3175 1.83 augustss s = splusb();
3176 1.83 augustss ohci_rem_ed(opipe->sed, sc->sc_isoc_head);
3177 1.83 augustss splx(s);
3178 1.60 augustss ohci_close_pipe(pipe, sc->sc_isoc_head);
3179 1.83 augustss #ifdef DIAGNOSTIC
3180 1.83 augustss opipe->tail.itd->isdone = 1;
3181 1.83 augustss #endif
3182 1.60 augustss ohci_free_sitd(sc, opipe->tail.itd);
3183 1.1 augustss }
3184