ohci.c revision 1.100
1 /* $NetBSD: ohci.c,v 1.100 2001/01/28 16:18:09 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 /* 104 * The OHCI controller is little endian, so on big endian machines 105 * the data strored in memory needs to be swapped. 106 */ 107 #if defined(__FreeBSD__) || defined(__OpenBSD__) 108 #if BYTE_ORDER == BIG_ENDIAN 109 #define htole32(x) (bswap32(x)) 110 #define le32toh(x) (bswap32(x)) 111 #else 112 #define htole32(x) (x) 113 #define le32toh(x) (x) 114 #endif 115 #endif 116 117 struct ohci_pipe; 118 119 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 120 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 121 122 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 123 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 124 125 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 126 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 127 128 #if 0 129 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 130 ohci_soft_td_t *); 131 #endif 132 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 133 ohci_softc_t *, int, int, usbd_xfer_handle, 134 ohci_soft_td_t *, ohci_soft_td_t **); 135 136 Static void ohci_shutdown(void *v); 137 Static void ohci_power(int, void *); 138 Static usbd_status ohci_open(usbd_pipe_handle); 139 Static void ohci_poll(struct usbd_bus *); 140 Static void ohci_softintr(void *); 141 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 142 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 143 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 144 145 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 146 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 147 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 149 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 151 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 152 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 154 155 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 156 Static void ohci_device_isoc_enter(usbd_xfer_handle); 157 158 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 159 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 160 161 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 162 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 163 164 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 166 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 167 Static void ohci_root_ctrl_close(usbd_pipe_handle); 168 Static void ohci_root_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 171 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 172 Static void ohci_root_intr_abort(usbd_xfer_handle); 173 Static void ohci_root_intr_close(usbd_pipe_handle); 174 Static void ohci_root_intr_done(usbd_xfer_handle); 175 176 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 177 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 178 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 179 Static void ohci_device_ctrl_close(usbd_pipe_handle); 180 Static void ohci_device_ctrl_done(usbd_xfer_handle); 181 182 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 183 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 184 Static void ohci_device_bulk_abort(usbd_xfer_handle); 185 Static void ohci_device_bulk_close(usbd_pipe_handle); 186 Static void ohci_device_bulk_done(usbd_xfer_handle); 187 188 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 189 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 190 Static void ohci_device_intr_abort(usbd_xfer_handle); 191 Static void ohci_device_intr_close(usbd_pipe_handle); 192 Static void ohci_device_intr_done(usbd_xfer_handle); 193 194 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 195 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 196 Static void ohci_device_isoc_abort(usbd_xfer_handle); 197 Static void ohci_device_isoc_close(usbd_pipe_handle); 198 Static void ohci_device_isoc_done(usbd_xfer_handle); 199 200 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 201 struct ohci_pipe *pipe, int ival); 202 203 Static int ohci_str(usb_string_descriptor_t *, int, char *); 204 205 Static void ohci_timeout(void *); 206 Static void ohci_rhsc_able(ohci_softc_t *, int); 207 208 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 209 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 210 Static void ohci_abort_xfer_end(void *); 211 212 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 213 Static void ohci_noop(usbd_pipe_handle pipe); 214 215 #ifdef OHCI_DEBUG 216 Static void ohci_dumpregs(ohci_softc_t *); 217 Static void ohci_dump_tds(ohci_soft_td_t *); 218 Static void ohci_dump_td(ohci_soft_td_t *); 219 Static void ohci_dump_ed(ohci_soft_ed_t *); 220 Static void ohci_dump_itd(ohci_soft_itd_t *); 221 Static void ohci_dump_itds(ohci_soft_itd_t *); 222 #endif 223 224 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 225 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 226 #define OWRITE1(sc, r, x) \ 227 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 228 #define OWRITE2(sc, r, x) \ 229 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 230 #define OWRITE4(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 233 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 234 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 235 236 /* Reverse the bits in a value 0 .. 31 */ 237 Static u_int8_t revbits[OHCI_NO_INTRS] = 238 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 239 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 240 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 241 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 242 243 struct ohci_pipe { 244 struct usbd_pipe pipe; 245 ohci_soft_ed_t *sed; 246 union { 247 ohci_soft_td_t *td; 248 ohci_soft_itd_t *itd; 249 } tail; 250 /* Info needed for different pipe kinds. */ 251 union { 252 /* Control pipe */ 253 struct { 254 usb_dma_t reqdma; 255 u_int length; 256 ohci_soft_td_t *setup, *data, *stat; 257 } ctl; 258 /* Interrupt pipe */ 259 struct { 260 int nslots; 261 int pos; 262 } intr; 263 /* Bulk pipe */ 264 struct { 265 u_int length; 266 int isread; 267 } bulk; 268 /* Iso pipe */ 269 struct iso { 270 int next, inuse; 271 } iso; 272 } u; 273 }; 274 275 #define OHCI_INTR_ENDPT 1 276 277 Static struct usbd_bus_methods ohci_bus_methods = { 278 ohci_open, 279 ohci_softintr, 280 ohci_poll, 281 ohci_allocm, 282 ohci_freem, 283 ohci_allocx, 284 ohci_freex, 285 }; 286 287 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 288 ohci_root_ctrl_transfer, 289 ohci_root_ctrl_start, 290 ohci_root_ctrl_abort, 291 ohci_root_ctrl_close, 292 ohci_noop, 293 ohci_root_ctrl_done, 294 }; 295 296 Static struct usbd_pipe_methods ohci_root_intr_methods = { 297 ohci_root_intr_transfer, 298 ohci_root_intr_start, 299 ohci_root_intr_abort, 300 ohci_root_intr_close, 301 ohci_noop, 302 ohci_root_intr_done, 303 }; 304 305 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 306 ohci_device_ctrl_transfer, 307 ohci_device_ctrl_start, 308 ohci_device_ctrl_abort, 309 ohci_device_ctrl_close, 310 ohci_noop, 311 ohci_device_ctrl_done, 312 }; 313 314 Static struct usbd_pipe_methods ohci_device_intr_methods = { 315 ohci_device_intr_transfer, 316 ohci_device_intr_start, 317 ohci_device_intr_abort, 318 ohci_device_intr_close, 319 ohci_device_clear_toggle, 320 ohci_device_intr_done, 321 }; 322 323 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 324 ohci_device_bulk_transfer, 325 ohci_device_bulk_start, 326 ohci_device_bulk_abort, 327 ohci_device_bulk_close, 328 ohci_device_clear_toggle, 329 ohci_device_bulk_done, 330 }; 331 332 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 333 ohci_device_isoc_transfer, 334 ohci_device_isoc_start, 335 ohci_device_isoc_abort, 336 ohci_device_isoc_close, 337 ohci_noop, 338 ohci_device_isoc_done, 339 }; 340 341 #if defined(__NetBSD__) || defined(__OpenBSD__) 342 int 343 ohci_activate(device_ptr_t self, enum devact act) 344 { 345 struct ohci_softc *sc = (struct ohci_softc *)self; 346 int rv = 0; 347 348 switch (act) { 349 case DVACT_ACTIVATE: 350 return (EOPNOTSUPP); 351 break; 352 353 case DVACT_DEACTIVATE: 354 if (sc->sc_child != NULL) 355 rv = config_deactivate(sc->sc_child); 356 sc->sc_dying = 1; 357 break; 358 } 359 return (rv); 360 } 361 362 int 363 ohci_detach(struct ohci_softc *sc, int flags) 364 { 365 int rv = 0; 366 367 if (sc->sc_child != NULL) 368 rv = config_detach(sc->sc_child, flags); 369 370 if (rv != 0) 371 return (rv); 372 373 #if defined(__NetBSD__) || defined(__OpenBSD__) 374 powerhook_disestablish(sc->sc_powerhook); 375 shutdownhook_disestablish(sc->sc_shutdownhook); 376 #endif 377 378 /* free data structures XXX */ 379 380 return (rv); 381 } 382 #endif 383 384 ohci_soft_ed_t * 385 ohci_alloc_sed(ohci_softc_t *sc) 386 { 387 ohci_soft_ed_t *sed; 388 usbd_status err; 389 int i, offs; 390 usb_dma_t dma; 391 392 if (sc->sc_freeeds == NULL) { 393 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 394 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 395 OHCI_ED_ALIGN, &dma); 396 if (err) 397 return (0); 398 for(i = 0; i < OHCI_SED_CHUNK; i++) { 399 offs = i * OHCI_SED_SIZE; 400 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 401 sed->physaddr = DMAADDR(&dma) + offs; 402 sed->next = sc->sc_freeeds; 403 sc->sc_freeeds = sed; 404 } 405 } 406 sed = sc->sc_freeeds; 407 sc->sc_freeeds = sed->next; 408 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 409 sed->next = 0; 410 return (sed); 411 } 412 413 void 414 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 415 { 416 sed->next = sc->sc_freeeds; 417 sc->sc_freeeds = sed; 418 } 419 420 ohci_soft_td_t * 421 ohci_alloc_std(ohci_softc_t *sc) 422 { 423 ohci_soft_td_t *std; 424 usbd_status err; 425 int i, offs; 426 usb_dma_t dma; 427 int s; 428 429 if (sc->sc_freetds == NULL) { 430 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 431 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 432 OHCI_TD_ALIGN, &dma); 433 if (err) 434 return (NULL); 435 s = splusb(); 436 for(i = 0; i < OHCI_STD_CHUNK; i++) { 437 offs = i * OHCI_STD_SIZE; 438 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 439 std->physaddr = DMAADDR(&dma) + offs; 440 std->nexttd = sc->sc_freetds; 441 sc->sc_freetds = std; 442 } 443 splx(s); 444 } 445 446 s = splusb(); 447 std = sc->sc_freetds; 448 sc->sc_freetds = std->nexttd; 449 memset(&std->td, 0, sizeof(ohci_td_t)); 450 std->nexttd = NULL; 451 std->xfer = NULL; 452 ohci_hash_add_td(sc, std); 453 splx(s); 454 455 return (std); 456 } 457 458 void 459 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 460 { 461 int s; 462 463 s = splusb(); 464 ohci_hash_rem_td(sc, std); 465 std->nexttd = sc->sc_freetds; 466 sc->sc_freetds = std; 467 splx(s); 468 } 469 470 usbd_status 471 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 472 int alen, int rd, usbd_xfer_handle xfer, 473 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 474 { 475 ohci_soft_td_t *next, *cur; 476 ohci_physaddr_t dataphys, dataphysend; 477 u_int32_t tdflags; 478 int len, curlen; 479 usb_dma_t *dma = &xfer->dmabuf; 480 u_int16_t flags = xfer->flags; 481 482 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 483 484 len = alen; 485 cur = sp; 486 dataphys = DMAADDR(dma); 487 dataphysend = OHCI_PAGE(dataphys + len - 1); 488 tdflags = htole32( 489 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 490 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 491 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 492 493 for (;;) { 494 next = ohci_alloc_std(sc); 495 if (next == NULL) 496 goto nomem; 497 498 /* The OHCI hardware can handle at most one page crossing. */ 499 if (OHCI_PAGE(dataphys) == dataphysend || 500 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 501 /* we can handle it in this TD */ 502 curlen = len; 503 } else { 504 /* must use multiple TDs, fill as much as possible. */ 505 curlen = 2 * OHCI_PAGE_SIZE - 506 (dataphys & (OHCI_PAGE_SIZE-1)); 507 /* the length must be a multiple of the max size */ 508 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 509 #ifdef DIAGNOSTIC 510 if (curlen == 0) 511 panic("ohci_alloc_std: curlen == 0\n"); 512 #endif 513 } 514 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 515 "dataphysend=0x%08x len=%d curlen=%d\n", 516 dataphys, dataphysend, 517 len, curlen)); 518 len -= curlen; 519 520 cur->td.td_flags = tdflags; 521 cur->td.td_cbp = htole32(dataphys); 522 cur->nexttd = next; 523 cur->td.td_nexttd = htole32(next->physaddr); 524 cur->td.td_be = htole32(dataphys + curlen - 1); 525 cur->len = curlen; 526 cur->flags = OHCI_ADD_LEN; 527 cur->xfer = xfer; 528 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 529 dataphys, dataphys + curlen - 1)); 530 if (len == 0) 531 break; 532 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 533 dataphys += curlen; 534 cur = next; 535 } 536 if ((flags & USBD_FORCE_SHORT_XFER) && 537 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 538 /* Force a 0 length transfer at the end. */ 539 540 cur = next; 541 next = ohci_alloc_std(sc); 542 if (next == NULL) 543 goto nomem; 544 545 cur->td.td_flags = tdflags; 546 cur->td.td_cbp = 0; /* indicate 0 length packet */ 547 cur->nexttd = next; 548 cur->td.td_nexttd = htole32(next->physaddr); 549 cur->td.td_be = ~0; 550 cur->len = 0; 551 cur->flags = 0; 552 cur->xfer = xfer; 553 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 554 } 555 *ep = cur; 556 557 return (USBD_NORMAL_COMPLETION); 558 559 nomem: 560 /* XXX free chain */ 561 return (USBD_NOMEM); 562 } 563 564 #if 0 565 Static void 566 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 567 ohci_soft_td_t *stdend) 568 { 569 ohci_soft_td_t *p; 570 571 for (; std != stdend; std = p) { 572 p = std->nexttd; 573 ohci_free_std(sc, std); 574 } 575 } 576 #endif 577 578 ohci_soft_itd_t * 579 ohci_alloc_sitd(ohci_softc_t *sc) 580 { 581 ohci_soft_itd_t *sitd; 582 usbd_status err; 583 int i, s, offs; 584 usb_dma_t dma; 585 586 if (sc->sc_freeitds == NULL) { 587 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 588 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 589 OHCI_ITD_ALIGN, &dma); 590 if (err) 591 return (NULL); 592 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 593 offs = i * OHCI_SITD_SIZE; 594 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 595 sitd->physaddr = DMAADDR(&dma) + offs; 596 sitd->nextitd = sc->sc_freeitds; 597 sc->sc_freeitds = sitd; 598 } 599 } 600 601 s = splusb(); 602 sitd = sc->sc_freeitds; 603 sc->sc_freeitds = sitd->nextitd; 604 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 605 sitd->nextitd = NULL; 606 sitd->xfer = NULL; 607 ohci_hash_add_itd(sc, sitd); 608 splx(s); 609 610 #ifdef DIAGNOSTIC 611 sitd->isdone = 0; 612 #endif 613 614 return (sitd); 615 } 616 617 void 618 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 619 { 620 int s; 621 622 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 623 624 #ifdef DIAGNOSTIC 625 if (!sitd->isdone) { 626 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 627 return; 628 } 629 #endif 630 631 s = splusb(); 632 ohci_hash_rem_itd(sc, sitd); 633 sitd->nextitd = sc->sc_freeitds; 634 sc->sc_freeitds = sitd; 635 splx(s); 636 } 637 638 usbd_status 639 ohci_init(ohci_softc_t *sc) 640 { 641 ohci_soft_ed_t *sed, *psed; 642 usbd_status err; 643 int i; 644 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 645 646 DPRINTF(("ohci_init: start\n")); 647 #if defined(__OpenBSD__) 648 printf(","); 649 #else 650 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 651 #endif 652 rev = OREAD4(sc, OHCI_REVISION); 653 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 654 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 655 656 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 657 printf("%s: unsupported OHCI revision\n", 658 USBDEVNAME(sc->sc_bus.bdev)); 659 sc->sc_bus.usbrev = USBREV_UNKNOWN; 660 return (USBD_INVAL); 661 } 662 sc->sc_bus.usbrev = USBREV_1_0; 663 664 for (i = 0; i < OHCI_HASH_SIZE; i++) 665 LIST_INIT(&sc->sc_hash_tds[i]); 666 for (i = 0; i < OHCI_HASH_SIZE; i++) 667 LIST_INIT(&sc->sc_hash_itds[i]); 668 669 SIMPLEQ_INIT(&sc->sc_free_xfers); 670 671 /* XXX determine alignment by R/W */ 672 /* Allocate the HCCA area. */ 673 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 674 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 675 if (err) 676 return (err); 677 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 678 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 679 680 sc->sc_eintrs = OHCI_NORMAL_INTRS; 681 682 /* Allocate dummy ED that starts the control list. */ 683 sc->sc_ctrl_head = ohci_alloc_sed(sc); 684 if (sc->sc_ctrl_head == NULL) { 685 err = USBD_NOMEM; 686 goto bad1; 687 } 688 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 689 690 /* Allocate dummy ED that starts the bulk list. */ 691 sc->sc_bulk_head = ohci_alloc_sed(sc); 692 if (sc->sc_bulk_head == NULL) { 693 err = USBD_NOMEM; 694 goto bad2; 695 } 696 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 697 698 /* Allocate dummy ED that starts the isochronous list. */ 699 sc->sc_isoc_head = ohci_alloc_sed(sc); 700 if (sc->sc_isoc_head == NULL) { 701 err = USBD_NOMEM; 702 goto bad3; 703 } 704 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 705 706 /* Allocate all the dummy EDs that make up the interrupt tree. */ 707 for (i = 0; i < OHCI_NO_EDS; i++) { 708 sed = ohci_alloc_sed(sc); 709 if (sed == NULL) { 710 while (--i >= 0) 711 ohci_free_sed(sc, sc->sc_eds[i]); 712 err = USBD_NOMEM; 713 goto bad4; 714 } 715 /* All ED fields are set to 0. */ 716 sc->sc_eds[i] = sed; 717 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 718 if (i != 0) 719 psed = sc->sc_eds[(i-1) / 2]; 720 else 721 psed= sc->sc_isoc_head; 722 sed->next = psed; 723 sed->ed.ed_nexted = htole32(psed->physaddr); 724 } 725 /* 726 * Fill HCCA interrupt table. The bit reversal is to get 727 * the tree set up properly to spread the interrupts. 728 */ 729 for (i = 0; i < OHCI_NO_INTRS; i++) 730 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 731 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 732 733 #ifdef OHCI_DEBUG 734 if (ohcidebug > 15) { 735 for (i = 0; i < OHCI_NO_EDS; i++) { 736 printf("ed#%d ", i); 737 ohci_dump_ed(sc->sc_eds[i]); 738 } 739 printf("iso "); 740 ohci_dump_ed(sc->sc_isoc_head); 741 } 742 #endif 743 744 /* Determine in what context we are running. */ 745 ctl = OREAD4(sc, OHCI_CONTROL); 746 if (ctl & OHCI_IR) { 747 /* SMM active, request change */ 748 DPRINTF(("ohci_init: SMM active, request owner change\n")); 749 s = OREAD4(sc, OHCI_COMMAND_STATUS); 750 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 751 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 752 usb_delay_ms(&sc->sc_bus, 1); 753 ctl = OREAD4(sc, OHCI_CONTROL); 754 } 755 if ((ctl & OHCI_IR) == 0) { 756 printf("%s: SMM does not respond, resetting\n", 757 USBDEVNAME(sc->sc_bus.bdev)); 758 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 759 goto reset; 760 } 761 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 762 /* BIOS started controller. */ 763 DPRINTF(("ohci_init: BIOS active\n")); 764 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 765 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 766 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 767 } 768 } else { 769 DPRINTF(("ohci_init: cold started\n")); 770 reset: 771 /* Controller was cold started. */ 772 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 773 } 774 775 /* 776 * This reset should not be necessary according to the OHCI spec, but 777 * without it some controllers do not start. 778 */ 779 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 780 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 781 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 782 783 /* We now own the host controller and the bus has been reset. */ 784 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 785 786 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 787 /* Nominal time for a reset is 10 us. */ 788 for (i = 0; i < 10; i++) { 789 delay(10); 790 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 791 if (!hcr) 792 break; 793 } 794 if (hcr) { 795 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 796 err = USBD_IOERROR; 797 goto bad5; 798 } 799 #ifdef OHCI_DEBUG 800 if (ohcidebug > 15) 801 ohci_dumpregs(sc); 802 #endif 803 804 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 805 806 /* Set up HC registers. */ 807 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 808 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 809 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 810 /* disable all interrupts and then switch on all desired interrupts */ 811 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 812 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 813 /* switch on desired functional features */ 814 ctl = OREAD4(sc, OHCI_CONTROL); 815 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 816 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 817 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 818 /* And finally start it! */ 819 OWRITE4(sc, OHCI_CONTROL, ctl); 820 821 /* 822 * The controller is now OPERATIONAL. Set a some final 823 * registers that should be set earlier, but that the 824 * controller ignores when in the SUSPEND state. 825 */ 826 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 827 fm |= OHCI_FSMPS(ival) | ival; 828 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 829 per = OHCI_PERIODIC(ival); /* 90% periodic */ 830 OWRITE4(sc, OHCI_PERIODIC_START, per); 831 832 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 833 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 834 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 835 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 836 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 837 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 838 839 /* 840 * The AMD756 requires a delay before re-reading the register, 841 * otherwise it will occasionally report 0 ports. 842 */ 843 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 844 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 845 846 #ifdef OHCI_DEBUG 847 if (ohcidebug > 5) 848 ohci_dumpregs(sc); 849 #endif 850 851 /* Set up the bus struct. */ 852 sc->sc_bus.methods = &ohci_bus_methods; 853 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 854 855 #if defined(__NetBSD__) || defined(__OpenBSD__) 856 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 857 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 858 #endif 859 860 return (USBD_NORMAL_COMPLETION); 861 862 bad5: 863 for (i = 0; i < OHCI_NO_EDS; i++) 864 ohci_free_sed(sc, sc->sc_eds[i]); 865 bad4: 866 ohci_free_sed(sc, sc->sc_isoc_head); 867 bad3: 868 ohci_free_sed(sc, sc->sc_ctrl_head); 869 bad2: 870 ohci_free_sed(sc, sc->sc_bulk_head); 871 bad1: 872 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 873 return (err); 874 } 875 876 usbd_status 877 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 878 { 879 #if defined(__NetBSD__) || defined(__OpenBSD__) 880 struct ohci_softc *sc = (struct ohci_softc *)bus; 881 #endif 882 883 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 884 } 885 886 void 887 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 888 { 889 #if defined(__NetBSD__) || defined(__OpenBSD__) 890 struct ohci_softc *sc = (struct ohci_softc *)bus; 891 #endif 892 893 usb_freemem(&sc->sc_bus, dma); 894 } 895 896 usbd_xfer_handle 897 ohci_allocx(struct usbd_bus *bus) 898 { 899 struct ohci_softc *sc = (struct ohci_softc *)bus; 900 usbd_xfer_handle xfer; 901 902 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 903 if (xfer != NULL) 904 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 905 else 906 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 907 if (xfer != NULL) 908 memset(xfer, 0, sizeof *xfer); 909 return (xfer); 910 } 911 912 void 913 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 914 { 915 struct ohci_softc *sc = (struct ohci_softc *)bus; 916 917 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 918 } 919 920 /* 921 * Shut down the controller when the system is going down. 922 */ 923 void 924 ohci_shutdown(void *v) 925 { 926 ohci_softc_t *sc = v; 927 928 DPRINTF(("ohci_shutdown: stopping the HC\n")); 929 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 930 } 931 932 /* 933 * Handle suspend/resume. 934 * 935 * We need to switch to polling mode here, because this routine is 936 * called from an intterupt context. This is all right since we 937 * are almost suspended anyway. 938 */ 939 void 940 ohci_power(int why, void *v) 941 { 942 ohci_softc_t *sc = v; 943 u_int32_t ctl; 944 int s; 945 946 #ifdef OHCI_DEBUG 947 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 948 ohci_dumpregs(sc); 949 #endif 950 951 s = splhardusb(); 952 switch (why) { 953 case PWR_SUSPEND: 954 case PWR_STANDBY: 955 sc->sc_bus.use_polling++; 956 ctl = OREAD4(sc, OHCI_CONTROL); 957 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_SUSPEND; 958 OWRITE4(sc, OHCI_CONTROL, ctl); 959 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 960 sc->sc_bus.use_polling--; 961 break; 962 case PWR_RESUME: 963 sc->sc_bus.use_polling++; 964 ctl = OREAD4(sc, OHCI_CONTROL); 965 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_RESUME; 966 OWRITE4(sc, OHCI_CONTROL, ctl); 967 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 968 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 969 OWRITE4(sc, OHCI_CONTROL, ctl); 970 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 971 sc->sc_bus.use_polling--; 972 break; 973 case PWR_SOFTSUSPEND: 974 case PWR_SOFTSTANDBY: 975 case PWR_SOFTRESUME: 976 break; 977 } 978 splx(s); 979 } 980 981 #ifdef OHCI_DEBUG 982 void 983 ohci_dumpregs(ohci_softc_t *sc) 984 { 985 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 986 OREAD4(sc, OHCI_REVISION), 987 OREAD4(sc, OHCI_CONTROL), 988 OREAD4(sc, OHCI_COMMAND_STATUS))); 989 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 990 OREAD4(sc, OHCI_INTERRUPT_STATUS), 991 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 992 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 993 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 994 OREAD4(sc, OHCI_HCCA), 995 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 996 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 997 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 998 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 999 OREAD4(sc, OHCI_BULK_HEAD_ED), 1000 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1001 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1002 OREAD4(sc, OHCI_DONE_HEAD), 1003 OREAD4(sc, OHCI_FM_INTERVAL), 1004 OREAD4(sc, OHCI_FM_REMAINING))); 1005 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1006 OREAD4(sc, OHCI_FM_NUMBER), 1007 OREAD4(sc, OHCI_PERIODIC_START), 1008 OREAD4(sc, OHCI_LS_THRESHOLD))); 1009 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1010 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1011 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1012 OREAD4(sc, OHCI_RH_STATUS))); 1013 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1014 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1015 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1016 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1017 le32toh(sc->sc_hcca->hcca_frame_number), 1018 le32toh(sc->sc_hcca->hcca_done_head))); 1019 } 1020 #endif 1021 1022 Static int ohci_intr1(ohci_softc_t *); 1023 1024 int 1025 ohci_intr(void *p) 1026 { 1027 ohci_softc_t *sc = p; 1028 1029 /* If we get an interrupt while polling, then just ignore it. */ 1030 if (sc->sc_bus.use_polling) { 1031 #ifdef DIAGNOSTIC 1032 printf("ohci_intr: ignored interrupt while polling\n"); 1033 #endif 1034 return (0); 1035 } 1036 1037 return (ohci_intr1(sc)); 1038 } 1039 1040 Static int 1041 ohci_intr1(ohci_softc_t *sc) 1042 { 1043 u_int32_t intrs, eintrs; 1044 ohci_physaddr_t done; 1045 1046 /* In case the interrupt occurs before initialization has completed. */ 1047 if (sc == NULL || sc->sc_hcca == NULL) { 1048 #ifdef DIAGNOSTIC 1049 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1050 #endif 1051 return (0); 1052 } 1053 1054 intrs = 0; 1055 done = le32toh(sc->sc_hcca->hcca_done_head); 1056 if (done != 0) { 1057 if (done & ~OHCI_DONE_INTRS) 1058 intrs = OHCI_WDH; 1059 if (done & OHCI_DONE_INTRS) 1060 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1061 } else 1062 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1063 1064 if (!intrs) 1065 return (0); 1066 1067 intrs &= ~OHCI_MIE; 1068 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1069 eintrs = intrs & sc->sc_eintrs; 1070 if (!eintrs) 1071 return (0); 1072 1073 sc->sc_bus.intr_context++; 1074 sc->sc_bus.no_intrs++; 1075 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1076 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1077 (u_int)eintrs)); 1078 1079 if (eintrs & OHCI_SO) { 1080 sc->sc_overrun_cnt++; 1081 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1082 printf("%s: %u scheduling overruns\n", 1083 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1084 sc->sc_overrun_cnt = 0; 1085 } 1086 /* XXX do what */ 1087 intrs &= ~OHCI_SO; 1088 } 1089 if (eintrs & OHCI_WDH) { 1090 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1091 sc->sc_hcca->hcca_done_head = 0; 1092 usb_schedsoftintr(&sc->sc_bus); 1093 intrs &= ~OHCI_WDH; 1094 } 1095 if (eintrs & OHCI_RD) { 1096 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1097 /* XXX process resume detect */ 1098 } 1099 if (eintrs & OHCI_UE) { 1100 printf("%s: unrecoverable error, controller halted\n", 1101 USBDEVNAME(sc->sc_bus.bdev)); 1102 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1103 /* XXX what else */ 1104 } 1105 if (eintrs & OHCI_RHSC) { 1106 ohci_rhsc(sc, sc->sc_intrxfer); 1107 intrs &= ~OHCI_RHSC; 1108 1109 /* 1110 * Disable RHSC interrupt for now, because it will be 1111 * on until the port has been reset. 1112 */ 1113 ohci_rhsc_able(sc, 0); 1114 } 1115 1116 sc->sc_bus.intr_context--; 1117 1118 /* Block unprocessed interrupts. XXX */ 1119 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1120 sc->sc_eintrs &= ~intrs; 1121 1122 return (1); 1123 } 1124 1125 void 1126 ohci_rhsc_able(ohci_softc_t *sc, int on) 1127 { 1128 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1129 if (on) { 1130 sc->sc_eintrs |= OHCI_RHSC; 1131 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1132 } else { 1133 sc->sc_eintrs &= ~OHCI_RHSC; 1134 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1135 } 1136 } 1137 1138 #ifdef OHCI_DEBUG 1139 char *ohci_cc_strs[] = { 1140 "NO_ERROR", 1141 "CRC", 1142 "BIT_STUFFING", 1143 "DATA_TOGGLE_MISMATCH", 1144 "STALL", 1145 "DEVICE_NOT_RESPONDING", 1146 "PID_CHECK_FAILURE", 1147 "UNEXPECTED_PID", 1148 "DATA_OVERRUN", 1149 "DATA_UNDERRUN", 1150 "BUFFER_OVERRUN", 1151 "BUFFER_UNDERRUN", 1152 "reserved", 1153 "reserved", 1154 "NOT_ACCESSED", 1155 "NOT_ACCESSED", 1156 }; 1157 #endif 1158 1159 void 1160 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1161 { 1162 ohci_soft_itd_t *sitd, *sidone, **ip; 1163 ohci_soft_td_t *std, *sdone, **p; 1164 1165 /* Reverse the done list. */ 1166 for (sdone = NULL, sidone = NULL; done != 0; ) { 1167 std = ohci_hash_find_td(sc, done); 1168 if (std != NULL) { 1169 std->dnext = sdone; 1170 done = le32toh(std->td.td_nexttd); 1171 sdone = std; 1172 DPRINTFN(10,("add TD %p\n", std)); 1173 continue; 1174 } 1175 sitd = ohci_hash_find_itd(sc, done); 1176 if (sitd != NULL) { 1177 sitd->dnext = sidone; 1178 done = le32toh(sitd->itd.itd_nextitd); 1179 sidone = sitd; 1180 DPRINTFN(5,("add ITD %p\n", sitd)); 1181 continue; 1182 } 1183 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1184 } 1185 1186 /* sdone & sidone now hold the done lists. */ 1187 /* Put them on the already processed lists. */ 1188 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1189 ; 1190 *p = sdone; 1191 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1192 ; 1193 *ip = sidone; 1194 } 1195 1196 void 1197 ohci_softintr(void *v) 1198 { 1199 ohci_softc_t *sc = v; 1200 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1201 ohci_soft_td_t *std, *sdone, *stdnext; 1202 usbd_xfer_handle xfer; 1203 int len, cc, s; 1204 1205 sc->sc_bus.intr_context++; 1206 1207 s = splhardusb(); 1208 sdone = sc->sc_sdone; 1209 sc->sc_sdone = NULL; 1210 sidone = sc->sc_sidone; 1211 sc->sc_sidone = NULL; 1212 splx(s); 1213 1214 DPRINTFN(10,("ohci_process_done: sdone=%p sidone=%p\n", sdone, sidone)); 1215 1216 #ifdef OHCI_DEBUG 1217 if (ohcidebug > 10) { 1218 DPRINTF(("ohci_process_done: TD done:\n")); 1219 ohci_dump_tds(sdone); 1220 } 1221 #endif 1222 1223 for (std = sdone; std; std = stdnext) { 1224 xfer = std->xfer; 1225 stdnext = std->dnext; 1226 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1227 std, xfer, xfer ? xfer->hcpriv : 0)); 1228 if (xfer == NULL) { 1229 /* xfer == NULL: There seems to be no xfer associated 1230 * with this TD. It is tailp that happened to end up on 1231 * the done queue. 1232 */ 1233 continue; 1234 } 1235 if (xfer->status == USBD_CANCELLED || 1236 xfer->status == USBD_TIMEOUT) { 1237 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1238 xfer)); 1239 /* Handled by abort routine. */ 1240 continue; 1241 } 1242 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1243 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1244 if (cc == OHCI_CC_NO_ERROR) { 1245 len = std->len; 1246 if (std->td.td_cbp != 0) 1247 len -= le32toh(std->td.td_be) - 1248 le32toh(std->td.td_cbp) + 1; 1249 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1250 len, std->flags)); 1251 if (std->flags & OHCI_ADD_LEN) 1252 xfer->actlen += len; 1253 if (std->flags & OHCI_CALL_DONE) { 1254 xfer->status = USBD_NORMAL_COMPLETION; 1255 usb_transfer_complete(xfer); 1256 } 1257 ohci_free_std(sc, std); 1258 } else { 1259 /* 1260 * Endpoint is halted. First unlink all the TDs 1261 * belonging to the failed transfer, and then restart 1262 * the endpoint. 1263 */ 1264 ohci_soft_td_t *p, *n; 1265 struct ohci_pipe *opipe = 1266 (struct ohci_pipe *)xfer->pipe; 1267 1268 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1269 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1270 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1271 1272 /* remove TDs */ 1273 for (p = std; p->xfer == xfer; p = n) { 1274 n = p->nexttd; 1275 ohci_free_std(sc, p); 1276 } 1277 1278 /* clear halt */ 1279 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1280 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1281 1282 if (cc == OHCI_CC_STALL) 1283 xfer->status = USBD_STALLED; 1284 else 1285 xfer->status = USBD_IOERROR; 1286 usb_transfer_complete(xfer); 1287 } 1288 } 1289 1290 #ifdef OHCI_DEBUG 1291 if (ohcidebug > 10) { 1292 DPRINTF(("ohci_process_done: ITD done:\n")); 1293 ohci_dump_itds(sidone); 1294 } 1295 #endif 1296 1297 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1298 xfer = sitd->xfer; 1299 sitdnext = sitd->dnext; 1300 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1301 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1302 if (xfer == NULL) 1303 continue; 1304 if (xfer->status == USBD_CANCELLED || 1305 xfer->status == USBD_TIMEOUT) { 1306 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1307 xfer)); 1308 /* Handled by abort routine. */ 1309 continue; 1310 } 1311 #ifdef DIAGNOSTIC 1312 if (sitd->isdone) 1313 printf("ohci_softintr: sitd=%p is done\n", sitd); 1314 sitd->isdone = 1; 1315 #endif 1316 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1317 if (cc == OHCI_CC_NO_ERROR) { 1318 /* XXX compute length for input */ 1319 struct ohci_pipe *opipe = 1320 (struct ohci_pipe *)xfer->pipe; 1321 if (sitd->flags & OHCI_CALL_DONE) { 1322 opipe->u.iso.inuse -= xfer->nframes; 1323 /* XXX update frlengths with actual length */ 1324 /* XXX xfer->actlen = actlen; */ 1325 xfer->status = USBD_NORMAL_COMPLETION; 1326 usb_transfer_complete(xfer); 1327 } 1328 } else { 1329 /* XXX Do more */ 1330 xfer->status = USBD_IOERROR; 1331 usb_transfer_complete(xfer); 1332 } 1333 } 1334 1335 sc->sc_bus.intr_context--; 1336 } 1337 1338 void 1339 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1340 { 1341 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1342 1343 #ifdef DIAGNOSTIC 1344 if (!(xfer->rqflags & URQ_REQUEST)) { 1345 panic("ohci_ctrl_done: not a request\n"); 1346 } 1347 #endif 1348 xfer->hcpriv = NULL; 1349 } 1350 1351 void 1352 ohci_device_intr_done(usbd_xfer_handle xfer) 1353 { 1354 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1355 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1356 ohci_soft_ed_t *sed = opipe->sed; 1357 ohci_soft_td_t *data, *tail; 1358 1359 1360 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1361 xfer, xfer->actlen)); 1362 1363 xfer->hcpriv = NULL; 1364 1365 if (xfer->pipe->repeat) { 1366 data = opipe->tail.td; 1367 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1368 if (tail == NULL) { 1369 xfer->status = USBD_NOMEM; 1370 return; 1371 } 1372 tail->xfer = NULL; 1373 1374 data->td.td_flags = htole32( 1375 OHCI_TD_IN | OHCI_TD_NOCC | 1376 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1377 if (xfer->flags & USBD_SHORT_XFER_OK) 1378 data->td.td_flags |= htole32(OHCI_TD_R); 1379 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1380 data->nexttd = tail; 1381 data->td.td_nexttd = htole32(tail->physaddr); 1382 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1383 xfer->length - 1); 1384 data->len = xfer->length; 1385 data->xfer = xfer; 1386 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1387 xfer->hcpriv = data; 1388 xfer->actlen = 0; 1389 1390 sed->ed.ed_tailp = htole32(tail->physaddr); 1391 opipe->tail.td = tail; 1392 } 1393 } 1394 1395 void 1396 ohci_device_bulk_done(usbd_xfer_handle xfer) 1397 { 1398 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1399 xfer, xfer->actlen)); 1400 1401 xfer->hcpriv = NULL; 1402 } 1403 1404 void 1405 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1406 { 1407 usbd_pipe_handle pipe; 1408 struct ohci_pipe *opipe; 1409 u_char *p; 1410 int i, m; 1411 int hstatus; 1412 1413 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1414 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1415 sc, xfer, hstatus)); 1416 1417 if (xfer == NULL) { 1418 /* Just ignore the change. */ 1419 return; 1420 } 1421 1422 pipe = xfer->pipe; 1423 opipe = (struct ohci_pipe *)pipe; 1424 1425 p = KERNADDR(&xfer->dmabuf); 1426 m = min(sc->sc_noport, xfer->length * 8 - 1); 1427 memset(p, 0, xfer->length); 1428 for (i = 1; i <= m; i++) { 1429 /* Pick out CHANGE bits from the status reg. */ 1430 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1431 p[i/8] |= 1 << (i%8); 1432 } 1433 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1434 xfer->actlen = xfer->length; 1435 xfer->status = USBD_NORMAL_COMPLETION; 1436 1437 usb_transfer_complete(xfer); 1438 } 1439 1440 void 1441 ohci_root_intr_done(usbd_xfer_handle xfer) 1442 { 1443 xfer->hcpriv = NULL; 1444 } 1445 1446 void 1447 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1448 { 1449 xfer->hcpriv = NULL; 1450 } 1451 1452 /* 1453 * Wait here until controller claims to have an interrupt. 1454 * Then call ohci_intr and return. Use timeout to avoid waiting 1455 * too long. 1456 */ 1457 void 1458 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1459 { 1460 int timo = xfer->timeout; 1461 int usecs; 1462 u_int32_t intrs; 1463 1464 xfer->status = USBD_IN_PROGRESS; 1465 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1466 usb_delay_ms(&sc->sc_bus, 1); 1467 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1468 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1469 #ifdef OHCI_DEBUG 1470 if (ohcidebug > 15) 1471 ohci_dumpregs(sc); 1472 #endif 1473 if (intrs) { 1474 ohci_intr1(sc); 1475 if (xfer->status != USBD_IN_PROGRESS) 1476 return; 1477 } 1478 } 1479 1480 /* Timeout */ 1481 DPRINTF(("ohci_waitintr: timeout\n")); 1482 xfer->status = USBD_TIMEOUT; 1483 usb_transfer_complete(xfer); 1484 /* XXX should free TD */ 1485 } 1486 1487 void 1488 ohci_poll(struct usbd_bus *bus) 1489 { 1490 ohci_softc_t *sc = (ohci_softc_t *)bus; 1491 1492 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1493 ohci_intr1(sc); 1494 } 1495 1496 usbd_status 1497 ohci_device_request(usbd_xfer_handle xfer) 1498 { 1499 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1500 usb_device_request_t *req = &xfer->request; 1501 usbd_device_handle dev = opipe->pipe.device; 1502 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1503 int addr = dev->address; 1504 ohci_soft_td_t *setup, *stat, *next, *tail; 1505 ohci_soft_ed_t *sed; 1506 int isread; 1507 int len; 1508 usbd_status err; 1509 int s; 1510 1511 isread = req->bmRequestType & UT_READ; 1512 len = UGETW(req->wLength); 1513 1514 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1515 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1516 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1517 UGETW(req->wIndex), len, addr, 1518 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1519 1520 setup = opipe->tail.td; 1521 stat = ohci_alloc_std(sc); 1522 if (stat == NULL) { 1523 err = USBD_NOMEM; 1524 goto bad1; 1525 } 1526 tail = ohci_alloc_std(sc); 1527 if (tail == NULL) { 1528 err = USBD_NOMEM; 1529 goto bad2; 1530 } 1531 tail->xfer = NULL; 1532 1533 sed = opipe->sed; 1534 opipe->u.ctl.length = len; 1535 1536 /* Update device address and length since they may have changed. */ 1537 /* XXX This only needs to be done once, but it's too early in open. */ 1538 /* XXXX Should not touch ED here! */ 1539 sed->ed.ed_flags = htole32( 1540 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1541 OHCI_ED_SET_FA(addr) | 1542 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1543 1544 next = stat; 1545 1546 /* Set up data transaction */ 1547 if (len != 0) { 1548 ohci_soft_td_t *std = stat; 1549 1550 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1551 std, &stat); 1552 stat = stat->nexttd; /* point at free TD */ 1553 if (err) 1554 goto bad3; 1555 /* Start toggle at 1 and then use the carried toggle. */ 1556 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1557 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1558 } 1559 1560 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1561 1562 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1563 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1564 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1565 setup->nexttd = next; 1566 setup->td.td_nexttd = htole32(next->physaddr); 1567 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1568 setup->len = 0; 1569 setup->xfer = xfer; 1570 setup->flags = 0; 1571 xfer->hcpriv = setup; 1572 1573 stat->td.td_flags = htole32( 1574 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1575 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1576 stat->td.td_cbp = 0; 1577 stat->nexttd = tail; 1578 stat->td.td_nexttd = htole32(tail->physaddr); 1579 stat->td.td_be = 0; 1580 stat->flags = OHCI_CALL_DONE; 1581 stat->len = 0; 1582 stat->xfer = xfer; 1583 1584 #ifdef OHCI_DEBUG 1585 if (ohcidebug > 5) { 1586 DPRINTF(("ohci_device_request:\n")); 1587 ohci_dump_ed(sed); 1588 ohci_dump_tds(setup); 1589 } 1590 #endif 1591 1592 /* Insert ED in schedule */ 1593 s = splusb(); 1594 sed->ed.ed_tailp = htole32(tail->physaddr); 1595 opipe->tail.td = tail; 1596 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1597 if (xfer->timeout && !sc->sc_bus.use_polling) { 1598 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1599 ohci_timeout, xfer); 1600 } 1601 splx(s); 1602 1603 #if 0 1604 if (ohcidebug > 10) { 1605 delay(10000); 1606 DPRINTF(("ohci_device_request: status=%x\n", 1607 OREAD4(sc, OHCI_COMMAND_STATUS))); 1608 ohci_dump_ed(sed); 1609 ohci_dump_tds(setup); 1610 } 1611 #endif 1612 1613 return (USBD_NORMAL_COMPLETION); 1614 1615 bad3: 1616 ohci_free_std(sc, tail); 1617 bad2: 1618 ohci_free_std(sc, stat); 1619 bad1: 1620 return (err); 1621 } 1622 1623 /* 1624 * Add an ED to the schedule. Called at splusb(). 1625 */ 1626 void 1627 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1628 { 1629 SPLUSBCHECK; 1630 sed->next = head->next; 1631 sed->ed.ed_nexted = head->ed.ed_nexted; 1632 head->next = sed; 1633 head->ed.ed_nexted = htole32(sed->physaddr); 1634 } 1635 1636 /* 1637 * Remove an ED from the schedule. Called at splusb(). 1638 */ 1639 void 1640 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1641 { 1642 ohci_soft_ed_t *p; 1643 1644 SPLUSBCHECK; 1645 1646 /* XXX */ 1647 for (p = head; p == NULL && p->next != sed; p = p->next) 1648 ; 1649 if (p == NULL) 1650 panic("ohci_rem_ed: ED not found\n"); 1651 p->next = sed->next; 1652 p->ed.ed_nexted = sed->ed.ed_nexted; 1653 } 1654 1655 /* 1656 * When a transfer is completed the TD is added to the done queue by 1657 * the host controller. This queue is the processed by software. 1658 * Unfortunately the queue contains the physical address of the TD 1659 * and we have no simple way to translate this back to a kernel address. 1660 * To make the translation possible (and fast) we use a hash table of 1661 * TDs currently in the schedule. The physical address is used as the 1662 * hash value. 1663 */ 1664 1665 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1666 /* Called at splusb() */ 1667 void 1668 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1669 { 1670 int h = HASH(std->physaddr); 1671 1672 SPLUSBCHECK; 1673 1674 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1675 } 1676 1677 /* Called at splusb() */ 1678 void 1679 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1680 { 1681 SPLUSBCHECK; 1682 1683 LIST_REMOVE(std, hnext); 1684 } 1685 1686 ohci_soft_td_t * 1687 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1688 { 1689 int h = HASH(a); 1690 ohci_soft_td_t *std; 1691 1692 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1693 std != NULL; 1694 std = LIST_NEXT(std, hnext)) 1695 if (std->physaddr == a) 1696 return (std); 1697 return (NULL); 1698 } 1699 1700 /* Called at splusb() */ 1701 void 1702 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1703 { 1704 int h = HASH(sitd->physaddr); 1705 1706 SPLUSBCHECK; 1707 1708 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1709 sitd, (u_long)sitd->physaddr)); 1710 1711 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1712 } 1713 1714 /* Called at splusb() */ 1715 void 1716 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1717 { 1718 SPLUSBCHECK; 1719 1720 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1721 sitd, (u_long)sitd->physaddr)); 1722 1723 LIST_REMOVE(sitd, hnext); 1724 } 1725 1726 ohci_soft_itd_t * 1727 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1728 { 1729 int h = HASH(a); 1730 ohci_soft_itd_t *sitd; 1731 1732 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1733 sitd != NULL; 1734 sitd = LIST_NEXT(sitd, hnext)) 1735 if (sitd->physaddr == a) 1736 return (sitd); 1737 return (NULL); 1738 } 1739 1740 void 1741 ohci_timeout(void *addr) 1742 { 1743 usbd_xfer_handle xfer = addr; 1744 int s; 1745 1746 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1747 1748 s = splusb(); 1749 xfer->device->bus->intr_context++; 1750 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1751 xfer->device->bus->intr_context--; 1752 splx(s); 1753 } 1754 1755 #ifdef OHCI_DEBUG 1756 void 1757 ohci_dump_tds(ohci_soft_td_t *std) 1758 { 1759 for (; std; std = std->nexttd) 1760 ohci_dump_td(std); 1761 } 1762 1763 void 1764 ohci_dump_td(ohci_soft_td_t *std) 1765 { 1766 char sbuf[128]; 1767 1768 bitmask_snprintf((int)le32toh(std->td.td_flags), 1769 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1770 sbuf, sizeof(sbuf)); 1771 1772 DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1773 "nexttd=0x%08lx be=0x%08lx\n", 1774 std, (u_long)std->physaddr, sbuf, 1775 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1776 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1777 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1778 (u_long)le32toh(std->td.td_cbp), 1779 (u_long)le32toh(std->td.td_nexttd), 1780 (u_long)le32toh(std->td.td_be))); 1781 } 1782 1783 void 1784 ohci_dump_itd(ohci_soft_itd_t *sitd) 1785 { 1786 int i; 1787 1788 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1789 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1790 sitd, (u_long)sitd->physaddr, 1791 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1792 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1793 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1794 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1795 (u_long)le32toh(sitd->itd.itd_bp0), 1796 (u_long)le32toh(sitd->itd.itd_nextitd), 1797 (u_long)le32toh(sitd->itd.itd_be))); 1798 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1799 DPRINTF(("offs[%d]=0x%04x ", i, 1800 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1801 DPRINTF(("\n")); 1802 } 1803 1804 void 1805 ohci_dump_itds(ohci_soft_itd_t *sitd) 1806 { 1807 for (; sitd; sitd = sitd->nextitd) 1808 ohci_dump_itd(sitd); 1809 } 1810 1811 void 1812 ohci_dump_ed(ohci_soft_ed_t *sed) 1813 { 1814 char sbuf[128], sbuf2[128]; 1815 1816 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1817 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1818 sbuf, sizeof(sbuf)); 1819 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1820 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1821 1822 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx " 1823 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1824 sed, (u_long)sed->physaddr, 1825 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1826 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1827 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1828 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1829 (u_long)le32toh(sed->ed.ed_headp), 1830 (u_long)le32toh(sed->ed.ed_nexted))); 1831 } 1832 #endif 1833 1834 usbd_status 1835 ohci_open(usbd_pipe_handle pipe) 1836 { 1837 usbd_device_handle dev = pipe->device; 1838 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1839 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1840 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1841 u_int8_t addr = dev->address; 1842 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1843 ohci_soft_ed_t *sed; 1844 ohci_soft_td_t *std; 1845 ohci_soft_itd_t *sitd; 1846 ohci_physaddr_t tdphys; 1847 u_int32_t fmt; 1848 usbd_status err; 1849 int s; 1850 int ival; 1851 1852 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1853 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1854 1855 std = NULL; 1856 sed = NULL; 1857 1858 if (addr == sc->sc_addr) { 1859 switch (ed->bEndpointAddress) { 1860 case USB_CONTROL_ENDPOINT: 1861 pipe->methods = &ohci_root_ctrl_methods; 1862 break; 1863 case UE_DIR_IN | OHCI_INTR_ENDPT: 1864 pipe->methods = &ohci_root_intr_methods; 1865 break; 1866 default: 1867 return (USBD_INVAL); 1868 } 1869 } else { 1870 sed = ohci_alloc_sed(sc); 1871 if (sed == NULL) 1872 goto bad0; 1873 opipe->sed = sed; 1874 if (xfertype == UE_ISOCHRONOUS) { 1875 sitd = ohci_alloc_sitd(sc); 1876 if (sitd == NULL) { 1877 ohci_free_sitd(sc, sitd); 1878 goto bad1; 1879 } 1880 opipe->tail.itd = sitd; 1881 tdphys = sitd->physaddr; 1882 fmt = OHCI_ED_FORMAT_ISO; 1883 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1884 fmt |= OHCI_ED_DIR_IN; 1885 else 1886 fmt |= OHCI_ED_DIR_OUT; 1887 } else { 1888 std = ohci_alloc_std(sc); 1889 if (std == NULL) { 1890 ohci_free_std(sc, std); 1891 goto bad1; 1892 } 1893 opipe->tail.td = std; 1894 tdphys = std->physaddr; 1895 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1896 } 1897 sed->ed.ed_flags = htole32( 1898 OHCI_ED_SET_FA(addr) | 1899 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1900 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1901 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1902 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1903 1904 switch (xfertype) { 1905 case UE_CONTROL: 1906 pipe->methods = &ohci_device_ctrl_methods; 1907 err = usb_allocmem(&sc->sc_bus, 1908 sizeof(usb_device_request_t), 1909 0, &opipe->u.ctl.reqdma); 1910 if (err) 1911 goto bad; 1912 s = splusb(); 1913 ohci_add_ed(sed, sc->sc_ctrl_head); 1914 splx(s); 1915 break; 1916 case UE_INTERRUPT: 1917 pipe->methods = &ohci_device_intr_methods; 1918 ival = pipe->interval; 1919 if (ival == USBD_DEFAULT_INTERVAL) 1920 ival = ed->bInterval; 1921 return (ohci_device_setintr(sc, opipe, ival)); 1922 case UE_ISOCHRONOUS: 1923 pipe->methods = &ohci_device_isoc_methods; 1924 return (ohci_setup_isoc(pipe)); 1925 case UE_BULK: 1926 pipe->methods = &ohci_device_bulk_methods; 1927 s = splusb(); 1928 ohci_add_ed(sed, sc->sc_bulk_head); 1929 splx(s); 1930 break; 1931 } 1932 } 1933 return (USBD_NORMAL_COMPLETION); 1934 1935 bad: 1936 if (std != NULL) 1937 ohci_free_std(sc, std); 1938 bad1: 1939 if (sed != NULL) 1940 ohci_free_sed(sc, sed); 1941 bad0: 1942 return (USBD_NOMEM); 1943 1944 } 1945 1946 /* 1947 * Close a reqular pipe. 1948 * Assumes that there are no pending transactions. 1949 */ 1950 void 1951 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 1952 { 1953 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1954 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 1955 ohci_soft_ed_t *sed = opipe->sed; 1956 int s; 1957 1958 s = splusb(); 1959 #ifdef DIAGNOSTIC 1960 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 1961 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1962 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 1963 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 1964 ohci_soft_td_t *std; 1965 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 1966 std != NULL; 1967 std = LIST_NEXT(std, hnext)) 1968 if (std->physaddr == td) 1969 break; 1970 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 1971 "tl=0x%x pipe=%p, std=%p\n", sed, 1972 (int)le32toh(sed->ed.ed_headp), 1973 (int)le32toh(sed->ed.ed_tailp), 1974 pipe, std); 1975 usb_delay_ms(&sc->sc_bus, 2); 1976 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 1977 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 1978 printf("ohci_close_pipe: pipe still not empty\n"); 1979 } 1980 #endif 1981 ohci_rem_ed(sed, head); 1982 splx(s); 1983 ohci_free_sed(sc, opipe->sed); 1984 } 1985 1986 /* 1987 * Abort a device request. 1988 * If this routine is called at splusb() it guarantees that the request 1989 * will be removed from the hardware scheduling and that the callback 1990 * for it will be called with USBD_CANCELLED status. 1991 * It's impossible to guarantee that the requested transfer will not 1992 * have happened since the hardware runs concurrently. 1993 * If the transaction has already happened we rely on the ordinary 1994 * interrupt processing to process it. 1995 */ 1996 void 1997 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 1998 { 1999 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2000 ohci_soft_ed_t *sed; 2001 2002 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 2003 2004 xfer->status = status; 2005 2006 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2007 2008 sed = opipe->sed; 2009 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2010 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2011 2012 #if 1 2013 if (xfer->device->bus->intr_context) { 2014 /* We have no process context, so we can't use tsleep(). */ 2015 usb_callout(xfer->pipe->abort_handle, 2016 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 2017 } else { 2018 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 2019 KASSERT(intr_nesting_level == 0, 2020 ("ohci_abort_req in interrupt context")); 2021 #endif 2022 usb_delay_ms(opipe->pipe.device->bus, 1); 2023 ohci_abort_xfer_end(xfer); 2024 } 2025 #else 2026 delay(1000); 2027 ohci_abort_xfer_end(xfer); 2028 #endif 2029 } 2030 2031 void 2032 ohci_abort_xfer_end(void *v) 2033 { 2034 usbd_xfer_handle xfer = v; 2035 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2036 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2037 ohci_soft_ed_t *sed; 2038 ohci_soft_td_t *p, *n; 2039 int s; 2040 2041 s = splusb(); 2042 2043 p = xfer->hcpriv; 2044 #ifdef DIAGNOSTIC 2045 if (p == NULL) { 2046 printf("ohci_abort_xfer: hcpriv==0\n"); 2047 return; 2048 } 2049 #endif 2050 for (; p->xfer == xfer; p = n) { 2051 n = p->nexttd; 2052 ohci_free_std(sc, p); 2053 } 2054 2055 sed = opipe->sed; 2056 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2057 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2058 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2059 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2060 2061 usb_transfer_complete(xfer); 2062 2063 splx(s); 2064 } 2065 2066 /* 2067 * Data structures and routines to emulate the root hub. 2068 */ 2069 Static usb_device_descriptor_t ohci_devd = { 2070 USB_DEVICE_DESCRIPTOR_SIZE, 2071 UDESC_DEVICE, /* type */ 2072 {0x00, 0x01}, /* USB version */ 2073 UDCLASS_HUB, /* class */ 2074 UDSUBCLASS_HUB, /* subclass */ 2075 0, /* protocol */ 2076 64, /* max packet */ 2077 {0},{0},{0x00,0x01}, /* device id */ 2078 1,2,0, /* string indicies */ 2079 1 /* # of configurations */ 2080 }; 2081 2082 Static usb_config_descriptor_t ohci_confd = { 2083 USB_CONFIG_DESCRIPTOR_SIZE, 2084 UDESC_CONFIG, 2085 {USB_CONFIG_DESCRIPTOR_SIZE + 2086 USB_INTERFACE_DESCRIPTOR_SIZE + 2087 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2088 1, 2089 1, 2090 0, 2091 UC_SELF_POWERED, 2092 0 /* max power */ 2093 }; 2094 2095 Static usb_interface_descriptor_t ohci_ifcd = { 2096 USB_INTERFACE_DESCRIPTOR_SIZE, 2097 UDESC_INTERFACE, 2098 0, 2099 0, 2100 1, 2101 UICLASS_HUB, 2102 UISUBCLASS_HUB, 2103 0, 2104 0 2105 }; 2106 2107 Static usb_endpoint_descriptor_t ohci_endpd = { 2108 USB_ENDPOINT_DESCRIPTOR_SIZE, 2109 UDESC_ENDPOINT, 2110 UE_DIR_IN | OHCI_INTR_ENDPT, 2111 UE_INTERRUPT, 2112 {8, 0}, /* max packet */ 2113 255 2114 }; 2115 2116 Static usb_hub_descriptor_t ohci_hubd = { 2117 USB_HUB_DESCRIPTOR_SIZE, 2118 UDESC_HUB, 2119 0, 2120 {0,0}, 2121 0, 2122 0, 2123 {0}, 2124 }; 2125 2126 Static int 2127 ohci_str(p, l, s) 2128 usb_string_descriptor_t *p; 2129 int l; 2130 char *s; 2131 { 2132 int i; 2133 2134 if (l == 0) 2135 return (0); 2136 p->bLength = 2 * strlen(s) + 2; 2137 if (l == 1) 2138 return (1); 2139 p->bDescriptorType = UDESC_STRING; 2140 l -= 2; 2141 for (i = 0; s[i] && l > 1; i++, l -= 2) 2142 USETW2(p->bString[i], 0, s[i]); 2143 return (2*i+2); 2144 } 2145 2146 /* 2147 * Simulate a hardware hub by handling all the necessary requests. 2148 */ 2149 Static usbd_status 2150 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2151 { 2152 usbd_status err; 2153 2154 /* Insert last in queue. */ 2155 err = usb_insert_transfer(xfer); 2156 if (err) 2157 return (err); 2158 2159 /* Pipe isn't running, start first */ 2160 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2161 } 2162 2163 Static usbd_status 2164 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2165 { 2166 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2167 usb_device_request_t *req; 2168 void *buf = NULL; 2169 int port, i; 2170 int s, len, value, index, l, totlen = 0; 2171 usb_port_status_t ps; 2172 usb_hub_descriptor_t hubd; 2173 usbd_status err; 2174 u_int32_t v; 2175 2176 if (sc->sc_dying) 2177 return (USBD_IOERROR); 2178 2179 #ifdef DIAGNOSTIC 2180 if (!(xfer->rqflags & URQ_REQUEST)) 2181 /* XXX panic */ 2182 return (USBD_INVAL); 2183 #endif 2184 req = &xfer->request; 2185 2186 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2187 req->bmRequestType, req->bRequest)); 2188 2189 len = UGETW(req->wLength); 2190 value = UGETW(req->wValue); 2191 index = UGETW(req->wIndex); 2192 2193 if (len != 0) 2194 buf = KERNADDR(&xfer->dmabuf); 2195 2196 #define C(x,y) ((x) | ((y) << 8)) 2197 switch(C(req->bRequest, req->bmRequestType)) { 2198 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2199 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2200 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2201 /* 2202 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2203 * for the integrated root hub. 2204 */ 2205 break; 2206 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2207 if (len > 0) { 2208 *(u_int8_t *)buf = sc->sc_conf; 2209 totlen = 1; 2210 } 2211 break; 2212 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2213 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2214 switch(value >> 8) { 2215 case UDESC_DEVICE: 2216 if ((value & 0xff) != 0) { 2217 err = USBD_IOERROR; 2218 goto ret; 2219 } 2220 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2221 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2222 memcpy(buf, &ohci_devd, l); 2223 break; 2224 case UDESC_CONFIG: 2225 if ((value & 0xff) != 0) { 2226 err = USBD_IOERROR; 2227 goto ret; 2228 } 2229 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2230 memcpy(buf, &ohci_confd, l); 2231 buf = (char *)buf + l; 2232 len -= l; 2233 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2234 totlen += l; 2235 memcpy(buf, &ohci_ifcd, l); 2236 buf = (char *)buf + l; 2237 len -= l; 2238 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2239 totlen += l; 2240 memcpy(buf, &ohci_endpd, l); 2241 break; 2242 case UDESC_STRING: 2243 if (len == 0) 2244 break; 2245 *(u_int8_t *)buf = 0; 2246 totlen = 1; 2247 switch (value & 0xff) { 2248 case 1: /* Vendor */ 2249 totlen = ohci_str(buf, len, sc->sc_vendor); 2250 break; 2251 case 2: /* Product */ 2252 totlen = ohci_str(buf, len, "OHCI root hub"); 2253 break; 2254 } 2255 break; 2256 default: 2257 err = USBD_IOERROR; 2258 goto ret; 2259 } 2260 break; 2261 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2262 if (len > 0) { 2263 *(u_int8_t *)buf = 0; 2264 totlen = 1; 2265 } 2266 break; 2267 case C(UR_GET_STATUS, UT_READ_DEVICE): 2268 if (len > 1) { 2269 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2270 totlen = 2; 2271 } 2272 break; 2273 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2274 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2275 if (len > 1) { 2276 USETW(((usb_status_t *)buf)->wStatus, 0); 2277 totlen = 2; 2278 } 2279 break; 2280 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2281 if (value >= USB_MAX_DEVICES) { 2282 err = USBD_IOERROR; 2283 goto ret; 2284 } 2285 sc->sc_addr = value; 2286 break; 2287 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2288 if (value != 0 && value != 1) { 2289 err = USBD_IOERROR; 2290 goto ret; 2291 } 2292 sc->sc_conf = value; 2293 break; 2294 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2295 break; 2296 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2297 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2298 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2299 err = USBD_IOERROR; 2300 goto ret; 2301 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2302 break; 2303 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2304 break; 2305 /* Hub requests */ 2306 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2307 break; 2308 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2309 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2310 "port=%d feature=%d\n", 2311 index, value)); 2312 if (index < 1 || index > sc->sc_noport) { 2313 err = USBD_IOERROR; 2314 goto ret; 2315 } 2316 port = OHCI_RH_PORT_STATUS(index); 2317 switch(value) { 2318 case UHF_PORT_ENABLE: 2319 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2320 break; 2321 case UHF_PORT_SUSPEND: 2322 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2323 break; 2324 case UHF_PORT_POWER: 2325 /* Yes, writing to the LOW_SPEED bit clears power. */ 2326 OWRITE4(sc, port, UPS_LOW_SPEED); 2327 break; 2328 case UHF_C_PORT_CONNECTION: 2329 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2330 break; 2331 case UHF_C_PORT_ENABLE: 2332 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2333 break; 2334 case UHF_C_PORT_SUSPEND: 2335 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2336 break; 2337 case UHF_C_PORT_OVER_CURRENT: 2338 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2339 break; 2340 case UHF_C_PORT_RESET: 2341 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2342 break; 2343 default: 2344 err = USBD_IOERROR; 2345 goto ret; 2346 } 2347 switch(value) { 2348 case UHF_C_PORT_CONNECTION: 2349 case UHF_C_PORT_ENABLE: 2350 case UHF_C_PORT_SUSPEND: 2351 case UHF_C_PORT_OVER_CURRENT: 2352 case UHF_C_PORT_RESET: 2353 /* Enable RHSC interrupt if condition is cleared. */ 2354 if ((OREAD4(sc, port) >> 16) == 0) 2355 ohci_rhsc_able(sc, 1); 2356 break; 2357 default: 2358 break; 2359 } 2360 break; 2361 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2362 if (value != 0) { 2363 err = USBD_IOERROR; 2364 goto ret; 2365 } 2366 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2367 hubd = ohci_hubd; 2368 hubd.bNbrPorts = sc->sc_noport; 2369 USETW(hubd.wHubCharacteristics, 2370 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2371 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2372 /* XXX overcurrent */ 2373 ); 2374 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2375 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2376 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2377 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2378 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2379 l = min(len, hubd.bDescLength); 2380 totlen = l; 2381 memcpy(buf, &hubd, l); 2382 break; 2383 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2384 if (len != 4) { 2385 err = USBD_IOERROR; 2386 goto ret; 2387 } 2388 memset(buf, 0, len); /* ? XXX */ 2389 totlen = len; 2390 break; 2391 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2392 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2393 index)); 2394 if (index < 1 || index > sc->sc_noport) { 2395 err = USBD_IOERROR; 2396 goto ret; 2397 } 2398 if (len != 4) { 2399 err = USBD_IOERROR; 2400 goto ret; 2401 } 2402 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2403 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2404 v)); 2405 USETW(ps.wPortStatus, v); 2406 USETW(ps.wPortChange, v >> 16); 2407 l = min(len, sizeof ps); 2408 memcpy(buf, &ps, l); 2409 totlen = l; 2410 break; 2411 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2412 err = USBD_IOERROR; 2413 goto ret; 2414 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2415 break; 2416 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2417 if (index < 1 || index > sc->sc_noport) { 2418 err = USBD_IOERROR; 2419 goto ret; 2420 } 2421 port = OHCI_RH_PORT_STATUS(index); 2422 switch(value) { 2423 case UHF_PORT_ENABLE: 2424 OWRITE4(sc, port, UPS_PORT_ENABLED); 2425 break; 2426 case UHF_PORT_SUSPEND: 2427 OWRITE4(sc, port, UPS_SUSPEND); 2428 break; 2429 case UHF_PORT_RESET: 2430 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2431 index)); 2432 OWRITE4(sc, port, UPS_RESET); 2433 for (i = 0; i < 10; i++) { 2434 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2435 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2436 break; 2437 } 2438 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2439 index, OREAD4(sc, port))); 2440 break; 2441 case UHF_PORT_POWER: 2442 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2443 "%d\n", index)); 2444 OWRITE4(sc, port, UPS_PORT_POWER); 2445 break; 2446 default: 2447 err = USBD_IOERROR; 2448 goto ret; 2449 } 2450 break; 2451 default: 2452 err = USBD_IOERROR; 2453 goto ret; 2454 } 2455 xfer->actlen = totlen; 2456 err = USBD_NORMAL_COMPLETION; 2457 ret: 2458 xfer->status = err; 2459 s = splusb(); 2460 usb_transfer_complete(xfer); 2461 splx(s); 2462 return (USBD_IN_PROGRESS); 2463 } 2464 2465 /* Abort a root control request. */ 2466 Static void 2467 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2468 { 2469 /* Nothing to do, all transfers are synchronous. */ 2470 } 2471 2472 /* Close the root pipe. */ 2473 Static void 2474 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2475 { 2476 DPRINTF(("ohci_root_ctrl_close\n")); 2477 /* Nothing to do. */ 2478 } 2479 2480 Static usbd_status 2481 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2482 { 2483 usbd_status err; 2484 2485 /* Insert last in queue. */ 2486 err = usb_insert_transfer(xfer); 2487 if (err) 2488 return (err); 2489 2490 /* Pipe isn't running, start first */ 2491 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2492 } 2493 2494 Static usbd_status 2495 ohci_root_intr_start(usbd_xfer_handle xfer) 2496 { 2497 usbd_pipe_handle pipe = xfer->pipe; 2498 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2499 2500 if (sc->sc_dying) 2501 return (USBD_IOERROR); 2502 2503 sc->sc_intrxfer = xfer; 2504 2505 return (USBD_IN_PROGRESS); 2506 } 2507 2508 /* Abort a root interrupt request. */ 2509 Static void 2510 ohci_root_intr_abort(usbd_xfer_handle xfer) 2511 { 2512 int s; 2513 2514 if (xfer->pipe->intrxfer == xfer) { 2515 DPRINTF(("ohci_root_intr_abort: remove\n")); 2516 xfer->pipe->intrxfer = NULL; 2517 } 2518 xfer->status = USBD_CANCELLED; 2519 s = splusb(); 2520 usb_transfer_complete(xfer); 2521 splx(s); 2522 } 2523 2524 /* Close the root pipe. */ 2525 Static void 2526 ohci_root_intr_close(usbd_pipe_handle pipe) 2527 { 2528 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2529 2530 DPRINTF(("ohci_root_intr_close\n")); 2531 2532 sc->sc_intrxfer = NULL; 2533 } 2534 2535 /************************/ 2536 2537 Static usbd_status 2538 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2539 { 2540 usbd_status err; 2541 2542 /* Insert last in queue. */ 2543 err = usb_insert_transfer(xfer); 2544 if (err) 2545 return (err); 2546 2547 /* Pipe isn't running, start first */ 2548 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2549 } 2550 2551 Static usbd_status 2552 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2553 { 2554 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2555 usbd_status err; 2556 2557 if (sc->sc_dying) 2558 return (USBD_IOERROR); 2559 2560 #ifdef DIAGNOSTIC 2561 if (!(xfer->rqflags & URQ_REQUEST)) { 2562 /* XXX panic */ 2563 printf("ohci_device_ctrl_transfer: not a request\n"); 2564 return (USBD_INVAL); 2565 } 2566 #endif 2567 2568 err = ohci_device_request(xfer); 2569 if (err) 2570 return (err); 2571 2572 if (sc->sc_bus.use_polling) 2573 ohci_waitintr(sc, xfer); 2574 return (USBD_IN_PROGRESS); 2575 } 2576 2577 /* Abort a device control request. */ 2578 Static void 2579 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2580 { 2581 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2582 ohci_abort_xfer(xfer, USBD_CANCELLED); 2583 } 2584 2585 /* Close a device control pipe. */ 2586 Static void 2587 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2588 { 2589 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2590 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2591 2592 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2593 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2594 ohci_free_std(sc, opipe->tail.td); 2595 } 2596 2597 /************************/ 2598 2599 Static void 2600 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2601 { 2602 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2603 2604 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2605 } 2606 2607 Static void 2608 ohci_noop(usbd_pipe_handle pipe) 2609 { 2610 } 2611 2612 Static usbd_status 2613 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2614 { 2615 usbd_status err; 2616 2617 /* Insert last in queue. */ 2618 err = usb_insert_transfer(xfer); 2619 if (err) 2620 return (err); 2621 2622 /* Pipe isn't running, start first */ 2623 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2624 } 2625 2626 Static usbd_status 2627 ohci_device_bulk_start(usbd_xfer_handle xfer) 2628 { 2629 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2630 usbd_device_handle dev = opipe->pipe.device; 2631 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2632 int addr = dev->address; 2633 ohci_soft_td_t *data, *tail, *tdp; 2634 ohci_soft_ed_t *sed; 2635 int s, len, isread, endpt; 2636 usbd_status err; 2637 2638 if (sc->sc_dying) 2639 return (USBD_IOERROR); 2640 2641 #ifdef DIAGNOSTIC 2642 if (xfer->rqflags & URQ_REQUEST) { 2643 /* XXX panic */ 2644 printf("ohci_device_bulk_start: a request\n"); 2645 return (USBD_INVAL); 2646 } 2647 #endif 2648 2649 len = xfer->length; 2650 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2651 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2652 sed = opipe->sed; 2653 2654 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2655 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2656 endpt)); 2657 2658 opipe->u.bulk.isread = isread; 2659 opipe->u.bulk.length = len; 2660 2661 /* Update device address */ 2662 sed->ed.ed_flags = htole32( 2663 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2664 OHCI_ED_SET_FA(addr)); 2665 2666 /* Allocate a chain of new TDs (including a new tail). */ 2667 data = opipe->tail.td; 2668 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2669 data, &tail); 2670 /* We want interrupt at the end of the transfer. */ 2671 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2672 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2673 tail->flags |= OHCI_CALL_DONE; 2674 tail = tail->nexttd; /* point at sentinel */ 2675 if (err) 2676 return (err); 2677 2678 tail->xfer = NULL; 2679 xfer->hcpriv = data; 2680 2681 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2682 "td_cbp=0x%08x td_be=0x%08x\n", 2683 (int)le32toh(sed->ed.ed_flags), 2684 (int)le32toh(data->td.td_flags), 2685 (int)le32toh(data->td.td_cbp), 2686 (int)le32toh(data->td.td_be))); 2687 2688 #ifdef OHCI_DEBUG 2689 if (ohcidebug > 5) { 2690 ohci_dump_ed(sed); 2691 ohci_dump_tds(data); 2692 } 2693 #endif 2694 2695 /* Insert ED in schedule */ 2696 s = splusb(); 2697 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2698 tdp->xfer = xfer; 2699 } 2700 sed->ed.ed_tailp = htole32(tail->physaddr); 2701 opipe->tail.td = tail; 2702 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2703 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2704 if (xfer->timeout && !sc->sc_bus.use_polling) { 2705 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2706 ohci_timeout, xfer); 2707 } 2708 2709 #if 0 2710 /* This goes wrong if we are too slow. */ 2711 if (ohcidebug > 10) { 2712 delay(10000); 2713 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2714 OREAD4(sc, OHCI_COMMAND_STATUS))); 2715 ohci_dump_ed(sed); 2716 ohci_dump_tds(data); 2717 } 2718 #endif 2719 2720 splx(s); 2721 2722 return (USBD_IN_PROGRESS); 2723 } 2724 2725 Static void 2726 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2727 { 2728 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2729 ohci_abort_xfer(xfer, USBD_CANCELLED); 2730 } 2731 2732 /* 2733 * Close a device bulk pipe. 2734 */ 2735 Static void 2736 ohci_device_bulk_close(usbd_pipe_handle pipe) 2737 { 2738 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2739 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2740 2741 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2742 ohci_close_pipe(pipe, sc->sc_bulk_head); 2743 ohci_free_std(sc, opipe->tail.td); 2744 } 2745 2746 /************************/ 2747 2748 Static usbd_status 2749 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2750 { 2751 usbd_status err; 2752 2753 /* Insert last in queue. */ 2754 err = usb_insert_transfer(xfer); 2755 if (err) 2756 return (err); 2757 2758 /* Pipe isn't running, start first */ 2759 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2760 } 2761 2762 Static usbd_status 2763 ohci_device_intr_start(usbd_xfer_handle xfer) 2764 { 2765 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2766 usbd_device_handle dev = opipe->pipe.device; 2767 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2768 ohci_soft_ed_t *sed = opipe->sed; 2769 ohci_soft_td_t *data, *tail; 2770 int len; 2771 int s; 2772 2773 if (sc->sc_dying) 2774 return (USBD_IOERROR); 2775 2776 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2777 "flags=%d priv=%p\n", 2778 xfer, xfer->length, xfer->flags, xfer->priv)); 2779 2780 #ifdef DIAGNOSTIC 2781 if (xfer->rqflags & URQ_REQUEST) 2782 panic("ohci_device_intr_transfer: a request\n"); 2783 #endif 2784 2785 len = xfer->length; 2786 2787 data = opipe->tail.td; 2788 tail = ohci_alloc_std(sc); 2789 if (tail == NULL) 2790 return (USBD_NOMEM); 2791 tail->xfer = NULL; 2792 2793 data->td.td_flags = htole32( 2794 OHCI_TD_IN | OHCI_TD_NOCC | 2795 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2796 if (xfer->flags & USBD_SHORT_XFER_OK) 2797 data->td.td_flags |= htole32(OHCI_TD_R); 2798 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2799 data->nexttd = tail; 2800 data->td.td_nexttd = htole32(tail->physaddr); 2801 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2802 data->len = len; 2803 data->xfer = xfer; 2804 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2805 xfer->hcpriv = data; 2806 2807 #ifdef OHCI_DEBUG 2808 if (ohcidebug > 5) { 2809 DPRINTF(("ohci_device_intr_transfer:\n")); 2810 ohci_dump_ed(sed); 2811 ohci_dump_tds(data); 2812 } 2813 #endif 2814 2815 /* Insert ED in schedule */ 2816 s = splusb(); 2817 sed->ed.ed_tailp = htole32(tail->physaddr); 2818 opipe->tail.td = tail; 2819 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2820 2821 #if 0 2822 /* 2823 * This goes horribly wrong, printing thousands of descriptors, 2824 * because false references are followed due to the fact that the 2825 * TD is gone. 2826 */ 2827 if (ohcidebug > 5) { 2828 usb_delay_ms(&sc->sc_bus, 5); 2829 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2830 OREAD4(sc, OHCI_COMMAND_STATUS))); 2831 ohci_dump_ed(sed); 2832 ohci_dump_tds(data); 2833 } 2834 #endif 2835 splx(s); 2836 2837 return (USBD_IN_PROGRESS); 2838 } 2839 2840 /* Abort a device control request. */ 2841 Static void 2842 ohci_device_intr_abort(usbd_xfer_handle xfer) 2843 { 2844 if (xfer->pipe->intrxfer == xfer) { 2845 DPRINTF(("ohci_device_intr_abort: remove\n")); 2846 xfer->pipe->intrxfer = NULL; 2847 } 2848 ohci_abort_xfer(xfer, USBD_CANCELLED); 2849 } 2850 2851 /* Close a device interrupt pipe. */ 2852 Static void 2853 ohci_device_intr_close(usbd_pipe_handle pipe) 2854 { 2855 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2856 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2857 int nslots = opipe->u.intr.nslots; 2858 int pos = opipe->u.intr.pos; 2859 int j; 2860 ohci_soft_ed_t *p, *sed = opipe->sed; 2861 int s; 2862 2863 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2864 pipe, nslots, pos)); 2865 s = splusb(); 2866 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2867 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2868 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2869 usb_delay_ms(&sc->sc_bus, 2); 2870 2871 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2872 ; 2873 #ifdef DIAGNOSTIC 2874 if (p == NULL) 2875 panic("ohci_device_intr_close: ED not found\n"); 2876 #endif 2877 p->next = sed->next; 2878 p->ed.ed_nexted = sed->ed.ed_nexted; 2879 splx(s); 2880 2881 for (j = 0; j < nslots; j++) 2882 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2883 2884 ohci_free_std(sc, opipe->tail.td); 2885 ohci_free_sed(sc, opipe->sed); 2886 } 2887 2888 Static usbd_status 2889 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2890 { 2891 int i, j, s, best; 2892 u_int npoll, slow, shigh, nslots; 2893 u_int bestbw, bw; 2894 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2895 2896 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2897 if (ival == 0) { 2898 printf("ohci_setintr: 0 interval\n"); 2899 return (USBD_INVAL); 2900 } 2901 2902 npoll = OHCI_NO_INTRS; 2903 while (npoll > ival) 2904 npoll /= 2; 2905 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2906 2907 /* 2908 * We now know which level in the tree the ED must go into. 2909 * Figure out which slot has most bandwidth left over. 2910 * Slots to examine: 2911 * npoll 2912 * 1 0 2913 * 2 1 2 2914 * 4 3 4 5 6 2915 * 8 7 8 9 10 11 12 13 14 2916 * N (N-1) .. (N-1+N-1) 2917 */ 2918 slow = npoll-1; 2919 shigh = slow + npoll; 2920 nslots = OHCI_NO_INTRS / npoll; 2921 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2922 bw = 0; 2923 for (j = 0; j < nslots; j++) 2924 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2925 if (bw < bestbw) { 2926 best = i; 2927 bestbw = bw; 2928 } 2929 } 2930 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2931 best, slow, shigh, bestbw)); 2932 2933 s = splusb(); 2934 hsed = sc->sc_eds[best]; 2935 sed->next = hsed->next; 2936 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2937 hsed->next = sed; 2938 hsed->ed.ed_nexted = htole32(sed->physaddr); 2939 splx(s); 2940 2941 for (j = 0; j < nslots; j++) 2942 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2943 opipe->u.intr.nslots = nslots; 2944 opipe->u.intr.pos = best; 2945 2946 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 2947 return (USBD_NORMAL_COMPLETION); 2948 } 2949 2950 /***********************/ 2951 2952 usbd_status 2953 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 2954 { 2955 usbd_status err; 2956 2957 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 2958 2959 /* Put it on our queue, */ 2960 err = usb_insert_transfer(xfer); 2961 2962 /* bail out on error, */ 2963 if (err && err != USBD_IN_PROGRESS) 2964 return (err); 2965 2966 /* XXX should check inuse here */ 2967 2968 /* insert into schedule, */ 2969 ohci_device_isoc_enter(xfer); 2970 2971 /* and start if the pipe wasn't running */ 2972 if (!err) 2973 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 2974 2975 return (err); 2976 } 2977 2978 void 2979 ohci_device_isoc_enter(usbd_xfer_handle xfer) 2980 { 2981 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2982 usbd_device_handle dev = opipe->pipe.device; 2983 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2984 ohci_soft_ed_t *sed = opipe->sed; 2985 struct iso *iso = &opipe->u.iso; 2986 ohci_soft_itd_t *sitd, *nsitd; 2987 ohci_physaddr_t buf, offs, noffs, bp0; 2988 int i, ncur, nframes; 2989 int s; 2990 2991 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 2992 "nframes=%d\n", 2993 iso->inuse, iso->next, xfer, xfer->nframes)); 2994 2995 if (sc->sc_dying) 2996 return; 2997 2998 if (iso->next == -1) { 2999 /* Not in use yet, schedule it a few frames ahead. */ 3000 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3001 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3002 iso->next)); 3003 } 3004 3005 sitd = opipe->tail.itd; 3006 buf = DMAADDR(&xfer->dmabuf); 3007 bp0 = OHCI_PAGE(buf); 3008 offs = OHCI_PAGE_OFFSET(buf); 3009 nframes = xfer->nframes; 3010 xfer->hcpriv = sitd; 3011 for (i = ncur = 0; i < nframes; i++, ncur++) { 3012 noffs = offs + xfer->frlengths[i]; 3013 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3014 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3015 3016 /* Allocate next ITD */ 3017 nsitd = ohci_alloc_sitd(sc); 3018 if (nsitd == NULL) { 3019 /* XXX what now? */ 3020 printf("%s: isoc TD alloc failed\n", 3021 USBDEVNAME(sc->sc_bus.bdev)); 3022 return; 3023 } 3024 3025 /* Fill current ITD */ 3026 sitd->itd.itd_flags = htole32( 3027 OHCI_ITD_NOCC | 3028 OHCI_ITD_SET_SF(iso->next) | 3029 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3030 OHCI_ITD_SET_FC(ncur)); 3031 sitd->itd.itd_bp0 = htole32(bp0); 3032 sitd->nextitd = nsitd; 3033 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3034 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3035 sitd->xfer = xfer; 3036 sitd->flags = 0; 3037 3038 sitd = nsitd; 3039 iso->next = iso->next + ncur; 3040 bp0 = OHCI_PAGE(buf + offs); 3041 ncur = 0; 3042 } 3043 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3044 offs = noffs; 3045 } 3046 nsitd = ohci_alloc_sitd(sc); 3047 if (nsitd == NULL) { 3048 /* XXX what now? */ 3049 printf("%s: isoc TD alloc failed\n", 3050 USBDEVNAME(sc->sc_bus.bdev)); 3051 return; 3052 } 3053 /* Fixup last used ITD */ 3054 sitd->itd.itd_flags = htole32( 3055 OHCI_ITD_NOCC | 3056 OHCI_ITD_SET_SF(iso->next) | 3057 OHCI_ITD_SET_DI(0) | 3058 OHCI_ITD_SET_FC(ncur)); 3059 sitd->itd.itd_bp0 = htole32(bp0); 3060 sitd->nextitd = nsitd; 3061 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3062 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3063 sitd->xfer = xfer; 3064 sitd->flags = OHCI_CALL_DONE; 3065 3066 iso->next = iso->next + ncur; 3067 iso->inuse += nframes; 3068 3069 xfer->actlen = offs; /* XXX pretend we did it all */ 3070 3071 xfer->status = USBD_IN_PROGRESS; 3072 3073 #ifdef OHCI_DEBUG 3074 if (ohcidebug > 5) { 3075 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3076 le32toh(sc->sc_hcca->hcca_frame_number))); 3077 ohci_dump_itds(xfer->hcpriv); 3078 ohci_dump_ed(sed); 3079 } 3080 #endif 3081 3082 s = splusb(); 3083 opipe->tail.itd = nsitd; 3084 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3085 splx(s); 3086 3087 #ifdef OHCI_DEBUG 3088 if (ohcidebug > 5) { 3089 delay(150000); 3090 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3091 le32toh(sc->sc_hcca->hcca_frame_number))); 3092 ohci_dump_itds(xfer->hcpriv); 3093 ohci_dump_ed(sed); 3094 } 3095 #endif 3096 } 3097 3098 usbd_status 3099 ohci_device_isoc_start(usbd_xfer_handle xfer) 3100 { 3101 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3102 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3103 3104 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3105 3106 if (sc->sc_dying) 3107 return (USBD_IOERROR); 3108 3109 #ifdef DIAGNOSTIC 3110 if (xfer->status != USBD_IN_PROGRESS) 3111 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3112 #endif 3113 3114 /* XXX anything to do? */ 3115 3116 return (USBD_IN_PROGRESS); 3117 } 3118 3119 void 3120 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3121 { 3122 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3123 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3124 ohci_soft_ed_t *sed; 3125 ohci_soft_itd_t *sitd; 3126 int s; 3127 3128 s = splusb(); 3129 3130 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3131 3132 /* Transfer is already done. */ 3133 if (xfer->status != USBD_NOT_STARTED && 3134 xfer->status != USBD_IN_PROGRESS) { 3135 splx(s); 3136 printf("ohci_device_isoc_abort: early return\n"); 3137 return; 3138 } 3139 3140 /* Give xfer the requested abort code. */ 3141 xfer->status = USBD_CANCELLED; 3142 3143 sed = opipe->sed; 3144 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3145 3146 sitd = xfer->hcpriv; 3147 #ifdef DIAGNOSTIC 3148 if (sitd == NULL) { 3149 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3150 return; 3151 } 3152 #endif 3153 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3154 #ifdef DIAGNOSTIC 3155 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3156 sitd->isdone = 1; 3157 #endif 3158 } 3159 3160 splx(s); 3161 3162 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3163 3164 s = splusb(); 3165 3166 /* Run callback. */ 3167 usb_transfer_complete(xfer); 3168 3169 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3170 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3171 3172 splx(s); 3173 } 3174 3175 void 3176 ohci_device_isoc_done(usbd_xfer_handle xfer) 3177 { 3178 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3179 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3180 ohci_soft_itd_t *sitd, *nsitd; 3181 3182 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3183 3184 for (sitd = xfer->hcpriv; 3185 !(sitd->flags & OHCI_CALL_DONE); 3186 sitd = nsitd) { 3187 nsitd = sitd->nextitd; 3188 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3189 ohci_free_sitd(sc, sitd); 3190 } 3191 ohci_free_sitd(sc, sitd); 3192 xfer->hcpriv = NULL; 3193 } 3194 3195 usbd_status 3196 ohci_setup_isoc(usbd_pipe_handle pipe) 3197 { 3198 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3199 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3200 struct iso *iso = &opipe->u.iso; 3201 int s; 3202 3203 iso->next = -1; 3204 iso->inuse = 0; 3205 3206 s = splusb(); 3207 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3208 splx(s); 3209 3210 return (USBD_NORMAL_COMPLETION); 3211 } 3212 3213 void 3214 ohci_device_isoc_close(usbd_pipe_handle pipe) 3215 { 3216 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3217 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3218 int s; 3219 3220 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3221 3222 s = splusb(); 3223 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3224 splx(s); 3225 ohci_close_pipe(pipe, sc->sc_isoc_head); 3226 #ifdef DIAGNOSTIC 3227 opipe->tail.itd->isdone = 1; 3228 #endif 3229 ohci_free_sitd(sc, opipe->tail.itd); 3230 } 3231
Indexes created Wed Sep 24 22:09:59 GMT 2025