ohci.c revision 1.105
1 /* $NetBSD: ohci.c,v 1.105 2001/11/07 02:55:04 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 /* 104 * The OHCI controller is little endian, so on big endian machines 105 * the data strored in memory needs to be swapped. 106 */ 107 #if defined(__FreeBSD__) || defined(__OpenBSD__) 108 #if BYTE_ORDER == BIG_ENDIAN 109 #define htole32(x) (bswap32(x)) 110 #define le32toh(x) (bswap32(x)) 111 #else 112 #define htole32(x) (x) 113 #define le32toh(x) (x) 114 #endif 115 #endif 116 117 struct ohci_pipe; 118 119 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 120 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 121 122 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 123 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 124 125 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 126 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 127 128 #if 0 129 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 130 ohci_soft_td_t *); 131 #endif 132 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 133 ohci_softc_t *, int, int, usbd_xfer_handle, 134 ohci_soft_td_t *, ohci_soft_td_t **); 135 136 Static void ohci_shutdown(void *v); 137 Static void ohci_power(int, void *); 138 Static usbd_status ohci_open(usbd_pipe_handle); 139 Static void ohci_poll(struct usbd_bus *); 140 Static void ohci_softintr(void *); 141 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 142 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 143 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 144 145 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 146 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 147 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 149 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 151 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 152 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 154 155 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 156 Static void ohci_device_isoc_enter(usbd_xfer_handle); 157 158 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 159 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 160 161 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 162 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 163 164 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 166 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 167 Static void ohci_root_ctrl_close(usbd_pipe_handle); 168 Static void ohci_root_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 171 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 172 Static void ohci_root_intr_abort(usbd_xfer_handle); 173 Static void ohci_root_intr_close(usbd_pipe_handle); 174 Static void ohci_root_intr_done(usbd_xfer_handle); 175 176 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 177 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 178 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 179 Static void ohci_device_ctrl_close(usbd_pipe_handle); 180 Static void ohci_device_ctrl_done(usbd_xfer_handle); 181 182 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 183 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 184 Static void ohci_device_bulk_abort(usbd_xfer_handle); 185 Static void ohci_device_bulk_close(usbd_pipe_handle); 186 Static void ohci_device_bulk_done(usbd_xfer_handle); 187 188 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 189 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 190 Static void ohci_device_intr_abort(usbd_xfer_handle); 191 Static void ohci_device_intr_close(usbd_pipe_handle); 192 Static void ohci_device_intr_done(usbd_xfer_handle); 193 194 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 195 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 196 Static void ohci_device_isoc_abort(usbd_xfer_handle); 197 Static void ohci_device_isoc_close(usbd_pipe_handle); 198 Static void ohci_device_isoc_done(usbd_xfer_handle); 199 200 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 201 struct ohci_pipe *pipe, int ival); 202 203 Static int ohci_str(usb_string_descriptor_t *, int, char *); 204 205 Static void ohci_timeout(void *); 206 Static void ohci_rhsc_able(ohci_softc_t *, int); 207 Static void ohci_rhsc_enable(void *); 208 209 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 210 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 211 Static void ohci_abort_xfer_end(void *); 212 213 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 214 Static void ohci_noop(usbd_pipe_handle pipe); 215 216 #ifdef OHCI_DEBUG 217 Static void ohci_dumpregs(ohci_softc_t *); 218 Static void ohci_dump_tds(ohci_soft_td_t *); 219 Static void ohci_dump_td(ohci_soft_td_t *); 220 Static void ohci_dump_ed(ohci_soft_ed_t *); 221 Static void ohci_dump_itd(ohci_soft_itd_t *); 222 Static void ohci_dump_itds(ohci_soft_itd_t *); 223 #endif 224 225 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 226 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 227 #define OWRITE1(sc, r, x) \ 228 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 229 #define OWRITE2(sc, r, x) \ 230 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 231 #define OWRITE4(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 234 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 235 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 236 237 /* Reverse the bits in a value 0 .. 31 */ 238 Static u_int8_t revbits[OHCI_NO_INTRS] = 239 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 240 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 241 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 242 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 243 244 struct ohci_pipe { 245 struct usbd_pipe pipe; 246 ohci_soft_ed_t *sed; 247 union { 248 ohci_soft_td_t *td; 249 ohci_soft_itd_t *itd; 250 } tail; 251 /* Info needed for different pipe kinds. */ 252 union { 253 /* Control pipe */ 254 struct { 255 usb_dma_t reqdma; 256 u_int length; 257 ohci_soft_td_t *setup, *data, *stat; 258 } ctl; 259 /* Interrupt pipe */ 260 struct { 261 int nslots; 262 int pos; 263 } intr; 264 /* Bulk pipe */ 265 struct { 266 u_int length; 267 int isread; 268 } bulk; 269 /* Iso pipe */ 270 struct iso { 271 int next, inuse; 272 } iso; 273 } u; 274 }; 275 276 #define OHCI_INTR_ENDPT 1 277 278 Static struct usbd_bus_methods ohci_bus_methods = { 279 ohci_open, 280 ohci_softintr, 281 ohci_poll, 282 ohci_allocm, 283 ohci_freem, 284 ohci_allocx, 285 ohci_freex, 286 }; 287 288 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 289 ohci_root_ctrl_transfer, 290 ohci_root_ctrl_start, 291 ohci_root_ctrl_abort, 292 ohci_root_ctrl_close, 293 ohci_noop, 294 ohci_root_ctrl_done, 295 }; 296 297 Static struct usbd_pipe_methods ohci_root_intr_methods = { 298 ohci_root_intr_transfer, 299 ohci_root_intr_start, 300 ohci_root_intr_abort, 301 ohci_root_intr_close, 302 ohci_noop, 303 ohci_root_intr_done, 304 }; 305 306 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 307 ohci_device_ctrl_transfer, 308 ohci_device_ctrl_start, 309 ohci_device_ctrl_abort, 310 ohci_device_ctrl_close, 311 ohci_noop, 312 ohci_device_ctrl_done, 313 }; 314 315 Static struct usbd_pipe_methods ohci_device_intr_methods = { 316 ohci_device_intr_transfer, 317 ohci_device_intr_start, 318 ohci_device_intr_abort, 319 ohci_device_intr_close, 320 ohci_device_clear_toggle, 321 ohci_device_intr_done, 322 }; 323 324 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 325 ohci_device_bulk_transfer, 326 ohci_device_bulk_start, 327 ohci_device_bulk_abort, 328 ohci_device_bulk_close, 329 ohci_device_clear_toggle, 330 ohci_device_bulk_done, 331 }; 332 333 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 334 ohci_device_isoc_transfer, 335 ohci_device_isoc_start, 336 ohci_device_isoc_abort, 337 ohci_device_isoc_close, 338 ohci_noop, 339 ohci_device_isoc_done, 340 }; 341 342 #if defined(__NetBSD__) || defined(__OpenBSD__) 343 int 344 ohci_activate(device_ptr_t self, enum devact act) 345 { 346 struct ohci_softc *sc = (struct ohci_softc *)self; 347 int rv = 0; 348 349 switch (act) { 350 case DVACT_ACTIVATE: 351 return (EOPNOTSUPP); 352 break; 353 354 case DVACT_DEACTIVATE: 355 if (sc->sc_child != NULL) 356 rv = config_deactivate(sc->sc_child); 357 sc->sc_dying = 1; 358 break; 359 } 360 return (rv); 361 } 362 363 int 364 ohci_detach(struct ohci_softc *sc, int flags) 365 { 366 int rv = 0; 367 368 if (sc->sc_child != NULL) 369 rv = config_detach(sc->sc_child, flags); 370 371 if (rv != 0) 372 return (rv); 373 374 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 375 376 #if defined(__NetBSD__) || defined(__OpenBSD__) 377 powerhook_disestablish(sc->sc_powerhook); 378 shutdownhook_disestablish(sc->sc_shutdownhook); 379 #endif 380 381 /* free data structures XXX */ 382 383 return (rv); 384 } 385 #endif 386 387 ohci_soft_ed_t * 388 ohci_alloc_sed(ohci_softc_t *sc) 389 { 390 ohci_soft_ed_t *sed; 391 usbd_status err; 392 int i, offs; 393 usb_dma_t dma; 394 395 if (sc->sc_freeeds == NULL) { 396 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 397 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 398 OHCI_ED_ALIGN, &dma); 399 if (err) 400 return (0); 401 for(i = 0; i < OHCI_SED_CHUNK; i++) { 402 offs = i * OHCI_SED_SIZE; 403 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 404 sed->physaddr = DMAADDR(&dma) + offs; 405 sed->next = sc->sc_freeeds; 406 sc->sc_freeeds = sed; 407 } 408 } 409 sed = sc->sc_freeeds; 410 sc->sc_freeeds = sed->next; 411 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 412 sed->next = 0; 413 return (sed); 414 } 415 416 void 417 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 418 { 419 sed->next = sc->sc_freeeds; 420 sc->sc_freeeds = sed; 421 } 422 423 ohci_soft_td_t * 424 ohci_alloc_std(ohci_softc_t *sc) 425 { 426 ohci_soft_td_t *std; 427 usbd_status err; 428 int i, offs; 429 usb_dma_t dma; 430 int s; 431 432 if (sc->sc_freetds == NULL) { 433 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 434 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 435 OHCI_TD_ALIGN, &dma); 436 if (err) 437 return (NULL); 438 s = splusb(); 439 for(i = 0; i < OHCI_STD_CHUNK; i++) { 440 offs = i * OHCI_STD_SIZE; 441 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 442 std->physaddr = DMAADDR(&dma) + offs; 443 std->nexttd = sc->sc_freetds; 444 sc->sc_freetds = std; 445 } 446 splx(s); 447 } 448 449 s = splusb(); 450 std = sc->sc_freetds; 451 sc->sc_freetds = std->nexttd; 452 memset(&std->td, 0, sizeof(ohci_td_t)); 453 std->nexttd = NULL; 454 std->xfer = NULL; 455 ohci_hash_add_td(sc, std); 456 splx(s); 457 458 return (std); 459 } 460 461 void 462 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 463 { 464 int s; 465 466 s = splusb(); 467 ohci_hash_rem_td(sc, std); 468 std->nexttd = sc->sc_freetds; 469 sc->sc_freetds = std; 470 splx(s); 471 } 472 473 usbd_status 474 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 475 int alen, int rd, usbd_xfer_handle xfer, 476 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 477 { 478 ohci_soft_td_t *next, *cur; 479 ohci_physaddr_t dataphys, dataphysend; 480 u_int32_t tdflags; 481 int len, curlen; 482 usb_dma_t *dma = &xfer->dmabuf; 483 u_int16_t flags = xfer->flags; 484 485 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 486 487 len = alen; 488 cur = sp; 489 dataphys = DMAADDR(dma); 490 dataphysend = OHCI_PAGE(dataphys + len - 1); 491 tdflags = htole32( 492 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 493 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 494 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 495 496 for (;;) { 497 next = ohci_alloc_std(sc); 498 if (next == NULL) 499 goto nomem; 500 501 /* The OHCI hardware can handle at most one page crossing. */ 502 if (OHCI_PAGE(dataphys) == dataphysend || 503 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 504 /* we can handle it in this TD */ 505 curlen = len; 506 } else { 507 /* must use multiple TDs, fill as much as possible. */ 508 curlen = 2 * OHCI_PAGE_SIZE - 509 (dataphys & (OHCI_PAGE_SIZE-1)); 510 /* the length must be a multiple of the max size */ 511 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 512 #ifdef DIAGNOSTIC 513 if (curlen == 0) 514 panic("ohci_alloc_std: curlen == 0\n"); 515 #endif 516 } 517 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 518 "dataphysend=0x%08x len=%d curlen=%d\n", 519 dataphys, dataphysend, 520 len, curlen)); 521 len -= curlen; 522 523 cur->td.td_flags = tdflags; 524 cur->td.td_cbp = htole32(dataphys); 525 cur->nexttd = next; 526 cur->td.td_nexttd = htole32(next->physaddr); 527 cur->td.td_be = htole32(dataphys + curlen - 1); 528 cur->len = curlen; 529 cur->flags = OHCI_ADD_LEN; 530 cur->xfer = xfer; 531 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 532 dataphys, dataphys + curlen - 1)); 533 if (len == 0) 534 break; 535 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 536 dataphys += curlen; 537 cur = next; 538 } 539 if ((flags & USBD_FORCE_SHORT_XFER) && 540 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 541 /* Force a 0 length transfer at the end. */ 542 543 cur = next; 544 next = ohci_alloc_std(sc); 545 if (next == NULL) 546 goto nomem; 547 548 cur->td.td_flags = tdflags; 549 cur->td.td_cbp = 0; /* indicate 0 length packet */ 550 cur->nexttd = next; 551 cur->td.td_nexttd = htole32(next->physaddr); 552 cur->td.td_be = ~0; 553 cur->len = 0; 554 cur->flags = 0; 555 cur->xfer = xfer; 556 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 557 } 558 *ep = cur; 559 560 return (USBD_NORMAL_COMPLETION); 561 562 nomem: 563 /* XXX free chain */ 564 return (USBD_NOMEM); 565 } 566 567 #if 0 568 Static void 569 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 570 ohci_soft_td_t *stdend) 571 { 572 ohci_soft_td_t *p; 573 574 for (; std != stdend; std = p) { 575 p = std->nexttd; 576 ohci_free_std(sc, std); 577 } 578 } 579 #endif 580 581 ohci_soft_itd_t * 582 ohci_alloc_sitd(ohci_softc_t *sc) 583 { 584 ohci_soft_itd_t *sitd; 585 usbd_status err; 586 int i, s, offs; 587 usb_dma_t dma; 588 589 if (sc->sc_freeitds == NULL) { 590 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 591 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 592 OHCI_ITD_ALIGN, &dma); 593 if (err) 594 return (NULL); 595 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 596 offs = i * OHCI_SITD_SIZE; 597 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 598 sitd->physaddr = DMAADDR(&dma) + offs; 599 sitd->nextitd = sc->sc_freeitds; 600 sc->sc_freeitds = sitd; 601 } 602 } 603 604 s = splusb(); 605 sitd = sc->sc_freeitds; 606 sc->sc_freeitds = sitd->nextitd; 607 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 608 sitd->nextitd = NULL; 609 sitd->xfer = NULL; 610 ohci_hash_add_itd(sc, sitd); 611 splx(s); 612 613 #ifdef DIAGNOSTIC 614 sitd->isdone = 0; 615 #endif 616 617 return (sitd); 618 } 619 620 void 621 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 622 { 623 int s; 624 625 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 626 627 #ifdef DIAGNOSTIC 628 if (!sitd->isdone) { 629 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 630 return; 631 } 632 #endif 633 634 s = splusb(); 635 ohci_hash_rem_itd(sc, sitd); 636 sitd->nextitd = sc->sc_freeitds; 637 sc->sc_freeitds = sitd; 638 splx(s); 639 } 640 641 usbd_status 642 ohci_init(ohci_softc_t *sc) 643 { 644 ohci_soft_ed_t *sed, *psed; 645 usbd_status err; 646 int i; 647 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 648 649 DPRINTF(("ohci_init: start\n")); 650 #if defined(__OpenBSD__) 651 printf(","); 652 #else 653 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 654 #endif 655 rev = OREAD4(sc, OHCI_REVISION); 656 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 657 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 658 659 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 660 printf("%s: unsupported OHCI revision\n", 661 USBDEVNAME(sc->sc_bus.bdev)); 662 sc->sc_bus.usbrev = USBREV_UNKNOWN; 663 return (USBD_INVAL); 664 } 665 sc->sc_bus.usbrev = USBREV_1_0; 666 667 for (i = 0; i < OHCI_HASH_SIZE; i++) 668 LIST_INIT(&sc->sc_hash_tds[i]); 669 for (i = 0; i < OHCI_HASH_SIZE; i++) 670 LIST_INIT(&sc->sc_hash_itds[i]); 671 672 SIMPLEQ_INIT(&sc->sc_free_xfers); 673 674 /* XXX determine alignment by R/W */ 675 /* Allocate the HCCA area. */ 676 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 677 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 678 if (err) 679 return (err); 680 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 681 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 682 683 sc->sc_eintrs = OHCI_NORMAL_INTRS; 684 685 /* Allocate dummy ED that starts the control list. */ 686 sc->sc_ctrl_head = ohci_alloc_sed(sc); 687 if (sc->sc_ctrl_head == NULL) { 688 err = USBD_NOMEM; 689 goto bad1; 690 } 691 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 692 693 /* Allocate dummy ED that starts the bulk list. */ 694 sc->sc_bulk_head = ohci_alloc_sed(sc); 695 if (sc->sc_bulk_head == NULL) { 696 err = USBD_NOMEM; 697 goto bad2; 698 } 699 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 700 701 /* Allocate dummy ED that starts the isochronous list. */ 702 sc->sc_isoc_head = ohci_alloc_sed(sc); 703 if (sc->sc_isoc_head == NULL) { 704 err = USBD_NOMEM; 705 goto bad3; 706 } 707 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 708 709 /* Allocate all the dummy EDs that make up the interrupt tree. */ 710 for (i = 0; i < OHCI_NO_EDS; i++) { 711 sed = ohci_alloc_sed(sc); 712 if (sed == NULL) { 713 while (--i >= 0) 714 ohci_free_sed(sc, sc->sc_eds[i]); 715 err = USBD_NOMEM; 716 goto bad4; 717 } 718 /* All ED fields are set to 0. */ 719 sc->sc_eds[i] = sed; 720 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 721 if (i != 0) 722 psed = sc->sc_eds[(i-1) / 2]; 723 else 724 psed= sc->sc_isoc_head; 725 sed->next = psed; 726 sed->ed.ed_nexted = htole32(psed->physaddr); 727 } 728 /* 729 * Fill HCCA interrupt table. The bit reversal is to get 730 * the tree set up properly to spread the interrupts. 731 */ 732 for (i = 0; i < OHCI_NO_INTRS; i++) 733 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 734 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 735 736 #ifdef OHCI_DEBUG 737 if (ohcidebug > 15) { 738 for (i = 0; i < OHCI_NO_EDS; i++) { 739 printf("ed#%d ", i); 740 ohci_dump_ed(sc->sc_eds[i]); 741 } 742 printf("iso "); 743 ohci_dump_ed(sc->sc_isoc_head); 744 } 745 #endif 746 747 /* Determine in what context we are running. */ 748 ctl = OREAD4(sc, OHCI_CONTROL); 749 if (ctl & OHCI_IR) { 750 /* SMM active, request change */ 751 DPRINTF(("ohci_init: SMM active, request owner change\n")); 752 s = OREAD4(sc, OHCI_COMMAND_STATUS); 753 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 754 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 755 usb_delay_ms(&sc->sc_bus, 1); 756 ctl = OREAD4(sc, OHCI_CONTROL); 757 } 758 if ((ctl & OHCI_IR) == 0) { 759 printf("%s: SMM does not respond, resetting\n", 760 USBDEVNAME(sc->sc_bus.bdev)); 761 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 762 goto reset; 763 } 764 #if 0 765 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 766 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 767 /* BIOS started controller. */ 768 DPRINTF(("ohci_init: BIOS active\n")); 769 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 770 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 771 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 772 } 773 #endif 774 } else { 775 DPRINTF(("ohci_init: cold started\n")); 776 reset: 777 /* Controller was cold started. */ 778 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 779 } 780 781 /* 782 * This reset should not be necessary according to the OHCI spec, but 783 * without it some controllers do not start. 784 */ 785 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 786 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 787 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 788 789 /* We now own the host controller and the bus has been reset. */ 790 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 791 792 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 793 /* Nominal time for a reset is 10 us. */ 794 for (i = 0; i < 10; i++) { 795 delay(10); 796 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 797 if (!hcr) 798 break; 799 } 800 if (hcr) { 801 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 802 err = USBD_IOERROR; 803 goto bad5; 804 } 805 #ifdef OHCI_DEBUG 806 if (ohcidebug > 15) 807 ohci_dumpregs(sc); 808 #endif 809 810 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 811 812 /* Set up HC registers. */ 813 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 814 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 815 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 816 /* disable all interrupts and then switch on all desired interrupts */ 817 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 818 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 819 /* switch on desired functional features */ 820 ctl = OREAD4(sc, OHCI_CONTROL); 821 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 822 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 823 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 824 /* And finally start it! */ 825 OWRITE4(sc, OHCI_CONTROL, ctl); 826 827 /* 828 * The controller is now OPERATIONAL. Set a some final 829 * registers that should be set earlier, but that the 830 * controller ignores when in the SUSPEND state. 831 */ 832 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 833 fm |= OHCI_FSMPS(ival) | ival; 834 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 835 per = OHCI_PERIODIC(ival); /* 90% periodic */ 836 OWRITE4(sc, OHCI_PERIODIC_START, per); 837 838 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 839 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 840 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 841 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 842 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 843 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 844 845 /* 846 * The AMD756 requires a delay before re-reading the register, 847 * otherwise it will occasionally report 0 ports. 848 */ 849 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 850 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 851 852 #ifdef OHCI_DEBUG 853 if (ohcidebug > 5) 854 ohci_dumpregs(sc); 855 #endif 856 857 /* Set up the bus struct. */ 858 sc->sc_bus.methods = &ohci_bus_methods; 859 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 860 861 #if defined(__NetBSD__) || defined(__OpenBSD__) 862 sc->sc_control = sc->sc_intre = 0; 863 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 864 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 865 #endif 866 867 usb_callout_init(sc->sc_tmo_rhsc); 868 869 return (USBD_NORMAL_COMPLETION); 870 871 bad5: 872 for (i = 0; i < OHCI_NO_EDS; i++) 873 ohci_free_sed(sc, sc->sc_eds[i]); 874 bad4: 875 ohci_free_sed(sc, sc->sc_isoc_head); 876 bad3: 877 ohci_free_sed(sc, sc->sc_ctrl_head); 878 bad2: 879 ohci_free_sed(sc, sc->sc_bulk_head); 880 bad1: 881 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 882 return (err); 883 } 884 885 usbd_status 886 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 887 { 888 #if defined(__NetBSD__) || defined(__OpenBSD__) 889 struct ohci_softc *sc = (struct ohci_softc *)bus; 890 #endif 891 892 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 893 } 894 895 void 896 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 897 { 898 #if defined(__NetBSD__) || defined(__OpenBSD__) 899 struct ohci_softc *sc = (struct ohci_softc *)bus; 900 #endif 901 902 usb_freemem(&sc->sc_bus, dma); 903 } 904 905 usbd_xfer_handle 906 ohci_allocx(struct usbd_bus *bus) 907 { 908 struct ohci_softc *sc = (struct ohci_softc *)bus; 909 usbd_xfer_handle xfer; 910 911 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 912 if (xfer != NULL) 913 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 914 else 915 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 916 if (xfer != NULL) 917 memset(xfer, 0, sizeof *xfer); 918 return (xfer); 919 } 920 921 void 922 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 923 { 924 struct ohci_softc *sc = (struct ohci_softc *)bus; 925 926 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 927 } 928 929 /* 930 * Shut down the controller when the system is going down. 931 */ 932 void 933 ohci_shutdown(void *v) 934 { 935 ohci_softc_t *sc = v; 936 937 DPRINTF(("ohci_shutdown: stopping the HC\n")); 938 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 939 } 940 941 /* 942 * Handle suspend/resume. 943 * 944 * We need to switch to polling mode here, because this routine is 945 * called from an intterupt context. This is all right since we 946 * are almost suspended anyway. 947 */ 948 void 949 ohci_power(int why, void *v) 950 { 951 ohci_softc_t *sc = v; 952 u_int32_t ctl; 953 int s; 954 955 #ifdef OHCI_DEBUG 956 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 957 ohci_dumpregs(sc); 958 #endif 959 960 s = splhardusb(); 961 switch (why) { 962 case PWR_SUSPEND: 963 case PWR_STANDBY: 964 sc->sc_bus.use_polling++; 965 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 966 if (sc->sc_control == 0) { 967 /* 968 * Preserve register values, in case that APM BIOS 969 * does not recover them. 970 */ 971 sc->sc_control = ctl; 972 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 973 } 974 ctl |= OHCI_HCFS_SUSPEND; 975 OWRITE4(sc, OHCI_CONTROL, ctl); 976 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 977 sc->sc_bus.use_polling--; 978 break; 979 case PWR_RESUME: 980 sc->sc_bus.use_polling++; 981 /* Some broken BIOSes do not recover these values */ 982 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 983 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 984 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 985 if (sc->sc_intre) 986 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 987 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 988 if (sc->sc_control) 989 ctl = sc->sc_control; 990 else 991 ctl = OREAD4(sc, OHCI_CONTROL); 992 ctl |= OHCI_HCFS_RESUME; 993 OWRITE4(sc, OHCI_CONTROL, ctl); 994 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 995 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 996 OWRITE4(sc, OHCI_CONTROL, ctl); 997 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 998 sc->sc_control = sc->sc_intre = 0; 999 sc->sc_bus.use_polling--; 1000 break; 1001 case PWR_SOFTSUSPEND: 1002 case PWR_SOFTSTANDBY: 1003 case PWR_SOFTRESUME: 1004 break; 1005 } 1006 splx(s); 1007 } 1008 1009 #ifdef OHCI_DEBUG 1010 void 1011 ohci_dumpregs(ohci_softc_t *sc) 1012 { 1013 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1014 OREAD4(sc, OHCI_REVISION), 1015 OREAD4(sc, OHCI_CONTROL), 1016 OREAD4(sc, OHCI_COMMAND_STATUS))); 1017 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1018 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1019 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1020 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1021 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1022 OREAD4(sc, OHCI_HCCA), 1023 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1024 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1025 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1026 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1027 OREAD4(sc, OHCI_BULK_HEAD_ED), 1028 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1029 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1030 OREAD4(sc, OHCI_DONE_HEAD), 1031 OREAD4(sc, OHCI_FM_INTERVAL), 1032 OREAD4(sc, OHCI_FM_REMAINING))); 1033 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1034 OREAD4(sc, OHCI_FM_NUMBER), 1035 OREAD4(sc, OHCI_PERIODIC_START), 1036 OREAD4(sc, OHCI_LS_THRESHOLD))); 1037 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1038 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1039 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1040 OREAD4(sc, OHCI_RH_STATUS))); 1041 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1042 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1043 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1044 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1045 le32toh(sc->sc_hcca->hcca_frame_number), 1046 le32toh(sc->sc_hcca->hcca_done_head))); 1047 } 1048 #endif 1049 1050 Static int ohci_intr1(ohci_softc_t *); 1051 1052 int 1053 ohci_intr(void *p) 1054 { 1055 ohci_softc_t *sc = p; 1056 1057 /* If we get an interrupt while polling, then just ignore it. */ 1058 if (sc->sc_bus.use_polling) { 1059 #ifdef DIAGNOSTIC 1060 printf("ohci_intr: ignored interrupt while polling\n"); 1061 #endif 1062 return (0); 1063 } 1064 1065 return (ohci_intr1(sc)); 1066 } 1067 1068 Static int 1069 ohci_intr1(ohci_softc_t *sc) 1070 { 1071 u_int32_t intrs, eintrs; 1072 ohci_physaddr_t done; 1073 1074 DPRINTFN(14,("ohci_intr1: enter\n")); 1075 1076 /* In case the interrupt occurs before initialization has completed. */ 1077 if (sc == NULL || sc->sc_hcca == NULL) { 1078 #ifdef DIAGNOSTIC 1079 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1080 #endif 1081 return (0); 1082 } 1083 1084 intrs = 0; 1085 done = le32toh(sc->sc_hcca->hcca_done_head); 1086 if (done != 0) { 1087 if (done & ~OHCI_DONE_INTRS) 1088 intrs = OHCI_WDH; 1089 if (done & OHCI_DONE_INTRS) 1090 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1091 } else 1092 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1093 1094 if (!intrs) 1095 return (0); 1096 1097 intrs &= ~OHCI_MIE; 1098 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1099 eintrs = intrs & sc->sc_eintrs; 1100 if (!eintrs) 1101 return (0); 1102 1103 sc->sc_bus.intr_context++; 1104 sc->sc_bus.no_intrs++; 1105 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1106 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1107 (u_int)eintrs)); 1108 1109 if (eintrs & OHCI_SO) { 1110 sc->sc_overrun_cnt++; 1111 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1112 printf("%s: %u scheduling overruns\n", 1113 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1114 sc->sc_overrun_cnt = 0; 1115 } 1116 /* XXX do what */ 1117 intrs &= ~OHCI_SO; 1118 } 1119 if (eintrs & OHCI_WDH) { 1120 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1121 sc->sc_hcca->hcca_done_head = 0; 1122 usb_schedsoftintr(&sc->sc_bus); 1123 intrs &= ~OHCI_WDH; 1124 } 1125 if (eintrs & OHCI_RD) { 1126 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1127 /* XXX process resume detect */ 1128 } 1129 if (eintrs & OHCI_UE) { 1130 printf("%s: unrecoverable error, controller halted\n", 1131 USBDEVNAME(sc->sc_bus.bdev)); 1132 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1133 /* XXX what else */ 1134 } 1135 if (eintrs & OHCI_RHSC) { 1136 ohci_rhsc(sc, sc->sc_intrxfer); 1137 intrs &= ~OHCI_RHSC; 1138 1139 /* 1140 * Disable RHSC interrupt for now, because it will be 1141 * on until the port has been reset. 1142 */ 1143 ohci_rhsc_able(sc, 0); 1144 /* Do not allow RHSC interrupts > 1 per second */ 1145 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1146 } 1147 1148 sc->sc_bus.intr_context--; 1149 1150 /* Block unprocessed interrupts. XXX */ 1151 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, intrs); 1152 sc->sc_eintrs &= ~intrs; 1153 1154 return (1); 1155 } 1156 1157 void 1158 ohci_rhsc_able(ohci_softc_t *sc, int on) 1159 { 1160 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1161 if (on) { 1162 sc->sc_eintrs |= OHCI_RHSC; 1163 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1164 } else { 1165 sc->sc_eintrs &= ~OHCI_RHSC; 1166 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1167 } 1168 } 1169 1170 void 1171 ohci_rhsc_enable(void *v_sc) 1172 { 1173 ohci_softc_t *sc = v_sc; 1174 1175 ohci_rhsc_able(sc, 1); 1176 } 1177 1178 #ifdef OHCI_DEBUG 1179 char *ohci_cc_strs[] = { 1180 "NO_ERROR", 1181 "CRC", 1182 "BIT_STUFFING", 1183 "DATA_TOGGLE_MISMATCH", 1184 "STALL", 1185 "DEVICE_NOT_RESPONDING", 1186 "PID_CHECK_FAILURE", 1187 "UNEXPECTED_PID", 1188 "DATA_OVERRUN", 1189 "DATA_UNDERRUN", 1190 "BUFFER_OVERRUN", 1191 "BUFFER_UNDERRUN", 1192 "reserved", 1193 "reserved", 1194 "NOT_ACCESSED", 1195 "NOT_ACCESSED", 1196 }; 1197 #endif 1198 1199 void 1200 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1201 { 1202 ohci_soft_itd_t *sitd, *sidone, **ip; 1203 ohci_soft_td_t *std, *sdone, **p; 1204 1205 /* Reverse the done list. */ 1206 for (sdone = NULL, sidone = NULL; done != 0; ) { 1207 std = ohci_hash_find_td(sc, done); 1208 if (std != NULL) { 1209 std->dnext = sdone; 1210 done = le32toh(std->td.td_nexttd); 1211 sdone = std; 1212 DPRINTFN(10,("add TD %p\n", std)); 1213 continue; 1214 } 1215 sitd = ohci_hash_find_itd(sc, done); 1216 if (sitd != NULL) { 1217 sitd->dnext = sidone; 1218 done = le32toh(sitd->itd.itd_nextitd); 1219 sidone = sitd; 1220 DPRINTFN(5,("add ITD %p\n", sitd)); 1221 continue; 1222 } 1223 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1224 } 1225 1226 /* sdone & sidone now hold the done lists. */ 1227 /* Put them on the already processed lists. */ 1228 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1229 ; 1230 *p = sdone; 1231 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1232 ; 1233 *ip = sidone; 1234 } 1235 1236 void 1237 ohci_softintr(void *v) 1238 { 1239 ohci_softc_t *sc = v; 1240 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1241 ohci_soft_td_t *std, *sdone, *stdnext; 1242 usbd_xfer_handle xfer; 1243 int len, cc, s; 1244 1245 DPRINTFN(10,("ohci_softintr: enter\n:")); 1246 1247 sc->sc_bus.intr_context++; 1248 1249 s = splhardusb(); 1250 sdone = sc->sc_sdone; 1251 sc->sc_sdone = NULL; 1252 sidone = sc->sc_sidone; 1253 sc->sc_sidone = NULL; 1254 splx(s); 1255 1256 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1257 1258 #ifdef OHCI_DEBUG 1259 if (ohcidebug > 10) { 1260 DPRINTF(("ohci_process_done: TD done:\n")); 1261 ohci_dump_tds(sdone); 1262 } 1263 #endif 1264 1265 for (std = sdone; std; std = stdnext) { 1266 xfer = std->xfer; 1267 stdnext = std->dnext; 1268 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1269 std, xfer, xfer ? xfer->hcpriv : 0)); 1270 if (xfer == NULL) { 1271 /* xfer == NULL: There seems to be no xfer associated 1272 * with this TD. It is tailp that happened to end up on 1273 * the done queue. 1274 */ 1275 continue; 1276 } 1277 if (xfer->status == USBD_CANCELLED || 1278 xfer->status == USBD_TIMEOUT) { 1279 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1280 xfer)); 1281 /* Handled by abort routine. */ 1282 continue; 1283 } 1284 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1285 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1286 if (cc == OHCI_CC_NO_ERROR) { 1287 len = std->len; 1288 if (std->td.td_cbp != 0) 1289 len -= le32toh(std->td.td_be) - 1290 le32toh(std->td.td_cbp) + 1; 1291 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1292 len, std->flags)); 1293 if (std->flags & OHCI_ADD_LEN) 1294 xfer->actlen += len; 1295 if (std->flags & OHCI_CALL_DONE) { 1296 xfer->status = USBD_NORMAL_COMPLETION; 1297 usb_transfer_complete(xfer); 1298 } 1299 ohci_free_std(sc, std); 1300 } else { 1301 /* 1302 * Endpoint is halted. First unlink all the TDs 1303 * belonging to the failed transfer, and then restart 1304 * the endpoint. 1305 */ 1306 ohci_soft_td_t *p, *n; 1307 struct ohci_pipe *opipe = 1308 (struct ohci_pipe *)xfer->pipe; 1309 1310 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1311 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1312 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1313 1314 /* remove TDs */ 1315 for (p = std; p->xfer == xfer; p = n) { 1316 n = p->nexttd; 1317 ohci_free_std(sc, p); 1318 } 1319 1320 /* clear halt */ 1321 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1322 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1323 1324 if (cc == OHCI_CC_STALL) 1325 xfer->status = USBD_STALLED; 1326 else 1327 xfer->status = USBD_IOERROR; 1328 usb_transfer_complete(xfer); 1329 } 1330 } 1331 1332 #ifdef OHCI_DEBUG 1333 if (ohcidebug > 10) { 1334 DPRINTF(("ohci_softintr: ITD done:\n")); 1335 ohci_dump_itds(sidone); 1336 } 1337 #endif 1338 1339 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1340 xfer = sitd->xfer; 1341 sitdnext = sitd->dnext; 1342 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1343 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1344 if (xfer == NULL) 1345 continue; 1346 if (xfer->status == USBD_CANCELLED || 1347 xfer->status == USBD_TIMEOUT) { 1348 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1349 xfer)); 1350 /* Handled by abort routine. */ 1351 continue; 1352 } 1353 #ifdef DIAGNOSTIC 1354 if (sitd->isdone) 1355 printf("ohci_softintr: sitd=%p is done\n", sitd); 1356 sitd->isdone = 1; 1357 #endif 1358 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1359 if (cc == OHCI_CC_NO_ERROR) { 1360 /* XXX compute length for input */ 1361 struct ohci_pipe *opipe = 1362 (struct ohci_pipe *)xfer->pipe; 1363 if (sitd->flags & OHCI_CALL_DONE) { 1364 opipe->u.iso.inuse -= xfer->nframes; 1365 /* XXX update frlengths with actual length */ 1366 /* XXX xfer->actlen = actlen; */ 1367 xfer->status = USBD_NORMAL_COMPLETION; 1368 usb_transfer_complete(xfer); 1369 } 1370 } else { 1371 /* XXX Do more */ 1372 xfer->status = USBD_IOERROR; 1373 usb_transfer_complete(xfer); 1374 } 1375 } 1376 1377 sc->sc_bus.intr_context--; 1378 DPRINTFN(10,("ohci_softintr: done:\n")); 1379 } 1380 1381 void 1382 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1383 { 1384 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1385 1386 #ifdef DIAGNOSTIC 1387 if (!(xfer->rqflags & URQ_REQUEST)) { 1388 panic("ohci_ctrl_done: not a request\n"); 1389 } 1390 #endif 1391 xfer->hcpriv = NULL; 1392 } 1393 1394 void 1395 ohci_device_intr_done(usbd_xfer_handle xfer) 1396 { 1397 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1398 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1399 ohci_soft_ed_t *sed = opipe->sed; 1400 ohci_soft_td_t *data, *tail; 1401 1402 1403 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1404 xfer, xfer->actlen)); 1405 1406 xfer->hcpriv = NULL; 1407 1408 if (xfer->pipe->repeat) { 1409 data = opipe->tail.td; 1410 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1411 if (tail == NULL) { 1412 xfer->status = USBD_NOMEM; 1413 return; 1414 } 1415 tail->xfer = NULL; 1416 1417 data->td.td_flags = htole32( 1418 OHCI_TD_IN | OHCI_TD_NOCC | 1419 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1420 if (xfer->flags & USBD_SHORT_XFER_OK) 1421 data->td.td_flags |= htole32(OHCI_TD_R); 1422 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1423 data->nexttd = tail; 1424 data->td.td_nexttd = htole32(tail->physaddr); 1425 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1426 xfer->length - 1); 1427 data->len = xfer->length; 1428 data->xfer = xfer; 1429 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1430 xfer->hcpriv = data; 1431 xfer->actlen = 0; 1432 1433 sed->ed.ed_tailp = htole32(tail->physaddr); 1434 opipe->tail.td = tail; 1435 } 1436 } 1437 1438 void 1439 ohci_device_bulk_done(usbd_xfer_handle xfer) 1440 { 1441 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1442 xfer, xfer->actlen)); 1443 1444 xfer->hcpriv = NULL; 1445 } 1446 1447 void 1448 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1449 { 1450 usbd_pipe_handle pipe; 1451 struct ohci_pipe *opipe; 1452 u_char *p; 1453 int i, m; 1454 int hstatus; 1455 1456 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1457 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1458 sc, xfer, hstatus)); 1459 1460 if (xfer == NULL) { 1461 /* Just ignore the change. */ 1462 return; 1463 } 1464 1465 pipe = xfer->pipe; 1466 opipe = (struct ohci_pipe *)pipe; 1467 1468 p = KERNADDR(&xfer->dmabuf); 1469 m = min(sc->sc_noport, xfer->length * 8 - 1); 1470 memset(p, 0, xfer->length); 1471 for (i = 1; i <= m; i++) { 1472 /* Pick out CHANGE bits from the status reg. */ 1473 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1474 p[i/8] |= 1 << (i%8); 1475 } 1476 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1477 xfer->actlen = xfer->length; 1478 xfer->status = USBD_NORMAL_COMPLETION; 1479 1480 usb_transfer_complete(xfer); 1481 } 1482 1483 void 1484 ohci_root_intr_done(usbd_xfer_handle xfer) 1485 { 1486 xfer->hcpriv = NULL; 1487 } 1488 1489 void 1490 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1491 { 1492 xfer->hcpriv = NULL; 1493 } 1494 1495 /* 1496 * Wait here until controller claims to have an interrupt. 1497 * Then call ohci_intr and return. Use timeout to avoid waiting 1498 * too long. 1499 */ 1500 void 1501 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1502 { 1503 int timo = xfer->timeout; 1504 int usecs; 1505 u_int32_t intrs; 1506 1507 xfer->status = USBD_IN_PROGRESS; 1508 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1509 usb_delay_ms(&sc->sc_bus, 1); 1510 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1511 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1512 #ifdef OHCI_DEBUG 1513 if (ohcidebug > 15) 1514 ohci_dumpregs(sc); 1515 #endif 1516 if (intrs) { 1517 ohci_intr1(sc); 1518 if (xfer->status != USBD_IN_PROGRESS) 1519 return; 1520 } 1521 } 1522 1523 /* Timeout */ 1524 DPRINTF(("ohci_waitintr: timeout\n")); 1525 xfer->status = USBD_TIMEOUT; 1526 usb_transfer_complete(xfer); 1527 /* XXX should free TD */ 1528 } 1529 1530 void 1531 ohci_poll(struct usbd_bus *bus) 1532 { 1533 ohci_softc_t *sc = (ohci_softc_t *)bus; 1534 #ifdef OHCI_DEBUG 1535 static int last; 1536 int new; 1537 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1538 if (new != last) { 1539 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1540 last = new; 1541 } 1542 #endif 1543 1544 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1545 ohci_intr1(sc); 1546 } 1547 1548 usbd_status 1549 ohci_device_request(usbd_xfer_handle xfer) 1550 { 1551 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1552 usb_device_request_t *req = &xfer->request; 1553 usbd_device_handle dev = opipe->pipe.device; 1554 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1555 int addr = dev->address; 1556 ohci_soft_td_t *setup, *stat, *next, *tail; 1557 ohci_soft_ed_t *sed; 1558 int isread; 1559 int len; 1560 usbd_status err; 1561 int s; 1562 1563 isread = req->bmRequestType & UT_READ; 1564 len = UGETW(req->wLength); 1565 1566 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1567 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1568 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1569 UGETW(req->wIndex), len, addr, 1570 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1571 1572 setup = opipe->tail.td; 1573 stat = ohci_alloc_std(sc); 1574 if (stat == NULL) { 1575 err = USBD_NOMEM; 1576 goto bad1; 1577 } 1578 tail = ohci_alloc_std(sc); 1579 if (tail == NULL) { 1580 err = USBD_NOMEM; 1581 goto bad2; 1582 } 1583 tail->xfer = NULL; 1584 1585 sed = opipe->sed; 1586 opipe->u.ctl.length = len; 1587 1588 /* Update device address and length since they may have changed. */ 1589 /* XXX This only needs to be done once, but it's too early in open. */ 1590 /* XXXX Should not touch ED here! */ 1591 sed->ed.ed_flags = htole32( 1592 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1593 OHCI_ED_SET_FA(addr) | 1594 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1595 1596 next = stat; 1597 1598 /* Set up data transaction */ 1599 if (len != 0) { 1600 ohci_soft_td_t *std = stat; 1601 1602 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1603 std, &stat); 1604 stat = stat->nexttd; /* point at free TD */ 1605 if (err) 1606 goto bad3; 1607 /* Start toggle at 1 and then use the carried toggle. */ 1608 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1609 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1610 } 1611 1612 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1613 1614 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1615 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1616 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1617 setup->nexttd = next; 1618 setup->td.td_nexttd = htole32(next->physaddr); 1619 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1620 setup->len = 0; 1621 setup->xfer = xfer; 1622 setup->flags = 0; 1623 xfer->hcpriv = setup; 1624 1625 stat->td.td_flags = htole32( 1626 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1627 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1628 stat->td.td_cbp = 0; 1629 stat->nexttd = tail; 1630 stat->td.td_nexttd = htole32(tail->physaddr); 1631 stat->td.td_be = 0; 1632 stat->flags = OHCI_CALL_DONE; 1633 stat->len = 0; 1634 stat->xfer = xfer; 1635 1636 #ifdef OHCI_DEBUG 1637 if (ohcidebug > 5) { 1638 DPRINTF(("ohci_device_request:\n")); 1639 ohci_dump_ed(sed); 1640 ohci_dump_tds(setup); 1641 } 1642 #endif 1643 1644 /* Insert ED in schedule */ 1645 s = splusb(); 1646 sed->ed.ed_tailp = htole32(tail->physaddr); 1647 opipe->tail.td = tail; 1648 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1649 if (xfer->timeout && !sc->sc_bus.use_polling) { 1650 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1651 ohci_timeout, xfer); 1652 } 1653 splx(s); 1654 1655 #if 0 1656 if (ohcidebug > 10) { 1657 delay(10000); 1658 DPRINTF(("ohci_device_request: status=%x\n", 1659 OREAD4(sc, OHCI_COMMAND_STATUS))); 1660 ohci_dump_ed(sed); 1661 ohci_dump_tds(setup); 1662 } 1663 #endif 1664 1665 return (USBD_NORMAL_COMPLETION); 1666 1667 bad3: 1668 ohci_free_std(sc, tail); 1669 bad2: 1670 ohci_free_std(sc, stat); 1671 bad1: 1672 return (err); 1673 } 1674 1675 /* 1676 * Add an ED to the schedule. Called at splusb(). 1677 */ 1678 void 1679 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1680 { 1681 SPLUSBCHECK; 1682 sed->next = head->next; 1683 sed->ed.ed_nexted = head->ed.ed_nexted; 1684 head->next = sed; 1685 head->ed.ed_nexted = htole32(sed->physaddr); 1686 } 1687 1688 /* 1689 * Remove an ED from the schedule. Called at splusb(). 1690 */ 1691 void 1692 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1693 { 1694 ohci_soft_ed_t *p; 1695 1696 SPLUSBCHECK; 1697 1698 /* XXX */ 1699 for (p = head; p == NULL && p->next != sed; p = p->next) 1700 ; 1701 if (p == NULL) 1702 panic("ohci_rem_ed: ED not found\n"); 1703 p->next = sed->next; 1704 p->ed.ed_nexted = sed->ed.ed_nexted; 1705 } 1706 1707 /* 1708 * When a transfer is completed the TD is added to the done queue by 1709 * the host controller. This queue is the processed by software. 1710 * Unfortunately the queue contains the physical address of the TD 1711 * and we have no simple way to translate this back to a kernel address. 1712 * To make the translation possible (and fast) we use a hash table of 1713 * TDs currently in the schedule. The physical address is used as the 1714 * hash value. 1715 */ 1716 1717 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1718 /* Called at splusb() */ 1719 void 1720 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1721 { 1722 int h = HASH(std->physaddr); 1723 1724 SPLUSBCHECK; 1725 1726 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1727 } 1728 1729 /* Called at splusb() */ 1730 void 1731 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1732 { 1733 SPLUSBCHECK; 1734 1735 LIST_REMOVE(std, hnext); 1736 } 1737 1738 ohci_soft_td_t * 1739 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1740 { 1741 int h = HASH(a); 1742 ohci_soft_td_t *std; 1743 1744 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1745 std != NULL; 1746 std = LIST_NEXT(std, hnext)) 1747 if (std->physaddr == a) 1748 return (std); 1749 return (NULL); 1750 } 1751 1752 /* Called at splusb() */ 1753 void 1754 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1755 { 1756 int h = HASH(sitd->physaddr); 1757 1758 SPLUSBCHECK; 1759 1760 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1761 sitd, (u_long)sitd->physaddr)); 1762 1763 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1764 } 1765 1766 /* Called at splusb() */ 1767 void 1768 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1769 { 1770 SPLUSBCHECK; 1771 1772 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1773 sitd, (u_long)sitd->physaddr)); 1774 1775 LIST_REMOVE(sitd, hnext); 1776 } 1777 1778 ohci_soft_itd_t * 1779 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1780 { 1781 int h = HASH(a); 1782 ohci_soft_itd_t *sitd; 1783 1784 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1785 sitd != NULL; 1786 sitd = LIST_NEXT(sitd, hnext)) 1787 if (sitd->physaddr == a) 1788 return (sitd); 1789 return (NULL); 1790 } 1791 1792 void 1793 ohci_timeout(void *addr) 1794 { 1795 usbd_xfer_handle xfer = addr; 1796 int s; 1797 1798 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1799 1800 s = splusb(); 1801 xfer->device->bus->intr_context++; 1802 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1803 xfer->device->bus->intr_context--; 1804 splx(s); 1805 } 1806 1807 #ifdef OHCI_DEBUG 1808 void 1809 ohci_dump_tds(ohci_soft_td_t *std) 1810 { 1811 for (; std; std = std->nexttd) 1812 ohci_dump_td(std); 1813 } 1814 1815 void 1816 ohci_dump_td(ohci_soft_td_t *std) 1817 { 1818 char sbuf[128]; 1819 1820 bitmask_snprintf((int)le32toh(std->td.td_flags), 1821 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1822 sbuf, sizeof(sbuf)); 1823 1824 DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1825 "nexttd=0x%08lx be=0x%08lx\n", 1826 std, (u_long)std->physaddr, sbuf, 1827 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1828 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1829 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1830 (u_long)le32toh(std->td.td_cbp), 1831 (u_long)le32toh(std->td.td_nexttd), 1832 (u_long)le32toh(std->td.td_be))); 1833 } 1834 1835 void 1836 ohci_dump_itd(ohci_soft_itd_t *sitd) 1837 { 1838 int i; 1839 1840 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1841 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1842 sitd, (u_long)sitd->physaddr, 1843 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1844 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1845 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1846 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1847 (u_long)le32toh(sitd->itd.itd_bp0), 1848 (u_long)le32toh(sitd->itd.itd_nextitd), 1849 (u_long)le32toh(sitd->itd.itd_be))); 1850 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1851 DPRINTF(("offs[%d]=0x%04x ", i, 1852 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1853 DPRINTF(("\n")); 1854 } 1855 1856 void 1857 ohci_dump_itds(ohci_soft_itd_t *sitd) 1858 { 1859 for (; sitd; sitd = sitd->nextitd) 1860 ohci_dump_itd(sitd); 1861 } 1862 1863 void 1864 ohci_dump_ed(ohci_soft_ed_t *sed) 1865 { 1866 char sbuf[128], sbuf2[128]; 1867 1868 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1869 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1870 sbuf, sizeof(sbuf)); 1871 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1872 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1873 1874 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d %s\ntailp=0x%08lx " 1875 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1876 sed, (u_long)sed->physaddr, 1877 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1878 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1879 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1880 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1881 (u_long)le32toh(sed->ed.ed_headp), 1882 (u_long)le32toh(sed->ed.ed_nexted))); 1883 } 1884 #endif 1885 1886 usbd_status 1887 ohci_open(usbd_pipe_handle pipe) 1888 { 1889 usbd_device_handle dev = pipe->device; 1890 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1891 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1892 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1893 u_int8_t addr = dev->address; 1894 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1895 ohci_soft_ed_t *sed; 1896 ohci_soft_td_t *std; 1897 ohci_soft_itd_t *sitd; 1898 ohci_physaddr_t tdphys; 1899 u_int32_t fmt; 1900 usbd_status err; 1901 int s; 1902 int ival; 1903 1904 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1905 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1906 1907 std = NULL; 1908 sed = NULL; 1909 1910 if (addr == sc->sc_addr) { 1911 switch (ed->bEndpointAddress) { 1912 case USB_CONTROL_ENDPOINT: 1913 pipe->methods = &ohci_root_ctrl_methods; 1914 break; 1915 case UE_DIR_IN | OHCI_INTR_ENDPT: 1916 pipe->methods = &ohci_root_intr_methods; 1917 break; 1918 default: 1919 return (USBD_INVAL); 1920 } 1921 } else { 1922 sed = ohci_alloc_sed(sc); 1923 if (sed == NULL) 1924 goto bad0; 1925 opipe->sed = sed; 1926 if (xfertype == UE_ISOCHRONOUS) { 1927 sitd = ohci_alloc_sitd(sc); 1928 if (sitd == NULL) { 1929 ohci_free_sitd(sc, sitd); 1930 goto bad1; 1931 } 1932 opipe->tail.itd = sitd; 1933 tdphys = sitd->physaddr; 1934 fmt = OHCI_ED_FORMAT_ISO; 1935 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1936 fmt |= OHCI_ED_DIR_IN; 1937 else 1938 fmt |= OHCI_ED_DIR_OUT; 1939 } else { 1940 std = ohci_alloc_std(sc); 1941 if (std == NULL) { 1942 ohci_free_std(sc, std); 1943 goto bad1; 1944 } 1945 opipe->tail.td = std; 1946 tdphys = std->physaddr; 1947 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1948 } 1949 sed->ed.ed_flags = htole32( 1950 OHCI_ED_SET_FA(addr) | 1951 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1952 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1953 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1954 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1955 1956 switch (xfertype) { 1957 case UE_CONTROL: 1958 pipe->methods = &ohci_device_ctrl_methods; 1959 err = usb_allocmem(&sc->sc_bus, 1960 sizeof(usb_device_request_t), 1961 0, &opipe->u.ctl.reqdma); 1962 if (err) 1963 goto bad; 1964 s = splusb(); 1965 ohci_add_ed(sed, sc->sc_ctrl_head); 1966 splx(s); 1967 break; 1968 case UE_INTERRUPT: 1969 pipe->methods = &ohci_device_intr_methods; 1970 ival = pipe->interval; 1971 if (ival == USBD_DEFAULT_INTERVAL) 1972 ival = ed->bInterval; 1973 return (ohci_device_setintr(sc, opipe, ival)); 1974 case UE_ISOCHRONOUS: 1975 pipe->methods = &ohci_device_isoc_methods; 1976 return (ohci_setup_isoc(pipe)); 1977 case UE_BULK: 1978 pipe->methods = &ohci_device_bulk_methods; 1979 s = splusb(); 1980 ohci_add_ed(sed, sc->sc_bulk_head); 1981 splx(s); 1982 break; 1983 } 1984 } 1985 return (USBD_NORMAL_COMPLETION); 1986 1987 bad: 1988 if (std != NULL) 1989 ohci_free_std(sc, std); 1990 bad1: 1991 if (sed != NULL) 1992 ohci_free_sed(sc, sed); 1993 bad0: 1994 return (USBD_NOMEM); 1995 1996 } 1997 1998 /* 1999 * Close a reqular pipe. 2000 * Assumes that there are no pending transactions. 2001 */ 2002 void 2003 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2004 { 2005 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2006 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2007 ohci_soft_ed_t *sed = opipe->sed; 2008 int s; 2009 2010 s = splusb(); 2011 #ifdef DIAGNOSTIC 2012 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2013 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2014 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2015 ohci_physaddr_t td = le32toh(sed->ed.ed_headp); 2016 ohci_soft_td_t *std; 2017 for (std = LIST_FIRST(&sc->sc_hash_tds[HASH(td)]); 2018 std != NULL; 2019 std = LIST_NEXT(std, hnext)) 2020 if (std->physaddr == td) 2021 break; 2022 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2023 "tl=0x%x pipe=%p, std=%p\n", sed, 2024 (int)le32toh(sed->ed.ed_headp), 2025 (int)le32toh(sed->ed.ed_tailp), 2026 pipe, std); 2027 usb_delay_ms(&sc->sc_bus, 2); 2028 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2029 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2030 printf("ohci_close_pipe: pipe still not empty\n"); 2031 } 2032 #endif 2033 ohci_rem_ed(sed, head); 2034 splx(s); 2035 ohci_free_sed(sc, opipe->sed); 2036 } 2037 2038 /* 2039 * Abort a device request. 2040 * If this routine is called at splusb() it guarantees that the request 2041 * will be removed from the hardware scheduling and that the callback 2042 * for it will be called with USBD_CANCELLED status. 2043 * It's impossible to guarantee that the requested transfer will not 2044 * have happened since the hardware runs concurrently. 2045 * If the transaction has already happened we rely on the ordinary 2046 * interrupt processing to process it. 2047 */ 2048 void 2049 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2050 { 2051 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2052 ohci_soft_ed_t *sed; 2053 2054 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p\n", xfer, opipe)); 2055 2056 xfer->status = status; 2057 2058 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2059 2060 sed = opipe->sed; 2061 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2062 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2063 2064 #if 1 2065 if (xfer->device->bus->intr_context) { 2066 /* We have no process context, so we can't use tsleep(). */ 2067 usb_callout(xfer->pipe->abort_handle, 2068 hz / USB_FRAMES_PER_SECOND, ohci_abort_xfer_end, xfer); 2069 } else { 2070 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 2071 KASSERT(intr_nesting_level == 0, 2072 ("ohci_abort_req in interrupt context")); 2073 #endif 2074 usb_delay_ms(opipe->pipe.device->bus, 1); 2075 ohci_abort_xfer_end(xfer); 2076 } 2077 #else 2078 delay(1000); 2079 ohci_abort_xfer_end(xfer); 2080 #endif 2081 } 2082 2083 void 2084 ohci_abort_xfer_end(void *v) 2085 { 2086 usbd_xfer_handle xfer = v; 2087 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2088 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2089 ohci_soft_ed_t *sed; 2090 ohci_soft_td_t *p, *n; 2091 int s; 2092 2093 s = splusb(); 2094 2095 p = xfer->hcpriv; 2096 #ifdef DIAGNOSTIC 2097 if (p == NULL) { 2098 splx(s); 2099 printf("ohci_abort_xfer: hcpriv==0\n"); 2100 return; 2101 } 2102 #endif 2103 for (; p->xfer == xfer; p = n) { 2104 n = p->nexttd; 2105 ohci_free_std(sc, p); 2106 } 2107 2108 sed = opipe->sed; 2109 DPRINTFN(2,("ohci_abort_xfer: set hd=%x, tl=%x\n", 2110 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2111 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2112 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2113 2114 usb_transfer_complete(xfer); 2115 2116 splx(s); 2117 } 2118 2119 /* 2120 * Data structures and routines to emulate the root hub. 2121 */ 2122 Static usb_device_descriptor_t ohci_devd = { 2123 USB_DEVICE_DESCRIPTOR_SIZE, 2124 UDESC_DEVICE, /* type */ 2125 {0x00, 0x01}, /* USB version */ 2126 UDCLASS_HUB, /* class */ 2127 UDSUBCLASS_HUB, /* subclass */ 2128 0, /* protocol */ 2129 64, /* max packet */ 2130 {0},{0},{0x00,0x01}, /* device id */ 2131 1,2,0, /* string indicies */ 2132 1 /* # of configurations */ 2133 }; 2134 2135 Static usb_config_descriptor_t ohci_confd = { 2136 USB_CONFIG_DESCRIPTOR_SIZE, 2137 UDESC_CONFIG, 2138 {USB_CONFIG_DESCRIPTOR_SIZE + 2139 USB_INTERFACE_DESCRIPTOR_SIZE + 2140 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2141 1, 2142 1, 2143 0, 2144 UC_SELF_POWERED, 2145 0 /* max power */ 2146 }; 2147 2148 Static usb_interface_descriptor_t ohci_ifcd = { 2149 USB_INTERFACE_DESCRIPTOR_SIZE, 2150 UDESC_INTERFACE, 2151 0, 2152 0, 2153 1, 2154 UICLASS_HUB, 2155 UISUBCLASS_HUB, 2156 0, 2157 0 2158 }; 2159 2160 Static usb_endpoint_descriptor_t ohci_endpd = { 2161 USB_ENDPOINT_DESCRIPTOR_SIZE, 2162 UDESC_ENDPOINT, 2163 UE_DIR_IN | OHCI_INTR_ENDPT, 2164 UE_INTERRUPT, 2165 {8, 0}, /* max packet */ 2166 255 2167 }; 2168 2169 Static usb_hub_descriptor_t ohci_hubd = { 2170 USB_HUB_DESCRIPTOR_SIZE, 2171 UDESC_HUB, 2172 0, 2173 {0,0}, 2174 0, 2175 0, 2176 {0}, 2177 }; 2178 2179 Static int 2180 ohci_str(p, l, s) 2181 usb_string_descriptor_t *p; 2182 int l; 2183 char *s; 2184 { 2185 int i; 2186 2187 if (l == 0) 2188 return (0); 2189 p->bLength = 2 * strlen(s) + 2; 2190 if (l == 1) 2191 return (1); 2192 p->bDescriptorType = UDESC_STRING; 2193 l -= 2; 2194 for (i = 0; s[i] && l > 1; i++, l -= 2) 2195 USETW2(p->bString[i], 0, s[i]); 2196 return (2*i+2); 2197 } 2198 2199 /* 2200 * Simulate a hardware hub by handling all the necessary requests. 2201 */ 2202 Static usbd_status 2203 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2204 { 2205 usbd_status err; 2206 2207 /* Insert last in queue. */ 2208 err = usb_insert_transfer(xfer); 2209 if (err) 2210 return (err); 2211 2212 /* Pipe isn't running, start first */ 2213 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2214 } 2215 2216 Static usbd_status 2217 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2218 { 2219 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2220 usb_device_request_t *req; 2221 void *buf = NULL; 2222 int port, i; 2223 int s, len, value, index, l, totlen = 0; 2224 usb_port_status_t ps; 2225 usb_hub_descriptor_t hubd; 2226 usbd_status err; 2227 u_int32_t v; 2228 2229 if (sc->sc_dying) 2230 return (USBD_IOERROR); 2231 2232 #ifdef DIAGNOSTIC 2233 if (!(xfer->rqflags & URQ_REQUEST)) 2234 /* XXX panic */ 2235 return (USBD_INVAL); 2236 #endif 2237 req = &xfer->request; 2238 2239 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2240 req->bmRequestType, req->bRequest)); 2241 2242 len = UGETW(req->wLength); 2243 value = UGETW(req->wValue); 2244 index = UGETW(req->wIndex); 2245 2246 if (len != 0) 2247 buf = KERNADDR(&xfer->dmabuf); 2248 2249 #define C(x,y) ((x) | ((y) << 8)) 2250 switch(C(req->bRequest, req->bmRequestType)) { 2251 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2252 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2253 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2254 /* 2255 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2256 * for the integrated root hub. 2257 */ 2258 break; 2259 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2260 if (len > 0) { 2261 *(u_int8_t *)buf = sc->sc_conf; 2262 totlen = 1; 2263 } 2264 break; 2265 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2266 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2267 switch(value >> 8) { 2268 case UDESC_DEVICE: 2269 if ((value & 0xff) != 0) { 2270 err = USBD_IOERROR; 2271 goto ret; 2272 } 2273 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2274 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2275 memcpy(buf, &ohci_devd, l); 2276 break; 2277 case UDESC_CONFIG: 2278 if ((value & 0xff) != 0) { 2279 err = USBD_IOERROR; 2280 goto ret; 2281 } 2282 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2283 memcpy(buf, &ohci_confd, l); 2284 buf = (char *)buf + l; 2285 len -= l; 2286 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2287 totlen += l; 2288 memcpy(buf, &ohci_ifcd, l); 2289 buf = (char *)buf + l; 2290 len -= l; 2291 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2292 totlen += l; 2293 memcpy(buf, &ohci_endpd, l); 2294 break; 2295 case UDESC_STRING: 2296 if (len == 0) 2297 break; 2298 *(u_int8_t *)buf = 0; 2299 totlen = 1; 2300 switch (value & 0xff) { 2301 case 1: /* Vendor */ 2302 totlen = ohci_str(buf, len, sc->sc_vendor); 2303 break; 2304 case 2: /* Product */ 2305 totlen = ohci_str(buf, len, "OHCI root hub"); 2306 break; 2307 } 2308 break; 2309 default: 2310 err = USBD_IOERROR; 2311 goto ret; 2312 } 2313 break; 2314 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2315 if (len > 0) { 2316 *(u_int8_t *)buf = 0; 2317 totlen = 1; 2318 } 2319 break; 2320 case C(UR_GET_STATUS, UT_READ_DEVICE): 2321 if (len > 1) { 2322 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2323 totlen = 2; 2324 } 2325 break; 2326 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2327 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2328 if (len > 1) { 2329 USETW(((usb_status_t *)buf)->wStatus, 0); 2330 totlen = 2; 2331 } 2332 break; 2333 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2334 if (value >= USB_MAX_DEVICES) { 2335 err = USBD_IOERROR; 2336 goto ret; 2337 } 2338 sc->sc_addr = value; 2339 break; 2340 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2341 if (value != 0 && value != 1) { 2342 err = USBD_IOERROR; 2343 goto ret; 2344 } 2345 sc->sc_conf = value; 2346 break; 2347 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2348 break; 2349 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2350 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2351 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2352 err = USBD_IOERROR; 2353 goto ret; 2354 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2355 break; 2356 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2357 break; 2358 /* Hub requests */ 2359 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2360 break; 2361 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2362 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2363 "port=%d feature=%d\n", 2364 index, value)); 2365 if (index < 1 || index > sc->sc_noport) { 2366 err = USBD_IOERROR; 2367 goto ret; 2368 } 2369 port = OHCI_RH_PORT_STATUS(index); 2370 switch(value) { 2371 case UHF_PORT_ENABLE: 2372 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2373 break; 2374 case UHF_PORT_SUSPEND: 2375 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2376 break; 2377 case UHF_PORT_POWER: 2378 /* Yes, writing to the LOW_SPEED bit clears power. */ 2379 OWRITE4(sc, port, UPS_LOW_SPEED); 2380 break; 2381 case UHF_C_PORT_CONNECTION: 2382 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2383 break; 2384 case UHF_C_PORT_ENABLE: 2385 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2386 break; 2387 case UHF_C_PORT_SUSPEND: 2388 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2389 break; 2390 case UHF_C_PORT_OVER_CURRENT: 2391 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2392 break; 2393 case UHF_C_PORT_RESET: 2394 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2395 break; 2396 default: 2397 err = USBD_IOERROR; 2398 goto ret; 2399 } 2400 switch(value) { 2401 case UHF_C_PORT_CONNECTION: 2402 case UHF_C_PORT_ENABLE: 2403 case UHF_C_PORT_SUSPEND: 2404 case UHF_C_PORT_OVER_CURRENT: 2405 case UHF_C_PORT_RESET: 2406 /* Enable RHSC interrupt if condition is cleared. */ 2407 if ((OREAD4(sc, port) >> 16) == 0) 2408 ohci_rhsc_able(sc, 1); 2409 break; 2410 default: 2411 break; 2412 } 2413 break; 2414 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2415 if (value != 0) { 2416 err = USBD_IOERROR; 2417 goto ret; 2418 } 2419 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2420 hubd = ohci_hubd; 2421 hubd.bNbrPorts = sc->sc_noport; 2422 USETW(hubd.wHubCharacteristics, 2423 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2424 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2425 /* XXX overcurrent */ 2426 ); 2427 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2428 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2429 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2430 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2431 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2432 l = min(len, hubd.bDescLength); 2433 totlen = l; 2434 memcpy(buf, &hubd, l); 2435 break; 2436 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2437 if (len != 4) { 2438 err = USBD_IOERROR; 2439 goto ret; 2440 } 2441 memset(buf, 0, len); /* ? XXX */ 2442 totlen = len; 2443 break; 2444 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2445 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2446 index)); 2447 if (index < 1 || index > sc->sc_noport) { 2448 err = USBD_IOERROR; 2449 goto ret; 2450 } 2451 if (len != 4) { 2452 err = USBD_IOERROR; 2453 goto ret; 2454 } 2455 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2456 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2457 v)); 2458 USETW(ps.wPortStatus, v); 2459 USETW(ps.wPortChange, v >> 16); 2460 l = min(len, sizeof ps); 2461 memcpy(buf, &ps, l); 2462 totlen = l; 2463 break; 2464 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2465 err = USBD_IOERROR; 2466 goto ret; 2467 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2468 break; 2469 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2470 if (index < 1 || index > sc->sc_noport) { 2471 err = USBD_IOERROR; 2472 goto ret; 2473 } 2474 port = OHCI_RH_PORT_STATUS(index); 2475 switch(value) { 2476 case UHF_PORT_ENABLE: 2477 OWRITE4(sc, port, UPS_PORT_ENABLED); 2478 break; 2479 case UHF_PORT_SUSPEND: 2480 OWRITE4(sc, port, UPS_SUSPEND); 2481 break; 2482 case UHF_PORT_RESET: 2483 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2484 index)); 2485 OWRITE4(sc, port, UPS_RESET); 2486 for (i = 0; i < 10; i++) { 2487 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2488 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2489 break; 2490 } 2491 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2492 index, OREAD4(sc, port))); 2493 break; 2494 case UHF_PORT_POWER: 2495 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2496 "%d\n", index)); 2497 OWRITE4(sc, port, UPS_PORT_POWER); 2498 break; 2499 default: 2500 err = USBD_IOERROR; 2501 goto ret; 2502 } 2503 break; 2504 default: 2505 err = USBD_IOERROR; 2506 goto ret; 2507 } 2508 xfer->actlen = totlen; 2509 err = USBD_NORMAL_COMPLETION; 2510 ret: 2511 xfer->status = err; 2512 s = splusb(); 2513 usb_transfer_complete(xfer); 2514 splx(s); 2515 return (USBD_IN_PROGRESS); 2516 } 2517 2518 /* Abort a root control request. */ 2519 Static void 2520 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2521 { 2522 /* Nothing to do, all transfers are synchronous. */ 2523 } 2524 2525 /* Close the root pipe. */ 2526 Static void 2527 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2528 { 2529 DPRINTF(("ohci_root_ctrl_close\n")); 2530 /* Nothing to do. */ 2531 } 2532 2533 Static usbd_status 2534 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2535 { 2536 usbd_status err; 2537 2538 /* Insert last in queue. */ 2539 err = usb_insert_transfer(xfer); 2540 if (err) 2541 return (err); 2542 2543 /* Pipe isn't running, start first */ 2544 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2545 } 2546 2547 Static usbd_status 2548 ohci_root_intr_start(usbd_xfer_handle xfer) 2549 { 2550 usbd_pipe_handle pipe = xfer->pipe; 2551 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2552 2553 if (sc->sc_dying) 2554 return (USBD_IOERROR); 2555 2556 sc->sc_intrxfer = xfer; 2557 2558 return (USBD_IN_PROGRESS); 2559 } 2560 2561 /* Abort a root interrupt request. */ 2562 Static void 2563 ohci_root_intr_abort(usbd_xfer_handle xfer) 2564 { 2565 int s; 2566 2567 if (xfer->pipe->intrxfer == xfer) { 2568 DPRINTF(("ohci_root_intr_abort: remove\n")); 2569 xfer->pipe->intrxfer = NULL; 2570 } 2571 xfer->status = USBD_CANCELLED; 2572 s = splusb(); 2573 usb_transfer_complete(xfer); 2574 splx(s); 2575 } 2576 2577 /* Close the root pipe. */ 2578 Static void 2579 ohci_root_intr_close(usbd_pipe_handle pipe) 2580 { 2581 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2582 2583 DPRINTF(("ohci_root_intr_close\n")); 2584 2585 sc->sc_intrxfer = NULL; 2586 } 2587 2588 /************************/ 2589 2590 Static usbd_status 2591 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2592 { 2593 usbd_status err; 2594 2595 /* Insert last in queue. */ 2596 err = usb_insert_transfer(xfer); 2597 if (err) 2598 return (err); 2599 2600 /* Pipe isn't running, start first */ 2601 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2602 } 2603 2604 Static usbd_status 2605 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2606 { 2607 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2608 usbd_status err; 2609 2610 if (sc->sc_dying) 2611 return (USBD_IOERROR); 2612 2613 #ifdef DIAGNOSTIC 2614 if (!(xfer->rqflags & URQ_REQUEST)) { 2615 /* XXX panic */ 2616 printf("ohci_device_ctrl_transfer: not a request\n"); 2617 return (USBD_INVAL); 2618 } 2619 #endif 2620 2621 err = ohci_device_request(xfer); 2622 if (err) 2623 return (err); 2624 2625 if (sc->sc_bus.use_polling) 2626 ohci_waitintr(sc, xfer); 2627 return (USBD_IN_PROGRESS); 2628 } 2629 2630 /* Abort a device control request. */ 2631 Static void 2632 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2633 { 2634 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2635 ohci_abort_xfer(xfer, USBD_CANCELLED); 2636 } 2637 2638 /* Close a device control pipe. */ 2639 Static void 2640 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2641 { 2642 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2643 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2644 2645 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2646 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2647 ohci_free_std(sc, opipe->tail.td); 2648 } 2649 2650 /************************/ 2651 2652 Static void 2653 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2654 { 2655 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2656 2657 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2658 } 2659 2660 Static void 2661 ohci_noop(usbd_pipe_handle pipe) 2662 { 2663 } 2664 2665 Static usbd_status 2666 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2667 { 2668 usbd_status err; 2669 2670 /* Insert last in queue. */ 2671 err = usb_insert_transfer(xfer); 2672 if (err) 2673 return (err); 2674 2675 /* Pipe isn't running, start first */ 2676 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2677 } 2678 2679 Static usbd_status 2680 ohci_device_bulk_start(usbd_xfer_handle xfer) 2681 { 2682 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2683 usbd_device_handle dev = opipe->pipe.device; 2684 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2685 int addr = dev->address; 2686 ohci_soft_td_t *data, *tail, *tdp; 2687 ohci_soft_ed_t *sed; 2688 int s, len, isread, endpt; 2689 usbd_status err; 2690 2691 if (sc->sc_dying) 2692 return (USBD_IOERROR); 2693 2694 #ifdef DIAGNOSTIC 2695 if (xfer->rqflags & URQ_REQUEST) { 2696 /* XXX panic */ 2697 printf("ohci_device_bulk_start: a request\n"); 2698 return (USBD_INVAL); 2699 } 2700 #endif 2701 2702 len = xfer->length; 2703 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2704 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2705 sed = opipe->sed; 2706 2707 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2708 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2709 endpt)); 2710 2711 opipe->u.bulk.isread = isread; 2712 opipe->u.bulk.length = len; 2713 2714 /* Update device address */ 2715 sed->ed.ed_flags = htole32( 2716 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2717 OHCI_ED_SET_FA(addr)); 2718 2719 /* Allocate a chain of new TDs (including a new tail). */ 2720 data = opipe->tail.td; 2721 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2722 data, &tail); 2723 /* We want interrupt at the end of the transfer. */ 2724 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2725 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2726 tail->flags |= OHCI_CALL_DONE; 2727 tail = tail->nexttd; /* point at sentinel */ 2728 if (err) 2729 return (err); 2730 2731 tail->xfer = NULL; 2732 xfer->hcpriv = data; 2733 2734 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2735 "td_cbp=0x%08x td_be=0x%08x\n", 2736 (int)le32toh(sed->ed.ed_flags), 2737 (int)le32toh(data->td.td_flags), 2738 (int)le32toh(data->td.td_cbp), 2739 (int)le32toh(data->td.td_be))); 2740 2741 #ifdef OHCI_DEBUG 2742 if (ohcidebug > 5) { 2743 ohci_dump_ed(sed); 2744 ohci_dump_tds(data); 2745 } 2746 #endif 2747 2748 /* Insert ED in schedule */ 2749 s = splusb(); 2750 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2751 tdp->xfer = xfer; 2752 } 2753 sed->ed.ed_tailp = htole32(tail->physaddr); 2754 opipe->tail.td = tail; 2755 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2756 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2757 if (xfer->timeout && !sc->sc_bus.use_polling) { 2758 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2759 ohci_timeout, xfer); 2760 } 2761 2762 #if 0 2763 /* This goes wrong if we are too slow. */ 2764 if (ohcidebug > 10) { 2765 delay(10000); 2766 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2767 OREAD4(sc, OHCI_COMMAND_STATUS))); 2768 ohci_dump_ed(sed); 2769 ohci_dump_tds(data); 2770 } 2771 #endif 2772 2773 splx(s); 2774 2775 return (USBD_IN_PROGRESS); 2776 } 2777 2778 Static void 2779 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2780 { 2781 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2782 ohci_abort_xfer(xfer, USBD_CANCELLED); 2783 } 2784 2785 /* 2786 * Close a device bulk pipe. 2787 */ 2788 Static void 2789 ohci_device_bulk_close(usbd_pipe_handle pipe) 2790 { 2791 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2792 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2793 2794 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2795 ohci_close_pipe(pipe, sc->sc_bulk_head); 2796 ohci_free_std(sc, opipe->tail.td); 2797 } 2798 2799 /************************/ 2800 2801 Static usbd_status 2802 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2803 { 2804 usbd_status err; 2805 2806 /* Insert last in queue. */ 2807 err = usb_insert_transfer(xfer); 2808 if (err) 2809 return (err); 2810 2811 /* Pipe isn't running, start first */ 2812 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2813 } 2814 2815 Static usbd_status 2816 ohci_device_intr_start(usbd_xfer_handle xfer) 2817 { 2818 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2819 usbd_device_handle dev = opipe->pipe.device; 2820 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2821 ohci_soft_ed_t *sed = opipe->sed; 2822 ohci_soft_td_t *data, *tail; 2823 int len; 2824 int s; 2825 2826 if (sc->sc_dying) 2827 return (USBD_IOERROR); 2828 2829 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2830 "flags=%d priv=%p\n", 2831 xfer, xfer->length, xfer->flags, xfer->priv)); 2832 2833 #ifdef DIAGNOSTIC 2834 if (xfer->rqflags & URQ_REQUEST) 2835 panic("ohci_device_intr_transfer: a request\n"); 2836 #endif 2837 2838 len = xfer->length; 2839 2840 data = opipe->tail.td; 2841 tail = ohci_alloc_std(sc); 2842 if (tail == NULL) 2843 return (USBD_NOMEM); 2844 tail->xfer = NULL; 2845 2846 data->td.td_flags = htole32( 2847 OHCI_TD_IN | OHCI_TD_NOCC | 2848 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2849 if (xfer->flags & USBD_SHORT_XFER_OK) 2850 data->td.td_flags |= htole32(OHCI_TD_R); 2851 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2852 data->nexttd = tail; 2853 data->td.td_nexttd = htole32(tail->physaddr); 2854 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2855 data->len = len; 2856 data->xfer = xfer; 2857 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2858 xfer->hcpriv = data; 2859 2860 #ifdef OHCI_DEBUG 2861 if (ohcidebug > 5) { 2862 DPRINTF(("ohci_device_intr_transfer:\n")); 2863 ohci_dump_ed(sed); 2864 ohci_dump_tds(data); 2865 } 2866 #endif 2867 2868 /* Insert ED in schedule */ 2869 s = splusb(); 2870 sed->ed.ed_tailp = htole32(tail->physaddr); 2871 opipe->tail.td = tail; 2872 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2873 2874 #if 0 2875 /* 2876 * This goes horribly wrong, printing thousands of descriptors, 2877 * because false references are followed due to the fact that the 2878 * TD is gone. 2879 */ 2880 if (ohcidebug > 5) { 2881 usb_delay_ms(&sc->sc_bus, 5); 2882 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2883 OREAD4(sc, OHCI_COMMAND_STATUS))); 2884 ohci_dump_ed(sed); 2885 ohci_dump_tds(data); 2886 } 2887 #endif 2888 splx(s); 2889 2890 return (USBD_IN_PROGRESS); 2891 } 2892 2893 /* Abort a device control request. */ 2894 Static void 2895 ohci_device_intr_abort(usbd_xfer_handle xfer) 2896 { 2897 if (xfer->pipe->intrxfer == xfer) { 2898 DPRINTF(("ohci_device_intr_abort: remove\n")); 2899 xfer->pipe->intrxfer = NULL; 2900 } 2901 ohci_abort_xfer(xfer, USBD_CANCELLED); 2902 } 2903 2904 /* Close a device interrupt pipe. */ 2905 Static void 2906 ohci_device_intr_close(usbd_pipe_handle pipe) 2907 { 2908 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2909 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2910 int nslots = opipe->u.intr.nslots; 2911 int pos = opipe->u.intr.pos; 2912 int j; 2913 ohci_soft_ed_t *p, *sed = opipe->sed; 2914 int s; 2915 2916 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2917 pipe, nslots, pos)); 2918 s = splusb(); 2919 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2920 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2921 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2922 usb_delay_ms(&sc->sc_bus, 2); 2923 2924 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2925 ; 2926 #ifdef DIAGNOSTIC 2927 if (p == NULL) 2928 panic("ohci_device_intr_close: ED not found\n"); 2929 #endif 2930 p->next = sed->next; 2931 p->ed.ed_nexted = sed->ed.ed_nexted; 2932 splx(s); 2933 2934 for (j = 0; j < nslots; j++) 2935 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2936 2937 ohci_free_std(sc, opipe->tail.td); 2938 ohci_free_sed(sc, opipe->sed); 2939 } 2940 2941 Static usbd_status 2942 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2943 { 2944 int i, j, s, best; 2945 u_int npoll, slow, shigh, nslots; 2946 u_int bestbw, bw; 2947 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2948 2949 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2950 if (ival == 0) { 2951 printf("ohci_setintr: 0 interval\n"); 2952 return (USBD_INVAL); 2953 } 2954 2955 npoll = OHCI_NO_INTRS; 2956 while (npoll > ival) 2957 npoll /= 2; 2958 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2959 2960 /* 2961 * We now know which level in the tree the ED must go into. 2962 * Figure out which slot has most bandwidth left over. 2963 * Slots to examine: 2964 * npoll 2965 * 1 0 2966 * 2 1 2 2967 * 4 3 4 5 6 2968 * 8 7 8 9 10 11 12 13 14 2969 * N (N-1) .. (N-1+N-1) 2970 */ 2971 slow = npoll-1; 2972 shigh = slow + npoll; 2973 nslots = OHCI_NO_INTRS / npoll; 2974 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2975 bw = 0; 2976 for (j = 0; j < nslots; j++) 2977 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2978 if (bw < bestbw) { 2979 best = i; 2980 bestbw = bw; 2981 } 2982 } 2983 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 2984 best, slow, shigh, bestbw)); 2985 2986 s = splusb(); 2987 hsed = sc->sc_eds[best]; 2988 sed->next = hsed->next; 2989 sed->ed.ed_nexted = hsed->ed.ed_nexted; 2990 hsed->next = sed; 2991 hsed->ed.ed_nexted = htole32(sed->physaddr); 2992 splx(s); 2993 2994 for (j = 0; j < nslots; j++) 2995 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 2996 opipe->u.intr.nslots = nslots; 2997 opipe->u.intr.pos = best; 2998 2999 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3000 return (USBD_NORMAL_COMPLETION); 3001 } 3002 3003 /***********************/ 3004 3005 usbd_status 3006 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3007 { 3008 usbd_status err; 3009 3010 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3011 3012 /* Put it on our queue, */ 3013 err = usb_insert_transfer(xfer); 3014 3015 /* bail out on error, */ 3016 if (err && err != USBD_IN_PROGRESS) 3017 return (err); 3018 3019 /* XXX should check inuse here */ 3020 3021 /* insert into schedule, */ 3022 ohci_device_isoc_enter(xfer); 3023 3024 /* and start if the pipe wasn't running */ 3025 if (!err) 3026 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3027 3028 return (err); 3029 } 3030 3031 void 3032 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3033 { 3034 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3035 usbd_device_handle dev = opipe->pipe.device; 3036 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3037 ohci_soft_ed_t *sed = opipe->sed; 3038 struct iso *iso = &opipe->u.iso; 3039 ohci_soft_itd_t *sitd, *nsitd; 3040 ohci_physaddr_t buf, offs, noffs, bp0; 3041 int i, ncur, nframes; 3042 int s; 3043 3044 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3045 "nframes=%d\n", 3046 iso->inuse, iso->next, xfer, xfer->nframes)); 3047 3048 if (sc->sc_dying) 3049 return; 3050 3051 if (iso->next == -1) { 3052 /* Not in use yet, schedule it a few frames ahead. */ 3053 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3054 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3055 iso->next)); 3056 } 3057 3058 sitd = opipe->tail.itd; 3059 buf = DMAADDR(&xfer->dmabuf); 3060 bp0 = OHCI_PAGE(buf); 3061 offs = OHCI_PAGE_OFFSET(buf); 3062 nframes = xfer->nframes; 3063 xfer->hcpriv = sitd; 3064 for (i = ncur = 0; i < nframes; i++, ncur++) { 3065 noffs = offs + xfer->frlengths[i]; 3066 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3067 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3068 3069 /* Allocate next ITD */ 3070 nsitd = ohci_alloc_sitd(sc); 3071 if (nsitd == NULL) { 3072 /* XXX what now? */ 3073 printf("%s: isoc TD alloc failed\n", 3074 USBDEVNAME(sc->sc_bus.bdev)); 3075 return; 3076 } 3077 3078 /* Fill current ITD */ 3079 sitd->itd.itd_flags = htole32( 3080 OHCI_ITD_NOCC | 3081 OHCI_ITD_SET_SF(iso->next) | 3082 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3083 OHCI_ITD_SET_FC(ncur)); 3084 sitd->itd.itd_bp0 = htole32(bp0); 3085 sitd->nextitd = nsitd; 3086 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3087 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3088 sitd->xfer = xfer; 3089 sitd->flags = 0; 3090 3091 sitd = nsitd; 3092 iso->next = iso->next + ncur; 3093 bp0 = OHCI_PAGE(buf + offs); 3094 ncur = 0; 3095 } 3096 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3097 offs = noffs; 3098 } 3099 nsitd = ohci_alloc_sitd(sc); 3100 if (nsitd == NULL) { 3101 /* XXX what now? */ 3102 printf("%s: isoc TD alloc failed\n", 3103 USBDEVNAME(sc->sc_bus.bdev)); 3104 return; 3105 } 3106 /* Fixup last used ITD */ 3107 sitd->itd.itd_flags = htole32( 3108 OHCI_ITD_NOCC | 3109 OHCI_ITD_SET_SF(iso->next) | 3110 OHCI_ITD_SET_DI(0) | 3111 OHCI_ITD_SET_FC(ncur)); 3112 sitd->itd.itd_bp0 = htole32(bp0); 3113 sitd->nextitd = nsitd; 3114 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3115 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3116 sitd->xfer = xfer; 3117 sitd->flags = OHCI_CALL_DONE; 3118 3119 iso->next = iso->next + ncur; 3120 iso->inuse += nframes; 3121 3122 xfer->actlen = offs; /* XXX pretend we did it all */ 3123 3124 xfer->status = USBD_IN_PROGRESS; 3125 3126 #ifdef OHCI_DEBUG 3127 if (ohcidebug > 5) { 3128 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3129 le32toh(sc->sc_hcca->hcca_frame_number))); 3130 ohci_dump_itds(xfer->hcpriv); 3131 ohci_dump_ed(sed); 3132 } 3133 #endif 3134 3135 s = splusb(); 3136 opipe->tail.itd = nsitd; 3137 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3138 splx(s); 3139 3140 #ifdef OHCI_DEBUG 3141 if (ohcidebug > 5) { 3142 delay(150000); 3143 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3144 le32toh(sc->sc_hcca->hcca_frame_number))); 3145 ohci_dump_itds(xfer->hcpriv); 3146 ohci_dump_ed(sed); 3147 } 3148 #endif 3149 } 3150 3151 usbd_status 3152 ohci_device_isoc_start(usbd_xfer_handle xfer) 3153 { 3154 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3155 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3156 3157 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3158 3159 if (sc->sc_dying) 3160 return (USBD_IOERROR); 3161 3162 #ifdef DIAGNOSTIC 3163 if (xfer->status != USBD_IN_PROGRESS) 3164 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3165 #endif 3166 3167 /* XXX anything to do? */ 3168 3169 return (USBD_IN_PROGRESS); 3170 } 3171 3172 void 3173 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3174 { 3175 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3176 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3177 ohci_soft_ed_t *sed; 3178 ohci_soft_itd_t *sitd; 3179 int s; 3180 3181 s = splusb(); 3182 3183 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3184 3185 /* Transfer is already done. */ 3186 if (xfer->status != USBD_NOT_STARTED && 3187 xfer->status != USBD_IN_PROGRESS) { 3188 splx(s); 3189 printf("ohci_device_isoc_abort: early return\n"); 3190 return; 3191 } 3192 3193 /* Give xfer the requested abort code. */ 3194 xfer->status = USBD_CANCELLED; 3195 3196 sed = opipe->sed; 3197 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3198 3199 sitd = xfer->hcpriv; 3200 #ifdef DIAGNOSTIC 3201 if (sitd == NULL) { 3202 splx(s); 3203 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3204 return; 3205 } 3206 #endif 3207 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3208 #ifdef DIAGNOSTIC 3209 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3210 sitd->isdone = 1; 3211 #endif 3212 } 3213 3214 splx(s); 3215 3216 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3217 3218 s = splusb(); 3219 3220 /* Run callback. */ 3221 usb_transfer_complete(xfer); 3222 3223 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3224 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3225 3226 splx(s); 3227 } 3228 3229 void 3230 ohci_device_isoc_done(usbd_xfer_handle xfer) 3231 { 3232 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3233 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3234 ohci_soft_itd_t *sitd, *nsitd; 3235 3236 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3237 3238 for (sitd = xfer->hcpriv; 3239 !(sitd->flags & OHCI_CALL_DONE); 3240 sitd = nsitd) { 3241 nsitd = sitd->nextitd; 3242 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3243 ohci_free_sitd(sc, sitd); 3244 } 3245 ohci_free_sitd(sc, sitd); 3246 xfer->hcpriv = NULL; 3247 } 3248 3249 usbd_status 3250 ohci_setup_isoc(usbd_pipe_handle pipe) 3251 { 3252 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3253 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3254 struct iso *iso = &opipe->u.iso; 3255 int s; 3256 3257 iso->next = -1; 3258 iso->inuse = 0; 3259 3260 s = splusb(); 3261 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3262 splx(s); 3263 3264 return (USBD_NORMAL_COMPLETION); 3265 } 3266 3267 void 3268 ohci_device_isoc_close(usbd_pipe_handle pipe) 3269 { 3270 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3271 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3272 int s; 3273 3274 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3275 3276 s = splusb(); 3277 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3278 splx(s); 3279 ohci_close_pipe(pipe, sc->sc_isoc_head); 3280 #ifdef DIAGNOSTIC 3281 opipe->tail.itd->isdone = 1; 3282 #endif 3283 ohci_free_sitd(sc, opipe->tail.itd); 3284 } 3285
Indexes created Wed Sep 24 05:09:52 GMT 2025