ohci.c revision 1.106
1 /* $NetBSD: ohci.c,v 1.106 2001/11/09 15:01:57 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/malloc.h> 51 #if defined(__NetBSD__) || defined(__OpenBSD__) 52 #include <sys/kernel.h> 53 #include <sys/device.h> 54 #include <sys/select.h> 55 #elif defined(__FreeBSD__) 56 #include <sys/module.h> 57 #include <sys/bus.h> 58 #include <machine/bus_pio.h> 59 #include <machine/bus_memio.h> 60 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 61 #include <machine/cpu.h> 62 #endif 63 #endif 64 #include <sys/proc.h> 65 #include <sys/queue.h> 66 67 #include <machine/bus.h> 68 #include <machine/endian.h> 69 70 #include <dev/usb/usb.h> 71 #include <dev/usb/usbdi.h> 72 #include <dev/usb/usbdivar.h> 73 #include <dev/usb/usb_mem.h> 74 #include <dev/usb/usb_quirks.h> 75 76 #include <dev/usb/ohcireg.h> 77 #include <dev/usb/ohcivar.h> 78 79 #if defined(__FreeBSD__) 80 #include <machine/clock.h> 81 82 #define delay(d) DELAY(d) 83 #endif 84 85 #if defined(__OpenBSD__) 86 struct cfdriver ohci_cd = { 87 NULL, "ohci", DV_DULL 88 }; 89 #endif 90 91 #ifdef OHCI_DEBUG 92 #define DPRINTF(x) if (ohcidebug) logprintf x 93 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 94 int ohcidebug = 0; 95 #ifndef __NetBSD__ 96 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 97 #endif 98 #else 99 #define DPRINTF(x) 100 #define DPRINTFN(n,x) 101 #endif 102 103 /* 104 * The OHCI controller is little endian, so on big endian machines 105 * the data strored in memory needs to be swapped. 106 */ 107 #if defined(__FreeBSD__) || defined(__OpenBSD__) 108 #if BYTE_ORDER == BIG_ENDIAN 109 #define htole32(x) (bswap32(x)) 110 #define le32toh(x) (bswap32(x)) 111 #else 112 #define htole32(x) (x) 113 #define le32toh(x) (x) 114 #endif 115 #endif 116 117 struct ohci_pipe; 118 119 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 120 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 121 122 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 123 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 124 125 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 126 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 127 128 #if 0 129 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 130 ohci_soft_td_t *); 131 #endif 132 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 133 ohci_softc_t *, int, int, usbd_xfer_handle, 134 ohci_soft_td_t *, ohci_soft_td_t **); 135 136 Static void ohci_shutdown(void *v); 137 Static void ohci_power(int, void *); 138 Static usbd_status ohci_open(usbd_pipe_handle); 139 Static void ohci_poll(struct usbd_bus *); 140 Static void ohci_softintr(void *); 141 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 142 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 143 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 144 145 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 146 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 147 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 148 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 149 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 150 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 151 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 152 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 153 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 154 155 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 156 Static void ohci_device_isoc_enter(usbd_xfer_handle); 157 158 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 159 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 160 161 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 162 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 163 164 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 165 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 166 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 167 Static void ohci_root_ctrl_close(usbd_pipe_handle); 168 Static void ohci_root_ctrl_done(usbd_xfer_handle); 169 170 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 171 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 172 Static void ohci_root_intr_abort(usbd_xfer_handle); 173 Static void ohci_root_intr_close(usbd_pipe_handle); 174 Static void ohci_root_intr_done(usbd_xfer_handle); 175 176 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 177 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 178 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 179 Static void ohci_device_ctrl_close(usbd_pipe_handle); 180 Static void ohci_device_ctrl_done(usbd_xfer_handle); 181 182 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 183 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 184 Static void ohci_device_bulk_abort(usbd_xfer_handle); 185 Static void ohci_device_bulk_close(usbd_pipe_handle); 186 Static void ohci_device_bulk_done(usbd_xfer_handle); 187 188 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 189 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 190 Static void ohci_device_intr_abort(usbd_xfer_handle); 191 Static void ohci_device_intr_close(usbd_pipe_handle); 192 Static void ohci_device_intr_done(usbd_xfer_handle); 193 194 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 195 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 196 Static void ohci_device_isoc_abort(usbd_xfer_handle); 197 Static void ohci_device_isoc_close(usbd_pipe_handle); 198 Static void ohci_device_isoc_done(usbd_xfer_handle); 199 200 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 201 struct ohci_pipe *pipe, int ival); 202 203 Static int ohci_str(usb_string_descriptor_t *, int, char *); 204 205 Static void ohci_timeout(void *); 206 Static void ohci_rhsc_able(ohci_softc_t *, int); 207 Static void ohci_rhsc_enable(void *); 208 209 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 210 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 211 212 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 213 Static void ohci_noop(usbd_pipe_handle pipe); 214 215 #ifdef OHCI_DEBUG 216 Static void ohci_dumpregs(ohci_softc_t *); 217 Static void ohci_dump_tds(ohci_soft_td_t *); 218 Static void ohci_dump_td(ohci_soft_td_t *); 219 Static void ohci_dump_ed(ohci_soft_ed_t *); 220 Static void ohci_dump_itd(ohci_soft_itd_t *); 221 Static void ohci_dump_itds(ohci_soft_itd_t *); 222 #endif 223 224 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 225 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 226 #define OWRITE1(sc, r, x) \ 227 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 228 #define OWRITE2(sc, r, x) \ 229 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 230 #define OWRITE4(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 233 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 234 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 235 236 /* Reverse the bits in a value 0 .. 31 */ 237 Static u_int8_t revbits[OHCI_NO_INTRS] = 238 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 239 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 240 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 241 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 242 243 struct ohci_pipe { 244 struct usbd_pipe pipe; 245 ohci_soft_ed_t *sed; 246 union { 247 ohci_soft_td_t *td; 248 ohci_soft_itd_t *itd; 249 } tail; 250 /* Info needed for different pipe kinds. */ 251 union { 252 /* Control pipe */ 253 struct { 254 usb_dma_t reqdma; 255 u_int length; 256 ohci_soft_td_t *setup, *data, *stat; 257 } ctl; 258 /* Interrupt pipe */ 259 struct { 260 int nslots; 261 int pos; 262 } intr; 263 /* Bulk pipe */ 264 struct { 265 u_int length; 266 int isread; 267 } bulk; 268 /* Iso pipe */ 269 struct iso { 270 int next, inuse; 271 } iso; 272 } u; 273 }; 274 275 #define OHCI_INTR_ENDPT 1 276 277 Static struct usbd_bus_methods ohci_bus_methods = { 278 ohci_open, 279 ohci_softintr, 280 ohci_poll, 281 ohci_allocm, 282 ohci_freem, 283 ohci_allocx, 284 ohci_freex, 285 }; 286 287 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 288 ohci_root_ctrl_transfer, 289 ohci_root_ctrl_start, 290 ohci_root_ctrl_abort, 291 ohci_root_ctrl_close, 292 ohci_noop, 293 ohci_root_ctrl_done, 294 }; 295 296 Static struct usbd_pipe_methods ohci_root_intr_methods = { 297 ohci_root_intr_transfer, 298 ohci_root_intr_start, 299 ohci_root_intr_abort, 300 ohci_root_intr_close, 301 ohci_noop, 302 ohci_root_intr_done, 303 }; 304 305 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 306 ohci_device_ctrl_transfer, 307 ohci_device_ctrl_start, 308 ohci_device_ctrl_abort, 309 ohci_device_ctrl_close, 310 ohci_noop, 311 ohci_device_ctrl_done, 312 }; 313 314 Static struct usbd_pipe_methods ohci_device_intr_methods = { 315 ohci_device_intr_transfer, 316 ohci_device_intr_start, 317 ohci_device_intr_abort, 318 ohci_device_intr_close, 319 ohci_device_clear_toggle, 320 ohci_device_intr_done, 321 }; 322 323 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 324 ohci_device_bulk_transfer, 325 ohci_device_bulk_start, 326 ohci_device_bulk_abort, 327 ohci_device_bulk_close, 328 ohci_device_clear_toggle, 329 ohci_device_bulk_done, 330 }; 331 332 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 333 ohci_device_isoc_transfer, 334 ohci_device_isoc_start, 335 ohci_device_isoc_abort, 336 ohci_device_isoc_close, 337 ohci_noop, 338 ohci_device_isoc_done, 339 }; 340 341 #if defined(__NetBSD__) || defined(__OpenBSD__) 342 int 343 ohci_activate(device_ptr_t self, enum devact act) 344 { 345 struct ohci_softc *sc = (struct ohci_softc *)self; 346 int rv = 0; 347 348 switch (act) { 349 case DVACT_ACTIVATE: 350 return (EOPNOTSUPP); 351 break; 352 353 case DVACT_DEACTIVATE: 354 if (sc->sc_child != NULL) 355 rv = config_deactivate(sc->sc_child); 356 sc->sc_dying = 1; 357 break; 358 } 359 return (rv); 360 } 361 362 int 363 ohci_detach(struct ohci_softc *sc, int flags) 364 { 365 int rv = 0; 366 367 if (sc->sc_child != NULL) 368 rv = config_detach(sc->sc_child, flags); 369 370 if (rv != 0) 371 return (rv); 372 373 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 374 375 #if defined(__NetBSD__) || defined(__OpenBSD__) 376 powerhook_disestablish(sc->sc_powerhook); 377 shutdownhook_disestablish(sc->sc_shutdownhook); 378 #endif 379 380 /* free data structures XXX */ 381 382 return (rv); 383 } 384 #endif 385 386 ohci_soft_ed_t * 387 ohci_alloc_sed(ohci_softc_t *sc) 388 { 389 ohci_soft_ed_t *sed; 390 usbd_status err; 391 int i, offs; 392 usb_dma_t dma; 393 394 if (sc->sc_freeeds == NULL) { 395 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 396 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 397 OHCI_ED_ALIGN, &dma); 398 if (err) 399 return (0); 400 for(i = 0; i < OHCI_SED_CHUNK; i++) { 401 offs = i * OHCI_SED_SIZE; 402 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 403 sed->physaddr = DMAADDR(&dma) + offs; 404 sed->next = sc->sc_freeeds; 405 sc->sc_freeeds = sed; 406 } 407 } 408 sed = sc->sc_freeeds; 409 sc->sc_freeeds = sed->next; 410 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 411 sed->next = 0; 412 return (sed); 413 } 414 415 void 416 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 417 { 418 sed->next = sc->sc_freeeds; 419 sc->sc_freeeds = sed; 420 } 421 422 ohci_soft_td_t * 423 ohci_alloc_std(ohci_softc_t *sc) 424 { 425 ohci_soft_td_t *std; 426 usbd_status err; 427 int i, offs; 428 usb_dma_t dma; 429 int s; 430 431 if (sc->sc_freetds == NULL) { 432 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 433 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 434 OHCI_TD_ALIGN, &dma); 435 if (err) 436 return (NULL); 437 s = splusb(); 438 for(i = 0; i < OHCI_STD_CHUNK; i++) { 439 offs = i * OHCI_STD_SIZE; 440 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 441 std->physaddr = DMAADDR(&dma) + offs; 442 std->nexttd = sc->sc_freetds; 443 sc->sc_freetds = std; 444 } 445 splx(s); 446 } 447 448 s = splusb(); 449 std = sc->sc_freetds; 450 sc->sc_freetds = std->nexttd; 451 memset(&std->td, 0, sizeof(ohci_td_t)); 452 std->nexttd = NULL; 453 std->xfer = NULL; 454 ohci_hash_add_td(sc, std); 455 splx(s); 456 457 return (std); 458 } 459 460 void 461 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 462 { 463 int s; 464 465 s = splusb(); 466 ohci_hash_rem_td(sc, std); 467 std->nexttd = sc->sc_freetds; 468 sc->sc_freetds = std; 469 splx(s); 470 } 471 472 usbd_status 473 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 474 int alen, int rd, usbd_xfer_handle xfer, 475 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 476 { 477 ohci_soft_td_t *next, *cur; 478 ohci_physaddr_t dataphys, dataphysend; 479 u_int32_t tdflags; 480 int len, curlen; 481 usb_dma_t *dma = &xfer->dmabuf; 482 u_int16_t flags = xfer->flags; 483 484 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 485 486 len = alen; 487 cur = sp; 488 dataphys = DMAADDR(dma); 489 dataphysend = OHCI_PAGE(dataphys + len - 1); 490 tdflags = htole32( 491 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 492 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 493 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 494 495 for (;;) { 496 next = ohci_alloc_std(sc); 497 if (next == NULL) 498 goto nomem; 499 500 /* The OHCI hardware can handle at most one page crossing. */ 501 if (OHCI_PAGE(dataphys) == dataphysend || 502 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 503 /* we can handle it in this TD */ 504 curlen = len; 505 } else { 506 /* must use multiple TDs, fill as much as possible. */ 507 curlen = 2 * OHCI_PAGE_SIZE - 508 (dataphys & (OHCI_PAGE_SIZE-1)); 509 /* the length must be a multiple of the max size */ 510 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 511 #ifdef DIAGNOSTIC 512 if (curlen == 0) 513 panic("ohci_alloc_std: curlen == 0\n"); 514 #endif 515 } 516 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 517 "dataphysend=0x%08x len=%d curlen=%d\n", 518 dataphys, dataphysend, 519 len, curlen)); 520 len -= curlen; 521 522 cur->td.td_flags = tdflags; 523 cur->td.td_cbp = htole32(dataphys); 524 cur->nexttd = next; 525 cur->td.td_nexttd = htole32(next->physaddr); 526 cur->td.td_be = htole32(dataphys + curlen - 1); 527 cur->len = curlen; 528 cur->flags = OHCI_ADD_LEN; 529 cur->xfer = xfer; 530 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 531 dataphys, dataphys + curlen - 1)); 532 if (len == 0) 533 break; 534 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 535 dataphys += curlen; 536 cur = next; 537 } 538 if ((flags & USBD_FORCE_SHORT_XFER) && 539 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 540 /* Force a 0 length transfer at the end. */ 541 542 cur = next; 543 next = ohci_alloc_std(sc); 544 if (next == NULL) 545 goto nomem; 546 547 cur->td.td_flags = tdflags; 548 cur->td.td_cbp = 0; /* indicate 0 length packet */ 549 cur->nexttd = next; 550 cur->td.td_nexttd = htole32(next->physaddr); 551 cur->td.td_be = ~0; 552 cur->len = 0; 553 cur->flags = 0; 554 cur->xfer = xfer; 555 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 556 } 557 *ep = cur; 558 559 return (USBD_NORMAL_COMPLETION); 560 561 nomem: 562 /* XXX free chain */ 563 return (USBD_NOMEM); 564 } 565 566 #if 0 567 Static void 568 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 569 ohci_soft_td_t *stdend) 570 { 571 ohci_soft_td_t *p; 572 573 for (; std != stdend; std = p) { 574 p = std->nexttd; 575 ohci_free_std(sc, std); 576 } 577 } 578 #endif 579 580 ohci_soft_itd_t * 581 ohci_alloc_sitd(ohci_softc_t *sc) 582 { 583 ohci_soft_itd_t *sitd; 584 usbd_status err; 585 int i, s, offs; 586 usb_dma_t dma; 587 588 if (sc->sc_freeitds == NULL) { 589 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 590 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 591 OHCI_ITD_ALIGN, &dma); 592 if (err) 593 return (NULL); 594 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 595 offs = i * OHCI_SITD_SIZE; 596 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 597 sitd->physaddr = DMAADDR(&dma) + offs; 598 sitd->nextitd = sc->sc_freeitds; 599 sc->sc_freeitds = sitd; 600 } 601 } 602 603 s = splusb(); 604 sitd = sc->sc_freeitds; 605 sc->sc_freeitds = sitd->nextitd; 606 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 607 sitd->nextitd = NULL; 608 sitd->xfer = NULL; 609 ohci_hash_add_itd(sc, sitd); 610 splx(s); 611 612 #ifdef DIAGNOSTIC 613 sitd->isdone = 0; 614 #endif 615 616 return (sitd); 617 } 618 619 void 620 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 621 { 622 int s; 623 624 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 625 626 #ifdef DIAGNOSTIC 627 if (!sitd->isdone) { 628 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 629 return; 630 } 631 #endif 632 633 s = splusb(); 634 ohci_hash_rem_itd(sc, sitd); 635 sitd->nextitd = sc->sc_freeitds; 636 sc->sc_freeitds = sitd; 637 splx(s); 638 } 639 640 usbd_status 641 ohci_init(ohci_softc_t *sc) 642 { 643 ohci_soft_ed_t *sed, *psed; 644 usbd_status err; 645 int i; 646 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 647 648 DPRINTF(("ohci_init: start\n")); 649 #if defined(__OpenBSD__) 650 printf(","); 651 #else 652 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 653 #endif 654 rev = OREAD4(sc, OHCI_REVISION); 655 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 656 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 657 658 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 659 printf("%s: unsupported OHCI revision\n", 660 USBDEVNAME(sc->sc_bus.bdev)); 661 sc->sc_bus.usbrev = USBREV_UNKNOWN; 662 return (USBD_INVAL); 663 } 664 sc->sc_bus.usbrev = USBREV_1_0; 665 666 for (i = 0; i < OHCI_HASH_SIZE; i++) 667 LIST_INIT(&sc->sc_hash_tds[i]); 668 for (i = 0; i < OHCI_HASH_SIZE; i++) 669 LIST_INIT(&sc->sc_hash_itds[i]); 670 671 SIMPLEQ_INIT(&sc->sc_free_xfers); 672 673 /* XXX determine alignment by R/W */ 674 /* Allocate the HCCA area. */ 675 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 676 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 677 if (err) 678 return (err); 679 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 680 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 681 682 sc->sc_eintrs = OHCI_NORMAL_INTRS; 683 684 /* Allocate dummy ED that starts the control list. */ 685 sc->sc_ctrl_head = ohci_alloc_sed(sc); 686 if (sc->sc_ctrl_head == NULL) { 687 err = USBD_NOMEM; 688 goto bad1; 689 } 690 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 691 692 /* Allocate dummy ED that starts the bulk list. */ 693 sc->sc_bulk_head = ohci_alloc_sed(sc); 694 if (sc->sc_bulk_head == NULL) { 695 err = USBD_NOMEM; 696 goto bad2; 697 } 698 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 699 700 /* Allocate dummy ED that starts the isochronous list. */ 701 sc->sc_isoc_head = ohci_alloc_sed(sc); 702 if (sc->sc_isoc_head == NULL) { 703 err = USBD_NOMEM; 704 goto bad3; 705 } 706 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 707 708 /* Allocate all the dummy EDs that make up the interrupt tree. */ 709 for (i = 0; i < OHCI_NO_EDS; i++) { 710 sed = ohci_alloc_sed(sc); 711 if (sed == NULL) { 712 while (--i >= 0) 713 ohci_free_sed(sc, sc->sc_eds[i]); 714 err = USBD_NOMEM; 715 goto bad4; 716 } 717 /* All ED fields are set to 0. */ 718 sc->sc_eds[i] = sed; 719 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 720 if (i != 0) 721 psed = sc->sc_eds[(i-1) / 2]; 722 else 723 psed= sc->sc_isoc_head; 724 sed->next = psed; 725 sed->ed.ed_nexted = htole32(psed->physaddr); 726 } 727 /* 728 * Fill HCCA interrupt table. The bit reversal is to get 729 * the tree set up properly to spread the interrupts. 730 */ 731 for (i = 0; i < OHCI_NO_INTRS; i++) 732 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 733 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 734 735 #ifdef OHCI_DEBUG 736 if (ohcidebug > 15) { 737 for (i = 0; i < OHCI_NO_EDS; i++) { 738 printf("ed#%d ", i); 739 ohci_dump_ed(sc->sc_eds[i]); 740 } 741 printf("iso "); 742 ohci_dump_ed(sc->sc_isoc_head); 743 } 744 #endif 745 746 /* Determine in what context we are running. */ 747 ctl = OREAD4(sc, OHCI_CONTROL); 748 if (ctl & OHCI_IR) { 749 /* SMM active, request change */ 750 DPRINTF(("ohci_init: SMM active, request owner change\n")); 751 s = OREAD4(sc, OHCI_COMMAND_STATUS); 752 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 753 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 754 usb_delay_ms(&sc->sc_bus, 1); 755 ctl = OREAD4(sc, OHCI_CONTROL); 756 } 757 if ((ctl & OHCI_IR) == 0) { 758 printf("%s: SMM does not respond, resetting\n", 759 USBDEVNAME(sc->sc_bus.bdev)); 760 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 761 goto reset; 762 } 763 #if 0 764 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 765 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 766 /* BIOS started controller. */ 767 DPRINTF(("ohci_init: BIOS active\n")); 768 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 769 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 770 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 771 } 772 #endif 773 } else { 774 DPRINTF(("ohci_init: cold started\n")); 775 reset: 776 /* Controller was cold started. */ 777 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 778 } 779 780 /* 781 * This reset should not be necessary according to the OHCI spec, but 782 * without it some controllers do not start. 783 */ 784 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 785 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 786 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 787 788 /* We now own the host controller and the bus has been reset. */ 789 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 790 791 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 792 /* Nominal time for a reset is 10 us. */ 793 for (i = 0; i < 10; i++) { 794 delay(10); 795 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 796 if (!hcr) 797 break; 798 } 799 if (hcr) { 800 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 801 err = USBD_IOERROR; 802 goto bad5; 803 } 804 #ifdef OHCI_DEBUG 805 if (ohcidebug > 15) 806 ohci_dumpregs(sc); 807 #endif 808 809 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 810 811 /* Set up HC registers. */ 812 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 813 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 814 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 815 /* disable all interrupts and then switch on all desired interrupts */ 816 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 817 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 818 /* switch on desired functional features */ 819 ctl = OREAD4(sc, OHCI_CONTROL); 820 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 821 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 822 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 823 /* And finally start it! */ 824 OWRITE4(sc, OHCI_CONTROL, ctl); 825 826 /* 827 * The controller is now OPERATIONAL. Set a some final 828 * registers that should be set earlier, but that the 829 * controller ignores when in the SUSPEND state. 830 */ 831 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 832 fm |= OHCI_FSMPS(ival) | ival; 833 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 834 per = OHCI_PERIODIC(ival); /* 90% periodic */ 835 OWRITE4(sc, OHCI_PERIODIC_START, per); 836 837 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 838 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 839 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 840 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 841 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 842 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 843 844 /* 845 * The AMD756 requires a delay before re-reading the register, 846 * otherwise it will occasionally report 0 ports. 847 */ 848 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 849 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 850 851 #ifdef OHCI_DEBUG 852 if (ohcidebug > 5) 853 ohci_dumpregs(sc); 854 #endif 855 856 /* Set up the bus struct. */ 857 sc->sc_bus.methods = &ohci_bus_methods; 858 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 859 860 #if defined(__NetBSD__) || defined(__OpenBSD__) 861 sc->sc_control = sc->sc_intre = 0; 862 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 863 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 864 #endif 865 866 usb_callout_init(sc->sc_tmo_rhsc); 867 868 return (USBD_NORMAL_COMPLETION); 869 870 bad5: 871 for (i = 0; i < OHCI_NO_EDS; i++) 872 ohci_free_sed(sc, sc->sc_eds[i]); 873 bad4: 874 ohci_free_sed(sc, sc->sc_isoc_head); 875 bad3: 876 ohci_free_sed(sc, sc->sc_ctrl_head); 877 bad2: 878 ohci_free_sed(sc, sc->sc_bulk_head); 879 bad1: 880 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 881 return (err); 882 } 883 884 usbd_status 885 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 886 { 887 #if defined(__NetBSD__) || defined(__OpenBSD__) 888 struct ohci_softc *sc = (struct ohci_softc *)bus; 889 #endif 890 891 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 892 } 893 894 void 895 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 896 { 897 #if defined(__NetBSD__) || defined(__OpenBSD__) 898 struct ohci_softc *sc = (struct ohci_softc *)bus; 899 #endif 900 901 usb_freemem(&sc->sc_bus, dma); 902 } 903 904 usbd_xfer_handle 905 ohci_allocx(struct usbd_bus *bus) 906 { 907 struct ohci_softc *sc = (struct ohci_softc *)bus; 908 usbd_xfer_handle xfer; 909 910 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 911 if (xfer != NULL) 912 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 913 else 914 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 915 if (xfer != NULL) 916 memset(xfer, 0, sizeof *xfer); 917 return (xfer); 918 } 919 920 void 921 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 922 { 923 struct ohci_softc *sc = (struct ohci_softc *)bus; 924 925 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 926 } 927 928 /* 929 * Shut down the controller when the system is going down. 930 */ 931 void 932 ohci_shutdown(void *v) 933 { 934 ohci_softc_t *sc = v; 935 936 DPRINTF(("ohci_shutdown: stopping the HC\n")); 937 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 938 } 939 940 /* 941 * Handle suspend/resume. 942 * 943 * We need to switch to polling mode here, because this routine is 944 * called from an intterupt context. This is all right since we 945 * are almost suspended anyway. 946 */ 947 void 948 ohci_power(int why, void *v) 949 { 950 ohci_softc_t *sc = v; 951 u_int32_t ctl; 952 int s; 953 954 #ifdef OHCI_DEBUG 955 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 956 ohci_dumpregs(sc); 957 #endif 958 959 s = splhardusb(); 960 switch (why) { 961 case PWR_SUSPEND: 962 case PWR_STANDBY: 963 sc->sc_bus.use_polling++; 964 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 965 if (sc->sc_control == 0) { 966 /* 967 * Preserve register values, in case that APM BIOS 968 * does not recover them. 969 */ 970 sc->sc_control = ctl; 971 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 972 } 973 ctl |= OHCI_HCFS_SUSPEND; 974 OWRITE4(sc, OHCI_CONTROL, ctl); 975 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 976 sc->sc_bus.use_polling--; 977 break; 978 case PWR_RESUME: 979 sc->sc_bus.use_polling++; 980 /* Some broken BIOSes do not recover these values */ 981 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 982 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 983 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 984 if (sc->sc_intre) 985 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 986 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 987 if (sc->sc_control) 988 ctl = sc->sc_control; 989 else 990 ctl = OREAD4(sc, OHCI_CONTROL); 991 ctl |= OHCI_HCFS_RESUME; 992 OWRITE4(sc, OHCI_CONTROL, ctl); 993 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 994 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 995 OWRITE4(sc, OHCI_CONTROL, ctl); 996 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 997 sc->sc_control = sc->sc_intre = 0; 998 sc->sc_bus.use_polling--; 999 break; 1000 case PWR_SOFTSUSPEND: 1001 case PWR_SOFTSTANDBY: 1002 case PWR_SOFTRESUME: 1003 break; 1004 } 1005 splx(s); 1006 } 1007 1008 #ifdef OHCI_DEBUG 1009 void 1010 ohci_dumpregs(ohci_softc_t *sc) 1011 { 1012 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1013 OREAD4(sc, OHCI_REVISION), 1014 OREAD4(sc, OHCI_CONTROL), 1015 OREAD4(sc, OHCI_COMMAND_STATUS))); 1016 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1017 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1018 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1019 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1020 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1021 OREAD4(sc, OHCI_HCCA), 1022 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1023 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1024 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1025 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1026 OREAD4(sc, OHCI_BULK_HEAD_ED), 1027 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1028 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1029 OREAD4(sc, OHCI_DONE_HEAD), 1030 OREAD4(sc, OHCI_FM_INTERVAL), 1031 OREAD4(sc, OHCI_FM_REMAINING))); 1032 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1033 OREAD4(sc, OHCI_FM_NUMBER), 1034 OREAD4(sc, OHCI_PERIODIC_START), 1035 OREAD4(sc, OHCI_LS_THRESHOLD))); 1036 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1037 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1038 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1039 OREAD4(sc, OHCI_RH_STATUS))); 1040 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1041 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1042 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1043 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1044 le32toh(sc->sc_hcca->hcca_frame_number), 1045 le32toh(sc->sc_hcca->hcca_done_head))); 1046 } 1047 #endif 1048 1049 Static int ohci_intr1(ohci_softc_t *); 1050 1051 int 1052 ohci_intr(void *p) 1053 { 1054 ohci_softc_t *sc = p; 1055 1056 /* If we get an interrupt while polling, then just ignore it. */ 1057 if (sc->sc_bus.use_polling) { 1058 #ifdef DIAGNOSTIC 1059 printf("ohci_intr: ignored interrupt while polling\n"); 1060 #endif 1061 return (0); 1062 } 1063 1064 return (ohci_intr1(sc)); 1065 } 1066 1067 Static int 1068 ohci_intr1(ohci_softc_t *sc) 1069 { 1070 u_int32_t intrs, eintrs; 1071 ohci_physaddr_t done; 1072 1073 DPRINTFN(14,("ohci_intr1: enter\n")); 1074 1075 /* In case the interrupt occurs before initialization has completed. */ 1076 if (sc == NULL || sc->sc_hcca == NULL) { 1077 #ifdef DIAGNOSTIC 1078 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1079 #endif 1080 return (0); 1081 } 1082 1083 intrs = 0; 1084 done = le32toh(sc->sc_hcca->hcca_done_head); 1085 if (done != 0) { 1086 if (done & ~OHCI_DONE_INTRS) 1087 intrs = OHCI_WDH; 1088 if (done & OHCI_DONE_INTRS) 1089 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1090 } else 1091 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1092 1093 if (!intrs) 1094 return (0); 1095 1096 intrs &= ~OHCI_MIE; 1097 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1098 eintrs = intrs & sc->sc_eintrs; 1099 if (!eintrs) 1100 return (0); 1101 1102 sc->sc_bus.intr_context++; 1103 sc->sc_bus.no_intrs++; 1104 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1105 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1106 (u_int)eintrs)); 1107 1108 if (eintrs & OHCI_SO) { 1109 sc->sc_overrun_cnt++; 1110 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1111 printf("%s: %u scheduling overruns\n", 1112 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1113 sc->sc_overrun_cnt = 0; 1114 } 1115 /* XXX do what */ 1116 eintrs &= ~OHCI_SO; 1117 } 1118 if (eintrs & OHCI_WDH) { 1119 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1120 sc->sc_hcca->hcca_done_head = 0; 1121 usb_schedsoftintr(&sc->sc_bus); 1122 eintrs &= ~OHCI_WDH; 1123 } 1124 if (eintrs & OHCI_RD) { 1125 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1126 /* XXX process resume detect */ 1127 } 1128 if (eintrs & OHCI_UE) { 1129 printf("%s: unrecoverable error, controller halted\n", 1130 USBDEVNAME(sc->sc_bus.bdev)); 1131 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1132 /* XXX what else */ 1133 } 1134 if (eintrs & OHCI_RHSC) { 1135 ohci_rhsc(sc, sc->sc_intrxfer); 1136 /* 1137 * Disable RHSC interrupt for now, because it will be 1138 * on until the port has been reset. 1139 */ 1140 ohci_rhsc_able(sc, 0); 1141 /* Do not allow RHSC interrupts > 1 per second */ 1142 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1143 eintrs &= ~OHCI_RHSC; 1144 } 1145 1146 sc->sc_bus.intr_context--; 1147 1148 if (eintrs != 0) { 1149 /* Block unprocessed interrupts. XXX */ 1150 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1151 sc->sc_eintrs &= ~eintrs; 1152 printf("%s: blocking intrs 0x%x\n", 1153 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1154 } 1155 1156 return (1); 1157 } 1158 1159 void 1160 ohci_rhsc_able(ohci_softc_t *sc, int on) 1161 { 1162 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1163 if (on) { 1164 sc->sc_eintrs |= OHCI_RHSC; 1165 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1166 } else { 1167 sc->sc_eintrs &= ~OHCI_RHSC; 1168 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1169 } 1170 } 1171 1172 void 1173 ohci_rhsc_enable(void *v_sc) 1174 { 1175 ohci_softc_t *sc = v_sc; 1176 1177 ohci_rhsc_able(sc, 1); 1178 } 1179 1180 #ifdef OHCI_DEBUG 1181 char *ohci_cc_strs[] = { 1182 "NO_ERROR", 1183 "CRC", 1184 "BIT_STUFFING", 1185 "DATA_TOGGLE_MISMATCH", 1186 "STALL", 1187 "DEVICE_NOT_RESPONDING", 1188 "PID_CHECK_FAILURE", 1189 "UNEXPECTED_PID", 1190 "DATA_OVERRUN", 1191 "DATA_UNDERRUN", 1192 "BUFFER_OVERRUN", 1193 "BUFFER_UNDERRUN", 1194 "reserved", 1195 "reserved", 1196 "NOT_ACCESSED", 1197 "NOT_ACCESSED", 1198 }; 1199 #endif 1200 1201 void 1202 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1203 { 1204 ohci_soft_itd_t *sitd, *sidone, **ip; 1205 ohci_soft_td_t *std, *sdone, **p; 1206 1207 /* Reverse the done list. */ 1208 for (sdone = NULL, sidone = NULL; done != 0; ) { 1209 std = ohci_hash_find_td(sc, done); 1210 if (std != NULL) { 1211 std->dnext = sdone; 1212 done = le32toh(std->td.td_nexttd); 1213 sdone = std; 1214 DPRINTFN(10,("add TD %p\n", std)); 1215 continue; 1216 } 1217 sitd = ohci_hash_find_itd(sc, done); 1218 if (sitd != NULL) { 1219 sitd->dnext = sidone; 1220 done = le32toh(sitd->itd.itd_nextitd); 1221 sidone = sitd; 1222 DPRINTFN(5,("add ITD %p\n", sitd)); 1223 continue; 1224 } 1225 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1226 } 1227 1228 /* sdone & sidone now hold the done lists. */ 1229 /* Put them on the already processed lists. */ 1230 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1231 ; 1232 *p = sdone; 1233 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1234 ; 1235 *ip = sidone; 1236 } 1237 1238 void 1239 ohci_softintr(void *v) 1240 { 1241 ohci_softc_t *sc = v; 1242 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1243 ohci_soft_td_t *std, *sdone, *stdnext; 1244 usbd_xfer_handle xfer; 1245 int len, cc, s; 1246 1247 DPRINTFN(10,("ohci_softintr: enter\n:")); 1248 1249 sc->sc_bus.intr_context++; 1250 1251 s = splhardusb(); 1252 sdone = sc->sc_sdone; 1253 sc->sc_sdone = NULL; 1254 sidone = sc->sc_sidone; 1255 sc->sc_sidone = NULL; 1256 splx(s); 1257 1258 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1259 1260 #ifdef OHCI_DEBUG 1261 if (ohcidebug > 10) { 1262 DPRINTF(("ohci_process_done: TD done:\n")); 1263 ohci_dump_tds(sdone); 1264 } 1265 #endif 1266 1267 for (std = sdone; std; std = stdnext) { 1268 xfer = std->xfer; 1269 stdnext = std->dnext; 1270 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1271 std, xfer, xfer ? xfer->hcpriv : 0)); 1272 if (xfer == NULL) { 1273 /* xfer == NULL: There seems to be no xfer associated 1274 * with this TD. It is tailp that happened to end up on 1275 * the done queue. 1276 */ 1277 continue; 1278 } 1279 if (xfer->status == USBD_CANCELLED || 1280 xfer->status == USBD_TIMEOUT) { 1281 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1282 xfer)); 1283 /* Handled by abort routine. */ 1284 continue; 1285 } 1286 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1287 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1288 if (cc == OHCI_CC_NO_ERROR) { 1289 len = std->len; 1290 if (std->td.td_cbp != 0) 1291 len -= le32toh(std->td.td_be) - 1292 le32toh(std->td.td_cbp) + 1; 1293 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1294 len, std->flags)); 1295 if (std->flags & OHCI_ADD_LEN) 1296 xfer->actlen += len; 1297 if (std->flags & OHCI_CALL_DONE) { 1298 xfer->status = USBD_NORMAL_COMPLETION; 1299 usb_transfer_complete(xfer); 1300 } 1301 ohci_free_std(sc, std); 1302 } else { 1303 /* 1304 * Endpoint is halted. First unlink all the TDs 1305 * belonging to the failed transfer, and then restart 1306 * the endpoint. 1307 */ 1308 ohci_soft_td_t *p, *n; 1309 struct ohci_pipe *opipe = 1310 (struct ohci_pipe *)xfer->pipe; 1311 1312 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1313 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1314 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1315 1316 /* remove TDs */ 1317 for (p = std; p->xfer == xfer; p = n) { 1318 n = p->nexttd; 1319 ohci_free_std(sc, p); 1320 } 1321 1322 /* clear halt */ 1323 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1324 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1325 1326 if (cc == OHCI_CC_STALL) 1327 xfer->status = USBD_STALLED; 1328 else 1329 xfer->status = USBD_IOERROR; 1330 usb_transfer_complete(xfer); 1331 } 1332 } 1333 1334 #ifdef OHCI_DEBUG 1335 if (ohcidebug > 10) { 1336 DPRINTF(("ohci_softintr: ITD done:\n")); 1337 ohci_dump_itds(sidone); 1338 } 1339 #endif 1340 1341 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1342 xfer = sitd->xfer; 1343 sitdnext = sitd->dnext; 1344 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1345 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1346 if (xfer == NULL) 1347 continue; 1348 if (xfer->status == USBD_CANCELLED || 1349 xfer->status == USBD_TIMEOUT) { 1350 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1351 xfer)); 1352 /* Handled by abort routine. */ 1353 continue; 1354 } 1355 #ifdef DIAGNOSTIC 1356 if (sitd->isdone) 1357 printf("ohci_softintr: sitd=%p is done\n", sitd); 1358 sitd->isdone = 1; 1359 #endif 1360 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1361 if (cc == OHCI_CC_NO_ERROR) { 1362 /* XXX compute length for input */ 1363 struct ohci_pipe *opipe = 1364 (struct ohci_pipe *)xfer->pipe; 1365 if (sitd->flags & OHCI_CALL_DONE) { 1366 opipe->u.iso.inuse -= xfer->nframes; 1367 /* XXX update frlengths with actual length */ 1368 /* XXX xfer->actlen = actlen; */ 1369 xfer->status = USBD_NORMAL_COMPLETION; 1370 usb_transfer_complete(xfer); 1371 } 1372 } else { 1373 /* XXX Do more */ 1374 xfer->status = USBD_IOERROR; 1375 usb_transfer_complete(xfer); 1376 } 1377 } 1378 1379 sc->sc_bus.intr_context--; 1380 DPRINTFN(10,("ohci_softintr: done:\n")); 1381 } 1382 1383 void 1384 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1385 { 1386 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1387 1388 #ifdef DIAGNOSTIC 1389 if (!(xfer->rqflags & URQ_REQUEST)) { 1390 panic("ohci_ctrl_done: not a request\n"); 1391 } 1392 #endif 1393 xfer->hcpriv = NULL; 1394 } 1395 1396 void 1397 ohci_device_intr_done(usbd_xfer_handle xfer) 1398 { 1399 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1400 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1401 ohci_soft_ed_t *sed = opipe->sed; 1402 ohci_soft_td_t *data, *tail; 1403 1404 1405 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1406 xfer, xfer->actlen)); 1407 1408 xfer->hcpriv = NULL; 1409 1410 if (xfer->pipe->repeat) { 1411 data = opipe->tail.td; 1412 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1413 if (tail == NULL) { 1414 xfer->status = USBD_NOMEM; 1415 return; 1416 } 1417 tail->xfer = NULL; 1418 1419 data->td.td_flags = htole32( 1420 OHCI_TD_IN | OHCI_TD_NOCC | 1421 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1422 if (xfer->flags & USBD_SHORT_XFER_OK) 1423 data->td.td_flags |= htole32(OHCI_TD_R); 1424 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1425 data->nexttd = tail; 1426 data->td.td_nexttd = htole32(tail->physaddr); 1427 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1428 xfer->length - 1); 1429 data->len = xfer->length; 1430 data->xfer = xfer; 1431 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1432 xfer->hcpriv = data; 1433 xfer->actlen = 0; 1434 1435 sed->ed.ed_tailp = htole32(tail->physaddr); 1436 opipe->tail.td = tail; 1437 } 1438 } 1439 1440 void 1441 ohci_device_bulk_done(usbd_xfer_handle xfer) 1442 { 1443 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1444 xfer, xfer->actlen)); 1445 1446 xfer->hcpriv = NULL; 1447 } 1448 1449 void 1450 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1451 { 1452 usbd_pipe_handle pipe; 1453 struct ohci_pipe *opipe; 1454 u_char *p; 1455 int i, m; 1456 int hstatus; 1457 1458 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1459 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1460 sc, xfer, hstatus)); 1461 1462 if (xfer == NULL) { 1463 /* Just ignore the change. */ 1464 return; 1465 } 1466 1467 pipe = xfer->pipe; 1468 opipe = (struct ohci_pipe *)pipe; 1469 1470 p = KERNADDR(&xfer->dmabuf); 1471 m = min(sc->sc_noport, xfer->length * 8 - 1); 1472 memset(p, 0, xfer->length); 1473 for (i = 1; i <= m; i++) { 1474 /* Pick out CHANGE bits from the status reg. */ 1475 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1476 p[i/8] |= 1 << (i%8); 1477 } 1478 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1479 xfer->actlen = xfer->length; 1480 xfer->status = USBD_NORMAL_COMPLETION; 1481 1482 usb_transfer_complete(xfer); 1483 } 1484 1485 void 1486 ohci_root_intr_done(usbd_xfer_handle xfer) 1487 { 1488 xfer->hcpriv = NULL; 1489 } 1490 1491 void 1492 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1493 { 1494 xfer->hcpriv = NULL; 1495 } 1496 1497 /* 1498 * Wait here until controller claims to have an interrupt. 1499 * Then call ohci_intr and return. Use timeout to avoid waiting 1500 * too long. 1501 */ 1502 void 1503 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1504 { 1505 int timo = xfer->timeout; 1506 int usecs; 1507 u_int32_t intrs; 1508 1509 xfer->status = USBD_IN_PROGRESS; 1510 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1511 usb_delay_ms(&sc->sc_bus, 1); 1512 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1513 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1514 #ifdef OHCI_DEBUG 1515 if (ohcidebug > 15) 1516 ohci_dumpregs(sc); 1517 #endif 1518 if (intrs) { 1519 ohci_intr1(sc); 1520 if (xfer->status != USBD_IN_PROGRESS) 1521 return; 1522 } 1523 } 1524 1525 /* Timeout */ 1526 DPRINTF(("ohci_waitintr: timeout\n")); 1527 xfer->status = USBD_TIMEOUT; 1528 usb_transfer_complete(xfer); 1529 /* XXX should free TD */ 1530 } 1531 1532 void 1533 ohci_poll(struct usbd_bus *bus) 1534 { 1535 ohci_softc_t *sc = (ohci_softc_t *)bus; 1536 #ifdef OHCI_DEBUG 1537 static int last; 1538 int new; 1539 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1540 if (new != last) { 1541 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1542 last = new; 1543 } 1544 #endif 1545 1546 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1547 ohci_intr1(sc); 1548 } 1549 1550 usbd_status 1551 ohci_device_request(usbd_xfer_handle xfer) 1552 { 1553 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1554 usb_device_request_t *req = &xfer->request; 1555 usbd_device_handle dev = opipe->pipe.device; 1556 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1557 int addr = dev->address; 1558 ohci_soft_td_t *setup, *stat, *next, *tail; 1559 ohci_soft_ed_t *sed; 1560 int isread; 1561 int len; 1562 usbd_status err; 1563 int s; 1564 1565 isread = req->bmRequestType & UT_READ; 1566 len = UGETW(req->wLength); 1567 1568 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1569 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1570 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1571 UGETW(req->wIndex), len, addr, 1572 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1573 1574 setup = opipe->tail.td; 1575 stat = ohci_alloc_std(sc); 1576 if (stat == NULL) { 1577 err = USBD_NOMEM; 1578 goto bad1; 1579 } 1580 tail = ohci_alloc_std(sc); 1581 if (tail == NULL) { 1582 err = USBD_NOMEM; 1583 goto bad2; 1584 } 1585 tail->xfer = NULL; 1586 1587 sed = opipe->sed; 1588 opipe->u.ctl.length = len; 1589 1590 /* Update device address and length since they may have changed. */ 1591 /* XXX This only needs to be done once, but it's too early in open. */ 1592 /* XXXX Should not touch ED here! */ 1593 sed->ed.ed_flags = htole32( 1594 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1595 OHCI_ED_SET_FA(addr) | 1596 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1597 1598 next = stat; 1599 1600 /* Set up data transaction */ 1601 if (len != 0) { 1602 ohci_soft_td_t *std = stat; 1603 1604 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1605 std, &stat); 1606 stat = stat->nexttd; /* point at free TD */ 1607 if (err) 1608 goto bad3; 1609 /* Start toggle at 1 and then use the carried toggle. */ 1610 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1611 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1612 } 1613 1614 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1615 1616 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1617 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1618 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1619 setup->nexttd = next; 1620 setup->td.td_nexttd = htole32(next->physaddr); 1621 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1622 setup->len = 0; 1623 setup->xfer = xfer; 1624 setup->flags = 0; 1625 xfer->hcpriv = setup; 1626 1627 stat->td.td_flags = htole32( 1628 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1629 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1630 stat->td.td_cbp = 0; 1631 stat->nexttd = tail; 1632 stat->td.td_nexttd = htole32(tail->physaddr); 1633 stat->td.td_be = 0; 1634 stat->flags = OHCI_CALL_DONE; 1635 stat->len = 0; 1636 stat->xfer = xfer; 1637 1638 #ifdef OHCI_DEBUG 1639 if (ohcidebug > 5) { 1640 DPRINTF(("ohci_device_request:\n")); 1641 ohci_dump_ed(sed); 1642 ohci_dump_tds(setup); 1643 } 1644 #endif 1645 1646 /* Insert ED in schedule */ 1647 s = splusb(); 1648 sed->ed.ed_tailp = htole32(tail->physaddr); 1649 opipe->tail.td = tail; 1650 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1651 if (xfer->timeout && !sc->sc_bus.use_polling) { 1652 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1653 ohci_timeout, xfer); 1654 } 1655 splx(s); 1656 1657 #if 0 1658 if (ohcidebug > 10) { 1659 delay(10000); 1660 DPRINTF(("ohci_device_request: status=%x\n", 1661 OREAD4(sc, OHCI_COMMAND_STATUS))); 1662 ohci_dump_ed(sed); 1663 ohci_dump_tds(setup); 1664 } 1665 #endif 1666 1667 return (USBD_NORMAL_COMPLETION); 1668 1669 bad3: 1670 ohci_free_std(sc, tail); 1671 bad2: 1672 ohci_free_std(sc, stat); 1673 bad1: 1674 return (err); 1675 } 1676 1677 /* 1678 * Add an ED to the schedule. Called at splusb(). 1679 */ 1680 void 1681 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1682 { 1683 SPLUSBCHECK; 1684 sed->next = head->next; 1685 sed->ed.ed_nexted = head->ed.ed_nexted; 1686 head->next = sed; 1687 head->ed.ed_nexted = htole32(sed->physaddr); 1688 } 1689 1690 /* 1691 * Remove an ED from the schedule. Called at splusb(). 1692 */ 1693 void 1694 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1695 { 1696 ohci_soft_ed_t *p; 1697 1698 SPLUSBCHECK; 1699 1700 /* XXX */ 1701 for (p = head; p == NULL && p->next != sed; p = p->next) 1702 ; 1703 if (p == NULL) 1704 panic("ohci_rem_ed: ED not found\n"); 1705 p->next = sed->next; 1706 p->ed.ed_nexted = sed->ed.ed_nexted; 1707 } 1708 1709 /* 1710 * When a transfer is completed the TD is added to the done queue by 1711 * the host controller. This queue is the processed by software. 1712 * Unfortunately the queue contains the physical address of the TD 1713 * and we have no simple way to translate this back to a kernel address. 1714 * To make the translation possible (and fast) we use a hash table of 1715 * TDs currently in the schedule. The physical address is used as the 1716 * hash value. 1717 */ 1718 1719 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1720 /* Called at splusb() */ 1721 void 1722 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1723 { 1724 int h = HASH(std->physaddr); 1725 1726 SPLUSBCHECK; 1727 1728 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1729 } 1730 1731 /* Called at splusb() */ 1732 void 1733 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1734 { 1735 SPLUSBCHECK; 1736 1737 LIST_REMOVE(std, hnext); 1738 } 1739 1740 ohci_soft_td_t * 1741 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1742 { 1743 int h = HASH(a); 1744 ohci_soft_td_t *std; 1745 1746 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1747 std != NULL; 1748 std = LIST_NEXT(std, hnext)) 1749 if (std->physaddr == a) 1750 return (std); 1751 return (NULL); 1752 } 1753 1754 /* Called at splusb() */ 1755 void 1756 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1757 { 1758 int h = HASH(sitd->physaddr); 1759 1760 SPLUSBCHECK; 1761 1762 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1763 sitd, (u_long)sitd->physaddr)); 1764 1765 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1766 } 1767 1768 /* Called at splusb() */ 1769 void 1770 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1771 { 1772 SPLUSBCHECK; 1773 1774 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1775 sitd, (u_long)sitd->physaddr)); 1776 1777 LIST_REMOVE(sitd, hnext); 1778 } 1779 1780 ohci_soft_itd_t * 1781 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1782 { 1783 int h = HASH(a); 1784 ohci_soft_itd_t *sitd; 1785 1786 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1787 sitd != NULL; 1788 sitd = LIST_NEXT(sitd, hnext)) 1789 if (sitd->physaddr == a) 1790 return (sitd); 1791 return (NULL); 1792 } 1793 1794 void 1795 ohci_timeout(void *addr) 1796 { 1797 usbd_xfer_handle xfer = addr; 1798 int s; 1799 1800 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1801 1802 s = splusb(); 1803 xfer->device->bus->intr_context++; 1804 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1805 xfer->device->bus->intr_context--; 1806 splx(s); 1807 } 1808 1809 #ifdef OHCI_DEBUG 1810 void 1811 ohci_dump_tds(ohci_soft_td_t *std) 1812 { 1813 for (; std; std = std->nexttd) 1814 ohci_dump_td(std); 1815 } 1816 1817 void 1818 ohci_dump_td(ohci_soft_td_t *std) 1819 { 1820 char sbuf[128]; 1821 1822 bitmask_snprintf((int)le32toh(std->td.td_flags), 1823 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1824 sbuf, sizeof(sbuf)); 1825 1826 DPRINTF(("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1827 "nexttd=0x%08lx be=0x%08lx\n", 1828 std, (u_long)std->physaddr, sbuf, 1829 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1830 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1831 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1832 (u_long)le32toh(std->td.td_cbp), 1833 (u_long)le32toh(std->td.td_nexttd), 1834 (u_long)le32toh(std->td.td_be))); 1835 } 1836 1837 void 1838 ohci_dump_itd(ohci_soft_itd_t *sitd) 1839 { 1840 int i; 1841 1842 DPRINTF(("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1843 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1844 sitd, (u_long)sitd->physaddr, 1845 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1846 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1847 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1848 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1849 (u_long)le32toh(sitd->itd.itd_bp0), 1850 (u_long)le32toh(sitd->itd.itd_nextitd), 1851 (u_long)le32toh(sitd->itd.itd_be))); 1852 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1853 DPRINTF(("offs[%d]=0x%04x ", i, 1854 (u_int)le16toh(sitd->itd.itd_offset[i]))); 1855 DPRINTF(("\n")); 1856 } 1857 1858 void 1859 ohci_dump_itds(ohci_soft_itd_t *sitd) 1860 { 1861 for (; sitd; sitd = sitd->nextitd) 1862 ohci_dump_itd(sitd); 1863 } 1864 1865 void 1866 ohci_dump_ed(ohci_soft_ed_t *sed) 1867 { 1868 char sbuf[128], sbuf2[128]; 1869 1870 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1871 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1872 sbuf, sizeof(sbuf)); 1873 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1874 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1875 1876 DPRINTF(("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1877 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1878 sed, (u_long)sed->physaddr, 1879 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1880 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1881 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1882 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1883 (u_long)le32toh(sed->ed.ed_headp), 1884 (u_long)le32toh(sed->ed.ed_nexted))); 1885 } 1886 #endif 1887 1888 usbd_status 1889 ohci_open(usbd_pipe_handle pipe) 1890 { 1891 usbd_device_handle dev = pipe->device; 1892 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1893 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1894 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1895 u_int8_t addr = dev->address; 1896 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1897 ohci_soft_ed_t *sed; 1898 ohci_soft_td_t *std; 1899 ohci_soft_itd_t *sitd; 1900 ohci_physaddr_t tdphys; 1901 u_int32_t fmt; 1902 usbd_status err; 1903 int s; 1904 int ival; 1905 1906 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1907 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1908 1909 std = NULL; 1910 sed = NULL; 1911 1912 if (addr == sc->sc_addr) { 1913 switch (ed->bEndpointAddress) { 1914 case USB_CONTROL_ENDPOINT: 1915 pipe->methods = &ohci_root_ctrl_methods; 1916 break; 1917 case UE_DIR_IN | OHCI_INTR_ENDPT: 1918 pipe->methods = &ohci_root_intr_methods; 1919 break; 1920 default: 1921 return (USBD_INVAL); 1922 } 1923 } else { 1924 sed = ohci_alloc_sed(sc); 1925 if (sed == NULL) 1926 goto bad0; 1927 opipe->sed = sed; 1928 if (xfertype == UE_ISOCHRONOUS) { 1929 sitd = ohci_alloc_sitd(sc); 1930 if (sitd == NULL) { 1931 ohci_free_sitd(sc, sitd); 1932 goto bad1; 1933 } 1934 opipe->tail.itd = sitd; 1935 tdphys = sitd->physaddr; 1936 fmt = OHCI_ED_FORMAT_ISO; 1937 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1938 fmt |= OHCI_ED_DIR_IN; 1939 else 1940 fmt |= OHCI_ED_DIR_OUT; 1941 } else { 1942 std = ohci_alloc_std(sc); 1943 if (std == NULL) { 1944 ohci_free_std(sc, std); 1945 goto bad1; 1946 } 1947 opipe->tail.td = std; 1948 tdphys = std->physaddr; 1949 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1950 } 1951 sed->ed.ed_flags = htole32( 1952 OHCI_ED_SET_FA(addr) | 1953 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1954 (dev->lowspeed ? OHCI_ED_SPEED : 0) | fmt | 1955 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1956 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1957 1958 switch (xfertype) { 1959 case UE_CONTROL: 1960 pipe->methods = &ohci_device_ctrl_methods; 1961 err = usb_allocmem(&sc->sc_bus, 1962 sizeof(usb_device_request_t), 1963 0, &opipe->u.ctl.reqdma); 1964 if (err) 1965 goto bad; 1966 s = splusb(); 1967 ohci_add_ed(sed, sc->sc_ctrl_head); 1968 splx(s); 1969 break; 1970 case UE_INTERRUPT: 1971 pipe->methods = &ohci_device_intr_methods; 1972 ival = pipe->interval; 1973 if (ival == USBD_DEFAULT_INTERVAL) 1974 ival = ed->bInterval; 1975 return (ohci_device_setintr(sc, opipe, ival)); 1976 case UE_ISOCHRONOUS: 1977 pipe->methods = &ohci_device_isoc_methods; 1978 return (ohci_setup_isoc(pipe)); 1979 case UE_BULK: 1980 pipe->methods = &ohci_device_bulk_methods; 1981 s = splusb(); 1982 ohci_add_ed(sed, sc->sc_bulk_head); 1983 splx(s); 1984 break; 1985 } 1986 } 1987 return (USBD_NORMAL_COMPLETION); 1988 1989 bad: 1990 if (std != NULL) 1991 ohci_free_std(sc, std); 1992 bad1: 1993 if (sed != NULL) 1994 ohci_free_sed(sc, sed); 1995 bad0: 1996 return (USBD_NOMEM); 1997 1998 } 1999 2000 /* 2001 * Close a reqular pipe. 2002 * Assumes that there are no pending transactions. 2003 */ 2004 void 2005 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2006 { 2007 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2008 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2009 ohci_soft_ed_t *sed = opipe->sed; 2010 int s; 2011 2012 s = splusb(); 2013 #ifdef DIAGNOSTIC 2014 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2015 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2016 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2017 ohci_soft_td_t *std; 2018 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2019 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2020 "tl=0x%x pipe=%p, std=%p\n", sed, 2021 (int)le32toh(sed->ed.ed_headp), 2022 (int)le32toh(sed->ed.ed_tailp), 2023 pipe, std); 2024 #ifdef OHCI_DEBUG 2025 ohci_dump_ed(sed); 2026 if (std) 2027 ohci_dump_td(std); 2028 #endif 2029 usb_delay_ms(&sc->sc_bus, 2); 2030 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2031 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2032 printf("ohci_close_pipe: pipe still not empty\n"); 2033 } 2034 #endif 2035 ohci_rem_ed(sed, head); 2036 splx(s); 2037 ohci_free_sed(sc, opipe->sed); 2038 } 2039 2040 /* 2041 * Abort a device request. 2042 * If this routine is called at splusb() it guarantees that the request 2043 * will be removed from the hardware scheduling and that the callback 2044 * for it will be called with USBD_CANCELLED status. 2045 * It's impossible to guarantee that the requested transfer will not 2046 * have happened since the hardware runs concurrently. 2047 * If the transaction has already happened we rely on the ordinary 2048 * interrupt processing to process it. 2049 */ 2050 void 2051 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2052 { 2053 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2054 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2055 ohci_soft_ed_t *sed = opipe->sed; 2056 ohci_soft_td_t *p, *n; 2057 ohci_physaddr_t headp; 2058 int s, hit; 2059 2060 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2061 2062 if (xfer->device->bus->intr_context || !curproc) 2063 panic("ohci_abort_xfer: not in process context\n"); 2064 2065 /* 2066 * Step 1: Make interrupt routine and hardware ignore xfer. 2067 */ 2068 s = splusb(); 2069 xfer->status = status; /* make software ignore it */ 2070 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2071 splx(s); 2072 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2073 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2074 2075 /* 2076 * Step 2: Wait until we know hardware has finished any possible 2077 * use of the xfer. Also make sure the soft interrupt routine 2078 * has run. 2079 */ 2080 usb_delay_ms(opipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 2081 usb_delay_ms(opipe->pipe.device->bus, 50); /* XXX software finish */ 2082 2083 /* 2084 * Step 3: Remove any vestiges of the xfer from the hardware. 2085 * The complication here is that the hardware may have executed 2086 * beyond the xfer we're trying to abort. So as we're scanning 2087 * the TDs of this xfer we check if the hardware points to 2088 * any of them. 2089 */ 2090 s = splusb(); /* XXX why? */ 2091 p = xfer->hcpriv; 2092 #ifdef DIAGNOSTIC 2093 if (p == NULL) { 2094 splx(s); 2095 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2096 return; 2097 } 2098 #endif 2099 #ifdef OHCI_DEBUG 2100 if (ohcidebug > 1) { 2101 DPRINTF(("ohci_abort_xfer: sed=\n")); 2102 ohci_dump_ed(sed); 2103 ohci_dump_tds(p); 2104 } 2105 #endif 2106 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2107 hit = 0; 2108 for (; p->xfer == xfer; p = n) { 2109 hit |= headp == p->physaddr; 2110 n = p->nexttd; 2111 ohci_free_std(sc, p); 2112 } 2113 /* Zap headp register if hardware pointed inside the xfer. */ 2114 if (hit) { 2115 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2116 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2117 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2118 } else { 2119 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2120 } 2121 2122 /* 2123 * Step 4: Turn on hardware again. 2124 */ 2125 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2126 2127 /* 2128 * Step 5: Execute callback. 2129 */ 2130 usb_transfer_complete(xfer); 2131 2132 splx(s); 2133 } 2134 2135 /* 2136 * Data structures and routines to emulate the root hub. 2137 */ 2138 Static usb_device_descriptor_t ohci_devd = { 2139 USB_DEVICE_DESCRIPTOR_SIZE, 2140 UDESC_DEVICE, /* type */ 2141 {0x00, 0x01}, /* USB version */ 2142 UDCLASS_HUB, /* class */ 2143 UDSUBCLASS_HUB, /* subclass */ 2144 0, /* protocol */ 2145 64, /* max packet */ 2146 {0},{0},{0x00,0x01}, /* device id */ 2147 1,2,0, /* string indicies */ 2148 1 /* # of configurations */ 2149 }; 2150 2151 Static usb_config_descriptor_t ohci_confd = { 2152 USB_CONFIG_DESCRIPTOR_SIZE, 2153 UDESC_CONFIG, 2154 {USB_CONFIG_DESCRIPTOR_SIZE + 2155 USB_INTERFACE_DESCRIPTOR_SIZE + 2156 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2157 1, 2158 1, 2159 0, 2160 UC_SELF_POWERED, 2161 0 /* max power */ 2162 }; 2163 2164 Static usb_interface_descriptor_t ohci_ifcd = { 2165 USB_INTERFACE_DESCRIPTOR_SIZE, 2166 UDESC_INTERFACE, 2167 0, 2168 0, 2169 1, 2170 UICLASS_HUB, 2171 UISUBCLASS_HUB, 2172 0, 2173 0 2174 }; 2175 2176 Static usb_endpoint_descriptor_t ohci_endpd = { 2177 USB_ENDPOINT_DESCRIPTOR_SIZE, 2178 UDESC_ENDPOINT, 2179 UE_DIR_IN | OHCI_INTR_ENDPT, 2180 UE_INTERRUPT, 2181 {8, 0}, /* max packet */ 2182 255 2183 }; 2184 2185 Static usb_hub_descriptor_t ohci_hubd = { 2186 USB_HUB_DESCRIPTOR_SIZE, 2187 UDESC_HUB, 2188 0, 2189 {0,0}, 2190 0, 2191 0, 2192 {0}, 2193 }; 2194 2195 Static int 2196 ohci_str(p, l, s) 2197 usb_string_descriptor_t *p; 2198 int l; 2199 char *s; 2200 { 2201 int i; 2202 2203 if (l == 0) 2204 return (0); 2205 p->bLength = 2 * strlen(s) + 2; 2206 if (l == 1) 2207 return (1); 2208 p->bDescriptorType = UDESC_STRING; 2209 l -= 2; 2210 for (i = 0; s[i] && l > 1; i++, l -= 2) 2211 USETW2(p->bString[i], 0, s[i]); 2212 return (2*i+2); 2213 } 2214 2215 /* 2216 * Simulate a hardware hub by handling all the necessary requests. 2217 */ 2218 Static usbd_status 2219 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2220 { 2221 usbd_status err; 2222 2223 /* Insert last in queue. */ 2224 err = usb_insert_transfer(xfer); 2225 if (err) 2226 return (err); 2227 2228 /* Pipe isn't running, start first */ 2229 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2230 } 2231 2232 Static usbd_status 2233 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2234 { 2235 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2236 usb_device_request_t *req; 2237 void *buf = NULL; 2238 int port, i; 2239 int s, len, value, index, l, totlen = 0; 2240 usb_port_status_t ps; 2241 usb_hub_descriptor_t hubd; 2242 usbd_status err; 2243 u_int32_t v; 2244 2245 if (sc->sc_dying) 2246 return (USBD_IOERROR); 2247 2248 #ifdef DIAGNOSTIC 2249 if (!(xfer->rqflags & URQ_REQUEST)) 2250 /* XXX panic */ 2251 return (USBD_INVAL); 2252 #endif 2253 req = &xfer->request; 2254 2255 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2256 req->bmRequestType, req->bRequest)); 2257 2258 len = UGETW(req->wLength); 2259 value = UGETW(req->wValue); 2260 index = UGETW(req->wIndex); 2261 2262 if (len != 0) 2263 buf = KERNADDR(&xfer->dmabuf); 2264 2265 #define C(x,y) ((x) | ((y) << 8)) 2266 switch(C(req->bRequest, req->bmRequestType)) { 2267 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2268 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2269 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2270 /* 2271 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2272 * for the integrated root hub. 2273 */ 2274 break; 2275 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2276 if (len > 0) { 2277 *(u_int8_t *)buf = sc->sc_conf; 2278 totlen = 1; 2279 } 2280 break; 2281 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2282 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2283 switch(value >> 8) { 2284 case UDESC_DEVICE: 2285 if ((value & 0xff) != 0) { 2286 err = USBD_IOERROR; 2287 goto ret; 2288 } 2289 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2290 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2291 memcpy(buf, &ohci_devd, l); 2292 break; 2293 case UDESC_CONFIG: 2294 if ((value & 0xff) != 0) { 2295 err = USBD_IOERROR; 2296 goto ret; 2297 } 2298 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2299 memcpy(buf, &ohci_confd, l); 2300 buf = (char *)buf + l; 2301 len -= l; 2302 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2303 totlen += l; 2304 memcpy(buf, &ohci_ifcd, l); 2305 buf = (char *)buf + l; 2306 len -= l; 2307 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2308 totlen += l; 2309 memcpy(buf, &ohci_endpd, l); 2310 break; 2311 case UDESC_STRING: 2312 if (len == 0) 2313 break; 2314 *(u_int8_t *)buf = 0; 2315 totlen = 1; 2316 switch (value & 0xff) { 2317 case 1: /* Vendor */ 2318 totlen = ohci_str(buf, len, sc->sc_vendor); 2319 break; 2320 case 2: /* Product */ 2321 totlen = ohci_str(buf, len, "OHCI root hub"); 2322 break; 2323 } 2324 break; 2325 default: 2326 err = USBD_IOERROR; 2327 goto ret; 2328 } 2329 break; 2330 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2331 if (len > 0) { 2332 *(u_int8_t *)buf = 0; 2333 totlen = 1; 2334 } 2335 break; 2336 case C(UR_GET_STATUS, UT_READ_DEVICE): 2337 if (len > 1) { 2338 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2339 totlen = 2; 2340 } 2341 break; 2342 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2343 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2344 if (len > 1) { 2345 USETW(((usb_status_t *)buf)->wStatus, 0); 2346 totlen = 2; 2347 } 2348 break; 2349 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2350 if (value >= USB_MAX_DEVICES) { 2351 err = USBD_IOERROR; 2352 goto ret; 2353 } 2354 sc->sc_addr = value; 2355 break; 2356 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2357 if (value != 0 && value != 1) { 2358 err = USBD_IOERROR; 2359 goto ret; 2360 } 2361 sc->sc_conf = value; 2362 break; 2363 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2364 break; 2365 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2366 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2367 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2368 err = USBD_IOERROR; 2369 goto ret; 2370 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2371 break; 2372 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2373 break; 2374 /* Hub requests */ 2375 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2376 break; 2377 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2378 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2379 "port=%d feature=%d\n", 2380 index, value)); 2381 if (index < 1 || index > sc->sc_noport) { 2382 err = USBD_IOERROR; 2383 goto ret; 2384 } 2385 port = OHCI_RH_PORT_STATUS(index); 2386 switch(value) { 2387 case UHF_PORT_ENABLE: 2388 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2389 break; 2390 case UHF_PORT_SUSPEND: 2391 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2392 break; 2393 case UHF_PORT_POWER: 2394 /* Yes, writing to the LOW_SPEED bit clears power. */ 2395 OWRITE4(sc, port, UPS_LOW_SPEED); 2396 break; 2397 case UHF_C_PORT_CONNECTION: 2398 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2399 break; 2400 case UHF_C_PORT_ENABLE: 2401 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2402 break; 2403 case UHF_C_PORT_SUSPEND: 2404 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2405 break; 2406 case UHF_C_PORT_OVER_CURRENT: 2407 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2408 break; 2409 case UHF_C_PORT_RESET: 2410 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2411 break; 2412 default: 2413 err = USBD_IOERROR; 2414 goto ret; 2415 } 2416 switch(value) { 2417 case UHF_C_PORT_CONNECTION: 2418 case UHF_C_PORT_ENABLE: 2419 case UHF_C_PORT_SUSPEND: 2420 case UHF_C_PORT_OVER_CURRENT: 2421 case UHF_C_PORT_RESET: 2422 /* Enable RHSC interrupt if condition is cleared. */ 2423 if ((OREAD4(sc, port) >> 16) == 0) 2424 ohci_rhsc_able(sc, 1); 2425 break; 2426 default: 2427 break; 2428 } 2429 break; 2430 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2431 if (value != 0) { 2432 err = USBD_IOERROR; 2433 goto ret; 2434 } 2435 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2436 hubd = ohci_hubd; 2437 hubd.bNbrPorts = sc->sc_noport; 2438 USETW(hubd.wHubCharacteristics, 2439 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2440 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2441 /* XXX overcurrent */ 2442 ); 2443 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2444 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2445 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2446 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2447 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2448 l = min(len, hubd.bDescLength); 2449 totlen = l; 2450 memcpy(buf, &hubd, l); 2451 break; 2452 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2453 if (len != 4) { 2454 err = USBD_IOERROR; 2455 goto ret; 2456 } 2457 memset(buf, 0, len); /* ? XXX */ 2458 totlen = len; 2459 break; 2460 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2461 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2462 index)); 2463 if (index < 1 || index > sc->sc_noport) { 2464 err = USBD_IOERROR; 2465 goto ret; 2466 } 2467 if (len != 4) { 2468 err = USBD_IOERROR; 2469 goto ret; 2470 } 2471 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2472 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2473 v)); 2474 USETW(ps.wPortStatus, v); 2475 USETW(ps.wPortChange, v >> 16); 2476 l = min(len, sizeof ps); 2477 memcpy(buf, &ps, l); 2478 totlen = l; 2479 break; 2480 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2481 err = USBD_IOERROR; 2482 goto ret; 2483 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2484 break; 2485 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2486 if (index < 1 || index > sc->sc_noport) { 2487 err = USBD_IOERROR; 2488 goto ret; 2489 } 2490 port = OHCI_RH_PORT_STATUS(index); 2491 switch(value) { 2492 case UHF_PORT_ENABLE: 2493 OWRITE4(sc, port, UPS_PORT_ENABLED); 2494 break; 2495 case UHF_PORT_SUSPEND: 2496 OWRITE4(sc, port, UPS_SUSPEND); 2497 break; 2498 case UHF_PORT_RESET: 2499 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2500 index)); 2501 OWRITE4(sc, port, UPS_RESET); 2502 for (i = 0; i < 10; i++) { 2503 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2504 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2505 break; 2506 } 2507 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2508 index, OREAD4(sc, port))); 2509 break; 2510 case UHF_PORT_POWER: 2511 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2512 "%d\n", index)); 2513 OWRITE4(sc, port, UPS_PORT_POWER); 2514 break; 2515 default: 2516 err = USBD_IOERROR; 2517 goto ret; 2518 } 2519 break; 2520 default: 2521 err = USBD_IOERROR; 2522 goto ret; 2523 } 2524 xfer->actlen = totlen; 2525 err = USBD_NORMAL_COMPLETION; 2526 ret: 2527 xfer->status = err; 2528 s = splusb(); 2529 usb_transfer_complete(xfer); 2530 splx(s); 2531 return (USBD_IN_PROGRESS); 2532 } 2533 2534 /* Abort a root control request. */ 2535 Static void 2536 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2537 { 2538 /* Nothing to do, all transfers are synchronous. */ 2539 } 2540 2541 /* Close the root pipe. */ 2542 Static void 2543 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2544 { 2545 DPRINTF(("ohci_root_ctrl_close\n")); 2546 /* Nothing to do. */ 2547 } 2548 2549 Static usbd_status 2550 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2551 { 2552 usbd_status err; 2553 2554 /* Insert last in queue. */ 2555 err = usb_insert_transfer(xfer); 2556 if (err) 2557 return (err); 2558 2559 /* Pipe isn't running, start first */ 2560 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2561 } 2562 2563 Static usbd_status 2564 ohci_root_intr_start(usbd_xfer_handle xfer) 2565 { 2566 usbd_pipe_handle pipe = xfer->pipe; 2567 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2568 2569 if (sc->sc_dying) 2570 return (USBD_IOERROR); 2571 2572 sc->sc_intrxfer = xfer; 2573 2574 return (USBD_IN_PROGRESS); 2575 } 2576 2577 /* Abort a root interrupt request. */ 2578 Static void 2579 ohci_root_intr_abort(usbd_xfer_handle xfer) 2580 { 2581 int s; 2582 2583 if (xfer->pipe->intrxfer == xfer) { 2584 DPRINTF(("ohci_root_intr_abort: remove\n")); 2585 xfer->pipe->intrxfer = NULL; 2586 } 2587 xfer->status = USBD_CANCELLED; 2588 s = splusb(); 2589 usb_transfer_complete(xfer); 2590 splx(s); 2591 } 2592 2593 /* Close the root pipe. */ 2594 Static void 2595 ohci_root_intr_close(usbd_pipe_handle pipe) 2596 { 2597 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2598 2599 DPRINTF(("ohci_root_intr_close\n")); 2600 2601 sc->sc_intrxfer = NULL; 2602 } 2603 2604 /************************/ 2605 2606 Static usbd_status 2607 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2608 { 2609 usbd_status err; 2610 2611 /* Insert last in queue. */ 2612 err = usb_insert_transfer(xfer); 2613 if (err) 2614 return (err); 2615 2616 /* Pipe isn't running, start first */ 2617 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2618 } 2619 2620 Static usbd_status 2621 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2622 { 2623 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2624 usbd_status err; 2625 2626 if (sc->sc_dying) 2627 return (USBD_IOERROR); 2628 2629 #ifdef DIAGNOSTIC 2630 if (!(xfer->rqflags & URQ_REQUEST)) { 2631 /* XXX panic */ 2632 printf("ohci_device_ctrl_transfer: not a request\n"); 2633 return (USBD_INVAL); 2634 } 2635 #endif 2636 2637 err = ohci_device_request(xfer); 2638 if (err) 2639 return (err); 2640 2641 if (sc->sc_bus.use_polling) 2642 ohci_waitintr(sc, xfer); 2643 return (USBD_IN_PROGRESS); 2644 } 2645 2646 /* Abort a device control request. */ 2647 Static void 2648 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2649 { 2650 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2651 ohci_abort_xfer(xfer, USBD_CANCELLED); 2652 } 2653 2654 /* Close a device control pipe. */ 2655 Static void 2656 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2657 { 2658 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2659 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2660 2661 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2662 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2663 ohci_free_std(sc, opipe->tail.td); 2664 } 2665 2666 /************************/ 2667 2668 Static void 2669 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2670 { 2671 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2672 2673 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2674 } 2675 2676 Static void 2677 ohci_noop(usbd_pipe_handle pipe) 2678 { 2679 } 2680 2681 Static usbd_status 2682 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2683 { 2684 usbd_status err; 2685 2686 /* Insert last in queue. */ 2687 err = usb_insert_transfer(xfer); 2688 if (err) 2689 return (err); 2690 2691 /* Pipe isn't running, start first */ 2692 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2693 } 2694 2695 Static usbd_status 2696 ohci_device_bulk_start(usbd_xfer_handle xfer) 2697 { 2698 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2699 usbd_device_handle dev = opipe->pipe.device; 2700 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2701 int addr = dev->address; 2702 ohci_soft_td_t *data, *tail, *tdp; 2703 ohci_soft_ed_t *sed; 2704 int s, len, isread, endpt; 2705 usbd_status err; 2706 2707 if (sc->sc_dying) 2708 return (USBD_IOERROR); 2709 2710 #ifdef DIAGNOSTIC 2711 if (xfer->rqflags & URQ_REQUEST) { 2712 /* XXX panic */ 2713 printf("ohci_device_bulk_start: a request\n"); 2714 return (USBD_INVAL); 2715 } 2716 #endif 2717 2718 len = xfer->length; 2719 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2720 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2721 sed = opipe->sed; 2722 2723 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2724 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2725 endpt)); 2726 2727 opipe->u.bulk.isread = isread; 2728 opipe->u.bulk.length = len; 2729 2730 /* Update device address */ 2731 sed->ed.ed_flags = htole32( 2732 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2733 OHCI_ED_SET_FA(addr)); 2734 2735 /* Allocate a chain of new TDs (including a new tail). */ 2736 data = opipe->tail.td; 2737 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2738 data, &tail); 2739 /* We want interrupt at the end of the transfer. */ 2740 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2741 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2742 tail->flags |= OHCI_CALL_DONE; 2743 tail = tail->nexttd; /* point at sentinel */ 2744 if (err) 2745 return (err); 2746 2747 tail->xfer = NULL; 2748 xfer->hcpriv = data; 2749 2750 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2751 "td_cbp=0x%08x td_be=0x%08x\n", 2752 (int)le32toh(sed->ed.ed_flags), 2753 (int)le32toh(data->td.td_flags), 2754 (int)le32toh(data->td.td_cbp), 2755 (int)le32toh(data->td.td_be))); 2756 2757 #ifdef OHCI_DEBUG 2758 if (ohcidebug > 5) { 2759 ohci_dump_ed(sed); 2760 ohci_dump_tds(data); 2761 } 2762 #endif 2763 2764 /* Insert ED in schedule */ 2765 s = splusb(); 2766 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2767 tdp->xfer = xfer; 2768 } 2769 sed->ed.ed_tailp = htole32(tail->physaddr); 2770 opipe->tail.td = tail; 2771 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2772 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2773 if (xfer->timeout && !sc->sc_bus.use_polling) { 2774 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2775 ohci_timeout, xfer); 2776 } 2777 2778 #if 0 2779 /* This goes wrong if we are too slow. */ 2780 if (ohcidebug > 10) { 2781 delay(10000); 2782 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2783 OREAD4(sc, OHCI_COMMAND_STATUS))); 2784 ohci_dump_ed(sed); 2785 ohci_dump_tds(data); 2786 } 2787 #endif 2788 2789 splx(s); 2790 2791 return (USBD_IN_PROGRESS); 2792 } 2793 2794 Static void 2795 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2796 { 2797 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2798 ohci_abort_xfer(xfer, USBD_CANCELLED); 2799 } 2800 2801 /* 2802 * Close a device bulk pipe. 2803 */ 2804 Static void 2805 ohci_device_bulk_close(usbd_pipe_handle pipe) 2806 { 2807 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2808 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2809 2810 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2811 ohci_close_pipe(pipe, sc->sc_bulk_head); 2812 ohci_free_std(sc, opipe->tail.td); 2813 } 2814 2815 /************************/ 2816 2817 Static usbd_status 2818 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2819 { 2820 usbd_status err; 2821 2822 /* Insert last in queue. */ 2823 err = usb_insert_transfer(xfer); 2824 if (err) 2825 return (err); 2826 2827 /* Pipe isn't running, start first */ 2828 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2829 } 2830 2831 Static usbd_status 2832 ohci_device_intr_start(usbd_xfer_handle xfer) 2833 { 2834 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2835 usbd_device_handle dev = opipe->pipe.device; 2836 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2837 ohci_soft_ed_t *sed = opipe->sed; 2838 ohci_soft_td_t *data, *tail; 2839 int len; 2840 int s; 2841 2842 if (sc->sc_dying) 2843 return (USBD_IOERROR); 2844 2845 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2846 "flags=%d priv=%p\n", 2847 xfer, xfer->length, xfer->flags, xfer->priv)); 2848 2849 #ifdef DIAGNOSTIC 2850 if (xfer->rqflags & URQ_REQUEST) 2851 panic("ohci_device_intr_transfer: a request\n"); 2852 #endif 2853 2854 len = xfer->length; 2855 2856 data = opipe->tail.td; 2857 tail = ohci_alloc_std(sc); 2858 if (tail == NULL) 2859 return (USBD_NOMEM); 2860 tail->xfer = NULL; 2861 2862 data->td.td_flags = htole32( 2863 OHCI_TD_IN | OHCI_TD_NOCC | 2864 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2865 if (xfer->flags & USBD_SHORT_XFER_OK) 2866 data->td.td_flags |= htole32(OHCI_TD_R); 2867 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2868 data->nexttd = tail; 2869 data->td.td_nexttd = htole32(tail->physaddr); 2870 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2871 data->len = len; 2872 data->xfer = xfer; 2873 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2874 xfer->hcpriv = data; 2875 2876 #ifdef OHCI_DEBUG 2877 if (ohcidebug > 5) { 2878 DPRINTF(("ohci_device_intr_transfer:\n")); 2879 ohci_dump_ed(sed); 2880 ohci_dump_tds(data); 2881 } 2882 #endif 2883 2884 /* Insert ED in schedule */ 2885 s = splusb(); 2886 sed->ed.ed_tailp = htole32(tail->physaddr); 2887 opipe->tail.td = tail; 2888 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2889 2890 #if 0 2891 /* 2892 * This goes horribly wrong, printing thousands of descriptors, 2893 * because false references are followed due to the fact that the 2894 * TD is gone. 2895 */ 2896 if (ohcidebug > 5) { 2897 usb_delay_ms(&sc->sc_bus, 5); 2898 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2899 OREAD4(sc, OHCI_COMMAND_STATUS))); 2900 ohci_dump_ed(sed); 2901 ohci_dump_tds(data); 2902 } 2903 #endif 2904 splx(s); 2905 2906 return (USBD_IN_PROGRESS); 2907 } 2908 2909 /* Abort a device control request. */ 2910 Static void 2911 ohci_device_intr_abort(usbd_xfer_handle xfer) 2912 { 2913 if (xfer->pipe->intrxfer == xfer) { 2914 DPRINTF(("ohci_device_intr_abort: remove\n")); 2915 xfer->pipe->intrxfer = NULL; 2916 } 2917 ohci_abort_xfer(xfer, USBD_CANCELLED); 2918 } 2919 2920 /* Close a device interrupt pipe. */ 2921 Static void 2922 ohci_device_intr_close(usbd_pipe_handle pipe) 2923 { 2924 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2925 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2926 int nslots = opipe->u.intr.nslots; 2927 int pos = opipe->u.intr.pos; 2928 int j; 2929 ohci_soft_ed_t *p, *sed = opipe->sed; 2930 int s; 2931 2932 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2933 pipe, nslots, pos)); 2934 s = splusb(); 2935 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2936 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2937 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2938 usb_delay_ms(&sc->sc_bus, 2); 2939 2940 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2941 ; 2942 #ifdef DIAGNOSTIC 2943 if (p == NULL) 2944 panic("ohci_device_intr_close: ED not found\n"); 2945 #endif 2946 p->next = sed->next; 2947 p->ed.ed_nexted = sed->ed.ed_nexted; 2948 splx(s); 2949 2950 for (j = 0; j < nslots; j++) 2951 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2952 2953 ohci_free_std(sc, opipe->tail.td); 2954 ohci_free_sed(sc, opipe->sed); 2955 } 2956 2957 Static usbd_status 2958 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2959 { 2960 int i, j, s, best; 2961 u_int npoll, slow, shigh, nslots; 2962 u_int bestbw, bw; 2963 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2964 2965 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2966 if (ival == 0) { 2967 printf("ohci_setintr: 0 interval\n"); 2968 return (USBD_INVAL); 2969 } 2970 2971 npoll = OHCI_NO_INTRS; 2972 while (npoll > ival) 2973 npoll /= 2; 2974 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2975 2976 /* 2977 * We now know which level in the tree the ED must go into. 2978 * Figure out which slot has most bandwidth left over. 2979 * Slots to examine: 2980 * npoll 2981 * 1 0 2982 * 2 1 2 2983 * 4 3 4 5 6 2984 * 8 7 8 9 10 11 12 13 14 2985 * N (N-1) .. (N-1+N-1) 2986 */ 2987 slow = npoll-1; 2988 shigh = slow + npoll; 2989 nslots = OHCI_NO_INTRS / npoll; 2990 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 2991 bw = 0; 2992 for (j = 0; j < nslots; j++) 2993 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 2994 if (bw < bestbw) { 2995 best = i; 2996 bestbw = bw; 2997 } 2998 } 2999 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3000 best, slow, shigh, bestbw)); 3001 3002 s = splusb(); 3003 hsed = sc->sc_eds[best]; 3004 sed->next = hsed->next; 3005 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3006 hsed->next = sed; 3007 hsed->ed.ed_nexted = htole32(sed->physaddr); 3008 splx(s); 3009 3010 for (j = 0; j < nslots; j++) 3011 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3012 opipe->u.intr.nslots = nslots; 3013 opipe->u.intr.pos = best; 3014 3015 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3016 return (USBD_NORMAL_COMPLETION); 3017 } 3018 3019 /***********************/ 3020 3021 usbd_status 3022 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3023 { 3024 usbd_status err; 3025 3026 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3027 3028 /* Put it on our queue, */ 3029 err = usb_insert_transfer(xfer); 3030 3031 /* bail out on error, */ 3032 if (err && err != USBD_IN_PROGRESS) 3033 return (err); 3034 3035 /* XXX should check inuse here */ 3036 3037 /* insert into schedule, */ 3038 ohci_device_isoc_enter(xfer); 3039 3040 /* and start if the pipe wasn't running */ 3041 if (!err) 3042 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3043 3044 return (err); 3045 } 3046 3047 void 3048 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3049 { 3050 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3051 usbd_device_handle dev = opipe->pipe.device; 3052 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3053 ohci_soft_ed_t *sed = opipe->sed; 3054 struct iso *iso = &opipe->u.iso; 3055 ohci_soft_itd_t *sitd, *nsitd; 3056 ohci_physaddr_t buf, offs, noffs, bp0; 3057 int i, ncur, nframes; 3058 int s; 3059 3060 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3061 "nframes=%d\n", 3062 iso->inuse, iso->next, xfer, xfer->nframes)); 3063 3064 if (sc->sc_dying) 3065 return; 3066 3067 if (iso->next == -1) { 3068 /* Not in use yet, schedule it a few frames ahead. */ 3069 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3070 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3071 iso->next)); 3072 } 3073 3074 sitd = opipe->tail.itd; 3075 buf = DMAADDR(&xfer->dmabuf); 3076 bp0 = OHCI_PAGE(buf); 3077 offs = OHCI_PAGE_OFFSET(buf); 3078 nframes = xfer->nframes; 3079 xfer->hcpriv = sitd; 3080 for (i = ncur = 0; i < nframes; i++, ncur++) { 3081 noffs = offs + xfer->frlengths[i]; 3082 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3083 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3084 3085 /* Allocate next ITD */ 3086 nsitd = ohci_alloc_sitd(sc); 3087 if (nsitd == NULL) { 3088 /* XXX what now? */ 3089 printf("%s: isoc TD alloc failed\n", 3090 USBDEVNAME(sc->sc_bus.bdev)); 3091 return; 3092 } 3093 3094 /* Fill current ITD */ 3095 sitd->itd.itd_flags = htole32( 3096 OHCI_ITD_NOCC | 3097 OHCI_ITD_SET_SF(iso->next) | 3098 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3099 OHCI_ITD_SET_FC(ncur)); 3100 sitd->itd.itd_bp0 = htole32(bp0); 3101 sitd->nextitd = nsitd; 3102 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3103 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3104 sitd->xfer = xfer; 3105 sitd->flags = 0; 3106 3107 sitd = nsitd; 3108 iso->next = iso->next + ncur; 3109 bp0 = OHCI_PAGE(buf + offs); 3110 ncur = 0; 3111 } 3112 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3113 offs = noffs; 3114 } 3115 nsitd = ohci_alloc_sitd(sc); 3116 if (nsitd == NULL) { 3117 /* XXX what now? */ 3118 printf("%s: isoc TD alloc failed\n", 3119 USBDEVNAME(sc->sc_bus.bdev)); 3120 return; 3121 } 3122 /* Fixup last used ITD */ 3123 sitd->itd.itd_flags = htole32( 3124 OHCI_ITD_NOCC | 3125 OHCI_ITD_SET_SF(iso->next) | 3126 OHCI_ITD_SET_DI(0) | 3127 OHCI_ITD_SET_FC(ncur)); 3128 sitd->itd.itd_bp0 = htole32(bp0); 3129 sitd->nextitd = nsitd; 3130 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3131 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3132 sitd->xfer = xfer; 3133 sitd->flags = OHCI_CALL_DONE; 3134 3135 iso->next = iso->next + ncur; 3136 iso->inuse += nframes; 3137 3138 xfer->actlen = offs; /* XXX pretend we did it all */ 3139 3140 xfer->status = USBD_IN_PROGRESS; 3141 3142 #ifdef OHCI_DEBUG 3143 if (ohcidebug > 5) { 3144 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3145 le32toh(sc->sc_hcca->hcca_frame_number))); 3146 ohci_dump_itds(xfer->hcpriv); 3147 ohci_dump_ed(sed); 3148 } 3149 #endif 3150 3151 s = splusb(); 3152 opipe->tail.itd = nsitd; 3153 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3154 splx(s); 3155 3156 #ifdef OHCI_DEBUG 3157 if (ohcidebug > 5) { 3158 delay(150000); 3159 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3160 le32toh(sc->sc_hcca->hcca_frame_number))); 3161 ohci_dump_itds(xfer->hcpriv); 3162 ohci_dump_ed(sed); 3163 } 3164 #endif 3165 } 3166 3167 usbd_status 3168 ohci_device_isoc_start(usbd_xfer_handle xfer) 3169 { 3170 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3171 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3172 3173 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3174 3175 if (sc->sc_dying) 3176 return (USBD_IOERROR); 3177 3178 #ifdef DIAGNOSTIC 3179 if (xfer->status != USBD_IN_PROGRESS) 3180 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3181 #endif 3182 3183 /* XXX anything to do? */ 3184 3185 return (USBD_IN_PROGRESS); 3186 } 3187 3188 void 3189 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3190 { 3191 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3192 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3193 ohci_soft_ed_t *sed; 3194 ohci_soft_itd_t *sitd; 3195 int s; 3196 3197 s = splusb(); 3198 3199 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3200 3201 /* Transfer is already done. */ 3202 if (xfer->status != USBD_NOT_STARTED && 3203 xfer->status != USBD_IN_PROGRESS) { 3204 splx(s); 3205 printf("ohci_device_isoc_abort: early return\n"); 3206 return; 3207 } 3208 3209 /* Give xfer the requested abort code. */ 3210 xfer->status = USBD_CANCELLED; 3211 3212 sed = opipe->sed; 3213 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3214 3215 sitd = xfer->hcpriv; 3216 #ifdef DIAGNOSTIC 3217 if (sitd == NULL) { 3218 splx(s); 3219 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3220 return; 3221 } 3222 #endif 3223 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3224 #ifdef DIAGNOSTIC 3225 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3226 sitd->isdone = 1; 3227 #endif 3228 } 3229 3230 splx(s); 3231 3232 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3233 3234 s = splusb(); 3235 3236 /* Run callback. */ 3237 usb_transfer_complete(xfer); 3238 3239 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3240 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3241 3242 splx(s); 3243 } 3244 3245 void 3246 ohci_device_isoc_done(usbd_xfer_handle xfer) 3247 { 3248 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3249 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3250 ohci_soft_itd_t *sitd, *nsitd; 3251 3252 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3253 3254 for (sitd = xfer->hcpriv; 3255 !(sitd->flags & OHCI_CALL_DONE); 3256 sitd = nsitd) { 3257 nsitd = sitd->nextitd; 3258 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3259 ohci_free_sitd(sc, sitd); 3260 } 3261 ohci_free_sitd(sc, sitd); 3262 xfer->hcpriv = NULL; 3263 } 3264 3265 usbd_status 3266 ohci_setup_isoc(usbd_pipe_handle pipe) 3267 { 3268 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3269 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3270 struct iso *iso = &opipe->u.iso; 3271 int s; 3272 3273 iso->next = -1; 3274 iso->inuse = 0; 3275 3276 s = splusb(); 3277 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3278 splx(s); 3279 3280 return (USBD_NORMAL_COMPLETION); 3281 } 3282 3283 void 3284 ohci_device_isoc_close(usbd_pipe_handle pipe) 3285 { 3286 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3287 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3288 int s; 3289 3290 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3291 3292 s = splusb(); 3293 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3294 splx(s); 3295 ohci_close_pipe(pipe, sc->sc_isoc_head); 3296 #ifdef DIAGNOSTIC 3297 opipe->tail.itd->isdone = 1; 3298 #endif 3299 ohci_free_sitd(sc, opipe->tail.itd); 3300 } 3301
Indexes created Thu Sep 25 16:09:42 GMT 2025