ohci.c revision 1.109
1 /* $NetBSD: ohci.c,v 1.109 2001/11/20 13:48:32 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.109 2001/11/20 13:48:32 augustss Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_rhsc_able(ohci_softc_t *, int); 210 Static void ohci_rhsc_enable(void *); 211 212 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 213 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 214 215 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 216 Static void ohci_noop(usbd_pipe_handle pipe); 217 218 #ifdef OHCI_DEBUG 219 Static void ohci_dumpregs(ohci_softc_t *); 220 Static void ohci_dump_tds(ohci_soft_td_t *); 221 Static void ohci_dump_td(ohci_soft_td_t *); 222 Static void ohci_dump_ed(ohci_soft_ed_t *); 223 Static void ohci_dump_itd(ohci_soft_itd_t *); 224 Static void ohci_dump_itds(ohci_soft_itd_t *); 225 #endif 226 227 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 228 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 229 #define OWRITE1(sc, r, x) \ 230 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 231 #define OWRITE2(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE4(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 236 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 238 239 /* Reverse the bits in a value 0 .. 31 */ 240 Static u_int8_t revbits[OHCI_NO_INTRS] = 241 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 242 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 243 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 244 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 245 246 struct ohci_pipe { 247 struct usbd_pipe pipe; 248 ohci_soft_ed_t *sed; 249 union { 250 ohci_soft_td_t *td; 251 ohci_soft_itd_t *itd; 252 } tail; 253 /* Info needed for different pipe kinds. */ 254 union { 255 /* Control pipe */ 256 struct { 257 usb_dma_t reqdma; 258 u_int length; 259 ohci_soft_td_t *setup, *data, *stat; 260 } ctl; 261 /* Interrupt pipe */ 262 struct { 263 int nslots; 264 int pos; 265 } intr; 266 /* Bulk pipe */ 267 struct { 268 u_int length; 269 int isread; 270 } bulk; 271 /* Iso pipe */ 272 struct iso { 273 int next, inuse; 274 } iso; 275 } u; 276 }; 277 278 #define OHCI_INTR_ENDPT 1 279 280 Static struct usbd_bus_methods ohci_bus_methods = { 281 ohci_open, 282 ohci_softintr, 283 ohci_poll, 284 ohci_allocm, 285 ohci_freem, 286 ohci_allocx, 287 ohci_freex, 288 }; 289 290 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 291 ohci_root_ctrl_transfer, 292 ohci_root_ctrl_start, 293 ohci_root_ctrl_abort, 294 ohci_root_ctrl_close, 295 ohci_noop, 296 ohci_root_ctrl_done, 297 }; 298 299 Static struct usbd_pipe_methods ohci_root_intr_methods = { 300 ohci_root_intr_transfer, 301 ohci_root_intr_start, 302 ohci_root_intr_abort, 303 ohci_root_intr_close, 304 ohci_noop, 305 ohci_root_intr_done, 306 }; 307 308 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 309 ohci_device_ctrl_transfer, 310 ohci_device_ctrl_start, 311 ohci_device_ctrl_abort, 312 ohci_device_ctrl_close, 313 ohci_noop, 314 ohci_device_ctrl_done, 315 }; 316 317 Static struct usbd_pipe_methods ohci_device_intr_methods = { 318 ohci_device_intr_transfer, 319 ohci_device_intr_start, 320 ohci_device_intr_abort, 321 ohci_device_intr_close, 322 ohci_device_clear_toggle, 323 ohci_device_intr_done, 324 }; 325 326 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 327 ohci_device_bulk_transfer, 328 ohci_device_bulk_start, 329 ohci_device_bulk_abort, 330 ohci_device_bulk_close, 331 ohci_device_clear_toggle, 332 ohci_device_bulk_done, 333 }; 334 335 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 336 ohci_device_isoc_transfer, 337 ohci_device_isoc_start, 338 ohci_device_isoc_abort, 339 ohci_device_isoc_close, 340 ohci_noop, 341 ohci_device_isoc_done, 342 }; 343 344 #if defined(__NetBSD__) || defined(__OpenBSD__) 345 int 346 ohci_activate(device_ptr_t self, enum devact act) 347 { 348 struct ohci_softc *sc = (struct ohci_softc *)self; 349 int rv = 0; 350 351 switch (act) { 352 case DVACT_ACTIVATE: 353 return (EOPNOTSUPP); 354 break; 355 356 case DVACT_DEACTIVATE: 357 if (sc->sc_child != NULL) 358 rv = config_deactivate(sc->sc_child); 359 sc->sc_dying = 1; 360 break; 361 } 362 return (rv); 363 } 364 365 int 366 ohci_detach(struct ohci_softc *sc, int flags) 367 { 368 int rv = 0; 369 370 if (sc->sc_child != NULL) 371 rv = config_detach(sc->sc_child, flags); 372 373 if (rv != 0) 374 return (rv); 375 376 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 377 378 #if defined(__NetBSD__) || defined(__OpenBSD__) 379 powerhook_disestablish(sc->sc_powerhook); 380 shutdownhook_disestablish(sc->sc_shutdownhook); 381 #endif 382 383 /* free data structures XXX */ 384 385 return (rv); 386 } 387 #endif 388 389 ohci_soft_ed_t * 390 ohci_alloc_sed(ohci_softc_t *sc) 391 { 392 ohci_soft_ed_t *sed; 393 usbd_status err; 394 int i, offs; 395 usb_dma_t dma; 396 397 if (sc->sc_freeeds == NULL) { 398 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 399 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 400 OHCI_ED_ALIGN, &dma); 401 if (err) 402 return (0); 403 for(i = 0; i < OHCI_SED_CHUNK; i++) { 404 offs = i * OHCI_SED_SIZE; 405 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 406 sed->physaddr = DMAADDR(&dma) + offs; 407 sed->next = sc->sc_freeeds; 408 sc->sc_freeeds = sed; 409 } 410 } 411 sed = sc->sc_freeeds; 412 sc->sc_freeeds = sed->next; 413 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 414 sed->next = 0; 415 return (sed); 416 } 417 418 void 419 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 420 { 421 sed->next = sc->sc_freeeds; 422 sc->sc_freeeds = sed; 423 } 424 425 ohci_soft_td_t * 426 ohci_alloc_std(ohci_softc_t *sc) 427 { 428 ohci_soft_td_t *std; 429 usbd_status err; 430 int i, offs; 431 usb_dma_t dma; 432 int s; 433 434 if (sc->sc_freetds == NULL) { 435 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 436 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 437 OHCI_TD_ALIGN, &dma); 438 if (err) 439 return (NULL); 440 s = splusb(); 441 for(i = 0; i < OHCI_STD_CHUNK; i++) { 442 offs = i * OHCI_STD_SIZE; 443 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 444 std->physaddr = DMAADDR(&dma) + offs; 445 std->nexttd = sc->sc_freetds; 446 sc->sc_freetds = std; 447 } 448 splx(s); 449 } 450 451 s = splusb(); 452 std = sc->sc_freetds; 453 sc->sc_freetds = std->nexttd; 454 memset(&std->td, 0, sizeof(ohci_td_t)); 455 std->nexttd = NULL; 456 std->xfer = NULL; 457 ohci_hash_add_td(sc, std); 458 splx(s); 459 460 return (std); 461 } 462 463 void 464 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 465 { 466 int s; 467 468 s = splusb(); 469 ohci_hash_rem_td(sc, std); 470 std->nexttd = sc->sc_freetds; 471 sc->sc_freetds = std; 472 splx(s); 473 } 474 475 usbd_status 476 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 477 int alen, int rd, usbd_xfer_handle xfer, 478 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 479 { 480 ohci_soft_td_t *next, *cur; 481 ohci_physaddr_t dataphys, dataphysend; 482 u_int32_t tdflags; 483 int len, curlen; 484 usb_dma_t *dma = &xfer->dmabuf; 485 u_int16_t flags = xfer->flags; 486 487 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 488 489 len = alen; 490 cur = sp; 491 dataphys = DMAADDR(dma); 492 dataphysend = OHCI_PAGE(dataphys + len - 1); 493 tdflags = htole32( 494 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 495 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 496 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 497 498 for (;;) { 499 next = ohci_alloc_std(sc); 500 if (next == NULL) 501 goto nomem; 502 503 /* The OHCI hardware can handle at most one page crossing. */ 504 if (OHCI_PAGE(dataphys) == dataphysend || 505 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 506 /* we can handle it in this TD */ 507 curlen = len; 508 } else { 509 /* must use multiple TDs, fill as much as possible. */ 510 curlen = 2 * OHCI_PAGE_SIZE - 511 (dataphys & (OHCI_PAGE_SIZE-1)); 512 /* the length must be a multiple of the max size */ 513 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 514 #ifdef DIAGNOSTIC 515 if (curlen == 0) 516 panic("ohci_alloc_std: curlen == 0\n"); 517 #endif 518 } 519 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 520 "dataphysend=0x%08x len=%d curlen=%d\n", 521 dataphys, dataphysend, 522 len, curlen)); 523 len -= curlen; 524 525 cur->td.td_flags = tdflags; 526 cur->td.td_cbp = htole32(dataphys); 527 cur->nexttd = next; 528 cur->td.td_nexttd = htole32(next->physaddr); 529 cur->td.td_be = htole32(dataphys + curlen - 1); 530 cur->len = curlen; 531 cur->flags = OHCI_ADD_LEN; 532 cur->xfer = xfer; 533 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 534 dataphys, dataphys + curlen - 1)); 535 if (len == 0) 536 break; 537 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 538 dataphys += curlen; 539 cur = next; 540 } 541 if ((flags & USBD_FORCE_SHORT_XFER) && 542 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 543 /* Force a 0 length transfer at the end. */ 544 545 cur = next; 546 next = ohci_alloc_std(sc); 547 if (next == NULL) 548 goto nomem; 549 550 cur->td.td_flags = tdflags; 551 cur->td.td_cbp = 0; /* indicate 0 length packet */ 552 cur->nexttd = next; 553 cur->td.td_nexttd = htole32(next->physaddr); 554 cur->td.td_be = ~0; 555 cur->len = 0; 556 cur->flags = 0; 557 cur->xfer = xfer; 558 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 559 } 560 *ep = cur; 561 562 return (USBD_NORMAL_COMPLETION); 563 564 nomem: 565 /* XXX free chain */ 566 return (USBD_NOMEM); 567 } 568 569 #if 0 570 Static void 571 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 572 ohci_soft_td_t *stdend) 573 { 574 ohci_soft_td_t *p; 575 576 for (; std != stdend; std = p) { 577 p = std->nexttd; 578 ohci_free_std(sc, std); 579 } 580 } 581 #endif 582 583 ohci_soft_itd_t * 584 ohci_alloc_sitd(ohci_softc_t *sc) 585 { 586 ohci_soft_itd_t *sitd; 587 usbd_status err; 588 int i, s, offs; 589 usb_dma_t dma; 590 591 if (sc->sc_freeitds == NULL) { 592 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 593 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 594 OHCI_ITD_ALIGN, &dma); 595 if (err) 596 return (NULL); 597 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 598 offs = i * OHCI_SITD_SIZE; 599 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 600 sitd->physaddr = DMAADDR(&dma) + offs; 601 sitd->nextitd = sc->sc_freeitds; 602 sc->sc_freeitds = sitd; 603 } 604 } 605 606 s = splusb(); 607 sitd = sc->sc_freeitds; 608 sc->sc_freeitds = sitd->nextitd; 609 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 610 sitd->nextitd = NULL; 611 sitd->xfer = NULL; 612 ohci_hash_add_itd(sc, sitd); 613 splx(s); 614 615 #ifdef DIAGNOSTIC 616 sitd->isdone = 0; 617 #endif 618 619 return (sitd); 620 } 621 622 void 623 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 624 { 625 int s; 626 627 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 628 629 #ifdef DIAGNOSTIC 630 if (!sitd->isdone) { 631 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 632 return; 633 } 634 #endif 635 636 s = splusb(); 637 ohci_hash_rem_itd(sc, sitd); 638 sitd->nextitd = sc->sc_freeitds; 639 sc->sc_freeitds = sitd; 640 splx(s); 641 } 642 643 usbd_status 644 ohci_init(ohci_softc_t *sc) 645 { 646 ohci_soft_ed_t *sed, *psed; 647 usbd_status err; 648 int i; 649 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 650 651 DPRINTF(("ohci_init: start\n")); 652 #if defined(__OpenBSD__) 653 printf(","); 654 #else 655 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 656 #endif 657 rev = OREAD4(sc, OHCI_REVISION); 658 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 659 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 660 661 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 662 printf("%s: unsupported OHCI revision\n", 663 USBDEVNAME(sc->sc_bus.bdev)); 664 sc->sc_bus.usbrev = USBREV_UNKNOWN; 665 return (USBD_INVAL); 666 } 667 sc->sc_bus.usbrev = USBREV_1_0; 668 669 for (i = 0; i < OHCI_HASH_SIZE; i++) 670 LIST_INIT(&sc->sc_hash_tds[i]); 671 for (i = 0; i < OHCI_HASH_SIZE; i++) 672 LIST_INIT(&sc->sc_hash_itds[i]); 673 674 SIMPLEQ_INIT(&sc->sc_free_xfers); 675 676 /* XXX determine alignment by R/W */ 677 /* Allocate the HCCA area. */ 678 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 679 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 680 if (err) 681 return (err); 682 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 683 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 684 685 sc->sc_eintrs = OHCI_NORMAL_INTRS; 686 687 /* Allocate dummy ED that starts the control list. */ 688 sc->sc_ctrl_head = ohci_alloc_sed(sc); 689 if (sc->sc_ctrl_head == NULL) { 690 err = USBD_NOMEM; 691 goto bad1; 692 } 693 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 694 695 /* Allocate dummy ED that starts the bulk list. */ 696 sc->sc_bulk_head = ohci_alloc_sed(sc); 697 if (sc->sc_bulk_head == NULL) { 698 err = USBD_NOMEM; 699 goto bad2; 700 } 701 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 702 703 /* Allocate dummy ED that starts the isochronous list. */ 704 sc->sc_isoc_head = ohci_alloc_sed(sc); 705 if (sc->sc_isoc_head == NULL) { 706 err = USBD_NOMEM; 707 goto bad3; 708 } 709 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 710 711 /* Allocate all the dummy EDs that make up the interrupt tree. */ 712 for (i = 0; i < OHCI_NO_EDS; i++) { 713 sed = ohci_alloc_sed(sc); 714 if (sed == NULL) { 715 while (--i >= 0) 716 ohci_free_sed(sc, sc->sc_eds[i]); 717 err = USBD_NOMEM; 718 goto bad4; 719 } 720 /* All ED fields are set to 0. */ 721 sc->sc_eds[i] = sed; 722 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 723 if (i != 0) 724 psed = sc->sc_eds[(i-1) / 2]; 725 else 726 psed= sc->sc_isoc_head; 727 sed->next = psed; 728 sed->ed.ed_nexted = htole32(psed->physaddr); 729 } 730 /* 731 * Fill HCCA interrupt table. The bit reversal is to get 732 * the tree set up properly to spread the interrupts. 733 */ 734 for (i = 0; i < OHCI_NO_INTRS; i++) 735 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 736 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 737 738 #ifdef OHCI_DEBUG 739 if (ohcidebug > 15) { 740 for (i = 0; i < OHCI_NO_EDS; i++) { 741 printf("ed#%d ", i); 742 ohci_dump_ed(sc->sc_eds[i]); 743 } 744 printf("iso "); 745 ohci_dump_ed(sc->sc_isoc_head); 746 } 747 #endif 748 749 /* Determine in what context we are running. */ 750 ctl = OREAD4(sc, OHCI_CONTROL); 751 if (ctl & OHCI_IR) { 752 /* SMM active, request change */ 753 DPRINTF(("ohci_init: SMM active, request owner change\n")); 754 s = OREAD4(sc, OHCI_COMMAND_STATUS); 755 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 756 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 757 usb_delay_ms(&sc->sc_bus, 1); 758 ctl = OREAD4(sc, OHCI_CONTROL); 759 } 760 if ((ctl & OHCI_IR) == 0) { 761 printf("%s: SMM does not respond, resetting\n", 762 USBDEVNAME(sc->sc_bus.bdev)); 763 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 764 goto reset; 765 } 766 #if 0 767 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 768 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 769 /* BIOS started controller. */ 770 DPRINTF(("ohci_init: BIOS active\n")); 771 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 772 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 773 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 774 } 775 #endif 776 } else { 777 DPRINTF(("ohci_init: cold started\n")); 778 reset: 779 /* Controller was cold started. */ 780 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 781 } 782 783 /* 784 * This reset should not be necessary according to the OHCI spec, but 785 * without it some controllers do not start. 786 */ 787 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 788 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 789 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 790 791 /* We now own the host controller and the bus has been reset. */ 792 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 793 794 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 795 /* Nominal time for a reset is 10 us. */ 796 for (i = 0; i < 10; i++) { 797 delay(10); 798 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 799 if (!hcr) 800 break; 801 } 802 if (hcr) { 803 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 804 err = USBD_IOERROR; 805 goto bad5; 806 } 807 #ifdef OHCI_DEBUG 808 if (ohcidebug > 15) 809 ohci_dumpregs(sc); 810 #endif 811 812 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 813 814 /* Set up HC registers. */ 815 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 816 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 817 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 818 /* disable all interrupts and then switch on all desired interrupts */ 819 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 820 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 821 /* switch on desired functional features */ 822 ctl = OREAD4(sc, OHCI_CONTROL); 823 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 824 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 825 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 826 /* And finally start it! */ 827 OWRITE4(sc, OHCI_CONTROL, ctl); 828 829 /* 830 * The controller is now OPERATIONAL. Set a some final 831 * registers that should be set earlier, but that the 832 * controller ignores when in the SUSPEND state. 833 */ 834 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 835 fm |= OHCI_FSMPS(ival) | ival; 836 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 837 per = OHCI_PERIODIC(ival); /* 90% periodic */ 838 OWRITE4(sc, OHCI_PERIODIC_START, per); 839 840 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 841 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 842 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 843 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 844 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 845 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 846 847 /* 848 * The AMD756 requires a delay before re-reading the register, 849 * otherwise it will occasionally report 0 ports. 850 */ 851 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 852 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 853 854 #ifdef OHCI_DEBUG 855 if (ohcidebug > 5) 856 ohci_dumpregs(sc); 857 #endif 858 859 /* Set up the bus struct. */ 860 sc->sc_bus.methods = &ohci_bus_methods; 861 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 862 863 #if defined(__NetBSD__) || defined(__OpenBSD__) 864 sc->sc_control = sc->sc_intre = 0; 865 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 866 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 867 #endif 868 869 usb_callout_init(sc->sc_tmo_rhsc); 870 871 return (USBD_NORMAL_COMPLETION); 872 873 bad5: 874 for (i = 0; i < OHCI_NO_EDS; i++) 875 ohci_free_sed(sc, sc->sc_eds[i]); 876 bad4: 877 ohci_free_sed(sc, sc->sc_isoc_head); 878 bad3: 879 ohci_free_sed(sc, sc->sc_ctrl_head); 880 bad2: 881 ohci_free_sed(sc, sc->sc_bulk_head); 882 bad1: 883 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 884 return (err); 885 } 886 887 usbd_status 888 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 889 { 890 #if defined(__NetBSD__) || defined(__OpenBSD__) 891 struct ohci_softc *sc = (struct ohci_softc *)bus; 892 #endif 893 894 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 895 } 896 897 void 898 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 899 { 900 #if defined(__NetBSD__) || defined(__OpenBSD__) 901 struct ohci_softc *sc = (struct ohci_softc *)bus; 902 #endif 903 904 usb_freemem(&sc->sc_bus, dma); 905 } 906 907 usbd_xfer_handle 908 ohci_allocx(struct usbd_bus *bus) 909 { 910 struct ohci_softc *sc = (struct ohci_softc *)bus; 911 usbd_xfer_handle xfer; 912 913 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 914 if (xfer != NULL) 915 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 916 else 917 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 918 if (xfer != NULL) 919 memset(xfer, 0, sizeof *xfer); 920 return (xfer); 921 } 922 923 void 924 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 925 { 926 struct ohci_softc *sc = (struct ohci_softc *)bus; 927 928 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 929 } 930 931 /* 932 * Shut down the controller when the system is going down. 933 */ 934 void 935 ohci_shutdown(void *v) 936 { 937 ohci_softc_t *sc = v; 938 939 DPRINTF(("ohci_shutdown: stopping the HC\n")); 940 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 941 } 942 943 /* 944 * Handle suspend/resume. 945 * 946 * We need to switch to polling mode here, because this routine is 947 * called from an intterupt context. This is all right since we 948 * are almost suspended anyway. 949 */ 950 void 951 ohci_power(int why, void *v) 952 { 953 ohci_softc_t *sc = v; 954 u_int32_t ctl; 955 int s; 956 957 #ifdef OHCI_DEBUG 958 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 959 ohci_dumpregs(sc); 960 #endif 961 962 s = splhardusb(); 963 switch (why) { 964 case PWR_SUSPEND: 965 case PWR_STANDBY: 966 sc->sc_bus.use_polling++; 967 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 968 if (sc->sc_control == 0) { 969 /* 970 * Preserve register values, in case that APM BIOS 971 * does not recover them. 972 */ 973 sc->sc_control = ctl; 974 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 975 } 976 ctl |= OHCI_HCFS_SUSPEND; 977 OWRITE4(sc, OHCI_CONTROL, ctl); 978 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 979 sc->sc_bus.use_polling--; 980 break; 981 case PWR_RESUME: 982 sc->sc_bus.use_polling++; 983 /* Some broken BIOSes do not recover these values */ 984 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 985 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 986 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 987 if (sc->sc_intre) 988 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 989 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 990 if (sc->sc_control) 991 ctl = sc->sc_control; 992 else 993 ctl = OREAD4(sc, OHCI_CONTROL); 994 ctl |= OHCI_HCFS_RESUME; 995 OWRITE4(sc, OHCI_CONTROL, ctl); 996 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 997 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 998 OWRITE4(sc, OHCI_CONTROL, ctl); 999 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1000 sc->sc_control = sc->sc_intre = 0; 1001 sc->sc_bus.use_polling--; 1002 break; 1003 case PWR_SOFTSUSPEND: 1004 case PWR_SOFTSTANDBY: 1005 case PWR_SOFTRESUME: 1006 break; 1007 } 1008 splx(s); 1009 } 1010 1011 #ifdef OHCI_DEBUG 1012 void 1013 ohci_dumpregs(ohci_softc_t *sc) 1014 { 1015 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1016 OREAD4(sc, OHCI_REVISION), 1017 OREAD4(sc, OHCI_CONTROL), 1018 OREAD4(sc, OHCI_COMMAND_STATUS))); 1019 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1020 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1021 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1022 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1023 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1024 OREAD4(sc, OHCI_HCCA), 1025 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1026 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1027 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1028 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1029 OREAD4(sc, OHCI_BULK_HEAD_ED), 1030 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1031 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1032 OREAD4(sc, OHCI_DONE_HEAD), 1033 OREAD4(sc, OHCI_FM_INTERVAL), 1034 OREAD4(sc, OHCI_FM_REMAINING))); 1035 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1036 OREAD4(sc, OHCI_FM_NUMBER), 1037 OREAD4(sc, OHCI_PERIODIC_START), 1038 OREAD4(sc, OHCI_LS_THRESHOLD))); 1039 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1040 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1041 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1042 OREAD4(sc, OHCI_RH_STATUS))); 1043 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1044 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1045 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1046 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1047 le32toh(sc->sc_hcca->hcca_frame_number), 1048 le32toh(sc->sc_hcca->hcca_done_head))); 1049 } 1050 #endif 1051 1052 Static int ohci_intr1(ohci_softc_t *); 1053 1054 int 1055 ohci_intr(void *p) 1056 { 1057 ohci_softc_t *sc = p; 1058 1059 /* If we get an interrupt while polling, then just ignore it. */ 1060 if (sc->sc_bus.use_polling) { 1061 #ifdef DIAGNOSTIC 1062 printf("ohci_intr: ignored interrupt while polling\n"); 1063 #endif 1064 return (0); 1065 } 1066 1067 return (ohci_intr1(sc)); 1068 } 1069 1070 Static int 1071 ohci_intr1(ohci_softc_t *sc) 1072 { 1073 u_int32_t intrs, eintrs; 1074 ohci_physaddr_t done; 1075 1076 DPRINTFN(14,("ohci_intr1: enter\n")); 1077 1078 /* In case the interrupt occurs before initialization has completed. */ 1079 if (sc == NULL || sc->sc_hcca == NULL) { 1080 #ifdef DIAGNOSTIC 1081 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1082 #endif 1083 return (0); 1084 } 1085 1086 intrs = 0; 1087 done = le32toh(sc->sc_hcca->hcca_done_head); 1088 if (done != 0) { 1089 if (done & ~OHCI_DONE_INTRS) 1090 intrs = OHCI_WDH; 1091 if (done & OHCI_DONE_INTRS) 1092 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1093 } else 1094 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1095 1096 if (!intrs) 1097 return (0); 1098 1099 intrs &= ~OHCI_MIE; 1100 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1101 eintrs = intrs & sc->sc_eintrs; 1102 if (!eintrs) 1103 return (0); 1104 1105 sc->sc_bus.intr_context++; 1106 sc->sc_bus.no_intrs++; 1107 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1108 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1109 (u_int)eintrs)); 1110 1111 if (eintrs & OHCI_SO) { 1112 sc->sc_overrun_cnt++; 1113 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1114 printf("%s: %u scheduling overruns\n", 1115 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1116 sc->sc_overrun_cnt = 0; 1117 } 1118 /* XXX do what */ 1119 eintrs &= ~OHCI_SO; 1120 } 1121 if (eintrs & OHCI_WDH) { 1122 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1123 sc->sc_hcca->hcca_done_head = 0; 1124 usb_schedsoftintr(&sc->sc_bus); 1125 eintrs &= ~OHCI_WDH; 1126 } 1127 if (eintrs & OHCI_RD) { 1128 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1129 /* XXX process resume detect */ 1130 } 1131 if (eintrs & OHCI_UE) { 1132 printf("%s: unrecoverable error, controller halted\n", 1133 USBDEVNAME(sc->sc_bus.bdev)); 1134 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1135 /* XXX what else */ 1136 } 1137 if (eintrs & OHCI_RHSC) { 1138 ohci_rhsc(sc, sc->sc_intrxfer); 1139 /* 1140 * Disable RHSC interrupt for now, because it will be 1141 * on until the port has been reset. 1142 */ 1143 ohci_rhsc_able(sc, 0); 1144 /* Do not allow RHSC interrupts > 1 per second */ 1145 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1146 eintrs &= ~OHCI_RHSC; 1147 } 1148 1149 sc->sc_bus.intr_context--; 1150 1151 if (eintrs != 0) { 1152 /* Block unprocessed interrupts. XXX */ 1153 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1154 sc->sc_eintrs &= ~eintrs; 1155 printf("%s: blocking intrs 0x%x\n", 1156 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1157 } 1158 1159 return (1); 1160 } 1161 1162 void 1163 ohci_rhsc_able(ohci_softc_t *sc, int on) 1164 { 1165 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1166 if (on) { 1167 sc->sc_eintrs |= OHCI_RHSC; 1168 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1169 } else { 1170 sc->sc_eintrs &= ~OHCI_RHSC; 1171 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1172 } 1173 } 1174 1175 void 1176 ohci_rhsc_enable(void *v_sc) 1177 { 1178 ohci_softc_t *sc = v_sc; 1179 1180 ohci_rhsc_able(sc, 1); 1181 } 1182 1183 #ifdef OHCI_DEBUG 1184 char *ohci_cc_strs[] = { 1185 "NO_ERROR", 1186 "CRC", 1187 "BIT_STUFFING", 1188 "DATA_TOGGLE_MISMATCH", 1189 "STALL", 1190 "DEVICE_NOT_RESPONDING", 1191 "PID_CHECK_FAILURE", 1192 "UNEXPECTED_PID", 1193 "DATA_OVERRUN", 1194 "DATA_UNDERRUN", 1195 "BUFFER_OVERRUN", 1196 "BUFFER_UNDERRUN", 1197 "reserved", 1198 "reserved", 1199 "NOT_ACCESSED", 1200 "NOT_ACCESSED", 1201 }; 1202 #endif 1203 1204 void 1205 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1206 { 1207 ohci_soft_itd_t *sitd, *sidone, **ip; 1208 ohci_soft_td_t *std, *sdone, **p; 1209 1210 /* Reverse the done list. */ 1211 for (sdone = NULL, sidone = NULL; done != 0; ) { 1212 std = ohci_hash_find_td(sc, done); 1213 if (std != NULL) { 1214 std->dnext = sdone; 1215 done = le32toh(std->td.td_nexttd); 1216 sdone = std; 1217 DPRINTFN(10,("add TD %p\n", std)); 1218 continue; 1219 } 1220 sitd = ohci_hash_find_itd(sc, done); 1221 if (sitd != NULL) { 1222 sitd->dnext = sidone; 1223 done = le32toh(sitd->itd.itd_nextitd); 1224 sidone = sitd; 1225 DPRINTFN(5,("add ITD %p\n", sitd)); 1226 continue; 1227 } 1228 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1229 } 1230 1231 /* sdone & sidone now hold the done lists. */ 1232 /* Put them on the already processed lists. */ 1233 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1234 ; 1235 *p = sdone; 1236 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1237 ; 1238 *ip = sidone; 1239 } 1240 1241 void 1242 ohci_softintr(void *v) 1243 { 1244 ohci_softc_t *sc = v; 1245 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1246 ohci_soft_td_t *std, *sdone, *stdnext; 1247 usbd_xfer_handle xfer; 1248 int len, cc, s; 1249 1250 DPRINTFN(10,("ohci_softintr: enter\n:")); 1251 1252 sc->sc_bus.intr_context++; 1253 1254 s = splhardusb(); 1255 sdone = sc->sc_sdone; 1256 sc->sc_sdone = NULL; 1257 sidone = sc->sc_sidone; 1258 sc->sc_sidone = NULL; 1259 splx(s); 1260 1261 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1262 1263 #ifdef OHCI_DEBUG 1264 if (ohcidebug > 10) { 1265 DPRINTF(("ohci_process_done: TD done:\n")); 1266 ohci_dump_tds(sdone); 1267 } 1268 #endif 1269 1270 for (std = sdone; std; std = stdnext) { 1271 xfer = std->xfer; 1272 stdnext = std->dnext; 1273 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1274 std, xfer, xfer ? xfer->hcpriv : 0)); 1275 if (xfer == NULL) { 1276 /* xfer == NULL: There seems to be no xfer associated 1277 * with this TD. It is tailp that happened to end up on 1278 * the done queue. 1279 */ 1280 continue; 1281 } 1282 if (xfer->status == USBD_CANCELLED || 1283 xfer->status == USBD_TIMEOUT) { 1284 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1285 xfer)); 1286 /* Handled by abort routine. */ 1287 continue; 1288 } 1289 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1290 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1291 if (cc == OHCI_CC_NO_ERROR) { 1292 len = std->len; 1293 if (std->td.td_cbp != 0) 1294 len -= le32toh(std->td.td_be) - 1295 le32toh(std->td.td_cbp) + 1; 1296 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1297 len, std->flags)); 1298 if (std->flags & OHCI_ADD_LEN) 1299 xfer->actlen += len; 1300 if (std->flags & OHCI_CALL_DONE) { 1301 xfer->status = USBD_NORMAL_COMPLETION; 1302 usb_transfer_complete(xfer); 1303 } 1304 ohci_free_std(sc, std); 1305 } else { 1306 /* 1307 * Endpoint is halted. First unlink all the TDs 1308 * belonging to the failed transfer, and then restart 1309 * the endpoint. 1310 */ 1311 ohci_soft_td_t *p, *n; 1312 struct ohci_pipe *opipe = 1313 (struct ohci_pipe *)xfer->pipe; 1314 1315 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1316 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1317 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1318 1319 /* remove TDs */ 1320 for (p = std; p->xfer == xfer; p = n) { 1321 n = p->nexttd; 1322 ohci_free_std(sc, p); 1323 } 1324 1325 /* clear halt */ 1326 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1327 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1328 1329 if (cc == OHCI_CC_STALL) 1330 xfer->status = USBD_STALLED; 1331 else 1332 xfer->status = USBD_IOERROR; 1333 usb_transfer_complete(xfer); 1334 } 1335 } 1336 1337 #ifdef OHCI_DEBUG 1338 if (ohcidebug > 10) { 1339 DPRINTF(("ohci_softintr: ITD done:\n")); 1340 ohci_dump_itds(sidone); 1341 } 1342 #endif 1343 1344 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1345 xfer = sitd->xfer; 1346 sitdnext = sitd->dnext; 1347 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1348 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1349 if (xfer == NULL) 1350 continue; 1351 if (xfer->status == USBD_CANCELLED || 1352 xfer->status == USBD_TIMEOUT) { 1353 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1354 xfer)); 1355 /* Handled by abort routine. */ 1356 continue; 1357 } 1358 #ifdef DIAGNOSTIC 1359 if (sitd->isdone) 1360 printf("ohci_softintr: sitd=%p is done\n", sitd); 1361 sitd->isdone = 1; 1362 #endif 1363 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1364 if (cc == OHCI_CC_NO_ERROR) { 1365 /* XXX compute length for input */ 1366 struct ohci_pipe *opipe = 1367 (struct ohci_pipe *)xfer->pipe; 1368 if (sitd->flags & OHCI_CALL_DONE) { 1369 opipe->u.iso.inuse -= xfer->nframes; 1370 /* XXX update frlengths with actual length */ 1371 /* XXX xfer->actlen = actlen; */ 1372 xfer->status = USBD_NORMAL_COMPLETION; 1373 usb_transfer_complete(xfer); 1374 } 1375 } else { 1376 /* XXX Do more */ 1377 xfer->status = USBD_IOERROR; 1378 usb_transfer_complete(xfer); 1379 } 1380 } 1381 1382 sc->sc_bus.intr_context--; 1383 DPRINTFN(10,("ohci_softintr: done:\n")); 1384 } 1385 1386 void 1387 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1388 { 1389 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1390 1391 #ifdef DIAGNOSTIC 1392 if (!(xfer->rqflags & URQ_REQUEST)) { 1393 panic("ohci_ctrl_done: not a request\n"); 1394 } 1395 #endif 1396 xfer->hcpriv = NULL; 1397 } 1398 1399 void 1400 ohci_device_intr_done(usbd_xfer_handle xfer) 1401 { 1402 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1403 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1404 ohci_soft_ed_t *sed = opipe->sed; 1405 ohci_soft_td_t *data, *tail; 1406 1407 1408 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1409 xfer, xfer->actlen)); 1410 1411 xfer->hcpriv = NULL; 1412 1413 if (xfer->pipe->repeat) { 1414 data = opipe->tail.td; 1415 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1416 if (tail == NULL) { 1417 xfer->status = USBD_NOMEM; 1418 return; 1419 } 1420 tail->xfer = NULL; 1421 1422 data->td.td_flags = htole32( 1423 OHCI_TD_IN | OHCI_TD_NOCC | 1424 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1425 if (xfer->flags & USBD_SHORT_XFER_OK) 1426 data->td.td_flags |= htole32(OHCI_TD_R); 1427 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1428 data->nexttd = tail; 1429 data->td.td_nexttd = htole32(tail->physaddr); 1430 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1431 xfer->length - 1); 1432 data->len = xfer->length; 1433 data->xfer = xfer; 1434 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1435 xfer->hcpriv = data; 1436 xfer->actlen = 0; 1437 1438 sed->ed.ed_tailp = htole32(tail->physaddr); 1439 opipe->tail.td = tail; 1440 } 1441 } 1442 1443 void 1444 ohci_device_bulk_done(usbd_xfer_handle xfer) 1445 { 1446 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1447 xfer, xfer->actlen)); 1448 1449 xfer->hcpriv = NULL; 1450 } 1451 1452 void 1453 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1454 { 1455 usbd_pipe_handle pipe; 1456 struct ohci_pipe *opipe; 1457 u_char *p; 1458 int i, m; 1459 int hstatus; 1460 1461 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1462 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1463 sc, xfer, hstatus)); 1464 1465 if (xfer == NULL) { 1466 /* Just ignore the change. */ 1467 return; 1468 } 1469 1470 pipe = xfer->pipe; 1471 opipe = (struct ohci_pipe *)pipe; 1472 1473 p = KERNADDR(&xfer->dmabuf); 1474 m = min(sc->sc_noport, xfer->length * 8 - 1); 1475 memset(p, 0, xfer->length); 1476 for (i = 1; i <= m; i++) { 1477 /* Pick out CHANGE bits from the status reg. */ 1478 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1479 p[i/8] |= 1 << (i%8); 1480 } 1481 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1482 xfer->actlen = xfer->length; 1483 xfer->status = USBD_NORMAL_COMPLETION; 1484 1485 usb_transfer_complete(xfer); 1486 } 1487 1488 void 1489 ohci_root_intr_done(usbd_xfer_handle xfer) 1490 { 1491 xfer->hcpriv = NULL; 1492 } 1493 1494 void 1495 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1496 { 1497 xfer->hcpriv = NULL; 1498 } 1499 1500 /* 1501 * Wait here until controller claims to have an interrupt. 1502 * Then call ohci_intr and return. Use timeout to avoid waiting 1503 * too long. 1504 */ 1505 void 1506 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1507 { 1508 int timo = xfer->timeout; 1509 int usecs; 1510 u_int32_t intrs; 1511 1512 xfer->status = USBD_IN_PROGRESS; 1513 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1514 usb_delay_ms(&sc->sc_bus, 1); 1515 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1516 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1517 #ifdef OHCI_DEBUG 1518 if (ohcidebug > 15) 1519 ohci_dumpregs(sc); 1520 #endif 1521 if (intrs) { 1522 ohci_intr1(sc); 1523 if (xfer->status != USBD_IN_PROGRESS) 1524 return; 1525 } 1526 } 1527 1528 /* Timeout */ 1529 DPRINTF(("ohci_waitintr: timeout\n")); 1530 xfer->status = USBD_TIMEOUT; 1531 usb_transfer_complete(xfer); 1532 /* XXX should free TD */ 1533 } 1534 1535 void 1536 ohci_poll(struct usbd_bus *bus) 1537 { 1538 ohci_softc_t *sc = (ohci_softc_t *)bus; 1539 #ifdef OHCI_DEBUG 1540 static int last; 1541 int new; 1542 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1543 if (new != last) { 1544 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1545 last = new; 1546 } 1547 #endif 1548 1549 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1550 ohci_intr1(sc); 1551 } 1552 1553 usbd_status 1554 ohci_device_request(usbd_xfer_handle xfer) 1555 { 1556 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1557 usb_device_request_t *req = &xfer->request; 1558 usbd_device_handle dev = opipe->pipe.device; 1559 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1560 int addr = dev->address; 1561 ohci_soft_td_t *setup, *stat, *next, *tail; 1562 ohci_soft_ed_t *sed; 1563 int isread; 1564 int len; 1565 usbd_status err; 1566 int s; 1567 1568 isread = req->bmRequestType & UT_READ; 1569 len = UGETW(req->wLength); 1570 1571 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1572 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1573 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1574 UGETW(req->wIndex), len, addr, 1575 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1576 1577 setup = opipe->tail.td; 1578 stat = ohci_alloc_std(sc); 1579 if (stat == NULL) { 1580 err = USBD_NOMEM; 1581 goto bad1; 1582 } 1583 tail = ohci_alloc_std(sc); 1584 if (tail == NULL) { 1585 err = USBD_NOMEM; 1586 goto bad2; 1587 } 1588 tail->xfer = NULL; 1589 1590 sed = opipe->sed; 1591 opipe->u.ctl.length = len; 1592 1593 /* Update device address and length since they may have changed. */ 1594 /* XXX This only needs to be done once, but it's too early in open. */ 1595 /* XXXX Should not touch ED here! */ 1596 sed->ed.ed_flags = htole32( 1597 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1598 OHCI_ED_SET_FA(addr) | 1599 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1600 1601 next = stat; 1602 1603 /* Set up data transaction */ 1604 if (len != 0) { 1605 ohci_soft_td_t *std = stat; 1606 1607 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1608 std, &stat); 1609 stat = stat->nexttd; /* point at free TD */ 1610 if (err) 1611 goto bad3; 1612 /* Start toggle at 1 and then use the carried toggle. */ 1613 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1614 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1615 } 1616 1617 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1618 1619 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1620 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1621 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1622 setup->nexttd = next; 1623 setup->td.td_nexttd = htole32(next->physaddr); 1624 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1625 setup->len = 0; 1626 setup->xfer = xfer; 1627 setup->flags = 0; 1628 xfer->hcpriv = setup; 1629 1630 stat->td.td_flags = htole32( 1631 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1632 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1633 stat->td.td_cbp = 0; 1634 stat->nexttd = tail; 1635 stat->td.td_nexttd = htole32(tail->physaddr); 1636 stat->td.td_be = 0; 1637 stat->flags = OHCI_CALL_DONE; 1638 stat->len = 0; 1639 stat->xfer = xfer; 1640 1641 #ifdef OHCI_DEBUG 1642 if (ohcidebug > 5) { 1643 DPRINTF(("ohci_device_request:\n")); 1644 ohci_dump_ed(sed); 1645 ohci_dump_tds(setup); 1646 } 1647 #endif 1648 1649 /* Insert ED in schedule */ 1650 s = splusb(); 1651 sed->ed.ed_tailp = htole32(tail->physaddr); 1652 opipe->tail.td = tail; 1653 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1654 if (xfer->timeout && !sc->sc_bus.use_polling) { 1655 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1656 ohci_timeout, xfer); 1657 } 1658 splx(s); 1659 1660 #if 0 1661 if (ohcidebug > 10) { 1662 delay(10000); 1663 DPRINTF(("ohci_device_request: status=%x\n", 1664 OREAD4(sc, OHCI_COMMAND_STATUS))); 1665 ohci_dump_ed(sed); 1666 ohci_dump_tds(setup); 1667 } 1668 #endif 1669 1670 return (USBD_NORMAL_COMPLETION); 1671 1672 bad3: 1673 ohci_free_std(sc, tail); 1674 bad2: 1675 ohci_free_std(sc, stat); 1676 bad1: 1677 return (err); 1678 } 1679 1680 /* 1681 * Add an ED to the schedule. Called at splusb(). 1682 */ 1683 void 1684 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1685 { 1686 SPLUSBCHECK; 1687 sed->next = head->next; 1688 sed->ed.ed_nexted = head->ed.ed_nexted; 1689 head->next = sed; 1690 head->ed.ed_nexted = htole32(sed->physaddr); 1691 } 1692 1693 /* 1694 * Remove an ED from the schedule. Called at splusb(). 1695 */ 1696 void 1697 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1698 { 1699 ohci_soft_ed_t *p; 1700 1701 SPLUSBCHECK; 1702 1703 /* XXX */ 1704 for (p = head; p == NULL && p->next != sed; p = p->next) 1705 ; 1706 if (p == NULL) 1707 panic("ohci_rem_ed: ED not found\n"); 1708 p->next = sed->next; 1709 p->ed.ed_nexted = sed->ed.ed_nexted; 1710 } 1711 1712 /* 1713 * When a transfer is completed the TD is added to the done queue by 1714 * the host controller. This queue is the processed by software. 1715 * Unfortunately the queue contains the physical address of the TD 1716 * and we have no simple way to translate this back to a kernel address. 1717 * To make the translation possible (and fast) we use a hash table of 1718 * TDs currently in the schedule. The physical address is used as the 1719 * hash value. 1720 */ 1721 1722 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1723 /* Called at splusb() */ 1724 void 1725 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1726 { 1727 int h = HASH(std->physaddr); 1728 1729 SPLUSBCHECK; 1730 1731 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1732 } 1733 1734 /* Called at splusb() */ 1735 void 1736 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1737 { 1738 SPLUSBCHECK; 1739 1740 LIST_REMOVE(std, hnext); 1741 } 1742 1743 ohci_soft_td_t * 1744 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1745 { 1746 int h = HASH(a); 1747 ohci_soft_td_t *std; 1748 1749 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1750 std != NULL; 1751 std = LIST_NEXT(std, hnext)) 1752 if (std->physaddr == a) 1753 return (std); 1754 return (NULL); 1755 } 1756 1757 /* Called at splusb() */ 1758 void 1759 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1760 { 1761 int h = HASH(sitd->physaddr); 1762 1763 SPLUSBCHECK; 1764 1765 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1766 sitd, (u_long)sitd->physaddr)); 1767 1768 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1769 } 1770 1771 /* Called at splusb() */ 1772 void 1773 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1774 { 1775 SPLUSBCHECK; 1776 1777 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1778 sitd, (u_long)sitd->physaddr)); 1779 1780 LIST_REMOVE(sitd, hnext); 1781 } 1782 1783 ohci_soft_itd_t * 1784 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1785 { 1786 int h = HASH(a); 1787 ohci_soft_itd_t *sitd; 1788 1789 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1790 sitd != NULL; 1791 sitd = LIST_NEXT(sitd, hnext)) 1792 if (sitd->physaddr == a) 1793 return (sitd); 1794 return (NULL); 1795 } 1796 1797 void 1798 ohci_timeout(void *addr) 1799 { 1800 usbd_xfer_handle xfer = addr; 1801 int s; 1802 1803 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1804 1805 s = splusb(); 1806 xfer->device->bus->intr_context++; 1807 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1808 xfer->device->bus->intr_context--; 1809 splx(s); 1810 } 1811 1812 #ifdef OHCI_DEBUG 1813 void 1814 ohci_dump_tds(ohci_soft_td_t *std) 1815 { 1816 for (; std; std = std->nexttd) 1817 ohci_dump_td(std); 1818 } 1819 1820 void 1821 ohci_dump_td(ohci_soft_td_t *std) 1822 { 1823 char sbuf[128]; 1824 1825 bitmask_snprintf((int)le32toh(std->td.td_flags), 1826 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1827 sbuf, sizeof(sbuf)); 1828 1829 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1830 "nexttd=0x%08lx be=0x%08lx\n", 1831 std, (u_long)std->physaddr, sbuf, 1832 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1833 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1834 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1835 (u_long)le32toh(std->td.td_cbp), 1836 (u_long)le32toh(std->td.td_nexttd), 1837 (u_long)le32toh(std->td.td_be)); 1838 } 1839 1840 void 1841 ohci_dump_itd(ohci_soft_itd_t *sitd) 1842 { 1843 int i; 1844 1845 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1846 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1847 sitd, (u_long)sitd->physaddr, 1848 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1849 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1850 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1851 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1852 (u_long)le32toh(sitd->itd.itd_bp0), 1853 (u_long)le32toh(sitd->itd.itd_nextitd), 1854 (u_long)le32toh(sitd->itd.itd_be)); 1855 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1856 printf("offs[%d]=0x%04x ", i, 1857 (u_int)le16toh(sitd->itd.itd_offset[i])); 1858 printf("\n"); 1859 } 1860 1861 void 1862 ohci_dump_itds(ohci_soft_itd_t *sitd) 1863 { 1864 for (; sitd; sitd = sitd->nextitd) 1865 ohci_dump_itd(sitd); 1866 } 1867 1868 void 1869 ohci_dump_ed(ohci_soft_ed_t *sed) 1870 { 1871 char sbuf[128], sbuf2[128]; 1872 1873 bitmask_snprintf((int)le32toh(sed->ed.ed_flags), 1874 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1875 sbuf, sizeof(sbuf)); 1876 bitmask_snprintf((u_long)le32toh(sed->ed.ed_headp), 1877 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1878 1879 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1880 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1881 sed, (u_long)sed->physaddr, 1882 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1883 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1884 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1885 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1886 (u_long)le32toh(sed->ed.ed_headp), 1887 (u_long)le32toh(sed->ed.ed_nexted)); 1888 } 1889 #endif 1890 1891 usbd_status 1892 ohci_open(usbd_pipe_handle pipe) 1893 { 1894 usbd_device_handle dev = pipe->device; 1895 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1896 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1897 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1898 u_int8_t addr = dev->address; 1899 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1900 ohci_soft_ed_t *sed; 1901 ohci_soft_td_t *std; 1902 ohci_soft_itd_t *sitd; 1903 ohci_physaddr_t tdphys; 1904 u_int32_t fmt; 1905 usbd_status err; 1906 int s; 1907 int ival; 1908 1909 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1910 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1911 1912 std = NULL; 1913 sed = NULL; 1914 1915 if (addr == sc->sc_addr) { 1916 switch (ed->bEndpointAddress) { 1917 case USB_CONTROL_ENDPOINT: 1918 pipe->methods = &ohci_root_ctrl_methods; 1919 break; 1920 case UE_DIR_IN | OHCI_INTR_ENDPT: 1921 pipe->methods = &ohci_root_intr_methods; 1922 break; 1923 default: 1924 return (USBD_INVAL); 1925 } 1926 } else { 1927 sed = ohci_alloc_sed(sc); 1928 if (sed == NULL) 1929 goto bad0; 1930 opipe->sed = sed; 1931 if (xfertype == UE_ISOCHRONOUS) { 1932 sitd = ohci_alloc_sitd(sc); 1933 if (sitd == NULL) { 1934 ohci_free_sitd(sc, sitd); 1935 goto bad1; 1936 } 1937 opipe->tail.itd = sitd; 1938 tdphys = sitd->physaddr; 1939 fmt = OHCI_ED_FORMAT_ISO; 1940 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1941 fmt |= OHCI_ED_DIR_IN; 1942 else 1943 fmt |= OHCI_ED_DIR_OUT; 1944 } else { 1945 std = ohci_alloc_std(sc); 1946 if (std == NULL) { 1947 ohci_free_std(sc, std); 1948 goto bad1; 1949 } 1950 opipe->tail.td = std; 1951 tdphys = std->physaddr; 1952 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1953 } 1954 sed->ed.ed_flags = htole32( 1955 OHCI_ED_SET_FA(addr) | 1956 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1957 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 1958 fmt | 1959 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1960 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1961 1962 switch (xfertype) { 1963 case UE_CONTROL: 1964 pipe->methods = &ohci_device_ctrl_methods; 1965 err = usb_allocmem(&sc->sc_bus, 1966 sizeof(usb_device_request_t), 1967 0, &opipe->u.ctl.reqdma); 1968 if (err) 1969 goto bad; 1970 s = splusb(); 1971 ohci_add_ed(sed, sc->sc_ctrl_head); 1972 splx(s); 1973 break; 1974 case UE_INTERRUPT: 1975 pipe->methods = &ohci_device_intr_methods; 1976 ival = pipe->interval; 1977 if (ival == USBD_DEFAULT_INTERVAL) 1978 ival = ed->bInterval; 1979 return (ohci_device_setintr(sc, opipe, ival)); 1980 case UE_ISOCHRONOUS: 1981 pipe->methods = &ohci_device_isoc_methods; 1982 return (ohci_setup_isoc(pipe)); 1983 case UE_BULK: 1984 pipe->methods = &ohci_device_bulk_methods; 1985 s = splusb(); 1986 ohci_add_ed(sed, sc->sc_bulk_head); 1987 splx(s); 1988 break; 1989 } 1990 } 1991 return (USBD_NORMAL_COMPLETION); 1992 1993 bad: 1994 if (std != NULL) 1995 ohci_free_std(sc, std); 1996 bad1: 1997 if (sed != NULL) 1998 ohci_free_sed(sc, sed); 1999 bad0: 2000 return (USBD_NOMEM); 2001 2002 } 2003 2004 /* 2005 * Close a reqular pipe. 2006 * Assumes that there are no pending transactions. 2007 */ 2008 void 2009 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2010 { 2011 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2012 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2013 ohci_soft_ed_t *sed = opipe->sed; 2014 int s; 2015 2016 s = splusb(); 2017 #ifdef DIAGNOSTIC 2018 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2019 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2020 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2021 ohci_soft_td_t *std; 2022 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2023 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2024 "tl=0x%x pipe=%p, std=%p\n", sed, 2025 (int)le32toh(sed->ed.ed_headp), 2026 (int)le32toh(sed->ed.ed_tailp), 2027 pipe, std); 2028 #ifdef USB_DEBUG 2029 usbd_dump_pipe(&opipe->pipe); 2030 #endif 2031 #ifdef OHCI_DEBUG 2032 ohci_dump_ed(sed); 2033 if (std) 2034 ohci_dump_td(std); 2035 #endif 2036 usb_delay_ms(&sc->sc_bus, 2); 2037 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2038 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2039 printf("ohci_close_pipe: pipe still not empty\n"); 2040 } 2041 #endif 2042 ohci_rem_ed(sed, head); 2043 splx(s); 2044 ohci_free_sed(sc, opipe->sed); 2045 } 2046 2047 /* 2048 * Abort a device request. 2049 * If this routine is called at splusb() it guarantees that the request 2050 * will be removed from the hardware scheduling and that the callback 2051 * for it will be called with USBD_CANCELLED status. 2052 * It's impossible to guarantee that the requested transfer will not 2053 * have happened since the hardware runs concurrently. 2054 * If the transaction has already happened we rely on the ordinary 2055 * interrupt processing to process it. 2056 */ 2057 void 2058 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2059 { 2060 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2061 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2062 ohci_soft_ed_t *sed = opipe->sed; 2063 ohci_soft_td_t *p, *n; 2064 ohci_physaddr_t headp; 2065 int s, hit; 2066 2067 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2068 2069 if (xfer->device->bus->intr_context || !curproc) 2070 panic("ohci_abort_xfer: not in process context\n"); 2071 2072 /* 2073 * Step 1: Make interrupt routine and hardware ignore xfer. 2074 */ 2075 s = splusb(); 2076 xfer->status = status; /* make software ignore it */ 2077 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2078 splx(s); 2079 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2080 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2081 2082 /* 2083 * Step 2: Wait until we know hardware has finished any possible 2084 * use of the xfer. Also make sure the soft interrupt routine 2085 * has run. 2086 */ 2087 usb_delay_ms(opipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 2088 /* XXX should have some communication with softintr() to know 2089 when it's done */ 2090 usb_delay_ms(opipe->pipe.device->bus, 250); 2091 2092 /* 2093 * Step 3: Remove any vestiges of the xfer from the hardware. 2094 * The complication here is that the hardware may have executed 2095 * beyond the xfer we're trying to abort. So as we're scanning 2096 * the TDs of this xfer we check if the hardware points to 2097 * any of them. 2098 */ 2099 s = splusb(); /* XXX why? */ 2100 p = xfer->hcpriv; 2101 #ifdef DIAGNOSTIC 2102 if (p == NULL) { 2103 splx(s); 2104 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2105 return; 2106 } 2107 #endif 2108 #ifdef OHCI_DEBUG 2109 if (ohcidebug > 1) { 2110 DPRINTF(("ohci_abort_xfer: sed=\n")); 2111 ohci_dump_ed(sed); 2112 ohci_dump_tds(p); 2113 } 2114 #endif 2115 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2116 hit = 0; 2117 for (; p->xfer == xfer; p = n) { 2118 hit |= headp == p->physaddr; 2119 n = p->nexttd; 2120 ohci_free_std(sc, p); 2121 } 2122 /* Zap headp register if hardware pointed inside the xfer. */ 2123 if (hit) { 2124 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2125 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2126 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2127 } else { 2128 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2129 } 2130 2131 /* 2132 * Step 4: Turn on hardware again. 2133 */ 2134 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2135 2136 /* 2137 * Step 5: Execute callback. 2138 */ 2139 usb_transfer_complete(xfer); 2140 2141 splx(s); 2142 } 2143 2144 /* 2145 * Data structures and routines to emulate the root hub. 2146 */ 2147 Static usb_device_descriptor_t ohci_devd = { 2148 USB_DEVICE_DESCRIPTOR_SIZE, 2149 UDESC_DEVICE, /* type */ 2150 {0x00, 0x01}, /* USB version */ 2151 UDCLASS_HUB, /* class */ 2152 UDSUBCLASS_HUB, /* subclass */ 2153 UDPROTO_FSHUB, 2154 64, /* max packet */ 2155 {0},{0},{0x00,0x01}, /* device id */ 2156 1,2,0, /* string indicies */ 2157 1 /* # of configurations */ 2158 }; 2159 2160 Static usb_config_descriptor_t ohci_confd = { 2161 USB_CONFIG_DESCRIPTOR_SIZE, 2162 UDESC_CONFIG, 2163 {USB_CONFIG_DESCRIPTOR_SIZE + 2164 USB_INTERFACE_DESCRIPTOR_SIZE + 2165 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2166 1, 2167 1, 2168 0, 2169 UC_SELF_POWERED, 2170 0 /* max power */ 2171 }; 2172 2173 Static usb_interface_descriptor_t ohci_ifcd = { 2174 USB_INTERFACE_DESCRIPTOR_SIZE, 2175 UDESC_INTERFACE, 2176 0, 2177 0, 2178 1, 2179 UICLASS_HUB, 2180 UISUBCLASS_HUB, 2181 UIPROTO_FSHUB, 2182 0 2183 }; 2184 2185 Static usb_endpoint_descriptor_t ohci_endpd = { 2186 USB_ENDPOINT_DESCRIPTOR_SIZE, 2187 UDESC_ENDPOINT, 2188 UE_DIR_IN | OHCI_INTR_ENDPT, 2189 UE_INTERRUPT, 2190 {8, 0}, /* max packet */ 2191 255 2192 }; 2193 2194 Static usb_hub_descriptor_t ohci_hubd = { 2195 USB_HUB_DESCRIPTOR_SIZE, 2196 UDESC_HUB, 2197 0, 2198 {0,0}, 2199 0, 2200 0, 2201 {0}, 2202 }; 2203 2204 Static int 2205 ohci_str(p, l, s) 2206 usb_string_descriptor_t *p; 2207 int l; 2208 char *s; 2209 { 2210 int i; 2211 2212 if (l == 0) 2213 return (0); 2214 p->bLength = 2 * strlen(s) + 2; 2215 if (l == 1) 2216 return (1); 2217 p->bDescriptorType = UDESC_STRING; 2218 l -= 2; 2219 for (i = 0; s[i] && l > 1; i++, l -= 2) 2220 USETW2(p->bString[i], 0, s[i]); 2221 return (2*i+2); 2222 } 2223 2224 /* 2225 * Simulate a hardware hub by handling all the necessary requests. 2226 */ 2227 Static usbd_status 2228 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2229 { 2230 usbd_status err; 2231 2232 /* Insert last in queue. */ 2233 err = usb_insert_transfer(xfer); 2234 if (err) 2235 return (err); 2236 2237 /* Pipe isn't running, start first */ 2238 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2239 } 2240 2241 Static usbd_status 2242 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2243 { 2244 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2245 usb_device_request_t *req; 2246 void *buf = NULL; 2247 int port, i; 2248 int s, len, value, index, l, totlen = 0; 2249 usb_port_status_t ps; 2250 usb_hub_descriptor_t hubd; 2251 usbd_status err; 2252 u_int32_t v; 2253 2254 if (sc->sc_dying) 2255 return (USBD_IOERROR); 2256 2257 #ifdef DIAGNOSTIC 2258 if (!(xfer->rqflags & URQ_REQUEST)) 2259 /* XXX panic */ 2260 return (USBD_INVAL); 2261 #endif 2262 req = &xfer->request; 2263 2264 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2265 req->bmRequestType, req->bRequest)); 2266 2267 len = UGETW(req->wLength); 2268 value = UGETW(req->wValue); 2269 index = UGETW(req->wIndex); 2270 2271 if (len != 0) 2272 buf = KERNADDR(&xfer->dmabuf); 2273 2274 #define C(x,y) ((x) | ((y) << 8)) 2275 switch(C(req->bRequest, req->bmRequestType)) { 2276 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2277 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2278 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2279 /* 2280 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2281 * for the integrated root hub. 2282 */ 2283 break; 2284 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2285 if (len > 0) { 2286 *(u_int8_t *)buf = sc->sc_conf; 2287 totlen = 1; 2288 } 2289 break; 2290 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2291 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2292 switch(value >> 8) { 2293 case UDESC_DEVICE: 2294 if ((value & 0xff) != 0) { 2295 err = USBD_IOERROR; 2296 goto ret; 2297 } 2298 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2299 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2300 memcpy(buf, &ohci_devd, l); 2301 break; 2302 case UDESC_CONFIG: 2303 if ((value & 0xff) != 0) { 2304 err = USBD_IOERROR; 2305 goto ret; 2306 } 2307 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2308 memcpy(buf, &ohci_confd, l); 2309 buf = (char *)buf + l; 2310 len -= l; 2311 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2312 totlen += l; 2313 memcpy(buf, &ohci_ifcd, l); 2314 buf = (char *)buf + l; 2315 len -= l; 2316 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2317 totlen += l; 2318 memcpy(buf, &ohci_endpd, l); 2319 break; 2320 case UDESC_STRING: 2321 if (len == 0) 2322 break; 2323 *(u_int8_t *)buf = 0; 2324 totlen = 1; 2325 switch (value & 0xff) { 2326 case 1: /* Vendor */ 2327 totlen = ohci_str(buf, len, sc->sc_vendor); 2328 break; 2329 case 2: /* Product */ 2330 totlen = ohci_str(buf, len, "OHCI root hub"); 2331 break; 2332 } 2333 break; 2334 default: 2335 err = USBD_IOERROR; 2336 goto ret; 2337 } 2338 break; 2339 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2340 if (len > 0) { 2341 *(u_int8_t *)buf = 0; 2342 totlen = 1; 2343 } 2344 break; 2345 case C(UR_GET_STATUS, UT_READ_DEVICE): 2346 if (len > 1) { 2347 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2348 totlen = 2; 2349 } 2350 break; 2351 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2352 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2353 if (len > 1) { 2354 USETW(((usb_status_t *)buf)->wStatus, 0); 2355 totlen = 2; 2356 } 2357 break; 2358 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2359 if (value >= USB_MAX_DEVICES) { 2360 err = USBD_IOERROR; 2361 goto ret; 2362 } 2363 sc->sc_addr = value; 2364 break; 2365 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2366 if (value != 0 && value != 1) { 2367 err = USBD_IOERROR; 2368 goto ret; 2369 } 2370 sc->sc_conf = value; 2371 break; 2372 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2373 break; 2374 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2375 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2376 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2377 err = USBD_IOERROR; 2378 goto ret; 2379 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2380 break; 2381 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2382 break; 2383 /* Hub requests */ 2384 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2385 break; 2386 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2387 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2388 "port=%d feature=%d\n", 2389 index, value)); 2390 if (index < 1 || index > sc->sc_noport) { 2391 err = USBD_IOERROR; 2392 goto ret; 2393 } 2394 port = OHCI_RH_PORT_STATUS(index); 2395 switch(value) { 2396 case UHF_PORT_ENABLE: 2397 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2398 break; 2399 case UHF_PORT_SUSPEND: 2400 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2401 break; 2402 case UHF_PORT_POWER: 2403 /* Yes, writing to the LOW_SPEED bit clears power. */ 2404 OWRITE4(sc, port, UPS_LOW_SPEED); 2405 break; 2406 case UHF_C_PORT_CONNECTION: 2407 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2408 break; 2409 case UHF_C_PORT_ENABLE: 2410 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2411 break; 2412 case UHF_C_PORT_SUSPEND: 2413 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2414 break; 2415 case UHF_C_PORT_OVER_CURRENT: 2416 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2417 break; 2418 case UHF_C_PORT_RESET: 2419 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2420 break; 2421 default: 2422 err = USBD_IOERROR; 2423 goto ret; 2424 } 2425 switch(value) { 2426 case UHF_C_PORT_CONNECTION: 2427 case UHF_C_PORT_ENABLE: 2428 case UHF_C_PORT_SUSPEND: 2429 case UHF_C_PORT_OVER_CURRENT: 2430 case UHF_C_PORT_RESET: 2431 /* Enable RHSC interrupt if condition is cleared. */ 2432 if ((OREAD4(sc, port) >> 16) == 0) 2433 ohci_rhsc_able(sc, 1); 2434 break; 2435 default: 2436 break; 2437 } 2438 break; 2439 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2440 if (value != 0) { 2441 err = USBD_IOERROR; 2442 goto ret; 2443 } 2444 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2445 hubd = ohci_hubd; 2446 hubd.bNbrPorts = sc->sc_noport; 2447 USETW(hubd.wHubCharacteristics, 2448 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2449 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2450 /* XXX overcurrent */ 2451 ); 2452 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2453 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2454 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2455 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2456 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2457 l = min(len, hubd.bDescLength); 2458 totlen = l; 2459 memcpy(buf, &hubd, l); 2460 break; 2461 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2462 if (len != 4) { 2463 err = USBD_IOERROR; 2464 goto ret; 2465 } 2466 memset(buf, 0, len); /* ? XXX */ 2467 totlen = len; 2468 break; 2469 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2470 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2471 index)); 2472 if (index < 1 || index > sc->sc_noport) { 2473 err = USBD_IOERROR; 2474 goto ret; 2475 } 2476 if (len != 4) { 2477 err = USBD_IOERROR; 2478 goto ret; 2479 } 2480 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2481 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2482 v)); 2483 USETW(ps.wPortStatus, v); 2484 USETW(ps.wPortChange, v >> 16); 2485 l = min(len, sizeof ps); 2486 memcpy(buf, &ps, l); 2487 totlen = l; 2488 break; 2489 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2490 err = USBD_IOERROR; 2491 goto ret; 2492 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2493 break; 2494 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2495 if (index < 1 || index > sc->sc_noport) { 2496 err = USBD_IOERROR; 2497 goto ret; 2498 } 2499 port = OHCI_RH_PORT_STATUS(index); 2500 switch(value) { 2501 case UHF_PORT_ENABLE: 2502 OWRITE4(sc, port, UPS_PORT_ENABLED); 2503 break; 2504 case UHF_PORT_SUSPEND: 2505 OWRITE4(sc, port, UPS_SUSPEND); 2506 break; 2507 case UHF_PORT_RESET: 2508 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2509 index)); 2510 OWRITE4(sc, port, UPS_RESET); 2511 for (i = 0; i < 10; i++) { 2512 usb_delay_ms(&sc->sc_bus, 10); /* XXX */ 2513 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2514 break; 2515 } 2516 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2517 index, OREAD4(sc, port))); 2518 break; 2519 case UHF_PORT_POWER: 2520 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2521 "%d\n", index)); 2522 OWRITE4(sc, port, UPS_PORT_POWER); 2523 break; 2524 default: 2525 err = USBD_IOERROR; 2526 goto ret; 2527 } 2528 break; 2529 default: 2530 err = USBD_IOERROR; 2531 goto ret; 2532 } 2533 xfer->actlen = totlen; 2534 err = USBD_NORMAL_COMPLETION; 2535 ret: 2536 xfer->status = err; 2537 s = splusb(); 2538 usb_transfer_complete(xfer); 2539 splx(s); 2540 return (USBD_IN_PROGRESS); 2541 } 2542 2543 /* Abort a root control request. */ 2544 Static void 2545 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2546 { 2547 /* Nothing to do, all transfers are synchronous. */ 2548 } 2549 2550 /* Close the root pipe. */ 2551 Static void 2552 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2553 { 2554 DPRINTF(("ohci_root_ctrl_close\n")); 2555 /* Nothing to do. */ 2556 } 2557 2558 Static usbd_status 2559 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2560 { 2561 usbd_status err; 2562 2563 /* Insert last in queue. */ 2564 err = usb_insert_transfer(xfer); 2565 if (err) 2566 return (err); 2567 2568 /* Pipe isn't running, start first */ 2569 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2570 } 2571 2572 Static usbd_status 2573 ohci_root_intr_start(usbd_xfer_handle xfer) 2574 { 2575 usbd_pipe_handle pipe = xfer->pipe; 2576 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2577 2578 if (sc->sc_dying) 2579 return (USBD_IOERROR); 2580 2581 sc->sc_intrxfer = xfer; 2582 2583 return (USBD_IN_PROGRESS); 2584 } 2585 2586 /* Abort a root interrupt request. */ 2587 Static void 2588 ohci_root_intr_abort(usbd_xfer_handle xfer) 2589 { 2590 int s; 2591 2592 if (xfer->pipe->intrxfer == xfer) { 2593 DPRINTF(("ohci_root_intr_abort: remove\n")); 2594 xfer->pipe->intrxfer = NULL; 2595 } 2596 xfer->status = USBD_CANCELLED; 2597 s = splusb(); 2598 usb_transfer_complete(xfer); 2599 splx(s); 2600 } 2601 2602 /* Close the root pipe. */ 2603 Static void 2604 ohci_root_intr_close(usbd_pipe_handle pipe) 2605 { 2606 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2607 2608 DPRINTF(("ohci_root_intr_close\n")); 2609 2610 sc->sc_intrxfer = NULL; 2611 } 2612 2613 /************************/ 2614 2615 Static usbd_status 2616 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2617 { 2618 usbd_status err; 2619 2620 /* Insert last in queue. */ 2621 err = usb_insert_transfer(xfer); 2622 if (err) 2623 return (err); 2624 2625 /* Pipe isn't running, start first */ 2626 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2627 } 2628 2629 Static usbd_status 2630 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2631 { 2632 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2633 usbd_status err; 2634 2635 if (sc->sc_dying) 2636 return (USBD_IOERROR); 2637 2638 #ifdef DIAGNOSTIC 2639 if (!(xfer->rqflags & URQ_REQUEST)) { 2640 /* XXX panic */ 2641 printf("ohci_device_ctrl_transfer: not a request\n"); 2642 return (USBD_INVAL); 2643 } 2644 #endif 2645 2646 err = ohci_device_request(xfer); 2647 if (err) 2648 return (err); 2649 2650 if (sc->sc_bus.use_polling) 2651 ohci_waitintr(sc, xfer); 2652 return (USBD_IN_PROGRESS); 2653 } 2654 2655 /* Abort a device control request. */ 2656 Static void 2657 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2658 { 2659 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2660 ohci_abort_xfer(xfer, USBD_CANCELLED); 2661 } 2662 2663 /* Close a device control pipe. */ 2664 Static void 2665 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2666 { 2667 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2668 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2669 2670 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2671 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2672 ohci_free_std(sc, opipe->tail.td); 2673 } 2674 2675 /************************/ 2676 2677 Static void 2678 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2679 { 2680 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2681 2682 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2683 } 2684 2685 Static void 2686 ohci_noop(usbd_pipe_handle pipe) 2687 { 2688 } 2689 2690 Static usbd_status 2691 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2692 { 2693 usbd_status err; 2694 2695 /* Insert last in queue. */ 2696 err = usb_insert_transfer(xfer); 2697 if (err) 2698 return (err); 2699 2700 /* Pipe isn't running, start first */ 2701 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2702 } 2703 2704 Static usbd_status 2705 ohci_device_bulk_start(usbd_xfer_handle xfer) 2706 { 2707 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2708 usbd_device_handle dev = opipe->pipe.device; 2709 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2710 int addr = dev->address; 2711 ohci_soft_td_t *data, *tail, *tdp; 2712 ohci_soft_ed_t *sed; 2713 int s, len, isread, endpt; 2714 usbd_status err; 2715 2716 if (sc->sc_dying) 2717 return (USBD_IOERROR); 2718 2719 #ifdef DIAGNOSTIC 2720 if (xfer->rqflags & URQ_REQUEST) { 2721 /* XXX panic */ 2722 printf("ohci_device_bulk_start: a request\n"); 2723 return (USBD_INVAL); 2724 } 2725 #endif 2726 2727 len = xfer->length; 2728 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2729 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2730 sed = opipe->sed; 2731 2732 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2733 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2734 endpt)); 2735 2736 opipe->u.bulk.isread = isread; 2737 opipe->u.bulk.length = len; 2738 2739 /* Update device address */ 2740 sed->ed.ed_flags = htole32( 2741 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2742 OHCI_ED_SET_FA(addr)); 2743 2744 /* Allocate a chain of new TDs (including a new tail). */ 2745 data = opipe->tail.td; 2746 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2747 data, &tail); 2748 /* We want interrupt at the end of the transfer. */ 2749 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2750 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2751 tail->flags |= OHCI_CALL_DONE; 2752 tail = tail->nexttd; /* point at sentinel */ 2753 if (err) 2754 return (err); 2755 2756 tail->xfer = NULL; 2757 xfer->hcpriv = data; 2758 2759 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2760 "td_cbp=0x%08x td_be=0x%08x\n", 2761 (int)le32toh(sed->ed.ed_flags), 2762 (int)le32toh(data->td.td_flags), 2763 (int)le32toh(data->td.td_cbp), 2764 (int)le32toh(data->td.td_be))); 2765 2766 #ifdef OHCI_DEBUG 2767 if (ohcidebug > 5) { 2768 ohci_dump_ed(sed); 2769 ohci_dump_tds(data); 2770 } 2771 #endif 2772 2773 /* Insert ED in schedule */ 2774 s = splusb(); 2775 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2776 tdp->xfer = xfer; 2777 } 2778 sed->ed.ed_tailp = htole32(tail->physaddr); 2779 opipe->tail.td = tail; 2780 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2781 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2782 if (xfer->timeout && !sc->sc_bus.use_polling) { 2783 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2784 ohci_timeout, xfer); 2785 } 2786 2787 #if 0 2788 /* This goes wrong if we are too slow. */ 2789 if (ohcidebug > 10) { 2790 delay(10000); 2791 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2792 OREAD4(sc, OHCI_COMMAND_STATUS))); 2793 ohci_dump_ed(sed); 2794 ohci_dump_tds(data); 2795 } 2796 #endif 2797 2798 splx(s); 2799 2800 return (USBD_IN_PROGRESS); 2801 } 2802 2803 Static void 2804 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2805 { 2806 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2807 ohci_abort_xfer(xfer, USBD_CANCELLED); 2808 } 2809 2810 /* 2811 * Close a device bulk pipe. 2812 */ 2813 Static void 2814 ohci_device_bulk_close(usbd_pipe_handle pipe) 2815 { 2816 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2817 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2818 2819 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2820 ohci_close_pipe(pipe, sc->sc_bulk_head); 2821 ohci_free_std(sc, opipe->tail.td); 2822 } 2823 2824 /************************/ 2825 2826 Static usbd_status 2827 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2828 { 2829 usbd_status err; 2830 2831 /* Insert last in queue. */ 2832 err = usb_insert_transfer(xfer); 2833 if (err) 2834 return (err); 2835 2836 /* Pipe isn't running, start first */ 2837 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2838 } 2839 2840 Static usbd_status 2841 ohci_device_intr_start(usbd_xfer_handle xfer) 2842 { 2843 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2844 usbd_device_handle dev = opipe->pipe.device; 2845 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2846 ohci_soft_ed_t *sed = opipe->sed; 2847 ohci_soft_td_t *data, *tail; 2848 int len; 2849 int s; 2850 2851 if (sc->sc_dying) 2852 return (USBD_IOERROR); 2853 2854 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2855 "flags=%d priv=%p\n", 2856 xfer, xfer->length, xfer->flags, xfer->priv)); 2857 2858 #ifdef DIAGNOSTIC 2859 if (xfer->rqflags & URQ_REQUEST) 2860 panic("ohci_device_intr_transfer: a request\n"); 2861 #endif 2862 2863 len = xfer->length; 2864 2865 data = opipe->tail.td; 2866 tail = ohci_alloc_std(sc); 2867 if (tail == NULL) 2868 return (USBD_NOMEM); 2869 tail->xfer = NULL; 2870 2871 data->td.td_flags = htole32( 2872 OHCI_TD_IN | OHCI_TD_NOCC | 2873 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2874 if (xfer->flags & USBD_SHORT_XFER_OK) 2875 data->td.td_flags |= htole32(OHCI_TD_R); 2876 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2877 data->nexttd = tail; 2878 data->td.td_nexttd = htole32(tail->physaddr); 2879 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2880 data->len = len; 2881 data->xfer = xfer; 2882 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2883 xfer->hcpriv = data; 2884 2885 #ifdef OHCI_DEBUG 2886 if (ohcidebug > 5) { 2887 DPRINTF(("ohci_device_intr_transfer:\n")); 2888 ohci_dump_ed(sed); 2889 ohci_dump_tds(data); 2890 } 2891 #endif 2892 2893 /* Insert ED in schedule */ 2894 s = splusb(); 2895 sed->ed.ed_tailp = htole32(tail->physaddr); 2896 opipe->tail.td = tail; 2897 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2898 2899 #if 0 2900 /* 2901 * This goes horribly wrong, printing thousands of descriptors, 2902 * because false references are followed due to the fact that the 2903 * TD is gone. 2904 */ 2905 if (ohcidebug > 5) { 2906 usb_delay_ms(&sc->sc_bus, 5); 2907 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2908 OREAD4(sc, OHCI_COMMAND_STATUS))); 2909 ohci_dump_ed(sed); 2910 ohci_dump_tds(data); 2911 } 2912 #endif 2913 splx(s); 2914 2915 return (USBD_IN_PROGRESS); 2916 } 2917 2918 /* Abort a device control request. */ 2919 Static void 2920 ohci_device_intr_abort(usbd_xfer_handle xfer) 2921 { 2922 if (xfer->pipe->intrxfer == xfer) { 2923 DPRINTF(("ohci_device_intr_abort: remove\n")); 2924 xfer->pipe->intrxfer = NULL; 2925 } 2926 ohci_abort_xfer(xfer, USBD_CANCELLED); 2927 } 2928 2929 /* Close a device interrupt pipe. */ 2930 Static void 2931 ohci_device_intr_close(usbd_pipe_handle pipe) 2932 { 2933 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2934 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2935 int nslots = opipe->u.intr.nslots; 2936 int pos = opipe->u.intr.pos; 2937 int j; 2938 ohci_soft_ed_t *p, *sed = opipe->sed; 2939 int s; 2940 2941 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2942 pipe, nslots, pos)); 2943 s = splusb(); 2944 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2945 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2946 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2947 usb_delay_ms(&sc->sc_bus, 2); 2948 2949 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2950 ; 2951 #ifdef DIAGNOSTIC 2952 if (p == NULL) 2953 panic("ohci_device_intr_close: ED not found\n"); 2954 #endif 2955 p->next = sed->next; 2956 p->ed.ed_nexted = sed->ed.ed_nexted; 2957 splx(s); 2958 2959 for (j = 0; j < nslots; j++) 2960 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2961 2962 ohci_free_std(sc, opipe->tail.td); 2963 ohci_free_sed(sc, opipe->sed); 2964 } 2965 2966 Static usbd_status 2967 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2968 { 2969 int i, j, s, best; 2970 u_int npoll, slow, shigh, nslots; 2971 u_int bestbw, bw; 2972 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2973 2974 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2975 if (ival == 0) { 2976 printf("ohci_setintr: 0 interval\n"); 2977 return (USBD_INVAL); 2978 } 2979 2980 npoll = OHCI_NO_INTRS; 2981 while (npoll > ival) 2982 npoll /= 2; 2983 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2984 2985 /* 2986 * We now know which level in the tree the ED must go into. 2987 * Figure out which slot has most bandwidth left over. 2988 * Slots to examine: 2989 * npoll 2990 * 1 0 2991 * 2 1 2 2992 * 4 3 4 5 6 2993 * 8 7 8 9 10 11 12 13 14 2994 * N (N-1) .. (N-1+N-1) 2995 */ 2996 slow = npoll-1; 2997 shigh = slow + npoll; 2998 nslots = OHCI_NO_INTRS / npoll; 2999 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3000 bw = 0; 3001 for (j = 0; j < nslots; j++) 3002 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3003 if (bw < bestbw) { 3004 best = i; 3005 bestbw = bw; 3006 } 3007 } 3008 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3009 best, slow, shigh, bestbw)); 3010 3011 s = splusb(); 3012 hsed = sc->sc_eds[best]; 3013 sed->next = hsed->next; 3014 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3015 hsed->next = sed; 3016 hsed->ed.ed_nexted = htole32(sed->physaddr); 3017 splx(s); 3018 3019 for (j = 0; j < nslots; j++) 3020 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3021 opipe->u.intr.nslots = nslots; 3022 opipe->u.intr.pos = best; 3023 3024 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3025 return (USBD_NORMAL_COMPLETION); 3026 } 3027 3028 /***********************/ 3029 3030 usbd_status 3031 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3032 { 3033 usbd_status err; 3034 3035 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3036 3037 /* Put it on our queue, */ 3038 err = usb_insert_transfer(xfer); 3039 3040 /* bail out on error, */ 3041 if (err && err != USBD_IN_PROGRESS) 3042 return (err); 3043 3044 /* XXX should check inuse here */ 3045 3046 /* insert into schedule, */ 3047 ohci_device_isoc_enter(xfer); 3048 3049 /* and start if the pipe wasn't running */ 3050 if (!err) 3051 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3052 3053 return (err); 3054 } 3055 3056 void 3057 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3058 { 3059 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3060 usbd_device_handle dev = opipe->pipe.device; 3061 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3062 ohci_soft_ed_t *sed = opipe->sed; 3063 struct iso *iso = &opipe->u.iso; 3064 ohci_soft_itd_t *sitd, *nsitd; 3065 ohci_physaddr_t buf, offs, noffs, bp0; 3066 int i, ncur, nframes; 3067 int s; 3068 3069 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3070 "nframes=%d\n", 3071 iso->inuse, iso->next, xfer, xfer->nframes)); 3072 3073 if (sc->sc_dying) 3074 return; 3075 3076 if (iso->next == -1) { 3077 /* Not in use yet, schedule it a few frames ahead. */ 3078 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3079 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3080 iso->next)); 3081 } 3082 3083 sitd = opipe->tail.itd; 3084 buf = DMAADDR(&xfer->dmabuf); 3085 bp0 = OHCI_PAGE(buf); 3086 offs = OHCI_PAGE_OFFSET(buf); 3087 nframes = xfer->nframes; 3088 xfer->hcpriv = sitd; 3089 for (i = ncur = 0; i < nframes; i++, ncur++) { 3090 noffs = offs + xfer->frlengths[i]; 3091 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3092 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3093 3094 /* Allocate next ITD */ 3095 nsitd = ohci_alloc_sitd(sc); 3096 if (nsitd == NULL) { 3097 /* XXX what now? */ 3098 printf("%s: isoc TD alloc failed\n", 3099 USBDEVNAME(sc->sc_bus.bdev)); 3100 return; 3101 } 3102 3103 /* Fill current ITD */ 3104 sitd->itd.itd_flags = htole32( 3105 OHCI_ITD_NOCC | 3106 OHCI_ITD_SET_SF(iso->next) | 3107 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3108 OHCI_ITD_SET_FC(ncur)); 3109 sitd->itd.itd_bp0 = htole32(bp0); 3110 sitd->nextitd = nsitd; 3111 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3112 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3113 sitd->xfer = xfer; 3114 sitd->flags = 0; 3115 3116 sitd = nsitd; 3117 iso->next = iso->next + ncur; 3118 bp0 = OHCI_PAGE(buf + offs); 3119 ncur = 0; 3120 } 3121 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3122 offs = noffs; 3123 } 3124 nsitd = ohci_alloc_sitd(sc); 3125 if (nsitd == NULL) { 3126 /* XXX what now? */ 3127 printf("%s: isoc TD alloc failed\n", 3128 USBDEVNAME(sc->sc_bus.bdev)); 3129 return; 3130 } 3131 /* Fixup last used ITD */ 3132 sitd->itd.itd_flags = htole32( 3133 OHCI_ITD_NOCC | 3134 OHCI_ITD_SET_SF(iso->next) | 3135 OHCI_ITD_SET_DI(0) | 3136 OHCI_ITD_SET_FC(ncur)); 3137 sitd->itd.itd_bp0 = htole32(bp0); 3138 sitd->nextitd = nsitd; 3139 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3140 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3141 sitd->xfer = xfer; 3142 sitd->flags = OHCI_CALL_DONE; 3143 3144 iso->next = iso->next + ncur; 3145 iso->inuse += nframes; 3146 3147 xfer->actlen = offs; /* XXX pretend we did it all */ 3148 3149 xfer->status = USBD_IN_PROGRESS; 3150 3151 #ifdef OHCI_DEBUG 3152 if (ohcidebug > 5) { 3153 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3154 le32toh(sc->sc_hcca->hcca_frame_number))); 3155 ohci_dump_itds(xfer->hcpriv); 3156 ohci_dump_ed(sed); 3157 } 3158 #endif 3159 3160 s = splusb(); 3161 opipe->tail.itd = nsitd; 3162 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3163 splx(s); 3164 3165 #ifdef OHCI_DEBUG 3166 if (ohcidebug > 5) { 3167 delay(150000); 3168 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3169 le32toh(sc->sc_hcca->hcca_frame_number))); 3170 ohci_dump_itds(xfer->hcpriv); 3171 ohci_dump_ed(sed); 3172 } 3173 #endif 3174 } 3175 3176 usbd_status 3177 ohci_device_isoc_start(usbd_xfer_handle xfer) 3178 { 3179 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3180 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3181 3182 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3183 3184 if (sc->sc_dying) 3185 return (USBD_IOERROR); 3186 3187 #ifdef DIAGNOSTIC 3188 if (xfer->status != USBD_IN_PROGRESS) 3189 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3190 #endif 3191 3192 /* XXX anything to do? */ 3193 3194 return (USBD_IN_PROGRESS); 3195 } 3196 3197 void 3198 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3199 { 3200 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3201 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3202 ohci_soft_ed_t *sed; 3203 ohci_soft_itd_t *sitd; 3204 int s; 3205 3206 s = splusb(); 3207 3208 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3209 3210 /* Transfer is already done. */ 3211 if (xfer->status != USBD_NOT_STARTED && 3212 xfer->status != USBD_IN_PROGRESS) { 3213 splx(s); 3214 printf("ohci_device_isoc_abort: early return\n"); 3215 return; 3216 } 3217 3218 /* Give xfer the requested abort code. */ 3219 xfer->status = USBD_CANCELLED; 3220 3221 sed = opipe->sed; 3222 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3223 3224 sitd = xfer->hcpriv; 3225 #ifdef DIAGNOSTIC 3226 if (sitd == NULL) { 3227 splx(s); 3228 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3229 return; 3230 } 3231 #endif 3232 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3233 #ifdef DIAGNOSTIC 3234 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3235 sitd->isdone = 1; 3236 #endif 3237 } 3238 3239 splx(s); 3240 3241 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3242 3243 s = splusb(); 3244 3245 /* Run callback. */ 3246 usb_transfer_complete(xfer); 3247 3248 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3249 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3250 3251 splx(s); 3252 } 3253 3254 void 3255 ohci_device_isoc_done(usbd_xfer_handle xfer) 3256 { 3257 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3258 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3259 ohci_soft_itd_t *sitd, *nsitd; 3260 3261 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3262 3263 for (sitd = xfer->hcpriv; 3264 !(sitd->flags & OHCI_CALL_DONE); 3265 sitd = nsitd) { 3266 nsitd = sitd->nextitd; 3267 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3268 ohci_free_sitd(sc, sitd); 3269 } 3270 ohci_free_sitd(sc, sitd); 3271 xfer->hcpriv = NULL; 3272 } 3273 3274 usbd_status 3275 ohci_setup_isoc(usbd_pipe_handle pipe) 3276 { 3277 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3278 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3279 struct iso *iso = &opipe->u.iso; 3280 int s; 3281 3282 iso->next = -1; 3283 iso->inuse = 0; 3284 3285 s = splusb(); 3286 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3287 splx(s); 3288 3289 return (USBD_NORMAL_COMPLETION); 3290 } 3291 3292 void 3293 ohci_device_isoc_close(usbd_pipe_handle pipe) 3294 { 3295 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3296 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3297 int s; 3298 3299 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3300 3301 s = splusb(); 3302 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3303 splx(s); 3304 ohci_close_pipe(pipe, sc->sc_isoc_head); 3305 #ifdef DIAGNOSTIC 3306 opipe->tail.itd->isdone = 1; 3307 #endif 3308 ohci_free_sitd(sc, opipe->tail.itd); 3309 } 3310
Indexes created Thu Sep 25 08:09:54 GMT 2025