ohci.c revision 1.113
1 /* $NetBSD: ohci.c,v 1.113 2001/11/21 02:39:31 augustss Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.113 2001/11/21 02:39:31 augustss Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_rhsc_able(ohci_softc_t *, int); 210 Static void ohci_rhsc_enable(void *); 211 212 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 213 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 214 215 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 216 Static void ohci_noop(usbd_pipe_handle pipe); 217 218 #ifdef OHCI_DEBUG 219 Static void ohci_dumpregs(ohci_softc_t *); 220 Static void ohci_dump_tds(ohci_soft_td_t *); 221 Static void ohci_dump_td(ohci_soft_td_t *); 222 Static void ohci_dump_ed(ohci_soft_ed_t *); 223 Static void ohci_dump_itd(ohci_soft_itd_t *); 224 Static void ohci_dump_itds(ohci_soft_itd_t *); 225 #endif 226 227 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 228 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 229 #define OWRITE1(sc, r, x) \ 230 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 231 #define OWRITE2(sc, r, x) \ 232 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 233 #define OWRITE4(sc, r, x) \ 234 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 235 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 236 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 238 239 /* Reverse the bits in a value 0 .. 31 */ 240 Static u_int8_t revbits[OHCI_NO_INTRS] = 241 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 242 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 243 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 244 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 245 246 struct ohci_pipe { 247 struct usbd_pipe pipe; 248 ohci_soft_ed_t *sed; 249 union { 250 ohci_soft_td_t *td; 251 ohci_soft_itd_t *itd; 252 } tail; 253 /* Info needed for different pipe kinds. */ 254 union { 255 /* Control pipe */ 256 struct { 257 usb_dma_t reqdma; 258 u_int length; 259 ohci_soft_td_t *setup, *data, *stat; 260 } ctl; 261 /* Interrupt pipe */ 262 struct { 263 int nslots; 264 int pos; 265 } intr; 266 /* Bulk pipe */ 267 struct { 268 u_int length; 269 int isread; 270 } bulk; 271 /* Iso pipe */ 272 struct iso { 273 int next, inuse; 274 } iso; 275 } u; 276 }; 277 278 #define OHCI_INTR_ENDPT 1 279 280 Static struct usbd_bus_methods ohci_bus_methods = { 281 ohci_open, 282 ohci_softintr, 283 ohci_poll, 284 ohci_allocm, 285 ohci_freem, 286 ohci_allocx, 287 ohci_freex, 288 }; 289 290 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 291 ohci_root_ctrl_transfer, 292 ohci_root_ctrl_start, 293 ohci_root_ctrl_abort, 294 ohci_root_ctrl_close, 295 ohci_noop, 296 ohci_root_ctrl_done, 297 }; 298 299 Static struct usbd_pipe_methods ohci_root_intr_methods = { 300 ohci_root_intr_transfer, 301 ohci_root_intr_start, 302 ohci_root_intr_abort, 303 ohci_root_intr_close, 304 ohci_noop, 305 ohci_root_intr_done, 306 }; 307 308 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 309 ohci_device_ctrl_transfer, 310 ohci_device_ctrl_start, 311 ohci_device_ctrl_abort, 312 ohci_device_ctrl_close, 313 ohci_noop, 314 ohci_device_ctrl_done, 315 }; 316 317 Static struct usbd_pipe_methods ohci_device_intr_methods = { 318 ohci_device_intr_transfer, 319 ohci_device_intr_start, 320 ohci_device_intr_abort, 321 ohci_device_intr_close, 322 ohci_device_clear_toggle, 323 ohci_device_intr_done, 324 }; 325 326 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 327 ohci_device_bulk_transfer, 328 ohci_device_bulk_start, 329 ohci_device_bulk_abort, 330 ohci_device_bulk_close, 331 ohci_device_clear_toggle, 332 ohci_device_bulk_done, 333 }; 334 335 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 336 ohci_device_isoc_transfer, 337 ohci_device_isoc_start, 338 ohci_device_isoc_abort, 339 ohci_device_isoc_close, 340 ohci_noop, 341 ohci_device_isoc_done, 342 }; 343 344 #if defined(__NetBSD__) || defined(__OpenBSD__) 345 int 346 ohci_activate(device_ptr_t self, enum devact act) 347 { 348 struct ohci_softc *sc = (struct ohci_softc *)self; 349 int rv = 0; 350 351 switch (act) { 352 case DVACT_ACTIVATE: 353 return (EOPNOTSUPP); 354 break; 355 356 case DVACT_DEACTIVATE: 357 if (sc->sc_child != NULL) 358 rv = config_deactivate(sc->sc_child); 359 sc->sc_dying = 1; 360 break; 361 } 362 return (rv); 363 } 364 365 int 366 ohci_detach(struct ohci_softc *sc, int flags) 367 { 368 int rv = 0; 369 370 if (sc->sc_child != NULL) 371 rv = config_detach(sc->sc_child, flags); 372 373 if (rv != 0) 374 return (rv); 375 376 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 377 378 #if defined(__NetBSD__) || defined(__OpenBSD__) 379 powerhook_disestablish(sc->sc_powerhook); 380 shutdownhook_disestablish(sc->sc_shutdownhook); 381 #endif 382 383 /* free data structures XXX */ 384 385 return (rv); 386 } 387 #endif 388 389 ohci_soft_ed_t * 390 ohci_alloc_sed(ohci_softc_t *sc) 391 { 392 ohci_soft_ed_t *sed; 393 usbd_status err; 394 int i, offs; 395 usb_dma_t dma; 396 397 if (sc->sc_freeeds == NULL) { 398 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 399 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 400 OHCI_ED_ALIGN, &dma); 401 if (err) 402 return (0); 403 for(i = 0; i < OHCI_SED_CHUNK; i++) { 404 offs = i * OHCI_SED_SIZE; 405 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 406 sed->physaddr = DMAADDR(&dma) + offs; 407 sed->next = sc->sc_freeeds; 408 sc->sc_freeeds = sed; 409 } 410 } 411 sed = sc->sc_freeeds; 412 sc->sc_freeeds = sed->next; 413 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 414 sed->next = 0; 415 return (sed); 416 } 417 418 void 419 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 420 { 421 sed->next = sc->sc_freeeds; 422 sc->sc_freeeds = sed; 423 } 424 425 ohci_soft_td_t * 426 ohci_alloc_std(ohci_softc_t *sc) 427 { 428 ohci_soft_td_t *std; 429 usbd_status err; 430 int i, offs; 431 usb_dma_t dma; 432 int s; 433 434 if (sc->sc_freetds == NULL) { 435 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 436 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 437 OHCI_TD_ALIGN, &dma); 438 if (err) 439 return (NULL); 440 s = splusb(); 441 for(i = 0; i < OHCI_STD_CHUNK; i++) { 442 offs = i * OHCI_STD_SIZE; 443 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 444 std->physaddr = DMAADDR(&dma) + offs; 445 std->nexttd = sc->sc_freetds; 446 sc->sc_freetds = std; 447 } 448 splx(s); 449 } 450 451 s = splusb(); 452 std = sc->sc_freetds; 453 sc->sc_freetds = std->nexttd; 454 memset(&std->td, 0, sizeof(ohci_td_t)); 455 std->nexttd = NULL; 456 std->xfer = NULL; 457 ohci_hash_add_td(sc, std); 458 splx(s); 459 460 return (std); 461 } 462 463 void 464 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 465 { 466 int s; 467 468 s = splusb(); 469 ohci_hash_rem_td(sc, std); 470 std->nexttd = sc->sc_freetds; 471 sc->sc_freetds = std; 472 splx(s); 473 } 474 475 usbd_status 476 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 477 int alen, int rd, usbd_xfer_handle xfer, 478 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 479 { 480 ohci_soft_td_t *next, *cur; 481 ohci_physaddr_t dataphys, dataphysend; 482 u_int32_t tdflags; 483 int len, curlen; 484 usb_dma_t *dma = &xfer->dmabuf; 485 u_int16_t flags = xfer->flags; 486 487 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 488 489 len = alen; 490 cur = sp; 491 dataphys = DMAADDR(dma); 492 dataphysend = OHCI_PAGE(dataphys + len - 1); 493 tdflags = htole32( 494 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 495 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 496 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 497 498 for (;;) { 499 next = ohci_alloc_std(sc); 500 if (next == NULL) 501 goto nomem; 502 503 /* The OHCI hardware can handle at most one page crossing. */ 504 if (OHCI_PAGE(dataphys) == dataphysend || 505 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 506 /* we can handle it in this TD */ 507 curlen = len; 508 } else { 509 /* must use multiple TDs, fill as much as possible. */ 510 curlen = 2 * OHCI_PAGE_SIZE - 511 (dataphys & (OHCI_PAGE_SIZE-1)); 512 /* the length must be a multiple of the max size */ 513 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 514 #ifdef DIAGNOSTIC 515 if (curlen == 0) 516 panic("ohci_alloc_std: curlen == 0\n"); 517 #endif 518 } 519 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 520 "dataphysend=0x%08x len=%d curlen=%d\n", 521 dataphys, dataphysend, 522 len, curlen)); 523 len -= curlen; 524 525 cur->td.td_flags = tdflags; 526 cur->td.td_cbp = htole32(dataphys); 527 cur->nexttd = next; 528 cur->td.td_nexttd = htole32(next->physaddr); 529 cur->td.td_be = htole32(dataphys + curlen - 1); 530 cur->len = curlen; 531 cur->flags = OHCI_ADD_LEN; 532 cur->xfer = xfer; 533 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 534 dataphys, dataphys + curlen - 1)); 535 if (len == 0) 536 break; 537 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 538 dataphys += curlen; 539 cur = next; 540 } 541 if ((flags & USBD_FORCE_SHORT_XFER) && 542 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 543 /* Force a 0 length transfer at the end. */ 544 545 cur = next; 546 next = ohci_alloc_std(sc); 547 if (next == NULL) 548 goto nomem; 549 550 cur->td.td_flags = tdflags; 551 cur->td.td_cbp = 0; /* indicate 0 length packet */ 552 cur->nexttd = next; 553 cur->td.td_nexttd = htole32(next->physaddr); 554 cur->td.td_be = ~0; 555 cur->len = 0; 556 cur->flags = 0; 557 cur->xfer = xfer; 558 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 559 } 560 *ep = cur; 561 562 return (USBD_NORMAL_COMPLETION); 563 564 nomem: 565 /* XXX free chain */ 566 return (USBD_NOMEM); 567 } 568 569 #if 0 570 Static void 571 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 572 ohci_soft_td_t *stdend) 573 { 574 ohci_soft_td_t *p; 575 576 for (; std != stdend; std = p) { 577 p = std->nexttd; 578 ohci_free_std(sc, std); 579 } 580 } 581 #endif 582 583 ohci_soft_itd_t * 584 ohci_alloc_sitd(ohci_softc_t *sc) 585 { 586 ohci_soft_itd_t *sitd; 587 usbd_status err; 588 int i, s, offs; 589 usb_dma_t dma; 590 591 if (sc->sc_freeitds == NULL) { 592 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 593 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 594 OHCI_ITD_ALIGN, &dma); 595 if (err) 596 return (NULL); 597 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 598 offs = i * OHCI_SITD_SIZE; 599 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 600 sitd->physaddr = DMAADDR(&dma) + offs; 601 sitd->nextitd = sc->sc_freeitds; 602 sc->sc_freeitds = sitd; 603 } 604 } 605 606 s = splusb(); 607 sitd = sc->sc_freeitds; 608 sc->sc_freeitds = sitd->nextitd; 609 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 610 sitd->nextitd = NULL; 611 sitd->xfer = NULL; 612 ohci_hash_add_itd(sc, sitd); 613 splx(s); 614 615 #ifdef DIAGNOSTIC 616 sitd->isdone = 0; 617 #endif 618 619 return (sitd); 620 } 621 622 void 623 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 624 { 625 int s; 626 627 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 628 629 #ifdef DIAGNOSTIC 630 if (!sitd->isdone) { 631 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 632 return; 633 } 634 #endif 635 636 s = splusb(); 637 ohci_hash_rem_itd(sc, sitd); 638 sitd->nextitd = sc->sc_freeitds; 639 sc->sc_freeitds = sitd; 640 splx(s); 641 } 642 643 usbd_status 644 ohci_init(ohci_softc_t *sc) 645 { 646 ohci_soft_ed_t *sed, *psed; 647 usbd_status err; 648 int i; 649 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 650 651 DPRINTF(("ohci_init: start\n")); 652 #if defined(__OpenBSD__) 653 printf(","); 654 #else 655 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 656 #endif 657 rev = OREAD4(sc, OHCI_REVISION); 658 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 659 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 660 661 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 662 printf("%s: unsupported OHCI revision\n", 663 USBDEVNAME(sc->sc_bus.bdev)); 664 sc->sc_bus.usbrev = USBREV_UNKNOWN; 665 return (USBD_INVAL); 666 } 667 sc->sc_bus.usbrev = USBREV_1_0; 668 669 for (i = 0; i < OHCI_HASH_SIZE; i++) 670 LIST_INIT(&sc->sc_hash_tds[i]); 671 for (i = 0; i < OHCI_HASH_SIZE; i++) 672 LIST_INIT(&sc->sc_hash_itds[i]); 673 674 SIMPLEQ_INIT(&sc->sc_free_xfers); 675 676 /* XXX determine alignment by R/W */ 677 /* Allocate the HCCA area. */ 678 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 679 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 680 if (err) 681 return (err); 682 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 683 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 684 685 sc->sc_eintrs = OHCI_NORMAL_INTRS; 686 687 /* Allocate dummy ED that starts the control list. */ 688 sc->sc_ctrl_head = ohci_alloc_sed(sc); 689 if (sc->sc_ctrl_head == NULL) { 690 err = USBD_NOMEM; 691 goto bad1; 692 } 693 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 694 695 /* Allocate dummy ED that starts the bulk list. */ 696 sc->sc_bulk_head = ohci_alloc_sed(sc); 697 if (sc->sc_bulk_head == NULL) { 698 err = USBD_NOMEM; 699 goto bad2; 700 } 701 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 702 703 /* Allocate dummy ED that starts the isochronous list. */ 704 sc->sc_isoc_head = ohci_alloc_sed(sc); 705 if (sc->sc_isoc_head == NULL) { 706 err = USBD_NOMEM; 707 goto bad3; 708 } 709 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 710 711 /* Allocate all the dummy EDs that make up the interrupt tree. */ 712 for (i = 0; i < OHCI_NO_EDS; i++) { 713 sed = ohci_alloc_sed(sc); 714 if (sed == NULL) { 715 while (--i >= 0) 716 ohci_free_sed(sc, sc->sc_eds[i]); 717 err = USBD_NOMEM; 718 goto bad4; 719 } 720 /* All ED fields are set to 0. */ 721 sc->sc_eds[i] = sed; 722 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 723 if (i != 0) 724 psed = sc->sc_eds[(i-1) / 2]; 725 else 726 psed= sc->sc_isoc_head; 727 sed->next = psed; 728 sed->ed.ed_nexted = htole32(psed->physaddr); 729 } 730 /* 731 * Fill HCCA interrupt table. The bit reversal is to get 732 * the tree set up properly to spread the interrupts. 733 */ 734 for (i = 0; i < OHCI_NO_INTRS; i++) 735 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 736 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 737 738 #ifdef OHCI_DEBUG 739 if (ohcidebug > 15) { 740 for (i = 0; i < OHCI_NO_EDS; i++) { 741 printf("ed#%d ", i); 742 ohci_dump_ed(sc->sc_eds[i]); 743 } 744 printf("iso "); 745 ohci_dump_ed(sc->sc_isoc_head); 746 } 747 #endif 748 749 /* Determine in what context we are running. */ 750 ctl = OREAD4(sc, OHCI_CONTROL); 751 if (ctl & OHCI_IR) { 752 /* SMM active, request change */ 753 DPRINTF(("ohci_init: SMM active, request owner change\n")); 754 s = OREAD4(sc, OHCI_COMMAND_STATUS); 755 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 756 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 757 usb_delay_ms(&sc->sc_bus, 1); 758 ctl = OREAD4(sc, OHCI_CONTROL); 759 } 760 if ((ctl & OHCI_IR) == 0) { 761 printf("%s: SMM does not respond, resetting\n", 762 USBDEVNAME(sc->sc_bus.bdev)); 763 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 764 goto reset; 765 } 766 #if 0 767 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 768 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 769 /* BIOS started controller. */ 770 DPRINTF(("ohci_init: BIOS active\n")); 771 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 772 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 773 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 774 } 775 #endif 776 } else { 777 DPRINTF(("ohci_init: cold started\n")); 778 reset: 779 /* Controller was cold started. */ 780 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 781 } 782 783 /* 784 * This reset should not be necessary according to the OHCI spec, but 785 * without it some controllers do not start. 786 */ 787 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 788 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 789 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 790 791 /* We now own the host controller and the bus has been reset. */ 792 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 793 794 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 795 /* Nominal time for a reset is 10 us. */ 796 for (i = 0; i < 10; i++) { 797 delay(10); 798 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 799 if (!hcr) 800 break; 801 } 802 if (hcr) { 803 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 804 err = USBD_IOERROR; 805 goto bad5; 806 } 807 #ifdef OHCI_DEBUG 808 if (ohcidebug > 15) 809 ohci_dumpregs(sc); 810 #endif 811 812 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 813 814 /* Set up HC registers. */ 815 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 816 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 817 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 818 /* disable all interrupts and then switch on all desired interrupts */ 819 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 820 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 821 /* switch on desired functional features */ 822 ctl = OREAD4(sc, OHCI_CONTROL); 823 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 824 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 825 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 826 /* And finally start it! */ 827 OWRITE4(sc, OHCI_CONTROL, ctl); 828 829 /* 830 * The controller is now OPERATIONAL. Set a some final 831 * registers that should be set earlier, but that the 832 * controller ignores when in the SUSPEND state. 833 */ 834 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 835 fm |= OHCI_FSMPS(ival) | ival; 836 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 837 per = OHCI_PERIODIC(ival); /* 90% periodic */ 838 OWRITE4(sc, OHCI_PERIODIC_START, per); 839 840 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 841 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 842 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 843 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 844 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 845 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 846 847 /* 848 * The AMD756 requires a delay before re-reading the register, 849 * otherwise it will occasionally report 0 ports. 850 */ 851 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 852 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 853 854 #ifdef OHCI_DEBUG 855 if (ohcidebug > 5) 856 ohci_dumpregs(sc); 857 #endif 858 859 /* Set up the bus struct. */ 860 sc->sc_bus.methods = &ohci_bus_methods; 861 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 862 863 #if defined(__NetBSD__) || defined(__OpenBSD__) 864 sc->sc_control = sc->sc_intre = 0; 865 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 866 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 867 #endif 868 869 usb_callout_init(sc->sc_tmo_rhsc); 870 871 return (USBD_NORMAL_COMPLETION); 872 873 bad5: 874 for (i = 0; i < OHCI_NO_EDS; i++) 875 ohci_free_sed(sc, sc->sc_eds[i]); 876 bad4: 877 ohci_free_sed(sc, sc->sc_isoc_head); 878 bad3: 879 ohci_free_sed(sc, sc->sc_ctrl_head); 880 bad2: 881 ohci_free_sed(sc, sc->sc_bulk_head); 882 bad1: 883 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 884 return (err); 885 } 886 887 usbd_status 888 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 889 { 890 #if defined(__NetBSD__) || defined(__OpenBSD__) 891 struct ohci_softc *sc = (struct ohci_softc *)bus; 892 #endif 893 894 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 895 } 896 897 void 898 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 899 { 900 #if defined(__NetBSD__) || defined(__OpenBSD__) 901 struct ohci_softc *sc = (struct ohci_softc *)bus; 902 #endif 903 904 usb_freemem(&sc->sc_bus, dma); 905 } 906 907 usbd_xfer_handle 908 ohci_allocx(struct usbd_bus *bus) 909 { 910 struct ohci_softc *sc = (struct ohci_softc *)bus; 911 usbd_xfer_handle xfer; 912 913 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 914 if (xfer != NULL) 915 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 916 else 917 xfer = malloc(sizeof(*xfer), M_USB, M_NOWAIT); 918 if (xfer != NULL) 919 memset(xfer, 0, sizeof *xfer); 920 return (xfer); 921 } 922 923 void 924 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 925 { 926 struct ohci_softc *sc = (struct ohci_softc *)bus; 927 928 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 929 } 930 931 /* 932 * Shut down the controller when the system is going down. 933 */ 934 void 935 ohci_shutdown(void *v) 936 { 937 ohci_softc_t *sc = v; 938 939 DPRINTF(("ohci_shutdown: stopping the HC\n")); 940 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 941 } 942 943 /* 944 * Handle suspend/resume. 945 * 946 * We need to switch to polling mode here, because this routine is 947 * called from an intterupt context. This is all right since we 948 * are almost suspended anyway. 949 */ 950 void 951 ohci_power(int why, void *v) 952 { 953 ohci_softc_t *sc = v; 954 u_int32_t ctl; 955 int s; 956 957 #ifdef OHCI_DEBUG 958 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 959 ohci_dumpregs(sc); 960 #endif 961 962 s = splhardusb(); 963 switch (why) { 964 case PWR_SUSPEND: 965 case PWR_STANDBY: 966 sc->sc_bus.use_polling++; 967 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 968 if (sc->sc_control == 0) { 969 /* 970 * Preserve register values, in case that APM BIOS 971 * does not recover them. 972 */ 973 sc->sc_control = ctl; 974 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 975 } 976 ctl |= OHCI_HCFS_SUSPEND; 977 OWRITE4(sc, OHCI_CONTROL, ctl); 978 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 979 sc->sc_bus.use_polling--; 980 break; 981 case PWR_RESUME: 982 sc->sc_bus.use_polling++; 983 /* Some broken BIOSes do not recover these values */ 984 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 985 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 986 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 987 if (sc->sc_intre) 988 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 989 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 990 if (sc->sc_control) 991 ctl = sc->sc_control; 992 else 993 ctl = OREAD4(sc, OHCI_CONTROL); 994 ctl |= OHCI_HCFS_RESUME; 995 OWRITE4(sc, OHCI_CONTROL, ctl); 996 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 997 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 998 OWRITE4(sc, OHCI_CONTROL, ctl); 999 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1000 sc->sc_control = sc->sc_intre = 0; 1001 sc->sc_bus.use_polling--; 1002 break; 1003 case PWR_SOFTSUSPEND: 1004 case PWR_SOFTSTANDBY: 1005 case PWR_SOFTRESUME: 1006 break; 1007 } 1008 splx(s); 1009 } 1010 1011 #ifdef OHCI_DEBUG 1012 void 1013 ohci_dumpregs(ohci_softc_t *sc) 1014 { 1015 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1016 OREAD4(sc, OHCI_REVISION), 1017 OREAD4(sc, OHCI_CONTROL), 1018 OREAD4(sc, OHCI_COMMAND_STATUS))); 1019 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1020 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1021 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1022 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1023 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1024 OREAD4(sc, OHCI_HCCA), 1025 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1026 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1027 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1028 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1029 OREAD4(sc, OHCI_BULK_HEAD_ED), 1030 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1031 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1032 OREAD4(sc, OHCI_DONE_HEAD), 1033 OREAD4(sc, OHCI_FM_INTERVAL), 1034 OREAD4(sc, OHCI_FM_REMAINING))); 1035 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1036 OREAD4(sc, OHCI_FM_NUMBER), 1037 OREAD4(sc, OHCI_PERIODIC_START), 1038 OREAD4(sc, OHCI_LS_THRESHOLD))); 1039 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1040 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1041 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1042 OREAD4(sc, OHCI_RH_STATUS))); 1043 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1044 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1045 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1046 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1047 le32toh(sc->sc_hcca->hcca_frame_number), 1048 le32toh(sc->sc_hcca->hcca_done_head))); 1049 } 1050 #endif 1051 1052 Static int ohci_intr1(ohci_softc_t *); 1053 1054 int 1055 ohci_intr(void *p) 1056 { 1057 ohci_softc_t *sc = p; 1058 1059 if (sc->sc_dying) 1060 return (0); 1061 1062 /* If we get an interrupt while polling, then just ignore it. */ 1063 if (sc->sc_bus.use_polling) { 1064 #ifdef DIAGNOSTIC 1065 printf("ohci_intr: ignored interrupt while polling\n"); 1066 #endif 1067 return (0); 1068 } 1069 1070 return (ohci_intr1(sc)); 1071 } 1072 1073 Static int 1074 ohci_intr1(ohci_softc_t *sc) 1075 { 1076 u_int32_t intrs, eintrs; 1077 ohci_physaddr_t done; 1078 1079 DPRINTFN(14,("ohci_intr1: enter\n")); 1080 1081 /* In case the interrupt occurs before initialization has completed. */ 1082 if (sc == NULL || sc->sc_hcca == NULL) { 1083 #ifdef DIAGNOSTIC 1084 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1085 #endif 1086 return (0); 1087 } 1088 1089 intrs = 0; 1090 done = le32toh(sc->sc_hcca->hcca_done_head); 1091 if (done != 0) { 1092 if (done & ~OHCI_DONE_INTRS) 1093 intrs = OHCI_WDH; 1094 if (done & OHCI_DONE_INTRS) 1095 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1096 } else 1097 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1098 1099 if (!intrs) 1100 return (0); 1101 1102 intrs &= ~OHCI_MIE; 1103 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1104 eintrs = intrs & sc->sc_eintrs; 1105 if (!eintrs) 1106 return (0); 1107 1108 sc->sc_bus.intr_context++; 1109 sc->sc_bus.no_intrs++; 1110 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1111 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1112 (u_int)eintrs)); 1113 1114 if (eintrs & OHCI_SO) { 1115 sc->sc_overrun_cnt++; 1116 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1117 printf("%s: %u scheduling overruns\n", 1118 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1119 sc->sc_overrun_cnt = 0; 1120 } 1121 /* XXX do what */ 1122 eintrs &= ~OHCI_SO; 1123 } 1124 if (eintrs & OHCI_WDH) { 1125 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1126 sc->sc_hcca->hcca_done_head = 0; 1127 usb_schedsoftintr(&sc->sc_bus); 1128 eintrs &= ~OHCI_WDH; 1129 } 1130 if (eintrs & OHCI_RD) { 1131 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1132 /* XXX process resume detect */ 1133 } 1134 if (eintrs & OHCI_UE) { 1135 printf("%s: unrecoverable error, controller halted\n", 1136 USBDEVNAME(sc->sc_bus.bdev)); 1137 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1138 /* XXX what else */ 1139 } 1140 if (eintrs & OHCI_RHSC) { 1141 ohci_rhsc(sc, sc->sc_intrxfer); 1142 /* 1143 * Disable RHSC interrupt for now, because it will be 1144 * on until the port has been reset. 1145 */ 1146 ohci_rhsc_able(sc, 0); 1147 /* Do not allow RHSC interrupts > 1 per second */ 1148 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1149 eintrs &= ~OHCI_RHSC; 1150 } 1151 1152 sc->sc_bus.intr_context--; 1153 1154 if (eintrs != 0) { 1155 /* Block unprocessed interrupts. XXX */ 1156 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1157 sc->sc_eintrs &= ~eintrs; 1158 printf("%s: blocking intrs 0x%x\n", 1159 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1160 } 1161 1162 return (1); 1163 } 1164 1165 void 1166 ohci_rhsc_able(ohci_softc_t *sc, int on) 1167 { 1168 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1169 if (on) { 1170 sc->sc_eintrs |= OHCI_RHSC; 1171 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1172 } else { 1173 sc->sc_eintrs &= ~OHCI_RHSC; 1174 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1175 } 1176 } 1177 1178 void 1179 ohci_rhsc_enable(void *v_sc) 1180 { 1181 ohci_softc_t *sc = v_sc; 1182 1183 ohci_rhsc_able(sc, 1); 1184 } 1185 1186 #ifdef OHCI_DEBUG 1187 char *ohci_cc_strs[] = { 1188 "NO_ERROR", 1189 "CRC", 1190 "BIT_STUFFING", 1191 "DATA_TOGGLE_MISMATCH", 1192 "STALL", 1193 "DEVICE_NOT_RESPONDING", 1194 "PID_CHECK_FAILURE", 1195 "UNEXPECTED_PID", 1196 "DATA_OVERRUN", 1197 "DATA_UNDERRUN", 1198 "BUFFER_OVERRUN", 1199 "BUFFER_UNDERRUN", 1200 "reserved", 1201 "reserved", 1202 "NOT_ACCESSED", 1203 "NOT_ACCESSED", 1204 }; 1205 #endif 1206 1207 void 1208 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1209 { 1210 ohci_soft_itd_t *sitd, *sidone, **ip; 1211 ohci_soft_td_t *std, *sdone, **p; 1212 1213 /* Reverse the done list. */ 1214 for (sdone = NULL, sidone = NULL; done != 0; ) { 1215 std = ohci_hash_find_td(sc, done); 1216 if (std != NULL) { 1217 std->dnext = sdone; 1218 done = le32toh(std->td.td_nexttd); 1219 sdone = std; 1220 DPRINTFN(10,("add TD %p\n", std)); 1221 continue; 1222 } 1223 sitd = ohci_hash_find_itd(sc, done); 1224 if (sitd != NULL) { 1225 sitd->dnext = sidone; 1226 done = le32toh(sitd->itd.itd_nextitd); 1227 sidone = sitd; 1228 DPRINTFN(5,("add ITD %p\n", sitd)); 1229 continue; 1230 } 1231 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1232 } 1233 1234 /* sdone & sidone now hold the done lists. */ 1235 /* Put them on the already processed lists. */ 1236 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1237 ; 1238 *p = sdone; 1239 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1240 ; 1241 *ip = sidone; 1242 } 1243 1244 void 1245 ohci_softintr(void *v) 1246 { 1247 ohci_softc_t *sc = v; 1248 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1249 ohci_soft_td_t *std, *sdone, *stdnext; 1250 usbd_xfer_handle xfer; 1251 int len, cc, s; 1252 1253 DPRINTFN(10,("ohci_softintr: enter\n:")); 1254 1255 sc->sc_bus.intr_context++; 1256 1257 s = splhardusb(); 1258 sdone = sc->sc_sdone; 1259 sc->sc_sdone = NULL; 1260 sidone = sc->sc_sidone; 1261 sc->sc_sidone = NULL; 1262 splx(s); 1263 1264 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1265 1266 #ifdef OHCI_DEBUG 1267 if (ohcidebug > 10) { 1268 DPRINTF(("ohci_process_done: TD done:\n")); 1269 ohci_dump_tds(sdone); 1270 } 1271 #endif 1272 1273 for (std = sdone; std; std = stdnext) { 1274 xfer = std->xfer; 1275 stdnext = std->dnext; 1276 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1277 std, xfer, xfer ? xfer->hcpriv : 0)); 1278 if (xfer == NULL) { 1279 /* xfer == NULL: There seems to be no xfer associated 1280 * with this TD. It is tailp that happened to end up on 1281 * the done queue. 1282 */ 1283 continue; 1284 } 1285 if (xfer->status == USBD_CANCELLED || 1286 xfer->status == USBD_TIMEOUT) { 1287 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1288 xfer)); 1289 /* Handled by abort routine. */ 1290 continue; 1291 } 1292 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1293 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1294 if (cc == OHCI_CC_NO_ERROR) { 1295 len = std->len; 1296 if (std->td.td_cbp != 0) 1297 len -= le32toh(std->td.td_be) - 1298 le32toh(std->td.td_cbp) + 1; 1299 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1300 len, std->flags)); 1301 if (std->flags & OHCI_ADD_LEN) 1302 xfer->actlen += len; 1303 if (std->flags & OHCI_CALL_DONE) { 1304 xfer->status = USBD_NORMAL_COMPLETION; 1305 usb_transfer_complete(xfer); 1306 } 1307 ohci_free_std(sc, std); 1308 } else { 1309 /* 1310 * Endpoint is halted. First unlink all the TDs 1311 * belonging to the failed transfer, and then restart 1312 * the endpoint. 1313 */ 1314 ohci_soft_td_t *p, *n; 1315 struct ohci_pipe *opipe = 1316 (struct ohci_pipe *)xfer->pipe; 1317 1318 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1319 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1320 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1321 1322 /* remove TDs */ 1323 for (p = std; p->xfer == xfer; p = n) { 1324 n = p->nexttd; 1325 ohci_free_std(sc, p); 1326 } 1327 1328 /* clear halt */ 1329 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1330 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1331 1332 if (cc == OHCI_CC_STALL) 1333 xfer->status = USBD_STALLED; 1334 else 1335 xfer->status = USBD_IOERROR; 1336 usb_transfer_complete(xfer); 1337 } 1338 } 1339 1340 #ifdef OHCI_DEBUG 1341 if (ohcidebug > 10) { 1342 DPRINTF(("ohci_softintr: ITD done:\n")); 1343 ohci_dump_itds(sidone); 1344 } 1345 #endif 1346 1347 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1348 xfer = sitd->xfer; 1349 sitdnext = sitd->dnext; 1350 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1351 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1352 if (xfer == NULL) 1353 continue; 1354 if (xfer->status == USBD_CANCELLED || 1355 xfer->status == USBD_TIMEOUT) { 1356 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1357 xfer)); 1358 /* Handled by abort routine. */ 1359 continue; 1360 } 1361 #ifdef DIAGNOSTIC 1362 if (sitd->isdone) 1363 printf("ohci_softintr: sitd=%p is done\n", sitd); 1364 sitd->isdone = 1; 1365 #endif 1366 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1367 if (cc == OHCI_CC_NO_ERROR) { 1368 /* XXX compute length for input */ 1369 struct ohci_pipe *opipe = 1370 (struct ohci_pipe *)xfer->pipe; 1371 if (sitd->flags & OHCI_CALL_DONE) { 1372 opipe->u.iso.inuse -= xfer->nframes; 1373 /* XXX update frlengths with actual length */ 1374 /* XXX xfer->actlen = actlen; */ 1375 xfer->status = USBD_NORMAL_COMPLETION; 1376 usb_transfer_complete(xfer); 1377 } 1378 } else { 1379 /* XXX Do more */ 1380 xfer->status = USBD_IOERROR; 1381 usb_transfer_complete(xfer); 1382 } 1383 } 1384 1385 sc->sc_bus.intr_context--; 1386 DPRINTFN(10,("ohci_softintr: done:\n")); 1387 } 1388 1389 void 1390 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1391 { 1392 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1393 1394 #ifdef DIAGNOSTIC 1395 if (!(xfer->rqflags & URQ_REQUEST)) { 1396 panic("ohci_ctrl_done: not a request\n"); 1397 } 1398 #endif 1399 xfer->hcpriv = NULL; 1400 } 1401 1402 void 1403 ohci_device_intr_done(usbd_xfer_handle xfer) 1404 { 1405 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1406 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1407 ohci_soft_ed_t *sed = opipe->sed; 1408 ohci_soft_td_t *data, *tail; 1409 1410 1411 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1412 xfer, xfer->actlen)); 1413 1414 xfer->hcpriv = NULL; 1415 1416 if (xfer->pipe->repeat) { 1417 data = opipe->tail.td; 1418 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1419 if (tail == NULL) { 1420 xfer->status = USBD_NOMEM; 1421 return; 1422 } 1423 tail->xfer = NULL; 1424 1425 data->td.td_flags = htole32( 1426 OHCI_TD_IN | OHCI_TD_NOCC | 1427 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1428 if (xfer->flags & USBD_SHORT_XFER_OK) 1429 data->td.td_flags |= htole32(OHCI_TD_R); 1430 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1431 data->nexttd = tail; 1432 data->td.td_nexttd = htole32(tail->physaddr); 1433 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1434 xfer->length - 1); 1435 data->len = xfer->length; 1436 data->xfer = xfer; 1437 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1438 xfer->hcpriv = data; 1439 xfer->actlen = 0; 1440 1441 sed->ed.ed_tailp = htole32(tail->physaddr); 1442 opipe->tail.td = tail; 1443 } 1444 } 1445 1446 void 1447 ohci_device_bulk_done(usbd_xfer_handle xfer) 1448 { 1449 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1450 xfer, xfer->actlen)); 1451 1452 xfer->hcpriv = NULL; 1453 } 1454 1455 void 1456 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1457 { 1458 usbd_pipe_handle pipe; 1459 struct ohci_pipe *opipe; 1460 u_char *p; 1461 int i, m; 1462 int hstatus; 1463 1464 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1465 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1466 sc, xfer, hstatus)); 1467 1468 if (xfer == NULL) { 1469 /* Just ignore the change. */ 1470 return; 1471 } 1472 1473 pipe = xfer->pipe; 1474 opipe = (struct ohci_pipe *)pipe; 1475 1476 p = KERNADDR(&xfer->dmabuf); 1477 m = min(sc->sc_noport, xfer->length * 8 - 1); 1478 memset(p, 0, xfer->length); 1479 for (i = 1; i <= m; i++) { 1480 /* Pick out CHANGE bits from the status reg. */ 1481 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1482 p[i/8] |= 1 << (i%8); 1483 } 1484 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1485 xfer->actlen = xfer->length; 1486 xfer->status = USBD_NORMAL_COMPLETION; 1487 1488 usb_transfer_complete(xfer); 1489 } 1490 1491 void 1492 ohci_root_intr_done(usbd_xfer_handle xfer) 1493 { 1494 xfer->hcpriv = NULL; 1495 } 1496 1497 void 1498 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1499 { 1500 xfer->hcpriv = NULL; 1501 } 1502 1503 /* 1504 * Wait here until controller claims to have an interrupt. 1505 * Then call ohci_intr and return. Use timeout to avoid waiting 1506 * too long. 1507 */ 1508 void 1509 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1510 { 1511 int timo = xfer->timeout; 1512 int usecs; 1513 u_int32_t intrs; 1514 1515 xfer->status = USBD_IN_PROGRESS; 1516 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1517 usb_delay_ms(&sc->sc_bus, 1); 1518 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1519 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1520 #ifdef OHCI_DEBUG 1521 if (ohcidebug > 15) 1522 ohci_dumpregs(sc); 1523 #endif 1524 if (intrs) { 1525 ohci_intr1(sc); 1526 if (xfer->status != USBD_IN_PROGRESS) 1527 return; 1528 } 1529 } 1530 1531 /* Timeout */ 1532 DPRINTF(("ohci_waitintr: timeout\n")); 1533 xfer->status = USBD_TIMEOUT; 1534 usb_transfer_complete(xfer); 1535 /* XXX should free TD */ 1536 } 1537 1538 void 1539 ohci_poll(struct usbd_bus *bus) 1540 { 1541 ohci_softc_t *sc = (ohci_softc_t *)bus; 1542 #ifdef OHCI_DEBUG 1543 static int last; 1544 int new; 1545 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1546 if (new != last) { 1547 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1548 last = new; 1549 } 1550 #endif 1551 1552 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1553 ohci_intr1(sc); 1554 } 1555 1556 usbd_status 1557 ohci_device_request(usbd_xfer_handle xfer) 1558 { 1559 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1560 usb_device_request_t *req = &xfer->request; 1561 usbd_device_handle dev = opipe->pipe.device; 1562 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1563 int addr = dev->address; 1564 ohci_soft_td_t *setup, *stat, *next, *tail; 1565 ohci_soft_ed_t *sed; 1566 int isread; 1567 int len; 1568 usbd_status err; 1569 int s; 1570 1571 isread = req->bmRequestType & UT_READ; 1572 len = UGETW(req->wLength); 1573 1574 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1575 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1576 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1577 UGETW(req->wIndex), len, addr, 1578 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1579 1580 setup = opipe->tail.td; 1581 stat = ohci_alloc_std(sc); 1582 if (stat == NULL) { 1583 err = USBD_NOMEM; 1584 goto bad1; 1585 } 1586 tail = ohci_alloc_std(sc); 1587 if (tail == NULL) { 1588 err = USBD_NOMEM; 1589 goto bad2; 1590 } 1591 tail->xfer = NULL; 1592 1593 sed = opipe->sed; 1594 opipe->u.ctl.length = len; 1595 1596 /* Update device address and length since they may have changed. */ 1597 /* XXX This only needs to be done once, but it's too early in open. */ 1598 /* XXXX Should not touch ED here! */ 1599 sed->ed.ed_flags = htole32( 1600 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1601 OHCI_ED_SET_FA(addr) | 1602 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1603 1604 next = stat; 1605 1606 /* Set up data transaction */ 1607 if (len != 0) { 1608 ohci_soft_td_t *std = stat; 1609 1610 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1611 std, &stat); 1612 stat = stat->nexttd; /* point at free TD */ 1613 if (err) 1614 goto bad3; 1615 /* Start toggle at 1 and then use the carried toggle. */ 1616 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1617 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1618 } 1619 1620 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1621 1622 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1623 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1624 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1625 setup->nexttd = next; 1626 setup->td.td_nexttd = htole32(next->physaddr); 1627 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1628 setup->len = 0; 1629 setup->xfer = xfer; 1630 setup->flags = 0; 1631 xfer->hcpriv = setup; 1632 1633 stat->td.td_flags = htole32( 1634 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1635 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1636 stat->td.td_cbp = 0; 1637 stat->nexttd = tail; 1638 stat->td.td_nexttd = htole32(tail->physaddr); 1639 stat->td.td_be = 0; 1640 stat->flags = OHCI_CALL_DONE; 1641 stat->len = 0; 1642 stat->xfer = xfer; 1643 1644 #ifdef OHCI_DEBUG 1645 if (ohcidebug > 5) { 1646 DPRINTF(("ohci_device_request:\n")); 1647 ohci_dump_ed(sed); 1648 ohci_dump_tds(setup); 1649 } 1650 #endif 1651 1652 /* Insert ED in schedule */ 1653 s = splusb(); 1654 sed->ed.ed_tailp = htole32(tail->physaddr); 1655 opipe->tail.td = tail; 1656 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1657 if (xfer->timeout && !sc->sc_bus.use_polling) { 1658 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1659 ohci_timeout, xfer); 1660 } 1661 splx(s); 1662 1663 #if 1 1664 if (ohcidebug > 20) { 1665 delay(10000); 1666 DPRINTF(("ohci_device_request: status=%x\n", 1667 OREAD4(sc, OHCI_COMMAND_STATUS))); 1668 ohci_dumpregs(sc); 1669 printf("ctrl head:\n"); 1670 ohci_dump_ed(sc->sc_ctrl_head); 1671 printf("sed:\n"); 1672 ohci_dump_ed(sed); 1673 ohci_dump_tds(setup); 1674 } 1675 #endif 1676 1677 return (USBD_NORMAL_COMPLETION); 1678 1679 bad3: 1680 ohci_free_std(sc, tail); 1681 bad2: 1682 ohci_free_std(sc, stat); 1683 bad1: 1684 return (err); 1685 } 1686 1687 /* 1688 * Add an ED to the schedule. Called at splusb(). 1689 */ 1690 void 1691 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1692 { 1693 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1694 1695 SPLUSBCHECK; 1696 sed->next = head->next; 1697 sed->ed.ed_nexted = head->ed.ed_nexted; 1698 head->next = sed; 1699 head->ed.ed_nexted = htole32(sed->physaddr); 1700 } 1701 1702 /* 1703 * Remove an ED from the schedule. Called at splusb(). 1704 */ 1705 void 1706 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1707 { 1708 ohci_soft_ed_t *p; 1709 1710 SPLUSBCHECK; 1711 1712 /* XXX */ 1713 for (p = head; p == NULL && p->next != sed; p = p->next) 1714 ; 1715 if (p == NULL) 1716 panic("ohci_rem_ed: ED not found\n"); 1717 p->next = sed->next; 1718 p->ed.ed_nexted = sed->ed.ed_nexted; 1719 } 1720 1721 /* 1722 * When a transfer is completed the TD is added to the done queue by 1723 * the host controller. This queue is the processed by software. 1724 * Unfortunately the queue contains the physical address of the TD 1725 * and we have no simple way to translate this back to a kernel address. 1726 * To make the translation possible (and fast) we use a hash table of 1727 * TDs currently in the schedule. The physical address is used as the 1728 * hash value. 1729 */ 1730 1731 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1732 /* Called at splusb() */ 1733 void 1734 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1735 { 1736 int h = HASH(std->physaddr); 1737 1738 SPLUSBCHECK; 1739 1740 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1741 } 1742 1743 /* Called at splusb() */ 1744 void 1745 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1746 { 1747 SPLUSBCHECK; 1748 1749 LIST_REMOVE(std, hnext); 1750 } 1751 1752 ohci_soft_td_t * 1753 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1754 { 1755 int h = HASH(a); 1756 ohci_soft_td_t *std; 1757 1758 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1759 std != NULL; 1760 std = LIST_NEXT(std, hnext)) 1761 if (std->physaddr == a) 1762 return (std); 1763 return (NULL); 1764 } 1765 1766 /* Called at splusb() */ 1767 void 1768 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1769 { 1770 int h = HASH(sitd->physaddr); 1771 1772 SPLUSBCHECK; 1773 1774 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1775 sitd, (u_long)sitd->physaddr)); 1776 1777 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1778 } 1779 1780 /* Called at splusb() */ 1781 void 1782 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1783 { 1784 SPLUSBCHECK; 1785 1786 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1787 sitd, (u_long)sitd->physaddr)); 1788 1789 LIST_REMOVE(sitd, hnext); 1790 } 1791 1792 ohci_soft_itd_t * 1793 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1794 { 1795 int h = HASH(a); 1796 ohci_soft_itd_t *sitd; 1797 1798 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1799 sitd != NULL; 1800 sitd = LIST_NEXT(sitd, hnext)) 1801 if (sitd->physaddr == a) 1802 return (sitd); 1803 return (NULL); 1804 } 1805 1806 void 1807 ohci_timeout(void *addr) 1808 { 1809 usbd_xfer_handle xfer = addr; 1810 int s; 1811 1812 DPRINTF(("ohci_timeout: xfer=%p\n", xfer)); 1813 1814 s = splusb(); 1815 xfer->device->bus->intr_context++; 1816 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1817 xfer->device->bus->intr_context--; 1818 splx(s); 1819 } 1820 1821 #ifdef OHCI_DEBUG 1822 void 1823 ohci_dump_tds(ohci_soft_td_t *std) 1824 { 1825 for (; std; std = std->nexttd) 1826 ohci_dump_td(std); 1827 } 1828 1829 void 1830 ohci_dump_td(ohci_soft_td_t *std) 1831 { 1832 char sbuf[128]; 1833 1834 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1835 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1836 sbuf, sizeof(sbuf)); 1837 1838 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1839 "nexttd=0x%08lx be=0x%08lx\n", 1840 std, (u_long)std->physaddr, sbuf, 1841 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1842 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1843 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1844 (u_long)le32toh(std->td.td_cbp), 1845 (u_long)le32toh(std->td.td_nexttd), 1846 (u_long)le32toh(std->td.td_be)); 1847 } 1848 1849 void 1850 ohci_dump_itd(ohci_soft_itd_t *sitd) 1851 { 1852 int i; 1853 1854 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1855 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1856 sitd, (u_long)sitd->physaddr, 1857 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1858 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1859 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1860 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1861 (u_long)le32toh(sitd->itd.itd_bp0), 1862 (u_long)le32toh(sitd->itd.itd_nextitd), 1863 (u_long)le32toh(sitd->itd.itd_be)); 1864 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1865 printf("offs[%d]=0x%04x ", i, 1866 (u_int)le16toh(sitd->itd.itd_offset[i])); 1867 printf("\n"); 1868 } 1869 1870 void 1871 ohci_dump_itds(ohci_soft_itd_t *sitd) 1872 { 1873 for (; sitd; sitd = sitd->nextitd) 1874 ohci_dump_itd(sitd); 1875 } 1876 1877 void 1878 ohci_dump_ed(ohci_soft_ed_t *sed) 1879 { 1880 char sbuf[128], sbuf2[128]; 1881 1882 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1883 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1884 sbuf, sizeof(sbuf)); 1885 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1886 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1887 1888 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1889 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1890 sed, (u_long)sed->physaddr, 1891 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1892 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1893 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1894 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1895 (u_long)le32toh(sed->ed.ed_headp), 1896 (u_long)le32toh(sed->ed.ed_nexted)); 1897 } 1898 #endif 1899 1900 usbd_status 1901 ohci_open(usbd_pipe_handle pipe) 1902 { 1903 usbd_device_handle dev = pipe->device; 1904 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1905 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1906 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1907 u_int8_t addr = dev->address; 1908 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1909 ohci_soft_ed_t *sed; 1910 ohci_soft_td_t *std; 1911 ohci_soft_itd_t *sitd; 1912 ohci_physaddr_t tdphys; 1913 u_int32_t fmt; 1914 usbd_status err; 1915 int s; 1916 int ival; 1917 1918 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1919 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1920 1921 std = NULL; 1922 sed = NULL; 1923 1924 if (addr == sc->sc_addr) { 1925 switch (ed->bEndpointAddress) { 1926 case USB_CONTROL_ENDPOINT: 1927 pipe->methods = &ohci_root_ctrl_methods; 1928 break; 1929 case UE_DIR_IN | OHCI_INTR_ENDPT: 1930 pipe->methods = &ohci_root_intr_methods; 1931 break; 1932 default: 1933 return (USBD_INVAL); 1934 } 1935 } else { 1936 sed = ohci_alloc_sed(sc); 1937 if (sed == NULL) 1938 goto bad0; 1939 opipe->sed = sed; 1940 if (xfertype == UE_ISOCHRONOUS) { 1941 sitd = ohci_alloc_sitd(sc); 1942 if (sitd == NULL) { 1943 ohci_free_sitd(sc, sitd); 1944 goto bad1; 1945 } 1946 opipe->tail.itd = sitd; 1947 tdphys = sitd->physaddr; 1948 fmt = OHCI_ED_FORMAT_ISO; 1949 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1950 fmt |= OHCI_ED_DIR_IN; 1951 else 1952 fmt |= OHCI_ED_DIR_OUT; 1953 } else { 1954 std = ohci_alloc_std(sc); 1955 if (std == NULL) { 1956 ohci_free_std(sc, std); 1957 goto bad1; 1958 } 1959 opipe->tail.td = std; 1960 tdphys = std->physaddr; 1961 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1962 } 1963 sed->ed.ed_flags = htole32( 1964 OHCI_ED_SET_FA(addr) | 1965 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1966 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 1967 fmt | 1968 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1969 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1970 1971 switch (xfertype) { 1972 case UE_CONTROL: 1973 pipe->methods = &ohci_device_ctrl_methods; 1974 err = usb_allocmem(&sc->sc_bus, 1975 sizeof(usb_device_request_t), 1976 0, &opipe->u.ctl.reqdma); 1977 if (err) 1978 goto bad; 1979 s = splusb(); 1980 ohci_add_ed(sed, sc->sc_ctrl_head); 1981 splx(s); 1982 break; 1983 case UE_INTERRUPT: 1984 pipe->methods = &ohci_device_intr_methods; 1985 ival = pipe->interval; 1986 if (ival == USBD_DEFAULT_INTERVAL) 1987 ival = ed->bInterval; 1988 return (ohci_device_setintr(sc, opipe, ival)); 1989 case UE_ISOCHRONOUS: 1990 pipe->methods = &ohci_device_isoc_methods; 1991 return (ohci_setup_isoc(pipe)); 1992 case UE_BULK: 1993 pipe->methods = &ohci_device_bulk_methods; 1994 s = splusb(); 1995 ohci_add_ed(sed, sc->sc_bulk_head); 1996 splx(s); 1997 break; 1998 } 1999 } 2000 return (USBD_NORMAL_COMPLETION); 2001 2002 bad: 2003 if (std != NULL) 2004 ohci_free_std(sc, std); 2005 bad1: 2006 if (sed != NULL) 2007 ohci_free_sed(sc, sed); 2008 bad0: 2009 return (USBD_NOMEM); 2010 2011 } 2012 2013 /* 2014 * Close a reqular pipe. 2015 * Assumes that there are no pending transactions. 2016 */ 2017 void 2018 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2019 { 2020 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2021 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2022 ohci_soft_ed_t *sed = opipe->sed; 2023 int s; 2024 2025 s = splusb(); 2026 #ifdef DIAGNOSTIC 2027 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2028 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2029 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2030 ohci_soft_td_t *std; 2031 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2032 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2033 "tl=0x%x pipe=%p, std=%p\n", sed, 2034 (int)le32toh(sed->ed.ed_headp), 2035 (int)le32toh(sed->ed.ed_tailp), 2036 pipe, std); 2037 #ifdef USB_DEBUG 2038 usbd_dump_pipe(&opipe->pipe); 2039 #endif 2040 #ifdef OHCI_DEBUG 2041 ohci_dump_ed(sed); 2042 if (std) 2043 ohci_dump_td(std); 2044 #endif 2045 usb_delay_ms(&sc->sc_bus, 2); 2046 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2047 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2048 printf("ohci_close_pipe: pipe still not empty\n"); 2049 } 2050 #endif 2051 ohci_rem_ed(sed, head); 2052 splx(s); 2053 ohci_free_sed(sc, opipe->sed); 2054 } 2055 2056 /* 2057 * Abort a device request. 2058 * If this routine is called at splusb() it guarantees that the request 2059 * will be removed from the hardware scheduling and that the callback 2060 * for it will be called with USBD_CANCELLED status. 2061 * It's impossible to guarantee that the requested transfer will not 2062 * have happened since the hardware runs concurrently. 2063 * If the transaction has already happened we rely on the ordinary 2064 * interrupt processing to process it. 2065 */ 2066 void 2067 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2068 { 2069 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2070 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2071 ohci_soft_ed_t *sed = opipe->sed; 2072 ohci_soft_td_t *p, *n; 2073 ohci_physaddr_t headp; 2074 int s, hit; 2075 2076 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2077 2078 if (xfer->device->bus->intr_context || !curproc) 2079 panic("ohci_abort_xfer: not in process context\n"); 2080 2081 /* 2082 * Step 1: Make interrupt routine and hardware ignore xfer. 2083 */ 2084 s = splusb(); 2085 xfer->status = status; /* make software ignore it */ 2086 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2087 splx(s); 2088 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2089 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2090 2091 /* 2092 * Step 2: Wait until we know hardware has finished any possible 2093 * use of the xfer. Also make sure the soft interrupt routine 2094 * has run. 2095 */ 2096 usb_delay_ms(opipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 2097 /* XXX should have some communication with softintr() to know 2098 when it's done */ 2099 usb_delay_ms(opipe->pipe.device->bus, 250); 2100 2101 /* 2102 * Step 3: Remove any vestiges of the xfer from the hardware. 2103 * The complication here is that the hardware may have executed 2104 * beyond the xfer we're trying to abort. So as we're scanning 2105 * the TDs of this xfer we check if the hardware points to 2106 * any of them. 2107 */ 2108 s = splusb(); /* XXX why? */ 2109 p = xfer->hcpriv; 2110 #ifdef DIAGNOSTIC 2111 if (p == NULL) { 2112 splx(s); 2113 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2114 return; 2115 } 2116 #endif 2117 #ifdef OHCI_DEBUG 2118 if (ohcidebug > 1) { 2119 DPRINTF(("ohci_abort_xfer: sed=\n")); 2120 ohci_dump_ed(sed); 2121 ohci_dump_tds(p); 2122 } 2123 #endif 2124 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2125 hit = 0; 2126 for (; p->xfer == xfer; p = n) { 2127 hit |= headp == p->physaddr; 2128 n = p->nexttd; 2129 ohci_free_std(sc, p); 2130 } 2131 /* Zap headp register if hardware pointed inside the xfer. */ 2132 if (hit) { 2133 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2134 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2135 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2136 } else { 2137 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2138 } 2139 2140 /* 2141 * Step 4: Turn on hardware again. 2142 */ 2143 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2144 2145 /* 2146 * Step 5: Execute callback. 2147 */ 2148 usb_transfer_complete(xfer); 2149 2150 splx(s); 2151 } 2152 2153 /* 2154 * Data structures and routines to emulate the root hub. 2155 */ 2156 Static usb_device_descriptor_t ohci_devd = { 2157 USB_DEVICE_DESCRIPTOR_SIZE, 2158 UDESC_DEVICE, /* type */ 2159 {0x00, 0x01}, /* USB version */ 2160 UDCLASS_HUB, /* class */ 2161 UDSUBCLASS_HUB, /* subclass */ 2162 UDPROTO_FSHUB, 2163 64, /* max packet */ 2164 {0},{0},{0x00,0x01}, /* device id */ 2165 1,2,0, /* string indicies */ 2166 1 /* # of configurations */ 2167 }; 2168 2169 Static usb_config_descriptor_t ohci_confd = { 2170 USB_CONFIG_DESCRIPTOR_SIZE, 2171 UDESC_CONFIG, 2172 {USB_CONFIG_DESCRIPTOR_SIZE + 2173 USB_INTERFACE_DESCRIPTOR_SIZE + 2174 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2175 1, 2176 1, 2177 0, 2178 UC_SELF_POWERED, 2179 0 /* max power */ 2180 }; 2181 2182 Static usb_interface_descriptor_t ohci_ifcd = { 2183 USB_INTERFACE_DESCRIPTOR_SIZE, 2184 UDESC_INTERFACE, 2185 0, 2186 0, 2187 1, 2188 UICLASS_HUB, 2189 UISUBCLASS_HUB, 2190 UIPROTO_FSHUB, 2191 0 2192 }; 2193 2194 Static usb_endpoint_descriptor_t ohci_endpd = { 2195 USB_ENDPOINT_DESCRIPTOR_SIZE, 2196 UDESC_ENDPOINT, 2197 UE_DIR_IN | OHCI_INTR_ENDPT, 2198 UE_INTERRUPT, 2199 {8, 0}, /* max packet */ 2200 255 2201 }; 2202 2203 Static usb_hub_descriptor_t ohci_hubd = { 2204 USB_HUB_DESCRIPTOR_SIZE, 2205 UDESC_HUB, 2206 0, 2207 {0,0}, 2208 0, 2209 0, 2210 {0}, 2211 }; 2212 2213 Static int 2214 ohci_str(p, l, s) 2215 usb_string_descriptor_t *p; 2216 int l; 2217 char *s; 2218 { 2219 int i; 2220 2221 if (l == 0) 2222 return (0); 2223 p->bLength = 2 * strlen(s) + 2; 2224 if (l == 1) 2225 return (1); 2226 p->bDescriptorType = UDESC_STRING; 2227 l -= 2; 2228 for (i = 0; s[i] && l > 1; i++, l -= 2) 2229 USETW2(p->bString[i], 0, s[i]); 2230 return (2*i+2); 2231 } 2232 2233 /* 2234 * Simulate a hardware hub by handling all the necessary requests. 2235 */ 2236 Static usbd_status 2237 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2238 { 2239 usbd_status err; 2240 2241 /* Insert last in queue. */ 2242 err = usb_insert_transfer(xfer); 2243 if (err) 2244 return (err); 2245 2246 /* Pipe isn't running, start first */ 2247 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2248 } 2249 2250 Static usbd_status 2251 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2252 { 2253 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2254 usb_device_request_t *req; 2255 void *buf = NULL; 2256 int port, i; 2257 int s, len, value, index, l, totlen = 0; 2258 usb_port_status_t ps; 2259 usb_hub_descriptor_t hubd; 2260 usbd_status err; 2261 u_int32_t v; 2262 2263 if (sc->sc_dying) 2264 return (USBD_IOERROR); 2265 2266 #ifdef DIAGNOSTIC 2267 if (!(xfer->rqflags & URQ_REQUEST)) 2268 /* XXX panic */ 2269 return (USBD_INVAL); 2270 #endif 2271 req = &xfer->request; 2272 2273 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2274 req->bmRequestType, req->bRequest)); 2275 2276 len = UGETW(req->wLength); 2277 value = UGETW(req->wValue); 2278 index = UGETW(req->wIndex); 2279 2280 if (len != 0) 2281 buf = KERNADDR(&xfer->dmabuf); 2282 2283 #define C(x,y) ((x) | ((y) << 8)) 2284 switch(C(req->bRequest, req->bmRequestType)) { 2285 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2286 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2287 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2288 /* 2289 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2290 * for the integrated root hub. 2291 */ 2292 break; 2293 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2294 if (len > 0) { 2295 *(u_int8_t *)buf = sc->sc_conf; 2296 totlen = 1; 2297 } 2298 break; 2299 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2300 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2301 switch(value >> 8) { 2302 case UDESC_DEVICE: 2303 if ((value & 0xff) != 0) { 2304 err = USBD_IOERROR; 2305 goto ret; 2306 } 2307 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2308 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2309 memcpy(buf, &ohci_devd, l); 2310 break; 2311 case UDESC_CONFIG: 2312 if ((value & 0xff) != 0) { 2313 err = USBD_IOERROR; 2314 goto ret; 2315 } 2316 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2317 memcpy(buf, &ohci_confd, l); 2318 buf = (char *)buf + l; 2319 len -= l; 2320 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2321 totlen += l; 2322 memcpy(buf, &ohci_ifcd, l); 2323 buf = (char *)buf + l; 2324 len -= l; 2325 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2326 totlen += l; 2327 memcpy(buf, &ohci_endpd, l); 2328 break; 2329 case UDESC_STRING: 2330 if (len == 0) 2331 break; 2332 *(u_int8_t *)buf = 0; 2333 totlen = 1; 2334 switch (value & 0xff) { 2335 case 1: /* Vendor */ 2336 totlen = ohci_str(buf, len, sc->sc_vendor); 2337 break; 2338 case 2: /* Product */ 2339 totlen = ohci_str(buf, len, "OHCI root hub"); 2340 break; 2341 } 2342 break; 2343 default: 2344 err = USBD_IOERROR; 2345 goto ret; 2346 } 2347 break; 2348 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2349 if (len > 0) { 2350 *(u_int8_t *)buf = 0; 2351 totlen = 1; 2352 } 2353 break; 2354 case C(UR_GET_STATUS, UT_READ_DEVICE): 2355 if (len > 1) { 2356 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2357 totlen = 2; 2358 } 2359 break; 2360 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2361 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2362 if (len > 1) { 2363 USETW(((usb_status_t *)buf)->wStatus, 0); 2364 totlen = 2; 2365 } 2366 break; 2367 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2368 if (value >= USB_MAX_DEVICES) { 2369 err = USBD_IOERROR; 2370 goto ret; 2371 } 2372 sc->sc_addr = value; 2373 break; 2374 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2375 if (value != 0 && value != 1) { 2376 err = USBD_IOERROR; 2377 goto ret; 2378 } 2379 sc->sc_conf = value; 2380 break; 2381 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2382 break; 2383 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2384 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2385 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2386 err = USBD_IOERROR; 2387 goto ret; 2388 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2389 break; 2390 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2391 break; 2392 /* Hub requests */ 2393 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2394 break; 2395 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2396 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2397 "port=%d feature=%d\n", 2398 index, value)); 2399 if (index < 1 || index > sc->sc_noport) { 2400 err = USBD_IOERROR; 2401 goto ret; 2402 } 2403 port = OHCI_RH_PORT_STATUS(index); 2404 switch(value) { 2405 case UHF_PORT_ENABLE: 2406 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2407 break; 2408 case UHF_PORT_SUSPEND: 2409 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2410 break; 2411 case UHF_PORT_POWER: 2412 /* Yes, writing to the LOW_SPEED bit clears power. */ 2413 OWRITE4(sc, port, UPS_LOW_SPEED); 2414 break; 2415 case UHF_C_PORT_CONNECTION: 2416 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2417 break; 2418 case UHF_C_PORT_ENABLE: 2419 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2420 break; 2421 case UHF_C_PORT_SUSPEND: 2422 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2423 break; 2424 case UHF_C_PORT_OVER_CURRENT: 2425 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2426 break; 2427 case UHF_C_PORT_RESET: 2428 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2429 break; 2430 default: 2431 err = USBD_IOERROR; 2432 goto ret; 2433 } 2434 switch(value) { 2435 case UHF_C_PORT_CONNECTION: 2436 case UHF_C_PORT_ENABLE: 2437 case UHF_C_PORT_SUSPEND: 2438 case UHF_C_PORT_OVER_CURRENT: 2439 case UHF_C_PORT_RESET: 2440 /* Enable RHSC interrupt if condition is cleared. */ 2441 if ((OREAD4(sc, port) >> 16) == 0) 2442 ohci_rhsc_able(sc, 1); 2443 break; 2444 default: 2445 break; 2446 } 2447 break; 2448 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2449 if (value != 0) { 2450 err = USBD_IOERROR; 2451 goto ret; 2452 } 2453 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2454 hubd = ohci_hubd; 2455 hubd.bNbrPorts = sc->sc_noport; 2456 USETW(hubd.wHubCharacteristics, 2457 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2458 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2459 /* XXX overcurrent */ 2460 ); 2461 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2462 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2463 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2464 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2465 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2466 l = min(len, hubd.bDescLength); 2467 totlen = l; 2468 memcpy(buf, &hubd, l); 2469 break; 2470 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2471 if (len != 4) { 2472 err = USBD_IOERROR; 2473 goto ret; 2474 } 2475 memset(buf, 0, len); /* ? XXX */ 2476 totlen = len; 2477 break; 2478 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2479 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2480 index)); 2481 if (index < 1 || index > sc->sc_noport) { 2482 err = USBD_IOERROR; 2483 goto ret; 2484 } 2485 if (len != 4) { 2486 err = USBD_IOERROR; 2487 goto ret; 2488 } 2489 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2490 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2491 v)); 2492 USETW(ps.wPortStatus, v); 2493 USETW(ps.wPortChange, v >> 16); 2494 l = min(len, sizeof ps); 2495 memcpy(buf, &ps, l); 2496 totlen = l; 2497 break; 2498 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2499 err = USBD_IOERROR; 2500 goto ret; 2501 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2502 break; 2503 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2504 if (index < 1 || index > sc->sc_noport) { 2505 err = USBD_IOERROR; 2506 goto ret; 2507 } 2508 port = OHCI_RH_PORT_STATUS(index); 2509 switch(value) { 2510 case UHF_PORT_ENABLE: 2511 OWRITE4(sc, port, UPS_PORT_ENABLED); 2512 break; 2513 case UHF_PORT_SUSPEND: 2514 OWRITE4(sc, port, UPS_SUSPEND); 2515 break; 2516 case UHF_PORT_RESET: 2517 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2518 index)); 2519 OWRITE4(sc, port, UPS_RESET); 2520 for (i = 0; i < 5; i++) { 2521 usb_delay_ms(&sc->sc_bus, 2522 USB_PORT_ROOT_RESET_DELAY); 2523 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2524 break; 2525 } 2526 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2527 index, OREAD4(sc, port))); 2528 break; 2529 case UHF_PORT_POWER: 2530 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2531 "%d\n", index)); 2532 OWRITE4(sc, port, UPS_PORT_POWER); 2533 break; 2534 default: 2535 err = USBD_IOERROR; 2536 goto ret; 2537 } 2538 break; 2539 default: 2540 err = USBD_IOERROR; 2541 goto ret; 2542 } 2543 xfer->actlen = totlen; 2544 err = USBD_NORMAL_COMPLETION; 2545 ret: 2546 xfer->status = err; 2547 s = splusb(); 2548 usb_transfer_complete(xfer); 2549 splx(s); 2550 return (USBD_IN_PROGRESS); 2551 } 2552 2553 /* Abort a root control request. */ 2554 Static void 2555 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2556 { 2557 /* Nothing to do, all transfers are synchronous. */ 2558 } 2559 2560 /* Close the root pipe. */ 2561 Static void 2562 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2563 { 2564 DPRINTF(("ohci_root_ctrl_close\n")); 2565 /* Nothing to do. */ 2566 } 2567 2568 Static usbd_status 2569 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2570 { 2571 usbd_status err; 2572 2573 /* Insert last in queue. */ 2574 err = usb_insert_transfer(xfer); 2575 if (err) 2576 return (err); 2577 2578 /* Pipe isn't running, start first */ 2579 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2580 } 2581 2582 Static usbd_status 2583 ohci_root_intr_start(usbd_xfer_handle xfer) 2584 { 2585 usbd_pipe_handle pipe = xfer->pipe; 2586 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2587 2588 if (sc->sc_dying) 2589 return (USBD_IOERROR); 2590 2591 sc->sc_intrxfer = xfer; 2592 2593 return (USBD_IN_PROGRESS); 2594 } 2595 2596 /* Abort a root interrupt request. */ 2597 Static void 2598 ohci_root_intr_abort(usbd_xfer_handle xfer) 2599 { 2600 int s; 2601 2602 if (xfer->pipe->intrxfer == xfer) { 2603 DPRINTF(("ohci_root_intr_abort: remove\n")); 2604 xfer->pipe->intrxfer = NULL; 2605 } 2606 xfer->status = USBD_CANCELLED; 2607 s = splusb(); 2608 usb_transfer_complete(xfer); 2609 splx(s); 2610 } 2611 2612 /* Close the root pipe. */ 2613 Static void 2614 ohci_root_intr_close(usbd_pipe_handle pipe) 2615 { 2616 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2617 2618 DPRINTF(("ohci_root_intr_close\n")); 2619 2620 sc->sc_intrxfer = NULL; 2621 } 2622 2623 /************************/ 2624 2625 Static usbd_status 2626 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2627 { 2628 usbd_status err; 2629 2630 /* Insert last in queue. */ 2631 err = usb_insert_transfer(xfer); 2632 if (err) 2633 return (err); 2634 2635 /* Pipe isn't running, start first */ 2636 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2637 } 2638 2639 Static usbd_status 2640 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2641 { 2642 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2643 usbd_status err; 2644 2645 if (sc->sc_dying) 2646 return (USBD_IOERROR); 2647 2648 #ifdef DIAGNOSTIC 2649 if (!(xfer->rqflags & URQ_REQUEST)) { 2650 /* XXX panic */ 2651 printf("ohci_device_ctrl_transfer: not a request\n"); 2652 return (USBD_INVAL); 2653 } 2654 #endif 2655 2656 err = ohci_device_request(xfer); 2657 if (err) 2658 return (err); 2659 2660 if (sc->sc_bus.use_polling) 2661 ohci_waitintr(sc, xfer); 2662 return (USBD_IN_PROGRESS); 2663 } 2664 2665 /* Abort a device control request. */ 2666 Static void 2667 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2668 { 2669 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2670 ohci_abort_xfer(xfer, USBD_CANCELLED); 2671 } 2672 2673 /* Close a device control pipe. */ 2674 Static void 2675 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2676 { 2677 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2678 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2679 2680 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2681 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2682 ohci_free_std(sc, opipe->tail.td); 2683 } 2684 2685 /************************/ 2686 2687 Static void 2688 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2689 { 2690 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2691 2692 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2693 } 2694 2695 Static void 2696 ohci_noop(usbd_pipe_handle pipe) 2697 { 2698 } 2699 2700 Static usbd_status 2701 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2702 { 2703 usbd_status err; 2704 2705 /* Insert last in queue. */ 2706 err = usb_insert_transfer(xfer); 2707 if (err) 2708 return (err); 2709 2710 /* Pipe isn't running, start first */ 2711 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2712 } 2713 2714 Static usbd_status 2715 ohci_device_bulk_start(usbd_xfer_handle xfer) 2716 { 2717 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2718 usbd_device_handle dev = opipe->pipe.device; 2719 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2720 int addr = dev->address; 2721 ohci_soft_td_t *data, *tail, *tdp; 2722 ohci_soft_ed_t *sed; 2723 int s, len, isread, endpt; 2724 usbd_status err; 2725 2726 if (sc->sc_dying) 2727 return (USBD_IOERROR); 2728 2729 #ifdef DIAGNOSTIC 2730 if (xfer->rqflags & URQ_REQUEST) { 2731 /* XXX panic */ 2732 printf("ohci_device_bulk_start: a request\n"); 2733 return (USBD_INVAL); 2734 } 2735 #endif 2736 2737 len = xfer->length; 2738 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2739 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2740 sed = opipe->sed; 2741 2742 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2743 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2744 endpt)); 2745 2746 opipe->u.bulk.isread = isread; 2747 opipe->u.bulk.length = len; 2748 2749 /* Update device address */ 2750 sed->ed.ed_flags = htole32( 2751 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2752 OHCI_ED_SET_FA(addr)); 2753 2754 /* Allocate a chain of new TDs (including a new tail). */ 2755 data = opipe->tail.td; 2756 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2757 data, &tail); 2758 /* We want interrupt at the end of the transfer. */ 2759 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2760 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2761 tail->flags |= OHCI_CALL_DONE; 2762 tail = tail->nexttd; /* point at sentinel */ 2763 if (err) 2764 return (err); 2765 2766 tail->xfer = NULL; 2767 xfer->hcpriv = data; 2768 2769 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2770 "td_cbp=0x%08x td_be=0x%08x\n", 2771 (int)le32toh(sed->ed.ed_flags), 2772 (int)le32toh(data->td.td_flags), 2773 (int)le32toh(data->td.td_cbp), 2774 (int)le32toh(data->td.td_be))); 2775 2776 #ifdef OHCI_DEBUG 2777 if (ohcidebug > 5) { 2778 ohci_dump_ed(sed); 2779 ohci_dump_tds(data); 2780 } 2781 #endif 2782 2783 /* Insert ED in schedule */ 2784 s = splusb(); 2785 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2786 tdp->xfer = xfer; 2787 } 2788 sed->ed.ed_tailp = htole32(tail->physaddr); 2789 opipe->tail.td = tail; 2790 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2791 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2792 if (xfer->timeout && !sc->sc_bus.use_polling) { 2793 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2794 ohci_timeout, xfer); 2795 } 2796 2797 #if 0 2798 /* This goes wrong if we are too slow. */ 2799 if (ohcidebug > 10) { 2800 delay(10000); 2801 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2802 OREAD4(sc, OHCI_COMMAND_STATUS))); 2803 ohci_dump_ed(sed); 2804 ohci_dump_tds(data); 2805 } 2806 #endif 2807 2808 splx(s); 2809 2810 return (USBD_IN_PROGRESS); 2811 } 2812 2813 Static void 2814 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2815 { 2816 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2817 ohci_abort_xfer(xfer, USBD_CANCELLED); 2818 } 2819 2820 /* 2821 * Close a device bulk pipe. 2822 */ 2823 Static void 2824 ohci_device_bulk_close(usbd_pipe_handle pipe) 2825 { 2826 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2827 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2828 2829 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2830 ohci_close_pipe(pipe, sc->sc_bulk_head); 2831 ohci_free_std(sc, opipe->tail.td); 2832 } 2833 2834 /************************/ 2835 2836 Static usbd_status 2837 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2838 { 2839 usbd_status err; 2840 2841 /* Insert last in queue. */ 2842 err = usb_insert_transfer(xfer); 2843 if (err) 2844 return (err); 2845 2846 /* Pipe isn't running, start first */ 2847 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2848 } 2849 2850 Static usbd_status 2851 ohci_device_intr_start(usbd_xfer_handle xfer) 2852 { 2853 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2854 usbd_device_handle dev = opipe->pipe.device; 2855 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2856 ohci_soft_ed_t *sed = opipe->sed; 2857 ohci_soft_td_t *data, *tail; 2858 int len; 2859 int s; 2860 2861 if (sc->sc_dying) 2862 return (USBD_IOERROR); 2863 2864 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2865 "flags=%d priv=%p\n", 2866 xfer, xfer->length, xfer->flags, xfer->priv)); 2867 2868 #ifdef DIAGNOSTIC 2869 if (xfer->rqflags & URQ_REQUEST) 2870 panic("ohci_device_intr_transfer: a request\n"); 2871 #endif 2872 2873 len = xfer->length; 2874 2875 data = opipe->tail.td; 2876 tail = ohci_alloc_std(sc); 2877 if (tail == NULL) 2878 return (USBD_NOMEM); 2879 tail->xfer = NULL; 2880 2881 data->td.td_flags = htole32( 2882 OHCI_TD_IN | OHCI_TD_NOCC | 2883 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2884 if (xfer->flags & USBD_SHORT_XFER_OK) 2885 data->td.td_flags |= htole32(OHCI_TD_R); 2886 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2887 data->nexttd = tail; 2888 data->td.td_nexttd = htole32(tail->physaddr); 2889 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2890 data->len = len; 2891 data->xfer = xfer; 2892 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2893 xfer->hcpriv = data; 2894 2895 #ifdef OHCI_DEBUG 2896 if (ohcidebug > 5) { 2897 DPRINTF(("ohci_device_intr_transfer:\n")); 2898 ohci_dump_ed(sed); 2899 ohci_dump_tds(data); 2900 } 2901 #endif 2902 2903 /* Insert ED in schedule */ 2904 s = splusb(); 2905 sed->ed.ed_tailp = htole32(tail->physaddr); 2906 opipe->tail.td = tail; 2907 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2908 2909 #if 0 2910 /* 2911 * This goes horribly wrong, printing thousands of descriptors, 2912 * because false references are followed due to the fact that the 2913 * TD is gone. 2914 */ 2915 if (ohcidebug > 5) { 2916 usb_delay_ms(&sc->sc_bus, 5); 2917 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2918 OREAD4(sc, OHCI_COMMAND_STATUS))); 2919 ohci_dump_ed(sed); 2920 ohci_dump_tds(data); 2921 } 2922 #endif 2923 splx(s); 2924 2925 return (USBD_IN_PROGRESS); 2926 } 2927 2928 /* Abort a device control request. */ 2929 Static void 2930 ohci_device_intr_abort(usbd_xfer_handle xfer) 2931 { 2932 if (xfer->pipe->intrxfer == xfer) { 2933 DPRINTF(("ohci_device_intr_abort: remove\n")); 2934 xfer->pipe->intrxfer = NULL; 2935 } 2936 ohci_abort_xfer(xfer, USBD_CANCELLED); 2937 } 2938 2939 /* Close a device interrupt pipe. */ 2940 Static void 2941 ohci_device_intr_close(usbd_pipe_handle pipe) 2942 { 2943 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2944 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2945 int nslots = opipe->u.intr.nslots; 2946 int pos = opipe->u.intr.pos; 2947 int j; 2948 ohci_soft_ed_t *p, *sed = opipe->sed; 2949 int s; 2950 2951 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2952 pipe, nslots, pos)); 2953 s = splusb(); 2954 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2955 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2956 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2957 usb_delay_ms(&sc->sc_bus, 2); 2958 2959 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2960 ; 2961 #ifdef DIAGNOSTIC 2962 if (p == NULL) 2963 panic("ohci_device_intr_close: ED not found\n"); 2964 #endif 2965 p->next = sed->next; 2966 p->ed.ed_nexted = sed->ed.ed_nexted; 2967 splx(s); 2968 2969 for (j = 0; j < nslots; j++) 2970 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2971 2972 ohci_free_std(sc, opipe->tail.td); 2973 ohci_free_sed(sc, opipe->sed); 2974 } 2975 2976 Static usbd_status 2977 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2978 { 2979 int i, j, s, best; 2980 u_int npoll, slow, shigh, nslots; 2981 u_int bestbw, bw; 2982 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2983 2984 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2985 if (ival == 0) { 2986 printf("ohci_setintr: 0 interval\n"); 2987 return (USBD_INVAL); 2988 } 2989 2990 npoll = OHCI_NO_INTRS; 2991 while (npoll > ival) 2992 npoll /= 2; 2993 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 2994 2995 /* 2996 * We now know which level in the tree the ED must go into. 2997 * Figure out which slot has most bandwidth left over. 2998 * Slots to examine: 2999 * npoll 3000 * 1 0 3001 * 2 1 2 3002 * 4 3 4 5 6 3003 * 8 7 8 9 10 11 12 13 14 3004 * N (N-1) .. (N-1+N-1) 3005 */ 3006 slow = npoll-1; 3007 shigh = slow + npoll; 3008 nslots = OHCI_NO_INTRS / npoll; 3009 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3010 bw = 0; 3011 for (j = 0; j < nslots; j++) 3012 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3013 if (bw < bestbw) { 3014 best = i; 3015 bestbw = bw; 3016 } 3017 } 3018 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3019 best, slow, shigh, bestbw)); 3020 3021 s = splusb(); 3022 hsed = sc->sc_eds[best]; 3023 sed->next = hsed->next; 3024 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3025 hsed->next = sed; 3026 hsed->ed.ed_nexted = htole32(sed->physaddr); 3027 splx(s); 3028 3029 for (j = 0; j < nslots; j++) 3030 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3031 opipe->u.intr.nslots = nslots; 3032 opipe->u.intr.pos = best; 3033 3034 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3035 return (USBD_NORMAL_COMPLETION); 3036 } 3037 3038 /***********************/ 3039 3040 usbd_status 3041 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3042 { 3043 usbd_status err; 3044 3045 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3046 3047 /* Put it on our queue, */ 3048 err = usb_insert_transfer(xfer); 3049 3050 /* bail out on error, */ 3051 if (err && err != USBD_IN_PROGRESS) 3052 return (err); 3053 3054 /* XXX should check inuse here */ 3055 3056 /* insert into schedule, */ 3057 ohci_device_isoc_enter(xfer); 3058 3059 /* and start if the pipe wasn't running */ 3060 if (!err) 3061 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3062 3063 return (err); 3064 } 3065 3066 void 3067 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3068 { 3069 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3070 usbd_device_handle dev = opipe->pipe.device; 3071 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3072 ohci_soft_ed_t *sed = opipe->sed; 3073 struct iso *iso = &opipe->u.iso; 3074 ohci_soft_itd_t *sitd, *nsitd; 3075 ohci_physaddr_t buf, offs, noffs, bp0; 3076 int i, ncur, nframes; 3077 int s; 3078 3079 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3080 "nframes=%d\n", 3081 iso->inuse, iso->next, xfer, xfer->nframes)); 3082 3083 if (sc->sc_dying) 3084 return; 3085 3086 if (iso->next == -1) { 3087 /* Not in use yet, schedule it a few frames ahead. */ 3088 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3089 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3090 iso->next)); 3091 } 3092 3093 sitd = opipe->tail.itd; 3094 buf = DMAADDR(&xfer->dmabuf); 3095 bp0 = OHCI_PAGE(buf); 3096 offs = OHCI_PAGE_OFFSET(buf); 3097 nframes = xfer->nframes; 3098 xfer->hcpriv = sitd; 3099 for (i = ncur = 0; i < nframes; i++, ncur++) { 3100 noffs = offs + xfer->frlengths[i]; 3101 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3102 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3103 3104 /* Allocate next ITD */ 3105 nsitd = ohci_alloc_sitd(sc); 3106 if (nsitd == NULL) { 3107 /* XXX what now? */ 3108 printf("%s: isoc TD alloc failed\n", 3109 USBDEVNAME(sc->sc_bus.bdev)); 3110 return; 3111 } 3112 3113 /* Fill current ITD */ 3114 sitd->itd.itd_flags = htole32( 3115 OHCI_ITD_NOCC | 3116 OHCI_ITD_SET_SF(iso->next) | 3117 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3118 OHCI_ITD_SET_FC(ncur)); 3119 sitd->itd.itd_bp0 = htole32(bp0); 3120 sitd->nextitd = nsitd; 3121 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3122 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3123 sitd->xfer = xfer; 3124 sitd->flags = 0; 3125 3126 sitd = nsitd; 3127 iso->next = iso->next + ncur; 3128 bp0 = OHCI_PAGE(buf + offs); 3129 ncur = 0; 3130 } 3131 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3132 offs = noffs; 3133 } 3134 nsitd = ohci_alloc_sitd(sc); 3135 if (nsitd == NULL) { 3136 /* XXX what now? */ 3137 printf("%s: isoc TD alloc failed\n", 3138 USBDEVNAME(sc->sc_bus.bdev)); 3139 return; 3140 } 3141 /* Fixup last used ITD */ 3142 sitd->itd.itd_flags = htole32( 3143 OHCI_ITD_NOCC | 3144 OHCI_ITD_SET_SF(iso->next) | 3145 OHCI_ITD_SET_DI(0) | 3146 OHCI_ITD_SET_FC(ncur)); 3147 sitd->itd.itd_bp0 = htole32(bp0); 3148 sitd->nextitd = nsitd; 3149 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3150 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3151 sitd->xfer = xfer; 3152 sitd->flags = OHCI_CALL_DONE; 3153 3154 iso->next = iso->next + ncur; 3155 iso->inuse += nframes; 3156 3157 xfer->actlen = offs; /* XXX pretend we did it all */ 3158 3159 xfer->status = USBD_IN_PROGRESS; 3160 3161 #ifdef OHCI_DEBUG 3162 if (ohcidebug > 5) { 3163 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3164 le32toh(sc->sc_hcca->hcca_frame_number))); 3165 ohci_dump_itds(xfer->hcpriv); 3166 ohci_dump_ed(sed); 3167 } 3168 #endif 3169 3170 s = splusb(); 3171 opipe->tail.itd = nsitd; 3172 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3173 splx(s); 3174 3175 #ifdef OHCI_DEBUG 3176 if (ohcidebug > 5) { 3177 delay(150000); 3178 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3179 le32toh(sc->sc_hcca->hcca_frame_number))); 3180 ohci_dump_itds(xfer->hcpriv); 3181 ohci_dump_ed(sed); 3182 } 3183 #endif 3184 } 3185 3186 usbd_status 3187 ohci_device_isoc_start(usbd_xfer_handle xfer) 3188 { 3189 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3190 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3191 3192 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3193 3194 if (sc->sc_dying) 3195 return (USBD_IOERROR); 3196 3197 #ifdef DIAGNOSTIC 3198 if (xfer->status != USBD_IN_PROGRESS) 3199 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3200 #endif 3201 3202 /* XXX anything to do? */ 3203 3204 return (USBD_IN_PROGRESS); 3205 } 3206 3207 void 3208 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3209 { 3210 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3211 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3212 ohci_soft_ed_t *sed; 3213 ohci_soft_itd_t *sitd; 3214 int s; 3215 3216 s = splusb(); 3217 3218 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3219 3220 /* Transfer is already done. */ 3221 if (xfer->status != USBD_NOT_STARTED && 3222 xfer->status != USBD_IN_PROGRESS) { 3223 splx(s); 3224 printf("ohci_device_isoc_abort: early return\n"); 3225 return; 3226 } 3227 3228 /* Give xfer the requested abort code. */ 3229 xfer->status = USBD_CANCELLED; 3230 3231 sed = opipe->sed; 3232 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3233 3234 sitd = xfer->hcpriv; 3235 #ifdef DIAGNOSTIC 3236 if (sitd == NULL) { 3237 splx(s); 3238 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3239 return; 3240 } 3241 #endif 3242 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3243 #ifdef DIAGNOSTIC 3244 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3245 sitd->isdone = 1; 3246 #endif 3247 } 3248 3249 splx(s); 3250 3251 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3252 3253 s = splusb(); 3254 3255 /* Run callback. */ 3256 usb_transfer_complete(xfer); 3257 3258 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3259 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3260 3261 splx(s); 3262 } 3263 3264 void 3265 ohci_device_isoc_done(usbd_xfer_handle xfer) 3266 { 3267 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3268 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3269 ohci_soft_itd_t *sitd, *nsitd; 3270 3271 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3272 3273 for (sitd = xfer->hcpriv; 3274 !(sitd->flags & OHCI_CALL_DONE); 3275 sitd = nsitd) { 3276 nsitd = sitd->nextitd; 3277 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3278 ohci_free_sitd(sc, sitd); 3279 } 3280 ohci_free_sitd(sc, sitd); 3281 xfer->hcpriv = NULL; 3282 } 3283 3284 usbd_status 3285 ohci_setup_isoc(usbd_pipe_handle pipe) 3286 { 3287 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3288 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3289 struct iso *iso = &opipe->u.iso; 3290 int s; 3291 3292 iso->next = -1; 3293 iso->inuse = 0; 3294 3295 s = splusb(); 3296 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3297 splx(s); 3298 3299 return (USBD_NORMAL_COMPLETION); 3300 } 3301 3302 void 3303 ohci_device_isoc_close(usbd_pipe_handle pipe) 3304 { 3305 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3306 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3307 int s; 3308 3309 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3310 3311 s = splusb(); 3312 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3313 splx(s); 3314 ohci_close_pipe(pipe, sc->sc_isoc_head); 3315 #ifdef DIAGNOSTIC 3316 opipe->tail.itd->isdone = 1; 3317 #endif 3318 ohci_free_sitd(sc, opipe->tail.itd); 3319 } 3320
Indexes created Fri Sep 26 20:09:58 GMT 2025