ohci.c revision 1.115
1 /* $NetBSD: ohci.c,v 1.115 2001/11/21 05:52:50 itojun Exp $ */ 2 /* $FreeBSD: src/sys/dev/usb/ohci.c,v 1.22 1999/11/17 22:33:40 n_hibma Exp $ */ 3 4 /* 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Lennart Augustsson (lennart (at) augustsson.net) at 10 * Carlstedt Research & Technology. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the NetBSD 23 * Foundation, Inc. and its contributors. 24 * 4. Neither the name of The NetBSD Foundation nor the names of its 25 * contributors may be used to endorse or promote products derived 26 * from this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 * POSSIBILITY OF SUCH DAMAGE. 39 */ 40 41 /* 42 * USB Open Host Controller driver. 43 * 44 * OHCI spec: http://www.compaq.com/productinfo/development/openhci.html 45 * USB spec: http://www.usb.org/developers/data/usbspec.zip 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: ohci.c,v 1.115 2001/11/21 05:52:50 itojun Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/malloc.h> 54 #if defined(__NetBSD__) || defined(__OpenBSD__) 55 #include <sys/kernel.h> 56 #include <sys/device.h> 57 #include <sys/select.h> 58 #elif defined(__FreeBSD__) 59 #include <sys/module.h> 60 #include <sys/bus.h> 61 #include <machine/bus_pio.h> 62 #include <machine/bus_memio.h> 63 #if defined(DIAGNOSTIC) && defined(__i386__) && defined(__FreeBSD__) 64 #include <machine/cpu.h> 65 #endif 66 #endif 67 #include <sys/proc.h> 68 #include <sys/queue.h> 69 70 #include <machine/bus.h> 71 #include <machine/endian.h> 72 73 #include <dev/usb/usb.h> 74 #include <dev/usb/usbdi.h> 75 #include <dev/usb/usbdivar.h> 76 #include <dev/usb/usb_mem.h> 77 #include <dev/usb/usb_quirks.h> 78 79 #include <dev/usb/ohcireg.h> 80 #include <dev/usb/ohcivar.h> 81 82 #if defined(__FreeBSD__) 83 #include <machine/clock.h> 84 85 #define delay(d) DELAY(d) 86 #endif 87 88 #if defined(__OpenBSD__) 89 struct cfdriver ohci_cd = { 90 NULL, "ohci", DV_DULL 91 }; 92 #endif 93 94 #ifdef OHCI_DEBUG 95 #define DPRINTF(x) if (ohcidebug) logprintf x 96 #define DPRINTFN(n,x) if (ohcidebug>(n)) logprintf x 97 int ohcidebug = 0; 98 #ifndef __NetBSD__ 99 #define bitmask_snprintf(q,f,b,l) snprintf((b), (l), "%b", (q), (f)) 100 #endif 101 #else 102 #define DPRINTF(x) 103 #define DPRINTFN(n,x) 104 #endif 105 106 /* 107 * The OHCI controller is little endian, so on big endian machines 108 * the data strored in memory needs to be swapped. 109 */ 110 #if defined(__FreeBSD__) || defined(__OpenBSD__) 111 #if BYTE_ORDER == BIG_ENDIAN 112 #define htole32(x) (bswap32(x)) 113 #define le32toh(x) (bswap32(x)) 114 #else 115 #define htole32(x) (x) 116 #define le32toh(x) (x) 117 #endif 118 #endif 119 120 struct ohci_pipe; 121 122 Static ohci_soft_ed_t *ohci_alloc_sed(ohci_softc_t *); 123 Static void ohci_free_sed(ohci_softc_t *, ohci_soft_ed_t *); 124 125 Static ohci_soft_td_t *ohci_alloc_std(ohci_softc_t *); 126 Static void ohci_free_std(ohci_softc_t *, ohci_soft_td_t *); 127 128 Static ohci_soft_itd_t *ohci_alloc_sitd(ohci_softc_t *); 129 Static void ohci_free_sitd(ohci_softc_t *,ohci_soft_itd_t *); 130 131 #if 0 132 Static void ohci_free_std_chain(ohci_softc_t *, ohci_soft_td_t *, 133 ohci_soft_td_t *); 134 #endif 135 Static usbd_status ohci_alloc_std_chain(struct ohci_pipe *, 136 ohci_softc_t *, int, int, usbd_xfer_handle, 137 ohci_soft_td_t *, ohci_soft_td_t **); 138 139 Static void ohci_shutdown(void *v); 140 Static void ohci_power(int, void *); 141 Static usbd_status ohci_open(usbd_pipe_handle); 142 Static void ohci_poll(struct usbd_bus *); 143 Static void ohci_softintr(void *); 144 Static void ohci_waitintr(ohci_softc_t *, usbd_xfer_handle); 145 Static void ohci_add_done(ohci_softc_t *, ohci_physaddr_t); 146 Static void ohci_rhsc(ohci_softc_t *, usbd_xfer_handle); 147 148 Static usbd_status ohci_device_request(usbd_xfer_handle xfer); 149 Static void ohci_add_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 150 Static void ohci_rem_ed(ohci_soft_ed_t *, ohci_soft_ed_t *); 151 Static void ohci_hash_add_td(ohci_softc_t *, ohci_soft_td_t *); 152 Static void ohci_hash_rem_td(ohci_softc_t *, ohci_soft_td_t *); 153 Static ohci_soft_td_t *ohci_hash_find_td(ohci_softc_t *, ohci_physaddr_t); 154 Static void ohci_hash_add_itd(ohci_softc_t *, ohci_soft_itd_t *); 155 Static void ohci_hash_rem_itd(ohci_softc_t *, ohci_soft_itd_t *); 156 Static ohci_soft_itd_t *ohci_hash_find_itd(ohci_softc_t *, ohci_physaddr_t); 157 158 Static usbd_status ohci_setup_isoc(usbd_pipe_handle pipe); 159 Static void ohci_device_isoc_enter(usbd_xfer_handle); 160 161 Static usbd_status ohci_allocm(struct usbd_bus *, usb_dma_t *, u_int32_t); 162 Static void ohci_freem(struct usbd_bus *, usb_dma_t *); 163 164 Static usbd_xfer_handle ohci_allocx(struct usbd_bus *); 165 Static void ohci_freex(struct usbd_bus *, usbd_xfer_handle); 166 167 Static usbd_status ohci_root_ctrl_transfer(usbd_xfer_handle); 168 Static usbd_status ohci_root_ctrl_start(usbd_xfer_handle); 169 Static void ohci_root_ctrl_abort(usbd_xfer_handle); 170 Static void ohci_root_ctrl_close(usbd_pipe_handle); 171 Static void ohci_root_ctrl_done(usbd_xfer_handle); 172 173 Static usbd_status ohci_root_intr_transfer(usbd_xfer_handle); 174 Static usbd_status ohci_root_intr_start(usbd_xfer_handle); 175 Static void ohci_root_intr_abort(usbd_xfer_handle); 176 Static void ohci_root_intr_close(usbd_pipe_handle); 177 Static void ohci_root_intr_done(usbd_xfer_handle); 178 179 Static usbd_status ohci_device_ctrl_transfer(usbd_xfer_handle); 180 Static usbd_status ohci_device_ctrl_start(usbd_xfer_handle); 181 Static void ohci_device_ctrl_abort(usbd_xfer_handle); 182 Static void ohci_device_ctrl_close(usbd_pipe_handle); 183 Static void ohci_device_ctrl_done(usbd_xfer_handle); 184 185 Static usbd_status ohci_device_bulk_transfer(usbd_xfer_handle); 186 Static usbd_status ohci_device_bulk_start(usbd_xfer_handle); 187 Static void ohci_device_bulk_abort(usbd_xfer_handle); 188 Static void ohci_device_bulk_close(usbd_pipe_handle); 189 Static void ohci_device_bulk_done(usbd_xfer_handle); 190 191 Static usbd_status ohci_device_intr_transfer(usbd_xfer_handle); 192 Static usbd_status ohci_device_intr_start(usbd_xfer_handle); 193 Static void ohci_device_intr_abort(usbd_xfer_handle); 194 Static void ohci_device_intr_close(usbd_pipe_handle); 195 Static void ohci_device_intr_done(usbd_xfer_handle); 196 197 Static usbd_status ohci_device_isoc_transfer(usbd_xfer_handle); 198 Static usbd_status ohci_device_isoc_start(usbd_xfer_handle); 199 Static void ohci_device_isoc_abort(usbd_xfer_handle); 200 Static void ohci_device_isoc_close(usbd_pipe_handle); 201 Static void ohci_device_isoc_done(usbd_xfer_handle); 202 203 Static usbd_status ohci_device_setintr(ohci_softc_t *sc, 204 struct ohci_pipe *pipe, int ival); 205 206 Static int ohci_str(usb_string_descriptor_t *, int, char *); 207 208 Static void ohci_timeout(void *); 209 Static void ohci_timeout_task(void *); 210 Static void ohci_rhsc_able(ohci_softc_t *, int); 211 Static void ohci_rhsc_enable(void *); 212 213 Static void ohci_close_pipe(usbd_pipe_handle, ohci_soft_ed_t *); 214 Static void ohci_abort_xfer(usbd_xfer_handle, usbd_status); 215 216 Static void ohci_device_clear_toggle(usbd_pipe_handle pipe); 217 Static void ohci_noop(usbd_pipe_handle pipe); 218 219 #ifdef OHCI_DEBUG 220 Static void ohci_dumpregs(ohci_softc_t *); 221 Static void ohci_dump_tds(ohci_soft_td_t *); 222 Static void ohci_dump_td(ohci_soft_td_t *); 223 Static void ohci_dump_ed(ohci_soft_ed_t *); 224 Static void ohci_dump_itd(ohci_soft_itd_t *); 225 Static void ohci_dump_itds(ohci_soft_itd_t *); 226 #endif 227 228 #define OBARR(sc) bus_space_barrier((sc)->iot, (sc)->ioh, 0, (sc)->sc_size, \ 229 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE) 230 #define OWRITE1(sc, r, x) \ 231 do { OBARR(sc); bus_space_write_1((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 232 #define OWRITE2(sc, r, x) \ 233 do { OBARR(sc); bus_space_write_2((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 234 #define OWRITE4(sc, r, x) \ 235 do { OBARR(sc); bus_space_write_4((sc)->iot, (sc)->ioh, (r), (x)); } while (0) 236 #define OREAD1(sc, r) (OBARR(sc), bus_space_read_1((sc)->iot, (sc)->ioh, (r))) 237 #define OREAD2(sc, r) (OBARR(sc), bus_space_read_2((sc)->iot, (sc)->ioh, (r))) 238 #define OREAD4(sc, r) (OBARR(sc), bus_space_read_4((sc)->iot, (sc)->ioh, (r))) 239 240 /* Reverse the bits in a value 0 .. 31 */ 241 Static u_int8_t revbits[OHCI_NO_INTRS] = 242 { 0x00, 0x10, 0x08, 0x18, 0x04, 0x14, 0x0c, 0x1c, 243 0x02, 0x12, 0x0a, 0x1a, 0x06, 0x16, 0x0e, 0x1e, 244 0x01, 0x11, 0x09, 0x19, 0x05, 0x15, 0x0d, 0x1d, 245 0x03, 0x13, 0x0b, 0x1b, 0x07, 0x17, 0x0f, 0x1f }; 246 247 struct ohci_pipe { 248 struct usbd_pipe pipe; 249 ohci_soft_ed_t *sed; 250 union { 251 ohci_soft_td_t *td; 252 ohci_soft_itd_t *itd; 253 } tail; 254 /* Info needed for different pipe kinds. */ 255 union { 256 /* Control pipe */ 257 struct { 258 usb_dma_t reqdma; 259 u_int length; 260 ohci_soft_td_t *setup, *data, *stat; 261 } ctl; 262 /* Interrupt pipe */ 263 struct { 264 int nslots; 265 int pos; 266 } intr; 267 /* Bulk pipe */ 268 struct { 269 u_int length; 270 int isread; 271 } bulk; 272 /* Iso pipe */ 273 struct iso { 274 int next, inuse; 275 } iso; 276 } u; 277 }; 278 279 #define OHCI_INTR_ENDPT 1 280 281 Static struct usbd_bus_methods ohci_bus_methods = { 282 ohci_open, 283 ohci_softintr, 284 ohci_poll, 285 ohci_allocm, 286 ohci_freem, 287 ohci_allocx, 288 ohci_freex, 289 }; 290 291 Static struct usbd_pipe_methods ohci_root_ctrl_methods = { 292 ohci_root_ctrl_transfer, 293 ohci_root_ctrl_start, 294 ohci_root_ctrl_abort, 295 ohci_root_ctrl_close, 296 ohci_noop, 297 ohci_root_ctrl_done, 298 }; 299 300 Static struct usbd_pipe_methods ohci_root_intr_methods = { 301 ohci_root_intr_transfer, 302 ohci_root_intr_start, 303 ohci_root_intr_abort, 304 ohci_root_intr_close, 305 ohci_noop, 306 ohci_root_intr_done, 307 }; 308 309 Static struct usbd_pipe_methods ohci_device_ctrl_methods = { 310 ohci_device_ctrl_transfer, 311 ohci_device_ctrl_start, 312 ohci_device_ctrl_abort, 313 ohci_device_ctrl_close, 314 ohci_noop, 315 ohci_device_ctrl_done, 316 }; 317 318 Static struct usbd_pipe_methods ohci_device_intr_methods = { 319 ohci_device_intr_transfer, 320 ohci_device_intr_start, 321 ohci_device_intr_abort, 322 ohci_device_intr_close, 323 ohci_device_clear_toggle, 324 ohci_device_intr_done, 325 }; 326 327 Static struct usbd_pipe_methods ohci_device_bulk_methods = { 328 ohci_device_bulk_transfer, 329 ohci_device_bulk_start, 330 ohci_device_bulk_abort, 331 ohci_device_bulk_close, 332 ohci_device_clear_toggle, 333 ohci_device_bulk_done, 334 }; 335 336 Static struct usbd_pipe_methods ohci_device_isoc_methods = { 337 ohci_device_isoc_transfer, 338 ohci_device_isoc_start, 339 ohci_device_isoc_abort, 340 ohci_device_isoc_close, 341 ohci_noop, 342 ohci_device_isoc_done, 343 }; 344 345 #if defined(__NetBSD__) || defined(__OpenBSD__) 346 int 347 ohci_activate(device_ptr_t self, enum devact act) 348 { 349 struct ohci_softc *sc = (struct ohci_softc *)self; 350 int rv = 0; 351 352 switch (act) { 353 case DVACT_ACTIVATE: 354 return (EOPNOTSUPP); 355 break; 356 357 case DVACT_DEACTIVATE: 358 if (sc->sc_child != NULL) 359 rv = config_deactivate(sc->sc_child); 360 sc->sc_dying = 1; 361 break; 362 } 363 return (rv); 364 } 365 366 int 367 ohci_detach(struct ohci_softc *sc, int flags) 368 { 369 int rv = 0; 370 371 if (sc->sc_child != NULL) 372 rv = config_detach(sc->sc_child, flags); 373 374 if (rv != 0) 375 return (rv); 376 377 usb_uncallout(sc->sc_tmo_rhsc, ohci_rhsc_enable, sc); 378 379 #if defined(__NetBSD__) || defined(__OpenBSD__) 380 powerhook_disestablish(sc->sc_powerhook); 381 shutdownhook_disestablish(sc->sc_shutdownhook); 382 #endif 383 384 /* free data structures XXX */ 385 386 return (rv); 387 } 388 #endif 389 390 ohci_soft_ed_t * 391 ohci_alloc_sed(ohci_softc_t *sc) 392 { 393 ohci_soft_ed_t *sed; 394 usbd_status err; 395 int i, offs; 396 usb_dma_t dma; 397 398 if (sc->sc_freeeds == NULL) { 399 DPRINTFN(2, ("ohci_alloc_sed: allocating chunk\n")); 400 err = usb_allocmem(&sc->sc_bus, OHCI_SED_SIZE * OHCI_SED_CHUNK, 401 OHCI_ED_ALIGN, &dma); 402 if (err) 403 return (0); 404 for(i = 0; i < OHCI_SED_CHUNK; i++) { 405 offs = i * OHCI_SED_SIZE; 406 sed = (ohci_soft_ed_t *)((char *)KERNADDR(&dma) +offs); 407 sed->physaddr = DMAADDR(&dma) + offs; 408 sed->next = sc->sc_freeeds; 409 sc->sc_freeeds = sed; 410 } 411 } 412 sed = sc->sc_freeeds; 413 sc->sc_freeeds = sed->next; 414 memset(&sed->ed, 0, sizeof(ohci_ed_t)); 415 sed->next = 0; 416 return (sed); 417 } 418 419 void 420 ohci_free_sed(ohci_softc_t *sc, ohci_soft_ed_t *sed) 421 { 422 sed->next = sc->sc_freeeds; 423 sc->sc_freeeds = sed; 424 } 425 426 ohci_soft_td_t * 427 ohci_alloc_std(ohci_softc_t *sc) 428 { 429 ohci_soft_td_t *std; 430 usbd_status err; 431 int i, offs; 432 usb_dma_t dma; 433 int s; 434 435 if (sc->sc_freetds == NULL) { 436 DPRINTFN(2, ("ohci_alloc_std: allocating chunk\n")); 437 err = usb_allocmem(&sc->sc_bus, OHCI_STD_SIZE * OHCI_STD_CHUNK, 438 OHCI_TD_ALIGN, &dma); 439 if (err) 440 return (NULL); 441 s = splusb(); 442 for(i = 0; i < OHCI_STD_CHUNK; i++) { 443 offs = i * OHCI_STD_SIZE; 444 std = (ohci_soft_td_t *)((char *)KERNADDR(&dma) +offs); 445 std->physaddr = DMAADDR(&dma) + offs; 446 std->nexttd = sc->sc_freetds; 447 sc->sc_freetds = std; 448 } 449 splx(s); 450 } 451 452 s = splusb(); 453 std = sc->sc_freetds; 454 sc->sc_freetds = std->nexttd; 455 memset(&std->td, 0, sizeof(ohci_td_t)); 456 std->nexttd = NULL; 457 std->xfer = NULL; 458 ohci_hash_add_td(sc, std); 459 splx(s); 460 461 return (std); 462 } 463 464 void 465 ohci_free_std(ohci_softc_t *sc, ohci_soft_td_t *std) 466 { 467 int s; 468 469 s = splusb(); 470 ohci_hash_rem_td(sc, std); 471 std->nexttd = sc->sc_freetds; 472 sc->sc_freetds = std; 473 splx(s); 474 } 475 476 usbd_status 477 ohci_alloc_std_chain(struct ohci_pipe *opipe, ohci_softc_t *sc, 478 int alen, int rd, usbd_xfer_handle xfer, 479 ohci_soft_td_t *sp, ohci_soft_td_t **ep) 480 { 481 ohci_soft_td_t *next, *cur; 482 ohci_physaddr_t dataphys, dataphysend; 483 u_int32_t tdflags; 484 int len, curlen; 485 usb_dma_t *dma = &xfer->dmabuf; 486 u_int16_t flags = xfer->flags; 487 488 DPRINTFN(alen < 4096,("ohci_alloc_std_chain: start len=%d\n", alen)); 489 490 len = alen; 491 cur = sp; 492 dataphys = DMAADDR(dma); 493 dataphysend = OHCI_PAGE(dataphys + len - 1); 494 tdflags = htole32( 495 (rd ? OHCI_TD_IN : OHCI_TD_OUT) | 496 (flags & USBD_SHORT_XFER_OK ? OHCI_TD_R : 0) | 497 OHCI_TD_NOCC | OHCI_TD_TOGGLE_CARRY | OHCI_TD_NOINTR); 498 499 for (;;) { 500 next = ohci_alloc_std(sc); 501 if (next == NULL) 502 goto nomem; 503 504 /* The OHCI hardware can handle at most one page crossing. */ 505 if (OHCI_PAGE(dataphys) == dataphysend || 506 OHCI_PAGE(dataphys) + OHCI_PAGE_SIZE == dataphysend) { 507 /* we can handle it in this TD */ 508 curlen = len; 509 } else { 510 /* must use multiple TDs, fill as much as possible. */ 511 curlen = 2 * OHCI_PAGE_SIZE - 512 (dataphys & (OHCI_PAGE_SIZE-1)); 513 /* the length must be a multiple of the max size */ 514 curlen -= curlen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize); 515 #ifdef DIAGNOSTIC 516 if (curlen == 0) 517 panic("ohci_alloc_std: curlen == 0\n"); 518 #endif 519 } 520 DPRINTFN(4,("ohci_alloc_std_chain: dataphys=0x%08x " 521 "dataphysend=0x%08x len=%d curlen=%d\n", 522 dataphys, dataphysend, 523 len, curlen)); 524 len -= curlen; 525 526 cur->td.td_flags = tdflags; 527 cur->td.td_cbp = htole32(dataphys); 528 cur->nexttd = next; 529 cur->td.td_nexttd = htole32(next->physaddr); 530 cur->td.td_be = htole32(dataphys + curlen - 1); 531 cur->len = curlen; 532 cur->flags = OHCI_ADD_LEN; 533 cur->xfer = xfer; 534 DPRINTFN(10,("ohci_alloc_std_chain: cbp=0x%08x be=0x%08x\n", 535 dataphys, dataphys + curlen - 1)); 536 if (len == 0) 537 break; 538 DPRINTFN(10,("ohci_alloc_std_chain: extend chain\n")); 539 dataphys += curlen; 540 cur = next; 541 } 542 if ((flags & USBD_FORCE_SHORT_XFER) && 543 alen % UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize) == 0) { 544 /* Force a 0 length transfer at the end. */ 545 546 cur = next; 547 next = ohci_alloc_std(sc); 548 if (next == NULL) 549 goto nomem; 550 551 cur->td.td_flags = tdflags; 552 cur->td.td_cbp = 0; /* indicate 0 length packet */ 553 cur->nexttd = next; 554 cur->td.td_nexttd = htole32(next->physaddr); 555 cur->td.td_be = ~0; 556 cur->len = 0; 557 cur->flags = 0; 558 cur->xfer = xfer; 559 DPRINTFN(2,("ohci_alloc_std_chain: add 0 xfer\n")); 560 } 561 *ep = cur; 562 563 return (USBD_NORMAL_COMPLETION); 564 565 nomem: 566 /* XXX free chain */ 567 return (USBD_NOMEM); 568 } 569 570 #if 0 571 Static void 572 ohci_free_std_chain(ohci_softc_t *sc, ohci_soft_td_t *std, 573 ohci_soft_td_t *stdend) 574 { 575 ohci_soft_td_t *p; 576 577 for (; std != stdend; std = p) { 578 p = std->nexttd; 579 ohci_free_std(sc, std); 580 } 581 } 582 #endif 583 584 ohci_soft_itd_t * 585 ohci_alloc_sitd(ohci_softc_t *sc) 586 { 587 ohci_soft_itd_t *sitd; 588 usbd_status err; 589 int i, s, offs; 590 usb_dma_t dma; 591 592 if (sc->sc_freeitds == NULL) { 593 DPRINTFN(2, ("ohci_alloc_sitd: allocating chunk\n")); 594 err = usb_allocmem(&sc->sc_bus, OHCI_SITD_SIZE * OHCI_SITD_CHUNK, 595 OHCI_ITD_ALIGN, &dma); 596 if (err) 597 return (NULL); 598 for(i = 0; i < OHCI_SITD_CHUNK; i++) { 599 offs = i * OHCI_SITD_SIZE; 600 sitd = (ohci_soft_itd_t *)((char*)KERNADDR(&dma)+offs); 601 sitd->physaddr = DMAADDR(&dma) + offs; 602 sitd->nextitd = sc->sc_freeitds; 603 sc->sc_freeitds = sitd; 604 } 605 } 606 607 s = splusb(); 608 sitd = sc->sc_freeitds; 609 sc->sc_freeitds = sitd->nextitd; 610 memset(&sitd->itd, 0, sizeof(ohci_itd_t)); 611 sitd->nextitd = NULL; 612 sitd->xfer = NULL; 613 ohci_hash_add_itd(sc, sitd); 614 splx(s); 615 616 #ifdef DIAGNOSTIC 617 sitd->isdone = 0; 618 #endif 619 620 return (sitd); 621 } 622 623 void 624 ohci_free_sitd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 625 { 626 int s; 627 628 DPRINTFN(10,("ohci_free_sitd: sitd=%p\n", sitd)); 629 630 #ifdef DIAGNOSTIC 631 if (!sitd->isdone) { 632 panic("ohci_free_sitd: sitd=%p not done\n", sitd); 633 return; 634 } 635 #endif 636 637 s = splusb(); 638 ohci_hash_rem_itd(sc, sitd); 639 sitd->nextitd = sc->sc_freeitds; 640 sc->sc_freeitds = sitd; 641 splx(s); 642 } 643 644 usbd_status 645 ohci_init(ohci_softc_t *sc) 646 { 647 ohci_soft_ed_t *sed, *psed; 648 usbd_status err; 649 int i; 650 u_int32_t s, ctl, ival, hcr, fm, per, rev, desca; 651 652 DPRINTF(("ohci_init: start\n")); 653 #if defined(__OpenBSD__) 654 printf(","); 655 #else 656 printf("%s:", USBDEVNAME(sc->sc_bus.bdev)); 657 #endif 658 rev = OREAD4(sc, OHCI_REVISION); 659 printf(" OHCI version %d.%d%s\n", OHCI_REV_HI(rev), OHCI_REV_LO(rev), 660 OHCI_REV_LEGACY(rev) ? ", legacy support" : ""); 661 662 if (OHCI_REV_HI(rev) != 1 || OHCI_REV_LO(rev) != 0) { 663 printf("%s: unsupported OHCI revision\n", 664 USBDEVNAME(sc->sc_bus.bdev)); 665 sc->sc_bus.usbrev = USBREV_UNKNOWN; 666 return (USBD_INVAL); 667 } 668 sc->sc_bus.usbrev = USBREV_1_0; 669 670 for (i = 0; i < OHCI_HASH_SIZE; i++) 671 LIST_INIT(&sc->sc_hash_tds[i]); 672 for (i = 0; i < OHCI_HASH_SIZE; i++) 673 LIST_INIT(&sc->sc_hash_itds[i]); 674 675 SIMPLEQ_INIT(&sc->sc_free_xfers); 676 677 /* XXX determine alignment by R/W */ 678 /* Allocate the HCCA area. */ 679 err = usb_allocmem(&sc->sc_bus, OHCI_HCCA_SIZE, 680 OHCI_HCCA_ALIGN, &sc->sc_hccadma); 681 if (err) 682 return (err); 683 sc->sc_hcca = (struct ohci_hcca *)KERNADDR(&sc->sc_hccadma); 684 memset(sc->sc_hcca, 0, OHCI_HCCA_SIZE); 685 686 sc->sc_eintrs = OHCI_NORMAL_INTRS; 687 688 /* Allocate dummy ED that starts the control list. */ 689 sc->sc_ctrl_head = ohci_alloc_sed(sc); 690 if (sc->sc_ctrl_head == NULL) { 691 err = USBD_NOMEM; 692 goto bad1; 693 } 694 sc->sc_ctrl_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 695 696 /* Allocate dummy ED that starts the bulk list. */ 697 sc->sc_bulk_head = ohci_alloc_sed(sc); 698 if (sc->sc_bulk_head == NULL) { 699 err = USBD_NOMEM; 700 goto bad2; 701 } 702 sc->sc_bulk_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 703 704 /* Allocate dummy ED that starts the isochronous list. */ 705 sc->sc_isoc_head = ohci_alloc_sed(sc); 706 if (sc->sc_isoc_head == NULL) { 707 err = USBD_NOMEM; 708 goto bad3; 709 } 710 sc->sc_isoc_head->ed.ed_flags |= htole32(OHCI_ED_SKIP); 711 712 /* Allocate all the dummy EDs that make up the interrupt tree. */ 713 for (i = 0; i < OHCI_NO_EDS; i++) { 714 sed = ohci_alloc_sed(sc); 715 if (sed == NULL) { 716 while (--i >= 0) 717 ohci_free_sed(sc, sc->sc_eds[i]); 718 err = USBD_NOMEM; 719 goto bad4; 720 } 721 /* All ED fields are set to 0. */ 722 sc->sc_eds[i] = sed; 723 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 724 if (i != 0) 725 psed = sc->sc_eds[(i-1) / 2]; 726 else 727 psed= sc->sc_isoc_head; 728 sed->next = psed; 729 sed->ed.ed_nexted = htole32(psed->physaddr); 730 } 731 /* 732 * Fill HCCA interrupt table. The bit reversal is to get 733 * the tree set up properly to spread the interrupts. 734 */ 735 for (i = 0; i < OHCI_NO_INTRS; i++) 736 sc->sc_hcca->hcca_interrupt_table[revbits[i]] = 737 htole32(sc->sc_eds[OHCI_NO_EDS-OHCI_NO_INTRS+i]->physaddr); 738 739 #ifdef OHCI_DEBUG 740 if (ohcidebug > 15) { 741 for (i = 0; i < OHCI_NO_EDS; i++) { 742 printf("ed#%d ", i); 743 ohci_dump_ed(sc->sc_eds[i]); 744 } 745 printf("iso "); 746 ohci_dump_ed(sc->sc_isoc_head); 747 } 748 #endif 749 750 /* Determine in what context we are running. */ 751 ctl = OREAD4(sc, OHCI_CONTROL); 752 if (ctl & OHCI_IR) { 753 /* SMM active, request change */ 754 DPRINTF(("ohci_init: SMM active, request owner change\n")); 755 s = OREAD4(sc, OHCI_COMMAND_STATUS); 756 OWRITE4(sc, OHCI_COMMAND_STATUS, s | OHCI_OCR); 757 for (i = 0; i < 100 && (ctl & OHCI_IR); i++) { 758 usb_delay_ms(&sc->sc_bus, 1); 759 ctl = OREAD4(sc, OHCI_CONTROL); 760 } 761 if ((ctl & OHCI_IR) == 0) { 762 printf("%s: SMM does not respond, resetting\n", 763 USBDEVNAME(sc->sc_bus.bdev)); 764 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 765 goto reset; 766 } 767 #if 0 768 /* Don't bother trying to reuse the BIOS init, we'll reset it anyway. */ 769 } else if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_RESET) { 770 /* BIOS started controller. */ 771 DPRINTF(("ohci_init: BIOS active\n")); 772 if ((ctl & OHCI_HCFS_MASK) != OHCI_HCFS_OPERATIONAL) { 773 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_OPERATIONAL); 774 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 775 } 776 #endif 777 } else { 778 DPRINTF(("ohci_init: cold started\n")); 779 reset: 780 /* Controller was cold started. */ 781 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 782 } 783 784 /* 785 * This reset should not be necessary according to the OHCI spec, but 786 * without it some controllers do not start. 787 */ 788 DPRINTF(("%s: resetting\n", USBDEVNAME(sc->sc_bus.bdev))); 789 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 790 usb_delay_ms(&sc->sc_bus, USB_BUS_RESET_DELAY); 791 792 /* We now own the host controller and the bus has been reset. */ 793 ival = OHCI_GET_IVAL(OREAD4(sc, OHCI_FM_INTERVAL)); 794 795 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_HCR); /* Reset HC */ 796 /* Nominal time for a reset is 10 us. */ 797 for (i = 0; i < 10; i++) { 798 delay(10); 799 hcr = OREAD4(sc, OHCI_COMMAND_STATUS) & OHCI_HCR; 800 if (!hcr) 801 break; 802 } 803 if (hcr) { 804 printf("%s: reset timeout\n", USBDEVNAME(sc->sc_bus.bdev)); 805 err = USBD_IOERROR; 806 goto bad5; 807 } 808 #ifdef OHCI_DEBUG 809 if (ohcidebug > 15) 810 ohci_dumpregs(sc); 811 #endif 812 813 /* The controller is now in SUSPEND state, we have 2ms to finish. */ 814 815 /* Set up HC registers. */ 816 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 817 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 818 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 819 /* disable all interrupts and then switch on all desired interrupts */ 820 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 821 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, sc->sc_eintrs | OHCI_MIE); 822 /* switch on desired functional features */ 823 ctl = OREAD4(sc, OHCI_CONTROL); 824 ctl &= ~(OHCI_CBSR_MASK | OHCI_LES | OHCI_HCFS_MASK | OHCI_IR); 825 ctl |= OHCI_PLE | OHCI_IE | OHCI_CLE | OHCI_BLE | 826 OHCI_RATIO_1_4 | OHCI_HCFS_OPERATIONAL; 827 /* And finally start it! */ 828 OWRITE4(sc, OHCI_CONTROL, ctl); 829 830 /* 831 * The controller is now OPERATIONAL. Set a some final 832 * registers that should be set earlier, but that the 833 * controller ignores when in the SUSPEND state. 834 */ 835 fm = (OREAD4(sc, OHCI_FM_INTERVAL) & OHCI_FIT) ^ OHCI_FIT; 836 fm |= OHCI_FSMPS(ival) | ival; 837 OWRITE4(sc, OHCI_FM_INTERVAL, fm); 838 per = OHCI_PERIODIC(ival); /* 90% periodic */ 839 OWRITE4(sc, OHCI_PERIODIC_START, per); 840 841 /* Fiddle the No OverCurrent Protection bit to avoid chip bug. */ 842 desca = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 843 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca | OHCI_NOCP); 844 OWRITE4(sc, OHCI_RH_STATUS, OHCI_LPSC); /* Enable port power */ 845 usb_delay_ms(&sc->sc_bus, OHCI_ENABLE_POWER_DELAY); 846 OWRITE4(sc, OHCI_RH_DESCRIPTOR_A, desca); 847 848 /* 849 * The AMD756 requires a delay before re-reading the register, 850 * otherwise it will occasionally report 0 ports. 851 */ 852 usb_delay_ms(&sc->sc_bus, OHCI_READ_DESC_DELAY); 853 sc->sc_noport = OHCI_GET_NDP(OREAD4(sc, OHCI_RH_DESCRIPTOR_A)); 854 855 #ifdef OHCI_DEBUG 856 if (ohcidebug > 5) 857 ohci_dumpregs(sc); 858 #endif 859 860 /* Set up the bus struct. */ 861 sc->sc_bus.methods = &ohci_bus_methods; 862 sc->sc_bus.pipe_size = sizeof(struct ohci_pipe); 863 864 #if defined(__NetBSD__) || defined(__OpenBSD__) 865 sc->sc_control = sc->sc_intre = 0; 866 sc->sc_powerhook = powerhook_establish(ohci_power, sc); 867 sc->sc_shutdownhook = shutdownhook_establish(ohci_shutdown, sc); 868 #endif 869 870 usb_callout_init(sc->sc_tmo_rhsc); 871 872 return (USBD_NORMAL_COMPLETION); 873 874 bad5: 875 for (i = 0; i < OHCI_NO_EDS; i++) 876 ohci_free_sed(sc, sc->sc_eds[i]); 877 bad4: 878 ohci_free_sed(sc, sc->sc_isoc_head); 879 bad3: 880 ohci_free_sed(sc, sc->sc_ctrl_head); 881 bad2: 882 ohci_free_sed(sc, sc->sc_bulk_head); 883 bad1: 884 usb_freemem(&sc->sc_bus, &sc->sc_hccadma); 885 return (err); 886 } 887 888 usbd_status 889 ohci_allocm(struct usbd_bus *bus, usb_dma_t *dma, u_int32_t size) 890 { 891 #if defined(__NetBSD__) || defined(__OpenBSD__) 892 struct ohci_softc *sc = (struct ohci_softc *)bus; 893 #endif 894 895 return (usb_allocmem(&sc->sc_bus, size, 0, dma)); 896 } 897 898 void 899 ohci_freem(struct usbd_bus *bus, usb_dma_t *dma) 900 { 901 #if defined(__NetBSD__) || defined(__OpenBSD__) 902 struct ohci_softc *sc = (struct ohci_softc *)bus; 903 #endif 904 905 usb_freemem(&sc->sc_bus, dma); 906 } 907 908 usbd_xfer_handle 909 ohci_allocx(struct usbd_bus *bus) 910 { 911 struct ohci_softc *sc = (struct ohci_softc *)bus; 912 usbd_xfer_handle xfer; 913 914 xfer = SIMPLEQ_FIRST(&sc->sc_free_xfers); 915 if (xfer != NULL) 916 SIMPLEQ_REMOVE_HEAD(&sc->sc_free_xfers, xfer, next); 917 else 918 xfer = malloc(sizeof(struct ohci_xfer), M_USB, M_NOWAIT); 919 if (xfer != NULL) 920 memset(xfer, 0, sizeof (struct ohci_xfer)); 921 return (xfer); 922 } 923 924 void 925 ohci_freex(struct usbd_bus *bus, usbd_xfer_handle xfer) 926 { 927 struct ohci_softc *sc = (struct ohci_softc *)bus; 928 929 SIMPLEQ_INSERT_HEAD(&sc->sc_free_xfers, xfer, next); 930 } 931 932 /* 933 * Shut down the controller when the system is going down. 934 */ 935 void 936 ohci_shutdown(void *v) 937 { 938 ohci_softc_t *sc = v; 939 940 DPRINTF(("ohci_shutdown: stopping the HC\n")); 941 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 942 } 943 944 /* 945 * Handle suspend/resume. 946 * 947 * We need to switch to polling mode here, because this routine is 948 * called from an intterupt context. This is all right since we 949 * are almost suspended anyway. 950 */ 951 void 952 ohci_power(int why, void *v) 953 { 954 ohci_softc_t *sc = v; 955 u_int32_t ctl; 956 int s; 957 958 #ifdef OHCI_DEBUG 959 DPRINTF(("ohci_power: sc=%p, why=%d\n", sc, why)); 960 ohci_dumpregs(sc); 961 #endif 962 963 s = splhardusb(); 964 switch (why) { 965 case PWR_SUSPEND: 966 case PWR_STANDBY: 967 sc->sc_bus.use_polling++; 968 ctl = OREAD4(sc, OHCI_CONTROL) & ~OHCI_HCFS_MASK; 969 if (sc->sc_control == 0) { 970 /* 971 * Preserve register values, in case that APM BIOS 972 * does not recover them. 973 */ 974 sc->sc_control = ctl; 975 sc->sc_intre = OREAD4(sc, OHCI_INTERRUPT_ENABLE); 976 } 977 ctl |= OHCI_HCFS_SUSPEND; 978 OWRITE4(sc, OHCI_CONTROL, ctl); 979 usb_delay_ms(&sc->sc_bus, USB_RESUME_WAIT); 980 sc->sc_bus.use_polling--; 981 break; 982 case PWR_RESUME: 983 sc->sc_bus.use_polling++; 984 /* Some broken BIOSes do not recover these values */ 985 OWRITE4(sc, OHCI_HCCA, DMAADDR(&sc->sc_hccadma)); 986 OWRITE4(sc, OHCI_CONTROL_HEAD_ED, sc->sc_ctrl_head->physaddr); 987 OWRITE4(sc, OHCI_BULK_HEAD_ED, sc->sc_bulk_head->physaddr); 988 if (sc->sc_intre) 989 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, 990 sc->sc_intre & (OHCI_ALL_INTRS | OHCI_MIE)); 991 if (sc->sc_control) 992 ctl = sc->sc_control; 993 else 994 ctl = OREAD4(sc, OHCI_CONTROL); 995 ctl |= OHCI_HCFS_RESUME; 996 OWRITE4(sc, OHCI_CONTROL, ctl); 997 usb_delay_ms(&sc->sc_bus, USB_RESUME_DELAY); 998 ctl = (ctl & ~OHCI_HCFS_MASK) | OHCI_HCFS_OPERATIONAL; 999 OWRITE4(sc, OHCI_CONTROL, ctl); 1000 usb_delay_ms(&sc->sc_bus, USB_RESUME_RECOVERY); 1001 sc->sc_control = sc->sc_intre = 0; 1002 sc->sc_bus.use_polling--; 1003 break; 1004 case PWR_SOFTSUSPEND: 1005 case PWR_SOFTSTANDBY: 1006 case PWR_SOFTRESUME: 1007 break; 1008 } 1009 splx(s); 1010 } 1011 1012 #ifdef OHCI_DEBUG 1013 void 1014 ohci_dumpregs(ohci_softc_t *sc) 1015 { 1016 DPRINTF(("ohci_dumpregs: rev=0x%08x control=0x%08x command=0x%08x\n", 1017 OREAD4(sc, OHCI_REVISION), 1018 OREAD4(sc, OHCI_CONTROL), 1019 OREAD4(sc, OHCI_COMMAND_STATUS))); 1020 DPRINTF((" intrstat=0x%08x intre=0x%08x intrd=0x%08x\n", 1021 OREAD4(sc, OHCI_INTERRUPT_STATUS), 1022 OREAD4(sc, OHCI_INTERRUPT_ENABLE), 1023 OREAD4(sc, OHCI_INTERRUPT_DISABLE))); 1024 DPRINTF((" hcca=0x%08x percur=0x%08x ctrlhd=0x%08x\n", 1025 OREAD4(sc, OHCI_HCCA), 1026 OREAD4(sc, OHCI_PERIOD_CURRENT_ED), 1027 OREAD4(sc, OHCI_CONTROL_HEAD_ED))); 1028 DPRINTF((" ctrlcur=0x%08x bulkhd=0x%08x bulkcur=0x%08x\n", 1029 OREAD4(sc, OHCI_CONTROL_CURRENT_ED), 1030 OREAD4(sc, OHCI_BULK_HEAD_ED), 1031 OREAD4(sc, OHCI_BULK_CURRENT_ED))); 1032 DPRINTF((" done=0x%08x fmival=0x%08x fmrem=0x%08x\n", 1033 OREAD4(sc, OHCI_DONE_HEAD), 1034 OREAD4(sc, OHCI_FM_INTERVAL), 1035 OREAD4(sc, OHCI_FM_REMAINING))); 1036 DPRINTF((" fmnum=0x%08x perst=0x%08x lsthrs=0x%08x\n", 1037 OREAD4(sc, OHCI_FM_NUMBER), 1038 OREAD4(sc, OHCI_PERIODIC_START), 1039 OREAD4(sc, OHCI_LS_THRESHOLD))); 1040 DPRINTF((" desca=0x%08x descb=0x%08x stat=0x%08x\n", 1041 OREAD4(sc, OHCI_RH_DESCRIPTOR_A), 1042 OREAD4(sc, OHCI_RH_DESCRIPTOR_B), 1043 OREAD4(sc, OHCI_RH_STATUS))); 1044 DPRINTF((" port1=0x%08x port2=0x%08x\n", 1045 OREAD4(sc, OHCI_RH_PORT_STATUS(1)), 1046 OREAD4(sc, OHCI_RH_PORT_STATUS(2)))); 1047 DPRINTF((" HCCA: frame_number=0x%04x done_head=0x%08x\n", 1048 le32toh(sc->sc_hcca->hcca_frame_number), 1049 le32toh(sc->sc_hcca->hcca_done_head))); 1050 } 1051 #endif 1052 1053 Static int ohci_intr1(ohci_softc_t *); 1054 1055 int 1056 ohci_intr(void *p) 1057 { 1058 ohci_softc_t *sc = p; 1059 1060 if (sc->sc_dying) 1061 return (0); 1062 1063 /* If we get an interrupt while polling, then just ignore it. */ 1064 if (sc->sc_bus.use_polling) { 1065 #ifdef DIAGNOSTIC 1066 printf("ohci_intr: ignored interrupt while polling\n"); 1067 #endif 1068 return (0); 1069 } 1070 1071 return (ohci_intr1(sc)); 1072 } 1073 1074 Static int 1075 ohci_intr1(ohci_softc_t *sc) 1076 { 1077 u_int32_t intrs, eintrs; 1078 ohci_physaddr_t done; 1079 1080 DPRINTFN(14,("ohci_intr1: enter\n")); 1081 1082 /* In case the interrupt occurs before initialization has completed. */ 1083 if (sc == NULL || sc->sc_hcca == NULL) { 1084 #ifdef DIAGNOSTIC 1085 printf("ohci_intr: sc->sc_hcca == NULL\n"); 1086 #endif 1087 return (0); 1088 } 1089 1090 intrs = 0; 1091 done = le32toh(sc->sc_hcca->hcca_done_head); 1092 if (done != 0) { 1093 if (done & ~OHCI_DONE_INTRS) 1094 intrs = OHCI_WDH; 1095 if (done & OHCI_DONE_INTRS) 1096 intrs |= OREAD4(sc, OHCI_INTERRUPT_STATUS); 1097 } else 1098 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1099 1100 if (!intrs) 1101 return (0); 1102 1103 intrs &= ~OHCI_MIE; 1104 OWRITE4(sc, OHCI_INTERRUPT_STATUS, intrs); /* Acknowledge */ 1105 eintrs = intrs & sc->sc_eintrs; 1106 if (!eintrs) 1107 return (0); 1108 1109 sc->sc_bus.intr_context++; 1110 sc->sc_bus.no_intrs++; 1111 DPRINTFN(7, ("ohci_intr: sc=%p intrs=0x%x(0x%x) eintrs=0x%x\n", 1112 sc, (u_int)intrs, OREAD4(sc, OHCI_INTERRUPT_STATUS), 1113 (u_int)eintrs)); 1114 1115 if (eintrs & OHCI_SO) { 1116 sc->sc_overrun_cnt++; 1117 if (usbd_ratecheck(&sc->sc_overrun_ntc)) { 1118 printf("%s: %u scheduling overruns\n", 1119 USBDEVNAME(sc->sc_bus.bdev), sc->sc_overrun_cnt); 1120 sc->sc_overrun_cnt = 0; 1121 } 1122 /* XXX do what */ 1123 eintrs &= ~OHCI_SO; 1124 } 1125 if (eintrs & OHCI_WDH) { 1126 ohci_add_done(sc, done &~ OHCI_DONE_INTRS); 1127 sc->sc_hcca->hcca_done_head = 0; 1128 usb_schedsoftintr(&sc->sc_bus); 1129 eintrs &= ~OHCI_WDH; 1130 } 1131 if (eintrs & OHCI_RD) { 1132 printf("%s: resume detect\n", USBDEVNAME(sc->sc_bus.bdev)); 1133 /* XXX process resume detect */ 1134 } 1135 if (eintrs & OHCI_UE) { 1136 printf("%s: unrecoverable error, controller halted\n", 1137 USBDEVNAME(sc->sc_bus.bdev)); 1138 OWRITE4(sc, OHCI_CONTROL, OHCI_HCFS_RESET); 1139 /* XXX what else */ 1140 } 1141 if (eintrs & OHCI_RHSC) { 1142 ohci_rhsc(sc, sc->sc_intrxfer); 1143 /* 1144 * Disable RHSC interrupt for now, because it will be 1145 * on until the port has been reset. 1146 */ 1147 ohci_rhsc_able(sc, 0); 1148 /* Do not allow RHSC interrupts > 1 per second */ 1149 usb_callout(sc->sc_tmo_rhsc, hz, ohci_rhsc_enable, sc); 1150 eintrs &= ~OHCI_RHSC; 1151 } 1152 1153 sc->sc_bus.intr_context--; 1154 1155 if (eintrs != 0) { 1156 /* Block unprocessed interrupts. XXX */ 1157 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, eintrs); 1158 sc->sc_eintrs &= ~eintrs; 1159 printf("%s: blocking intrs 0x%x\n", 1160 USBDEVNAME(sc->sc_bus.bdev), eintrs); 1161 } 1162 1163 return (1); 1164 } 1165 1166 void 1167 ohci_rhsc_able(ohci_softc_t *sc, int on) 1168 { 1169 DPRINTFN(4, ("ohci_rhsc_able: on=%d\n", on)); 1170 if (on) { 1171 sc->sc_eintrs |= OHCI_RHSC; 1172 OWRITE4(sc, OHCI_INTERRUPT_ENABLE, OHCI_RHSC); 1173 } else { 1174 sc->sc_eintrs &= ~OHCI_RHSC; 1175 OWRITE4(sc, OHCI_INTERRUPT_DISABLE, OHCI_RHSC); 1176 } 1177 } 1178 1179 void 1180 ohci_rhsc_enable(void *v_sc) 1181 { 1182 ohci_softc_t *sc = v_sc; 1183 1184 ohci_rhsc_able(sc, 1); 1185 } 1186 1187 #ifdef OHCI_DEBUG 1188 char *ohci_cc_strs[] = { 1189 "NO_ERROR", 1190 "CRC", 1191 "BIT_STUFFING", 1192 "DATA_TOGGLE_MISMATCH", 1193 "STALL", 1194 "DEVICE_NOT_RESPONDING", 1195 "PID_CHECK_FAILURE", 1196 "UNEXPECTED_PID", 1197 "DATA_OVERRUN", 1198 "DATA_UNDERRUN", 1199 "BUFFER_OVERRUN", 1200 "BUFFER_UNDERRUN", 1201 "reserved", 1202 "reserved", 1203 "NOT_ACCESSED", 1204 "NOT_ACCESSED", 1205 }; 1206 #endif 1207 1208 void 1209 ohci_add_done(ohci_softc_t *sc, ohci_physaddr_t done) 1210 { 1211 ohci_soft_itd_t *sitd, *sidone, **ip; 1212 ohci_soft_td_t *std, *sdone, **p; 1213 1214 /* Reverse the done list. */ 1215 for (sdone = NULL, sidone = NULL; done != 0; ) { 1216 std = ohci_hash_find_td(sc, done); 1217 if (std != NULL) { 1218 std->dnext = sdone; 1219 done = le32toh(std->td.td_nexttd); 1220 sdone = std; 1221 DPRINTFN(10,("add TD %p\n", std)); 1222 continue; 1223 } 1224 sitd = ohci_hash_find_itd(sc, done); 1225 if (sitd != NULL) { 1226 sitd->dnext = sidone; 1227 done = le32toh(sitd->itd.itd_nextitd); 1228 sidone = sitd; 1229 DPRINTFN(5,("add ITD %p\n", sitd)); 1230 continue; 1231 } 1232 panic("ohci_add_done: addr 0x%08lx not found\n", (u_long)done); 1233 } 1234 1235 /* sdone & sidone now hold the done lists. */ 1236 /* Put them on the already processed lists. */ 1237 for (p = &sc->sc_sdone; *p != NULL; p = &(*p)->dnext) 1238 ; 1239 *p = sdone; 1240 for (ip = &sc->sc_sidone; *ip != NULL; ip = &(*ip)->dnext) 1241 ; 1242 *ip = sidone; 1243 } 1244 1245 void 1246 ohci_softintr(void *v) 1247 { 1248 ohci_softc_t *sc = v; 1249 ohci_soft_itd_t *sitd, *sidone, *sitdnext; 1250 ohci_soft_td_t *std, *sdone, *stdnext; 1251 usbd_xfer_handle xfer; 1252 int len, cc, s; 1253 1254 DPRINTFN(10,("ohci_softintr: enter\n:")); 1255 1256 sc->sc_bus.intr_context++; 1257 1258 s = splhardusb(); 1259 sdone = sc->sc_sdone; 1260 sc->sc_sdone = NULL; 1261 sidone = sc->sc_sidone; 1262 sc->sc_sidone = NULL; 1263 splx(s); 1264 1265 DPRINTFN(10,("ohci_softintr: sdone=%p sidone=%p\n", sdone, sidone)); 1266 1267 #ifdef OHCI_DEBUG 1268 if (ohcidebug > 10) { 1269 DPRINTF(("ohci_process_done: TD done:\n")); 1270 ohci_dump_tds(sdone); 1271 } 1272 #endif 1273 1274 for (std = sdone; std; std = stdnext) { 1275 xfer = std->xfer; 1276 stdnext = std->dnext; 1277 DPRINTFN(10, ("ohci_process_done: std=%p xfer=%p hcpriv=%p\n", 1278 std, xfer, xfer ? xfer->hcpriv : 0)); 1279 if (xfer == NULL) { 1280 /* xfer == NULL: There seems to be no xfer associated 1281 * with this TD. It is tailp that happened to end up on 1282 * the done queue. 1283 */ 1284 continue; 1285 } 1286 if (xfer->status == USBD_CANCELLED || 1287 xfer->status == USBD_TIMEOUT) { 1288 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1289 xfer)); 1290 /* Handled by abort routine. */ 1291 continue; 1292 } 1293 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 1294 cc = OHCI_TD_GET_CC(le32toh(std->td.td_flags)); 1295 if (cc == OHCI_CC_NO_ERROR) { 1296 len = std->len; 1297 if (std->td.td_cbp != 0) 1298 len -= le32toh(std->td.td_be) - 1299 le32toh(std->td.td_cbp) + 1; 1300 DPRINTFN(10, ("ohci_process_done: len=%d, flags=0x%x\n", 1301 len, std->flags)); 1302 if (std->flags & OHCI_ADD_LEN) 1303 xfer->actlen += len; 1304 if (std->flags & OHCI_CALL_DONE) { 1305 xfer->status = USBD_NORMAL_COMPLETION; 1306 usb_transfer_complete(xfer); 1307 } 1308 ohci_free_std(sc, std); 1309 } else { 1310 /* 1311 * Endpoint is halted. First unlink all the TDs 1312 * belonging to the failed transfer, and then restart 1313 * the endpoint. 1314 */ 1315 ohci_soft_td_t *p, *n; 1316 struct ohci_pipe *opipe = 1317 (struct ohci_pipe *)xfer->pipe; 1318 1319 DPRINTFN(15,("ohci_process_done: error cc=%d (%s)\n", 1320 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1321 ohci_cc_strs[OHCI_TD_GET_CC(le32toh(std->td.td_flags))])); 1322 1323 /* remove TDs */ 1324 for (p = std; p->xfer == xfer; p = n) { 1325 n = p->nexttd; 1326 ohci_free_std(sc, p); 1327 } 1328 1329 /* clear halt */ 1330 opipe->sed->ed.ed_headp = htole32(p->physaddr); 1331 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1332 1333 if (cc == OHCI_CC_STALL) 1334 xfer->status = USBD_STALLED; 1335 else 1336 xfer->status = USBD_IOERROR; 1337 usb_transfer_complete(xfer); 1338 } 1339 } 1340 1341 #ifdef OHCI_DEBUG 1342 if (ohcidebug > 10) { 1343 DPRINTF(("ohci_softintr: ITD done:\n")); 1344 ohci_dump_itds(sidone); 1345 } 1346 #endif 1347 1348 for (sitd = sidone; sitd != NULL; sitd = sitdnext) { 1349 xfer = sitd->xfer; 1350 sitdnext = sitd->dnext; 1351 DPRINTFN(1, ("ohci_process_done: sitd=%p xfer=%p hcpriv=%p\n", 1352 sitd, xfer, xfer ? xfer->hcpriv : 0)); 1353 if (xfer == NULL) 1354 continue; 1355 if (xfer->status == USBD_CANCELLED || 1356 xfer->status == USBD_TIMEOUT) { 1357 DPRINTF(("ohci_process_done: cancel/timeout %p\n", 1358 xfer)); 1359 /* Handled by abort routine. */ 1360 continue; 1361 } 1362 #ifdef DIAGNOSTIC 1363 if (sitd->isdone) 1364 printf("ohci_softintr: sitd=%p is done\n", sitd); 1365 sitd->isdone = 1; 1366 #endif 1367 cc = OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)); 1368 if (cc == OHCI_CC_NO_ERROR) { 1369 /* XXX compute length for input */ 1370 struct ohci_pipe *opipe = 1371 (struct ohci_pipe *)xfer->pipe; 1372 if (sitd->flags & OHCI_CALL_DONE) { 1373 opipe->u.iso.inuse -= xfer->nframes; 1374 /* XXX update frlengths with actual length */ 1375 /* XXX xfer->actlen = actlen; */ 1376 xfer->status = USBD_NORMAL_COMPLETION; 1377 usb_transfer_complete(xfer); 1378 } 1379 } else { 1380 /* XXX Do more */ 1381 xfer->status = USBD_IOERROR; 1382 usb_transfer_complete(xfer); 1383 } 1384 } 1385 1386 sc->sc_bus.intr_context--; 1387 DPRINTFN(10,("ohci_softintr: done:\n")); 1388 } 1389 1390 void 1391 ohci_device_ctrl_done(usbd_xfer_handle xfer) 1392 { 1393 DPRINTFN(10,("ohci_ctrl_done: xfer=%p\n", xfer)); 1394 1395 #ifdef DIAGNOSTIC 1396 if (!(xfer->rqflags & URQ_REQUEST)) { 1397 panic("ohci_ctrl_done: not a request\n"); 1398 } 1399 #endif 1400 xfer->hcpriv = NULL; 1401 } 1402 1403 void 1404 ohci_device_intr_done(usbd_xfer_handle xfer) 1405 { 1406 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1407 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 1408 ohci_soft_ed_t *sed = opipe->sed; 1409 ohci_soft_td_t *data, *tail; 1410 1411 1412 DPRINTFN(10,("ohci_intr_done: xfer=%p, actlen=%d\n", 1413 xfer, xfer->actlen)); 1414 1415 xfer->hcpriv = NULL; 1416 1417 if (xfer->pipe->repeat) { 1418 data = opipe->tail.td; 1419 tail = ohci_alloc_std(sc); /* XXX should reuse TD */ 1420 if (tail == NULL) { 1421 xfer->status = USBD_NOMEM; 1422 return; 1423 } 1424 tail->xfer = NULL; 1425 1426 data->td.td_flags = htole32( 1427 OHCI_TD_IN | OHCI_TD_NOCC | 1428 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 1429 if (xfer->flags & USBD_SHORT_XFER_OK) 1430 data->td.td_flags |= htole32(OHCI_TD_R); 1431 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 1432 data->nexttd = tail; 1433 data->td.td_nexttd = htole32(tail->physaddr); 1434 data->td.td_be = htole32(le32toh(data->td.td_cbp) + 1435 xfer->length - 1); 1436 data->len = xfer->length; 1437 data->xfer = xfer; 1438 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 1439 xfer->hcpriv = data; 1440 xfer->actlen = 0; 1441 1442 sed->ed.ed_tailp = htole32(tail->physaddr); 1443 opipe->tail.td = tail; 1444 } 1445 } 1446 1447 void 1448 ohci_device_bulk_done(usbd_xfer_handle xfer) 1449 { 1450 DPRINTFN(10,("ohci_bulk_done: xfer=%p, actlen=%d\n", 1451 xfer, xfer->actlen)); 1452 1453 xfer->hcpriv = NULL; 1454 } 1455 1456 void 1457 ohci_rhsc(ohci_softc_t *sc, usbd_xfer_handle xfer) 1458 { 1459 usbd_pipe_handle pipe; 1460 struct ohci_pipe *opipe; 1461 u_char *p; 1462 int i, m; 1463 int hstatus; 1464 1465 hstatus = OREAD4(sc, OHCI_RH_STATUS); 1466 DPRINTF(("ohci_rhsc: sc=%p xfer=%p hstatus=0x%08x\n", 1467 sc, xfer, hstatus)); 1468 1469 if (xfer == NULL) { 1470 /* Just ignore the change. */ 1471 return; 1472 } 1473 1474 pipe = xfer->pipe; 1475 opipe = (struct ohci_pipe *)pipe; 1476 1477 p = KERNADDR(&xfer->dmabuf); 1478 m = min(sc->sc_noport, xfer->length * 8 - 1); 1479 memset(p, 0, xfer->length); 1480 for (i = 1; i <= m; i++) { 1481 /* Pick out CHANGE bits from the status reg. */ 1482 if (OREAD4(sc, OHCI_RH_PORT_STATUS(i)) >> 16) 1483 p[i/8] |= 1 << (i%8); 1484 } 1485 DPRINTF(("ohci_rhsc: change=0x%02x\n", *p)); 1486 xfer->actlen = xfer->length; 1487 xfer->status = USBD_NORMAL_COMPLETION; 1488 1489 usb_transfer_complete(xfer); 1490 } 1491 1492 void 1493 ohci_root_intr_done(usbd_xfer_handle xfer) 1494 { 1495 xfer->hcpriv = NULL; 1496 } 1497 1498 void 1499 ohci_root_ctrl_done(usbd_xfer_handle xfer) 1500 { 1501 xfer->hcpriv = NULL; 1502 } 1503 1504 /* 1505 * Wait here until controller claims to have an interrupt. 1506 * Then call ohci_intr and return. Use timeout to avoid waiting 1507 * too long. 1508 */ 1509 void 1510 ohci_waitintr(ohci_softc_t *sc, usbd_xfer_handle xfer) 1511 { 1512 int timo = xfer->timeout; 1513 int usecs; 1514 u_int32_t intrs; 1515 1516 xfer->status = USBD_IN_PROGRESS; 1517 for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { 1518 usb_delay_ms(&sc->sc_bus, 1); 1519 intrs = OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs; 1520 DPRINTFN(15,("ohci_waitintr: 0x%04x\n", intrs)); 1521 #ifdef OHCI_DEBUG 1522 if (ohcidebug > 15) 1523 ohci_dumpregs(sc); 1524 #endif 1525 if (intrs) { 1526 ohci_intr1(sc); 1527 if (xfer->status != USBD_IN_PROGRESS) 1528 return; 1529 } 1530 } 1531 1532 /* Timeout */ 1533 DPRINTF(("ohci_waitintr: timeout\n")); 1534 xfer->status = USBD_TIMEOUT; 1535 usb_transfer_complete(xfer); 1536 /* XXX should free TD */ 1537 } 1538 1539 void 1540 ohci_poll(struct usbd_bus *bus) 1541 { 1542 ohci_softc_t *sc = (ohci_softc_t *)bus; 1543 #ifdef OHCI_DEBUG 1544 static int last; 1545 int new; 1546 new = OREAD4(sc, OHCI_INTERRUPT_STATUS); 1547 if (new != last) { 1548 DPRINTFN(10,("ohci_poll: intrs=0x%04x\n", new)); 1549 last = new; 1550 } 1551 #endif 1552 1553 if (OREAD4(sc, OHCI_INTERRUPT_STATUS) & sc->sc_eintrs) 1554 ohci_intr1(sc); 1555 } 1556 1557 usbd_status 1558 ohci_device_request(usbd_xfer_handle xfer) 1559 { 1560 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 1561 usb_device_request_t *req = &xfer->request; 1562 usbd_device_handle dev = opipe->pipe.device; 1563 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1564 int addr = dev->address; 1565 ohci_soft_td_t *setup, *stat, *next, *tail; 1566 ohci_soft_ed_t *sed; 1567 int isread; 1568 int len; 1569 usbd_status err; 1570 int s; 1571 1572 isread = req->bmRequestType & UT_READ; 1573 len = UGETW(req->wLength); 1574 1575 DPRINTFN(3,("ohci_device_control type=0x%02x, request=0x%02x, " 1576 "wValue=0x%04x, wIndex=0x%04x len=%d, addr=%d, endpt=%d\n", 1577 req->bmRequestType, req->bRequest, UGETW(req->wValue), 1578 UGETW(req->wIndex), len, addr, 1579 opipe->pipe.endpoint->edesc->bEndpointAddress)); 1580 1581 setup = opipe->tail.td; 1582 stat = ohci_alloc_std(sc); 1583 if (stat == NULL) { 1584 err = USBD_NOMEM; 1585 goto bad1; 1586 } 1587 tail = ohci_alloc_std(sc); 1588 if (tail == NULL) { 1589 err = USBD_NOMEM; 1590 goto bad2; 1591 } 1592 tail->xfer = NULL; 1593 1594 sed = opipe->sed; 1595 opipe->u.ctl.length = len; 1596 1597 /* Update device address and length since they may have changed. */ 1598 /* XXX This only needs to be done once, but it's too early in open. */ 1599 /* XXXX Should not touch ED here! */ 1600 sed->ed.ed_flags = htole32( 1601 (le32toh(sed->ed.ed_flags) & ~(OHCI_ED_ADDRMASK | OHCI_ED_MAXPMASK)) | 1602 OHCI_ED_SET_FA(addr) | 1603 OHCI_ED_SET_MAXP(UGETW(opipe->pipe.endpoint->edesc->wMaxPacketSize))); 1604 1605 next = stat; 1606 1607 /* Set up data transaction */ 1608 if (len != 0) { 1609 ohci_soft_td_t *std = stat; 1610 1611 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 1612 std, &stat); 1613 stat = stat->nexttd; /* point at free TD */ 1614 if (err) 1615 goto bad3; 1616 /* Start toggle at 1 and then use the carried toggle. */ 1617 std->td.td_flags &= htole32(~OHCI_TD_TOGGLE_MASK); 1618 std->td.td_flags |= htole32(OHCI_TD_TOGGLE_1); 1619 } 1620 1621 memcpy(KERNADDR(&opipe->u.ctl.reqdma), req, sizeof *req); 1622 1623 setup->td.td_flags = htole32(OHCI_TD_SETUP | OHCI_TD_NOCC | 1624 OHCI_TD_TOGGLE_0 | OHCI_TD_NOINTR); 1625 setup->td.td_cbp = htole32(DMAADDR(&opipe->u.ctl.reqdma)); 1626 setup->nexttd = next; 1627 setup->td.td_nexttd = htole32(next->physaddr); 1628 setup->td.td_be = htole32(le32toh(setup->td.td_cbp) + sizeof *req - 1); 1629 setup->len = 0; 1630 setup->xfer = xfer; 1631 setup->flags = 0; 1632 xfer->hcpriv = setup; 1633 1634 stat->td.td_flags = htole32( 1635 (isread ? OHCI_TD_OUT : OHCI_TD_IN) | 1636 OHCI_TD_NOCC | OHCI_TD_TOGGLE_1 | OHCI_TD_SET_DI(1)); 1637 stat->td.td_cbp = 0; 1638 stat->nexttd = tail; 1639 stat->td.td_nexttd = htole32(tail->physaddr); 1640 stat->td.td_be = 0; 1641 stat->flags = OHCI_CALL_DONE; 1642 stat->len = 0; 1643 stat->xfer = xfer; 1644 1645 #ifdef OHCI_DEBUG 1646 if (ohcidebug > 5) { 1647 DPRINTF(("ohci_device_request:\n")); 1648 ohci_dump_ed(sed); 1649 ohci_dump_tds(setup); 1650 } 1651 #endif 1652 1653 /* Insert ED in schedule */ 1654 s = splusb(); 1655 sed->ed.ed_tailp = htole32(tail->physaddr); 1656 opipe->tail.td = tail; 1657 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_CLF); 1658 if (xfer->timeout && !sc->sc_bus.use_polling) { 1659 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 1660 ohci_timeout, xfer); 1661 } 1662 splx(s); 1663 1664 #ifdef OHCI_DEBUG 1665 if (ohcidebug > 20) { 1666 delay(10000); 1667 DPRINTF(("ohci_device_request: status=%x\n", 1668 OREAD4(sc, OHCI_COMMAND_STATUS))); 1669 ohci_dumpregs(sc); 1670 printf("ctrl head:\n"); 1671 ohci_dump_ed(sc->sc_ctrl_head); 1672 printf("sed:\n"); 1673 ohci_dump_ed(sed); 1674 ohci_dump_tds(setup); 1675 } 1676 #endif 1677 1678 return (USBD_NORMAL_COMPLETION); 1679 1680 bad3: 1681 ohci_free_std(sc, tail); 1682 bad2: 1683 ohci_free_std(sc, stat); 1684 bad1: 1685 return (err); 1686 } 1687 1688 /* 1689 * Add an ED to the schedule. Called at splusb(). 1690 */ 1691 void 1692 ohci_add_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1693 { 1694 DPRINTFN(8,("ohci_add_ed: sed=%p head=%p\n", sed, head)); 1695 1696 SPLUSBCHECK; 1697 sed->next = head->next; 1698 sed->ed.ed_nexted = head->ed.ed_nexted; 1699 head->next = sed; 1700 head->ed.ed_nexted = htole32(sed->physaddr); 1701 } 1702 1703 /* 1704 * Remove an ED from the schedule. Called at splusb(). 1705 */ 1706 void 1707 ohci_rem_ed(ohci_soft_ed_t *sed, ohci_soft_ed_t *head) 1708 { 1709 ohci_soft_ed_t *p; 1710 1711 SPLUSBCHECK; 1712 1713 /* XXX */ 1714 for (p = head; p == NULL && p->next != sed; p = p->next) 1715 ; 1716 if (p == NULL) 1717 panic("ohci_rem_ed: ED not found\n"); 1718 p->next = sed->next; 1719 p->ed.ed_nexted = sed->ed.ed_nexted; 1720 } 1721 1722 /* 1723 * When a transfer is completed the TD is added to the done queue by 1724 * the host controller. This queue is the processed by software. 1725 * Unfortunately the queue contains the physical address of the TD 1726 * and we have no simple way to translate this back to a kernel address. 1727 * To make the translation possible (and fast) we use a hash table of 1728 * TDs currently in the schedule. The physical address is used as the 1729 * hash value. 1730 */ 1731 1732 #define HASH(a) (((a) >> 4) % OHCI_HASH_SIZE) 1733 /* Called at splusb() */ 1734 void 1735 ohci_hash_add_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1736 { 1737 int h = HASH(std->physaddr); 1738 1739 SPLUSBCHECK; 1740 1741 LIST_INSERT_HEAD(&sc->sc_hash_tds[h], std, hnext); 1742 } 1743 1744 /* Called at splusb() */ 1745 void 1746 ohci_hash_rem_td(ohci_softc_t *sc, ohci_soft_td_t *std) 1747 { 1748 SPLUSBCHECK; 1749 1750 LIST_REMOVE(std, hnext); 1751 } 1752 1753 ohci_soft_td_t * 1754 ohci_hash_find_td(ohci_softc_t *sc, ohci_physaddr_t a) 1755 { 1756 int h = HASH(a); 1757 ohci_soft_td_t *std; 1758 1759 for (std = LIST_FIRST(&sc->sc_hash_tds[h]); 1760 std != NULL; 1761 std = LIST_NEXT(std, hnext)) 1762 if (std->physaddr == a) 1763 return (std); 1764 return (NULL); 1765 } 1766 1767 /* Called at splusb() */ 1768 void 1769 ohci_hash_add_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1770 { 1771 int h = HASH(sitd->physaddr); 1772 1773 SPLUSBCHECK; 1774 1775 DPRINTFN(10,("ohci_hash_add_itd: sitd=%p physaddr=0x%08lx\n", 1776 sitd, (u_long)sitd->physaddr)); 1777 1778 LIST_INSERT_HEAD(&sc->sc_hash_itds[h], sitd, hnext); 1779 } 1780 1781 /* Called at splusb() */ 1782 void 1783 ohci_hash_rem_itd(ohci_softc_t *sc, ohci_soft_itd_t *sitd) 1784 { 1785 SPLUSBCHECK; 1786 1787 DPRINTFN(10,("ohci_hash_rem_itd: sitd=%p physaddr=0x%08lx\n", 1788 sitd, (u_long)sitd->physaddr)); 1789 1790 LIST_REMOVE(sitd, hnext); 1791 } 1792 1793 ohci_soft_itd_t * 1794 ohci_hash_find_itd(ohci_softc_t *sc, ohci_physaddr_t a) 1795 { 1796 int h = HASH(a); 1797 ohci_soft_itd_t *sitd; 1798 1799 for (sitd = LIST_FIRST(&sc->sc_hash_itds[h]); 1800 sitd != NULL; 1801 sitd = LIST_NEXT(sitd, hnext)) 1802 if (sitd->physaddr == a) 1803 return (sitd); 1804 return (NULL); 1805 } 1806 1807 void 1808 ohci_timeout(void *addr) 1809 { 1810 struct ohci_xfer *oxfer = addr; 1811 1812 DPRINTF(("ohci_timeout: oxfer=%p\n", oxfer)); 1813 1814 /* Execute the abort in a process context. */ 1815 usb_init_task(&oxfer->abort_task, ohci_timeout_task, addr); 1816 usb_add_task(oxfer->xfer.pipe->device, &oxfer->abort_task); 1817 } 1818 1819 void 1820 ohci_timeout_task(void *addr) 1821 { 1822 usbd_xfer_handle xfer = addr; 1823 int s; 1824 1825 DPRINTF(("ohci_timeout_task: xfer=%p\n", xfer)); 1826 1827 s = splusb(); 1828 ohci_abort_xfer(xfer, USBD_TIMEOUT); 1829 splx(s); 1830 } 1831 1832 #ifdef OHCI_DEBUG 1833 void 1834 ohci_dump_tds(ohci_soft_td_t *std) 1835 { 1836 for (; std; std = std->nexttd) 1837 ohci_dump_td(std); 1838 } 1839 1840 void 1841 ohci_dump_td(ohci_soft_td_t *std) 1842 { 1843 char sbuf[128]; 1844 1845 bitmask_snprintf((u_int32_t)le32toh(std->td.td_flags), 1846 "\20\23R\24OUT\25IN\31TOG1\32SETTOGGLE", 1847 sbuf, sizeof(sbuf)); 1848 1849 printf("TD(%p) at %08lx: %s delay=%d ec=%d cc=%d\ncbp=0x%08lx " 1850 "nexttd=0x%08lx be=0x%08lx\n", 1851 std, (u_long)std->physaddr, sbuf, 1852 OHCI_TD_GET_DI(le32toh(std->td.td_flags)), 1853 OHCI_TD_GET_EC(le32toh(std->td.td_flags)), 1854 OHCI_TD_GET_CC(le32toh(std->td.td_flags)), 1855 (u_long)le32toh(std->td.td_cbp), 1856 (u_long)le32toh(std->td.td_nexttd), 1857 (u_long)le32toh(std->td.td_be)); 1858 } 1859 1860 void 1861 ohci_dump_itd(ohci_soft_itd_t *sitd) 1862 { 1863 int i; 1864 1865 printf("ITD(%p) at %08lx: sf=%d di=%d fc=%d cc=%d\n" 1866 "bp0=0x%08lx next=0x%08lx be=0x%08lx\n", 1867 sitd, (u_long)sitd->physaddr, 1868 OHCI_ITD_GET_SF(le32toh(sitd->itd.itd_flags)), 1869 OHCI_ITD_GET_DI(le32toh(sitd->itd.itd_flags)), 1870 OHCI_ITD_GET_FC(le32toh(sitd->itd.itd_flags)), 1871 OHCI_ITD_GET_CC(le32toh(sitd->itd.itd_flags)), 1872 (u_long)le32toh(sitd->itd.itd_bp0), 1873 (u_long)le32toh(sitd->itd.itd_nextitd), 1874 (u_long)le32toh(sitd->itd.itd_be)); 1875 for (i = 0; i < OHCI_ITD_NOFFSET; i++) 1876 printf("offs[%d]=0x%04x ", i, 1877 (u_int)le16toh(sitd->itd.itd_offset[i])); 1878 printf("\n"); 1879 } 1880 1881 void 1882 ohci_dump_itds(ohci_soft_itd_t *sitd) 1883 { 1884 for (; sitd; sitd = sitd->nextitd) 1885 ohci_dump_itd(sitd); 1886 } 1887 1888 void 1889 ohci_dump_ed(ohci_soft_ed_t *sed) 1890 { 1891 char sbuf[128], sbuf2[128]; 1892 1893 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_flags), 1894 "\20\14OUT\15IN\16LOWSPEED\17SKIP\20ISO", 1895 sbuf, sizeof(sbuf)); 1896 bitmask_snprintf((u_int32_t)le32toh(sed->ed.ed_headp), 1897 "\20\1HALT\2CARRY", sbuf2, sizeof(sbuf2)); 1898 1899 printf("ED(%p) at 0x%08lx: addr=%d endpt=%d maxp=%d flags=%s\ntailp=0x%08lx " 1900 "headflags=%s headp=0x%08lx nexted=0x%08lx\n", 1901 sed, (u_long)sed->physaddr, 1902 OHCI_ED_GET_FA(le32toh(sed->ed.ed_flags)), 1903 OHCI_ED_GET_EN(le32toh(sed->ed.ed_flags)), 1904 OHCI_ED_GET_MAXP(le32toh(sed->ed.ed_flags)), sbuf, 1905 (u_long)le32toh(sed->ed.ed_tailp), sbuf2, 1906 (u_long)le32toh(sed->ed.ed_headp), 1907 (u_long)le32toh(sed->ed.ed_nexted)); 1908 } 1909 #endif 1910 1911 usbd_status 1912 ohci_open(usbd_pipe_handle pipe) 1913 { 1914 usbd_device_handle dev = pipe->device; 1915 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 1916 usb_endpoint_descriptor_t *ed = pipe->endpoint->edesc; 1917 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 1918 u_int8_t addr = dev->address; 1919 u_int8_t xfertype = ed->bmAttributes & UE_XFERTYPE; 1920 ohci_soft_ed_t *sed; 1921 ohci_soft_td_t *std; 1922 ohci_soft_itd_t *sitd; 1923 ohci_physaddr_t tdphys; 1924 u_int32_t fmt; 1925 usbd_status err; 1926 int s; 1927 int ival; 1928 1929 DPRINTFN(1, ("ohci_open: pipe=%p, addr=%d, endpt=%d (%d)\n", 1930 pipe, addr, ed->bEndpointAddress, sc->sc_addr)); 1931 1932 std = NULL; 1933 sed = NULL; 1934 1935 if (addr == sc->sc_addr) { 1936 switch (ed->bEndpointAddress) { 1937 case USB_CONTROL_ENDPOINT: 1938 pipe->methods = &ohci_root_ctrl_methods; 1939 break; 1940 case UE_DIR_IN | OHCI_INTR_ENDPT: 1941 pipe->methods = &ohci_root_intr_methods; 1942 break; 1943 default: 1944 return (USBD_INVAL); 1945 } 1946 } else { 1947 sed = ohci_alloc_sed(sc); 1948 if (sed == NULL) 1949 goto bad0; 1950 opipe->sed = sed; 1951 if (xfertype == UE_ISOCHRONOUS) { 1952 sitd = ohci_alloc_sitd(sc); 1953 if (sitd == NULL) { 1954 ohci_free_sitd(sc, sitd); 1955 goto bad1; 1956 } 1957 opipe->tail.itd = sitd; 1958 tdphys = sitd->physaddr; 1959 fmt = OHCI_ED_FORMAT_ISO; 1960 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN) 1961 fmt |= OHCI_ED_DIR_IN; 1962 else 1963 fmt |= OHCI_ED_DIR_OUT; 1964 } else { 1965 std = ohci_alloc_std(sc); 1966 if (std == NULL) { 1967 ohci_free_std(sc, std); 1968 goto bad1; 1969 } 1970 opipe->tail.td = std; 1971 tdphys = std->physaddr; 1972 fmt = OHCI_ED_FORMAT_GEN | OHCI_ED_DIR_TD; 1973 } 1974 sed->ed.ed_flags = htole32( 1975 OHCI_ED_SET_FA(addr) | 1976 OHCI_ED_SET_EN(ed->bEndpointAddress) | 1977 (dev->speed == USB_SPEED_LOW ? OHCI_ED_SPEED : 0) | 1978 fmt | 1979 OHCI_ED_SET_MAXP(UGETW(ed->wMaxPacketSize))); 1980 sed->ed.ed_headp = sed->ed.ed_tailp = htole32(tdphys); 1981 1982 switch (xfertype) { 1983 case UE_CONTROL: 1984 pipe->methods = &ohci_device_ctrl_methods; 1985 err = usb_allocmem(&sc->sc_bus, 1986 sizeof(usb_device_request_t), 1987 0, &opipe->u.ctl.reqdma); 1988 if (err) 1989 goto bad; 1990 s = splusb(); 1991 ohci_add_ed(sed, sc->sc_ctrl_head); 1992 splx(s); 1993 break; 1994 case UE_INTERRUPT: 1995 pipe->methods = &ohci_device_intr_methods; 1996 ival = pipe->interval; 1997 if (ival == USBD_DEFAULT_INTERVAL) 1998 ival = ed->bInterval; 1999 return (ohci_device_setintr(sc, opipe, ival)); 2000 case UE_ISOCHRONOUS: 2001 pipe->methods = &ohci_device_isoc_methods; 2002 return (ohci_setup_isoc(pipe)); 2003 case UE_BULK: 2004 pipe->methods = &ohci_device_bulk_methods; 2005 s = splusb(); 2006 ohci_add_ed(sed, sc->sc_bulk_head); 2007 splx(s); 2008 break; 2009 } 2010 } 2011 return (USBD_NORMAL_COMPLETION); 2012 2013 bad: 2014 if (std != NULL) 2015 ohci_free_std(sc, std); 2016 bad1: 2017 if (sed != NULL) 2018 ohci_free_sed(sc, sed); 2019 bad0: 2020 return (USBD_NOMEM); 2021 2022 } 2023 2024 /* 2025 * Close a reqular pipe. 2026 * Assumes that there are no pending transactions. 2027 */ 2028 void 2029 ohci_close_pipe(usbd_pipe_handle pipe, ohci_soft_ed_t *head) 2030 { 2031 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2032 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2033 ohci_soft_ed_t *sed = opipe->sed; 2034 int s; 2035 2036 s = splusb(); 2037 #ifdef DIAGNOSTIC 2038 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2039 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2040 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) { 2041 ohci_soft_td_t *std; 2042 std = ohci_hash_find_td(sc, le32toh(sed->ed.ed_headp)); 2043 printf("ohci_close_pipe: pipe not empty sed=%p hd=0x%x " 2044 "tl=0x%x pipe=%p, std=%p\n", sed, 2045 (int)le32toh(sed->ed.ed_headp), 2046 (int)le32toh(sed->ed.ed_tailp), 2047 pipe, std); 2048 #ifdef USB_DEBUG 2049 usbd_dump_pipe(&opipe->pipe); 2050 #endif 2051 #ifdef OHCI_DEBUG 2052 ohci_dump_ed(sed); 2053 if (std) 2054 ohci_dump_td(std); 2055 #endif 2056 usb_delay_ms(&sc->sc_bus, 2); 2057 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2058 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2059 printf("ohci_close_pipe: pipe still not empty\n"); 2060 } 2061 #endif 2062 ohci_rem_ed(sed, head); 2063 splx(s); 2064 ohci_free_sed(sc, opipe->sed); 2065 } 2066 2067 /* 2068 * Abort a device request. 2069 * If this routine is called at splusb() it guarantees that the request 2070 * will be removed from the hardware scheduling and that the callback 2071 * for it will be called with USBD_CANCELLED status. 2072 * It's impossible to guarantee that the requested transfer will not 2073 * have happened since the hardware runs concurrently. 2074 * If the transaction has already happened we rely on the ordinary 2075 * interrupt processing to process it. 2076 */ 2077 void 2078 ohci_abort_xfer(usbd_xfer_handle xfer, usbd_status status) 2079 { 2080 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2081 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 2082 ohci_soft_ed_t *sed = opipe->sed; 2083 ohci_soft_td_t *p, *n; 2084 ohci_physaddr_t headp; 2085 int s, hit; 2086 2087 DPRINTF(("ohci_abort_xfer: xfer=%p pipe=%p sed=%p\n", xfer, opipe,sed)); 2088 2089 if (xfer->device->bus->intr_context || !curproc) 2090 panic("ohci_abort_xfer: not in process context\n"); 2091 2092 /* 2093 * Step 1: Make interrupt routine and hardware ignore xfer. 2094 */ 2095 s = splusb(); 2096 xfer->status = status; /* make software ignore it */ 2097 usb_uncallout(xfer->timeout_handle, ohci_timeout, xfer); 2098 splx(s); 2099 DPRINTFN(1,("ohci_abort_xfer: stop ed=%p\n", sed)); 2100 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 2101 2102 /* 2103 * Step 2: Wait until we know hardware has finished any possible 2104 * use of the xfer. Also make sure the soft interrupt routine 2105 * has run. 2106 */ 2107 usb_delay_ms(opipe->pipe.device->bus, 1); /* Hardware finishes in 1ms */ 2108 /* XXX should have some communication with softintr() to know 2109 when it's done */ 2110 usb_delay_ms(opipe->pipe.device->bus, 250); 2111 2112 /* 2113 * Step 3: Remove any vestiges of the xfer from the hardware. 2114 * The complication here is that the hardware may have executed 2115 * beyond the xfer we're trying to abort. So as we're scanning 2116 * the TDs of this xfer we check if the hardware points to 2117 * any of them. 2118 */ 2119 s = splusb(); /* XXX why? */ 2120 p = xfer->hcpriv; 2121 #ifdef DIAGNOSTIC 2122 if (p == NULL) { 2123 splx(s); 2124 printf("ohci_abort_xfer: hcpriv is NULL\n"); 2125 return; 2126 } 2127 #endif 2128 #ifdef OHCI_DEBUG 2129 if (ohcidebug > 1) { 2130 DPRINTF(("ohci_abort_xfer: sed=\n")); 2131 ohci_dump_ed(sed); 2132 ohci_dump_tds(p); 2133 } 2134 #endif 2135 headp = le32toh(sed->ed.ed_headp) & OHCI_HEADMASK; 2136 hit = 0; 2137 for (; p->xfer == xfer; p = n) { 2138 hit |= headp == p->physaddr; 2139 n = p->nexttd; 2140 ohci_free_std(sc, p); 2141 } 2142 /* Zap headp register if hardware pointed inside the xfer. */ 2143 if (hit) { 2144 DPRINTFN(1,("ohci_abort_xfer: set hd=0x08%x, tl=0x%08x\n", 2145 (int)p->physaddr, (int)le32toh(sed->ed.ed_tailp))); 2146 sed->ed.ed_headp = htole32(p->physaddr); /* unlink TDs */ 2147 } else { 2148 DPRINTFN(1,("ohci_abort_xfer: no hit\n")); 2149 } 2150 2151 /* 2152 * Step 4: Turn on hardware again. 2153 */ 2154 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 2155 2156 /* 2157 * Step 5: Execute callback. 2158 */ 2159 usb_transfer_complete(xfer); 2160 2161 splx(s); 2162 } 2163 2164 /* 2165 * Data structures and routines to emulate the root hub. 2166 */ 2167 Static usb_device_descriptor_t ohci_devd = { 2168 USB_DEVICE_DESCRIPTOR_SIZE, 2169 UDESC_DEVICE, /* type */ 2170 {0x00, 0x01}, /* USB version */ 2171 UDCLASS_HUB, /* class */ 2172 UDSUBCLASS_HUB, /* subclass */ 2173 UDPROTO_FSHUB, 2174 64, /* max packet */ 2175 {0},{0},{0x00,0x01}, /* device id */ 2176 1,2,0, /* string indicies */ 2177 1 /* # of configurations */ 2178 }; 2179 2180 Static usb_config_descriptor_t ohci_confd = { 2181 USB_CONFIG_DESCRIPTOR_SIZE, 2182 UDESC_CONFIG, 2183 {USB_CONFIG_DESCRIPTOR_SIZE + 2184 USB_INTERFACE_DESCRIPTOR_SIZE + 2185 USB_ENDPOINT_DESCRIPTOR_SIZE}, 2186 1, 2187 1, 2188 0, 2189 UC_SELF_POWERED, 2190 0 /* max power */ 2191 }; 2192 2193 Static usb_interface_descriptor_t ohci_ifcd = { 2194 USB_INTERFACE_DESCRIPTOR_SIZE, 2195 UDESC_INTERFACE, 2196 0, 2197 0, 2198 1, 2199 UICLASS_HUB, 2200 UISUBCLASS_HUB, 2201 UIPROTO_FSHUB, 2202 0 2203 }; 2204 2205 Static usb_endpoint_descriptor_t ohci_endpd = { 2206 USB_ENDPOINT_DESCRIPTOR_SIZE, 2207 UDESC_ENDPOINT, 2208 UE_DIR_IN | OHCI_INTR_ENDPT, 2209 UE_INTERRUPT, 2210 {8, 0}, /* max packet */ 2211 255 2212 }; 2213 2214 Static usb_hub_descriptor_t ohci_hubd = { 2215 USB_HUB_DESCRIPTOR_SIZE, 2216 UDESC_HUB, 2217 0, 2218 {0,0}, 2219 0, 2220 0, 2221 {0}, 2222 }; 2223 2224 Static int 2225 ohci_str(p, l, s) 2226 usb_string_descriptor_t *p; 2227 int l; 2228 char *s; 2229 { 2230 int i; 2231 2232 if (l == 0) 2233 return (0); 2234 p->bLength = 2 * strlen(s) + 2; 2235 if (l == 1) 2236 return (1); 2237 p->bDescriptorType = UDESC_STRING; 2238 l -= 2; 2239 for (i = 0; s[i] && l > 1; i++, l -= 2) 2240 USETW2(p->bString[i], 0, s[i]); 2241 return (2*i+2); 2242 } 2243 2244 /* 2245 * Simulate a hardware hub by handling all the necessary requests. 2246 */ 2247 Static usbd_status 2248 ohci_root_ctrl_transfer(usbd_xfer_handle xfer) 2249 { 2250 usbd_status err; 2251 2252 /* Insert last in queue. */ 2253 err = usb_insert_transfer(xfer); 2254 if (err) 2255 return (err); 2256 2257 /* Pipe isn't running, start first */ 2258 return (ohci_root_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2259 } 2260 2261 Static usbd_status 2262 ohci_root_ctrl_start(usbd_xfer_handle xfer) 2263 { 2264 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2265 usb_device_request_t *req; 2266 void *buf = NULL; 2267 int port, i; 2268 int s, len, value, index, l, totlen = 0; 2269 usb_port_status_t ps; 2270 usb_hub_descriptor_t hubd; 2271 usbd_status err; 2272 u_int32_t v; 2273 2274 if (sc->sc_dying) 2275 return (USBD_IOERROR); 2276 2277 #ifdef DIAGNOSTIC 2278 if (!(xfer->rqflags & URQ_REQUEST)) 2279 /* XXX panic */ 2280 return (USBD_INVAL); 2281 #endif 2282 req = &xfer->request; 2283 2284 DPRINTFN(4,("ohci_root_ctrl_control type=0x%02x request=%02x\n", 2285 req->bmRequestType, req->bRequest)); 2286 2287 len = UGETW(req->wLength); 2288 value = UGETW(req->wValue); 2289 index = UGETW(req->wIndex); 2290 2291 if (len != 0) 2292 buf = KERNADDR(&xfer->dmabuf); 2293 2294 #define C(x,y) ((x) | ((y) << 8)) 2295 switch(C(req->bRequest, req->bmRequestType)) { 2296 case C(UR_CLEAR_FEATURE, UT_WRITE_DEVICE): 2297 case C(UR_CLEAR_FEATURE, UT_WRITE_INTERFACE): 2298 case C(UR_CLEAR_FEATURE, UT_WRITE_ENDPOINT): 2299 /* 2300 * DEVICE_REMOTE_WAKEUP and ENDPOINT_HALT are no-ops 2301 * for the integrated root hub. 2302 */ 2303 break; 2304 case C(UR_GET_CONFIG, UT_READ_DEVICE): 2305 if (len > 0) { 2306 *(u_int8_t *)buf = sc->sc_conf; 2307 totlen = 1; 2308 } 2309 break; 2310 case C(UR_GET_DESCRIPTOR, UT_READ_DEVICE): 2311 DPRINTFN(8,("ohci_root_ctrl_control wValue=0x%04x\n", value)); 2312 switch(value >> 8) { 2313 case UDESC_DEVICE: 2314 if ((value & 0xff) != 0) { 2315 err = USBD_IOERROR; 2316 goto ret; 2317 } 2318 totlen = l = min(len, USB_DEVICE_DESCRIPTOR_SIZE); 2319 USETW(ohci_devd.idVendor, sc->sc_id_vendor); 2320 memcpy(buf, &ohci_devd, l); 2321 break; 2322 case UDESC_CONFIG: 2323 if ((value & 0xff) != 0) { 2324 err = USBD_IOERROR; 2325 goto ret; 2326 } 2327 totlen = l = min(len, USB_CONFIG_DESCRIPTOR_SIZE); 2328 memcpy(buf, &ohci_confd, l); 2329 buf = (char *)buf + l; 2330 len -= l; 2331 l = min(len, USB_INTERFACE_DESCRIPTOR_SIZE); 2332 totlen += l; 2333 memcpy(buf, &ohci_ifcd, l); 2334 buf = (char *)buf + l; 2335 len -= l; 2336 l = min(len, USB_ENDPOINT_DESCRIPTOR_SIZE); 2337 totlen += l; 2338 memcpy(buf, &ohci_endpd, l); 2339 break; 2340 case UDESC_STRING: 2341 if (len == 0) 2342 break; 2343 *(u_int8_t *)buf = 0; 2344 totlen = 1; 2345 switch (value & 0xff) { 2346 case 1: /* Vendor */ 2347 totlen = ohci_str(buf, len, sc->sc_vendor); 2348 break; 2349 case 2: /* Product */ 2350 totlen = ohci_str(buf, len, "OHCI root hub"); 2351 break; 2352 } 2353 break; 2354 default: 2355 err = USBD_IOERROR; 2356 goto ret; 2357 } 2358 break; 2359 case C(UR_GET_INTERFACE, UT_READ_INTERFACE): 2360 if (len > 0) { 2361 *(u_int8_t *)buf = 0; 2362 totlen = 1; 2363 } 2364 break; 2365 case C(UR_GET_STATUS, UT_READ_DEVICE): 2366 if (len > 1) { 2367 USETW(((usb_status_t *)buf)->wStatus,UDS_SELF_POWERED); 2368 totlen = 2; 2369 } 2370 break; 2371 case C(UR_GET_STATUS, UT_READ_INTERFACE): 2372 case C(UR_GET_STATUS, UT_READ_ENDPOINT): 2373 if (len > 1) { 2374 USETW(((usb_status_t *)buf)->wStatus, 0); 2375 totlen = 2; 2376 } 2377 break; 2378 case C(UR_SET_ADDRESS, UT_WRITE_DEVICE): 2379 if (value >= USB_MAX_DEVICES) { 2380 err = USBD_IOERROR; 2381 goto ret; 2382 } 2383 sc->sc_addr = value; 2384 break; 2385 case C(UR_SET_CONFIG, UT_WRITE_DEVICE): 2386 if (value != 0 && value != 1) { 2387 err = USBD_IOERROR; 2388 goto ret; 2389 } 2390 sc->sc_conf = value; 2391 break; 2392 case C(UR_SET_DESCRIPTOR, UT_WRITE_DEVICE): 2393 break; 2394 case C(UR_SET_FEATURE, UT_WRITE_DEVICE): 2395 case C(UR_SET_FEATURE, UT_WRITE_INTERFACE): 2396 case C(UR_SET_FEATURE, UT_WRITE_ENDPOINT): 2397 err = USBD_IOERROR; 2398 goto ret; 2399 case C(UR_SET_INTERFACE, UT_WRITE_INTERFACE): 2400 break; 2401 case C(UR_SYNCH_FRAME, UT_WRITE_ENDPOINT): 2402 break; 2403 /* Hub requests */ 2404 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_DEVICE): 2405 break; 2406 case C(UR_CLEAR_FEATURE, UT_WRITE_CLASS_OTHER): 2407 DPRINTFN(8, ("ohci_root_ctrl_control: UR_CLEAR_PORT_FEATURE " 2408 "port=%d feature=%d\n", 2409 index, value)); 2410 if (index < 1 || index > sc->sc_noport) { 2411 err = USBD_IOERROR; 2412 goto ret; 2413 } 2414 port = OHCI_RH_PORT_STATUS(index); 2415 switch(value) { 2416 case UHF_PORT_ENABLE: 2417 OWRITE4(sc, port, UPS_CURRENT_CONNECT_STATUS); 2418 break; 2419 case UHF_PORT_SUSPEND: 2420 OWRITE4(sc, port, UPS_OVERCURRENT_INDICATOR); 2421 break; 2422 case UHF_PORT_POWER: 2423 /* Yes, writing to the LOW_SPEED bit clears power. */ 2424 OWRITE4(sc, port, UPS_LOW_SPEED); 2425 break; 2426 case UHF_C_PORT_CONNECTION: 2427 OWRITE4(sc, port, UPS_C_CONNECT_STATUS << 16); 2428 break; 2429 case UHF_C_PORT_ENABLE: 2430 OWRITE4(sc, port, UPS_C_PORT_ENABLED << 16); 2431 break; 2432 case UHF_C_PORT_SUSPEND: 2433 OWRITE4(sc, port, UPS_C_SUSPEND << 16); 2434 break; 2435 case UHF_C_PORT_OVER_CURRENT: 2436 OWRITE4(sc, port, UPS_C_OVERCURRENT_INDICATOR << 16); 2437 break; 2438 case UHF_C_PORT_RESET: 2439 OWRITE4(sc, port, UPS_C_PORT_RESET << 16); 2440 break; 2441 default: 2442 err = USBD_IOERROR; 2443 goto ret; 2444 } 2445 switch(value) { 2446 case UHF_C_PORT_CONNECTION: 2447 case UHF_C_PORT_ENABLE: 2448 case UHF_C_PORT_SUSPEND: 2449 case UHF_C_PORT_OVER_CURRENT: 2450 case UHF_C_PORT_RESET: 2451 /* Enable RHSC interrupt if condition is cleared. */ 2452 if ((OREAD4(sc, port) >> 16) == 0) 2453 ohci_rhsc_able(sc, 1); 2454 break; 2455 default: 2456 break; 2457 } 2458 break; 2459 case C(UR_GET_DESCRIPTOR, UT_READ_CLASS_DEVICE): 2460 if (value != 0) { 2461 err = USBD_IOERROR; 2462 goto ret; 2463 } 2464 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_A); 2465 hubd = ohci_hubd; 2466 hubd.bNbrPorts = sc->sc_noport; 2467 USETW(hubd.wHubCharacteristics, 2468 (v & OHCI_NPS ? UHD_PWR_NO_SWITCH : 2469 v & OHCI_PSM ? UHD_PWR_GANGED : UHD_PWR_INDIVIDUAL) 2470 /* XXX overcurrent */ 2471 ); 2472 hubd.bPwrOn2PwrGood = OHCI_GET_POTPGT(v); 2473 v = OREAD4(sc, OHCI_RH_DESCRIPTOR_B); 2474 for (i = 0, l = sc->sc_noport; l > 0; i++, l -= 8, v >>= 8) 2475 hubd.DeviceRemovable[i++] = (u_int8_t)v; 2476 hubd.bDescLength = USB_HUB_DESCRIPTOR_SIZE + i; 2477 l = min(len, hubd.bDescLength); 2478 totlen = l; 2479 memcpy(buf, &hubd, l); 2480 break; 2481 case C(UR_GET_STATUS, UT_READ_CLASS_DEVICE): 2482 if (len != 4) { 2483 err = USBD_IOERROR; 2484 goto ret; 2485 } 2486 memset(buf, 0, len); /* ? XXX */ 2487 totlen = len; 2488 break; 2489 case C(UR_GET_STATUS, UT_READ_CLASS_OTHER): 2490 DPRINTFN(8,("ohci_root_ctrl_transfer: get port status i=%d\n", 2491 index)); 2492 if (index < 1 || index > sc->sc_noport) { 2493 err = USBD_IOERROR; 2494 goto ret; 2495 } 2496 if (len != 4) { 2497 err = USBD_IOERROR; 2498 goto ret; 2499 } 2500 v = OREAD4(sc, OHCI_RH_PORT_STATUS(index)); 2501 DPRINTFN(8,("ohci_root_ctrl_transfer: port status=0x%04x\n", 2502 v)); 2503 USETW(ps.wPortStatus, v); 2504 USETW(ps.wPortChange, v >> 16); 2505 l = min(len, sizeof ps); 2506 memcpy(buf, &ps, l); 2507 totlen = l; 2508 break; 2509 case C(UR_SET_DESCRIPTOR, UT_WRITE_CLASS_DEVICE): 2510 err = USBD_IOERROR; 2511 goto ret; 2512 case C(UR_SET_FEATURE, UT_WRITE_CLASS_DEVICE): 2513 break; 2514 case C(UR_SET_FEATURE, UT_WRITE_CLASS_OTHER): 2515 if (index < 1 || index > sc->sc_noport) { 2516 err = USBD_IOERROR; 2517 goto ret; 2518 } 2519 port = OHCI_RH_PORT_STATUS(index); 2520 switch(value) { 2521 case UHF_PORT_ENABLE: 2522 OWRITE4(sc, port, UPS_PORT_ENABLED); 2523 break; 2524 case UHF_PORT_SUSPEND: 2525 OWRITE4(sc, port, UPS_SUSPEND); 2526 break; 2527 case UHF_PORT_RESET: 2528 DPRINTFN(5,("ohci_root_ctrl_transfer: reset port %d\n", 2529 index)); 2530 OWRITE4(sc, port, UPS_RESET); 2531 for (i = 0; i < 5; i++) { 2532 usb_delay_ms(&sc->sc_bus, 2533 USB_PORT_ROOT_RESET_DELAY); 2534 if ((OREAD4(sc, port) & UPS_RESET) == 0) 2535 break; 2536 } 2537 DPRINTFN(8,("ohci port %d reset, status = 0x%04x\n", 2538 index, OREAD4(sc, port))); 2539 break; 2540 case UHF_PORT_POWER: 2541 DPRINTFN(2,("ohci_root_ctrl_transfer: set port power " 2542 "%d\n", index)); 2543 OWRITE4(sc, port, UPS_PORT_POWER); 2544 break; 2545 default: 2546 err = USBD_IOERROR; 2547 goto ret; 2548 } 2549 break; 2550 default: 2551 err = USBD_IOERROR; 2552 goto ret; 2553 } 2554 xfer->actlen = totlen; 2555 err = USBD_NORMAL_COMPLETION; 2556 ret: 2557 xfer->status = err; 2558 s = splusb(); 2559 usb_transfer_complete(xfer); 2560 splx(s); 2561 return (USBD_IN_PROGRESS); 2562 } 2563 2564 /* Abort a root control request. */ 2565 Static void 2566 ohci_root_ctrl_abort(usbd_xfer_handle xfer) 2567 { 2568 /* Nothing to do, all transfers are synchronous. */ 2569 } 2570 2571 /* Close the root pipe. */ 2572 Static void 2573 ohci_root_ctrl_close(usbd_pipe_handle pipe) 2574 { 2575 DPRINTF(("ohci_root_ctrl_close\n")); 2576 /* Nothing to do. */ 2577 } 2578 2579 Static usbd_status 2580 ohci_root_intr_transfer(usbd_xfer_handle xfer) 2581 { 2582 usbd_status err; 2583 2584 /* Insert last in queue. */ 2585 err = usb_insert_transfer(xfer); 2586 if (err) 2587 return (err); 2588 2589 /* Pipe isn't running, start first */ 2590 return (ohci_root_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2591 } 2592 2593 Static usbd_status 2594 ohci_root_intr_start(usbd_xfer_handle xfer) 2595 { 2596 usbd_pipe_handle pipe = xfer->pipe; 2597 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2598 2599 if (sc->sc_dying) 2600 return (USBD_IOERROR); 2601 2602 sc->sc_intrxfer = xfer; 2603 2604 return (USBD_IN_PROGRESS); 2605 } 2606 2607 /* Abort a root interrupt request. */ 2608 Static void 2609 ohci_root_intr_abort(usbd_xfer_handle xfer) 2610 { 2611 int s; 2612 2613 if (xfer->pipe->intrxfer == xfer) { 2614 DPRINTF(("ohci_root_intr_abort: remove\n")); 2615 xfer->pipe->intrxfer = NULL; 2616 } 2617 xfer->status = USBD_CANCELLED; 2618 s = splusb(); 2619 usb_transfer_complete(xfer); 2620 splx(s); 2621 } 2622 2623 /* Close the root pipe. */ 2624 Static void 2625 ohci_root_intr_close(usbd_pipe_handle pipe) 2626 { 2627 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2628 2629 DPRINTF(("ohci_root_intr_close\n")); 2630 2631 sc->sc_intrxfer = NULL; 2632 } 2633 2634 /************************/ 2635 2636 Static usbd_status 2637 ohci_device_ctrl_transfer(usbd_xfer_handle xfer) 2638 { 2639 usbd_status err; 2640 2641 /* Insert last in queue. */ 2642 err = usb_insert_transfer(xfer); 2643 if (err) 2644 return (err); 2645 2646 /* Pipe isn't running, start first */ 2647 return (ohci_device_ctrl_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2648 } 2649 2650 Static usbd_status 2651 ohci_device_ctrl_start(usbd_xfer_handle xfer) 2652 { 2653 ohci_softc_t *sc = (ohci_softc_t *)xfer->pipe->device->bus; 2654 usbd_status err; 2655 2656 if (sc->sc_dying) 2657 return (USBD_IOERROR); 2658 2659 #ifdef DIAGNOSTIC 2660 if (!(xfer->rqflags & URQ_REQUEST)) { 2661 /* XXX panic */ 2662 printf("ohci_device_ctrl_transfer: not a request\n"); 2663 return (USBD_INVAL); 2664 } 2665 #endif 2666 2667 err = ohci_device_request(xfer); 2668 if (err) 2669 return (err); 2670 2671 if (sc->sc_bus.use_polling) 2672 ohci_waitintr(sc, xfer); 2673 return (USBD_IN_PROGRESS); 2674 } 2675 2676 /* Abort a device control request. */ 2677 Static void 2678 ohci_device_ctrl_abort(usbd_xfer_handle xfer) 2679 { 2680 DPRINTF(("ohci_device_ctrl_abort: xfer=%p\n", xfer)); 2681 ohci_abort_xfer(xfer, USBD_CANCELLED); 2682 } 2683 2684 /* Close a device control pipe. */ 2685 Static void 2686 ohci_device_ctrl_close(usbd_pipe_handle pipe) 2687 { 2688 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2689 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2690 2691 DPRINTF(("ohci_device_ctrl_close: pipe=%p\n", pipe)); 2692 ohci_close_pipe(pipe, sc->sc_ctrl_head); 2693 ohci_free_std(sc, opipe->tail.td); 2694 } 2695 2696 /************************/ 2697 2698 Static void 2699 ohci_device_clear_toggle(usbd_pipe_handle pipe) 2700 { 2701 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2702 2703 opipe->sed->ed.ed_headp &= htole32(~OHCI_TOGGLECARRY); 2704 } 2705 2706 Static void 2707 ohci_noop(usbd_pipe_handle pipe) 2708 { 2709 } 2710 2711 Static usbd_status 2712 ohci_device_bulk_transfer(usbd_xfer_handle xfer) 2713 { 2714 usbd_status err; 2715 2716 /* Insert last in queue. */ 2717 err = usb_insert_transfer(xfer); 2718 if (err) 2719 return (err); 2720 2721 /* Pipe isn't running, start first */ 2722 return (ohci_device_bulk_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2723 } 2724 2725 Static usbd_status 2726 ohci_device_bulk_start(usbd_xfer_handle xfer) 2727 { 2728 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2729 usbd_device_handle dev = opipe->pipe.device; 2730 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2731 int addr = dev->address; 2732 ohci_soft_td_t *data, *tail, *tdp; 2733 ohci_soft_ed_t *sed; 2734 int s, len, isread, endpt; 2735 usbd_status err; 2736 2737 if (sc->sc_dying) 2738 return (USBD_IOERROR); 2739 2740 #ifdef DIAGNOSTIC 2741 if (xfer->rqflags & URQ_REQUEST) { 2742 /* XXX panic */ 2743 printf("ohci_device_bulk_start: a request\n"); 2744 return (USBD_INVAL); 2745 } 2746 #endif 2747 2748 len = xfer->length; 2749 endpt = xfer->pipe->endpoint->edesc->bEndpointAddress; 2750 isread = UE_GET_DIR(endpt) == UE_DIR_IN; 2751 sed = opipe->sed; 2752 2753 DPRINTFN(4,("ohci_device_bulk_start: xfer=%p len=%d isread=%d " 2754 "flags=%d endpt=%d\n", xfer, len, isread, xfer->flags, 2755 endpt)); 2756 2757 opipe->u.bulk.isread = isread; 2758 opipe->u.bulk.length = len; 2759 2760 /* Update device address */ 2761 sed->ed.ed_flags = htole32( 2762 (le32toh(sed->ed.ed_flags) & ~OHCI_ED_ADDRMASK) | 2763 OHCI_ED_SET_FA(addr)); 2764 2765 /* Allocate a chain of new TDs (including a new tail). */ 2766 data = opipe->tail.td; 2767 err = ohci_alloc_std_chain(opipe, sc, len, isread, xfer, 2768 data, &tail); 2769 /* We want interrupt at the end of the transfer. */ 2770 tail->td.td_flags &= htole32(~OHCI_TD_INTR_MASK); 2771 tail->td.td_flags |= htole32(OHCI_TD_SET_DI(1)); 2772 tail->flags |= OHCI_CALL_DONE; 2773 tail = tail->nexttd; /* point at sentinel */ 2774 if (err) 2775 return (err); 2776 2777 tail->xfer = NULL; 2778 xfer->hcpriv = data; 2779 2780 DPRINTFN(4,("ohci_device_bulk_start: ed_flags=0x%08x td_flags=0x%08x " 2781 "td_cbp=0x%08x td_be=0x%08x\n", 2782 (int)le32toh(sed->ed.ed_flags), 2783 (int)le32toh(data->td.td_flags), 2784 (int)le32toh(data->td.td_cbp), 2785 (int)le32toh(data->td.td_be))); 2786 2787 #ifdef OHCI_DEBUG 2788 if (ohcidebug > 5) { 2789 ohci_dump_ed(sed); 2790 ohci_dump_tds(data); 2791 } 2792 #endif 2793 2794 /* Insert ED in schedule */ 2795 s = splusb(); 2796 for (tdp = data; tdp != tail; tdp = tdp->nexttd) { 2797 tdp->xfer = xfer; 2798 } 2799 sed->ed.ed_tailp = htole32(tail->physaddr); 2800 opipe->tail.td = tail; 2801 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2802 OWRITE4(sc, OHCI_COMMAND_STATUS, OHCI_BLF); 2803 if (xfer->timeout && !sc->sc_bus.use_polling) { 2804 usb_callout(xfer->timeout_handle, MS_TO_TICKS(xfer->timeout), 2805 ohci_timeout, xfer); 2806 } 2807 2808 #if 0 2809 /* This goes wrong if we are too slow. */ 2810 if (ohcidebug > 10) { 2811 delay(10000); 2812 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2813 OREAD4(sc, OHCI_COMMAND_STATUS))); 2814 ohci_dump_ed(sed); 2815 ohci_dump_tds(data); 2816 } 2817 #endif 2818 2819 splx(s); 2820 2821 return (USBD_IN_PROGRESS); 2822 } 2823 2824 Static void 2825 ohci_device_bulk_abort(usbd_xfer_handle xfer) 2826 { 2827 DPRINTF(("ohci_device_bulk_abort: xfer=%p\n", xfer)); 2828 ohci_abort_xfer(xfer, USBD_CANCELLED); 2829 } 2830 2831 /* 2832 * Close a device bulk pipe. 2833 */ 2834 Static void 2835 ohci_device_bulk_close(usbd_pipe_handle pipe) 2836 { 2837 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2838 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2839 2840 DPRINTF(("ohci_device_bulk_close: pipe=%p\n", pipe)); 2841 ohci_close_pipe(pipe, sc->sc_bulk_head); 2842 ohci_free_std(sc, opipe->tail.td); 2843 } 2844 2845 /************************/ 2846 2847 Static usbd_status 2848 ohci_device_intr_transfer(usbd_xfer_handle xfer) 2849 { 2850 usbd_status err; 2851 2852 /* Insert last in queue. */ 2853 err = usb_insert_transfer(xfer); 2854 if (err) 2855 return (err); 2856 2857 /* Pipe isn't running, start first */ 2858 return (ohci_device_intr_start(SIMPLEQ_FIRST(&xfer->pipe->queue))); 2859 } 2860 2861 Static usbd_status 2862 ohci_device_intr_start(usbd_xfer_handle xfer) 2863 { 2864 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 2865 usbd_device_handle dev = opipe->pipe.device; 2866 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 2867 ohci_soft_ed_t *sed = opipe->sed; 2868 ohci_soft_td_t *data, *tail; 2869 int len; 2870 int s; 2871 2872 if (sc->sc_dying) 2873 return (USBD_IOERROR); 2874 2875 DPRINTFN(3, ("ohci_device_intr_transfer: xfer=%p len=%d " 2876 "flags=%d priv=%p\n", 2877 xfer, xfer->length, xfer->flags, xfer->priv)); 2878 2879 #ifdef DIAGNOSTIC 2880 if (xfer->rqflags & URQ_REQUEST) 2881 panic("ohci_device_intr_transfer: a request\n"); 2882 #endif 2883 2884 len = xfer->length; 2885 2886 data = opipe->tail.td; 2887 tail = ohci_alloc_std(sc); 2888 if (tail == NULL) 2889 return (USBD_NOMEM); 2890 tail->xfer = NULL; 2891 2892 data->td.td_flags = htole32( 2893 OHCI_TD_IN | OHCI_TD_NOCC | 2894 OHCI_TD_SET_DI(1) | OHCI_TD_TOGGLE_CARRY); 2895 if (xfer->flags & USBD_SHORT_XFER_OK) 2896 data->td.td_flags |= htole32(OHCI_TD_R); 2897 data->td.td_cbp = htole32(DMAADDR(&xfer->dmabuf)); 2898 data->nexttd = tail; 2899 data->td.td_nexttd = htole32(tail->physaddr); 2900 data->td.td_be = htole32(le32toh(data->td.td_cbp) + len - 1); 2901 data->len = len; 2902 data->xfer = xfer; 2903 data->flags = OHCI_CALL_DONE | OHCI_ADD_LEN; 2904 xfer->hcpriv = data; 2905 2906 #ifdef OHCI_DEBUG 2907 if (ohcidebug > 5) { 2908 DPRINTF(("ohci_device_intr_transfer:\n")); 2909 ohci_dump_ed(sed); 2910 ohci_dump_tds(data); 2911 } 2912 #endif 2913 2914 /* Insert ED in schedule */ 2915 s = splusb(); 2916 sed->ed.ed_tailp = htole32(tail->physaddr); 2917 opipe->tail.td = tail; 2918 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); 2919 2920 #if 0 2921 /* 2922 * This goes horribly wrong, printing thousands of descriptors, 2923 * because false references are followed due to the fact that the 2924 * TD is gone. 2925 */ 2926 if (ohcidebug > 5) { 2927 usb_delay_ms(&sc->sc_bus, 5); 2928 DPRINTF(("ohci_device_intr_transfer: status=%x\n", 2929 OREAD4(sc, OHCI_COMMAND_STATUS))); 2930 ohci_dump_ed(sed); 2931 ohci_dump_tds(data); 2932 } 2933 #endif 2934 splx(s); 2935 2936 return (USBD_IN_PROGRESS); 2937 } 2938 2939 /* Abort a device control request. */ 2940 Static void 2941 ohci_device_intr_abort(usbd_xfer_handle xfer) 2942 { 2943 if (xfer->pipe->intrxfer == xfer) { 2944 DPRINTF(("ohci_device_intr_abort: remove\n")); 2945 xfer->pipe->intrxfer = NULL; 2946 } 2947 ohci_abort_xfer(xfer, USBD_CANCELLED); 2948 } 2949 2950 /* Close a device interrupt pipe. */ 2951 Static void 2952 ohci_device_intr_close(usbd_pipe_handle pipe) 2953 { 2954 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 2955 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 2956 int nslots = opipe->u.intr.nslots; 2957 int pos = opipe->u.intr.pos; 2958 int j; 2959 ohci_soft_ed_t *p, *sed = opipe->sed; 2960 int s; 2961 2962 DPRINTFN(1,("ohci_device_intr_close: pipe=%p nslots=%d pos=%d\n", 2963 pipe, nslots, pos)); 2964 s = splusb(); 2965 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); 2966 if ((le32toh(sed->ed.ed_tailp) & OHCI_HEADMASK) != 2967 (le32toh(sed->ed.ed_headp) & OHCI_HEADMASK)) 2968 usb_delay_ms(&sc->sc_bus, 2); 2969 2970 for (p = sc->sc_eds[pos]; p && p->next != sed; p = p->next) 2971 ; 2972 #ifdef DIAGNOSTIC 2973 if (p == NULL) 2974 panic("ohci_device_intr_close: ED not found\n"); 2975 #endif 2976 p->next = sed->next; 2977 p->ed.ed_nexted = sed->ed.ed_nexted; 2978 splx(s); 2979 2980 for (j = 0; j < nslots; j++) 2981 --sc->sc_bws[(pos * nslots + j) % OHCI_NO_INTRS]; 2982 2983 ohci_free_std(sc, opipe->tail.td); 2984 ohci_free_sed(sc, opipe->sed); 2985 } 2986 2987 Static usbd_status 2988 ohci_device_setintr(ohci_softc_t *sc, struct ohci_pipe *opipe, int ival) 2989 { 2990 int i, j, s, best; 2991 u_int npoll, slow, shigh, nslots; 2992 u_int bestbw, bw; 2993 ohci_soft_ed_t *hsed, *sed = opipe->sed; 2994 2995 DPRINTFN(2, ("ohci_setintr: pipe=%p\n", opipe)); 2996 if (ival == 0) { 2997 printf("ohci_setintr: 0 interval\n"); 2998 return (USBD_INVAL); 2999 } 3000 3001 npoll = OHCI_NO_INTRS; 3002 while (npoll > ival) 3003 npoll /= 2; 3004 DPRINTFN(2, ("ohci_setintr: ival=%d npoll=%d\n", ival, npoll)); 3005 3006 /* 3007 * We now know which level in the tree the ED must go into. 3008 * Figure out which slot has most bandwidth left over. 3009 * Slots to examine: 3010 * npoll 3011 * 1 0 3012 * 2 1 2 3013 * 4 3 4 5 6 3014 * 8 7 8 9 10 11 12 13 14 3015 * N (N-1) .. (N-1+N-1) 3016 */ 3017 slow = npoll-1; 3018 shigh = slow + npoll; 3019 nslots = OHCI_NO_INTRS / npoll; 3020 for (best = i = slow, bestbw = ~0; i < shigh; i++) { 3021 bw = 0; 3022 for (j = 0; j < nslots; j++) 3023 bw += sc->sc_bws[(i * nslots + j) % OHCI_NO_INTRS]; 3024 if (bw < bestbw) { 3025 best = i; 3026 bestbw = bw; 3027 } 3028 } 3029 DPRINTFN(2, ("ohci_setintr: best=%d(%d..%d) bestbw=%d\n", 3030 best, slow, shigh, bestbw)); 3031 3032 s = splusb(); 3033 hsed = sc->sc_eds[best]; 3034 sed->next = hsed->next; 3035 sed->ed.ed_nexted = hsed->ed.ed_nexted; 3036 hsed->next = sed; 3037 hsed->ed.ed_nexted = htole32(sed->physaddr); 3038 splx(s); 3039 3040 for (j = 0; j < nslots; j++) 3041 ++sc->sc_bws[(best * nslots + j) % OHCI_NO_INTRS]; 3042 opipe->u.intr.nslots = nslots; 3043 opipe->u.intr.pos = best; 3044 3045 DPRINTFN(5, ("ohci_setintr: returns %p\n", opipe)); 3046 return (USBD_NORMAL_COMPLETION); 3047 } 3048 3049 /***********************/ 3050 3051 usbd_status 3052 ohci_device_isoc_transfer(usbd_xfer_handle xfer) 3053 { 3054 usbd_status err; 3055 3056 DPRINTFN(5,("ohci_device_isoc_transfer: xfer=%p\n", xfer)); 3057 3058 /* Put it on our queue, */ 3059 err = usb_insert_transfer(xfer); 3060 3061 /* bail out on error, */ 3062 if (err && err != USBD_IN_PROGRESS) 3063 return (err); 3064 3065 /* XXX should check inuse here */ 3066 3067 /* insert into schedule, */ 3068 ohci_device_isoc_enter(xfer); 3069 3070 /* and start if the pipe wasn't running */ 3071 if (!err) 3072 ohci_device_isoc_start(SIMPLEQ_FIRST(&xfer->pipe->queue)); 3073 3074 return (err); 3075 } 3076 3077 void 3078 ohci_device_isoc_enter(usbd_xfer_handle xfer) 3079 { 3080 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3081 usbd_device_handle dev = opipe->pipe.device; 3082 ohci_softc_t *sc = (ohci_softc_t *)dev->bus; 3083 ohci_soft_ed_t *sed = opipe->sed; 3084 struct iso *iso = &opipe->u.iso; 3085 ohci_soft_itd_t *sitd, *nsitd; 3086 ohci_physaddr_t buf, offs, noffs, bp0; 3087 int i, ncur, nframes; 3088 int s; 3089 3090 DPRINTFN(1,("ohci_device_isoc_enter: used=%d next=%d xfer=%p " 3091 "nframes=%d\n", 3092 iso->inuse, iso->next, xfer, xfer->nframes)); 3093 3094 if (sc->sc_dying) 3095 return; 3096 3097 if (iso->next == -1) { 3098 /* Not in use yet, schedule it a few frames ahead. */ 3099 iso->next = le32toh(sc->sc_hcca->hcca_frame_number) + 5; 3100 DPRINTFN(2,("ohci_device_isoc_enter: start next=%d\n", 3101 iso->next)); 3102 } 3103 3104 sitd = opipe->tail.itd; 3105 buf = DMAADDR(&xfer->dmabuf); 3106 bp0 = OHCI_PAGE(buf); 3107 offs = OHCI_PAGE_OFFSET(buf); 3108 nframes = xfer->nframes; 3109 xfer->hcpriv = sitd; 3110 for (i = ncur = 0; i < nframes; i++, ncur++) { 3111 noffs = offs + xfer->frlengths[i]; 3112 if (ncur == OHCI_ITD_NOFFSET || /* all offsets used */ 3113 OHCI_PAGE(buf + noffs) > bp0 + OHCI_PAGE_SIZE) { /* too many page crossings */ 3114 3115 /* Allocate next ITD */ 3116 nsitd = ohci_alloc_sitd(sc); 3117 if (nsitd == NULL) { 3118 /* XXX what now? */ 3119 printf("%s: isoc TD alloc failed\n", 3120 USBDEVNAME(sc->sc_bus.bdev)); 3121 return; 3122 } 3123 3124 /* Fill current ITD */ 3125 sitd->itd.itd_flags = htole32( 3126 OHCI_ITD_NOCC | 3127 OHCI_ITD_SET_SF(iso->next) | 3128 OHCI_ITD_SET_DI(6) | /* delay intr a little */ 3129 OHCI_ITD_SET_FC(ncur)); 3130 sitd->itd.itd_bp0 = htole32(bp0); 3131 sitd->nextitd = nsitd; 3132 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3133 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3134 sitd->xfer = xfer; 3135 sitd->flags = 0; 3136 3137 sitd = nsitd; 3138 iso->next = iso->next + ncur; 3139 bp0 = OHCI_PAGE(buf + offs); 3140 ncur = 0; 3141 } 3142 sitd->itd.itd_offset[ncur] = htole16(OHCI_ITD_MK_OFFS(offs)); 3143 offs = noffs; 3144 } 3145 nsitd = ohci_alloc_sitd(sc); 3146 if (nsitd == NULL) { 3147 /* XXX what now? */ 3148 printf("%s: isoc TD alloc failed\n", 3149 USBDEVNAME(sc->sc_bus.bdev)); 3150 return; 3151 } 3152 /* Fixup last used ITD */ 3153 sitd->itd.itd_flags = htole32( 3154 OHCI_ITD_NOCC | 3155 OHCI_ITD_SET_SF(iso->next) | 3156 OHCI_ITD_SET_DI(0) | 3157 OHCI_ITD_SET_FC(ncur)); 3158 sitd->itd.itd_bp0 = htole32(bp0); 3159 sitd->nextitd = nsitd; 3160 sitd->itd.itd_nextitd = htole32(nsitd->physaddr); 3161 sitd->itd.itd_be = htole32(bp0 + offs - 1); 3162 sitd->xfer = xfer; 3163 sitd->flags = OHCI_CALL_DONE; 3164 3165 iso->next = iso->next + ncur; 3166 iso->inuse += nframes; 3167 3168 xfer->actlen = offs; /* XXX pretend we did it all */ 3169 3170 xfer->status = USBD_IN_PROGRESS; 3171 3172 #ifdef OHCI_DEBUG 3173 if (ohcidebug > 5) { 3174 DPRINTF(("ohci_device_isoc_enter: frame=%d\n", 3175 le32toh(sc->sc_hcca->hcca_frame_number))); 3176 ohci_dump_itds(xfer->hcpriv); 3177 ohci_dump_ed(sed); 3178 } 3179 #endif 3180 3181 s = splusb(); 3182 opipe->tail.itd = nsitd; 3183 sed->ed.ed_tailp = htole32(nsitd->physaddr); 3184 splx(s); 3185 3186 #ifdef OHCI_DEBUG 3187 if (ohcidebug > 5) { 3188 delay(150000); 3189 DPRINTF(("ohci_device_isoc_enter: after frame=%d\n", 3190 le32toh(sc->sc_hcca->hcca_frame_number))); 3191 ohci_dump_itds(xfer->hcpriv); 3192 ohci_dump_ed(sed); 3193 } 3194 #endif 3195 } 3196 3197 usbd_status 3198 ohci_device_isoc_start(usbd_xfer_handle xfer) 3199 { 3200 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3201 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3202 3203 DPRINTFN(5,("ohci_device_isoc_start: xfer=%p\n", xfer)); 3204 3205 if (sc->sc_dying) 3206 return (USBD_IOERROR); 3207 3208 #ifdef DIAGNOSTIC 3209 if (xfer->status != USBD_IN_PROGRESS) 3210 printf("uhci_device_isoc_start: not in progress %p\n", xfer); 3211 #endif 3212 3213 /* XXX anything to do? */ 3214 3215 return (USBD_IN_PROGRESS); 3216 } 3217 3218 void 3219 ohci_device_isoc_abort(usbd_xfer_handle xfer) 3220 { 3221 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3222 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3223 ohci_soft_ed_t *sed; 3224 ohci_soft_itd_t *sitd; 3225 int s; 3226 3227 s = splusb(); 3228 3229 DPRINTFN(1,("ohci_device_isoc_abort: xfer=%p\n", xfer)); 3230 3231 /* Transfer is already done. */ 3232 if (xfer->status != USBD_NOT_STARTED && 3233 xfer->status != USBD_IN_PROGRESS) { 3234 splx(s); 3235 printf("ohci_device_isoc_abort: early return\n"); 3236 return; 3237 } 3238 3239 /* Give xfer the requested abort code. */ 3240 xfer->status = USBD_CANCELLED; 3241 3242 sed = opipe->sed; 3243 sed->ed.ed_flags |= htole32(OHCI_ED_SKIP); /* force hardware skip */ 3244 3245 sitd = xfer->hcpriv; 3246 #ifdef DIAGNOSTIC 3247 if (sitd == NULL) { 3248 splx(s); 3249 printf("ohci_device_isoc_abort: hcpriv==0\n"); 3250 return; 3251 } 3252 #endif 3253 for (; sitd->xfer == xfer; sitd = sitd->nextitd) { 3254 #ifdef DIAGNOSTIC 3255 DPRINTFN(1,("abort sets done sitd=%p\n", sitd)); 3256 sitd->isdone = 1; 3257 #endif 3258 } 3259 3260 splx(s); 3261 3262 usb_delay_ms(&sc->sc_bus, OHCI_ITD_NOFFSET); 3263 3264 s = splusb(); 3265 3266 /* Run callback. */ 3267 usb_transfer_complete(xfer); 3268 3269 sed->ed.ed_headp = htole32(sitd->physaddr); /* unlink TDs */ 3270 sed->ed.ed_flags &= htole32(~OHCI_ED_SKIP); /* remove hardware skip */ 3271 3272 splx(s); 3273 } 3274 3275 void 3276 ohci_device_isoc_done(usbd_xfer_handle xfer) 3277 { 3278 struct ohci_pipe *opipe = (struct ohci_pipe *)xfer->pipe; 3279 ohci_softc_t *sc = (ohci_softc_t *)opipe->pipe.device->bus; 3280 ohci_soft_itd_t *sitd, *nsitd; 3281 3282 DPRINTFN(1,("ohci_device_isoc_done: xfer=%p\n", xfer)); 3283 3284 for (sitd = xfer->hcpriv; 3285 !(sitd->flags & OHCI_CALL_DONE); 3286 sitd = nsitd) { 3287 nsitd = sitd->nextitd; 3288 DPRINTFN(1,("ohci_device_isoc_done: free sitd=%p\n", sitd)); 3289 ohci_free_sitd(sc, sitd); 3290 } 3291 ohci_free_sitd(sc, sitd); 3292 xfer->hcpriv = NULL; 3293 } 3294 3295 usbd_status 3296 ohci_setup_isoc(usbd_pipe_handle pipe) 3297 { 3298 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3299 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3300 struct iso *iso = &opipe->u.iso; 3301 int s; 3302 3303 iso->next = -1; 3304 iso->inuse = 0; 3305 3306 s = splusb(); 3307 ohci_add_ed(opipe->sed, sc->sc_isoc_head); 3308 splx(s); 3309 3310 return (USBD_NORMAL_COMPLETION); 3311 } 3312 3313 void 3314 ohci_device_isoc_close(usbd_pipe_handle pipe) 3315 { 3316 struct ohci_pipe *opipe = (struct ohci_pipe *)pipe; 3317 ohci_softc_t *sc = (ohci_softc_t *)pipe->device->bus; 3318 int s; 3319 3320 DPRINTF(("ohci_device_isoc_close: pipe=%p\n", pipe)); 3321 3322 s = splusb(); 3323 ohci_rem_ed(opipe->sed, sc->sc_isoc_head); 3324 splx(s); 3325 ohci_close_pipe(pipe, sc->sc_isoc_head); 3326 #ifdef DIAGNOSTIC 3327 opipe->tail.itd->isdone = 1; 3328 #endif 3329 ohci_free_sitd(sc, opipe->tail.itd); 3330 } 3331
Indexes created Wed Sep 24 02:09:48 GMT 2025